lerc's challenges 08/02/11 the leiden embedded research center prof. dr. ed f. deprettere, dr....
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LERC's challenges 08/02/11
The Leiden Embedded Research Center
Prof. Dr. Ed F. Deprettere, Dr. Bart KienhuisLeiden Embedded Research Center (LERC)
Leiden Institute of Advanced Computer ScienceLeiden Univerity
{edd, kienhuis}@liacs.nlhttp://www.liacs.nl/lerc
LERC's challenges 08/02/11
Outline of Presentation
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC focus and contributions.
• Current LERC projects.
• Courses, projects, and contact addresses.
LERC's challenges 08/02/11
NASA's Mars Sojourner Rover.Microprocessor: 8-bit Intel 80C85.
Roversenses the environment (input signals), decides on (computes) its actions (response) in real time.
A simple Embedded System
LERC's challenges 08/02/11
A less simple Embedded System
station density high in core
central core contains supercomputer
350 km
text
Central core(2km)
Remotestationation
station contains• 100 LF antennas• 100 HF compound antennas
• LOFAR• SKA
Distributed hierarchicalradio telescopes
LERC's challenges 08/02/11
First
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC focus and contribution.
• Current LERC projects.
• Courses, projects, and contact address.
LERC's challenges 08/02/11
DefinitionAn Embedded System is an information processing system that is:• application domain specific (not general purpose) • tightly coupled to its environment
Examples of application domains are: automotive, multimedia.
Environment: type and properties of input/output information.
Tightly coupled: environment dictates what the system’s response behavior must be.
Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time, and at low power consumption.
LERC's challenges 08/02/11
Small Systems: CoMPSoCA relatively small Embedded System is
• a multi-processor (MP) service providing resource infrastructure organized as a system-on-chip (SoC), • in which processors are heterogeneous (programmable, configurable, dedicated)• having a communication, synchronization, and storage infrastructure that is built on top of a Network-on-Chip (NoC)• being capable of executing a composition (Co) of multiple (independent) applications simultaneously.
Processors run autonomously and concurrently, and arenot abundant as in (homogeneous) cluster or grid computers.
LERC's challenges 08/02/11
Trends in CoMPSoC ES
• current state of art: co-processor P FPGA
• next: homogeneous multi-processors
• then: heterogeneous multi-processors
P
P
P
P
Communication StructureCommunication Structure
MemMem
PE
PE ...
...
PE
PE PE
PE PE
PE
MemMemMemMem MemMem
• finally: scalable networks of homogeneous tiles
Identical tiles
LERC's challenges 08/02/11
An ExampleThe next generation TV will be capable of executingmultiple applications, some of which may be providedby third parties (open system). For example: movie watching, photo display, internet access, and game playing.
• Are there enough resources to execute multiple applications, each application having a certain quality?• What can the quality be of each application to guarantee real-time behavior?• How should the applications be simultaneously scheduled so that resource utilization and application quality are maximal, at minimal cost.
Questions to be answered at compile- time and run-time:
LERC's challenges 08/02/11
Next
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC focus and contribution.
• Current projects.
LERC's challenges 08/02/11
Embedded Systems Modeling
Embedded systems are too complex that all details can betaken into account when specifying and designing them.
Abstraction is necessary; hence specifications are in termsof abstract models on which one can reason.
However, implementations and realizations are not abstract.This gap must be closed in a way hidden to the programmer.
LERC's challenges 08/02/11
Models (2)
How can an embedded system be modeled?
ES Model = {Application Model, Architecture Model, Mapping Model}
- Application : un-timed transformational task graph: deals only with ( structured) functional behavior aspects, - Architecture : timed resource graph: deals only with extra-functional performance/cost aspects, - Mapping : association of the two (independent models) together based on transformations. Includes transformations to close the gap between abstract specifications and actual implementation specifications.
LERC's challenges 08/02/11
Abstract Model means what?
A model is not a blueprint.
It approximates a system’s behavior and structure, leaving out details that do not matter for the purpose of answering questions such as: what will or should happen if … and is it consistent with what I observe from the system.
In embedded systems, behavior both functional andextra-functional.
LERC's challenges 08/02/11
Abstract Model means what? (2)
Application: processes and inter-process communication channels
communicationchannel D
data-stream
process
B
data-stream
A CD
while(1){ read (A); read (B); execute(); write (C); }
service functionality
co-ordination (synchronization) is well defined
LERC's challenges 08/02/11
Abstract model is what? (3)
Architecture : composition of (library) components
private memory
processor types
network
shared memory
buffers
service timing, cost
LERC's challenges 08/02/11
Abstract model is what? (4)
A CD
B
{D, A}Mapping: relation
LERC's challenges 08/02/11
Embedded Systems Design
The given approach structures performance/cost analysis anddesign space exploration.
Application Architecture
Mapping
Analysis
(Semi-) AutomatedDesign SpaceExploration
LERC's challenges 08/02/11
Then
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC focus and contribution.
• Current LERC projects.
• Courses, projects, and contact address.
LERC's challenges 08/02/11
LERC’s focus and contributions
Briefly stated LERC deals with
• the (automatic) conversion of sequential imperative application specifications to input-output equivalent concurrent (parallel) specifications,• the mapping of the concurrent specifications to multi-processor architectures, design-space exploration,• (automatically) synthesizing application domain specific architectures,
LERC's challenges 08/02/11
What does it mean?Application developers can rely on sequential imperativeprogram specifications (C/C++/Java); they don’t knowwhat the implementation platform will be.
A translator converts such specifications to parallelspecifications, possibly including corresponding target implementation platform configurations not pre-defined, using multi-objective optimization techniques.
A compiler converts the parallel specifications to implementation specifications, possibly including thesynthesis of the not pre-defined implementation platform configuration.
LERC's challenges 08/02/11
Process-to-FPGA CoMPSoCparallel
specificationMatlab/C/C++/Java
conversion
FPGA
for j = 1:1:N, [x(j)] = S1( ); endfor i = 1:1:K, [y(i)] = S2( ); endfor j = 1:1:N, for i = 1:1:K, [y(i), x(j)] = func(y(i), x(j) ); endendfor i = 1:1:K, [Out(i)] = Sink( y( I ) ); end
F1 F2
S2 F3 F4
Sink
S1
Parameterized Nested Loop Programs
mapping
LERC's challenges 08/02/11
Why FPGA ?A Field Programmable Gate Array (FPGA) is a billiontransistor hardware programmable, i.e., (re-)configurable,single-chip fabric consisting of a huge amount of look-up tables, memory cells, and mesh interconnect channels. Current FPGAs include high-level functionalblocks, even ISA components.
An FPGA CoMPSoC is (much) more flexible, and (much)cheaper than a custom designed CoMPSoC.
An FPGA CoMPSoC comprising many software andhardware processing components in a run-timere-configurable network is feasible. Limitations are onlycoming from restricted on-chip memory resources.
LERC's challenges 08/02/11
Part II: applying it all
The Big Picture
FPGA
Applications
–
/ /
platform
parallel specification
sequentialprocess
platform
Communication StructureCommunication Structure
MemMem
PE
PE ...
...
PE
PE PE
PE PE
PE
MemMemMemMem MemMem
Component
Sequential program →
again CoMPSoC
LERC's challenges 08/02/11
The Bigger Picture
ESPAM (LERC)
Library ofIP cores
Platform Spec in XML
Mapping Specification
Kahn Process Network in XML
Application
Compaan(LERC)
High-levelModels
SESAME (UvA)
Mapping Specin XML
Explore, modify, select instances
Design of Flexible Interconnection(FLUX) Network Components (TUD)
Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors
RTL-levelModels
Common XMLInterface
Library ofIP cores
LERC's challenges 08/02/11
The ESPAM Design Flow
Library ofIP cores
Platform Spec in XML
C/C++ code for
processors
IP cores in VHDL
KPN In XML
Platform topology
description
VirtexII-ProFPGA
Auxiliary files
Program code Processor 1
Program code Processor 2
Program code Processor 3
System-LevelSpecification
RTL-LevelSpecification
Gate-LevelSpecification
ESPAM
Mapping Specin XML
Xilinx Platform Studio (XPS) Tool
LERC's challenges 08/02/11
Other platforms
FPGAs are currently powerful enough to prototypeCoMPSoC embedded systems, or even to serve asactual product platforms that are application domainspecific. System implementation in FPGAs can bedone without programmers having to deal with it.
However, other – given platforms – can be targetplatforms as well. Examples are Intel multi-coreplatforms, the IBM Cell processor platform, andGPU platforms.
Lerc’s approach is independent of specific target platforms,but can deal with various platforms.
LERC's challenges 08/02/11
Example:Motion JPEG encoder
dimH
dimV
Sequence of
T frames
JPEG encoding
M-JPEG encodedvideo stream
Video stream(4:2:2 YUV format)
LERC's challenges 08/02/11
M-JPEG Specification (Matlab)
[ QTables, HuffTables, TablesInfo ] = P1_l_DefaultTables( );for k = 1:1:NumFrames, [ HeaderInfo ] = P1_l_VideoInInit( ); for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j ,i ) ] = P1_l_VideoInMain( ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = DCT( Block( j , i ) ); end end for j = 1:1:VNumBlocks, for i = 1:1:HNumBlocks, [ Block( j , i ) ] = Q( Block( j , i ), QTables ); [ Packets ] = VLE( Block( j , i ), HuffTables ); [ ] = P1_l_VideoOut( HeaderInfo, TablesInfo, Packets ); end end end
%parameter NumFrames 1 1000;%parameter VNumBlocks 16 256;%parameter HNumBlocks 8 256;
Block( j , i )
Parameterized
LERC's challenges 08/02/11
Deriving the M-JPEG Model
ApplicationIn Matlab
Compaan Compiler
QDCT
P1
VLE
Block
Block Block
Packets
QT
able
s
HuffTab
les struct Block {
int Y1[64]; /* block 8x8 pixels */ int Y2[64]; /* block 8x8 pixels */ int U[64]; /* block 8x8 pixels */ int V[64]; /* block 8x8 pixels */};
LERC's challenges 08/02/11
PPC1
PPC2
B1
B2
VB1
VB2
VB3
VB4
QDCT
P1
VLE
Block
Block Block
Packets
QT
able
s
HuffTab
les
Mapping
PPC1
PPC2
B1
B2FIFO0
FIFO0
FIFO0
FIFO0
FIFO1
FIFO2
QDCT
P1
VLE
Block
Block Block
Packets
QT
able
s
HuffTab
les
LERC's challenges 08/02/11
Finally
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC focus and contribution.
• Current LERC projects.
• Courses, projects, and contact address.
LERC's challenges 08/02/11
Current projects• Compaan (sponsor: LIACS, Compaan B.V.)• ESPAM (Sponsor: Progress; Leiden, Amsterdam, Delft)• Neva (Sponsor: Europe; several companies, universities)• SoftSoc (Sponsor: Europe; several companies, universities)• Trader (Sponsor: Embedded Systems Institute, in co-operation with companies and universities)• Daedalus (Sponsor: Progress+; Chess B.V., Compaan B.V.)
Compaan (our own company) provides a framework (set of tools) that convert sequential imperative application specifications (C, C++, Java) to platform independent input-output equivalent parallel (dataflow) specifications.
LERC's challenges 08/02/11
Current projects (2)• Compaan (sponsor: LIACS, Compaan B.V.)• ESPAM (Sponsor: Progress)• Neva (Sponsor: Europe)• SoftSoc (Sponsor: Europe)• Trader (Sponsor: Embedded Systems Institute)• Daedalus (Sponsor: Progress+, Chess B.V., Compaan B.V.)
ESPAM is a framework (tool-set) that convertssequential imperative application specifications to input-outputequivalent parallel dataflow specifications, and maps themto FPGA CoMPSoC implementation platforms.Parallelization and platform details are hidden to theprogrammer.
LERC's challenges 08/02/11
Current projects (3)• Compaan (sponsor: LIACS, Compaan B.V.)• ESPAM (Sponsor: Progress)• Neva (Sponsor: Europe)• SoftCore (Sponsor: Europe)• Trader (Sponsor: Embedded Systems Institute)• Daedalus (Sponsor: Progress+, Chess B.V., Compaan B.V.)
Neva integrates Compaan and ESPAM into a commerciallyavailable single processor compiler (ACE) to extend it to compilation of parallel applications for multi-processorplatform implementations. Platforms are (multi)-FPGAs, Intelmulti-core platforms, the IBM Cell processor platform, andGPU platforms.
LERC's challenges 08/02/11
Current projects (4)• Compaan (sponsor: LIACS, Compaan B.V.)• ESPAM (Sponsor: Progress)• Neva (Sponsor: Europe)• SoftCore (Sponsor: Europe)• Trader (Sponsor: Embedded Systems Institute)• Daedalus (Sponsor: Progress+, Chess B.V., Compaan B.V.)
Trader deals with hardware assisted Quality of Service(QoS) issues: Deadlock detection and resolving, Simultaneousexecution of multiple applications (entering and leaving atarbitrary time instants), Resource management, Real-Time requirements, etc.
LERC's challenges 08/02/11
Current projects (5)• Compaan (sponsor: LIACS, Compaan B.V)• ESPAM (Sponsor: Progress)• Neva (Sponsor: Europe)• SoftCore (Sponsor: Europe)• Trader (Sponsor: Embedded Systems Institute)• Daedalus (Sponsor: Progress+, Chess B.V., Compaan B.V.)
Daedalus is an open source framework providing acomplete embedded systems design flow. It consists of adesign space exploration infrastructure to arrive atoptimal combinations of application, architecture, andmapping models, followed by an ESPAM programminginfrastructure.
LERC's challenges 08/02/11
For your Information
• What is an embedded system ?
• Embedded Systems design and programming approach.
• Specific LERC’s focus and contribution.
• Current LERC projects.
• Courses, projects, and contact address.
LERC's challenges 08/02/11
Courses, projects, & contacts
Courses:
• Digital Design (Dite) (Dr. Todor Stefanov)• Embedded Systems (Embsyst) (Prof. Ed F. Deprettere)• Software Practice (Prof. Bart Kienhuis)• Program Analysis and Transformation (PAT) (Dr. Sven Verdoolaege)
Projects:
• bachelor projects• master projects• ph.d. projects
Contact edd@liacs.nl kienhuis@liacs.nl
LERC's challenges 08/02/11
Thanks to Prof. Ed F. Deprettere Prof. Bart Kienhuis Dr. Todor Stefanov Dr. Sven Verdoolaege Dr. Alexandru Turjan Ph.D. student Claudiu Zissulescu Ph.D. student Vladimir Zirkovic Ph.D. Student Hristo Nikolov Ph.D. Student Sjoerd Meijer Ph. D. Student Jerome Lemaitre Ph. D. Student Bin Jiang Ph. D. student Dmitriy Nadezhkin
LERC's challenges 08/02/11
Review
You can go through this presentation again at
http://www.liacs.nl/~cserc/EMBSYST/EMBSYST2008/challenges/
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