lg 42pw35 - training manual
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Training Manual
42PW350 Pl Di l42PW350 Plasma Display
Advanced Single Scan Troubleshooting42" Class HD 720p Plasma TV42" Class HD 720p Plasma TV
(41.6" diagonally)
P bli h d J 17th 2011Published June 17th, 2011Updated September 06th, 2011
See last page for update information
Preliminary:Contact Information, Preliminary Matters, Specifications,
TOPICS TO BE DISCUSSED
Troubleshooting:
, y , p ,Plasma Overview, General Troubleshooting Steps, Disassembly Instructions, Voltage and Signal Distribution
• Y-SUS Board Delivers Y-Scan, Logic Signals and FG5V to Y-Drive board.
Circuit Board Operation, Troubleshooting and Alignment of :• Switch Mode Power Supply Only RL_ON and M_On commands to SMPS
• Z SUS Board Also uses one Z SUB board for bottom panel connector
• Y-Drive Board
There is no VSC adjustment on this Y-SUS board.The Y-SUS receives VS, M5V from the Z-SUS.
• Z-SUS Board Also uses one Z-SUB board for bottom panel connector.
• Control Board
Routes VA to the Z-SUB then to the bottom right X-Board.Routes VS, M5V to the Y-SUS.
• 2 X Drive Boards (Left and Right)
• Main Board• Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet
June 2011 42PW350 Plasma 2
Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet.
42PW350 Plasma Display
Overview of Topics to be Discussed
42PW350 Plasma Display
The first section will cover Contact Information and Important Safety Precautions for the Customers Safety as well as the Technician and the Equipment.y q p
Basic Troubleshooting Techniques which can save time and money sometimes can be overlooked. These techniques will also be presented.
The next section will get the Technician familiar with the Disassembly, Identification and Layout of the Plasma Display Panel. y y
At the end of this Section the Technician should be able to Identify the Circuit Boards and have the ability and knowledge necessary to safely remove and replace any Circuit Board or Assembly.
June 2011 42PW350 Plasma 3
Customer Service (and Part Sales) (800) 243-0000
LG Contact Information
Technical Support (and Part Sales) (800) 847-7597USA Website (GSFS) http://gsfs-america.lge.comCustomer Service Website http://www.us.lgservice.comp gKnowledgebase Website http://lgtechassist.comLG Web Training https://lge.webex.com
New: 2010/11 Wireless Ready Models Software Downloads
Presentations with Audio/Video and Screen Notations
LG CS Learning Academy http://ln.lge.com/ilearnhttp://136.166.4.200
Use http://LGLearn.comNo User Name/Password
T i i M l S h ti ith N i ti l B k k St t U S O ’ G id
User Name/Password required
Also available on the Plasma Page:PDP Panel Alignment Handbook,
Pl C t l B d ROM U d t (Ji i d)
Training Manuals, Schematics with Navigational Bookmarks, Start-Up Sequence, Owner’s Guides, Interconnect Diagrams, Dimensions, Connector IDs, Product Pictures and Features.
Published June 2011 by LG Technical Support and TrainingLG Electronics Alabama Inc
Plasma Control Board ROM Update (Jig required)
June 2011 42PW350 Plasma 4
LG Electronics Alabama, Inc. 201 James Record Road, Huntsville, AL, 35813.
IMPORTANT SAFETY NOTICE
Preliminary Matters (The Fine Print) Page 1 of 2
IMPORTANT SAFETY NOTICE
The information in this training manual is intended for use by persons possessing an adequate background in electrical equipment, electronic devices, and mechanical systems. In any attempt to repair a major Product personal injury and property damage can result The manufacturer orto repair a major Product, personal injury and property damage can result. The manufacturer or seller maintains no liability for the interpretation of this information, nor can it assume any liability in conjunction with its use. When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty but may lead to property damage or user injurymodifications will not only void the warranty, but may lead to property damage or user injury. If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for service, they must be returned to their original positions and properly fastened.
CAUTIONCAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power is required for diagnosis or test purposes, disconnect the power immediately after performing the necessary checks Also be aware that many household products present a weight hazardnecessary checks. Also be aware that many household products present a weight hazard. At least two people should be involved in the installation or servicing of such devices. Failure to consider the weight of an product could result in physical injury.
June 2011 42PW350 Plasma 5
Preliminary Matters (The Fine Print) Page 2 of 2
ESD (Electrostatic Static Discharge)Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage the electronics in a manner that renders them inoperative or reduces the time until their next failure. Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively, you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before removing a replacement part from its package, touch the anti-static bag to a ground connection point orremoving a replacement part from its package, touch the anti static bag to a ground connection point or unpainted metal in the product. Handle the electronic control assembly by its edges only. When repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.
l fRegulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful g p p ginterference when the equipment is operated in a residential installation. This equipment generates, uses, and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user isradio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna; Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help.
June 2011 42PW350 Plasma 6
Safety & Handling Regulations
Safety and Handling, Checking Points
1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3. Always adjust to the specified voltage level (+/- ½ volt) unless otherwise specified.
f f S4. Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supplyand Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertically NOT horizontally.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful p g pwith lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts. Be extremely careful when moving the set around as damage can occur.
1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
Checking Points to be Considered
June 2011 42PW350 Plasma 7
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.
Basic Troubleshooting Steps
Define, Localize, Isolate and CorrectDefine, Localize, Isolate and Correct
• Define Look at the symptom carefully and determine what circuits could be causing the failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check for possible overheated components. Capacitors will sometimes leak dielectric material and p p pgive off a distinct odor. Frequency of power supplies will change with the load, or listen for relay closing etc. Observation of the front Power LEDs may give some clues.
• Localize After carefully checking the symptom and determining the circuits to be checked y g y p gand after giving a thorough examination using your senses the first check should always be the DC Supply Voltages to those circuits under test. Always confirm the supplies are not only the proper level but be sure they are noise free. If the supplies are missing check the resistance for possible short circuits.p
• Isolate To further isolate the failure, check for the proper waveforms with the Oscilloscope to make a final determination of the failure. Look for correct Amplitude Phasing and Timing of the signals also check for the proper Duty Cycle of the signals. Sometimes g g p p y y g“glitches” or “road bumps” will be an indication of an imminent failure.
• Correct The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
June 2011 42PW350 Plasma 8
y j y yperform a Safety AC Leakage Test before returning the product back to the Customer.
42PW350 PRODUCT INFORMATION SECTION
This section of the manual will discuss the specifications of the 42PW350 Advanced Single Scan Plasma Display Television.
June 2011 42PW350 Plasma 9
42PW350 Specifications
720P PLASMA HDTV42" Class (41.6" diagonal)
• 3D Capable TV1
• 2D to 3D Conversion
• TruSlim Frame
• 600Hz Max Sub Field Driving• 600Hz Max Sub Field Driving
• High Definition Resolution
• ENERGY STAR® Qualified
For Full SpecificationsSee the Specification Sheet
• Picture Wizard II
• Intelligent Sensor
S t E S i• Smart Energy Saving
• ISFccc® Ready
June 2011 42PW350 Plasma 10
42PW350 Logo Familiarization Page 1 of 3
HD RESOLUTION 720P HD R l ti Pi l 1365 (H) 768 (V)HD RESOLUTION 720P HD Resolution Pixels: 1365 (H) × 768 (V)See and experience more. Pictures are sharper.Colors are more vibrant. Entertainment is more real. Everything looks better on an HDTV.
HDMI (1.3 Deep Color) Digital multi-connectivity HDMI (1.3 Deep color) provides a wider bandwidth (340MHz, 10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors, and also drastically improves the data-transmission speed.
Invisible SpeakerPersonally tuned by Mr. Mark Levinson for LG TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system
y p p
TAKE IT TO THE EDGE newly introduces Invisible Speaker system, guaranteeing first class audio quality personally tuned by Mr. Mark Levinson, world renowned as an audio authority. It provides Full Sweet Spot and realistic sound equal to that of theaters with its Invisible Speaker.
Dual XD EngineRealizing optimal quality for all imagesOne XD Engine optimizes the images from RF signals as another XD Engine optimizes them from External inputs. Dual XD Engine presents
June 2011 42PW350 Plasma 11
images with optimal quality two times higher than those of previous models.
42PW350 Logo Familiarization Page 2 of 3
600Hz Sub Field Firing:600Hz Sub Field Firing:Capture every moment. Tired of streaky action or unclear plays during the game? See sports, fast action and video games like never before. The 600Hz refresh rate virtually eliminates motion blur.
3.000,000 : 1 Contrast RatioStunning detail. No more worrying about dark scenes or dull colors. The Mega Contrast ratio of 3,000,000:1 delivers more stunning colors and deeper blacks than you can imagine.
TruSlim Design:At l th 1" thi k th T Sli F t i di t ti ith tAt less than 1" thick the new TruSlim Frame trims away distraction without compromising screen size.
USB 2.0:View videos and photos and listen to music on your TV through USB 2.0.
June 2011 42PW350 Plasma 12
42PW350 Logo Familiarization Page 3 of 3
AV Mode "One click" Cinema, Sports, Game mode., p ,AV Mode is three preset picture and audio settings. It allows the viewer to quickly switch between common settings. It includes Cinema, Sports, and Game Modes.
Clear Voice Clearer dialogue sound Automatically enhances and amplifies the sound of the human voice frequency range to provide high-quality dialogue when background noise swellsnoise swells.
Save Energy, Save MoneyIt reduces the plasma display’s power consumption.The default factory setting complies with the Energy Star requirements
S E S M
The default factory setting complies with the Energy Star requirements and is adjusted to the comfortable level to be viewed at home.(Turns on Intelligent Sensor).
Save Energy, Save MoneyHome electronic products use energy when they're off to power features like clock displays and remote controls. Those that have earned the ENERGY STAR use as much as 60% less energy to perform these functions, while providing the same performance at the same price as less-efficient models. Less energy means you pay less on your energy
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t e sa e p ce as ess e c e t ode s ess e e gy ea s you pay ess o you e e gybill. Draws less than 1 Watt in stand by.
(600 Hz Sub Field Driving)
600Hz Sub Field Driving
• 600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process (vs. Comp. 8 sub-field/frame)
• No smeared images during fast motion scenes
Original Image 10 Sub Fields Per Frame
June 2011 42PW350 Plasma 14
Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.
42PW350 Remote Control
TOP PORTION
BOTTOM PORTIONp/n AKB72914273
June 2011 42PW350 Plasma 15
42PW350 Rear and Side Input JacksSIDE
INPUTS
USB for Music, Photos and Software
UpgradesAC In Upgrades
REARREARINPUTS
USB
HDMI 3
Composite Video/Audio
June 2011 42PW350 Plasma 16
Generic Plasma USB Automatic Software Download Instructions1) Download the Software File.
Currently Installed Version
Software Version found on the USB Flash Drive
2) Copy new software (xxx.bin) into the root of the Jump Drive. Make sure you have the correct software file
File found on the USB Flash Drive
software file.3) With TV turned on, insert USB flash drive.4) You can see the message
“TV Software Upgrade” (See figure on right)5) Cursor left and highlight "START" Button and Highlight Start Press Select
push “Enter” button using the remote control. 6) You can see the download progress Bar.7) Do not unplug until unit has automatically
restarted.8) When download is completed you will see
Highlight Start Press Select
8) When download is completed, you will see “COMPLETE”.
9) Your TV will be restarted automatically.* CAUTION: Do not remove AC power or the USB Flash Drive. Do not turn off Power, during the upgrade process.
June 2011 42PW350 Plasma 17
Software Files (when available), can be downloaded from GCSC or GSFS.com
Accessing the Service Menu
To access the Service Menu.1) You must have either Service Remote. )
p/n 105-201M or p/n MKJ391708282) Press “In-Start”3) A Password screen appears.4) Enter the Password.)
Note: A Password is required to enter the Service Menu. Enter; 0000Se ce e u te ; 0000
Note: If 0000 does not work use 0413.
June 2011 42PW350 Plasma 18
MKJ39170828105-201M
2"50.8mm
9.1/8"231.1mm
42PW350 Dimensions
24-3/16"614.68mm
39"990.6mm
Remove 4 screws to remove stand for wall mount
Model No.Serial No.
Label
19-1/8"485mm
26.5/16"668.02mm
4-11/16"119mm
2-1/8"53.34mm
15-3/4"400mm
15-3/4"400mm
47.4 lbs with Stand41.1 lbs without StandWeight:
There must be at least 4 inches of Clearance on all sides
Max Watts 160WTypical: 125W0.2 Watts (Stand-By)
Power Consumption:
3-7/8"98mm
19 June 2011 42PW350 Plasma
3-11/16"93m
11-9/16"293.5mm
Center12-1/8"
307.34mm
19-1/2"495.3mmCenter Center
Center
SERVICE AND ADJUST MENU ITEMS
This section of the manual will discuss the Service Menu and the Adjust MenuIn the 42PW350 Advanced Single Scan Plasma Display Panel.In the 42PW350 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a betterunderstanding of the Service and Adjust Menus used in this model.
June 2011 42PW350 Plasma 20
1. Country Group (Press OK to Save) Country Group Code Country Group Country2. Tool Option Tool Option 1 Tool Option 2 Tool Option 3 Tool Option 4 Tool Option 53. Adjust White Balance:4. Adjust ADC: 480i Component 1080p Component RGB5. EDID(AC3): RGB HDMI1 HDMI2 HDMI3
02USUS
3277765
7519756014925
OK OK
OKOKOK
OKOK (0x5E)
OK (0x12,0xD2)OK (0x12,0xC2OK (0x12,0xB2
IN STARTModel Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
Adjust Check
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
42PW350 Service Menu First Page
21 June 2011 42PW350 Plasma
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
Software Version
Video ProcessorChip Type
Control Board Software Version
Unit Total Time
Country Group
Priority AudioMode
0. POWER_OFF_BY_LOCAL_KEY1. POWER_OFF_BY_ACDET2. POWER_OFF_BY_REMOTE_KEY13. POWER_OFF_BY_LOCAL_KEY4. POWER_OFF_BY_ACDET5. POWER_OFF_BY_ACDET6. POWER_OFF_BY_ACDET7. POWER_OFF_BY_SW_DL8. POWER_OFF_BY_ACDET9. POWER_OFF_BY_LOCAL_KEY10. POWER_OFF_BY_LOCAL_KEY11. POWER_OFF_BY_REMOTE_KEY112. POWER_OFF_BY_REMOTE_KEY113. POWER_OFF_BY_ACDET14. POWER_OFF_BY_ACDET15. POWER_OFF_BY_LOCAL_KEY16. POWER_OFF_BY_LOCAL_KEY17. POWER_OFF_BY_LOCAL_KEY18. POWER_OFF_BY_LOCAL_KEY19. POWER_OFF_BY_REMOTE_KEY120. POWER_OFF_BY_REMOTE_KEY121. POWER_OFF_BY_ACDET22. POWER_OFF_BY_SW_DL23. POWER_OFF_BY_LOCAL_KEY
IN START Power Off Status
INSTOP (Instop Button on Serv. Remote)SW_DL (Software Download)AUTO_OFF (No Signal Time Out)OFF_TIMER (Auto Timer Off)
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
Select Item 3
LOCAL_KEY (Key Board Power)REMOTE_KEY1 (Remote Power)ACDET (Loss of AC Power)SW_DL (Software Download Restart)
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
42PW350 Power Off Status (IN START) Screen
22
Most Recent
June 2011 42PW350 Plasma
CODE EXPLANATIONPOWER_OFF_BY_CPUCMD Power off by CPU Command POWER_OFF_BY_ABN Power off by abnormal statusPOWER_OFF_BY_KEYTIMEOUT Power off when TV is not turned off during a certain time
POWER_OFF_BY_ACDET Power off by not detecting AC (abnormal case) POWER_OFF_BY_RESET Power off by Micom Reset POWER_OFF_BY_5VMNT Power off by not detecting 5V monitoring POWER_OFF_BY_NO_POLLING Power off when receiving no acknowledge
POWER_OFF_BY_REMOTE_KEY Power off by remote keyPOWER_OFF_BY_OFF_TIMER Power off by Off timer POWER_OFF_BY_SLEEP_TIMER Power off by sleep timer
POWER_OFF_BY_FAN_CONTROL Power off by fan control (Not Used)POWER_OFF_BY_INSTOP_KEY Power off by InStop KeyPOWER_OFF_BY_AUTO_OFF Power off by auto off function POWER_OFF_BY_ON_TIMER Power off by On timer
POWER_OFF_BY_RS232C Power off by RS232C command POWER_OFF_BY_SWDOWN Power off by software download POWER_OFF_BY_LOCAL_KEY Power off by local key
POWER_OFF_BY_CPU_ABNORMAL Power off by CPU Abnormal status POWER_OFF_BY_INV_ERROR Power off by LCD module inverter error (LCD Only)POWER_OFF_BY_SW_DL Power off by Soft Ware update POWER_OFF_BY_UNKNOWN Power off by the other causes
42PW350 Power Off Status Details
23
(Not Used)
June 2011 42PW350 Plasma
42PW350 Lip Sync Adjust (IN START) Screen
24 June 2011 42PW350 Plasma
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
0. Baudrate1. 2 Hours Off (On Timer)2. 2 Hours Off (Screen Mute)3. 15Min Force Off4. Audio EQ5. Dynamic EQ6. A2 Threshold7. HDMI Sound(Port1)8. Lip Sync Adjust(DTV)9. Dimming10. Tuner Option11. Atten RF Signal12. UTT Reset13. Channel Mute14. Debug Status15. NVRAM Type16. HDEV17. Blue back18. China Cable SO19. Booster On (VHF)20. Booster Off (VHF)21. Booster On (UHF)22. Booster Off (UHF)
IN START SYSTEM 1115200
OnOffOnOnOn11
HDMI Port10
OnEnhanced Ghost
OffReset
OnRELEASEEEPROM
OffOnOn0000
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
SelectItem 4
SelectItem 8
-10 to 20
42PW350 UTT Reset (IN START) Screen
25 June 2011 42PW350 Plasma
0. Baudrate1. 2 Hours Off (On Timer)2. 2 Hours Off (Screen Mute)3. 15Min Force Off4. Audio EQ5. Dynamic EQ6. A2 Threshold7. HDMI Sound(Port1)8. Lip Sync Adjust(DTV)9. Dimming10. Tuner Option11. Atten RF Signal12. UTT Reset13. Channel Mute14. Debug Status15. NVRAM Type16. HDEV17. Blue back18. China Cable SO19. Booster On (VHF)20. Booster Off (VHF)21. Booster On (UHF)22. Booster Off (UHF)
IN START SYSTEM 1115200
OnOffOnOnOn11
HDMI Port10
OnEnhanced Ghost
OffReset
OnRELEASEEEPROM
OffOnOn0000
Scroll to (UTT Reset)
Press (Select)Reset changes to Doing
then back to Reset
Scroll to (System 1)
thenRight Cursor
After Reset (Doing) has completed, Reset returns.After Exit the UTT Timer is
“0”
Note: After UTT is reset, the UTT time on the left will not reset to “0” until the Service Menu is exited.
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
ChangesTo “Doing”Unit’s Total Time
SelectItem 4
SelectItem 12
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
IN START1. AV/PC2. ISM3. Gamma4. Power Save5. APS Contrast6. OrbitPixel7. OrbitStep8. OrbitTime9. MRE(FMC)10. DPS211. GRP12. Module OSD13. Module XDP14. Formatter XDP15. Reset Use Time
Module Name:Rom Ver.Temperature:
Panel ControlAV
Auto0
Mode 0952
2 step120 sec.
OffOffOff0
OnOn
42PW350 Service Menu: Panel Control Shows Control Board Information
26 June 2011 42PW350 Plasma
At the bottom right you can see the Panel Model Number, Control board Software Version and the Panel Temperature.
42T342T3_4PV3A025.00 Celsius
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
UTT Reset
Unit’s Total Time
SelectItem 10
Cursor Right to activate.Yes or No will appear.
UTT will not change until “In Start” key is pressed. Panel
Temperature
CTRL. Board ROM Version
Panel Model Number
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
27 June 2011 42PW350 Plasma
42PW350 Model Number Download Screen
1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
0. Model Name1. Serial Num.
Model Number D/L
Press OK to Save
42PW350-UA
Bring up the Service Menu using the Service Remote by pressing “In-Start” enter password 0413 or 0000.
Scroll down to item 6. Model Number D/L to highlight.Press “ENTER” or “Cursor Right”.
IN START
010PTZK1F285
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
To Change the Model Number:1) Use the cursor right or left to select the area to change. 2) Use the cursor up or down to change.3) When Model Number is correct, Press “ENTER” to Save4) Cursor right until there is no text cursor blinking.5) Cursor down to highlight “Serial Number” 6) Cursor Right to place blinking cursor under the first location and change (as in Item 2 above).5) Press “ENTER” to SaveNote: To return to the Model Number, Cursor right until there is no text cursor blinking and press the Up Cursor on the Remote. Cursor Right to place blinking cursor under the first location
When the Main Board is replaced, the Model Number and Serial Number must be corrected. Follow these instructions
SelectItem 6
Note: The Model and/or Serial No. will not change until you press the “In-Start” button
after any change has been made.
42PW350 Power Error History (IN START) Screen
28 June 2011 42PW350 Plasma
IN START1. Adjust Check2. ADC Data3. Power Off Status4. System 15. System 26. Model Number D/L7. Test Option8. External ADC9. Pattern Selection10. Panel Control11. Spread Spectrum12. Sync Level13. Stable Count14. ODC Test15. Power Error History
Model Name: 42PW350-UASerial Number: 010PTZK1F285S/W Version: MICOM VersionSPI Boot VersionBOOT VersionTouch VersionEDID Version (RGB)EDID Version (HDMI)Chip Type3D ASIC VersionDebug StatusModule Rom Ver: RF Emitter Versioni
UTT : 12APP History Ver.:53810PQL DB:LGE_PG_LGT10_xxN42
: 03.26.02.11: 3.24.0: 4.24.00: 0.01.17: 0.05 (0x00): 0.01: 0.01: SATURN 7: 0.77: RELEASE: 42T3_4PV3A0: VB091
1. Last History:2. Last History:3. Last History:
4. Error Count
POWER ERROR HISTORY
VA UVPVS OCPNONE
1) PFC_DET Error2) 5V OVP3) 5V UVP4) 17V OVP5) 17V UVP6) M5V OVP7) M5V UVP8) Vs OCP9) Vs OVP10) Vs UVP11) Va OVP12) Va UVP
5. Reset All
ffffffffffffff1ffffff1
PFC_DET: Power Factor Control DetectOVP: Over Voltage ProtectOCP: Over Current ProtectUVP: Under Voltage Protect
Bring up the Service Menu using the Service Remoteby pressing “In-Start” enter password 0413 or 0000.
SelectItem 15
Service Menu: Downloading EDID Data
1) Press “ADJ” key.If Item 5 on Adjust Check in the 1st page of the Service Menu
When Item 10 was selected
If Item 5 on Adjust Check in the 1st page of the Service Menu shows AC3, this shows NG.
If NG was shown, highlight “Start” and press “Select” on the
If Item 5 on Adjust Check in the 1st page of the Service Menu shows EDID PCM this shows OK(PCM)
Password requiredTo enter ADJ Menu
, g g premote.“Writing” appears, then OK/(PCM) shows here. Now Item 5 on Adjust Check in the 1st page of the Service Menu shows “EDID PCM”.
If “R t” i l t d “E i ” ill d th thi hIf “Reset” is selected, “Erasing” will appear and then this shows “NG”.
When Item 11 was selected
If Item 5 on Adjust Check in the 1st page of the Service Menu shows PCM, this shows NG.
If NG h hi hli ht “St t” d “S l t“ th
If Item 5 on Adjust Check in the 1st page of the Service Menu shows EDID AC3 this shows OK(AC3)
If NG was shown, highlight “Start” and press “Select“ on the remote.“Writing” appears, then OK/(AC3) shows here. Now Item 5 on Adjust Check in the 1st page of the Service Menu shows “EDID AC3 ”.
Note: PCM is changed from NG to OK/(PCM) then AC3 will now be “NG”.
June 2011 42PW350 Plasma 29
If Reset is selected, “Erasing” will appear and then this shows“NG”.
Note: AC3 is changed from NG to OK/(AC3) then PCM will now be “NG”.
Accessing the Host Diagnostic Screen (Page 1 of 2)
1) Place Television on the digital channel that
Use the Host Diagnostic screen to investigate the signal quality of a problem channel.
2) Bring up the Customer’s Menu. Highlight “CHANNEL”. Press “ENTER” on the remote.
4) Press the (1) Key 5 times. The Host Diagnostics screen appears.
) gmay be showing problems.
3) The “CHANNEL” Menu appears. See next page for details.
June 2011 42PW350 Plasma 30
Host Information
Memory
Host Release Version
FAT Status (Main)
Current Channel (Main)
Current TemperatureMODULE Temperature: 34.5 Celsius
Channel Info : Digital 19-1
Parental Control : Channel is not blocked
Host Diagnostics
Model Name : 42PW350-UA (Plasma Display)
FLASH : 131072 KBDRAM : 262144 KBNVM : 128 KB
Firmware Version(MP) : 3.26.02.11(53810)Micom Version : V3.24.0Compile Date & Time : 20110131 & 08:45:52Compile User : sunbon.koo
Center Frequency : 663.00 MHzPCR lock : LockedModulation mode : QAM 256Carrier lock status : LockedSNR : 37 dBSignal level : 100%
Exit
31
42PW350 Understanding the Host Diagnostic Screen (Page 2 of 2)
June 2011 42PW350 Plasma
DVI/HDMI StatusCan’t display this information now
Half Page Move Page ExitCH
Channel Selected Blocked or
Not Blocked
Software Version
ChannelFrequency
Program Clock Reference (Locked or No)Channel Type (8VSB, QAM 64, 256)
Channel (Locked or No)
Channel Signal Level (Above 80% good)
8VSB (Above 20 is good)QAM 64 (Above 24 is good)QAM 256 (Above 30 is good)
Channel Signal to Noise Ratio
ModelNumber
PanelTemperature
F = 9/5 (C+32)
3D SECTION AND 3D TROUBLESHOOTING
This section will give you an understanding of 3D as it relates to Televisions.
This section also includes 3D troubleshooting.troubleshooting.
Note: The 3D Glasses must be matedTo the Television so that multiple TVsCan operate in the same room with different glasses synchronized to the correct TV
HOW TO CONNECT THE 3D GLASSES
When initially switched on the device will automatically be connected to the TV with the
Can operate in the same room with different glasses synchronized to the correct TV.
When initially switched on, the device will automatically be connected to the TV with the strongest signal.
HOW TO RECONNECT THE 3D GLASSES
Press the power button for over eight seconds.
Release the button when the green LED light turns on. Then, you will see the green light blinkthree times before the device is switched off. If you switch the power on again, the glasses will
June 2011 42PW350 Plasma 32
be connected to the TV or PROJECTOR with the strongest signal.
Each eye looks at an image from slightly different angles. Therefore, the brain takes these two different images and translates them into one image giving us depth perception. This is difficult to reproduce on a 2 dimensional screen We ha e to come p ith a scheme that ill allo s to see the same image from
3D Fundamentals (What is 3D?) From the Human Perspective
2 dimensional screen. We have to come up with a scheme that will allow us to see the same image from two different angles giving us 3D effects.
If the two images were added together without the
Note: The Left and Right eye are actually seeing the same image but from a different angle, but for this explanation one is shown inverted from the other for clarity purposes simply to show there is a difference
g gbrain doing the calculations to combine them, they would appear out of focus.
June 2011 42PW350 Plasma 33
explanation one is shown inverted from the other for clarity purposes simply to show there is a difference between the two images seen by each eye.
Each Camera looks at an image from slightly different angles. Each camera generates it’s own video, we’ll call “Left Camera View” and “Right Camera View”. The Frame packing adds both of these videos together as described in the “3D Broadcasting” page
3D Fundamentals (What is 3D?) From the Electronic Perspective
together as described in the “3D Broadcasting” page.
Original Image
Left Camera View
Right Camera View
The two videos are separated by the Frame rate converter in the Television and put on the screen. The first horizontal line is the Left Camera view
Both Videos arePacked together
Note: The Left and Right Cameras are actually seeing the same image but from a different angle, but for this explanation one is shown inverted from the other for clarity purposes simply to show there is a
The first horizontal line is the Left Camera view and the 2nd line is the Right camera view. 3rd line is Left, 4th is Right and so on.
Packed togetherFor transmission.
June 2011 42PW350 Plasma 34
this explanation one is shown inverted from the other for clarity purposes simply to show there is a difference between the two images seen by each camera.
3D Formatter- All Formats of input are available and converted by 3D technology- Full HD input available
3D Formatter
u put a a ab e- 3D Enhancement
3D Formatter2DRegular 2D
3D F t (F P k d)2D 3D to 2D
HDMI 1.3 / HDMI 1.4Input Capabilities
No glasses requiredOutput Capabilities
1) Side by Side R
L 2) Frame by Frame
or3D Formats (Frame Packed)
2) Top and Bottom
3) Checkerboard
Plasma (Active)
Synchronization required between glasses and TV
4) Frame Sequential(Full Resolution available)
R
L
HDMI 1.4 (Only)R
5) Over/UnderL / R represents;Left Camera View
Right Camera View
June 2011 42PW350 Plasma 35
LRight Camera View
3D for All types of broadcasting signals1. Input of broadcasting signal
HDBroadcasting
SDBroadcasting
OnlineVideo
LG 3D TV 3D broadcasting
2. Press “3D” button for mode change3. Select type of input source, 4. Press “ENTER”.5. In case 3D looks *abnormal, press “3D Settings”
in the “Quick MENU”.*Abnormality may be caused by reversed L/R
Input
Input
Input
USBComponentC it
(1)
HDMIC tAbnormality may be caused by reversed L/R
order of the input signal. If TV already in Left/Right change to Right/Left or vice versa.
USBPortComposite
RF, S-VideoComponent
RF
(2)
Top & Bottom
(4)(3)
(5) (5)
2D to 3D Side by Side CheckerBoard
Single frame Sequential
Bottom
June 2011 42PW350 Plasma 36
Note: Picture behind the menu is showing a side by side format.Note: HDMI 1.4 will automatically select 3D type for you.
Shutter glasses type 3D: Separating left and right images by synchronizing the TV and the glasses
3D Active Glasses Type3D Active Glasses Type
Fundamentals of Shutter glasses
< Shutter glasses 3D >Between Frames
Left Eye viewing left camera shot
Between Frames
Right Eye viewing right
Frames
The image is broadcast using two different viewing angles every other frame.
The 3D Glasses are then synchronized with the two different images to give the 3D effect.
viewing right camera shot
June 2011 42PW350 Plasma 37
They are blanked between scene changes.
Convenient 2.4GHz RF Transmitter built-in to TV
LG RF 3D Emitter & Glasses
• Wider viewing angle• Longer Viewing distance• Longer battery life
(1.5h charging / 40h battery life)• Improved sync performance
2~7 Meter Viewing Distance (6.5 ft~ 22.9 ft)Maximum 10 Meter (32.8 ft)
User friendly Glasses1) L-frame for glasses users2) UV coating to prevent scratch
600
600
7m
3) LED indicator for user convenience4) Easy to Recharge with USB port
(Note: Glasses will work while being charged)5) Adjustable Nose Piece for comfort
RF TransmitterLocation
AG-S250
June 2011 42PW350 Plasma 38
B tt
Active RF glasses 3D TV components
Battery
40Hr. Charge
USB Charge Port(8-pin mini USB)
1Hr. 50min Charge Time
AG-S2500.80mA/h
RF Receiver
*TN LCD shutter3D Sync signal
Shutter Actuator circuit board
Twisted State light passes O St t li ht bl k d
RF Syncsignal
TV with built in
light passes On State light blocked
*TN CD hTV with built in RF Transmitter
*TN = Twisted Nematic*TN LCD shutter
June 2011 42PW350 Plasma 39
3D settings may help with 3D view pleasure.1 In case 3D looks *abnormal press “3D Settings”
3D Settings Menu
1. In case 3D looks abnormal, press 3D Settings in the “Quick MENU”.
3D Picture Size: Cuts off the outer edges of the picture and stretch it to fit the full screen in 3D mode.
3D Depth: Adjusts the distance between the object and the background in the picture to enhance the 3D effect in 2D to 3D mode.
3D View Point: Brings the picture (including both the object and background images) to the front or back to enhance the 3D effect in 3D mode.
(1)3D Picture Balance: Adjusts the color and brightness difference between the right and left sides of the picture in 3D mode.
3D Picture Correction: Changes the order of images in the right and left sides of the picture in 3D mode.
June 2011 42PW350 Plasma 40
VIEWING CONDITIONS Maximum Optimum
3D Video viewing range and Compatible 3D Formats
ViewingDistance
7 m(22.9 ft)
2 m - 10 m(6.5 ft - 32.8 ft)
ViewingAngle 120º (When the viewing distance is 2 m (6.5 ft)
Signal Resolution HorizontalFrequency kHz
VerticalFrequency Hz Playable 3D video format
44 96 / 45 Top & Bottom Side by Side (*Also Component & DTV)
Accepted 3D Formats
HDMI
*720P 1280X72044.96 / 45
59.94 / 60Top & Bottom, Side by Side ( Also Component & DTV)
89.9 / 90.0 HDMI (V1.4 with HDMI 3D Frame Packing*1080i 1920X1080 33.72 / 33.75 59.94 / 60 Top & Bottom, Side by Side (*Also Component & DTV)
67 432 / 67 5 59 94 / 60Top & Bottom, Side by Side
Checker BoardHDMIInput
1080p 1920X1080
67.432 / 67.5 59.94 / 60 Checker BoardSingle Frame Sequential
27 24 Top & Bottom, Side by Side, Checker Board
53.95 / 54.00 23.98 / 24.00 HDMI (V1.4 with HDMI 3D Frame Packing
33.75 30 Top & Bottom, Side by Side, Checker Board
USBInput 1080p 1920X1080 33.75 30 Top & Bottom, Side by Side
Checker Board, MPO (Photo)
Additional HDMI 1.4V Information.
June 2011 42PW350 Plasma 41
1) 3D Auto Detection (LG Does Support 2) Ethernet Capabilities (LG Does Not Support)3) Return Audio (LG Supported using SIMPLINK®) 2011 Models only.
42PW350 3D Troubleshooting Flow Chart Page 1 of 3
42 June 2011 42PW350 Plasma
OK
Check 3D/Motion Remote RF Transmitter Board Connector pin 1 : (3.3V) NG
Replace Main board
Cable Open
Red Power LED should stay on solid for about 3 sec. then go off. When power button is pressed for Power Off, the LED will blink 3 times.Note 1: The Red LED will blink constantly for 1 minute if battery is discharged.Note 2: Glasses can operate using the USB connector plugged in if batteries are not charged.
Make sure the 3D Glassesare charged
Change the 3D GlassesAG-S250
No glasses sync
Continued on next page.
Check for 60Hz sync signal on pin 12 of P1404 NG
Check 3D Sync. It is output from IC1400 directly to the Front side of Board R1572 P1404 Pin 12 . Also Check ZD1408NG
No 3D
If you are having trouble seeing 3D, Try changing the 3D selection types if it is difficult to determine what format the 3D movie is in. Example: Top/Bottom, Side by Side, Checker Board, Frame Sequential.Make sure you are using at least version 1.3 HDMI cable. (1.4 HDMI will auto select).
Play a 3D Movie
A simple test is to hold the glasses about 1 ft. in front of you towards a white sheet of paper. The TV must be playing a 3D movie and be in the 3D mode. If the glasses sync up the paper will appear as looking through normal sun glasses, if not synced, the paper will appear amber in color.
Don’t forget to try swapping the L/R selection by pressing the “Quick Menu” button on the remote control.Charged
NoChange
Note: Motion Remote/3D Tx board connector has no ID
Check +3.3V for the Motion Remote board. P1404 Connector 1 pin : 3.3V
OK
NGNG
Replace Main board
OK
3.48V p/p60 Hz
1.59VDC
Glass turn off in 1 Min. with no 3D sync.Glasses turn off in 10 Min with no movement.
Check +3.3VRegulator IC506
EBT61267425EBR72942901EBR71638619
Note: R1572 and ZD1408 are directly to the right of P1404.
42PW350 3D Troubleshooting Flow Chart Page 2 of 3
43 June 2011 42PW350 Plasma
Continued from previous page
Check for 60Hz sync to the 3D sync / Motion Remote board. Connector pin 12
NG Cable Open
Should be
Note: Motion Remote board Connector has no ID
OK
Check P1404 Connector pins 9, 10, 11(See Chart) Pin 9 or 10 should be high
OK
Check 3D / Motion RemoteConnector pins 9, 10, 11
RF Freq GPIO 0 (9) GPIO 1 (10) GPIO 2 (11)3D Disable 0 0 0
60Hz 1 0 059.94Hz 0 1 0
NGReplace Main board
OK
Replace 3D / Motion Remotep/n: EBR72499601
See next page for additional details
Note: If all are low, make sure you are in 3D Mode on the Television
3.48V p/p60 Hz
1.59VDC
Check 3D_SYNC LineControl P106 pin 79
Check 3D_SYNC LinePin 12
Control Board
42PW350 3D Sync Troubleshooting Flow Chart Page 3 of 3
44 June 2011 42PW350 Plasma
Continued from previous page
3D_SYNC straight from the MCM (IC702) chip.
Check 3D_SYNC LineMain P1402 pin 2
3D_SYNC pin 12
To R1572
3D_SYNC straight from (IC3202) chip.
Note: The 3D sync on the LVDS cable is not the same as the 3D_SYNC route shown on
the Main board. This is just a TP.
GPI0 – 1 (pin 9, 10, 11)
Pin 9 or 10should be high
3.48V p/p60 Hz
1.59VDC
3.48V p/p60 Hz
1.59VDC
Connector has no ID
CONTROL BOARDP/N: EBR71200701
X125 MHz
IC702MCM
IC101
IC701
IC22SerialFlash
D1
IC703L1
P105
P107 P108 P22 n/c
Auto Gen
VS_DA
P2
P106
IC53
IC11
3.3V from IC53Pins 41~43
n/c Upgrades
3.3V from IC53Pins 8~10
4.94V
1.05V
1.06V
1.05V
3.3V 1.8V
1.8V On
3.31V
3.27V
12
32
12
32
1 2
3
DDRMemory
3D-SyncPin 50
3.48V p/p 60 Hz
IC101Micro/Video
Processor
P1401
IC1400
P902
12
32
P14041
23
2
IC1401
IC700
P700
12
32
IC1406
IC506
IC504
IC1407
IC1202
1 2 3
123
IC600
IC507
IC1404
L1402
IC502
L503
Q501
L506
IC1201
A2 A1
C
D200
IC103
Q901
L502
Q1401
C
B
E
C
B
E
Q1402
X1400
C
BE
Q1400
P501
X200
24MhzL700L701
L702
L703
R-R+L-L+
D501
IC501
TUNER
MAIN BOARDp/n: EBT61267425 AUSLLJR
Other Main Boards used
p/n: EBR72942901 AUSLLHR
C
B E
D
S
G
24Mhz
18. IF p17. IF n16. IF AGC15. Reset14. 3.3V13. 1.26V12. GND11. CVBS10. NC 9. SIF
8. NC 7. SDA 6. SCL 5. NC 4. NC 3. 5V
2. NC 1. NC
TU1300
3D Formatter
+3.3V Regulator
P1401LVDS
P106LVDS
Motion Remote Board
Pin 12 3D-Sync R1572 Front side of Board
3.48V p/p60 Hz
1.59VDC
DISASSEMBLY SECTION
This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 42PW350 Advanced Single Scan Plasma Display Panel.Board Identification, of the 42PW350 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a betterunderstanding of the disassembly procedures, the layout of the printedcircuit boards and be able to identify each board.circuit boards and be able to identify each board.
June 2011 42PW350 Plasma 45
Removing the Back Cover
To remove the back cover, remove the 29 screwsIndicated by the arrows.
(The Stand does not need to be removed).
PAY CLOSE ATTENTION TO THE TYPE SIZE AND LENGTHPAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTHOf the screws when replacing the back cover.
Improper type can damage the front.
June 2011 42PW350 Plasma 46
Identifying the Circuit BoardsIdentifying the Circuit BoardsCircuit Board Layout
Panel Voltage and Panel ID Label
FPCFPC
FPC
Y-SUS Z-SUSPower Supply
(SMPS)FPC
Y-Drive
Main Board
FPC
FPC
Z-SUB
F
e Board
ControlMain Board
TCPHeat Sink Side
Input
FPCFPCFPC
Right “X”Left “X”AC In (part of
main)
IR/LED Soft TouchMotion Remote andInvisible Invisible
June 2011 42PW350 Plasma 47
Board Keypad Motion Remote and 3D Emitter (RF)
InvisibleSpeaker
InvisibleSpeaker
SC101L N
P813
SMPSPOWER SUPPLY
Boardp/n: EAY62170901
Top row OddBack row Even
P811 Z-SUSBoard
P7
p/n: EBR68342001
P2
P6
42PW350 Connector Identification Diagram
48 June 2011 42PW350 Plasma
RIGHT X Board
Speaker (Front Right)
P100
Front “Soft Switch” Key Pad
FRONT IR
P201
P101
P107
CONTROLBoard
P1401
P902P1404
MAINBoard
P232P211LEFT X Board
P211P106
P204
P205
P206
P201
P202
P303
Y-SUSBoard
Y-DRIVEBoard
P106
Speaker (Front Left)
P105
P108
Z-SUB Board
p/n: EEBR68341901
p/n: EBR68288401
p/n: EBR68019901
p/n: EBR72942901 AUSLLJRp/n: EBT61267425 AUSLLHR
p/n: EAB62028901
p/n: EBR72499601p/n: EBR72650101
P331 P311
P206
P501P2
P163n/c
P4
P203
PANEL
p/n: EBR68342501
P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306
EAJ61527706 PDP42T30000.ASLGBEAJ61527743 PDP42T30000.ASLGM
p/n: EBR71200701
p/n: EBR68020001
MOTION REMOTE/3D EMITTER
p/n: EAB62028901
P212P102
P213P101P3
AC In
LVDS
P312
P202
P101
P103
P22n/c
P700
p/n: EBR71638619 Interchangeable
MAINBOARDS
S it h M d P S l B d R lNote: 1) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.
Disassembly Procedure for Circuit Board Removal
Switch Mode Power Supply Board Removal
Disconnect the following connectors: P811, P813 and SC101.Remove the 6 screws holding the SMPS in place.Remove the board. When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label Also re confirm VSC Vy and Z Bias as wellLabel. Also, re-confirm VSC, -Vy and Z-Bias as well.
Y-SUS Board RemovalDisconnect the following connectors: P206, and Ribbon Cable P101.To remove P101, lift up on the locking mechanism and pull the ribbon cable out.Remove the 8 screws holding the Y-SUS in place.Remove the Y-SUS board by lifting slightly upward (to clear standoff collars) and then to the right while gently prying apart P211~213. When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm -Vy and Z-bias as well.
Y-Drive Board Removal
Confirm Vy and Z bias as well.
Disconnect P101~P106 Connectors to the Panel Remove the 3 screws holding the Y-Drive board in place.
Board Standoff
g pLift up slightly (to clear standoff collars), then slide to the left while gently prying apart P101, P102 and P106. Remove the Y-Drive Board.
Collar
Note: Y-SUS, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar. Th b d t b lift d li htl t l th ll B hi d h b d “Ch l t ” (d bb
June 2011 42PW350 Plasma 49
The board must be lifted slightly to clear these collars. Behind each board are “Chocolate” (dense rubber like material) that act as shock absorbers. They may make the board stick when removing.
Z-SUS Board Removal
Disassembly Procedure for Circuit Board Removal (2)
Disconnect the following connectors: P2 and P7, then P6 by flipping up the locking mechanism and pulling out the ribbon cable. Remove the 4 screws holding the board in place.Lift up slightly to clear the screw stand-offs and pull the Z-SUS to the left to unseat P3 / P4 from the Z-SUB board and remove the Z-SUS board. When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VS, -Vy and Z-bias (VZB) as well.
Z-SUB Board RemovalRemove P203 connector. Disconnect P201 and P202 by Flipping up on the locking mechanism and pull out the FPC to the panel. Remove the two screws in the Z-SUB board. Pull to the right and remove Z-SUB.
Main Board RemovalDisconnect the following connectors: P1401 LVDS by Flipping up on the locking mechanism and pull out the LVDS cable. Disconnect P501 by pressing gently inward on the locking tabs and pull out. Disconnect P602, P1404 and P700. Remove the 4 screws holding the Main board in place and Remove the board. Remove the shield by lifting upward and to the left on the board.
Control Board Removalshield by lifting upward and to the left on the board.
Disconnect the following connectors: P2, P106 LVDS, P105, P107 and P108 by lifting up the locking tab. Remove the 4 screws holding the Control board in place and Remove the board. Pay attention to the bottom left back side of the board. There is a piece of rubber (Chocolate) that may fall off. Be sure to replace the rubber
ipiece.
FRONT IR/INTELLIGENT SENSOR and SOFT TOUCH KEY BOARD.Disconnect P100. The board is attached to the Front Glass.KEY PAD:
Front IR and Key Pad Removal
June 2011 42PW350 Plasma 50
KEY PAD:The Key Pad is part of the Front IR/Soft Touch Key Board.
Make sure AC is removed.Lay the Television down carefully on a padded surface.
X Drive Circuit Board Removal Continued
Lay the Television down carefully on a padded surface.Make sure to use at least two people for this process so as not to flex the panel glass.
a) Remove the Back Cover.b) Remove the Stand (4 Stand Screws were removed during back removal). ) Di t th t t th l ft id f th M i b d P902 d P1404c) Disconnect the two connector on the left side of the Main board, P902 and P1404.
d) Remove the Stand Metal Support Bracket (4 Screws) 2 Plastic tap thread and 2 Metal thread. e) Remove the two Vertical support Braces marked “E”.
Note: There are 4 Screws per/brace, 2 Plastic tap thread and 2 Metal thread. (Note, you can slide the Heat Sink to the left and out without removing the vertical braces).( , y g )
f) Remove the 7 screws holding the Heat Sink. (Warning: Never run the set with this heat sink removed). To remove the heat sink, lift up to release the tacky Chocolate (heat transfer material) and slide the heat sink to the left to clear the connector wires on the right side.Note: There may be conductive tape on the heat sink that must be removed if present. Also note that there several pieces of Chocolate heat transfer material attached all the way across theAlso, note that there several pieces of Chocolate heat transfer material attached all the way across the underside of the heat sink. There is a mark on eitherside of the tape on the heat sink which shows its locations.
X-DRIVE LEFT OR X-DRIVE RIGHT REMOVAL:
Chocolate Heat transfer
materialHeat sink
Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to that particular board.
Remove the 5 screws holding the defective X-Drive board in place.
Heat sink
June 2011 42PW350 Plasma 51
Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.
Getting to the X Circuit Boards
ELeft E
Ri ht
With Stand removed
Right
D
Warning:
Never run the TV with the TCP Heat Sink removed
CTCP Heat Sink removed
FHeat Sink
D
B
June 2011 42PW350 Plasma 52
Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.
Left and Right X Drive Connector Removal
From the X Boards to the Control Board
See below to Remove the Connections on the X-Boards.
Disconnect connector P233
Va from the Y-SUS to From the X-Boards to the Control Board.
There may be tape on these connectors.
P232, P331Are the same
Left X Only
Connectors from Left and Right X Boards
Remove tape (if present) and Gently pry the l ki h i d d th ibb
P211 to P311Left X to Right X
Connectors from Left and Right X Boards
P211 P311locking mechanism upward and remove the ribbon cable from the connector.
Carefully lift the TCP ribbon up and off.It may stick be careful not to crack TCP
P211, P311Are the same
Gently lift the locking mechanism
It may stick, be careful not to crack TCP.(See next page for precautions)Removing Connectors to the TCPs.
TCPGently lift the locking mechanism
upward on all TCP connectors Left X: P201~206
Right X: P301~306 Example
June 2011 42PW350 Plasma 53
Cushion (Chocolate)Flexible ribbon cable connector
TCP (Tape Carrier Package) Generic Removal Precautions
Lift up the lock as shown using your fingernail.p g y g(The Lock can be easily broken.It needs to be handled carefully.)
Separate the TCP from the connector as shown.TCP Film can be easily damaged.
Handle with care.
The TCP has two small tabs on each side which lock the ribbon cable fully into the connector They have
Tab
Tab
fully into the connector. They have to be lifted up slightly to pull the connector out.Note: TCP is usually stuck downto the Chocolate heat transfer material, be Very Careful when
June 2011 42PW350 Plasma 54
material, be Very Careful when lifting up on the TCP ribbon cable.
Left and Right X Drive Removal
Remove the 5 screws in Left or Right X-Boards, (9 Total)Shared with the
Right X
Shared with the The Left X Board drives the Right 1/2 of the side of the screen vertical electrodes.Shared with the Left X
The Left X Board drives the Right 1/2 of the side of the screen vertical electrodes.Viewing from the Front of the TV.
The Right X Board drives the Left 1/2 of the side of the screen vertical electrodes. Viewing from the Front of the TV.
June 2011 42PW350 Plasma 55
42PW350 Plasma Display
CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION
p y
This Section will cover Circuit Operation, Troubleshooting and Alignment of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board, Main Board and the X Drive BoardsMain Board and the X Drive Boards.
At the end of this Section the technician should understand the operation of each circuit board and how to adjust the controls. The technician should be able with confidence to troubleshoot a circuit board failure, replace the defective circuit and perform all necessary adjustments
June 2011 42PW350 Plasma 56
perform all necessary adjustments.
3.3VP106
P204
P205
P206
P201
P202
P203
42PW350 Signal and Voltage Distribution Block
Display Panel HorizontalElectrodes, Sustain
Y-SUS Board
P101
P811
P813SK101
STB +5V
SMPSTurn On
Commands
SMPSBoard
ACInputFilter
P6
SMPS OUTPUT VOLTAGES IN STBY
Stand By:STB +5
Logic SignalsTo Y-SUS and
Y-Drive P1401
P700
MAIN BoardSpeakers
X-Board-RightP201 P202 P203 P204 P206 P301 P302 P303 P306
RGB Logic Signals
RGB Logic Signals
CONTROLBoard
Y Drive
Z-SUS Board
P107
P211 P232 P331 P311
Display Panel Vertical Address (Colored Cell Address)
Display PanelHorizontal Electrodes
Sustain
18V / M5V
RL_ONM_On
STB5V, +5V, 17V to Main BoardVS, VA and M5V to Z-SUS.
SMPS OUTPUT VOLTAGES IN RUN
18V / M5V Z Drive Control Signals
FPCs
FPCs
3.3VSTBY
P22
P206
Note: Va not used
by Z-SUS only fused and routed to Z-SUB then to
X-Board R
P2
P4
P105
Note: 18V not usedby Control
LVDS
Va
FPCs
FPCs
FG5V (5V), FG15V (15V) Measured from
Floating Ground
+17V, +5V, AC DetM5V, VA, VS
Display EnableVideo
Step 1: RL_ON: 17V, 5V, AC_Det, Error Det,Step 2: M_On: M5V, Va, Vs
P302
Z-SUB Board
3.3VP213
FG5VFG15V
18V
SMPS TURN ON SEQUENCE
P501
57 June 2011 42PW350 Plasma
Floating Gnd (FG)Drive Signals, FG5V
P108
P205 P304
Error Com
Run:AC Det+5, 17V
VSM5V
P305
P2P102 P212
P101 P213
FG5VFG5V
FGFG
FGFG
ScanScan
Data Data
Voltages Developed on the
Y-SUS
VSC-VY
When M5V arrives
When VS arrives
P7VS, VA, M5V
P902
FT. IR / Keys
P1404
MotionRemote
P201
P202
VA
P3
P103P
101
3.3V
3DTransmitter
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
3.3VVATCP
P312P100
X-Board-Left
FPC: Flexible Printed Circuits
TCP: Taped Carrier Package
VSM5V
M5V: Monitor 5VVA: Voltage for AddressVS: Voltage for SustainSwitch Mode Power Supply
Panel Label Explanation
(1) Panel Model Name(2) Bar Code(3) Manufacture No.
(9) TUV Approval Mark (Not Used)(10) UL Approval Mark(11) UL Approval No.
(4) Adjusting Voltage DC, Va, Vs(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)(6) Trade name of LG Electronics(7) Manufactured date (Year & Month)
(12) Panel Model Name(13) Max. Watt (Full White)(14) Max. Volts(15) Max Amps(7) Manufactured date (Year & Month)
(8) Warning(15) Max. Amps
June 2011 42PW350 Plasma 58
Adjustment Notice
C
All adjustments (DC or Waveform) are adjusted in WHITE WASH.Customer’s Menu, Select “Options”, select “ISM” select “WHITE WASH”.
It is critical that the DC Voltage adjustments be checked when;1) SMPS, Y-SUS or Z-SUS board is replaced.2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel.3) A Picture issue is encountered
ADJUSTMENT ORDER “IMPORTANT”C O G S S
3) A Picture issue is encountered4) As a general rule of thumb when ever the back is removed
DC VOLTAGE ADJUSTMENTS1) POWER SUPPLY: VS, VA (Always do first)2) Y-SUS: Adjust –Vy, VSC 3) Z-SUS: Adjust Z-Bias (VZB) Remember, the Voltage Label MUST be followed, 3) Z-SUS: Adjust Z-Bias (VZB)WAVEFORM ADJUSTMENTS1) Y-SUS: Set-Up, Set-Down
it is specific to the panel’s needs.
Power Supply
All label references are from a specific panel
Panel“Rear View”
The Waveform adjustment is only necessary1) When the Y-SUS board is replaced2) When a “Mal-Discharge” problem is
encounteredSet-Up Ve-Vy Vsc ZBias
June 2011 42PW350 Plasma 59
All label references are from a specific panel. They are not the same for every panel encountered.
3) When an abnormal picture issues is encountered
SWITCH MODE POWER SUPPLY SECTION
This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for the Single Scan Plasma. Upon completion of the section the technician will have a better understanding of the operation of the Power Supply Circuit and will be able to locate voltage and test points needed for troubleshooting and alignments.
• DC Voltages developed on the SMPS• Adjustments VA and VS.
Always refer to the Voltage Sticker located on the back of the panel, in the upper Left Hand side for the correct voltage levels for the VA, VS, -VY, VSC, and Z Bias as these voltages will vary from Panel to Panel even in the same size category.y g ySet-Up and Ve are just for Label location identification and are not adjusted in this panel.
SMPS p/n: EAY62170901Ch k th ilk l b l th t t f th P S l b d t id tif th t tCheck the silk screen label on the top center of the Power Supply board to identify the correct part number. (It may vary in your specific model number, always confirm part number).
On the following pages, we will examine the Operation of this Power Supply.
June 2011 42PW350 Plasma 60
The Switch Mode Power Supply Board Outputs to the :
Switch Mode Power Supply Overview
VAZ-SUS Board
VS
M5V
To ZY-SUS, fused then to Z-SUB, then to the X-Board Left, then X-Right.Primarily responsible for Display Panel Vertical Electrodes.
Drives the Display Panel’s Horizontal Electrodes. (From Z-SUS to Y-SUS).
Used to develop Bias Voltages on the Z-SUS then routed to the Y-SUS, p g ,Then Routed to the Control board and then back to the Z-SUS Board.
Main Board 17V Audio B+ Supply, Tuner B+ Circuits5V Signal Processing Circuits
STBY 5V Microprocessor Circuits
Also AC_Det (if missing, Mutes the Audio and Error_Det (not used)
Adjustments There are 2 adjustments located on the Power Supply Board VA and VS. The M5V i dj t d d fi d All dj t t d f d t Ch ij M5V is pre-adjusted and fixed. All adjustments are made referenced to Chassis Ground. Use “Full White Raster” 100 IRE
VA
VS
VR502
VR901
June 2011 42PW350 Plasma 61
VA VR502
Example:Model : PDP 42T3###Voltage Setting: 5V/ Va:55/ Vs:200N.A. / -200 / N.A. / N.A. / 125
VA VS
42PW350 SMPS Layout Drawing
62 June 2011 42PW350 Plasma
P811 Connector SMPS to Z-SUS P7Pin Label Run Diode Check
1~2
3~4
5
6
*VS
Gnd
*VA
200V OL
n/c n/c
Gnd Gnd
55V OL
M5V OV 2.16V
*VS/VA Varies by Panel Label
n/cn/c
P813 Connector SMPS to Main P501Pin Label Stby
18
16
15
13-14
Auto_Gnd
AC_Det
RL_On
Gnd
0V
3.46V
0V
STBY 3.46V
M_On17
9-12
5-7
3-4
1-2
8
Gnd
Error_Det
5.1V
Gnd
17V
Gnd
Gnd
3.39V
0V
0V
Run Diode Check
Gnd OL
3.29V OL
4.14V 3.07V
2.22V OL
5.16V 2.51V
Gnd
Gnd
Gnd
Gnd
4.89V 2.92V
5.16V 2.14V
17V 3.1V
INPUT: 100~240V ~ 50/60Hz 3.2A17V: 17V = 1.0A5.1V: 5.1V = 3.0ASTBY5V: 5V = 1.0A
VS: 199-203V = 1.3AVA: 55V = 1.5AM5V: 5.1V = 2.5APDP Module Max: 210W
XP5 42T3
LG Electronics
VS TP
F3022.5A/250V
STBY 160VRUN 390V
P811
P813
VA TP
F10110A/250V
SMPSP/N: EAY62170901
P702
SC101
RL103
T901
L601
L602
VSSupply
VASupply
5VSupply
17VSupply
F3014A/250VSTBY 160VRUN 390V
VR502VA Adj
VR901VS Adj
D602
Q601
Q602
D101
Q802
Q801
IC301
Q356
D352
Q355
D351
Q501
D504
D901
D902
Power Supply Circuit Layout
To Z SUS
VS VR901
P811
To Z-SUS
Fuse F301160V Stby390V Run
VSSource
VS VR901
PFCVA VR501
4Amp/250V
Fuse F302160V Stby
VASource
Primary Source
STBY-5VM5V, +5VSource
Circuit 160V Stby389V Run
2.5Amp/250V
STBY-5V+5V M5V
RL103
Main Fuse
+5V, M5Vand
ControllerOn Back of the boardController
17VSource
To MAIN
P813AC InputSC 101
F101BridgeRectifier N/C10Amp/250V
June 2011 42PW350 Plasma 63
SC 101P702
Power Supply Basic OperationAC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Rectified by the Bridge rectifier D101 generates a primary B+. The Power factor circuit generates a Primary supply which can be read at Fuse F301 and F302 160V. This primary voltage is routed through T901 and routed to the Standby 5V supply. The STBY5V (standby) is p y g g y pp y ( y)B+ for the Controller chip on the back of the board (IC701) on the SMPS and output at P813 pins 13 and 14 then sent to the Main board for Microprocessor (IC101) operation (STBY 3.46V RUN 5.16V). The Main board will receive +5V_ST (STBY 3.46V RUN 5.16V) which is sent to the +3.3V_ST regulator IC500. The 3.3V_ST is used by the Micro circuitry.
When the Microprocessor (IC101) on the Main Board receives a “POWER ON“ Command from either the Power button th R t IR Si l it t t hi h (2 22V) ll d RL ON t Pi 15 f P813 Thi d th R l Ci itor the Remote IR Signal, it outputs a high (2.22V) called RL_ON at Pin 15 of P813. This command causes the Relay Circuit
to close RL103 which allows the primary voltage to the PFC circuit (Power Factor Controller) to rise to 390V which can be read measuring voltage at Fuses F301 and F302 from “Hot” Ground. AC Detection (AC Det) is generated on the SMPS, by rectifying a small sample of the A/C Line and routed to the Controller (IC701) where it outputs at P813 pin 16 (4.15V) and sent to P601 to the Main Board where it is sensed by the Audio Processor IC700 pin 23.
When RL ON arrives the run voltage +5V source becomes active and is sent out P813 (5 16V at pin 5 6 and 7) to theWhen RL_ON arrives, the run voltage +5V source becomes active and is sent out P813 (5.16V at pin 5, 6 and 7) to the Main Board P501. The (Error Det) from the SMPS Board to the Main Board can be measured at pin 8 of P813 (3.39V STBY and 4.89V RUN), but it is not used. The RL-ON command also turns on the 17V (Audio B+ 17V) which is also sent to the Main Board. The 17V Audio supply outputs to the Main board at P813 pins 1 and 2 and used for Audio processing and amplification by IC700.
The next step is for the Microprocessor IC101 on the Main Board to output a high (3.29V) on M_ON Line to the SMPS at P813 Pin 17 which is sensed by the Controller IC701, turning on the M5V line and outputs at P811 pins 6 to the Z-SUS board.
The Controller (IC701) also uses the M_ON line to turn on the VA and the VS supplies. (Note there is no VS On Command i thi t) VS i t t t P811 t th Z SUS b d P7 (VA i 5 d VS i 1 d 2) N t Th V i f d thin this set). VS is output at P811 to the Z-SUS board P7. (VA pins 5 and VS pins 1 and 2). Note: The Va is fused on the Z-SUS then routed out P3 to the Z-SUB and then out P203 to P312 to the X-Board Right. VS is also routed out of the Z-SUS P2 pins 6 and 7 to the Y-SUS P206.AUTO GND Pin 18 of P813: This pin is grounded on the Main board. When it is grounded, the Controller (IC701) works in the normal mode, meaning it turns on the power supply via commands sent from the Main board. When AUTO GND is floated (opened) it pulls up and places the Controller (IC701) into the Auto mode In this state the Controller turns on the
June 2011 42PW350 Plasma 64
floated (opened), it pulls up and places the Controller (IC701) into the Auto mode. In this state, the Controller turns on the power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.
7
42PW350 Television Turn On Sequence
Stand By 5V
Power On
Remote Power Key
AC Det.
SOC_ResetR200/C142
MAIN Board
RL On
MicroprocessorIC101
Error Det.
1
26
5
6
7
At point TV is in Stand-By state. It isEnergy Star Compliant.Less than 1 Watt
5
In Stand-By Primary side is 160VIn Run (Relay On) Primary side is 390V
3
CONTROL
X BoardLeft
8
3.3V RegIC500 2
Error Det.
Relay On
Y-SUSZ-SUS
18V
X BoardRight
STBY 5V
M5V
7
4
2
VS
VA
7
Front IR / Soft Touch Key PadBoard
(SMPS)
IfMissingAudioMutes
5V
17V AudioIC700
17V
17V Reg
6
+5V toIC506 +3.3V Reg
All EDID ICs
M_On
FG5V Floating Gnd
6
NotUsed
STBY 5V Reg
Error Det.
3.3VST
M_On
7
9
9
STBY3.46V
RUN5.16V
18V M5V
Power Key
IC5075V_TU
Va
Va3.3V
5
F301F302
65 June 2011 42PW350 Plasma
Not Used
Y DR
IVE
7Va
Reg
Vs Reg
VS
9
M5V Reg
8
M5V
18VReg
7
7
AC Det
AC In
RL On
RL On
3.3V Reg
Remote or Key Pad
1st
2nd
3rd
Relay+5V
Regulator
7
4
3.3V
8
IC700AudioAmp
3
5V Generation
8
VS M5V VS Z-SUB
VA
VA
VA 85VFGReg
M5V
77
VA
8
M5V
7M5V
VS
Power Supply Va and Vs Adjustments
Important: The Power Supply adjustments “Must” be performed “First” before any
Example Voltage LabelMust be performed First before any
other adjustments.
V TP
VAVR502
VSVR901Important: Use the Panel Label
Not this book for all voltage adjustments.Vs TP
Pin 1 or 2
Va TPPin 6 or 7
Use Full White Raster “White Wash”For all Adjustments.
Vs Adjust:Place voltmeter on VS TP. Adjust VR901 until the reading matches your Panel’s label.
Va Adjust:Place voltmeter on VA TP. Adjust VR502 until the reading matches your Panel’s label.
June 2011 42PW350 Plasma 66
42PW350 Power Supply Static Test with Light Bulb Load
Note:Always test the SMPS under a load using the 2 light bulbs. Abnormal operational conditions may result if not loaded.
Any time AC is applied to the SMPS, STBY 5V will be 3.46V and will be 5.14V when the set turns on.AC DET WILL NOT be present until set comes on, if missing it will mute the audio.Error line WILL NOT be present until set comes on, but it’s not used.
P813
67
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK. Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk screen on the SMPS and place each supply voltage under the appropriate load.
Note:To turn on the Power Supply;1) With Main Board connected, press power.2) Without Main Board connected SMPS will turn on automatically.
Check Pins 1 or 2for Vs voltageP811
Check Pins 5for Va voltage
June 2011 42PW350 Plasma
CURRENT LABEL
Check Pins 6for M5V voltage
VS TP
F3022.5A/250V
STBY 160VRUN 390V
P811
P813
VA TP
F10110A/250V
VR901VS Adj
SMPSP/N: EAY62170901
P702
SC101
RL103
T901
L601
L602
VSSupply
VASupply
5VSupply
17VSupply
F3014A/250VSTBY 160VRUN 390V
VR502VA Adj
Gnd
VS
100W100W
12 or Pins
P811
Check Pins 13 or 14for 5V SBY (5.22V)
Check Pin 8for Error Det (4.95V)
Check Pin 5,6 and 7for (+5.22V)
Check Pins 1 or 2For 17V (17V)
Check Pin 16for AC Det (4.96V)
INPUT: 100~240V ~ 50/60Hz 3.2A17V: 17V = 1.0A5.1V: 5.1V = 3.0ASTBY5V: 5V = 1.0A
VS: 199-203V = 1.3AVA: 55V = 1.5AM5V: 5.1V = 2.5APDP Module Max: 210W
XP5 42T3
LG Electronics
WARNING: Remove AC when adding or removing any plug or resistor.
Power Supply Static Test (Forcing on the SMPS in stages)
TEST CONDITIONS:Connector going to the Z-SUS P811 is disconnected. P601 on the Main board disconnected (coming in on P813).Use the holes on the connector P501 (Main Board side) to insert the resistors or jumper leads.Connect (2) 100 Watt light bulbs in series between VS and Ground.
When the supply is operational in its normal state the Auto Ground lineat Pin 18 of P813 is held at ground by the Main Board.This Power Supply can be powered on sequentially to test the Controller Chip IC701 operational capabilities and for troubleshooting purposes. By disconnecting P501 on the Main board, pin 18 is opened. To return theBy disconnecting P501 on the Main board, pin 18 is opened. To return the SMPS to the normal state for the Static Test procedure, this pin must be grounded. (See first step A below).
Note: Leave previous installed 100Ω resistor in place when adding the next resistor.
(A) Ground the Auto Gnd Line (Pin 18) will allow the supply to be powered up one section at a time.
(B) Add a 100Ω ¼ watt resistor from 5V Standby to RL_ON and the 17V and 5V Run Lines on P813 will become active Also AC-Det andand 5V Run Lines on P813 will become active. Also AC-Det and Error_Det will go high.
(C) Add a 100Ω ¼ watt resistor from any 5V line to M_ON (Monitor On) to make the M5V, VS and VA lines operational. P811 (VS pins 1 and 2) (VA pins 5) and the (M5V pins 6)
June 2011 42PW350 Plasma 68
P811 (VS pins 1 and 2) (VA pins 5) and the (M5V pins 6).
P813 SMPS Connector Identification, Voltages and Diode Check
P813 "SMPS" to P601 "Main"
P813Pin Label STBY Run No Load Diode Check
18 eAuto_Gnd Gnd Gnd 4.87V OL
17 bM_ON 0V 3.29V 0V OL
16 a dAC Det 0V 4 15V 4 95V OL16 AC Det 0V 4.15V 4.95V OL
15 aRL_ON 0V 2.22V 0V OL
13-14 STBY_5V 3.46V 5.16V 5.2V OL
9-12 Gnd Gnd Gnd Gnd Gnd18 a cError_Det 3.39V 4.89V 4.94V OL
5-7 a5.1V 0V 5.16V 5.2V 2.38V
3-4 Gnd Gnd Gnd Gnd Gnd
1 2 a17V 0V 17V 17V OL
Note:This connector has two
a Note: The 17V, 5V, AC_Det and Error Det turn on when the RL_On command arrives.b Note: The M5V, Va and Vs turn on when the M_On (Monitor On) command arrives.c Note: The Error Det line is not used in this model.d Note: If the AC Det line is Missing the Audio will Mute
1_2 a17V 0V 17V 17V OL
rows of pins.Even on bottom row.
Odd on top row.
Note: If the AC Det line is Missing, the Audio will Mute.e Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on
Automatically when AC is applied.
June 2011 42PW350 Plasma 69
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P811 & SC101 SMPS Connector Identification, Voltages and Diode Check
SC101 AC INPUT
Standby Run Diode ModeConnector Pin Number
SC101 120VAC 120VAC OpenL and N
P811P811 "Power Supply" to P7 "Z-SUS"
Pin Label Run Diode Check
1~2 Vs *200V OL
Vs TPn/c n/c n/c n/c
3~4 Gnd Gnd Gnd
5 Va *55V OL
1
5 Va 55V OL
6 M5V 5.06V 2.39V
* Note: Voltages vary according to the Panel Label
Z-SUS routes Va to the Z-SUS and then to the Bottom X-Right. Vs routed to Y-SUS from P2 on the Z-SUS.
M5V routed through Z-SUS to Control board and to Y-SUS.`
Va TP
June 2011 42PW350 Plasma 70
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly. Upon completion of this section the Technician will have a better understanding of the circuit and be
Z-SUS SECTION
Upon completion of this section the Technician will have a better understanding of the circuit and be able to locate voltage and diode mode test points needed for troubleshooting and all alignments.
Note: The Z-SUS can run “Stand-Alone” in the 42T3 Panel Models.
• DC Voltage and Waveform Test Points• Z BIAS Alignment• Diode Mode Test Points
LOCATIONS:
OPERATIONAL VOLTAGES:
Power Supply Supplied VSM5VVA
Also Routed to Y-SUS Board.
Also Routed to the Y-SUS and to the Control Board.
Not used by the Z-SUS but Routed to the Z-SUB and then to the Right X-Board
Y-SUS Supplied 18VDeveloped on Z-SUS Z Bias
then to the Right X-Board.
Routed through Control Board
June 2011 42PW350 Plasma 71
Simplified Block Diagram of Z-SUS (Sustain) Board Z-SUS Block Diagram
Y-SUS Board Power Supply Board
Via 2 FPC
Control Board18V
VS, M5V andERR_COM
M5V
M5V
VS, VA andM5V Z-SUB
Via 2 FPC
Flexible PrintedCircuits
18V
Z-SUS board receives VS and M5V SMPS and 18V from the
Control board
M5V VA
Receives Logic
Signals
PDP
Display
G tCircuits generate erase,sustain waveforms
Panel
NO IPMs
GeneratesZ Bias 125V
FET Makes Drive waveform
VAVA
June 2011 42PW350 Plasma 72
X-Board RightX-Board LeftVAVA
Z-SUS Board Component IdentificationP/N EBR68342001
P2VS, M5V to
Y-SUS.Z-BiasVR1 Z-Bias TP
P7In on this Connector:
VS, M5V and VA
Top Two Pins are VA
P4
Y SUS.Also Error Com
Z-Bias TPR151
Z-SUSWaveformTest Point
J17Z-SUS
W f
No IPMs
In on this Connector:M5V from SMPS to the Y-SUS generates +18V.M5V and 18V are routed
J17WaveformDevelopment and
outputFETsP6
from Control
through the Control board.
Logic Signals generated on the Control board.
P3 To Z-SUB
P3
Control
June 2011 42PW350 Plasma 73
P3 To Z-SUB
Example:
Model : PDP 42T3###Voltage Setting: 5V/ Va:55/ Vs:200N.A. / -200 / N.A. / N.A. / 125
Z-Bias P2 Connector Z-SUS to Y-SUS P206
Pin Label Run Diode Check
1~3
4~5
6
7
8
15V
M5V
Y-OE
CTRL_OE
VZ_CON
2.18V
1.03V
GndOL
9 GND Gnd
OL
10
11
12
13
14
ZBIAS
N/C
ZSUSDN
Gnd
ZSUSUP
15 Gnd
OL
OL
Gnd
OL
Gnd
OL
42PW350 Z-SUS Layout Drawing
74 June 2011 42PW350 Plasma
*VS Varies with Panel Label
P7 Connector Z-SUS to SMPS P811Pin Label Run Diode Check
1~2
3~45
6
*VS
Gnd
*VA
200V OL
n/c n/c
Gnd Gnd
55V OL
M5V 5.06V 1.03V
*VS/VA Varies by Panel Label
n/cn/c
Pin Label Run Diode Check
1~45
6~78
9~11
ERROR
n/c
VS
n/c
Gnd
102V OL
n/c n/c
200V OL
n/c n/c
Gnd Gnd
12 M5V 5.06V 1.03V
18.2V
5.06V
Gnd
3.25V
Gnd
0.05V
1.92V
Gnd
Gnd
0.22V
Gnd
0.79V
P6
FS2 VA
18V J1
J17
Z-SUSWaveform
P2
Vzbias TPR151
P4
10A/125V
7A/125V
6.3A/250V
P7
P3
Top 2 Pins are VA
Z-SUSP/N: EBR68342001
FS1 VS
FS3 (M5V)
5V J28
R1Y-OE
VR1Vzbias
FS1/FS2: Diode CheckOL: Connected or DisconnectedFS3: Diode Check0.76V: Connected1.03V: Disconnected
The Z-SUS will run stand alone.Disconnect P2 to the Y-SUS.Disconnect P105 on CTL. Board.Jump 17V from the SMPS J2 (just left of P813) to Z-SUS J1 (just above P6) connector.Ground Y-OE Z-SUS (bottom R1).Output Waveform J17 (281V p/p).
P6 Connector Z-SUS to Control P2
The Z-SUS (in combination with the Y-SUS) generates a SUSTAIN Signal and an ERASE PULSE for generating SUSTAIN and DISCHARGE in the Panel.
Z-SUS Waveform
g g
This waveform is supplied to the Z-SUB through P3 and P4 and then to the panel through two FPC (Flexible Printed Circuit) connections P201 and P202.
Reset
Y DriveW f
577V p/p
Oscilloscope Connection Point.
J17 to check Z Output waveform.
Right Hand Side Center.Z D i
Waveform
Right Hand Side Center.
Vzb voltage *125V ± 1V (*See Your Label)
Z DriveWaveform
(Vzb) Z Bias VR1 manipulates the offset of this waveform segment.
230V p/p
100V per/div 100uSec
TIP: The Z-Bias (VZB) Adjustment is a DC level adjustment.This is only to show the effects of Z-Bias on the waveform.
p
TIP: To help lock the scope when capturing the Z-SUS Waveform, us the VS DA TP on the Control Board for an External Clock
June 2011 42PW350 Plasma 75
This Waveform is just for reference to observe the effects of Zbz adjustment
VS_DA TP on the Control Board for an External Clock.
VZB (Z-Bias) VR1 Adjustment
Read the Voltage Label on the panel when adjusting
Top Right of Z-SUS Board
VZB (Z Bias)VR1 VZB (Z Bias) TP LOCATION
VZBVR1
VR1 VZB (Z-Bias) TPR151
LOCATION
+ -
Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash” mode or 100 IRE White input. All SMPS adjustments should have been completed.1. Place DC Volt meter between VZB TPs.
June 2011 42PW350 Plasma 76
2. Adjust VZB (Z Bias) VR1 in accordance with your Panel’s voltage label.
Z-SUS Board Fuse Identification
FS2
P/N EBR68342001
FS2VA Fuse
10A / 125V
FS3M5V Fuse
FS1VS Fuse
M5V Fuse7A / 125V
6.3A / 250V
June 2011 42PW350 Plasma 77
P7 Connector to SMPS P811 Voltages and Diode ChecksVoltage and Diode Mode Measurements
P2 Location: Top LeftP7 "Z-SUS" to "SMPS" P811
Pin 1Pin Label Run Diode Check1~2 +Vs *200V OL3~4 Gnd Gnd Gnd
5 +Va *55V OL5 +Va *55V OL6 M5V 5.06V 1.03V
* Note: Varies according to Panel Label
There are no Stand-By voltages on this connector
June 2011 42PW350 Plasma 78
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P2 Connector to Y-SUS P206 Voltages and Diode ChecksVoltage and Diode Mode Measurements
P2 Location: Top LeftP2 "Z-SUS" to "Y-SUS" P206
Pin Label Run Diode CheckPin Label Run Diode Check1~4 ER_PASS 98V~102V OL
5 n/c n/c n/c6~7 +Vs *200V OL
Pin 1
8 n/c n/c n/c9~11 Gnd Gnd Gnd12 M5V 5.06V 1.03V
* Note: This voltage will vary in accordance with Panel Label
There are no Stand-By voltages on this connector
June 2011 42PW350 Plasma 79
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P6 Connector to Control P2 Voltages and Diode ChecksVoltage and Diode Mode Measurements
LocationBottom Left hand side
P6 "Z-SUS Board" to P2 "Control"Pin Label Run Diode Check1~3 (+15V) 18.2V 2.18V4~5 M5V 5.06V 1.03V
6 Y-OE 0.05V OL7 CTRL_OE Gnd Gnd8 VZ CON 3 25V OL
Pin 18 VZ_CON 3.25V OL9 Gnd Gnd Gnd10 ZBIAS 1.92V OL11 n/c n/c OL11 n/c n/c OL12 ZSUSDN 0.79V OL13 Gnd Gnd Gnd14 ZSUSUP 0.22V OL
There are no Stand-By voltages on this connector
15 Gnd Gnd Gnd
June 2011 42PW350 Plasma 80
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Testing the Z-SUS without the Y-SUS (Stand-Alone)This procedure will test the Z-SUS, Power Supply
and Control board without the Y-SUS. Tip: On SMPS just to the left of P813. Use jumper J2 for 17V.
(1) Disconnect P206
(1) Jump 17V (J2) SMPS to J1 on the Z-SUS
(2) Ground Y-OE(Bottom of R1)
(1) Disconnect P813
(4) Check J17for 281V p/p
(1) Disconnect P101
Leave P6 to P2 connected
for 281V p/p
(3) Apply AC
Tip: Disconnect P206 on Y SUS Jump “Only” M5V to the Y SUS (Not VS) If this brings up the 18V on P101 pins
June 2011 42PW350 Plasma 81
Tip: Disconnect P206 on Y-SUS. Jump Only M5V to the Y-SUS (Not VS). If this brings up the 18V on P101 pins 24~27, then leave P101 connected. There will be no need to jump 17V to the Z-SUS.
Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.
Y-SUS BOARD SECTION (Overview) p/n: EBR68341901
This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board for the Single Scan Plasma. Upon completion of the Section the technician will have a betterunderstanding of the operation of the circuit and will be able to locate voltage andDiode mode test points needed for troubleshooting and alignmentsDiode mode test points needed for troubleshooting and alignments.
• Adjustments• DC Voltage and Waveform Checks• Diode Mode Measurements
Operating Voltages
Z-SUS SuppliedFrom SMPS
VS Supplies the Panel’s Horizontal Electrodes. (Routed from the Z-SUS board).M5V S li Bi t Y SUS (Al t d t th C t l B d th Z SUS)From SMPS
Y-SUS Developed -VY VR502V SET UP VR601V SET DN VR401
M5V Supplies Bias to Y-SUS. (Also routed to the Control Board then Z-SUS).
-VY Sets the Negative excursion of Reset in the Drive Waveform.SET UP sets amplitude of the Top Ramp of Reset in the Drive Waveform.SET DOWN sets the Pitch of the Bottom Ramp for Reset in the Waveform.Used internally to develop the Y-Drive signal (Also routed to the Control Board
18V / VSC
Floating Ground FG 5VFG 15V
Used internally to develop the Y Drive signal. (Also routed to the Control Board then routed to the Z-SUS board).Note: There is no VSC or 18V adjustment on this model.
Used on the Y-Drive board (Measured from Floating Gnd)Used in the Development of the Y-Drive Waveform (Measured from Floating Gnd)
June 2011 42PW350 Plasma 82
Y-SUS Block Diagram
Power Supply Board - SMPSZ-SUS Board
Distributes Vs, M5V, Va
Z-SUB
Distributes Va
Simplified Block Diagram of Y-Sustain Board
Distributes M5V
Distributes 18V / M5V
Y-SUS Board
Distributes Vs, M5V
Distributes M5VReceive M5V, Vs
from Z-SUSDistributes 18V
Control Board
VSM5V
Generates Vsc and -VyFrom VS by DC/DC Converters
Also controls Set Up/Down
Circuits generate Y-Sustain Waveform
Right X BoardGenerates Floating Ground
Distributes VA
Distributes 3.3V
M5V
FETs amplify Y-Sustain Waveform
g5V & 15V by DC/DC Converter
Also 18V by same DC/DC
FG5VLeft X Board
Logic signals needed to generate drive waveform
Y-Drive BoardReceives Scan Waveform Display Panel
Logic signals needed to scan the panel
June 2011 42PW350 Plasma 83
Logic signals needed to generate drive waveform
Y-SUS Board Layoutp/n: EBR68341901
P206M5V, VS and ERR_COMfrom Z-SUS
VR601Set Up
T Y D i
All Floating Gnd
P213
-Vy TP
To Y-Drive
1~10 Floating Gnd11~12 FG5V
18V (pins 28~30)to Control for Z-SUSM5V (pins 24-27) for both
VR401Set Up
VR502-Vy
1~2 Y-SCAN3 4 VPP
C213P212
Logic Signals from the Control Board
Ribbon
P101FS501 (18V)
P211
Logic Signals to
3~4 VPP6~12 Scan Data
June 2011 42PW350 Plasma 84
2A/125VLogic Signals toY-Drive Board
42PW350 Y-SUSLayout Drawing
85 June 2011 42PW350 Plasma
Example:
Model : PDP 42T3###Voltage Setting: 5V/ Va:55/ Vs:200N.A. / -200 / N.A. / N.A. / 125
-Vy
Pin Label Run Diode Check
1~45
6~78
9~11
ERROR
n/c
VS
n/c
Gnd
102V OL
n/c n/c
200V OL
n/c n/c
Gnd Gnd
12 M5V 5.03V 1.15V
Pin Label Run Diode Check
28~30
24~27
20~23
19
18
15V
5V
Gnd
Dummy2
Y-OE
1.13V
1.15V
OL2.02V
17 PC OL
Gnd
16
15
14
13
12
ER_DN
DATA_PRE
ER_UP
SC_A
RAMP_UP
11 STB
10 RAMP_BLK
9 CLK
8
7
6
5
4
SUS_DN
DUMMY_3
DUMMY_1
DUMMY_4
SUS_UP_0
3 CTRL_OE
2 RAMP_DN
1 Gnd
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
Gnd
OL
18.2V
4.94V
2.14V
0.03V
1.84V
Gnd
0.5V
0.01V
1.45V
0.22V
1.5V
0.3V
1.07V
0.6V
2.14V
1.07V
1.35V
2.71V
0.75V
0.11V
Gnd
2.17V
P212 Connector Y-SUS to Y-Drive P102Pin Label Run Diode Check
1~1011~12
Floating Gnd
FG5V
FGnd FGnd
5.06V 1.57V
P213 Connector Y-SUS to Y-Drive P101Pin Label Run Diode Check
1~12 Floating Gnd FGnd FGnd
P206 Y-SUS to Z-SUS P2
P101 Y-SUS to Control P105
Pin Label Run Diode Check
1~2 VSC (Y-Scan) 146.2V OL
3~4 VPP 145V OL
5 n/c n/c OL
6 SUS_DN (FG) FG FG
7 CLK 0.92V 1.46V
8 STB 2.24V 1.46V
9 OC1 2.26V 1.54V
10 DATA 0V 1.46V
11 OC2 2.8V 1.54V
12 SUS_DN (FG) FG FG
Black Lead on FG (Floating Gnd)
P211 "Y-SUS" to "Y-Drive" P106
D506 18V SourceD502 -Vy Source 200VD503 VSC Source 146V
P212
P211
P213
-Vy TPR201
-Vy AdjVR502
P101
P206
Y-SUSP/N: EBR68341901
C213
T501
T502
FG5VJ54
OE J73FS501
18V
18V J55
M5V J13
Use Left leg of C213 for Y-Drive TP.
Y-Drive board removed 470Vp/pWith Y-Drive board 485Vp/p
FG15VJ66
VR601Set-Up
VR401Set-Dn
D506
D502D503
D508 FG15V SourceIC508 FG5V Source
Back of Board
Scan FG
M5V J35
There are Chocolate pieces between the Y-SUS and the Panel. Be sure to return
them to there correct location if they should fall off when removing the Y-SUS.
TIP:You can run FG supplies and 18V
Remove All Connectors.Short OE (J73) to Gnd.
Supply any 5V to the Y-SUS and Gnd.Use J35 or J13 as M5V TP.
-VY Adjustment
These are DC level Voltage Adjustments. They are generated when the VS voltage arrives on the board
CAUTION: Use the actual panel label and not the book for exact voltage settings.This is just for example
They are generated when the VS voltage arrives on the board.
PROCEDURE:Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash”. -Vy1) Adjust –Vy VR502 to Panel’s Label voltage (+/- 1V)
-Vy
Location: Bottom Center of boardJust Left of Transformer T501
VR502-VY ADJ
-Vy TPR201
+-
Voltages Reads Positive
Location: Bottom Center of boardJust above Transformer T501Note: There is no VSC adjustment in this model.
June 2011 42PW350 Plasma 86
Y-Drive Signal Overview
Y-Drive Test Point (Under 2nd Buffer from Top)
Note, this TP (VS_DA) can be
used as an External(Under 2 Buffer from Top) used as an External Trigger for scope
when locking onto the Y-Drive (Scan) or
the Z-Drive signal.
This signal can also
NOTE: The Waveform Test Points
This signal can also be used to help lock
the scope when observing the LVDS
video signals.NOTE: The Waveform Test Points are fragile. If by accident the land is torn and the run lifted, make sure there are no lines left to right in the screen picture.
There are several other test points on either the Upper or Lower Y-Drive boards that can be used.Basically any output pin on any of the FPC to the panel are OK to use.
June 2011 42PW350 Plasma 87
Observing (Capturing) the Y-Drive Signal for Set Up Adjustment
Fi 1
Set must be in “WHITE WASH” All other DC Voltage adjustments should have already been made.
AdjustmentArea
Fig 1:As an example of how to lock in to the Y-Drive Waveform. Fig 1 shows the signal locked in at 2ms per/div. Note the 2 blanking sections.The area for adjustment is pointed out within the Waveform
FIG12mS
Area to expand
Blanking Blankingj p
Fig 2:At 200uSec per/division, the area of the waveform to use for SET-UP or SET-DN is now becoming clear.Now only one blanking signal is present
FIG2200uSArea to
expand
AdjustmentArea
Fig 3:At 100us per/div the area for adjustment of SET-UP or SET-DNi i t i It i tli d ithi th W f
Now only one blanking signal is present.
FIG3
p
Expanded from above
is now easier to recognize. It is outlined within the Waveform.Remember, this is the 1st large signal to the right of blanking.
TIP: If you expand to 40uSec per/division, the Area for Set-Up
100uS
155Vp/p
Expanded from above
y p padjustment for: SET-UP can be made using VR601 and theSET-DN can be made using VR401. It will make this adjustment easier if you use the “Expanded” mode of your scope
Area for Set Up adjustment
Blanking
June 2011 42PW350 Plasma 88
Expanded mode of your scope.
195 uSecArea for Set-Dn
adjustment
Observe the Picture while making these adjustments Normally they do not have to be done
Set Up and Set Down AdjustmentsSet must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.
Observe the Picture while making these adjustments. Normally, they do not have to be done.
ADJUSTMENT LOCATION: Center Right of the board.
Waveform TP on the Y-Drive Board
Y-Drive Test Point
U d 2nd B ff f t
A
VR601
Under 2nd Buffer from top
SET-UP ADJUST:1) Adjust VR601 and set the (A) portion of the signal to
match the waveform above. (155V p/p ± 5V)
B
ADJUSTMENT LOCATION:
SET-DN ADJUST:2) Adjust VR401 and set the (B) time of the signal to match
the waveform above. (195uSec ± 5uSec)VR401
B
TIP: To help lock the scope when capturing the Y SUS W f th VS DA TP th C t l
June 2011 42PW350 Plasma 89
Bottom RightJust above P101
Y-SUS Waveform, us the VS_DA TP on the Control Board for an External Clock.
Set Up or Down Adjustment ExtremesSet Up swing is Minimum 146V Max 204V p/p Set Dn swing is Minimum 146uSec Max 206uSec
Normal155V
BackPorch
Normal
Too Short146uSec
Too Low146V
Normal195uSec
B k
206uSec200V off th Fl
Too High204V
BackPorch
the Floor
Floor
Normal155V
June 2011 42PW350 Plasma 90
Y-SUS Board Troubleshooting Y-ScanCaution: Do not use C213 for adjustments on the Y-Scan
signal. This is just a Test Point for board operation.
Y-SUS Board develops the Y-Scan drive signal to the Y-Drive board The Y-SUS (Y-Scan) signal can be
TIP: Use C213 Right leg to test for V-Scan signal when the Y-Drive board is removed
to the Y Drive board. The Y SUS (Y Scan) signal can be tested on the left leg of C213 if the Y-Drive board is defective and has to be removed. (Check for 470V p/p)
C213Left Leg Y-SCAN
June 2011 42PW350 Plasma 91
P213 Y-SUS Board Connector to P101 Y-Drive (Floating Ground)
P101 P213
All pins are Floating Ground.
Y-DriveBoard
Y-SUSBoard
June 2011 42PW350 Plasma 92
P212 Y-SUS Board Connector to P102 Y-Drive (Floating Ground 5V)
Y Drive Y SUSP212 "Y-SUS" to "Y-Drive" P102
Y-DriveBoard
Y-SUSBoard Pin Label Run Diode Check Diode Check
1~10 FGnd FGnd FGnd FGnd
11~12 FG5V 5.06V 1.63V 0.56V
Floating Ground 15V
TPPins 1~10 Floating Ground
Black LeadFloating Gnd
Red LeadFloating Gnd
Note: Pin 1 is at the top.P211
FG5V (4.9V) measured from Pins 11 or 12 to Floating Gnd.
For Floating Ground, use any pin on P213. P102
Floating G d 5V TP g , y p
P102Ground 5V TP
June 2011 42PW350 Plasma 93
P211 Y-SUS Board to Y-Drive P106 Logic Signals Explained
P211 Connector
Pins 7~11Pin Label
1~2 VSC (Y-Scan)
3~4 VPP
(4mSec per/div)
P211
3 4 VPP
5 n/c
6 SUS_DN (FG)
CThese signals look very similar
due to the fact they are read from Chassis Gnd, but they are actually Floating Ground related.DO NOT hook scope Gnd to Floating Gnd TP
ith t I l ti T f
7 CLK
8 STB
9 OC1
10 DATA
All logic pins about (420V p/p)
without an Isolation Transformer.
Y-Drive Y-SUS
10 DATA
11 OC2
12 SUS_DN (FG)
Pins 7~11 are Logic (Drive) Signals to the Y-Drive Upper.Y-DriveBoard
Y-SUSBoardP106
June 2011 42PW350 Plasma 94
P106 P211
P211 Y-SUS Connector Diode Mode Testing
Measurements taken from Floating Gnd.For Floating Ground use any pin on P213.
P211 "Y-SUS" to "Y-Drive" P106
Pin Label Run Diode Check
1 2 VSC (Y S ) 146 2V OL1~2 VSC (Y-Scan) 146.2V OL
3~4 VPP 145V OL
5 n/c n/c OL
6 SUS DN (FG) FG FG6 SUS_DN (FG) FG FG
7 CLK 0.92V 1.46V
8 STB 2.24V 1.46V
9 OC1 2.26V 1.54V
Y-Drive Y-SUS
10 DATA 0V 1.46V
11 OC2 2.8V 1.54V
12 SUS_DN (FG) FG FGY DriveBoard
Y SUSBoard
Y-Drive Board should be DISCONNECTEDf th Di d M d t t
Diode Mode Readings taken with all connectors Disconnected.
DVM in Diode Mode
Black Lead on FG (Floating Gnd)
June 2011 42PW350 Plasma 95
for the Diode Mode test. DVM in Diode Mode.
Y-SUS Floating Ground (FG 15V, FG 5V) and 18V Checks and TestTIP: Some Circuit components are on the back of the board. To Test these voltages, remove the board completely,
supply Ground and any 5V supply Y-SUS. Ground OE Jumper J73.
Floating Ground checks must be made from Floating Ground. Use any pin on P213.
These voltages are generated when the M5V arrives on the board.
FG 15V J66D506 Cathode
Run: 18.2VDiode Check
1 13V
D506 18.2VFG 5V J54 1.13V
Location
T502
J73 OE
Location Back Side of BoardSource FG15V (Floating Ground 15V) D508 cathode.
Source FG5V (Floating Ground 5V) FG15V i l t d d t 5V b IC508
Must be grounded to test FG5, FG15V
June 2011 42PW350 Plasma 96
is regulated down to 5V by IC508. and 18V with only 5V applied to board.
Y-SUS 18V Fuse Information
LocationLocation
FS501(18V)( )
2A/125V
FS501 Protects 18V line (created by D506 and T502). 18V is used on the Y-SUS and leaves the Y-SUS on P101 pins 28~30 to
the Control Board. Then leaves the Control board on P2 pinsthe Control Board. Then leaves the Control board on P2 pins 13~15 and goes to the Z-SUS arriving on P201 pins 1~3.
Diode Check with Board Disconnected.0.5V Red Lead on Chassis Gnd
1 13V Black Lead on Chassis Gnd
Diode Check with Board Connected.0.85V Black lead on Chassis Ground.
June 2011 42PW350 Plasma 97
1.13V Black Lead on Chassis Gnd
P206 Y-SUS Voltage and Diode Mode Measurement
P206 "Y-SUS" to "Z-SUS" P2
P206
P206 Y-SUS to Z-SUS P2Pin Label Run Diode Check1~4 ER_PASS 98V~102V OL
5 n/c n/c n/c
6~7 +Vs *200V OL
8 n/c n/c n/c9~11 Gnd Gnd Gnd12 M5V 5.06V 1.15V
* Note: These voltages will vary in accordance with Panel Label
June 2011 42PW350 Plasma 98
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P101 Y-SUS to Control P101 Plug Voltage ChecksThere are No Stand By
Voltages on this Connector
TIP: Use the Control Board (P101) side of this connector to make voltage readings
TIP: The ribbon does not come with a new Y-SUS or Control board.
TIP: Use the Control Board (P101) side of this connector to make voltage readings.
P101 "Y-SUS" to P105 "Control"
Pin Label Run Diode Check Pin Label Run Diode Check28 30 15V 18 2V 1 13V 11 STB 1 5V OL28~30 +15V 18.2V 1.13V 11 STB 1.5V OL24~27 +5V 4.94V 1.15V 10 RAMP_BLK 1.07V OL
20~23 Gnd Gnd Gnd 9 CLK 0.6V OL
19 Dumy2 2.14V OL 8 SUS_DN 2.71V OL18 Y-OE 0.03V 2.02V 7 DUMMY_3 2.14V OL17 PC 1.84V OL 6 DUMMY_1 1.07V OL16 ER_DN 0.5V OL 5 DUMMY_4 1.35V OL15 DATA_PRE 0.01V OL 4 SUS_UP_0 0.75V OL14 ER UP 0 3V OL 3 CTRL OE 0 11V OL14 ER_UP 0.3V OL 3 CTRL_OE 0.11V OL
13 SC_A 1.45V OL 2 RAMP_DN 2.17V OL
12 RAMP_UP 0.22V OL 1 Gnd Gnd Gnd
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
June 2011 42PW350 Plasma 99
(Y(Y--Drive Explained)Drive Explained)Y-DRIVE BOARD SECTION
Y-DRIVE BOARD
p/n: EBR68288401
The 42PW350 uses 8 Driver ICs on one Y-Drive Board commonly called “Y-Drive Buffers” but are actually Gate Arrays.
Y-Drive Board works as a path supplying the Sustain and Reset waveforms which are made in the Y-Sustain board and sent to the Panel through Scan Driver IC’s.
The Y-Drive Boards receive a waveform developed on the Y-SUS board then selects the horizontal electrodes sequentially starting at the top and scanning down the panel.top and scanning down the panel.Scanning is synchronized by receiving Logic scan signals from the Control board.
June 2011 42PW350 Plasma 100
Key Points of interest are;
Y-Drive Board Layout
Key Points of interest are;
There are 6 FPC (Flexible Ribbon Cables) connecting the Y-Drive board to the Panel. These FPC connect to a total of 1080 individual l t d d t i i V ti l l tielectrodes determining Vertical resolution.
Floating Ground is delivered to the Y-Drive board via all 3 connectors. P101 is only FG.
Y S d VPP d li d t th Y D i
Y-DRIVE BOARD
P101 All PinsFloating Ground
Y-Scan and VPP are delivered to the Y-Drive board by P106.
The Y-Drive board operates from Floating Ground, (no reference to Chassis Gnd). However, whenP102 top 10 pins FG (no reference to Chassis Gnd). However, when reading the Y-Drive Waveform with a scope, use chassis ground only.
Floating Gnd 5V can be measured across C18 or C523 f t l t l ti it
Bottom 2 pins FG5V
P106Top 2 pin Y-ScanPins 10~9 VPP C523 surface mount electrolytic capacitors or
Fuse FL1 next to P102.
Pins 10 9 VPPPins 1~6 Logic (Scan
Control signals
June 2011 42PW350 Plasma 101
Y-Drive Diode Check Scan and FG
Y SUSPANEL
This checks the output Buffers or the input side of the board.
Y-SUS SIDE
PANEL SIDE
FG5V TP
P101Floating Gnd
Any Connector to the Panel (Buffer Output TP) Front Side
C18 +
FG5V TP
Scan Signal TPOL with Red Lead on Scan1.13V with Black Lead on Scan
Diode Mode Reading from Floating GroundFloating Gnd
FL1
P102
FG5V TP (P106 pins 2 and 3)
VPP Signal TPOL with Red Lead on Scan0.67V with Black Lead on Scan
P102
FG5V TP (P106 pins 2 and 3)OL with Red Lead on Scan0.53V with Black Lead on Scan
Any Output Buffer TPOL with Red Lead on Scan
Y-Scan
VPPTP
P106
June 2011 42PW350 Plasma 102
OL with Red Lead on Scan0.80V with Black Lead on Scan
TP
Y-Drive Buffer TroubleshootingYou can Check for a shorted Buffer output using this check.
6 Ribbon cables communicating with the Panel’s (Horizontal
Using the “Diode Test” on the DVM, check
FRONT SIDEBACK SIDEAny connector going to the Panel.
6 Ribbon cables communicating with the Panel s (Horizontal Electrodes) totaling 1080 lines determining the Panel’s Vertical resolution pixel count.
the pins for shorts or abnormal loads.
BUFFER IC (FGnd)
RED LEAD OnFloating Ground
BLACK LEAD On “ANY” Output Lug Reads 0.80V
White outline on Left
BLACK LEAD OnFloating Ground
RED LEAD On “ANY” Output Lug Reads Open
Any of these output lugs can be checked from
Indicated by white outline
June 2011 42PW350 Plasma 103
floating ground. Look for shorts indicating a defective Buffer IC
Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower
Flexible Ribbon Cables shown may be different, but process is the same.To remove the Ribbon Cable from the connector first carefully lift the Locking Tab fromthe back and tilt it forward ( lift from under the tab as shown in Fig 1). The locking tab must be standing straight up as shown in Fig 2.Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)Gently slide the Ribbon Cable free from the connectorGently slide the Ribbon Cable free from the connector.
Gently PryUp Here
Be sure ribbon tab is releasedBy lifting the ribbon up slightly,
before removing ribbon.
Locking tab in upright position
Fig 1 Fig 3Fig 2
June 2011 42PW350 Plasma 104
To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).
The Ribbon Cable is clearly improperly seated
Incorrectly Seated Y-Drive Flexible Ribbon Cables
The Ribbon Cable is clearly improperly seated into the connector. You can tell by observing the line of the connector compared to the FPC, they should be parallel. p
The Locking Tab will offer a greater resistance to closing in the case.
Note the cable is crooked. In this case the Tab on the Ribbon cable was improperly seated at the t Thi b li i t itt t litop. This can cause bars, lines, intermittent lines abnormalities in the picture.
Remove the ribbon cable and re seat it correctlyRemove the ribbon cable and re-seat it correctly.
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P101 Y-Drive to Y-SUS P213 (Floating Ground)
P101 P213
All pins are Floating Ground.
Y-DriveBoard
Y-SUSBoard
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P102 "Y-Drive" to P212 "Y-SUS" Pin Label Run Diode Check Diode Check
P102 Y-Drive to Y-SUS P212 (Floating Ground 5V)
Y Drive Y SUSPin Label Run Diode Check Diode Check12~3 FGnd FGnd FGnd FGnd1~2 FG5V 5.06V OL 0.53V
Black Lead Red Lead
Y-DriveBoard
Y-SUSBoard
Floating Gnd Floating Gnd
Pins 1~10 Floating Ground
Note: Pin 1 is at the bottom. P211
FG5V (4.9V) measured from Pins 1 or 2 to Floating Gnd.
For Floating Ground, use any pin on P101. P102
g , y pP102Floating
Ground 5V TP
June 2011 42PW350 Plasma 107
P106 Y-Drive to Y-SUS P211 Y-Drive Logic Signals ExplainedThe purpose of the Logic Signals sent to the Y-Drive board are to address a specific gate out of the 8 Gate arrays (Buffers) to allow the output of the Y-Drive signal. The Panel is scanned from the Top (Gate
Pin LabelPins 7~11
P211 Connector
y ( ) p g p (1) to the Bottom (Gate 1080) every frame.
Pin Label
11~12 VSC (Y-Scan)
9~10 VPP
8 n/c8 n/c7 SUS_DN (FG)
6 CLK
5 STB
(4mSec per/div)
These signals look very similar
P211
4 OC1
3 DATA
2 OC2
These signals look very similar due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.
1 SUS_DN (FG)All logic pins about (420V p/p)
Pins 1~7 are Logic (Drive) Signals to the Y-Drive Upper.Y-DriveBoard
Y-SUSBoardP106
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g ( ) g
P106 P211
P106 Y-Drive to Y-SUS P211 Connector Diode Mode Testing
Measurements taken from Floating Gnd.For Floating Ground use any pin on P101.
P106 "Y-Drive" to P211 "Y-SUS" Pin Label Run Diode Check
11~12 VSC (Y-Scan) 146 2V OL11 12 VSC (Y Scan) 146.2V OL9~10 VPP 145V OL
8 n/c n/c OL
7 SUS DN (FG) FG FG_ ( )6 CLK 0.92V OL5 STB 2.24V OL4 OC1 2.26V OL3 DATA 0V OL
Y-Drive Y-SUS
3 0 O2 OC2 2.8V 1.52V1 SUS_DN (FG) FG FG
Black Lead on FG (Floating Gnd)Y DriveBoard
Y SUSBoard
Y-SUS Board should be DISCONNECTEDf th Di d M d t t
Diode Mode Readings taken with all connectors Disconnected.
DVM in Diode Mode
June 2011 42PW350 Plasma 109
for the Diode Mode test.DVM in Diode Mode.
Y-Drive FG5V Fuse Information
P102
Location FL1(FG5V)
2A/125V
FG1 Protects the Floating Ground 5V line (created by IC508 and T502 on the Y SUS board) FG5V is used on the Y Drive by all
/ 5
T502 on the Y-SUS board). FG5V is used on the Y-Drive by all the Y-Drive Gate Arrays (Buffers).
Diode Check with Board Disconnected.0 53V Red Lead on Floating Gnd
Diode Check with Board Connected.1 33V Black lead on Floating Ground
June 2011 42PW350 Plasma 110
0.53V Red Lead on Floating GndOL Black Lead on Floating Gnd
1.33V Black lead on Floating Ground.
CONTROL BOARD SECTIONThis Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon completion of this section the Technician will have a better understanding of the circuit and be able to locate voltage and diode mode test points needed for troubleshooting
• DC Voltage and Waveform Test Points• Diode Mode Test Points
SIGNALS
able to locate voltage and diode mode test points needed for troubleshooting.
SIGNALSMain Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)X B d D i Si l (RGB Add )
+5V (M5V) Developed on the SMPS
OPERATING VOLTAGES
X Board Drive Signals (RGB Address)
From the Y-SUS Supplied+18V (Routed through the Control board to the
Z-SUS)(Not used by the Control Board)
Developed on the Control Board +1.0V (IC703) for internal usep 1.0V (IC703) for internal use
+1.8V (IC701) for internal use
+3.3V (IC53) for internal use and for the X-Boards (TCPs)
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Control Board Pictorial p/n: EBR71200701
P2To Z-SUS13~15 11~12
P105
P218V
IC701
M5V
IC703IC101P105D101 Shouldbe blinking
P106LVDSVS_DA
F E t l T i
1~3 (18V)4~7 (M5V)
IC703IC101DDR
IC22
Pattern GeneratorFor Panel Test
P106For External Trigger
IC702 IC53
IC22SerialFlash
From IC533.3V
IC53
n/c (For ROM Updates)P107 P108P22To X-RightTo X-Left
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CONTROL BOARDP/N: EBR71200701
X125 MHz
IC702MCM
IC101
IC701
IC22SerialFlash
D1
IC703L1
P105
P107 P108 P22 n/c
Auto Gen
VS_DA
P2
P106
IC53
IC11
3.3V from IC53Pins 41~43
n/c Upgrades
3.3V from IC53Pins 8~10
4.94V
1.05V
1.06V
1.05V
3.3V 1.8V
1.8V On
3.31V
3.27V
42PW350 Control Board Layout Drawing
113 June 2011 42PW350 Plasma
TESTING THE CONTROL BOARD:Disconnect all connectors. Jump STBY 5V from SMPS P813 Pin 13 to pin 3 (top leg) of IC701Apply AC and turn on the Set. Observe Control board LED D1, if it’s blinking, most likely Control board is OK.
NO VIDEO or ABNORMAL VIDEO:* If the complaint is no video running the Panel Test causes video to appear or appear normal, suspect the Main board or LVDS cable.Note: LVDS Cable must be removed for Auto Gen to work.
3.3V and X-Drive Right RGB Signals
Ribbon CableY-SUS and Y Drive Signals
To Y-SUS
With the unit on, if D1 is not on, check 5V supply. Note: In this set M5V is routed from the SMPS (P811 pin 6) to the Z-SUS (P205), from the Z-SUS to the Y-SUS, from the Y-SUS to the Control board, from Control to Z-
SUS, Pins 4~7 of P101. If present replace the Control Board. If missing, see (To Test Control Board)
LVDS Videofrom Main
Z-Drive Creation SignalsM5V and 18V to Z-SUS
PANEL TEST: Disconnect P106 andRemove LVDS Cable. Short across Auto Gen TPs to generate a test pattern when A/C power is applied.
IC53 Diode Check Pin 2 (3.3V)All Connectors Connected0.52V Red Lead0.31V Blk LeadAll Connectors Removed0.66V Red Lead0.36V Blk Lead
18V generated by D506 on Y-SUS
1~3 (18V)4-7 (M5V)
IC701 (1.8V Regulator)(1) Gnd(2) 1.8V(3) 3.31V
3.3V and X-Drive Left RGB Signals
IC53 (3.3V Regulator)(1) 4.94V(2) 3.32V(3) Gnd
28~30 (18V)24-27 (M5V)
IC11(1) Gnd(2) 0V(3) 3.31V
X1Top: 1.6VBottom: 1.7V
IC22(1) 3.25V(2) 0V(3) 3.27V(4) 0V
(5) 3.28V(6) 0V(7) 3.27V(8) 3.31V
12
32
12
32
1 2
3
(1) 4.94V(2) 0V(3) Gnd(4) Gnd(5) Gnd(6) 0.83V(7) 0.61V(8) 0.52V
( 9) 1.92V(10) 1.06V(11) 1.06V(12) 1.06V(13) 6.1V(14) 4.96V(15) 3.31V(16) 5V
IC703 (1.0V Core Regulator)
DDRMemory
3D-SyncPin 50
3.48V p/p 60 Hz
Control Board Temperature Sensor Location (Chocolate)Note: The temperature circuit not only protects the panel from
overheating, but it also is responsible for manipulating the Y-Drive waveform as the panel changes temperature
Make sure the Chocolate(Heat Transfer Material) remains in place
waveform as the panel changes temperature.
Chocolate(Heat Transfer Material)Behind Control Board
(Heat Transfer Material) remains in place if the board is removed.
It makes contact with the Panel and IC103 (Temperature Sensor)
IC103
Pin 1
CONTROL BOARD TEMPERATURESENSOR LOCATION
BACK SIDE OF THE BOARD03) Gnd02) Gnd01) 3.3V
04) 3.3V05) Gnd06) 3.3V
IC103
Pin 1
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))
VS_DA Test Point on the Control Board
This signal can also be used to help lock
the scope when observing the LVDS
Note, this TP (VS DA) can be
gvideo signals.
(VS_DA) can be used as an External
Trigger for scope when locking onto
the Y-Drive (Scan) or the Z-Drive signal.
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Check the output of the Oscillator (Crystal) X1. The frequency of the sine wave is 25 MHZ.Mi i thi l k i l ill h lt ti f th l
X1 Checking the Crystal “Clock” on the Control Board
Osc. Check: 25Mhz Top Leg
Missing this clock signal will halt operation of the panel drive signals. X1
1.61V
CONTROLBOARD CRYSTAL
LOCATION
Osc. Check: 25Mhz Bottom Leg1.69V
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The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
Control Board Signal (Simplified Block Diagram)
If there is a bar defect on the screen, it could be a Control Board problem.
Basic Diagram of Control BoardControl Board to X Board
This Picture shows Signal Flow Distribution to help determine the failure depending on where the it shows on the screen.
MCM
Basic Diagram of Control Board Address Signal Flow
IC702
CONTROL BOARDMCM
IC101SerialFlash
16 bit words
Resistor Array
2 Buffer
X-DRIVE BOARD
PANEL
There are 12 total TCPs.
IC702MCM
256 Lines output Total
2 Buffer Outputs per TCP
128 Lines per Buffer
There are 12 total TCPs.
43072 Vertical Electrodes
43072 (RGB) / 3 =
1024 Total Pixels (H)
To LeftX-Board
To RightX-Board
To 6 TCPs To 6 TCPs
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P105 Control Board Connector to Y-SUS P101 Voltages and Diode Mode ChecksThese pins are very close together. Use Caution when taking Voltage measurements.
Pin P105 Label Silk ScreenPins 1 through 3
Receive 18V from the Y-SUS.Developed by D506
Note: 18V is labeled 15V on silk screen.
Pins 4 through 7 Receive M5V from the Y-SUS.Protected on Z-SUS by FS3
All the rest are deliveringY-SUS Waveform development and Y Drive logic signals to the Y SUSY-Drive logic signals to the Y-SUS Board (Y-Drive logic signals are simply routed right through the Y-SUS to the Y-Drive boards).
Note: The +18V is not used by the Control board, it is routed to the Z-SUS leaving on P2 Pins 13~15.
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The M5V also leaves on P2 Pins 11~12.
P105 Control to Y-SUS P101 Plug InformationNote: There are no voltages in Stand-By mode
Pin TIP: The ribbon cable between the Control board and the Y-SUS does not comeith ith f th b dwith either of the new boards.
P105 "Control" to P101 "Y-SUS"
Pin Label Run Diode Check Pin Label Run Diode Check
1~3 +15V 18.2V OL 20 STB 1.5V OL
4~7 +5V 4.94V 1.15V 21 RAMP_BLK 1.07V OL
8~11 Gnd Gnd Gnd 22 CLK 0.6V OL
P105
12 Dumy2 2.14V OL 23 SUS_DN 2.71V OL
13 Y-OE 0.03V OL 24 DUMMY_3 2.14V OL
14 PC 1.84V OL 25 DUMMY_1 1.07V OL
15 ER_DN 0.5V OL 26 DUMMY_4 1.35V OL
16 DATA_PRE 0.01V OL 27 SUS_UP_0 0.75V OL
17 ER_UP 0.3V OL 28 CTRL_OE 0.11V OL
18 SC A 1 45V OL 29 RAMP DN 2 17V OL18 SC_A 1.45V OL 29 RAMP_DN 2.17V OL
19 RAMP_UP 0.22V OL 30 Gnd Gnd Gnd
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Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
LVDS Cable P106 on Control board shown.Flip the locking tab upward to release.
P106 Control Board LVDS Signals
Pins are close together, use caution.
Video Signals from the Main Board to the Control Board are referred to as Low Voltage Differential Signals or LVDS. The video is delivered in 20 bit LVDS format. Their presence can be confirmed
ith th O ill b it i th LVDS i l ith SMPTE
P106LVDS
with the Oscilloscope by monitoring the LVDS signals with SMPTE Color Bar input. Loss of these Signals would confirm the failure is on the Main Board or the LVDS Cable itself.
Example of LVDS Video SignalPin 41 5mSec per/div 100mV p/p Pin 40 5mSec per/div 100mV p/p
Pin 41 2mSec per/div 100mV p/p Pin 40 2mSec per/div 100mV p/pExample of Normal Signals measured at 1V p/p at 10µSec
Pins 12~17 22~25 28~33 38~41 are LVDS Video Signals
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Pins 12 17, 22 25, 28 33, 38 41 are LVDS Video Signals.Pins 19~20 and 35~36 are clock signals for the data.
P106 Control Board LVDS Connector Voltages and Diode CheckP106 LVDS "Control" to P1401 "Main"Pin Label Run Diode Check Pin Label Run Diode Check51 Gnd Gnd Gnd 26 Gnd Gnd Gnd51 Gnd Gnd Gnd 26 Gnd Gnd Gnd50 VS_3D *0V OL 25 RE1+ 1.11V 1.31V49 UART_TXD 3.31V OL 24 RE1- 1.19V 1.31V48 UART_RXD 3.3V OL 23 RD1+ 1.11V 1.31V47 n/c n/c OL 22 RD1- 1.19V 1.31V46 n/c n/c OL 21 Gnd Gnd Gnd45 G d G d G d 20 RCLK1 1 16V 1 31V45 Gnd Gnd Gnd 20 RCLK1+ 1.16V 1.31V44 Gnd Gnd Gnd 19 RCLK1- 1.13V 1.31V43 Gnd Gnd Gnd 18 Gnd Gnd Gnd42 Gnd Gnd Gnd 17 RC1+ 1.11V 1.31V41 RE3+ 1.11V 1.31V 16 RC1- 1.19V 1.31V40 RE3- 1.19V 1.31V 15 RB1+ 1.11V 1.31V39 RD3+ 1.11V 1.31V 14 RB1- 1.19V 1.31V38 RD3- 1.19V 1.31V 13 RA1+ 1.11V 1.31V37 Gnd Gnd Gnd 12 RA1- 1.19V 1.31V36 RCLK3+ 1.16V 1.31V 11 Gnd Gnd Gnd35 RCLK3- 1.13V 1.31V 10 n/c n/c OL34 Gnd Gnd Gnd 9 n/c n/c OL
1
34 Gnd Gnd Gnd 9 n/c n/c OL33 RC3+ 1.11V 1.31V 8 n/c n/c OL32 RC3- 1.19V 1.31V 7 n/c n/c OL31 RB3+ 1.11V 1.31V 6 SDA 3.3V OL30 RB3- 1.19V 1.31V 5 *DISP_EN 3.05V OL29 RA3+ 1.11V 1.31V 4 SCL 3.3V OL
Bold Pins indicate 20 bit differential video signal
Pin 5 is the reason the LVDS cable must be removed to use the EX_AUTO_GEN shorting pins to create multiple internal generated test patterns (Panel Test).
Pin 5: Enables the Control Board
28 RA3- 1.19V 1.31V 3 PC_SER_DATA 3.31V OL27 Gnd Gnd Gnd 2 PC_SER_CLK 3.31V OL
1 Gnd Gnd Gnd
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Note: There are no voltages in Stand-By mode.
Bold Pins indicate 20 bit differential video signal
P2 Control Board Connector Pin ID and VoltagesVoltage and Diode Mode Measurements for the Control Board.Note: There are no voltages in Stand-By mode.
P2 "Control" to P201 "Z-SUS Board"Pin Label Run Diode Check1 Gnd Gnd Gnd
1
P2 Label
18V 5V
1 Gnd Gnd Gnd2 SUS_UP 0.22V OL3 Gnd Gnd Gnd4 SUS_DN 0.79V OL
Label5 n/c n/c OL6 ZBIAS 1.92V OL7 Gnd Gnd Gnd8 Vzbias-con 3.25V OL9 CTRL_EN Gnd OL
10 Y-OE 0.05V OL11~12 M5V 5.06V 1.15V13~15 (+15V) 18 2V OL13~15 (+15V) 18.2V OL
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Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
P107 Connector "Control Board” to “Left X Board” P23241~433.3V
P107 "Control" to P232 "X-Left"
Pin Label Run Diode Check Pin Label Run Diode Check
1Pin Label Run Diode Check Pin Label Run Diode Check
1 Gnd Gnd Gnd 27 n/c n/c OL
2 PDDS_A2_P11 1.11V 1.34V 28 PDDS_A2_P15 1.11V 1.34V
3 PDDS_A2_N11 1.32V 1.32V 29 PDDS_A2_N15 1.32V 1.32V
4 PDDS_A1_P11 1.11V 1.34V 30 PDDS_A1_P15 1.11V 1.34V
5 PDDS A1 N11 1.32V 1.32V 31 PDDS A1 N15 1.32V 1.32V
White hash k t
5 PDDS_A1_N11 1.32V 1.32V 31 PDDS_A1_N15 1.32V 1.32V
6 n/c n/c OL 32 n/c n/c OL
7 PDDS_CLK_P5 1.09V 1.34V 33 PDDS_CLK_P8 1.09V 1.34V
8 PDDS_CLK_N5 1.35V 1.32V 34 PDDS_CLK_N8 1.35V 1.32V
9 n/c OL 35 n/c n/c OL
10 PDDS A2 P12 1.11V 1.34V 36 PDDS A2 P16 1.11V 1.34V marks countas 5
_ _ _ _
11 PDDS_A2_N12 1.32V 1.32V 37 PDDS_A2_N16 1.32V 1.32V
12 PDDS_A1_P12 1.11V 1.34V 38 PDDS_A1_P16 1.11V 1.34V
13 PDDS_A1_N12 1.32V 1.32V 39 PDDS_A1_N16 1.32V 1.32V
14 n/c n/c OL 40 n/c n/c OL
15 PDDS_A2_P13 1.11V 1.34V 41 +3.3V 3.32V 0.66V_ _
16 PDDS_A2_N13 1.32V 1.32V 42 +3.3V 3.32V 0.66V
17 PDDS_A1_P13 1.11V 1.34V 43 +3.3V 3.32V 0.66V
18 PDDS_A1_N13 1.32V 1.32V 44 n/c n/c OL
19 n/c n/c OL 45 STB (0) 3.25V OL
20 PDDS_CLK_P7 1.09V 1.34V 46 STB (1) 3.25V OL
21 PDDS_CLK_N7 1.35V 1.32V 47 BLK (0) 1.76V OL
22 n/c n/c OL 48 POL (0) 1.89V OL
23 PDDS_A2_P14 1.11V 1.34V 49 X_ER_DN(0) 0.28V OL
24 PDDS_A2_N14 1.32V 1.32V 50 X_SUS_DN(0) 0.28V OL
25 PDDS_A1_P14 1.11V 1.34V
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26 PDDS_A1_N14 1.32V 1.32V
P108 Connector "Control Board” to “Left X Board” P331
8~103 3V
P108 "Control" to P331 "X-Right"
Pin Label Run Diode Check Pin Label Run Diode Check
13.3V
1 X_ER_DN(1) 0.28V OL 27 PDDS_A2_N19 1.32V 1.32V
2 X_SUS_DN(1) 0.28V OL 28 PDDS_A2_P19 1.11V 1.34V
3 POL (0) 1.89V OL 29 n/c n/c OL
4 BLK (0) 1.76V OL 30 PDDS_CLK_N10 1.35V 1.32V
5 STB (2) 3.25V OL 31 PDDS_CLK_P10 1.09V 1.34V
White hash k t
6 STB (3) 3.25V OL 32 n/c n/c OL
7 n/c OL 33 PDDS_A1_N20 1.32V 1.32V
8 +3.3V 3.32V 0.66V 34 PDDS_A1_P20 1.11V 1.34V
9 +3.3V 3.32V 0.66V 35 PDDS_A2_N20 1.32V 1.32V
10 +3.3V 3.32V 0.66V 36 PDDS_A2_P20 1.11V 1.34Vmarks count
as 511 n/c n/c OL 37 n/c n/c OL
12 PDDS_A1_N17 1.32V 1.32V 38 PDDS_A1_N21 1.32V 1.32V
13 PDDS_A1_P17 1.11V 1.34V 39 PDDS_A1_P21 1.11V 1.34V
14 PDDS_A2_N17 1.32V 1.32V 40 PDDS_A2_N21 1.32V 1.32V
15 PDDS_A2_P17 1.11V 1.34V 41 PDDS_A2_P21 1.11V 1.34V
16 n/c n/c OL 42 n/c n/c OL
17 PDDS_CLK_N9 1.35V 1.32V 43 PDDS_CLK_N11 1.35V 1.32V
18 PDDS_CLK_P9 1.09V 1.34V 44 PDDS_CLK_P11 1.09V 1.34V
19 n/c n/c OL 45 n/c n/c OL
20 PDDS_A1_N18 1.32V 1.32V 46 PDDS_A1_N22 1.32V 1.32V
21 PDDS_A1_P18 1.11V 1.34V 47 PDDS_A1_P22 1.11V 1.34V
22 PDDS_A2_N18 1.32V 1.32V 48 PDDS_A2_N22 1.32V 1.32V
23 PDDS_A2_P18 1.11V 1.34V 49 PDDS_A2_P22 1.11V 1.34V
24 n/c n/c OL 50 Gnd Gnd Gnd
25 PDDS_A1_N19 1.32V 1.32V
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26 PDDS_A1_P19 1.11V 1.34V
X BOARD (LEFT and RIGHT) SECTION
The following section gives detailed information about the X boards. These boards deliver h C l i f i i l d l d h C l b d h TCP (T d C ithe Color information signal developed on the Control board to the TCPs, (Taped Carrier
Packages). The TCPs are attached to the vertical FPCs, (Flexible Printed Circuits) which are attached directly to the panel. The X boards are the attachment points for these FPCs.These boards have no adjustment.
X-BOARD VOLTAGES:• VA: Originally developed on the Switched Mode Power Supply VA (Voltage for
Address) sent out P811 pin 5 to Z-SUS P7 pin 5. VA is routed through the Z-SUS board and out on P4 pins 11~12 (top two pins) to the Z SUB board P101 VAboard and out on P4 pins 11~12 (top two pins) to the Z-SUB board P101. VA leaves the Z-SUB board on P203 pins 3~4 (bottom 2 pins). VA arrives on the Left X-Board via P312 pins 3~4. VA leaves the Left X-Board P311 pins 3~4 and is sent to the Right X-Board arriving on P211 pins 3~4.arriving on P211 pins 3 4.
• 3.3V: Control board develops 3.3V (IC53). 3.3V leaves on connector P107 pins 41~43 and routes to the Left X-Board via ribbon connector P232 pins 9~11.
• 3.3V: Control board develops 3.3V (IC53). 3.3V leaves on connector P108 pins 8~10 and routes to the Left X-Board via ribbon connector P331 pins 42~44.
June 2011 42PW350 Plasma 125
X Board Additional Information
There are two X-Boards, the Left and the Right. As viewed from the rear of , gthe set.
The two X-Boards have very little circuitry. They are basically signal and voltage routing boards. g g
• They route Va voltage to all of the Taped Carrier Packages (TCPs). Va is introduced to the Left X board first, then the Left X-Board sends Va to the Right X-Board.g
• The X-Boards also route the Logic (Color) signals from the Control board to all of the Taped Carrier Packages (TCPs).
• The X Boards have connectors to 12 TCPs 6 on the left and right• The X-Boards have connectors to 12 TCPs, 6 on the left and right.
• There are a total of 12 TCPs and each TCP has 2 gate arrays, so there are a total of 24 buffers feeding the panel’s 5760 vertical electrodes which determine the Horizontal Resolution of the Paneldetermine the Horizontal Resolution of the Panel.
June 2011 42PW350 Plasma 126
X Board TCP Heat Sink Warning
NEVER run the television with this heat sink removed
The Vertical Address buffers (TCPs) Taped Carrier Packages have one
NEVER run the television with this heat sink removed. Damage to the TCPs will occur and cause a defective panel.
June 2011 42PW350 Plasma 127
heat sink indicated by the arrow. It protects all 12 TCPs.
P211, P232, P311 and P331 X Board Connector (VA and 3.3V)
Pins 3~4 Pins 3~4T f th L ft d Ri ht X D i B d
VAVA
3.3V 3.3V
Pins 9~11 Pins 42~44
Top of the Left and Right X-Drive Boards
P232 P331
P311P211 P311P211
This shows the routing for VA and for the 3.3V input to the X-Drive boards.
Using a regular diode check:Using a regular diode check:VA should be (OL)3.3V should be (0.53V)
June 2011 42PW350 Plasma 128
X Board Layout Primary Circuit Diode CheckThe two X-Boards have similar circuit layouts for the connections going to the TCPs, as shown below.
3.3VEC
Gnd
Pins 33~34EC
Pins 47~48
ECPins 3~4 Logic
VAPins 6~7 VA
Pi 44 45
TCP
Pins 44~45
- On the below: + On the below:
All Connectors to Control and Z-SUB boards are disconnected from Left X board.All readings are in Diode Mode from Chassis Ground
On any Va (0.45V) TCPs connected.On EC (0.45V) TCPs connected.On 3.3V (0.37V) TCPs connected.On any Va (OL) TCPs disconnected.
On any Va (OL) TCPs connected.On EC (OL) TCPs connected.On 3.3V (1.22V) TCPs connected.On any Va (OL) TCPs disconnected.
June 2011 42PW350 Plasma 129
On EC (OL) TCPs disconnected.On 3.3V (OL) TCPs disconnected.
On EC (OL) TCPs disconnected.On 3.3V (OL) TCPs disconnected.
TCP 3.3V B+ Check Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
Checking IC53 for 3 3V use center pin or Case of component
For Connectors P107 and P108 on the Control board,
C t l b d ti Checking IC53 for 3.3V, use center pin or Case of component.see Control board section.
With all connectors connected, place the Red Lead On 3.3V = Diode Check (0.53V)Black Lead On 3.3V = Diode Check (0.32V) 5.0V3.3V for TCPs
IC121 on 3.3V
3.3V in on Pins 1 ~ 5 only on P232 connector from the Control board
Control BoardWith all connectors removed, place the Red Lead On 3.3V = Diode Check (0.66V)Black Lead On 3.3V = Diode Check (0.36V)
Gnd
Control BoardP161 and P162
3.3V3.3V
All Connectors to All TCPs look very similar for the 3.3V test point. The
DC
Continuity
3.3V
picture shows the trace at pins 33 and 34 for each connector. There is a small feed trough and a Cap, you can use for Test Points.Example here from P305. You can only check for continuity back to IC231 you
June 2011 42PW350 Plasma 130
check for continuity back to IC231, you can not run the set with heat sink removed.
TCP (Tape Carrier Package)This shows the layout of the bottom ribbon cables connecting to the Panel’s Vertical electrodes, (Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.
Front
Y-SUB BoardVaX Drive Board
Fram
e
X_B/D
t panel HorizoRear pane
Control BoardLogic
3.3VConnector
e
ontal Ad
dress
el Vertical A
dd
TCPTaped Carrier 128 lines 128 lines
256 total lines
ChocolateLock
dress
Package256 VerticalElectrodes
TCPAttached directly to Flexible cable
Long BlackHeat Sink
June 2011 42PW350 Plasma 131
Back side of TCP Ribbon
TCP Connector Pin DescriptionAny X Board to Any TCP P201~P206 or P301~P3063.3V ORIGINATION
From Control board IC53 center leg.Leaves P107 to P232 and P108 to P331
VA: ORIGINATIONFrom Z-SUB P203 In Right X P312 3~4
Va: ROUTING:
TCP Testing
Leaves P107 to P232 and P108 to P331Arrives on X board Left P232 Pins 9~11
Arrives on X board Right P331 Pins 42~44
Va: ROUTING:Leaves Right X P311 pins 3~4To Left X : P211 pins 3~4
Fl ibl P i t d Ribb C bl t TCP IC
Look for any TCPs being discolored.Ribbon Damage. Cracks, folds Pinches, scratches, etc…
DIODE CHECKTCP DISCONNECTED
Must be checked on FPC
Flexible Printed Ribbon Cable to TCP IC
Red Lead on TCP VA OL
DIODE CHECKALL TCPs INSTALLED
Red Lead on TCP VA OLBlack Lead on TCP VA 0 47V
Va Gnd
EC 3.3VGnd
Gnd
Gnd
ECVaBlack Lead on TCP VA 0.5V
Red Lead on TCP 3.3V OLBlack Lead on TCP 3.3V 0.53V
EC OL either way
Black Lead on TCP VA 0.47V
Red Lead on TCP 3.3V 0.53VBlack Lead on TCP 3.3V 0.32V
EC (OL) either wayGndLogic
June 2011 42PW350 Plasma 132
5 10 15 25 30 35 40 45 501 20
EC OL either way
TCP Visual Observation. Damaged TCP
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed
This damaged TCP can, (at the location of the TCP).a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.
a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).b) Generate abnormal vertical bars, (colored noise).c) Cause the entire area driven by the TCP to be “All White” or “ALL BLACK”.d) Cause a “Single Pixel Width Line” defect. The line can be Red, Green or Blue.e) A dirty contact at the connector can cause b, c and d also.
“TCP”Tapped Carrier
Package
Look for burns, pin holes, damage, etc.
June 2011 42PW350 Plasma 133
P211 Left X Drive Connector from Right X Drive P311 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)
Pin Label Run Diode Check
P211 "X Drive Left" to “X Drive Right" P311
1 Gnd Gnd Gnd
2 Gnd Gnd Gnd
1P211
3 VA *55V Open
4 VA *55V Open
* Note: This voltage will vary in accordance with Panel Label.There are no Stand-By voltages on this connector.
June 2011 42PW350 Plasma 134
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
P232 Left X Drive Connector from Control Board P107 Information
(No Stand-By Voltages)P232 "X-Left" to P107 "Control" Note: All connector removed except TCPsPin Label Run Diode Check Pin Label Run Diode Check1 X_SUS_DN(0) 0.28V 1.87V 27 PDDS_A2_N14 1.32V 1.8V
2 X_ER_DN(0) 0.28V 1.87V 28 PDDS_A2_P14 1.11V 1.8V
3 POL (0) 1.89V 1.85V 29 Gnd Gnd Gnd
4 BLK (0) 1.76V 1.84V 30 PDDS_CLK_N7 1.35V 1.8V
5 STB (1) 3.25V 1.87V 31 PDDS_CLK_P7 1.09V 1.8V
P2326 STB (0) 3.25V 1.87V 32 Gnd Gnd Gnd
7 Gnd Gnd Gnd 33 PDDS_A1_N13 1.32V 1.8V
8 +3.3V 3.32V 1.23V 34 PDDS_A1_P13 1.11V 1.8V
9 +3.3V 3.32V 1.23V 35 PDDS_A2_N13 1.32V 1.8V
10 +3.3V 3.32V 1.23V 36 PDDS_A2_P13 1.11V 1.8V
1
11 Gnd Gnd Gnd 37 Gnd Gnd Gnd
12 PDDS_A1_N16 1.32V 1.8V 38 PDDS_A1_N12 1.32V 1.8V
13 PDDS_A1_P16 1.11V 1.8V 39 PDDS_A1_P12 1.11V 1.8V
14 PDDS_A2_N16 1.32V 1.8V 40 PDDS_A2_N12 1.32V 1.8V
15 PDDS_A2_P16 1.11V 1.8V 41 PDDS_A2_P12 1.11V 1.8V
16 Gnd Gnd Gnd 42 Gnd Gnd Gnd
17 PDDS_CLK_N8 1.35V 1.8V 43 PDDS_CLK_N5 1.35V 1.8V
18 PDDS_CLK_P8 1.09V 1.8V 44 PDDS_CLK_P5 1.09V 1.8V
19 Gnd Gnd Gnd 45 Gnd Gnd Gnd
20 PDDS_A1_N15 1.32V 1.8V 46 PDDS_A1_N11 1.32V 1.8V
21 PDDS_A1_P15 1.11V 1.8V 47 PDDS_A1_P11 1.11V 1.8V
22 PDDS_A2_N15 1.32V 1.8V 48 PDDS_A2_N11 1.32V 1.8V
23 PDDS_A2_P15 1.11V 1.8V 49 PDDS_A2_P11 1.11V 1.8V
24 Gnd Gnd Gnd 50 Gnd Gnd Gnd
25 PDDS_A1_N14 1.32V 1.8V
June 2011 42PW350 Plasma 135
Diode Mode Readings taken with all connectors Disconnected except TCPs. Black lead on Gnd. DVM in Diode Mode.
26 PDDS_A1_P14 1.11V 1.8V
P311 Right X Drive Connector from Left X Drive P211 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)
Pin Label Run Diode Check
P311 "X Drive Right" to “X Drive Left" P211
1 Gnd Gnd Gnd
2 Gnd Gnd Gnd
P311
3 VA *55V Open
4 VA *55V Open
1
* Note: This voltage will vary in accordance with Panel Label.There are no Stand-By voltages on this connector.
June 2011 42PW350 Plasma 136
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
P312 Right X Drive Connector from Z-SUB P203 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)
Pin Label Run Diode Check
P312 "X Drive Right" to “Z-SUB Left" P203
1 Gnd Gnd Gnd
2 Gnd Gnd Gnd
P312
3 VA *55V Open
4 VA *55V Open
1
* Note: This voltage will vary in accordance with Panel Label.There are no Stand-By voltages on this connector.
June 2011 42PW350 Plasma 137
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
P331 Right X Drive Connector from Control Board P108 Information
(No Stand-By Voltages)P331 "X-Right" to "Control" P108 Note: All connector removed except TCPsPin Label Run Diode Check Pin Label Run Diode Check1 Gnd Gnd Gnd 27 n/c n/c OL
2 PDDS_A2_P22 1.11V 1.8V 28 PDDS_A2_P18 1.11V 1.8V
3 PDDS_A2_N22 1.32V 1.8V 29 PDDS_A2_N18 1.32V 1.8V
4 PDDS_A1_P22 1.11V 1.8V 30 PDDS_A1_P18 1.11V 1.8V
5 PDDS_A1_N22 1.32V 1.8V 31 PDDS_A1_N18 1.32V 1.8V
P3316 Gnd Gnd Gnd 32 Gnd Gnd Gnd
7 PDDS_CLK_P11 1.09V 1.8V 33 PDDS_CLK_P9 1.09V 1.8V
8 PDDS_CLK_N11 1.35V 1.8V 34 PDDS_CLK_N9 1.35V 1.8V
9 Gnd Gnd Gnd 35 Gnd Gnd Gnd
10 PDDS_A2_P21 1.11V 1.8V 36 PDDS_A2_P17 1.11V 1.8V
1
11 PDDS_A2_N21 1.32V 1.8V 37 PDDS_A2_N17 1.32V 1.8V
12 PDDS_A1_P21 1.11V 1.8V 38 PDDS_A1_P17 1.11V 1.8V
13 PDDS_A1_N21 1.32V 1.8V 39 PDDS_A1_N17 1.32V 1.8V
14 Gnd Gnd Gnd 40 Gnd Gnd Gnd
15 PDDS_A2_P20 1.11V 1.8V 41 +3.3V 3.32V 1.23V
16 PDDS_A2_N20 1.32V 1.8V 42 +3.3V 3.32V 1.23V
17 PDDS_A1_P20 1.11V 1.8V 43 +3.3V 3.32V 1.23V
18 PDDS_A1_N20 1.32V 1.8V 44 Gnd Gnd Gnd
19 Gnd Gnd Gnd 45 STB (3) 3.25V 1.87V
20 PDDS_CLK_P10 1.09V 1.8V 46 STB (2) 3.25V 1.87V
21 PDDS_CLK_N10 1.35V 1.8V 47 BLK (0) 1.76V 1.85V
22 Gnd Gnd Gnd 48 POL (0) 1.89V 1.84V
23 PDDS_A2_P19 1.11V 1.8V 49 X_SUS_DN(1) 0.28V 1.87V
24 PDDS_A2_N19 1.32V 1.8V 50 X_ER_DN(1) 0.28V 1.87V
25 PDDS_A1_P19 1.11V 1.8V
June 2011 42PW350 Plasma 138
Diode Mode Readings taken with all connectors Disconnected except TCPs. Black lead on Gnd. DVM in Diode Mode.
26 PDDS_A1_N19 1.32V 1.8V
MAIN BOARD SECTIONThe following section gives detailed information about the Main board. This board contains the Microprocessor, Audio section, video section and all input, outputs. It also receives all input signals andMicroprocessor, Audio section, video section and all input, outputs. It also receives all input signals and processes them to be delivered to the Control board via the LVDS cable. The main tuner (Silicon Tuner using discreet components) which provides VSB (NTSC), 8VSB (Over the Air Digital Broadcast) and QAM (Cable Digital) is located on the main board. This board is also where the television’s software upgrades are accomplished through the USB input.This board has no mechanical adjustmentsThis board has no mechanical adjustments.
The Main Board Receives its operational voltage from the SMPS:
STBY 5V
DURING STAND-BY: From SMPS DURING RUN From SMPS : (STBY 5V remains):
• STBY 5V • +5V for Video processing
• 17V for Audio
OUTPUTS:
• Sends power supply turn on commands to the SMPS.• Distributes Key 1 and Key 2 to the Front IR/Key Pad Board.• Receives Intelligent Sensor data from the Front IR/Key Pad Board (via SCL/SDA). • Controls the front Power LEDs. • Distributes +3 3V ST to the Front IR Board• Distributes +3.3V_ST to the Front IR Board.• Routes 20 bit LVDS video and Panel Turn On signals to the Control Board.• Processes and Outputs all audio signals and sends them to the Invisible Speakers• Routes Optical Audio Out.• Receives and Transmits to the Motion Remote via RF.• Transmits 3D Sync to the 3D Shutter Glasses
June 2011 42PW350 Plasma 139
• Transmits 3D Sync to the 3D Shutter Glasses.
Main Board Layout and Identification
P501 to SMPS
P1401LVDS
IC14003D Formatter
IC101 Microprocessor
LVDS
P902t Ft IR Microprocessor
Video Processor
USB
to Ft IR
P1404Motion
HDMI
HDMI
PC
OpticalAudio RGB
Remote / 3D Transmitter
P700Audio
Remote
RF
PCAudio
Composite
June 2011 42PW350 Plasma 140
Rear Inputs
RFInRS232
pA/V
IC101Micro/Video
Processor
P1401
IC1400
P902
12
32
P1404 12
3
2
IC1401
IC700
P700
12
32
IC1406
IC506
IC504
IC1407
IC1202
1 2 3
123
IC600
IC507
IC1404
L1402
IC502
L503
D
G
SQ501
L506IC1201A2 A1
C
D200
IC103
L502
Q1401D
GS
D
GS
Q1402
X1400
C
BE
Q1400
P501
X200
24MhzL700L701
L702
L703
R-R+L-L+
D501
IC501
TUNER
MAIN BOARDp/n: EBT61267425 AUSLLJR
Other Main Boards p/n: EBR72942901 AUSLLHR
p/n: EBR71638619Interchangeable
Q901
C
B E
24Mhz
18. IF p17. IF n16. IF AGC15. Reset14. 3.3V13. 1.26V12. GND11. CVBS10. NC 9. SIF
8. NC 7. SDA 6. SCL 5. NC 4. NC 3. 5V
2. NC 1. NC
TU1300
C
A1 A2
IC1402
D805
IC1101
IC804
CBEQ807
Q1304
C
B E
C
B E
Q1305IC901
IC900
IC801C
B E
Q805
C
A1A2D803
IC802
CB
ECA1
A2D804 Q103
C BE Q8061
D801C
A1
A2
IC104
IC102
IC109
123
IC505
CB
EQ500
3
12
IC500
Q800
CB
EQ900
NANDFLASH
42PW350 Main (Front and Back) Layout Drawing
141 June 2011 42PW350 Plasma
P501 "Main" to P813 "SMPS"Pin Label STBY Run Diode Check1_2 a 17V 0V 17V Open3-4 Gnd Gnd Gnd Gnd5-7 a 5.1V 0.46V 5.17V 1.18V8 a c Error_Det 3.44V 4.02V 1.73V
9-12 Gnd Gnd Gnd Gnd13-14 STBY_5V 3.47V 5.14V 1.07V
15 a RL_ON 0V 3.28V 1.78V16 a d AC Det 0V 4.06V 1.04V17 b M_ON 0V 3.28V 1.79V18 e Auto_Gnd Gnd Gnd Gnd
P902 "MAIN" to "Front IR"Pin Label STBY Run Diode Check1 IR 2.84V 2.7V 2.63V2 Gnd Gnd Gnd Gnd3 Key1 3.3V 3.3V 1.77V4 Key2 3.3V 3.3V 1.77V5 LED_RED 3.25V 0V 1.72V6 Gnd Gnd Gnd Gnd7 EYE_SCL 3.3V 3.3V 1.72V8 EYE_SDA 3.3V 3.3V 1.72V9 Gnd Gnd Gnd Gnd10 3.3VST 3.3V 3.3V 0.85V11 n/c n/c n/c n/c12 n/c n/c n/c n/c13 Touch_Ver_Check 0.19V 0V 1.69V14 n/c n/c n/c Open15 n/c n/c n/c Open
P1404 "MAIN Board" To "Motion Remote Sensor"
Pin Label STBY Run Diode Check
1 3.3V_Normal 0V 3.29V 0.49V
2 Gnd Gnd Gnd Gnd
3 3D_RF_RX 0V 3.29V 1.18V
4 3D_RF_TX 0V 3.29V 1.17V
5 3D_RFModule_Reset 0V 3.1V 2.37V
6 3D_RFModule_DC 0V 0.1V 1.32V
7 3D_RFModule_DD 0V 0.1V 1.34V
8 Gnd Gnd Gnd Gnd
9 3D_RF_GPIO_0 0V 0V 1.26V
10 3D_RF_GPIO_1 0V 0V/3.18V 1.26V
11 3D_RF_GPIO_2 0V 0V 1.26V
*12 3D_L/R_Sync 0V 0V/1.59V Open
*No 3D / With 3D
Note: Pin 12 with 3D Sync 3.48V p/p 60 Hz square wave.
3.3V_ST5V_ST in (3)
+1.5V_DDR_IN+5V_ST_EN In in
Serial Flash
DDR
Audio AmpEDID
EDID
RS232
EDID
DDR
DDR
3D Formatter
+1.8V+3.3V_3D_A In (3)
Serial Flash
+1.0V+5V in
+3.3V Reg
+5V in (3)
HDCP EEPROMEEPROM
+1.26V_VDDC) Reg +5V_ST_EN In +5V_ST_EN Switch
+5V_ST In
+3.3V+5V in
+2.5V_AVDD+3.3V_AVDD
USB +5V OCP+5V in
+5V_TU17V in
+3.3V_AVDD+5V_ST_EN In
EDID+1.2V_DE+3.3V in (3)
Tuner SIF
Tuner CVBS
Hot Swap
B+ Routing
Q501 CTL
HDMI CEC Hot SwapEDID WP
RS232 TX Buffer
Hot Swap
+3.3V_3D Reg
SDA_3.3V_MODSCL_3.3V_MOD
LED_RedDriver
Serial Flash WP
IC101Micro/Video
Processor
P1401
IC1400
P902
12
32
P14041
23
2
IC1401
IC700
P700
12
32
IC1406
IC506
IC504
IC1407
IC1202
1 2 3
123
IC600
IC507
IC1404
L1402
IC502
L503
Q501
L506
IC1201
A2 A1
C
D200
IC103
Q901
L502
Q1401
DGS
DGS
Q1402
X1400
C
BE
Q1400
P501
X200
24MhzL700L701
L702
L703
R-R+L-L+
D501
IC501
TUNER
MAIN BOARDp/n: EBT61267425 AUSLLJR
Other Main Boards p/n: EBR72942901
AUSLLHRp/n: EBR71638619
Interchangeable
C
B E
D
S
G
24Mhz
42PW350 Main (Front) Layout Drawing
142 June 2011 42PW350 Plasma
18. IF p17. IF n16. IF AGC15. Reset14. 3.3V13. 1.26V12. GND11. CVBS10. NC 9. SIF
8. NC 7. SDA 6. SCL 5. NC 4. NC 3. 5V
2. NC 1. NC
TU1300
+1.5V_DDR_IN+5V_ST_EN In in
Serial Flash
DDR
Audio Amp
DDR
DDR
3D Formatter
+1.8V+3.3V_3D_A In (3)
+1.0V+5V in
+3.3V_3D Reg+5V in (3)
+5V_ST_EN Switch+5V_ST In
+3.3V+5V in
USB +5V OCP+5V in
+5V_TU17V in
+3.3V_AVDD+5V_ST_EN In
+1.2V_DE+3.3V in (3)
+1.26V_VDDC+5V_ST_EN In
+3.3V Reg
SDA_3.3V_MODSCL_3.3V_MOD
LED_RedDriver
Serial Flash WP
42PW350 Main Board Front Side Component Voltages
IC103 Serial IC502 +1.26V_VDDC IC507 +5V_TU IC1404 +1.0V Q501 +5V_ST_ENFlash Pin Regulator Pin Regulator Pin Regulator Pin Switch
Pin For HDMI [1] 5V (In) [1] 11.1V [1] 5V (In) [B] 0.7V[1] Gnd [2] 5V (In) [2] 17V [2] 0V [C] 5.2V[2] Gnd [3] 0V [3] 3.1V [3] 0V [E] 5.2V[3] Gnd [4] 0V [4] 1.8V [4] 0V[4] Gnd [5] 081V [5] 0.8V [5] 0V Q901 LED_RED[5] 3.29V [6] 0.81V [6] 0.6V [6] 0.8V Pin Driver[6] 3.29V [7] 0.72V [7] 0V [7] 0.65V [B] 0.71V[7] 3.29V [8] 0.53V [8] 5V [8] 0.54V [E] 0V[8] 3.29V [9] 1.7V [9] 1.7V [C] 0V
[10] 1.3V IC600 +1.2V_DE [10] 1.05VIC501 +1.5V_DDR_IN [11] 1.3V Pin Regulator [11] 1.05V Q1400 Write Protect
Pin Regulator [12] 1.3V [1] 3.3V (In) [12] 1.05V Pin for IC1402[1] 5V (In) [13] 6.47V [2] 1.26V (Out) [13] 6.1V [B] 0V[2] 5V (In) [14] 0.25V [3] Gnd [14] 0.15V [E] 0V[3] 0V [15] 2.96V [15] 2.9V [C] 3.18V[4] 0V [16] 5V (In) [16] 0V[5] 0V Q1401 SCL_3.3V_MOD[6] 0.81V IC504 +3.3V_AVDD D200 Reset IC1406 +3.3V_VST Pin Buffer[7] 0.72V Pin Regulator Pin Speed Up Pin +3.3V_3D [B] 3.28V[8] 0.53V [1] 0V [A1] 0V [1] 0V [C] 3.3V[9] 1.7V [2] 3.3V (Out) [C] 0V [2] 3.31V (Out) [E] 3.28V
[10] 1.58V [3] 5.2V (In) [A2] 0V [3] 5V (In)[11] 1.58V Q1402 SDA_3.3V_MOD[12] 1.58V IC506 +3.3V D501 Reg IC1407 (+1.8V) Pin Buffer[13] 6.7V Pin Regulator Pin IC507 Pin Regulator [B] 3.28V[14] 0.12V [1] 0V [A] 0V [1] 0V [C] 3.3V[15] 2.98V [2] 3.3V (Out) [C] 5V [2] 1.8V (Out) [E] 3.28V[16] 2.98V (In) [3] 5.2V (In) [3] 3.3V (In)
143 June 2011 42PW350 Plasma
18. IF p17. IF n16. IF AGC15. Reset14. 3.3V13. 1.26V12. GND11. CVBS10. NC 9. SIF
8. NC 7. SDA 6. SCL 5. NC 4. NC 3. 5V
2. NC 1. NC
Digital Video
Analog Video
C
A1A2
TU1300
IC1402
D805
IC1101
IC804
CB
EQ807
Q1304C
BE
C
BE
Q1305 IC901
IC900
IC801
C
BEQ805
C
A1 A2
D803IC802
CB
EC
A1
A2D804Q103 C
B
E
Q8061
D801C
A1
A2
IC102IC109
1 2 3
IC505
CB
E
Q5003
1 2
IC500
Q800
MAIN BOARDp/n: EBT61267425 AUSLLJR
Other Main Boards p/n: EBR72942901 AUSLLHR
p/n: EBR71638619Interchangeable
CB
E
Q900
IC104NANDFLASH
144
42PW350 Main Back Layout Drawing
June 2011 42PW350 Plasma
3.3V_ST5V_ST in (3)
EDID
EDID
RS232EDID
Serial Flash
HDCP EEPROM
+3.3V+5V in
USB +5V OCP+5V in
EDID
EEPROM
Tuner SIF
Tuner CVBS
Hot Swap
B+ Routing
Q501 CTL
HDMI CECHot Swap
EDID WP
RS232 TX Buffer
Hot Swap
42PW350 Main Board Back Side Component Voltages
IC102 HDCP IC505 +2.5V_AVDD IC900 RS232 Tx/Rx IC1101 USB 5V Q800 HDMI CEC Q1305 TunerEEPROM Pin Regulator Pin Pin Limiter Pin Buffer Pin CVBS
Pin [1] 3.3V (In) [1] 3.3V [1] Gnd [1 B] 3.29V [B] 3.63V[1] Gnd [2] Gnd [2] 5.6V [2] 5.1V (In) [2 S] 3.29V [C] 0V[2] Gnd [3] 2.52V (Out) [3] 0V [3] 5.1V (In) [3 D] 3.23V [E] 4.3V[3] 3.3V [4] 0V [4] 3.3V [4 G] 3.3V[4] Gnd IC801 IC801, IC802 [5] (-5.6V) [5] 0V D801 Biasing[5] 3.3V EDID Data [6] (-5.6V) [6] 5.1V (Out) Q806 Hot Pin for Q800[6] 3.3V Pin For HDMI [7] 5.7V [7] 5.1V (Out) Pin Swap [A1] 3.28V[7] 3.3V [1] Gnd [8] 0V [8] n/c [B] 0V [C] 3.32V[8] 3.3V [2] Gnd [9] 3.3V [C] 0V [A2] 0V
[3] Gnd [10] 0V IC1402 Serial [E] 0VIC109 EEPROM [4] Gnd [11] 3.3V Pin Flash D803 5V
for Micro [5] 3.3V [12] 3.3V [1] 3.29V Q807 Hot Pin RoutingPin [6] 3.3V [13] 0V [2] 0V Pin Swap [A1] 0V[1] Gnd [7] 3.3V [14] (-5.6V) [3] 3.3V [B] 0.1V [C] 3.32V[2] Gnd [8] 3.3V [15] Gnd [4] 0V [C] 0V [A2] 3.28V[3] Gnd [16] 3.3V (B+) [5] 0V [E] 0V[ ] [ ] ( ) [ ] [ ][4] Gnd IC804 EDID Data [6] 0V D804 5V[5] 3.3V Side Input IC901 EDID Data [7] 3.29V Q900 Hot Pin Routing[6] 0V Pin For HDMI for PC [8] 3.29V Pin Swap [A1] 3.28V[7] 3.3V [1] Gnd Pin For HDMI [B] 0.63V [C] 3.32V[8] 3.3V [2] Gnd [1] Gnd Q103 EDID [C] 0V [A2] 0V
[3] Gnd [2] Gnd Pin WP [E] 0VIC500 3.3V_VST [4] Gnd [3] Gnd [B] 0V D805 5V
Pin Regulator [5] 3.3V [4] Gnd [C] 5V Q1304 Tuner Pin Routing[1] Gnd [6] 3.3V [5] 3.3V [E] 0V Pin SIF [A1] 5.1V[2] 3.3V (Out) [7] 3.3V [6] 3.3V [B] 0.23V [C] 4.9V[3] 5.09V (In) [8] 3.3V [7] 3.3V Q500 +5V_ST_EN [C] 0V [A2] 0V
[8] 3.3V Pin Switch CTL [E] 0.92V[B] 0.64V[C] 0V[E] 0V
145 June 2011 42PW350 Plasma
Main Board Tuner Explained
TU1300
Pop the cover off to expose the Tuner Pins. Or flip the board over to access the back side of access to the pins.
C f
18. IF p17. IF n16. IF AGC15. Reset14 3 3V TU
Check for Digital signal 700mV p/p on pins 17 and 18.
Check for Tuner B+:+5V_TU Pin 3 (provided by IC507 pin 8)1.2V_DE Pin 13 (provided by IC600 pin 1)+3.3V Pin 14 (provided by IC506 pin 2)
14. 3.3V_TU13. 1.26V_TU12. GND11. CVBS10. NC
9. SIF
8. NC7. SDA6. SCL5. NC4. NC
Data only present during channel change on SDA/SCL. approx:. 4V p/p.
4. NC3. 5V_TU
2. NC1. NC
Front bottom right hand side
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Front bottom right hand side
Main Board Crystal X200 and X1400 CheckX1400 25Mhz
X14001.51V 1.61V
X1400 Runs only when set is on.(3D Formatter IC1400 Crystal)
Right Side 4.73V p/pLeft Side 3.41V p/p
X200 R h li dX200 Runs when power applied.(Micro Crystal) X200 25MHZX1400
X200
1.67V 1.66VBottom Side 3.0V p/pTop Side 3.38V p/p
X200
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MAIN Board Crystal Location
Bottom Side 3.0V p/pTop Side 3.38V p/p
Main Board Removing the LVDS Cable or Power Supply Connector
(1) Using your fingers and press in gently on the two locking tabs. ( ) g y g p g y gThen rock the connector out of the plug.
(2) Pull the Cable from the Connectorby rocking back and forth.
P501 Main or P813 SMPS
If the Connector Locks have been damaged and will not release, cut off tabs. Use a thin object and slide straight down j g
as indicated by the arrows below and release the locks.
CutCutOffOff
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P501 Main Board Plug to Power Supply Voltages and Diode CheckPin front
P501 "Main" to P813 "SMPS"
P501
F t i dd
Pin Label STBY Run Diode Check
1_2 a17V 0V 17V Open
3-4 Gnd Gnd Gnd GndFront pins are oddBack pins are even
5-7 a5.1V 0.46V 5.17V 1.18V
8 a cError_Det 3.44V 4.02V 1.73V
9-12 Gnd Gnd Gnd Gnd
13-14 STBY_5V 3.47V 5.14V 1.07V
15 aRL_ON 0V 3.28V 1.78V
16 a dAC Det 0V 4.06V 1.04V
17 bM ON 0V 3 28V 1 79V
a Note: The RL_On turns on +5V, 17V Error Det. and AC_DET.b Note: The M5-On command turns on M5V Va and Vs
17 bM_ON 0V 3.28V 1.79V
18 eAuto_Gnd Gnd Gnd Gnd
b Note: The M5-On command turns on M5V, Va and Vs.c Note: The Error Det line is not used in this model.d Note: If the AC Det line is Missing, Audio will Mute.e Note: Pin 18 is grounded on the Main. If opened, the power supply turns on automatically.
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Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P700 Main Board Speaker Plug Voltage and Diode Check
P700 Connector "Main" to "Speakers"
Pin Label Run Diode Mode1 R- 0V~1.0V Open2 R+ 0V~1.0V Open
P700 Connector Main to Speakers
IC700Audio Amp
2 R 0V 1.0V Open3 L- 0V~1.0V Open4 L+ 0V~1.0V Open
Audio Right out pin 6 and 9.Audio Left out pin 10 and 13.
17V Audio Amp Power: Right pins 8. Left pins 11.3 3V Low Voltage Signal Processing: Pins 21 35 13.3V Low Voltage Signal Processing: Pins 21, 35.Audio Mute: Pins 23, control is AC_DET.
Rig
ht (-
)R
ight
(+)
Left
(-)Le
ft (+
)
June 2011 42PW350 Plasma 150
P700Speaker ConnectorDiode Mode Check with the Board Disconnected. DVM in the Diode mode.
Voltage and Diode Mode Measurements for the Main Board
P902 Main Board Plug to IR Board1
P902 "MAIN" t "F t IR"
3 & 4S ft T h
P902 "MAIN" to "Front IR"Pin Label STBY Run Diode Check1 IR 2.84V 2.7V 2.63V2 Gnd Gnd Gnd Gnd
1 Infrared Receiver
7 & 8Intelligent
Soft Touch Key Board
3 Key1 3.3V 3.3V 1.77V4 Key2 3.3V 3.3V 1.77V5 LED_RED 3.25V 0V 1.72V6 Gnd Gnd Gnd Gnd
10
Intelligent Sensor 7 EYE_SCL 3.3V 3.3V 1.72V
8 EYE_SDA 3.3V 3.3V 1.72V9 Gnd Gnd Gnd Gnd
10 3.3VST 3.3V 3.3V 0.85V
Stand-By 3.3V
11 n/c n/c n/c n/c12 n/c n/c n/c n/c13 Touch_Ver_Check 0.19V 0V 1.69V14 n/c n/c n/c Open13 15 n/c n/c n/c OpenSoft Touch
Sensitivity Setting
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Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P1401 Main Board LVDS Video Signal Test Points
Waveforms Taken from P1401 pins 11 and 12, but there are actually 20 pins carrying video.
P106Control
P1401 Main
Pin Pin y p y gInput Signal SMPT Color Bar. 20mV per/div.
Pin 11 5mSec per/div 100mV p/p Pin 12 5mSec per/div 100mV p/pP140151 1
50 2 3D-Sync49 3 TXD48 4 RXD47 546 645 744 843 942 1042 1041 11 Video40 12 Video39 13 Video38 14 Video37 1536 16 CLK35 17 CLK34 1833 19 Video
Pin 11 2mSec per/div 100mV p/p Pin 12 2mSec per/div 100mV p/p
The rest of the Waveforms are very similar in appearance and Peak to Peak.
32 20 Video31 21 Video30 22 Video29 23 Video28 24 Video27 2526 2625 27 Video24 28 Video23 29 Video
Main Board
Note1: The Control Board has Test Points that make taking measurements easier to take.
Note2: The Control Board pins are
23 29 Video22 30 Video21 3120 32 CLK19 33 CLK18 3417 35 Video16 36 Video15 37 Video14 38 Video Main Board
P1401 LocationNote2: The Control Board pins are reversed from the Main Board. Pin 1 is at the bottom of P106 connector. Use the table on the left.
Note3: Use the VS DA Test Point and
13 39 Video12 40 Video11 4110 429 438 447 456 465 47 Disp_En4 48
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Note3: Use the VS_DA Test Point and external trigger to help lock the scope onto the video waveforms.
4 483 492 501 51
P1401 Main Board LVDS Voltage and Diode Check
P1401 "Main" to P106 LVDS "Control" Pin Label Run Diode Check Pin Label Run Diode Check
P1401
1 Gnd Gnd Gnd 26 Gnd Gnd Gnd2 VS_3D *0V OL 27 TE1P 1.11V 1.25V3 UART_TXD 3.31V OL 28 TE1N 1.19V 1.25V4 UART_RXD 3.3V OL 29 TD1P 1.11V 1.38V5 n/c n/c n/c 30 TD1N 1.19V 1.37V6 n/c n/c n/c 31 Gnd Gnd Gnd6 n/c n/c n/c 31 Gnd Gnd Gnd7 Gnd Gnd Gnd 32 RCLK1P 1.16V 1.25V8 Gnd Gnd Gnd 33 RCLK1N 1.13V 1.25V9 Gnd Gnd Gnd 34 Gnd Gnd Gnd
10 Gnd Gnd Gnd 35 TC1P 1.11V 1.25V11 TE2P 1.11V 1.25V 36 TC1N 1.19V 1.25V12 TE2N 1.19V 1.25V 37 TB1P 1.11V 1.38V13 TD2P 1.11V 1.38V 38 TB1N 1.19V 1.37V14 TD2N 1.19V 1.37V 39 TA1P 1.11V 1.38V15 Gnd Gnd Gnd 40 TA1N 1.19V 1.37V16 RCLK2P 1.16V 1.25V 41 Gnd Gnd Gnd17 RCLK2N 1 13V 1 25V 42 n/c n/c n/c17 RCLK2N 1.13V 1.25V 42 n/c n/c n/c18 Gnd Gnd Gnd 43 n/c n/c n/c19 TC2P 1.11V 1.25V 44 n/c n/c n/c20 TC2N 1.19V 1.25V 45 n/c n/c n/c21 TB2P 1.11V 1.38V 46 SDA 3.3V OL22 TB2N 1.19V 1.37V 47 DISP_EN 3.05V 1.0V_23 TA2P 1.11V 1.38V 48 SCL 3.3V OL24 TA2N 1.19V 1.37V 49 PC_SER_DATA 3.31V OL25 Gnd Gnd Gnd 50 PC_SER_CLK 3.31V OL
51 Gnd Gnd Gnd* Pin 50 0V (No 3D) 1.65V (With 3D)Pins in Bold are Video pins (20 Total)
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Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P1404 Main Board Motion Remote and 3D Transmitter Voltage and Diode Check
P1404 "MAIN Board" To "Motion Remote Sensor" P14040 oa d o ot o e ote Se so
Pin Label STBY Run Diode Check
1 3.3V_Normal 0V 3.29V 0.49V
2 Gnd Gnd Gnd Gnd
3 3D_RF_RX 0V 3.29V 1.18V
Pin
_ _4 3D_RF_TX 0V 3.29V 1.17V
5 3D_RFModule_Reset 0V 3.1V 2.37V
6 3D_RFModule_DC 0V 0.1V 1.32V
7 3D_RFModule_DD 0V 0.1V 1.34V
8 Gnd Gnd Gnd Gnd
9 3D_RF_GPIO_0 0V 0V 1.26V
10 3D_RF_GPIO_1 0V 0V/3.18V 1.26V
11 3D_RF_GPIO_2 0V 0V 1.26V
*12 3D_L/R_Sync 0V 0V/1.59V Open
*No 3D / With 3D
Note: Pin 12 with 3D Sync 3.48V p/p 60 Hz square wave.
RF Freq GPIO 0 (9) GPIO 1 (10) GPIO 2 (11)3D Disable 0 0 0
60Hz 1 0 0
59.94Hz 0 1 0
June 2011 42PW350 Plasma 154
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
FRONT IR, POWER LED and SOFT TOUCH KEY PAD SECTIONThe following section gives detailed information about the Front IR and Soft Touch Key Pad. These boards contains the Infrared Receiver, Intelligent Sensor and PowerKey Pad. These boards contains the Infrared Receiver, Intelligent Sensor and Power LEDs section.
The Soft Touch Function Keys is actually a thin pad adhered to the front protective shield and actually underneath (as viewed from the rear) the Front IR Board.shield and actually underneath (as viewed from the rear) the Front IR Board.
The Power LED is driven by LED_RED pin from the Micro IC101. Sent to the base of Q901 and then to P902 pin 4. Then sent to the Ft. IR board connector pin 5 P100.This board has no adjustments other than the Soft Touch Key board sensitivity fromThis board has no adjustments other than the Soft Touch Key board sensitivity from the Customer’s Menu.
The Front Control Board (IR and Intelligent Sensor) receives its operational B+ from the Main Board. 3.3V ST P100 pin 10 from the Main Board. This voltage is generated t e a oa d 3 3 _S 00 p 0 o t e a oa d s o tage s ge e atedon the Main Board by the 3.3V_ST Regulator (IC500) The Intelligent Sensor IC communicate with the Main Board Microprocessor (IC101) via Clock and Data lines out P100 to P902 pins 7 and 8.
The IR signal is routed back to the Main Board via pin 1.
Also, the Soft Touch Key Pad is routed through out P100 to P902 pins 3 and 4.
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Front IR and Intelligent Sensor Board Locations
Lower Left Side (As viewed from rear)Lower Left Side (As viewed from rear).
IR Receiver
P100 To Main Board
To gain access to the Front IR board, as viewed from the bottom of the TV, remove to two screws that hold the Front Right Speaker and pull the speaker out.
Screw Screw
June 2011 42PW350 Plasma 156
P100 IR Board Connector Voltage and Pin Identification
32KHz Pulse
P100 "Front IR and Soft Touch Keys" to "Main" Board P902Pin Label STBY Run Diode Check
3 & 4 For the Soft T h K P d
32KHz Pulse3.5V p/p 1 IR 2.84V 2.7V OL
2 Gnd Gnd Gnd Gnd3 Key1 3.3V 3.3V OL4 Key2 3.3V 3.3V OL
7 & 8 Front LEDsand
Touch Key Pad section.
4 Key2 3.3V 3.3V OL5 LED_RED 3.25V 0V OL6 Gnd Gnd Gnd Gnd7 EYE_SCL 3.3V 3.3V OL8 EYE SDA 3 3V 3 3V OL
10 Stand-By 3.3VFrom IC302
Intelligent Sensor 8 EYE_SDA 3.3V 3.3V OL9 Gnd Gnd Gnd OL10 3.3VST 3.3V 3.3V 2.3V11 n/c n/c n/c OL12 / / / OL12 n/c n/c n/c OL13 Touch_Ver_Check 0.19V 0V 0.62V14 n/c n/c n/c OL15 n/c n/c n/c OL
For Readings when any Key is touched, see Soft Key Pad SectionFor Key 1 and Key 2.
1P100
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Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
For Key 1 and Key 2.
Soft Touch Key Pad Resistance
d d d
P100 (Key 1, Key 2) Resistance Reading with Soft Touch Key pressed.
KEY Pin 3 measured from Gnd KEY Pin 4 measured
from Gndand Diode Mode
ChecksPower 3.0M Ohms Enter 3.0M Ohms
CH (Dn) 1.9M Ohms Menu 1.9M OhmsInput 900K Ohms Volume (+) 900K OhmsThe Front IR Board
h K b d CH (Up) 205K Ohms Volume (-) 205K Ohms
P100 Voltage Measurements with Soft Touch Key pressed.
KEY Pin 3 measured from Gnd KEY Pin 4 measured
from Gnd
has a Key board decoder that is generating these Resistance changes when a Soft Touch Key is touched from Gnd from Gnd
Power 2.4V Enter 2.42VCH (Dn) 1.6V Menu 1.6V
Input 0.9V Volume (+) 0.89V
is touched.This in turn pulls down the Key 1 and Key 2 lines to be interpreted by the Microprocessor.
P100 Connector “FT IR Board“ to P902 “Main” (No Key Pressed)Diode Mode
Input 0.9V Volume ( ) 0.89VCH (Up) 0.2V Volume (-) 0.2V
Pin Label STBY Run Diode Mode3 KEY 1 3.29V 3.29V 2.58V4 KEY 2 3.29V 3.29V 1.58V
Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
June 2011 42PW350 Plasma 158
MOTION REMOTE and 3D SYNC BOARD SECTION
The first time the Motion Remote has it’s batteries installed and pointed at the Television, the Motion Remote is synchronized with the TV. After that, whenTelevision, the Motion Remote is synchronized with the TV. After that, when pointing the remote at the TV and pressing the Enter key, a pointer appears on screen, then by moving the Motion Remote around, the pointer moves with the movement of the remote. When the pointer is placed over a selectable button, you can press the center “Enter” button and active theselectable button, you can press the center Enter button and active the object. This makes navigation much easier.
You can also adjust the volume, change channels and mute the audio with the Motion Remote and it has a convenient “Home” button for the TV Menu.Motion Remote and it has a convenient Home button for the TV Menu.
A wrist band can be attached to the remote to avoid dropping and damaging the remote.
The Motion Remote utilizes a specialized receiver on the Television to receive the RF signal and this information is then routed to P1302 and on to the IC101 the BCM IC for pointer positioning and interpretation of the other functions.
How to Re-register the Magic Motion Remote Control after Registration Failure. Reset the remote control by pressing and holding both the ENTER and MUTE buttons for 5 seconds.
An LED will blink 3 times indicating the remote is ready for registering.
June 2011 42PW350 Plasma 159
Motion Remote “Magic Remote” AKB73295502
Motion Remote Receiver Board
The following section gives detailed information about the Motion Remote Receiver Board The Motion Remote Receiver receives signals from theReceiver Board. The Motion Remote Receiver receives signals from the Motion Remote to manipulate the On-Screen pointer.
The Motion Remote receives its operational B+ from the Main Board:
• 3.3V_Normal P1302 pin 1 from the Main Board to J1 Pin 1. This voltage is generated on the Main Board (IC505)
• 3 3V MULTI generated on the Main Board (IC402)• 3.3V_MULTI generated on the Main Board (IC402).
No Connector NumberSilk Screened on board
p/n: EBR72499601
1
June 2011 42PW350 Plasma 160
Motion Remote Receiver Board Close Up
Rear View
p/n: EBR72499601
No Connector No.
11
Front View
RF TransmitterReceiver
June 2011 42PW350 Plasma 161
Motion Remote Connector Voltage and Diode Check
"Motion Remote Sensor“ to P1302 "MAIN Board"Pin Label STBY Run Diode Check No LabelPin Label STBY Run Diode Check1 3.3V_Normal 0V 3.33V 0.49V2 Gnd Gnd Gnd Gnd3 M_REMOTE_RX 0V 3.29V 1.18V
No Label
4 M_REMOTE_TX 0V 3.3V 1.17V5 M_RFModule_Reset 0V 3.3V 2.37V6 DC_Mremote 0V 3.3V 1.32V7 DD Mremote 0V 3 3V 1 34V
1
7 DD_Mremote 0V 3.3V 1.34V8 Gnd Gnd Gnd Gnd9 3D_GPIO_0 0V 0V 1.26V
10 3D_GPIO_1 0V 0V/3.18V 1.26V11 3D_GPIO_2 0V 0V 1.26V12 3D Sync 0V 0V/1.59V Open
*Pin 10/12 voltages without 3D / with 3D
3.48V p/p60 Hz
Pin 12w/3D
Freq GPIO 0 GPIO 1 GPIO 2
3D Disable 0 0 0
60Hz 1 0 0
59.94Hz 0 1 0
June 2011 42PW350 Plasma 162
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
INVISIBLE SPEAKER SYSTEM SECTION
The 50PZ950 contains the Invisible Speaker system
Invisible Speaker System Overview (Full Range Speakers) p/n: EAB62028901
The 50PZ950 contains the Invisible Speaker system.The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports.
Installed Bottom View
Anti Rattle Pad
Anti Rattle Pad
Reading across speaker wires,
8.2 ohm.
Remove two screwsfrom the bottom
Rear View Front View
Speaker
June 2011 42PW350 Plasma 163
SpeakerConnection
INTERCONNECT DIAGRAM (11 X 17 Foldout) SECTION
This section shows the Interconnect Diagram called the 11X17 foldout that’s available in the Paper and Adobe pversion of the Training Manual.
Use the Adobe version to zoom in for easier readingUse the Adobe version to zoom in for easier reading.
When Printing the Interconnect diagram, print from the Ad b i d i t t 11X17 i f b tAdobe version and print onto 11X17 size paper for best results.
June 2011 42PW350 Plasma 164
P6
FS2 VA
18V J1
J17
Z-SUSWaveform
P2
Vzbias TPR151
P4
10A/125V
7A/125V
6.3A/250V
P7
P3
Top 2 pins are VA11~12
Z-SUSP/N: EBR68342001
FS1 VS
FS3 (M5V)
5V J28
R1Y-OE
VR1Vzbias
FS1/FS2: Diode CheckOL: Connected or DisconnectedFS3: Diode Check0.76V: Connected1.03V: Disconnected
The Z-SUS will run stand alone.Disconnect P2 to the Y-SUS.Disconnect P105 on CTL. Board.Jump 17V from the SMPS J2 (just left of P813) to Z-SUS J1 (just above P6) connector.Ground Y-OE Z-SUS (bottom R1).Output Waveform J17 (281V p/p).
CONTROL BOARDP/N: EBR71200701
12
32X1
25 MHz
IC702
IC101
IC701
IC22
D1
IC703L1
P105
P107 P108 P22 n/c
Auto Gen
VS_DA
P2
P106
IC53
IC11
3.3V from IC53Pins 41~43
n/c Upgrades
3.3V from IC53Pins 8~10
4.94V
1.05V
1.06V
1.05V
3.3V 1.8V
1.8V On
3.31V
3.27V
12
32
1 2
3
P201
FPC
All FGndP101
1, 2 FG5V
P202
FPC
FPC
P203
FPC
P204
P102
FPC
P205
FPC
P206
P106
Waveform
P2323.3V in onPins 9~11
P3313.3V in onPins 42~44
P211Va in onPins 3~4
P311Va out onPins 3~4
42PW350 (42T3 Panel) CIRCUIT INTERCONNECT DIAGRAM
Connect Scope between Waveform TP on Y-Drive and Gnd
Note a:The RL_On command turns on the 17V, +5V, Error_Det and AC_DET.Note b: The M-On command turns on M5V, Va and Vs.Note c: The Error Det line is not used in this model.Note d: AC Det line is not used. Note e: Pin 18 is grounded on the Main. If opened, the power supply turn on automatically.
Remove LVDS Cable. Short across Auto Gen TPs to generate a test pattern.
* If the complaint is no video and shorting the points (AutoGen) causes video to appear suspect the Main board or LVDS cable.Note: LVDS Cable must be removed for Auto Gen to work.
With the unit on, if D1 is not on, check 5V supply. If present replace the Control Board.If missing, see (To Test Power Supply)
To Test Y-SUS18V, FG5V & FG15V supplies.Disconnect all connectors.Jump M5V from SMPS to Y-SUS.(J35 bottom of the board is an easy TP).Ground J73 (OE)Ground the Y-SUS. Apply AC to SMPS.Check 18V, FG5V & FG15V supplies.
Note: IC53 (3.3V Regulator) routed to all X Boards
FS501 18V Diode Check reads
0.85V Board Connected or 1.13V
Disconnected
To SpeakersAll speaker
wires 0V~1VSoft to Loud
Power LEDP100IR/Key Board
p/n: EAB62028901
To Ft IR
P6 Pins inverted from P2 on Control
Connect Scope between Waveform TP J17 on Z board and Gnd. Use RMS information just to
check for board activity.
P101
P103
P201
P202
P213 "Y-SUS" to "Y-Drive" P101
Pin Label Run
FGnd FGnd1-2
P212 "Y-SUS" to "Y-Drive" P102Pin Label Run
1-10
Black Lead on Floating Gnd
Y-DRIVE BOARDp/n: EBR69839101
SMPS Test – Unplug P813to Main board. Use two (100W) light bulbs in series between Vs and Gnd to place a load on the SMPS. Apply AC, all voltage should run. See “Auto Gen” on the Control board to perform a Panel Test.If all supplies do not run when A/C is applied, disconnect P811 to isolate the excessive load.
P813 "SMPS" to P500 "Main"Pin Label STBY Run No Load Diode
18 e Auto_Gnd Gnd Gnd 4.86V Open
17 b M_ON 0V 3.28V 0V Open
16 a dAC Det 0V 4.06V 4.94V 3.1V
15 a RL_ON 0V 3.28V 0V Open
13-14 STBY_5V 3.47V 5.14V 4.94V 2.53V
9-12 Gnd Gnd Gnd Gnd Gnd
8 a c Error_Det 3.44V 4.02V 4.94V 2.84V
5-7 a 5.1V 0.46V 5.17V 5.22V 2.13V
3-4 Gnd Gnd Gnd Gnd Gnd
1_2 a17V 0V 17V 17V 3.06V
P811 "Power Supply" to P7 "Z-SUS"
Pin Label Run Diode
1~2 Vs *200V Open
3~4 Gnd Gnd Gnd
5 Va *55V Open
6 M5V 5.0V 1.38V
X-Board Leftp/n: EBR68019901
X-Board Rightp/n: EBR68020001
A
OE should be 0V(5V indicates a Problem)
Z-SUS Signal
3D sync/ Motion Remotep/n: EBR72499601
To P1404 Main
*Voltage varies with panel label
Attached to front glass
P1404 on Main to Motion Remote3D Sync pin 12 (3.48V p/p) 60HzPin 9 or 10 should be high to turn on 3D RF transmitter on Motion Remote board.
B
Motion
PANEL TEST:
C523
FG5V+
-FG
FL1
FGnd FGnd
11-12 FG5V 5V
0V
B
VR601Set-up
195uSec ± 5uSec
100V 100uS69VRMS 576V p/p
VR401Set-Dn
A
155V ± 5V
100V 2MSec 577V p/p
Note: Screws on Y-Drive are Chassis Ground
P203
P312VA in onPins 3~4
Z-SUB BOARDp/n: EBR71728001
63VRMS 50V 100uSec 230V p/p
VS TP
F3022.5A/250V
STBY 160VRUN 390V
P811
P813
VA TP
F10110A/250V
SMPSP/N: EAY62170901
P702
SC101
RL103
T901
L601
L602
VSSupply
VASupply
5VSupply
17VSupply
F3014A/250VSTBY 160VRUN 390V
VR502VA AdjVR901
VS Adj
D602
Q601
Q602
D101
Q802
Q801
IC301
Q356
D352
Q355
D351
Q501
D504
D901
D902
P206P205P204P203P202P201 P306P305P304P303P302P301
18V P2 pins 13-15M5V P2 pin 11-12
18V P6 pins 1-3M5V P2 pin 4-5
1~3 (18V)4-7 (M5V)
28~30 (18V)24-27 (M5V)
IC701 (1.8V Core)(1) Gnd(2) 1.8V(3) 3.31V
IC53 (3.3V Reg)(1) 4.94V(2) 3.32V(3) Gnd
Diode Check
P7 "Z-SUS" to "SMPS" P811Pin Label Run Diode Check1~2 +Vs *200V OL3~4 Gnd Gnd Gnd5 +Va *55V OL6 M5V 5.06V 1.03V* Note: Varies according to Panel Label
P2 "Z-SUS" to "Y-SUS" P206Pin Label Run 1~4 ER_PASS 98V~102V OL5 n/c n/c n/c
6~7 +Vs *200V OL8 n/c n/c n/c
9~11 Gnd Gnd Gnd12 M5V 5.06V 1.03V
* Note: Varies according to Panel Label
P2 "Control" to P201 "Z-SUS Board"
Diode CheckPin Label Run
1 Gnd Gnd Gnd
2 SUSUP 0.22V OL
3 Gnd Gnd Gnd
4 SUSDN 0.79V OL
5 n/c n/c OL
6 ZBIAS 1.92V OL
7 Gnd Gnd Gnd
8 VZ_CON 3.25V OL
9 CTRL_OE Gnd OL
10 Y-OE 0.05V OL
11~12 M5V 5.06V 1.15V
13~15 (+15V) 18.2V OL
P201 "Z-SUS Board" to P2 "Control"
Pin Label Run Diode Check
1~3 (+15V) 18.2V 2.18V
4~5 M5V 5.06V 1.03V
6 Y-OE 0.05V OL
7 CTRL_OE Gnd Gnd
8 VZ_CON 3.25V OL
9 Gnd Gnd Gnd
10 ZBIAS 1.92V OL
11 n/c n/c OL
12 ZSUSDN 0.79V OL
13 Gnd Gnd Gnd
14 ZSUSUP 0.22V OL
15 Gnd Gnd Gnd
P211 "Y-SUS" to "Y-Drive" P106Pin Label Run Diode Check
1~2 VSC (Y-Scan) 146.2V OL
3~4 VPP 145V OL5 n/c n/c OL
6 SUS_DN (FG) FG FG
7 CLK 0.92V 1.46V
8 STB 2.24V 1.46V
9 OC1 2.26V 1.54V
10 DATA 0V 1.46V
11 OC2 2.8V 1.54V
12 SUS_DN (FG) FG FG
Black Lead on FG (Floating Gnd)
BUFFER OUTPUTDIODE CHECK0.8V Red Lead on FGndOL Black Lead on FGnd
VSCANDIODE CHECK1.13V Red Lead on FGndOL Black Lead on FGnd
Y-DRIVE CHECKS
VPPDIODE CHECK0.67V Red Lead on FGndOL Black Lead on FGnd
DATADIODE CHECK0.78V Red Lead on FGnd2.1V Black Lead on FGnd
CLK, LE, OC1, OC2DIODE CHECK0.6VV Red Lead on FGndOL Black Lead on FGnd
Pins are reversed
from Y-SUS
Pins are reversed
FromY-SUS
IC703(1) 4.94V(2) 0V(3) Gnd(4) Gnd(5) Gnd(6) 0.83V(7) 0.61V(8) 0.52V
( 9) 1.92V(10) 1.06V(11) 1.06V(12) 1.06V(13) 6.1V(14) 4.96V(15) 3.31V(16) 5V
P105 "Control" to P101 "Y-SUS"Pin Label Run Diode Check1~3 +15V 18.2V OL4~7 +5V 4.94V 1.15V8~11 Gnd Gnd Gnd
12 Dumy2 2.14V OL13 Y-OE 0.03V OL14 PC 1.84V OL15 ER_DN 0.5V OL16 DATA_PRE 0.01V OL17 ER_UP 0.3V OL18 SC_A 1.45V OL19 RAMP_UP 0.22V OL20 STB 1.5V OL21 RAMP_BLK 1.07V OL22 CLK 0.6V OL23 SUS_DN 2.71V OL24 DUMMY_3 2.14V OL25 DUMMY_1 1.07V OL26 DUMMY_4 1.35V OL27 SUS_UP_0 0.75V OL28 CTRL_OE 0.11V OL29 RAMP_DN 2.17V OL30 Gnd Gnd Gnd
D506 18V SourceD502 -Vy Source 200VD503 VSC Source 146V
P212
P211
P213
-Vy TPR201
-Vy AdjVR502
P101
P206
Y-SUSP/N: EBR68341901
C213
T501
T502
FG5VJ54
OE J73FS501
18V
18V J55
M5V J13
FG15VJ66
VR601Set-Up
VR401Set-Dn
D506
D502D503
D508 FG15V SourceIC508 FG5V Source
Back of Board
Scan FG
M5V J35
There are Chocolate pieces between the Y-SUS and the Panel.
Be sure to return them to there correct location if they should fall off
when removing the Y-SUS.
FG5V Diode Check reads
1.33V Board Connected or 1.63V Disconnected
FG5V Diode Check reads
1.33V Board Connected or OL Disconnected
Ribbon CableY-SUS and Y Drive Signals
See Waveform Above
Bottom 2 Pins are VA
4~5
Diode Check TCP disconnectedRed Lead on TCP VA OLBlack Lead on TCP VA 0.5VRed Lead on TCP 3.3V OLBlack Lead on TCP 3.3V 0.53VEC OL either way
P902 "MAIN" to "Front IR"Pin Label STBY Run 1 IR 2.84V 2.7V2 Gnd Gnd Gnd3 Key1 3.3V 3.3V4 Key2 3.3V 3.3V5 LED_RED 3.25V 0V6 Gnd Gnd Gnd7 EYE_SCL 3.3V 3.3V8 EYE_SDA 3.3V 3.3V9 Gnd Gnd Gnd10 3.3VST 3.3V 3.3V11 n/c n/c n/c12 n/c n/c n/c13 Touch_Ver_Check 0.19V 0V14 n/c n/c n/c15 n/c n/c n/c
P1401
IC1400
P902
12
32
P14041
23
2
IC1401
IC700
P700
12
32
IC1406
IC506
IC504
IC1407
IC1202
1 2 3
123
IC600
IC507
IC1404
L1402
IC502
L503
D
G
SQ501
L506IC1201A2 A1
C
D200
IC103
L502
Q1401D
GS
D
GS
Q1402
X1400
C
BE
Q1400
P501
X200
24MhzL700L701
L702
L703
R-R+L-L+
D501
IC501
TUNER
MAIN BOARDp/n: EBT61267425 AUSLLJR
Other Main Boards p/n: EBR72942901 AUSLLHR
p/n: EBR71638619Interchangeable
Q901
C
B E
24Mhz
18. IF p17. IF n16. IF AGC15. Reset14. 3.3V13. 1.26V12. GND11. CVBS10. NC 9. SIF
8. NC 7. SDA 6. SCL 5. NC 4. NC 3. 5V
2. NC 1. NC
TU1300
IC101Micro/Video
Processor C
A1 A2
IC1402
D805
IC1101
IC804
CBEQ807
Q1304
C
B E
C
B E
Q1305IC901
IC900
IC801C
B E
Q805
C
A1A2D803
IC802
CB
ECA1
A2D804 Q103
C BE Q8061
D801C
A1
A2
IC104
IC102
IC109
123
IC505
CB
EQ500
3
12
IC500
Q800
CB
EQ900
NANDFLASH
3.3V_ST5V_ST in (3)
+1.5V_DDR_IN+5V_ST_EN In in
Serial Flash
DDR
Audio AmpEDID
EDID
RS232
EDID
DDR
DDR
3D Formatter
+1.8V+3.3V_3D_A In (3)
Serial Flash
+1.0V+5V in
+3.3V Reg
+5V in (3)
HDCP EEPROMEEPROM
+1.26V_VDDC) Reg +5V_ST_EN In +5V_ST_EN Switch
+5V_ST In
+3.3V+5V in
+2.5V_AVDD+3.3V_AVDD
USB +5V OCP+5V in
+5V_TU17V in
+3.3V_AVDD+5V_ST_EN In
EDID+1.2V_DE+3.3V in (3)
Tuner SIF
Tuner CVBS
Hot Swap
B+ Routing
Q501 CTL
HDMI CEC Hot SwapEDID WP
RS232 TX Buffer
Hot Swap
+3.3V_3D Reg
SDA_3.3V_MODSCL_3.3V_MOD
LED_RedDriver
Serial Flash WP
Ribbon CableLVDS
See 2nd page for Waveforms
ATo Motion Remote
3D Sync
To P902 Main
B
WITH NO Y-DRIVE (Board removed completely)
116VRMS 100V 2mSec 485V p/p
112VRMS 100V 2mSec 470V p/p
DO NOT USE THIS TP FOR ADJUSTMENTSWaveform Taken from C213 Left Side with Y-DRIVES
42PW350 Main Board (Front Side) Component Voltages
IC103 Serial IC502 +1.26V_VDDC IC507 +5V_TU IC1404 +1.0V Q501 +5V_ST_ENFlash Pin Regulator Pin Regulator Pin Regulator Pin Switch
Pin For HDMI [1] 5V (In) [1] 11.1V [1] 5V (In) [B] 0.7V[1] Gnd [2] 5V (In) [2] 17V [2] 0V [C] 5.2V[2] Gnd [3] 0V [3] 3.1V [3] 0V [E] 5.2V[3] Gnd [4] 0V [4] 1.8V [4] 0V[4] Gnd [5] 081V [5] 0.8V [5] 0V Q901 LED_RED[5] 3.29V [6] 0.81V [6] 0.6V [6] 0.8V Pin Driver[6] 3.29V [7] 0.72V [7] 0V [7] 0.65V [B] 0.71V[7] 3.29V [8] 0.53V [8] 5V [8] 0.54V [E] 0V[8] 3.29V [9] 1.7V [9] 1.7V [C] 0V
[10] 1.3V IC600 +1.2V_DE [10] 1.05VIC501 +1.5V_DDR_IN [11] 1.3V Pin Regulator [11] 1.05V Q1400 Write Protect
Pin Regulator [12] 1.3V [1] 3.3V (In) [12] 1.05V Pin for IC1402[1] 5V (In) [13] 6.47V [2] 1.26V (Out) [13] 6.1V [B] 0V[2] 5V (In) [14] 0 25V [3] Gnd [14] 0 15V [E] 0V[2] 5V (In) [14] 0.25V [3] Gnd [14] 0.15V [E] 0V[3] 0V [15] 2.96V [15] 2.9V [C] 3.18V[4] 0V [16] 5V (In) [16] 0V[5] 0V Q1401 SCL_3.3V_MOD[6] 0.81V IC504 +3.3V_AVDD D200 Reset IC1406 +3.3V_VST Pin Buffer[7] 0.72V Pin Regulator Pin Speed Up Pin +3.3V_3D [B] 3.28V[8] 0.53V [1] 0V [A1] 0V [1] 0V [C] 3.3V[9] 1.7V [2] 3.3V (Out) [C] 0V [2] 3.31V (Out) [E] 3.28V
[10] 1.58V [3] 5.2V (In) [A2] 0V [3] 5V (In)[11] 1.58V Q1402 SDA_3.3V_MOD[12] 1.58V IC506 +3.3V D501 Reg IC1407 (+1.8V) Pin Buffer[13] 6.7V Pin Regulator Pin IC507 Pin Regulator [B] 3.28V[14] 0.12V [1] 0V [A] 0V [1] 0V [C] 3.3V[15] 2.98V [2] 3.3V (Out) [C] 5V [2] 1.8V (Out) [E] 3.28V[16] 2.98V (In) [3] 5.2V (In) [3] 3.3V (In)
42PW350 Main Board (Back Side) Component Voltages
IC102 HDCP IC505 +2 5V AVDD IC900 RS232 Tx/Rx IC1101 USB 5V Q800 HDMI CEC Q1305 TunerIC102 HDCP IC505 +2.5V_AVDD IC900 RS232 Tx/Rx IC1101 USB 5V Q800 HDMI CEC Q1305 TunerEEPROM Pin Regulator Pin Pin Limiter Pin Buffer Pin CVBS
Pin [1] 3.3V (In) [1] 3.3V [1] Gnd [1 B] 3.29V [B] 3.63V[1] Gnd [2] Gnd [2] 5.6V [2] 5.1V (In) [2 S] 3.29V [C] 0V[2] Gnd [3] 2.52V (Out) [3] 0V [3] 5.1V (In) [3 D] 3.23V [E] 4.3V[3] 3.3V [4] 0V [4] 3.3V [4 G] 3.3V[4] Gnd IC801 IC801, IC802 [5] (-5.6V) [5] 0V D801 Biasing[5] 3.3V EDID Data [6] (-5.6V) [6] 5.1V (Out) Q806 Hot Pin for Q800[6] 3.3V Pin For HDMI [7] 5.7V [7] 5.1V (Out) Pin Swap [A1] 3.28V[7] 3.3V [1] Gnd [8] 0V [8] n/c [B] 0V [C] 3.32V[8] 3.3V [2] Gnd [9] 3.3V [C] 0V [A2] 0V
[3] Gnd [10] 0V IC1402 Serial [E] 0VIC109 EEPROM [4] Gnd [11] 3.3V Pin Flash D803 5V
for Micro [5] 3.3V [12] 3.3V [1] 3.29V Q807 Hot Pin RoutingPin [6] 3.3V [13] 0V [2] 0V Pin Swap [A1] 0V[1] Gnd [7] 3.3V [14] (-5.6V) [3] 3.3V [B] 0.1V [C] 3.32V[2] Gnd [8] 3.3V [15] Gnd [4] 0V [C] 0V [A2] 3.28V[3] Gnd [16] 3.3V (B+) [5] 0V [E] 0V[4] Gnd IC804 EDID Data [6] 0V D804 5V[ ] [ ][5] 3.3V Side Input IC901 EDID Data [7] 3.29V Q900 Hot Pin Routing[6] 0V Pin For HDMI for PC [8] 3.29V Pin Swap [A1] 3.28V[7] 3.3V [1] Gnd Pin For HDMI [B] 0.63V [C] 3.32V[8] 3.3V [2] Gnd [1] Gnd Q103 EDID [C] 0V [A2] 0V
[3] Gnd [2] Gnd Pin WP [E] 0VIC500 3.3V_VST [4] Gnd [3] Gnd [B] 0V D805 5V
Pin Regulator [5] 3.3V [4] Gnd [C] 5V Q1304 Tuner Pin Routing[1] Gnd [6] 3.3V [5] 3.3V [E] 0V Pin SIF [A1] 5.1V[2] 3.3V (Out) [7] 3.3V [6] 3.3V [B] 0.23V [C] 4.9V[3] 5.09V (In) [8] 3.3V [7] 3.3V Q500 +5V_ST_EN [C] 0V [A2] 0V
[8] 3.3V Pin Switch CTL [E] 0.92V[B] 0.64V[C] 0V[E] 0V
End of the 42PW350 Presentation
This concludes the 42PW350
Presentation 09/06/2011 UpdatePage 1: Corrected Front Cover page: 1080P changed to 720P.Pages 10 and 11: Dropped Wireless Ready information. g pp yPages 21~28: Added Power Off Status information.Page 29: Added EDID D/L informationPage 91: Added waveform for Y-SUS waveform with no Y-DrivesPage 165 Interconnect: Added waveform for Y-SUS waveform output with no Y-Drives.M d 3D S ti i f t f Di bl S tiMoved 3D Section in front of Disassembly Section
Th k YThank You.
June 2011 42PW350 Plasma 167
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