operating systems 1 (9/12) - memory management concepts
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Memory Management - Concepts
Beuth HochschuleSummer Term 2014!Pictures (C) W. Stallings, if not stated otherwise
Operating Systems I PT / FF 14
Memory Management
• Beside compute time, memory is the most important operating system resource
• von Neumann model: Memory as linear set of bytes with constant access time
• Memory utilization approaches
• Without operating system, one control flow
• Every loaded program must communicate with the hardware by itself
• With operating system, one control flow
• Memory used by operating system, device drivers and the program itself
• With operating system and multi-tasking
• Better processor utilization on locking I/O operations
• Multiple programs use the same memory
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Operating Systems I PT / FF 14
Memory Management - Address Space
• CPU fetches instructions from memory according to the program counter value
• Instructions may cause additional loading from and storing to memory locations
• Address space: Set of unique location identifiers (addresses)
• Memory address regions that are available to the program at run-time
• All systems today work with a contiguous / linear address space per process
• In a concurrent system, address spaces must be isolated from each other-> mapping of address spaces to physical memory
• Mapping approach is predefined by the hardware / operating system combination
• Not every mapping model works on all hardware
• Most systems today implement a virtual address space per process
3
Operating Systems I PT / FF 14
Linear Address Space
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Lineare Adreßräume (2)
Memory
Address Space 1
Address Space 2
AddressSpace 3
AddressSpace 3
Address Space 1
Address Space 2
Operating Systems I PT / FF 14
Addressing Schemes
• Physical / absolute address
• Actual location of data in physical memory
• If some data is available at address a, it is accessed at this location
• Relative address
• Location in relation to some known address
• Logical address
• Memory reference independent from current physical location of data
• Access to data at physical location a is performed by using the logical address a‘
• It exists a mapping f with f(a') = a
• f can be implemented in software or hardware -> MMU
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Operating Systems I PT / FF 14
Logical Address Space
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Logischer Adressbereich
000C0000 − 000C7FFF
000A0000 − 000BFFFF
000E0000 − 000EFFFF
000F0000 − 000FFFFF
00000000 − 0009FFFF
000C8000 − 000DFFFF
00100000 − 02FFFFFF
FFFE0000 − FFFEFFFF
FFFF0000 − FFFFFFFF
03000000 − FFFDFFFF
physikalischer Adreßraumlogischer Adreßraum
00000000 − 02F9FFFF
Lineare Adreßräume (2)
Memory
Address Space 1
Address Space 2
AddressSpace 3
AddressSpace 3
Address Space 1
Address Space 2
Operating Systems I PT / FF 14
Memory Management Unit (MMU)
• Hardware device that maps logical to physical addresses
• The MMU is part of the processor
• Re-programming the MMU is a privileged operation, can only be performed in privileged (kernel) mode
• The MMU typically implements one or moremapping approaches
• The user program deals with logical addresses only
• Never sees the real physical addresses
• Transparent translation with each instructionexecuted
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Operating Systems I PT / FF 148
Addressing Schemes
Logical Address Space
Core MMUInstruction
fetchLogicaladdress
Physical Address Space
Physicaladdress
Mapping information
Operating Systems I PT / FF 14
Memory Hierarchy• If operating system manages the memory, it must
consider all levels of memory
• Memory hierarchy
• Differences in capacity, costs and access time
• Bigger capacity for lower costs and speed
• Principal of locality
• Static RAM (SRAM)
• Fast, expensive, keeps stored value once it is written
• Used only for register files and caches
• Dynamic RAM (DRAM)
• Capacitor per Bit, demands re-fresh every 10-100ms
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FusionDrive intro from Apple keynote 2012
Fast Expensive Small
Slow Cheap Large
non-volatile
volatile
Operating Systems I PT / FF 14
Memory Hierarchy
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• The operating system has to manage the memory hierarchy
• Programs should have comparable performance on different memory architectures
• In some systems, parts of the cache invalidation are a software task (e.g. TLB)
Operating Systems I PT / FF 14
Memory Hierarchy
• Available main and secondary memory is a shared resource among all processes
• Can be allocated and released by operating system and application
• Programmers are not aware of other processes in the same system
• Main memory is expensive, volatile and fast, good for short-term usage
• Secondary memory is cheaper, typically not volatile and slower, good for long-term
• Flow between levels in the memory hierarchy is necessary for performance
• Traditionally solved by overlaying and swapping
• Reoccurring task for software developers - delegation to operating system
• In multiprogramming, this becomes a must
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Operating Systems I PT / FF 14
Swapping• In a multiprogramming environment
• Blocked (and ready) processes can be temporarily swapped out of main to secondary memory
• Allows for execution of other processes
• With physical addresses
• Processes will be swapped in into same memory space that they occupied previously
• With logical addresses
• Processes can be swapped in at arbitrary physical addresses
• Demands relocation support12
Opera&ng)system)
User))space)
Process)P1)
Process)P2)
Swap)out)
Swap)in)
Main)memory)
Backing)store)
Operating Systems I PT / FF 14
Memory Management - Protection and Sharing
• With relocation capabilities and concurrency, the operating system must implement protection mechanisms against accidental or intentional unwanted process interference
• Protection mechanism must work at run-time for each memory reference
• Program location in memory is unpredictable
• Dynamic address calculation in program code is possible for attackers
• Mechanism therefore must be supported by hardware
• Software solution would need to screen all (!) memory referencing
• Sharing
• Allow controlled sharing of memory regions, if protection is satisfied
• Both features can be implemented with a relocation mechanism
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Operating Systems I PT / FF 14
Memory Management - Partitioning
• With relocation and isolation, the operating system can manage memory partitions
• Reserve memory partitions on request
• Recycle unused / no longer used memory partitions, implicitly or explicitly
• Swap out the content of temporarily unused memory partitions
• Memory management must keep state per memory partition
• Different partitioning approaches have different properties
• Traditional approach was one partition per process
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Lineare Adreßräume (2)
Memory
Address Space 1
Address Space 2
AddressSpace 3
AddressSpace 3
Address Space 1
Address Space 2
• Partitioning approaches can be evaluated by their
• Fragmentation behavior, performance, overhead
• Hypothetical example: Fixed partition size, bit mask for partition state
• Small block size -> large bit mask -> small fragmentationLarge block size -> small bit mask -> large fragmentation
• External Fragmentation
• Total memory space exists to satisfy a request, but it is not contiguous
• Internal Fragmentation
• Allocated memory may be slightly larger than requested memory
• Size difference is memory internal to a partition, but not being used
Operating Systems I PT / FF 14
Memory Management - Partitioning
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Operating Systems I PT / FF 14
Memory Partitioning - Dynamic Partitioning
• Variable length of partitions, as needed by new processes
• Used in the IBM OS/MVT system
• Leads to external fragmentation
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Only P4 is ready - swap out takes
place
Operating Systems I PT / FF 14
Memory Partitioning - Dynamic Partitioning• External fragmentation can be overcome
by compaction
• Operating system is shifting partitions so that free memory becomes one block
• Time investment vs. performance gain
• Demands relocation support
• Placement algorithms for unequal fixedand dynamic partitioning
• Best-fit: Chose the partition that is closest in size
• First-fit: Pick first partition that is large enough
• Next-fit: Start check from the last chosen partition and pick next match
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Example: 16MB allocation
Operating Systems I PT / FF 14
Memory Partitioning - Placement
• Best-fit: Use smallest free partition match
• Sort free partitions by increasing size, choose first match
• Leaves mostly unusable fragments, compaction must be done more frequently
• Overhead for sorting and searching, tendency for small fragments at list start
• Typically worst performer
• Worst-fit: Use largest free partition match
• Sort free partitions by decreasing size, choose first match
• Leave fragments with large size to reduce internal fragmentation
• Tendency for small fragments at list end and large fragments at list start
• Results in small search overhead, but higher fragmentation; sorting overhead
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Operating Systems I PT / FF 14
Memory Partitioning - Placement
• First-fit:
• Maintain list of free partitions ordered by addresses
• Tendency for small fragments at list start and large fragments at list end
• In comparison to best-fit, it can work much faster with less external fragmentation
• Next-fit:
• Tendency to fragment the large free block at the end of memory
• Leads to more equal distribution of fragments
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Operating Systems I PT / FF 14
Compaction
• Combine adjacent free memory regions to a larger region
• Removes external fragmentation
• Can be performed ...
• ... with each memory de-allocation
• ... when the system in inactive
• ... if an allocation request fails
• ... if a process terminates
• Compaction demands support for relocation
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Kompaktifizierung (1)
. . . muß spätestens ausgelöst werden, wenn eine Anforderung nicht mehr erfüllbar ist
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600 Worte bewegt 400 Worte bewegtAusgangspunkt 200 Worte bewegt
Operating Systems I PT / FF 14
Compaction• Very resource-consuming activity, avoid whenever possible
• Time for mandatory compaction can be delayed
• Placement strategies and memory de-allocation approaches
• Example: Linux
• First part of the algorithm looks for movable regions from memory start
• Second part of the algorithm looks for free regions from memory end back
• Uses existing mechanisms for memory migration (NUMA systems)
• Also very interesting research topic for heap management and garbage collection
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Operating Systems I PT / FF 14
Memory Management - Segmentation• Each process has several data sections being mapped to its address space
• Application program code (procedures, modules, classes) and library program code
• Differences in purpose, developer, reliability and quality
• Stack(s)
• (X86) ESP register points to highest element in the stack, one per process
• (X86) PUSH / POP assembler instructions
• (X86) CALL leaves return address on the stack, RET returns to current address on the stack
• Parameter hand-over in method calls, local variables
• Heap(s)
• Memory dynamically allocated and free‘d during runtime by the program code22
Operating Systems I PT / FF 14
Process Data Sections
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Interne Organisation
Address Space
Code
Data
Stack
Data
CodeData
Data
Code
Code
Data
Code
Code
Code
Heap
Adreßräume in Unix-Derivaten
Expansion Area
Code
End of Data(break)
Top of Stack
Stack
Start of Address Space
End of Address Space
Initialised Data
BSS(zeroed)
Unix
BSS = „Block Started By Symbol“ -> non-initialized static and
global variables
(C) J. Nolte, BTU
• Segmentation:
• Split process address space into segments
• Variable length up to a given maximum
• Like dynamic partitioning, but
• Partitions don‘t need to be contiguous - no internal fragmentation
• External fragmentation is reduced with multiple partitions per process
• Large segments can be used for process isolation (like in the partitioning idea)
• Mid-size segments can be used for separating application code, libraries and stack
• Small segments can be used for object and record management
• Each logical memory address is a tuple of segment number and segment-relative address (offset)
• Translated to base / limit values by the MMUOperating Systems I PT / FF 14
Partitioning by Segmentation
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Operating Systems I PT / FF 14
Memory Protection - Bounds / Limit
• Every process has different limit, either base/limit pair or bounds pair
• Processor has only one valid configuration at a time
• Operating system manages limits as part of the processor context per process
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Schranken (4)
unused
user 2
user 1
base
hardware prototype
base
base
base
operating system
software prototypes
limit limit
limit
limit
(C) J. Nolte, BTU
Operating Systems I PT / FF 14
Segmentation Granularity
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Grobe Segmentierung (3)
Expansion Area
Code
Stack
Initialised Data
BSS(zeroed)
Code
Initialised Data
BSS(zeroed)
Stack
Logical Physical
base/limit
base/limit
base/limit
• One base/limit pair per segment
• Configuration of base/limit registers:
• Implicitly through activities (code /data fetch)
• Explicitly through the operating system
• Segmentation on module level can help to implement shared memory
• Code or data sharing
• Shared libraries get their own segment, mapped to different processes
• Also good for inter-process communication
• Separated or combined utilization of a segment for code and data of program modules
Moduln (1)
Data
Data
Data
Code
Data
Code
Code
Module 0
Module 2
Module 3
Module 1
Module 0..3
Module 0..3
Separated Combined
Code
Code
Moduln (1)
Data
Data
Data
Code
Data
Code
Code
Module 0
Module 2
Module 3
Module 1
Module 0..3
Module 0..3
Separated Combined
Code
Code
(C) J. Nolte, BTU
Operating Systems I PT / FF 14
Segmentation Granularity
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Mittelgranulare Segmentierung (1)
Code 0Module 0
Module 2
Module 1 Code 1
Code 2
Data 2
Data 0
Data 1
Data 1
Code 1
Data 0
Data 2
Code 2
logical physical
base/limit
base/limit
base/limit
base/limit
base/limit
base/limit
Code 0
(C) J. Nolte, BTU
Operating Systems I PT / FF 14
Segment Tables
• With multiple base/limit pairs per process, a segment table must be maintained
• Table is in main memory, but must be evaluated by the MMU
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Operating Systems I PT / FF 14
Memory Management - Paging• Segmentation / partitioning always have a fragmentation problem
• Fixed-size partitions lead to internal fragmentation
• Variable-sized partitions lead to external fragmentation
• Solution: Paging
• Partition memory into small equal fixed-size chunks - (page) frames
• Partition process address space into chunks of the same size - pages
• No external fragmentation, only small internal fragmentation in the last page
• One page table per process
• Maps each process page to a frame - entries for all pages needed
• Used by processor MMU do translate logical to physical addresses
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Operating Systems I PT / FF 14
Memory Management - Paging
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Operating Systems I PT / FF 14
Memory Management - Paging
• Page frame size depends on processor
• 512 Byte (DEC VAX, IBM AS/400), 4K or 4MB (Intel X86)
• 4K (IBM 370, PowerPC), 4K up to 16MB (MIPS)
• 4KB up to 4MB (UltraSPARC), 512x48Bit (Atlas)
• Non-default size only possible with multi-level paging (later)
• Each logical address is represented by a tuple (page number, offset)
• Page number is an index into the page table
• Page Table Entry (PTE) contains physical start address of the frame
• Change of process -> change of logical address space -> change of active page table
• Start of the active page table in physical memory is stored in a MMU register32
Operating Systems I PT / FF 14
Page Table Sizes
33
Address Space Page Size Number of Pages Page Table Size per Process
2 2 2 2
2 2 2 2
2 2 2 256 GB
2 2 2 256 MB
2 2 2 16.7 PB
2 2 2 16 TB
Operating Systems I PT / FF 14
Address Translation
• Adding a page frame (physical address range) to a logical address space
• Add the frame number to a free position in the page table
• Adding logical address space range to another logical address space
• Compute frame number from page number
• Add to target page table
• Determining the physical address for a logical address
• Determine page number, lookup in the page table for the frame start address
• Add offset
• Determining the logical address for a physical address
• Determine page number from frame start address, add offset
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• Mapping of pages to frames can change constantly during run-time
• Each memory access demands another one for the page table information
• Necessary to cachepage table lookupresults for performanceoptimization
• Translation Lookaside Buffer (TLB)
• Page number +complete PTE per entry
• Hardware cancheck TLB entries inparallel for pagenumber match
Operating Systems I PT / FF 14
Paging - Page Tables
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Operating Systems I PT / FF 14
Protection and Sharing
• Logical addressing with paging allows sharing of address space regions
• Shared code - multiple program instances, libraries, operating system code
• Shared data - concurrent applications, inter-process communication
• Protection based on paging mechanisms
• Individual rights per page maintained in the page table (read, write, execute)
• On violation, the MMU triggers a processor exception (trap)
• Address space often has unused holes (e.g. between stack and heap)
• If neither process nor operating system allocated this region, it is marked as invalid in the page table
• On access, the processor traps
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Operating Systems I PT / FF 14
Th NX Bit
• The Never eXecute bit marks a page as not executable
• Very good protection against stack or heap-based overflow attacks
• Well-known for decades in non-X86 processor architectures
• AMD decided to add it to the AMD64 instruction set, Intel adopted it since P4
• Demands operating system support for new page table structure
• Support in all recent Windows and Linux versions
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Operating Systems I PT / FF 14
X86 Page Table Entry (PTE)
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Operating Systems I PT / FF 14
Virtual Memory
• Common concepts in segmentation and paging
• All memory references are translated to physical addresses at run-time
• Address spaces are transparently broken up into non-contiguous pieces
• Combination allows to not have all parts of an address space in main memory
• Commonly described as virtual memory concept
• Size of virtual memory is limited by address space size and secondary storage
• More processes can be maintained in main memory
• Process address space occupation may exceed the available physical memory
• First reported for Atlas computer (1962)
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Operating Systems I PT / FF 14
Virtual Memory with Paging• Frames can be dynamically mapped into address spaces
• Example: Dynamic heap extension, creation of shared regions
• Demands page table modification for the address space owner
• Frames can be mapped into multiple different logical address spaces
• Page-in / page-out: Taking a frame out of the logical address space
• Mark the address space region as invalid in the page table
• Move the (page) data to somewhere else, release the frame
• On access, the trap handler of the operating system is called
• Triggers the page swap-in to allow the access (same frame ?)
• This is often simply called swapping, even though it is page swapping
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Operating Systems I PT / FF 14
Page Swapping
41
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Operating Systems I PT / FF 14
Trashing
• A state in which the system spends most of its time swapping process pieces rather than executing instructions
• Avoidance by operating system
• Tries to guess which pieces are least likely to be used in the near future
• Based on historic data in the system run
• Was a major research topic in the 1970‘s
• Solutions rely on principle of locality
• Program and data references within a process tend to cluster
• Only a few pieces of a process will be needed over a short period of time
• Can be used by hardware and software for trashing avoidance
42
Operating Systems I PT / FF 14
Virtual Memory + Page Size
• The smaller the page size, the lesser the amount of internal fragmentation
• However, more pages are required per process
• More pages per process means larger page tables
• For large programs, some portion of the page tables must be in virtual memory
• Most secondary-memory devices favor a larger page size for block transfer
43
Computer Page Size
Atlas 512 48-bit words
Honeywell-Multics 1024 36-bit words
IBM 370/XA and 370/ESA 4 Kbytes
VAX family 512 bytes
IBM AS/400 512 bytes
DEC Alpha 8 Kbytes
MIPS 4 Kbytes to 16 Mbytes
UltraSPARC 8 Kbytes to 4 Mbytes
Pentium 4 Kbytes or 4 Mbytes
IBM POWER 4 Kbytes
Itanium 4 Kbytes to 256 Mbytes
Operating Systems I PT / FF 14
Policies for Virtual Memory
• Ultimate goal: Minimize page faults for better performance
• Fetch policy
• Demand paging: Only bring pages to memory when they are referenced
• Many page faults on process start
• For long-running applications, principle of locality improves performance
• Prepaging: Bring in more than only the demanded page into main memory
• Facilitates the block device nature of secondary storage
• Inefficient if extra pages are never used
• Different from ,swapping‘
• Placement policy (e.g. with NUMA) and replacement policy
44
Operating Systems I PT / FF 14
Replacement Policy
• Frame locking: The page currently stored in that frame may not be replaced
• Kernel of the OS as well as key control structures are held in locked frames
• I/O buffers and time-critical areas may be locked into main memory frames
• Locking is achieved by associating a lock bit with each frame
• Permanent restriction on replacement policy algorithm
• Algorithms
• Optimal replacement policy
• Selects the page for which the time to the next reference is the longest
• Can be shown that this policy results in the fewest number of page faults
• Impossible to implement, but good base-line for comparison
45
Operating Systems I PT / FF 14
Replacement Policy
• Algorithms
• Least recently used (LRU)
• Replaces the page that has not been referenced for the longest time
• Should be the page least likely to be referenced in the near future
• Difficult to implement, e.g. by tagging with last time of reference (overhead)
• First-in-first-out (FIFO)
• Treats page frames allocated to a process as a circular buffer
• Pages are removed in round-robin style - simple to implement
• Page that has been in memory the longest is replaced
46
Operating Systems I PT / FF 14
No Swapping ?
• Some sources argue that systems without swapping perform better
• Some counter-arguments:
• Swapping removes information only used once from main memory
• Initialization code or dead code
• Event-driven code that may never be triggered in the current system run
• Constant data
• Resources being loaded on start-up
• Extra memory generated by swapping is typically used for the file system cache
• Operating systems are heavily optimized for not swapping the wrong pages
• Memory ,honks‘ would get an unfair advantage in system resource usage
47
Operating Systems I PT / FF 14
Summary
• Different well-established memory management principles
• Logical vs. physical addresses
• Segmentation, Paging, Swapping
• Memory management relies on hardware support
• Page table / segment table implementation
• Translation Lookaside Buffer
• Trap on page fault
• In combination with secondary storage, virtual memory can be implemented
• Adress space size and usage decoupled from main memory organization
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