superrange: wide operational range power delivery design for both stv and ntv computing

SuperRange: Wide Operational Range Power Delivery Design for both STV and NTV

Computing

Xin He, Guihai Yan, Yinhe Han, Xiaowei Li

Institute of Computing Technology, Chinese Academy of Sciences

• Microprocessor’s supply voltage range has been gradually increasing in these year– Intel Pentium Processor has a supply voltage range

from 0.9V to 1.5V to support DVFS– Intel Sandy Bridge Processor requires a higher than

nominal voltage to boost performance

The need of wide operation range

20.9VIntel Pentium Processor

1.5VTurbo Boost in Intel Sandy Bridge

(66.7%)

DVFS

Turbo

– Near Threshold Computing: set supply voltage to a value near to transistor’s threshold voltage (0.4V-0.6V)

The need of wide operation range

3

Intel ISSCC20120.28V-1.2V

Future Microprocessor has wide supply voltage range. Brings challenges to power delivery design

DVFS

Turbo

NTC

• Voltage regulator is key to deliver power at a specified voltage level– Linear regulator-LDO– Switching regulator

• Buck regulator(Off-VR)• Switch capacitor regulator(On-VR)

Background of Power Delivery Design

Buck Regulator Switch Capacitor Regulator

• VRs are delivering power to wide operational range cores

Power Conversion Efficiency Characteristics

High PCE High PCE

Low PCE Low PCE

• Off-VR:– High switching loss

• On-VR:– Narrow optimal region

• LDO-VR:– Limited efficiency

Conventional design can’t meet the need of wide voltage range

• Explore the design space of wide operational range power delivery design

• Propose SuperRange, a wide operation range power delivery scheme

• Present a VR aware power management algorithm to maximize performance under given power budget

Contribution

• Explore three optional design 1. Off-VRs

• Two Off-VR evenly located2. Off-VR + LDO-VR

• An Off-VR serves as an frontend3. Off-VR + On-VR

• Off-VR delivers to STV and On-VR to NTV

Design space exploration

• Loss in Off-VRs

Option 1： Off-VRs scheme

20% Cross 10%

dominants!

𝑃𝑐𝑎𝑝=𝐶𝑜𝑉❑2 𝑓

𝑃𝑐𝑎𝑝 𝑖𝑚𝑝𝑙𝑦𝑠𝑓

• In LDO-VR

– PCE is limited by the ratio of output voltage to input voltage

• PCE is lower than 30% when delivering to NTV region

Option 2： LDO-VR scheme

• Using Off-VR to deliver to STV region• Two step voltage conversion

• How to decide intermediate voltage

Option 3： Off-VR + On-VR scheme

1) Fixed intermediate voltage – Off-VR delivers fixed output voltage 2V– Tuning On-VR params to achieve further

conversion• PCE of Off-VRs is high• On-VR couldn’t deliver to all NTV levels at high

PCE

𝑉 𝑥=𝐷∗𝑉 𝑖𝑛

2) Using varied intermediate voltage – Off-VR delivers to varied voltage levels

• Duty cycle tuning– On-VR further step these intermediate values

to 0.4V-0.6V

– Pros:• On-VR has high PCE(around 80%)

– Cons:• The PCE of Off-VR remains low because of

small load current

Off-VR + On-VR scheme

• Multi-phase Off-VR provides an opportunity to improve load current, thus PCE get improved– Modern Off-VR can dynamically change number of working

phases

• Decreasing the number of working phases would increase output ripple– 1.5uH inductor is big enough to reduce the ripple with acceptable area overhead

Proposed SuperRange Design

• Supporting STV– Voltage conversion to STV is performed by Off-VR

• Supporting NTV– Two step conversion.

• Off-VR sets to single working phase• On-VR achieves further conversion(e.g. 3:1)

SuperRange Overview

• Maximize performance under given power budget– Find optimal core counts and VF

setting

VR aware power management algorithm

• PCE with varying load current– Although low voltage improve app power efficiency, it degrades

the PCE

More cores, Low voltage Few cores, High voltage

• Determine voltage setting candidates– Computes the total powers when all cores are active at

each voltage level– Selects the lowest voltage () and the highest voltage ()

• Determine active core count– Calculate max active core count at voltage and get

corresponding performance– Compare the performance with and make decisions

Algorithm

• Target processor characteristics – Multicore processor consists 16 ALPHA cores which has 9

power state• (1.2v, 1.9GHz), (1.1v, 1.7GHz), (1.0v, 1.5GHz)… (0.4v, 0.3GHz)

– 32MB LLC, distribute directory-based MESI– On chip interconnection: mesh + router

• Voltage regulator model– Single topology (3 to 1) Switch capacitor voltage regulator – Buck voltage regulator like TI TPS 54912

Experimental Setup

Power Conversion Efficiency

SuperRange combines the advantages of Off-VR and On-VR andexhibits high PCE over the entire voltage range

• Performance comparison in power-constrait system

Comparison

SuperRange outperforms LDO scheme by 50% and Off-VR scheme by 30%

• Maximum achievable performance comparison under shrinking power budget

Comparison

On average, SuperRange achieve 52% and 170% higher PCEthan Off-VR and LDO-VR scheme.

• Power delivery design for wide operational range is an important issue

• Explore the optional power delivery design scheme

• The proposed SuperRange scheme achieves high PCE over the entire operational range

• Propose a VR aware power management algorithm

Conclusion

• Thank You for Your Attention

• Question?