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Tushar KhandelwalApril 2019

SW Architecture for Rich IOTCorstone-700

Arm Central Engineering - Open Source Software

2 © 2019 Arm Limited

Agenda• Corstone-700 : A Rich IOT platform• System Architecture• Example system• Hardware Security• Inter Processor Communication• Software stack – an Example• Example Boot flow• Reference Implementation• Future Stories• Demo• Questions ?

3 © 2019 Arm Limited

Corstone-700 : A Rich IOT platform

• Corstone-700 is a new Arm subsystem• Targeting SoC designs for more demanding IoT applications• Incorporates a mixture of flexible Cortex-A, Cortex-M compute and security

features• Has a wide range of generic applications

– A specific collaboration between Arm and Microsoft supports Azure Sphere compliant solutions

• The subsystem will be supported by a reference Open Source Software stack• Providing the foundations for generic product solutions

4 © 2019 Arm Limited

System Architecture

System example

Corstone-700 subsystem

AXI interconnect

A-Classsubsystem

System control

ROMPower control

Debug

Security enclaveM -Class

Expansion

ExpansionM

HU

Firewall

FW

M-Class system

Firewall

RAM

MHU

5 © 2019 Arm Limited

Example System

TEERichOS

Host System

Secure Enclave External system

6 © 2019 Arm Limited

Hardware Security

• The Interrupt Router, is a programmable router for interrupts, located before two or more Interrupt Controllers in an SoC

• Firewall is to authenticate and filter accesses to different regions of the system address space in an SoC

Interrupt RouterFirewall

7 © 2019 Arm Limited

Inter Processor Communication

Cortex A32 Cortex M0+

Cortex M3

MHU

Secure MHU

MHUMHU

Host Secure Enclave

External System

GIC 400

NVIC

NVIC

MHU

Non Secure MHU

Secure services

Sensor Data

Non Secure services

Non Secure services

8 © 2019 Arm Limited

Software stack – an Example

Host - Cortex-A32 External system- Cortex-M3/33

ARM Trusted Firmware

Tiny Linux

OpenEmbedded Filesystem

Little FS

IOT client + OpenAMP using

RPMsg

CMSIS

RTX/Zephyr

TEE

Services

(optee)

Cortex-M0+

(Secure Enclave)

CMSIS

RTX/TF-MM

H

U

M

H

U

OpenAMP using RPMsgOpenAMP using RPMsg

9 © 2019 Arm Limited

Example Boot flow – Host and Secure Enclave

SE RAM FW

SE BootROM

SE

RESET

SEinititailization

Non-Secure Services

Secure Services

AP

RESET

TEE Secure

services

Secure Monitor

TEE REE

Release AP out of reset by writing jump address in Boot Reg

Linux

File System+

IOT Client

1

Flash Image

3Boot

Secure Mailbox

Secure Services

Non Secure Mailbox

Non Secure Service4

5

V8 32 bit mode it is single execution mode

Loads

2

10 © 2019 Arm Limited

Reference Implementation

• Reference Implementation will be opensource.

• It will provide driver reference implementation and IP configuration.

• Stack will have software for all the three systems demonstrating boot and communication

• Yocto used for build and packaging of Images

• Public instructions will help interested partners to build and run on FPGA/FVP

11 © 2019 Arm Limited

Future Stories• Secure Enclave – Root Of Trust (ROT)

• Secure Boot

• Firmware Update

• Trusted Firmware M

• PSA Compliance

• Secure Services

12 © 2019 Arm Limited

Demo

13 © 2019 Arm Limited

Questions ?

Thank YouDankeMerci��

�����Gracias

Kiitos감사합니다

ध"यवादاًركشהדות

© 2019 Arm Limited

The Arm trademarks featured in this presentation are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in

the US and/or elsewhere. All rights reserved. All other marks featured may be trademarks of their respective owners.

www.arm.com/company/policies/trademarks

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