the direct determination of mosfet parameters from the id ... · * from yannis tsividis, operation...
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The direct determination of The direct determination of MOSFET parameters from the IMOSFET parameters from the IDD
versus Vversus VSS curve at low Vcurve at low VDSDS
Carlos Galup-Montoro, Márcio Bender Machado,
Thiago de Oliveira, Márcio Cherem Schneider Thiago de Oliveira, Márcio Cherem Schneider
Federal University of Santa CatarinaBrazil
MOSMOS--AK Workshop, AK Workshop, DecemberDecember 20102010
ContentsContents
11 - Threshold Voltage definitions
22 - Determination of MOSFET parameters from ID
x VS
curve, (channel_conductance)/Id method
33 - Comparison with gm/Id method
222MOS-AK Workshop, December 2010
44 - Applications of the threshold voltage
determinations
55 - Conclusions
Near the threshold condition ( moderate inversion), both the drift and
diffusion transport mechanisms are important.
Threshold voltage (VT)Threshold voltage (VT)
333MOS-AK Workshop, December 2010
IDS1= Drift component
IDS2= Diffusion component
* from Yannis Tsividis, Operation and Modeling of The MOS transistor, MCGraw-Hill
No critical point can be directly identified
ClassicalClassical threshold voltage (VT) definitionthreshold voltage (VT) definition
Classical (surface potential based) definition of threshold:Classical (surface potential based) definition of threshold:
CFS V+= φφ 2Where :φφφφS - surface potential for VG=VT
φφφφF - Fermi potential in the substrate
VC - channel potential
In principle the direct determination of the threshold voltage
is possible
444MOS-AK Workshop, December 2010
is possible
1)1) calculate the saturation drain current IDTh
for
22)) inject IDTh
in the transistor and measure VG
= VT
DrawbacksDrawbacks
- geometrical (W, L) and technological parameters ( mobility, oxide
thickness,.. ) are needed to calculate IDTh
- the transistor operates in the saturation region where several
secondary effects are relevant
CFS V+= φφ 2
For a MOSFET the current defined threshold corresponds to an
inversion charge density equal to the thermal charge density ( the
effective channel capacitance per unit area times the thermal voltage).
diffdrift II =
Current based threshold definition Current based threshold definition
555MOS-AK Workshop, December 2010
where n is the slope factor
tOXI nCQ φ'' −=For a bulk MOSFET
Relationship between threshold voltages Relationship between threshold voltages
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‘Ideal’ threshold voltage extraction ‘Ideal’ threshold voltage extraction procedureprocedure
• No parameters are needed to calculate the
threshold current
• The transistor operates at low current levels
and in the linear region to minimize series and in the linear region to minimize series
resistances and short channel effects
gm/Id curve in the linear regiongm/Id curve in the linear region
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VT determination from gm/Id VT determination from gm/Id curve in the linear regioncurve in the linear region
• Transconductance-to-current ratio for VDS
≅ ϕt/2 and V
S=0.
Threshold gm
/ID
≅≅≅≅ 0.5 (gm
/ID)
max
Drawback (gm/ID)max
has some dependence on VG
888MOS-AK Workshop, December 2010
The new (channel conductance GThe new (channel conductance Gn0n0/Id) /Id) methodologymethodology
Direct determination of MOSFET parameters from the ID
versus VS curve at low VDS
VDS=ϕ
t/2
2
x 10-4
x 10-4
[A]
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XDS VVV ∆=∆=∆
nomdmsX
D GggV
I=+−=
∂∂
VG
VX
0 0.1 0.2 0.3 0.4 0.5 0.6
0
1
VX [V]
I D [A
]
VX
[V]I D[A]
The Gn0/Id methodologyThe Gn0/Id methodology
Transistor operation:Transistor operation:
• low VDS
• weak and moderate inversion
• fixed VG
Negligible effects of :Negligible effects of :
101010MOS-AK Workshop, December 2010
Negligible effects of :Negligible effects of :
• series resistances
• field dependent mobility
• slope factor variation
• channel length modulation
The Gn0/Id methodology The Gn0/Id methodology –– extract Vextract VTT and Iand ISS
When if =3 → VP=VS=VX
From transistor model
From UICM
( ) ( )rfD
n
rftD
n
iiI
G
iiI
G
+++
=
+++−=
11
2
11
2
min
00
φ
( )112
)()( −+= dft
Sdms i
Ig
φ
( )rfSD iiII −=L
WnCI t
OXS 2'
2φµ=
( )11ln21)( −++−+=− DSP ii
VV
111111MOS-AK Workshop, December 2010
When if =3 → VP=VS=VX
for if = 3 and
VDS = φφφφt /2
we have ir = 2.12 VP = VX
When
min
00 *53.0
=
D
n
D
n
I
G
I
G
andVG
VDS
=ϕt/2
VX
( )11ln21 )()( −++−+= rfrft
iiφ
-30
-25
-20
-15
-10
-5
0
Gno
/I D [1
/V]
min
00 53.0
=
D
n
D
n
I
G
I
G
V = V
The Gn0/Id methodology The Gn0/Id methodology –– extract Vextract VTT and Iand ISS
121212MOS-AK Workshop, December 2010
0 0.1 0.2 0.3 0.4 0.5
-40
-35
VX [V]
VP
= VX
VT0 = - nVP + VG
IS = ID
When
min
00 *53.0
=
D
n
D
n
I
G
I
Gand
The Gn0/Id methodology The Gn0/Id methodology –– extract extract pinchpinch--offoff
voltage voltage VVPP
and and slope factor slope factor nnVP[V]
slopefactor(n)
BSIM simulation
0 0.1 0.2 0.3 0.4 0.50
1
2
x 10-4
vg=0.7V
vg=0.75V
vg=0.8Vvg=0.85V
vg=0.9V
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measuring ID x VS for different VG values
VG
[V]VG
[V]
VX[V]
I D[A]
Gn0/Id x gm/Id methodsGn0/Id x gm/Id methods
|Gn0/I
D|
gm/I
Dgm/I
D
|Gn0/I
D||G
n0/I
D|
Transconductance
/ID[1/V]
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Transconductance
ID
[A]
Gn0/Id x gm/Id methodsGn0/Id x gm/Id methods
IISS
L mask (W/L=100) 0.2 µm 0.3 µm 0.4 µm 0.5 µm 0.6 µm 0.8 µm 2.0 µm
IS
(µA) gm/ID
23.82 18.21 16.19 15.67 15.54 15.94 16.62
IS
(µA) Gn0/ID 21.47 15.21 13.27 13.53 13.41 13.72 14.65
VVT0T0
L mask (W/L=100) 0.2 µm 0.3 µm 0.4 µm 0.5 µm 0.6 µm 0.8 µm 2.0 µm
VT
(mV) gm/ID
514 499 494 488 484 478 456
VT
(mV) Gn0/ID
515 495 490 486 481 475 455
0.18 µm technology
IS
when VGS
≈VT0
151515MOS-AK Workshop, December 2010
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2450
460
470
480
490
500
510
520
Lmask
[µm]
VT [m
V]
gm/Id method
Gno/Id method
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 212
14
16
18
20
22
24
Lmask
[µm]
I S [µ
A]
gm/Id method
Gno/Id method
ApplicationsApplications
•• Transistor aging (or electrical stress)
• Matching assessment
• Temperature drift characterization
Applications using VT extractionApplications using VT extraction
161616MOS-AK Workshop, December 2010
• Temperature drift characterization
• Radiations effects on MOS transistor
ApplicationsApplications
11- Extract IS and VT in a non-noisy environment using an accurate method (gm/Id or Gn0/Id)
VV −22- Extract VT in a real environment considering Id=3*Is (if =3) in a
171717MOS-AK Workshop, December 2010
n
VVVP TG 0−
=
VP
= 0 VG
= VT0
VP
[V]
VG[V]
VG
VS
3IS
considering Id=3*Is (if =3) in a
saturated transistor
From UICM
when if = 3, VP
= VS
Example of HCI stress measurement using VT variation
ApplicationsApplications
[mV]
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ΔVT[m
V]
Time [Seconds]
ConclusionsConclusions
• New procedure for direct determination of the threshold voltage and some other important electrical parameters with minimum influence of second order effects.
• The threshold voltage is determined at a constant gate-to-substrate voltage, at a low drain-to-source voltage and with transistor operation in the weak and moderate inversion transistor operation in the weak and moderate inversion regions.
• Under these operating conditions the effects of series resistances, mobility and slope factor variations, and channel length modulation are practically negligible, allowing a direct determination of the threshold voltage and of the DIBL effect.
191919MOS-AK Workshop, December 2010
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