the inverters. digital gates fundamental parameters l functionality l reliability, robustness l area...
Post on 12-Jan-2016
234 Views
Preview:
TRANSCRIPT
THE INVERTERS
DIGITAL GATES Fundamental Parameters
Functionality Reliability, Robustness Area Performance
» Speed (delay)» Power Consumption» Energy
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Noise in Digital Integrated Circuits
VDDv(t)
i(t)
(a) Inductive coupling (b) Capacitive coupling (c) Power and ground
noise
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
DC Operation: Voltage Transfer Characteristic
V(x)
V(y)
VOH
VOL
VM
VOHVOL
fV(y)=V(x)
Switching Threshold
Nominal Voltage Levels
V(y)V(x)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Mapping between analog and digital signals
"1"
"0"
VOH
VIH
VIL
VOL
UndefinedRegion
V(x)
V(y)
VOH
VOL
VIH
VIL
Slope = -1
Slope = -1
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Definition of Noise Margins
VIH
VIL
UndefinedRegion
"1"
"0"
VOH
VOL
NMH
NML
Gate Output Gate Input
Noise Margin High
Noise Margin Low
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
The Regenerative Property
(a) A chain of inverters.
v0, v2, ...
v1, v3, ... v1, v3, ...
v0, v2, ...
(b) Regenerative gate
f(v)
finv(v)
finv(v)
f(v)
(c) Non-regenerative gate
v0 v1 v2 v3 v4 v5 v6
...
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Fan-in and Fan-out
N
M
(a) Fan-out N
(b) Fan-in M
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
The Ideal Gate
Vin
Vout
g=
Ri =
Ro = 0
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
VTC of Real Inverter
0.0 1.0 2.0 3.0 4.0 5.0Vin (V)
1.0
2.0
3.0
4.0
5.0
Vo
ut (V
)
VMNMH
NML
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Delay Definitions
tpHL
tpLH
t
t
Vin
Vout
50%
50%
tr
10%
90%
tf
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Ring Oscillator
v0 v1 v2 v3 v4 v5
v0 v1 v5
T = 2 tp N
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Power Dissipation
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS INVERTER
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
The CMOS Inverter: A First Glance
VDD
Vin Vout
CL
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverters
Polysilicon
InOut
Metal1
VDD
GND
PMOS
NMOS
1.2 m=2
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Switch Model of CMOS Transistor
Ron
|VGS| < |VT||VGS| > |VT|
|VGS|
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter: Steady State Response
VDD VDD
VoutVout
Vin = VDD Vin = 0
Ron
Ron
VOH = VDD
VOL= 0
VM = Ronp) f(Ronn,
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter: Transient Response
VDD
Vout
Vin = VDD
Ron
CL
tpHL = f(Ron.CL)
= 0.69 RonCL
t
Vout
VDD
RonCL
1
0.5
ln(0.5)
0.36
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Properties
Full rail-to-rail swing Symmetrical VTC Propagation delay function of load
capacitance and resistance of transistors No static power dissipation Direct path current during switching
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Voltage TransferCharacteristic
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
PMOS Load Lines
VDSp
IDp
VGSp=-5
VGSp=-2VDSp
IDnVin=0
Vin=3
Vout
IDnVin=0
Vin=3
Vin = VDD-VGSpIDn = - IDp
Vout = VDD-VDSp
Vout
IDnVin = VDD-VGSpIDn = - IDp
Vout = VDD-VDSp
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter Load Characteristics
In,pVin = 5
Vin = 4
Vin = 3
Vin = 0
Vin = 1
Vin = 2
NMOSPMOS
Vin = 0
Vin = 1
Vin = 2Vin = 3
Vin = 4
Vin = 4
Vin = 5
Vin = 2Vin = 3
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter VTC
Vout
Vin1 2 3 4 5
12
34
5
NMOS linPMOS off
NMOS satPMOS sat
NMOS offPMOS lin
NMOS satPMOS lin
NMOS linPMOS sat
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Simulated VTC
0.0 1.0 2.0 3.0 4.0 5.0Vin (V)
0.0
2.0
4.0
Vo
ut (V
)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Gate Switching Threshold
0.1 0.3 1.0 3.2 10.01.0
2.0
3.0
4.0
kp/kn
VM
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
MOS Transistor Small Signal Model
rogmvgsvgs
+
-
S
DG
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Determining VIH and VIL
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Propagation Delay
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter: Transient Response
VDD
Vout
Vin = VDD
Ron
CL
tpHL = f(Ron.CL)
= 0.69 RonCL
t
Vout
VDD
RonCL
1
0.5
ln(0.5)
0.36
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverter Propagation Delay
VDD
Vout
Vin = VDD
CLIav
tpHL = CL Vswing/2
Iav
CL
kn VDD
~
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Computing the Capacitances
VDD VDD
VinVout
M1
M2
M3
M4Cdb2
Cdb1
Cgd12
Cw
Cg4
Cg3
Vout2
Fanout
Interconnect
VoutVin
CL
SimplifiedModel
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
CMOS Inverters
Polysilicon
InOut
Metal1
VDD
GND
PMOS
NMOS
1.2 m=2
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
The Miller Effect
Vin
M1
Cgd1Vout
V
V
Vin
M1
Vout V
V
2Cgd1
“A capacitor experiencing identical but opposite voltage swings at both its terminals can be replaced by a capacitor to ground, whose value is two times the original value.”
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Computing the Capacitances
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Impact of Rise Time on Delayt p
HL(n
sec
)
0.35
0.3
0.25
0.2
0.15
trise (nsec)10.80.60.40.20
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Delay as a function of VDD
0
4
8
12
16
20
24
28
2.00 4.001.00 5.003.00
Nor
mal
ized
Del
ay
VDD (V)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Where Does Power Go in CMOS?
• Dynamic Power Consumption
• Short Circuit Currents
• Leakage
Charging and Discharging Capacitors
Short Circuit Path between Supply Rails during Switching
Leaking diodes and transistors
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
MOS Transistors (again) Device Equations:
» Off (ignore sub-threshold): Vgs < Vt– Ids = 0
» Linear: Vgs > Vt & |Vdg|<|Vth|
» Saturation:Vgs>Vt & |Vgd| > |Vth|
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Current Flow in an InverterR = 100 Ohms C = 0.1 pf (100 ff)
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Spice Deck
*** SPICE DECK created from inv1.sim, tech=scmos
M1 2 4 1 1 CMOSP L=3.0U W=6.0U
M2 0 4 3 0 CMOSN L=3.0U W=6.0U
R3 2 5 100
R4 3 5 100
R5 5 6 100
C6 6 0 0.1000PF
*vin 4
*vout 6
vdd 1 0 dc 5v
****************V1 V2 Del Tr Tf Tpw Period
vin 4 0 pulse (0v 5v 5ns 5ns 5ns 5ns 50ns)
Dynamic Power Dissipation
Energy/transition = CL * Vdd2
Power = Energy/transition * f = CL * Vdd2 * f
Need to reduce CL, Vdd , and f to reduce power.
Vin Vout
CL
Vdd
Not a function of transistor sizes!
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Impact ofTechnology Scaling
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Technology Evolution
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Technology Scaling (1)
Minimum Feature Size Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Technology Scaling (2)
Number of components per chip Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Propagation Delay Scaling
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Technology Scaling Models
• Full Scaling (Constant Electrical Field)
• Fixed Voltage Scaling
• General Scaling
ideal model — dimensions and voltage scaletogether by the same factor S
most common model until recently —only dimensions scale, voltages remain constant
most realistic for todays situation —voltages and dimensions scale with different factors
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Scaling Relationships for Long Channel
Devices
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Scaling of Short Channel Devices
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
top related