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An Improved Distributed Control Strategy for Parallel Inverters

Tianzhi Fang, Xinbo Ruan, Senior Member, IEEE, Lan Xiao and Aizhong Liu Aero-Power Sci-tech Center, College of Automation Engineering

Nanjing University of Aeronautics and Astronautics, Nanjing, 210016, China Tel: +86-25-84892053, Fax: +86-25-84892053

E-mail: fangtianzhi@126.com

AbstractParallel operation of inverters improves the reliability, maintainability, expandability, and standardization. Many control methods have been proposed. The master- slave method can not realize the redundancy because the slave modules are dependent on the master module, the wireless control method using frequency and voltage droop technique presents too poor output characteristics. Distributed control strategy achieves hot swap and redundancy, the output characteristics is relatively poor due to the inductor current feedback loop. This paper introduces the load current feed-forward control to the distributed control strategy to improve the output characteristics. Meanwhile, the functions of output current limiting and current sharing are remained. The output characteristics and circulating current with and without the load current feed-forward control are compared in this paper. The prototype of parallel inverters is built to verify the effectiveness of the improved method.

I. INTRODUCTIONParallel redundant operation of inverters improves the

reliability, maintainability, expandability and standardization. The key issue is ensuring the output current be equally shared by the constitutive inverter modules. Many control methods have been proposed, including master-slave control [1-3], wireless control [4-7] and distributed control [8-16]. The master-slave method has simple current sharing control circuit, but it can not realize the redundancy because the slave inverters can not work alone and the whole system will collapse in case the master module fails. The wireless control, namely the frequency and voltage droop technique, requires no interconnections among the modules and it is easy to achieve redundancy, however the system output characteristics is very poor. The distributed control can be classified into two categories, i.e., the power deviation control method [8-11] and the average current control method [12-16]. The former one is based on the theory that the active and reactive power is separately determined by the phase and amplitude of each modules output voltage, respectively. It needs complicated control circuit for current sharing. The latter one is based on average current control. Particularly, the strategy proposed in [14-15] decouples the parallel control into the synchronization of voltage reference and the averaging of current reference. The instantaneous current sharing is acquired with simple circuit, and hot swap and redundancy are easy to achieve. The inductor-current

feedback control is employed in this method and it induces poor output characteristics.

In this paper, the load current feed-forward control is introduced into the average current control method to improve the output characteristics. Meanwhile, the functions of output current limiting and current sharing are kept. The output characteristics and circulating current between the original and improved methods are compared, and experimental results are presented to verify the effectiveness of the improved method.

II. CONTROL METHOD OF SINGLE INVERTERThe circuit block diagram and the control block

diagram of single inverter are illustrated in Fig.1 and Fig.2, respectively. The voltage and current double close-loop control is employed. The voltage outer loop adopts a proportional-integral (PI) regulator with the transfer function of Gv(s)=K+(1/Ts). The current inner

Fig. 1. Circuit block diagram.

(a)

(b) Fig. 2. Control block diagram of single inverter.

978-1-4244-1668-4/08/$25.00 2008 IEEE

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loop is normally the inductor current feedback. In order to improve the inverter output characteristics, the load current feed-forward, as shown with broken line arrow in Fig.2(a), is introduced, where Ki and Ko are inductor current sampling ratio and load current sampling ratio, respectively. When Ko is equal to Ki, the output voltage of inverter is independent of the load and the optimal output characteristics is achieved. At this time, the current loop is equivalent to the capacitor-current feedback. In the case of Ko=Ki, when the load current feed-forward is at point A, the current-limiting component actually limits the capacitor current by limiting the capacitor current reference. However, the load current can not be limited for the capacitor current does not include the information of the load current. When the load current feed-forward is at point B, the current-limiting component limits the inductor current by limiting the inductor current reference. The load current can be limited for the inductor current being the sum of the load current and the capacitor current.

With well-designed current tracking performance, the inner loop (referring to the dashed frame in Fig.2(a)) can be simplified as the current follower whose amplification KI is equal to 1/Ki [11, 15]. So Fig.2(a) is equivalent to Fig.2(b) when the load current feed-forward is at point B.

III. CONTROL STRATEGY OF PARALLEL SYSTEMThe control block diagram of multi-module parallel

system is shown in Fig.3. The voltage reference signals of all modules, Ur1(s), Ur2(s), , UrN(s), are generated by DSP and high precision digital-to-analog converter and they are synchronized by DSP, so they have almost the same amplitude, frequency and phase, i.e.,

1 2( ) ( ) ( ) ( )r r rN rU s U s U s U s "" (1)

Fig. 3. Control block diagram of parallel system.

Fig. 4. Control block diagram of two-module parallel system.

In the conventional average current control method [14-15] (see Fig.3 excluding the dashed arrow), the output characteristics of single or parallel inverters is poor due to the inductor-current feedback control.

If the added load current feed-forward is at point A and KojKij, it is equivalent to the capacitor-current feedback control for single inverter and the optimum output characteristics is achieved accordingly. In this strategy the capacitor current reference signals of all inverter modules are averaged as the common current reference signal, which is followed by capacitor current of all inverter modules that reach coherence ultimately. But the coherent capacitor current can not promise the coherent load current because the former does not include the information of the latter. So current sharing can not be obtained, and moreover, the current-limiting component can only limit the capacitor current but can not limit the load current.

If the added load current feed-forward is at point B and KojKij, the output characteristics independent of the load can also be achieved, which will be analyzed in the next section. The inductor current reference signals of all inverter modules are averaged as the common one, which is followed by the inductor current of all inverter modules that reach coherence finally. The load current will be shared as long as the output filter capacitors are equal. Meanwhile the current-limiting component can limit the load current by limiting the inductor current. In the following text, the control strategy of the inductor-current feedback combined with and without the load current feed-forward (added load current feed-forward is at point B and KojKij) are called strategy #1 and strategy #2, respectively.

IV. COMPARISON BETWEEN TWO CONTROL STRATEGIES OF PARALLEL SYSTEM

A. Comparison of Output Characteristics For no loss of generality, a two-module parallel system

is taken as the example to compare the output characteristics and circulating current between the two strategies. Fig.4 shows the control block diagram, where the current loops are simplified as the current followers. Voltage references, namely Ur1(s) and Ur2(s) can be considered unique one, that is, Ur1(s)=Ur2(s)=Ur(s) for their synchronous and identical in amplitude. The transfer function of the parallel system can be deduced as

1 2 1 21 2

21 2 3

1 1( ) ( )( )

( )( )

I Io

r

K K K K sT TU s

sU s s s

I

$ $ $

(2)

where 1 2 1 1 2 2 1 1 2( )( ) 2( )o o I f I f f fK K K C K C C C$ ,

1 1 2 22 1 2 1 1 2 2

2 ( )( )( )

( )o I o I

I I v vK K K KK K K K K K

Z s

$ ,

1 23 1 2

1 2

( ) v vI IK K

K KT T

$

.

According to (2), the amplitude frequency characteristics under resistive load can be expressed as

3502

22 2 2

1 2 1 21 2

1 2

1 1( ) ( )

( )I IK K K K T T

j

Z

I Z

% %

(3)

where

`

1 21 1 2

1 2

222 1 1 2 2 1 1 2

( )

[( )( ) 2( )]

v vI I

o o I f I f f f

K KK K

T T

K K K C K C C C Z

%

,

221 1 2 2

2 1 2 1 1 2 22 ( )

( )( ) o I o II I v vK K K K

K K K K K KR

Z % .

In the case of single inverter, we can obtain 2 2 2

2

2 22 2

1( )( )

1

I

I v I of I v

K KTj

K K K KC K K KT R

ZI Z

Z Z

(4)

The rms value of the output voltage Uo develops with the same trend as |I(jZ)| for the relationship of Uo=|I(jZ)|Ur.Expression [2(Ko1KI1+Ko2KI2)]/R in (3) will be 2/R under strategy #2 where Ko1Ko20, and then |I(jZ)| and Uodecrease with the increasing load. This conclusion can also be drawn for single inverter for expression (1KIjKoj)/R in (4) will be 1/R under strategy #2 where Koj0 (j=1,2)). Obviously strategy #2 results in poor output characteristics. Under strategy #1 where Koj=Kij=1/KIj(j=1,2), both expressions (1KIjKoj)/R and [2(Ko1KI1+Ko2KI2)]/R are equal to zero, which promises that the output voltage of parallel system and that of single inverter are both independent of the load, so the output characteristics is greatly improved.

B. Comparison of Circulating Current From Fig.4, we can derive the following equations.

1 1 1( ) ( ) ( )o I g f oI s K I s sC U s (5)

2 2 2( ) ( ) ( )o I g f oI s K I s sC U s (6)

> @1 2( ) ( ) ( ) ( ) ( ) ( )o o o oU s I s Z s I s I s Z s (7)Substitution of (5) and (6) into (7), yields

1 2

1 2

1 ( ) ( )( ) ( )

( )( )f f

g oI I

Z s s C CI s U s

Z s K K

(8)

The circulating current can be derived from (5), (6) and (8) as

> @1 21 2 2 1

1 2 2 1 1 2

1 2 1 2

( ) ( ) ( ) 2

( ) ( ) ( ) ( ) 2

( )( ) ( )

2( )

H o o

I I g f f o

I f I f I Io o

I I I I

I s I s I s

K K I s s C C U s

s K C K C K KU s I sK K K K

(9)

Eq. (9) can be rewritten in phasor form as 1 2 2 11 2

1 2 1 2

1 2

1 2

1 2 2 1 1 2

1 2 1 2

2( )

2( )

2( )

I f I fI IH o o

I I I I

I Io

I I

I f I f I Io o

I I I I

K C K CK KI I j UK K K KK K R IK K Z

K C K C K K Xj U IK K K K Z

Z

Z

x x x

(10)

1LfIx

2LfIx

1oIx

2oIx

1CfIx

2CfIx

oIx

Fig.5 Circuit diagram of two-module parallel system