an introduction to photonic switching fabrics
TRANSCRIPT
An Introduction to Photonie Switching Fabrics
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An Introduction to Photonic Switching Fabrics
H. Scott Hinton McGill University Montreal, Quebec, Canada
In collaboration with
J. R. Erickson
T. J. Cloonan F. A. P. Tooley F. B. McCormick and A. L. Lentine
Springer Science+Business Media, LLC
Llbrary of Congress Cataloglng-ln-Publleatlon Data
Hinten, H. Seett. An Intreduetien te phetenie switchlng fabrlcs I H. Scett Hinten;
In cellaberatien wlth J.R. Ericksen ... [et al.l. p. cm. -- (Appl icatiens ef cemmunicatiens theeryl
Inc 1 ud es bl b li egraph i ca I references and 1 ndex.
1. Telecemmunicatlen--Swltching systems. 2. Phetenics. 3. Swltching circuits. I. Title. II. Series. TKS103.8.HS6 1993 621.381S·37--dc20
ISBN 978-1-4757-9173-0 ISBN 978-1-4757-9171-6 (eBook) DOI 10.1007/978-1-4757-9171-6
C 1993 Springer Science+Business Media New York
Originally published by Plenum Press, New York in 1993.
Softcover reprint of the hardcover 1 st edition 1993
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Preface
Over the past ten years there has been an increasing interest in developing photonic switching fabrics as the predicted broadband services approach reality. The result of this interest is that many different types of photonic switching fabrics have been proposed and demonstrated. This book gives an overview of these photonic switching fabrics from a system designer's perspective.
The book is divided into six chapters. Chapter I provides an introduction to the different types of photonic switching fabrics and the technologies used to implement them. lt inc1udes discussion of the future requirements for the information age, strengths and limitations of photonic technology, switching fabrics based on optically transparent devices, and switching fabrics based on logic devices. Chapter 2 provides an overview of optically transparent devices and their attributes. It begins with a discussion of light propagation in a dielectric media followed by a review of several modulators, switching devices (e.g., directional couplers), linear optical amplifiers, and spatial light modulators. Chapter 3, written by J. R. Erickson and H. S. Hinton, outlines the proposed systems based on the previously discussed optically transparent devices. It inc1udes discussion of space-division networks and several types of multiple-access networks inc1uding both timedivision multiple access and spectral-division multiple access. Chapter 4, written by F. A. P. Tooley, A. L. Lentine, and H. S. Hinton, introduces optical logic devices. It discusses intrinsic bistability and optical nonlinearities, quantum-well optoelectronic devices (e.g., SEEDs), and active switching transistor devices. Chapter 5, written by F. B. McCormick and H. S. Hinton, provides an overview of the optical hardware required for switching fabrics based on logic devices and free-space optical interconnection. This inc1udes a review of imaging and aberrations in free-space systems, polarization, spot
v
vi Preface
array generation, and beam array combination. Finally, Chapter 6, written by T. J. Cloonan and H. S. Hinton, discusses the systems that can be implemented using logic devices. It inc1udes an overview of switching architectures, a discussion of the architectural building blocks required in free-space switching systems, and an overview of free-space photonic switching system architectures.
I am grateful to many people for their help in putting this book together, especially my coauthors J. R. Erickson, T. J. Cloonan, F. B. McCormick, F. A. P. Tooley, and A. L. Lentine. Finally, I would like to thank my wife, Sharon, for providing continuous encouragement and support.
Contents
Chapter 1. Introduction 1.1. Switching Systems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I 1.2. The Strengths and Limitations of the Photonie Technology ........ 4
1.2.1. Temporal Bandwidth .................................. 4 1.2.2. Communication Energy and Power ...................... 7 1.2.3. Skew ................................................ \3 1.2.4. Spatial Bandwidth .................................... 14 1.2.5. Secondary Strengths .................................. 15 1.2.6. New Architectures .................................... 15
1.3. Switching Fabrics Based on Relational Devices .................. 16 1.3.1. Switching Fabrics Using Space Channe\s . . . . . . . . . . . . . . . . . . 16
1.3.1.1. Fabrics Based on Directional Couplers .......... 16 1.3.1.2. Fabrics Based on Optical Amplifiers ............ 18 1.3.1.3. Fabrics Based on Spatial Light Modulators ...... 19
1.3.2. Switching Fabrics Using Time Channe\s .................. 20 1.3.2.1. Active Reconfigurable Fabrics .................. 20 1.3.2.2. Passive Shared Media Fabrics .................. 22
1.3.3. Switching Fabrics Using Wave\ength Channe\s ............ 25 1.3.3.1. Wavelength Interchanger ...................... 25 1.3.3.2. Passive Shared Media Fabrics .................. 26
1.3.4. Multidivisional Fabrics ................................ 27 1.4. Switching Fabrics Based on Logic Devices ...................... 29
1.4.1. Switching Nodes ...................................... 30 1.4.2. Three-Dimensional Interconnection Networks ............ 31 1.4.3. Networks Using Electronic Nodes. . . . . . . . . . . . . . . . . . . . . . . . 32
1.5. Summary .................................................. 33 1.6. Exercises.................................................... 34
References .................................................. 35
vii
viii Contents
Chapter 2. Optically Transparent Devices 2.1. Introduction ................................................ 39 2.2. Light Propagating in a DieJectric Medium ...................... 39
2.2.1. Index Ellipsoid. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2.2.2. Linear Electro-optic Effect (PockeJs Effect) . . . . . . . . . . . . . . . . 43
2.3. Modulators.................................................. 45 2.3.1. Electro-optic Phase Modulators. . . . . . . . . . . . . . . . . . . . . . . . . . 45 2.3.2. Y-Branch Intensity Modulator .......................... 47
2.4. Photonie Switching Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 2.4.1. Directional Couplers .................................. 47
2.4.1.1. Coupling between Waveguides .................. 48 2.4.1.2. Cross State Design ............................ 51 2.4.1.3. Bar State Design .............................. 53 2.4.1.4. Bends in Waveguides .......................... 55 2.4.1.5. Polarization.................................. 56 2.4.1.6. Current System Design Constraints .............. 58
2.4.2. Balanced-Bridge Switch ................................ 60 2.4.3. X-Switches............................................ 61 2.4.4. Digital Electro-optic Switches .......................... 63
2.5. Linear Optical Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 2.5.1. Material Gain ........................................ 66 2.5.2. Traveling Wave Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 2.5.3. Fabry-Perot Amplifiers ................................ 69 2.5.4. Near Traveling Wave Amplifiers ........................ 72 2.5.5. Backward Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 2.5.6. Systems Considerations ................................ 75
2.6. Spatial Light Modulators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 2.7. Problems.................................................... 77
References .................................................. 79
Chapter 3. Optically Transparent Systems 3.1. Introduction ................................................ 83 3.2. Space-Division Switching Networks ............................ 83
3.2.1. Switching Network Characterization .................... 84 3.2.2. Partially Connected Networks .......................... 85 3.2.3. Fully Connected Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 3.2.4. Rearrangeably Nonblocking Networks. . . . . . . . . . . . . . . . . . . . 87 3.2.5. Wide-Sense Nonblocking Networks ...................... 90 3.2.6. Strictly Nonblocking Networks . . . . . . . . . . . . . . . . . . . . . . . . . . 91 3.2.7. Redundancy in Networks .............................. 94 3.2.8. Blocking Probability .................................. 95 3.2.9. Output Concurrency .................................. 95
3.3. Space-Division Switching with Optically Transparent Devices ...... 96 3.3.1. Optically Transparent Systems Using Spatial Light
Modulators .......................................... 97
Contents ix
3.3.2. Optically Transparent Systems Using Guided-Wave Electro-optic Switches ........................................ 99 3.3.2.1. Crossbar Architecture Using Directional Coupler
Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 3.3.2.2. Router/Selector Architecture Using Directional
Coupler Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 3.3.2.3. Benes Architecture Using Directional Coupler
Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 3.3.2.4. Coupler Count, Loss, and Cross Talk Comparisons 110 3.3.2.5. Architecting around Cross Talk Limitations ...... 112 3.3.2.6. Other Optically Transparent System Design
Parameters .................................. 112 3.4. Multiple-Access Channel .............. . . . . . . . . . . . . . . . . . . . . . . . . 113 3.5. Time-Division Multiple Access Networks . . . . . . . . . . . . . . . . . . . . . . . . 114
3.5.1. Bit- versus Block-Multiplexing .......................... 114 3.5.2. Bit- and Block-Switching Using Optically Transparent
Devices .............................................. 116 3.5.3. CDMA Switching .................................... 119 3.5.4. Combined Time- and Space-Division Switching . . . . . . . . . . . . 121 3.5.5. Packet Switching ...................................... 124
3.6. Spectral-Division Multiple Access Networks .................... 124 3.6.1. Electrical Frequency-Division Multiple Access ............ 125 3.6.2. Subcarrier Multiple Access Systems. . . . . . . . . . . . . . . . . . . . . . 125 3.6.3. Optical Multiple Access Networks ...................... 128
3.6.3.1. Optical FDMA FSK Direct Detection Example. . . . 135 3.6.3.2. Optical FDMA FSK Coherent Detection Example 140 3.6.3.3. Wavelength-Division Multiple Access Network
Example .................................... 142 3.6.4. Multihop Lightwave Networks .......................... 145 3.6.5. Combined WDMA and Subcarrier Multiplexed Systems.... 148 3.6.6. Wavelength Routing .................................. 149
3.7. Problems.................................................... 149 3.8. Solutions to Problems ........................................ 153
References .................................................. 158
Chapter 4. Optical Logic Devices 4.1. Introduction ................................................ 163 4.2. Optical Nonlinearities ........................................ 166
4.2.1. Introduction.......................................... 166 4.2.2. Nonresonant Optical Nonlinearities . . . . . . . . . . . . . . . . . . . . . . 167 4.2.3. Resonant Optical Nonlinearities ........................ 169
4.2.3.1. Dynamic Moss-Burstein Shift (InSb) ............ 172 4.2.3.2. Exciton Saturation Nonlinearity (Bulk GaAs) .... 173
4.2.4. Introduction to Electroabsorption and SEEDs ............ 174
x Contents
4.3. Intrinsie Bistability .......................................... 179 4.3.1. Fabrie-Perot Etalon .................................. 179 4.3.2. Steady-State Nonlinear Etalons. . . . . . . . . . . . . . . . . . . . . . . . . . 186 4.3.3. Observations of Refraetive Bistability .................... 192
4.3.3.1. Nonlinear Interferenee Filters .................. 192 4.3.3.2. InSb ........................................ 195 4.3.3.3. GaAs Etalon. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
4.3.4. Transient Behavior of Nonlinear Etalons. . . . . . . . . . . . . . . . . . 197 4.3.5. Review of Observations ................................ 203
4.4. Fast Nonlinearities .......................................... 204 4.4.1. Kerr Effeet in Inorganie Solids (Glasses ) . . . . . . . . . . . . . . . . . . 205 4.4.2. Kerr Effeet in Organie Solids (Polydiaeetylene) ............ 206 4.4.3. Optieal Stark Shift in Semieonduetors (GaAs) ............ 207 4.4.4. Indueed Transition Nonlinearity (CuCl) .................. 207 4.4.5. Quantum Enhaneed Interband Nonlinearities
(Semieonduetor-Doped Glasses) ........................ 208 4.4.6. Quantum Enhanced Interband Nonlinearity (GaAs-MQW) . . 209 4.4.7. Fast Coherent Resonant Nonlinearities (CdSe) ............ 209
4.5. Quantum Weil Optoeleetronie Deviees .......................... 210 4.5.1. Bistable (Two-Terminal) SEEDs ........................ 210 4.5.1. Three-Terminal SEEDs ................................ 212
4.5.2.1. Symmetrie SEED and Related Devices .......... 212 4.5.2.2. Transistor-Biased SEEDs ...................... 219
4.5.3. Energy Requirements in SEEDs ........................ 222 4.5.4. Smart Pixels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224 4.5.5. Other SEEDs ........................................ 225 4.5.6. Other QCSE Deviees .................................. 226
4.6. Aetive Switehing Transistor Deviees ............................ 228 4.7. Conc1usion.................................................. 233 4.8. Problems.................................................... 234
Referenees .................................................. 237
Chapter 5. Free-Space Optical Hardware 5.1. Introduetion ................................................ 245 5.2. Imaging and Aberrations in Free-Spaee Digital Opties ............ 247
5.2.1. First-Order Opties .................................... 249 5.2.2. Geometrie Aberrations ................................ 258 5.2.3. Resolution and Spot Size .............................. 265 5.2.4. The Diffraetion Limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269 5.2.5. Spaee-Bandwidth Produet .............................. . 271
5.3. Polarization ................................................ 273 5.2.1. Linear Polarizers and Polarizing Beam Splitters. . . . . . . . . . . . 275 5.3.2. Retarders ............................................ 278 5.3.3. Polarization Component Combinations .................. 280
Contents xi
5.4. Spot Array Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282 5.4.1. Requirements ........................................ 282 5.4.2. Image-Plane, Fresnel-Plane, and Fourier-Plane Classifications 282
5.4.2.1. Binary Phase Gratings ........................ 285 5.4.2.2. Lenslet Arrays ................................ 291
5.5. Beam Array Combination and Interconnection .................. 293 5.5.1. Degrees of Freedom of Light. . . . . . . . . . . . . . . . . . . . . . . . . . . . 294 5.5.2. Relevant Device Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 295 5.5.3. Optical Component Characteristics ...................... 298 5.5.4. Beam Combination Examples .......................... 299
5.5.4.1. Transmission-Mode S-SEEDs .................. 300 5.5.4.2. Reflection-Mode Optical Logic Etalons .......... 302 5.5.4.3. Reflection-Mode Nonlinear Interference Filters . . . . 303 5.5.4.4. Reflection-Mode S-SEEDs . . . . . . . . . . . . . . . . . . . . . . 304
5.5.5. Signal Interconnection Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307 5.5.5.1. Pupil-Plane Issues ............................ 309 5.5.5.2. Image-Plane Issues ............................ 312
5.6. Summary .................................................. 317 5.7. Appendix: Basic Fourier Optics ................................ 318
5.7.1. Spatial Frequency .................................... 319 5.7.2. Useful Theorems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321 5.7.3. Common Function/Transform Pairs .................... 323 5.7.4. Sampling Theory .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
5.8. Exercises.................................................... 327 References .................................................. 328
Chapter 6. Photonie Switching Architectures Based on Logic Devices (Free-Space Digital Optics)
6.1. Introduction ................................................ 333 6.2. Overview of Switching Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
6.2.1. Applications of a Switching Architecture . . . . . . . . . . . . . . . . . . 336 6.2.2. Subsystems in a Switching Architecture .................. 337
6.2.2.1. Switch/Transmission Line Interface . . . . . . . . . . . . . . 340 6.2.2.2. Switching Fabric .............................. 340 6.2.2.3. Control Unit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
6.3. Architectural Building Blocks in Free-Space Photonic Switching Systems .................................................... 366 6.3.1. Switching Nodes and Node-Stages in Free-Space Photonic
Switching Systems .................................... 366 6.3.1.1. Classification of Nodes in Free-Space Photonic
Switching Systems ............................ 366 6.3.1.2. Examples of Nodes in Free-Space Photonic
Switching Systems ............................ 377 6.3.1.3. Macroscopic versus Microscopic Views of Nodes .. 398
xii Contents
6.3.2. Interconnections and Link-Stages in Free-Space Photonie Switching Systems .................................... 403 6.3.2.1. Classification of Interconnections in Free-Space
Photonie Switching Systems .................... 403 6.3.2.2. Comparisons between 2-D and 3-D
Interconnections in Free-Space Photonie Switching Systems ........................ 413
6.4. Examples of Free-Space Photo nie Switehing System Arehiteetures 419 6.4.1. Time-Shared Bus Networks ............................ 421 6.4.2. Cross bar Networks .................................... 427
6.4.2.1. Splitter /Combiner Single-Stage Crossbar (Matrix Multiplier). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
6.4.2.2. Self-Routing Single-Stage Crossbar .............. 431 6.4.2.3. Feedforward Multistage Crossbar . . . . . . . . . . . . . . . . 439
6.4.3. q-Shuffie Networks .................................... 446 6.4.3.1. 2-D Implementation of 2-Shuffie Network ........ 448 6.4.3.2. ParaBel 2-D Implementation of 2-Shuffie Network 452 6.4.3.3. 3-D Implementation of 4-Shuffie Network ........ 453 6.4.3.4. 3-D Implementation of Foldcd 2-Shuffie Network . . 457
6.4.4. Crossover Networks .................................. 463 6.4.4.1. 2-D Implementation and Parallel 2-D
Implementation of Crossover Network Based on 2-Module Nodes .............................. 470
6.4.4.2. 2-D Implementation and Parallel 2-D Implementation of Crossover Network Based on (2, I, I) Nodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
6.4.4.3. 2-D Implementation and Parallel 2-D Implementation of Crossover Network Based on (2,2,2) Nodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
6.4.4.4. Comments on Crossover Networks .............. 479 6.4.5. Other Networks ...................................... 482
6.4.5.1. 3-D Implementation of Trimmed Inverse Augmented Data Manipulator .................. 482
6.4.5.2. Parallel 2-D Implementation of Bateher-Banyan Sorting Network .............................. 492
6.4.5.3. Extended Generalized Shuffie (EGS) Networks .. . . 496 6.4.6. Thoughts on the Future of Free-Spaee Photonie Switching .. 506
6.5. Appendix: P(B) Approximations for EGS Networks . . . . . . . . . . . . . . 506 6.5.1. Derivation I: EGS Networks with (n, n, n) Nodes 507 6.5.2. Derivation 2: EGS Networks with (no n, I) Nodes 508 6.5.3. Derivation 3: EGS Networks with n-module Nodes 510 6.5.4. Comparison of the Three Derivations .................... 512
6.6. Problems ..................... 0 • 0 • 0 0 • • • • • • • • • • • • • • • • • • • • • • • • • 512 Referenees .................................................. 516
Index 523
An Introduction to Photonie Switching Fabrics
1
Introduction
1.1. Switching Systems
As our information-hungry society moves toward ubiquitous broadband services there will be the need for telecommunications switching systems able to switch and controllarge numbers of users sending and receiving this high-bit-rate information. Aggregate capacities of these future systems could exceed 1 Tb/s by the turn of the century. Some of the new services that will require these large capacities include the transport and switching of NTSC video, enhanced-quality television (EQTV), high-definition television (HDTV), switched video, high-data-rate file transfers and information retrieval, animated graphics, in addition to the need for an interconnect for diskless workstations and local area networks/metropolitan area networks (LAN/MAN). These new services are the future of telecommunications companies and thus the driving force to bring photonics into switching systems.
The basic components of a telecommunications switching system are shown in Figure 1.1 y. 2) The switching fabric is that part of the switching system that routes information from one user to another. It is an interconnection network under the direction of the control complex. In addition to controlling the switching fabric, the control complex also controls the line interfaces, and handles the system administration, maintenance, and call processing. Finally, the line interfaces connect the fabric to either local users or high-speed transmission terminals. SONET transmission equipment is a good example of such transmission terminals. In nearly all cases, the information received at the line interfaces has to be electronically groomed before it can enter the switching fabric. This is required because the complex transmission protocols (e.g., SONET) require sophisticated processing well beyond the capabilities of any current or future optical computing techno 1-ogies. There are, however, a few examples of switching fabrics that do not
2 Chapter 1
Telecommunications Switching System
Common Challllei -----+-..
Sigl/allil/g
Input Channels
Line Interface
Switchlng Fabrie
CommOIl --;-. Challnel
Line Interface
Sigllalling
Output Chanllels
Figure 1.1. Component parts of telecommunications switching system.
require a li ne interface; these include protection switches, MANs, and LANS. These smaller and simpler systems are ideal candidates for bandwidth transparent switching fabrics.
Perhaps the greatest challenge ofthese new broadband switching fabrics will be to control trafik whose characteristics differ from the conventional voice telephony that has dominated the telecommunications networks of the past. These trafik characteristics are illustrated in Figure 1.2,(3) which illustrates the holding times for a path through a switching fabric. Note that the holding times of some future services can vary over three orders of magnitude, while the channel data rate can vary over eight orders of magnitude. The current challenge to the telecommunications industry is to develop new technology that will allow the development of broadband switching fabrics that will be able to switch these new services.
The hope of photonics is that, through the exploitation of the temporal and/or spatial bandwidth available in the photonic domain, these broadband systems can be realized. There are several devices that have emerged within the past few years that have the potential of meeting this goal. These devices can be arranged into two major classes according to the function they perform. (4) The first of these classes, called relational devices (also referred to as analog or passive devices), perform the function of establishing a large bandwidth relation or a mapping between the inputs and the outputs. This relation is a function of the control signals to the device and is independent of the signal or data inputs. As an example, if the control signal is not enabled, the relation between the inputs and the outputs of a 2 x 2 switching
Introduction
Duration 103 or
Session (seconds)
102 1 Minute------.
Channel Oata Rate (bits/second)
Figure 1.2. Trafik characteristics of broadband services.
3
node might be upper input ~ upper output and lower input ~ lower output. When the control is enabled, the relationship might be upper input -+ lower output and lower input -+ upper output. This change in the relation between the inputs and outputs corresponds to a change in the state of the device. Another property of this device is that the information entering and flowing through the device cannot change or influence the current relation between the inputs and outputs. This type of device is used in fabrics that are exploiting the bandwidth transparency in broad-bandwidth devices. Examples of so me of the fabrics based on these types of devices include the directional coupler, optical amplifier, and star coupler based fabrics, which include both time- and wavelength-division utilization of the available bandwidth. Thus, the strength of relational devices is that they cannot sense the presence of individual bits passing through them, they can only pass them. Each channel through a device can be viewed as a broad-bandwidth analog transmission channel to the passing bits. This bandwidth transparency allows relation al devices to support either high-bit-rate channels, multiple time-multiplexed channels of differing bit-rates, or a large collection of dense wavelengthdivision channels. The weakness of relational devices is that they cannot sense the presence of individual bits that are passing through them, they can only pass them. This inability to sense the passing bits prevents these devices from reading and responding to packet headers or other line-rate control information.
The second class of devices will be referred to as logic (digital) devices. In these devices, the da ta or information-bearing signal that is incident on
4 Chapter 1
the device controls the state of the device in such a way that some Boolean function or combination of Boolean functions is performed on the inputs. These are the types of devices required for digital switching fabries. Each device must be able to change states or switch as fast or faster than the signal bit-rate in addition to regenerating or restoring the incident signal level. This high speed requirement for logic devices will limit the bit-rates of signals that can eventually flow through their fabrics to less than those that can pass through relational fabrics. Examples of fabries based on these devices are the free-space networks based on either optical logic gates or smart pixels. Thus, the strength of logic or digital devices is the added flexibility that results from their ability to Sense the bits that are passing through them, while their weakness is that they sense the bits that pass through them which limits the maximum bit-rate that they can handle.
This chapter will begin by reviewing the strengths and limitations of the phQtonic technology. There follows a discussion on photonic switching fabries based on relational devices. This will include a review of switching fabries based on space channels, time channels, and wavelength channels. Finally, photonie switching fabries based on logic devices will be described.
1.2. The Strengths and Limitations of the Photonie Technology
Prior to discussing photonic devices and their applications, it is necessary to understand both their strengths and limitations. This section will begin by discussing the temporal bandwidth limitations of photonie devices, which include analog optical transparency, communication energy, on-chip power dissipation, and skew. It will then discuss the spatial bandwidth, commonly referred to as the parallelism of optics, and how it can be used in creating new photonie switching fabrics.
1.2.1. Temporal Bandwidth
With the emergence of optical fibers has come the dream of communications engineers to find a way of controlling their tremendous bandwidth (Figure 1.3). The term photonie switching to most telecommunications engineers brings to mind switching fabries that can control these largebandwidth channels. For fabrics based on relational or optically transparent devices, these analog channels could be transparent to virtually any bitrate. Since the devices themselves do not have to change states, the fabric bandwidth will be the transmission bandwidth of the devices. The main issue with relational devices is how to effectively use this available analog bandwidth. Typically there are physical space channels used to connect users at point x to users at point y with an available channel bandwidth Be. At
Introduction
Attenuation (dBlkm)
0.4-1-----------'"
0.2+---------+---"""f'
l.3 j.lm l.55 j.lm
Figure 1.3. Available bandwidth in optical fiber.
5
Wavelength
each entrance point to these physical space channels are users requiring a bandwidth Bu between these two locations. When the available bandwidth ofthe channel equals the desired bandwidth ofthe user (Be = Bu), one space channel should be assigned between each pair of users. On the other hand, when the available channel bandwidth is much greater than the user bandwidth (Be» Bu), it is desirable to share the available channel bandwidth between several users by allowing multiple access to the same space channel. This multiple access can be accomplished by multiplexing several users in either the temporal or the spectral domain. To multiplex several users onto the same channel in the time domain, the pulse widths of the information passing through the channel are shortened until they fill the available bandwidth. Some of the methods currently used to share the available temporal bandwidth of a single space channel include: time-division multiplexing (TDM), time-division multiple access (TDMA), code-division multiple access (CDMA), and packet switching.
The second multiplexing method that can be used to fully utilize the available channel bandwidth is to operate in the spectral domain rather than the time domain. This can be accomplished through such techniques as wavelength-division multiplexing (WDM), wavelength-division multiple access (WDMA), or frequency-division multiple access (FDMA). For the ca se of switching using WDM, each user is assigned a fixed transmitting (receiving) wavelength, but has the capability to receive (transmit) the wavelengths of all other users. As an example, for the case of a fixed transmitting wavelength per user, the information to be transported from one user to another is modulated onto its assigned wavelength A.l. The receiving user can then lock its tunable receiver onto the wavelength A.l and receive the information.( S) FDMA, on the other hand, electronically multiplexes several
6 Chapter I
different frequencies together, and then uses this composite signal to modulate an optical carrier. This is also referred to as subcarrier multiplexing. (6)
The reconfiguration rate of relational devices and the maximum bit-rate of opticallogic devices is limited by how fast the devices can change states or switch. This bandwidth will be referred to as the switching bandwidth. Switching, in this case, refers to the changing of the present state of a device to an alternate state, as opposed to the "switching" that is analogous to an interconnection network reconfiguration. In the normal operating regions of most devices, a fixed amount of energy, the switching energy, is required to make them change states. This switching energy can be used to establish a relationship between both the switching speed and the power required to change the state of the device. Since the power required to switch the device is equal to the switching energy divided by the switching time, then a shorter switching time will require more power. As an example, for a photonic device with an area of 100 pm2 and a switching energy of 1 fJ j pm2 to change states in 1 ps requires 100 m W of power instead of the 100 p W that would be required if the device were to switch at 1 ns. Thus, for high-power signals the device will change states rapidly, while low-power signals yield a slow switching response.
Some approximate limits on the possible switching times of a given device, whether optical or electrical, are illustrated in Figure 1.4(7); the time required to switch the state of a device is on the abscissa while the power jbit required to switch the state of a device is on the ordinate. The region of spontaneous switching is the result of the background thermal energy that is present in a device. If the switching energy for the device is too low, the background thermal energy will cause the device to change states spontaneously. To prevent these random transitions in the state of a device, the
PowerlBit 10-3 (Watts)
10-12 ~.-... --.. - ..
Switching Time (Seconds)
Figure 1.4. Fundamental switching limits at 850 nm.
Introduction 7
switching energy required by the device must be much larger than the background thermal energy. To be able to differentiate statistically between two states, Figure 1.4 assurnes that each bit should be composed of at least 1000 photons. (8) Thus, the total energy of 1000 photons sets the approximate boundary for this region of spontaneous switching. For a wavelength of 850 nm, this implies a minimum switching energy on the order of 0.2 fJ.
For the thermal transfer region,(7) it is assumed that for continuous operation, the thermal energy present in the device cannot be removed any faster than 100 W /cm2 (l J.l W / J.lm2). There has been some work done to indicate that this value could be as large as 1000 W /cm2.(9) This region also assurnes that there will be no more than an increase of 20°C in the temperature of the device. (7) Devices can be operated in this region using a pulsed rather than continuous mode of operation. Thus, high-energy pulses can be used if sufficient time is allowed between pulses to allow the absorbed energy to be removed from the devices.
The cloud represents the performance capabilities of current electronic devices. Figure 1.4 reveals that optical devices will not be able to switch states orders of magnitude faster than electronic devices when the system is in a continuous rather than a pulsed mode of operation. There are, however, other considerations in the use of photonic switching devices than how fast a single device can change states. Assurne that several physically small devices need to be interconnected so that the state information of one device can be used to control the state of another device. To communicate this information, there needs to be some type of interconnection with a large bandwidth that will allow short pulses to travel between the separated devices. Fortunately, the optical domain can support the bandwidth necessary to allow bit-rates in excess of 100 Gb/s, which will allow high-speed communication between these individual switching devices. In the electrical domain, the communications bandwidth between two or more devices is limited by the resistance, capacitance, and inductance of the path between the different devices. Therefore, even though photonic devices cannot switch orders of magnitude faster than their electronic counterparts, the communications capability or transmission bandwidth present in the optical domain should allow higher data rate systems than are possible in the electrical domain. (1\)
Therefore, networks composed of relational devices will have their signal bit-rates limited by the transmission bandwidth and their reconfiguration rates limited by the switching time of the devices, while switching networks based on optical logic will have both their signal bit-rates and reconfigurati on rates limited by the switching time of their devices.
1.2.2. Communication Energy and Power
One other feature of optics that has not yet been eJ.'ploited is the lower energy requirement for communicating logical signals from one integrated
8 Chapter I
circuit (IC), multichip module (MCM), or printed circuit board (PCB) to another. The signal energy required to move an electrical signal from one point to another depends on whether the signal propagates on a lossy resistive lumped element line or a lossless terminated transmission line. For the case of a properly terminated transmission line the signal energy per bit, Es, is given by
Es (properly terminated) > T V 2 I R (1.2.1)
where V is the logic-Ievel voltage, R is the characteristic transmission line impedance, and T is the pulse width of a bit of information. For example, a I-V, I-ns pulse on a 100-Q transmission line requires at least 10 pJ of energy per bit.
When the electrical line length is less than the phase velocity times the signal rise-time (L:( VpTr ), the electrical interconnect can be treated as an unterminated lumped element line instead of a properly terminated transmission line. In this case, the amount of energy stored in the charging capacitor is Ctot V 2 12 while the same amount of energy is dissipated in the lumped inductance, thus
Es(lumped element line) > Ctot V 2 ( 1.2.2)
where the total capacitance, Ctot, is given by Ctot = LCL + Cp + Cg where CL
is the capacitance per unit length of the interconnecting line, Cp is the pad capacitance, and Cg is the gate capacitance. For example, a I-ns signal traveling on a I-mm unterminated lumped element line requires 140 fJ of energy.
For the optical case, the minimum energy required is a function of the quantum efficiency of the photodetector ß, the wavelength of the light A, the voltage V required to be developed across a resistor R in series with a photodetector, the capacitance of the diode Co, and the efficiency of the interconnect f/i. Assuming that RCo > T, then
. hcCoV Es(optIcal) >--
f/ißIle ( 1.2.3)
where h = 6.626 X 10-34 J-s, c = 2.998 X 108 m/s, and e = 1.602 x 10-19 C. When A = 850 nm, ß = 1, f/i = 1.0, and CD = 11.5 fF (115 aFlj.lm;2),(IO) Es yields a minimum optical energy per bit of approximately 58 fJ.
Optical interconnection provides an energy advantage because it sends signals as bunches of photons. Hence, there are no lines to charge. This feature of optics has been called quantum impedance conversion.(II) One consequence ofthis effect is that, beyond a certain "break-even" distance, optics
Introduction
100 pJ
10 pJ
Transmitted I pJ Energy
100 fJ
IOfJ
Electrical Tenninated .,--- . ....... - 10 ns
Transmission Line ...... .
fto---- 1 n
Oprical (10 x /0 mm device)
IfJ ~--+----~ ______ ~ ____ +-____ +-. lO~m 100~m I mm IOmm 100mm Im
Distance
9
Figure 1.5. Minimum required communication energy as a function of distance (see Table 1.1).
requires less energy than electrical connections. The practical break-even length depends on how good the optical interconnect technology iso
To take full advantage of quantum impedance conversion requires that we can make small optoelectronic devices that are efficient at low power levels. The photodetectors have to be small (e.g., 10 x 10 pm), and must be integrated right beside the electronic circuits. With small integrated modulators and detectors, the break-even length could be a few hundred microns (Figure 1.5).
Although new electronic technologies are increasing the number of pinouts per chip, one fundamental limiting factor will be the power dissipated on the chip. The by-product of lower communication energy is that there will be less power dissipated on-chip per pin-out. Here optical interconnects may have a distinct advantage over their electrical counterparts.(12, 13) Figure 1.6 shows the results of this comparison.(14) The parameters used in Figure 1.6 are shown in Table 1.1. Figure 1.6 illustrates the on-chip power dissipation, required from the source versus the interconnection length with the bitrate, and the source type; electrical (e.g., C4 or flip-chip bonding), laser (e.g., surface emitting laser), or modulator (e.g., symmetric self-electro-optic effect device) as parameters. For the electrical case, the flat part ofthe curves are associated with electrical lines that are long enough to be treated as properly terminated transmission lines. In this case the dis si pa ted power is given by
PD(properly terminated) > (1/ 1]e - 1) V 2/ R (1.2.4)
10
Power Dissipation
on Chip (mW)
10.00
1.00
0.10
0.01
Jo.o Cbls
- Electric.al
""""........ Modulator
- Laser
.~ •• __ ••• ~ •• 1 0.0 Gb/s
1.0 Gb/s
Imm lern 10em
Interconnection Length
Figure 1.6. A comparison between electrical and optical interconnection.
Chapter 1
For short electrical line lengths the electrical interconnect can be treated as an unterminated lumped element li ne instead of a properly terminated transmission line, thus
Po(lumped element li ne ) > (l 11]e - I) Ctat V 2 I, r ( \.2.5)
as shown by the curved lines in Figure 1.6. The capacitance, Ctat, is the surn of the transmission li ne capacitance, the pad capacitance, and the gate capacitance. For example, a I Gb/s signal ('I' = 200 ps) traveling on a 1-mm unterminated lumped element line dissipates approximately 0.233 mW. On the other hand, the power dissipated on-chip when driving a I-mrn properly terminated transmission li ne is 3.33 mW, assuming a 100-Q line.
The detector model used by both the modulator and laser portions of the curve is a resistor in series with a photodetector. The voltage across the resistor is the input to agate. The resistor is chosen to guarantee that the rise time is equal to the fall time of an incident pulse, thus
R = VI(Ctotdvldt);:::;; (, .. )/Ctot ( 1.2.6)
The optical power required by the photodetector for a I-V signal is
(1.2.7)
Introduction 11
Table 1.1. Parameters Used for Figures 1.5 and 1.6
Optical Optical Parameter Electrical laser modulator
Received detector IV IV IV voltage
Electrical driver 0.75 efficiency (1)e)
Transmission line I pF/cm capacitance (cd
Input gate 20 IF 20 IF 20 IF capacitance (Cg)
Input pad 20 IF capacitance (Cr)
Photodetector 51F 51F capacitance (Cd)
Responsivity of 0.8A/W 0.8A/W photodiode (af)
In terconnect 0.90 0.80 efficiency (1),)
Modulator 0.50 efficiency (1)M)
Laser 0.30 efficiency (1) d
Load resistor 51F 51F capacitance (Cd
where M is the responsivity. For the case of the modulator, the absorbed power is given by
PD(modulator) > (I/17m - 1 )Poptl1Ji
> (I/1Jm - l)VC;ot/ MT r1J; ( 1.2.8)
This implies that the dissipated power at I Gb/S(T r = 200 ps) for a modulator is 0.234 mW. Finally, the power absorbed by a laser is
PD(laser) > (I/1JL - I )PoPt/1J; + Ith Von
> (I/1JL - I)VC:~t/(~Tr1J;) + IthVon (1.2.9)
where Ith is the threshold current and Von is the on voltage. Assuming Ith =
I mA and Von = I V, the absorbed on-chip power dissipation at 1 Gb/s is 1.5 mW.
With increasing interconnection length, the electrical and modulator interconnection schemes cross over near I mm, at a I Gb/s bit-rate. For interconnection lengths greater than I mm, optics (modulators and low-Ioss
12 Chapter 1
interconnection) are more efficient. For lengths less than I mm, electrical techniques are more efficient. Increasing the length even further, the electrical- and laser-based interconnection schemes cross over near I cm. Therefore, one may conclude that optics can reduce the total dissipated power of a digital system when interconnecting both chip-to-chip and substrate-tosubstrate. Hence, in systems where high-density I/Os are needed with a high percentage of the 1/0 required to be active at one time, optics can provide a performance advantage, with respect to power dissipation, beginning at the chip-to-chip interconnection level.
The need for a large number of connections at both the device and the system level in future high-performance digital systems is another driving force behind the interest in the photonic technology. As the channel gate density has increased so has the need for pin-outs or connections as illustrated in Figure 1.7.(15) The left axis in Figure 1.7 projects the pin-outs required by future ICs, assuming the empirical Rent's rule will continue to be valid. Rent's rule is given by
Pin-outs = k(Gates)I/C ( 1.2.10)
where Gates is the number of digital gates, k is a constant that depends on the ability to share signallines (for high-performance applications, k = 2.5), and c is another constant within the range of 1.5-3.0 (1.79 appears to be the best match for high-performance packages with 10 to 100,000 digital gates).(16) Note that for ICs with I-M digital gates will require between 1000 and 10,000 pin-outs. This suggests the future need to thermally manage
Pln·outs Requlred
107 .. _--_._-_ .. __ ..... - --_ .. _ ........ __ ... _-- ._. __ ._._--- --_._-----_ ... __ ...
I~~~----~-------+-------i------~
105
104
103
102 4
10 5
10
----+-----::;:Ik = 2.5
6 10
7 10
Integrated Clrcult Gate Denslty
Figure 1.7. System and device pin-out requirements and minimum required system ICs as a function of the integrated circuit gate density (assuming c = 1.79).
Introduction 13
10- 100 W of on-chip heat generated for electrica1 chip-to-chip communication. Reducing this an order of magnitude through optical communication could be a significant need for future high-performance systems.
1.2.3. Skew
When building large systems that require any form of synchronization, a limiting system parameter is skew, 8" wh ich is the maximum difference in propagation delay between parallel channels. This skew can be caused by either dielectric or dimensional variations in the system interconnects(14) (Figure 1.8). The skew due to dielectric variations is given by
l: (d· I . ) fi rl:!. nl:!. U s leectnc = - - = - (1.2.11)
c c
where &r is the relative permittivity, n is the index of refraction of the dielectric, I:!. is the manufacturing tolerance of the &r or n of the dielectric, and c is the speed of light. Examples of the skew for PCBs include the dielectric FR4, given by 8s(FR4) = 70- 140 ps with &r = 4.6 and I:!. = 0.01 - 0.02 and the dielectric Teflon, given by 8s(Teflon) = 55- 110 ps when &r = 2.8 and I:!. =
0.01 - 0.02. The result of tighter manufacturing tolerances for silica fiber yields a 10wer skew of 8s(fiber) = 4.8- 9.6 ps when n = 1.45 and I:!. =
0.001 - 0.002. The skew for free-space interconnection can be controlled within severa1 wave1engths for aberration-controlled te1ecentric imaging systems. Interconnections based on holographic interconnects and/ or nontelecentric systems result in skews that increase with the field size of the image.
103 ConnectIon
Denslty (Connections/ern) 102
10
Free-Space
1 +-__ + __ --+ 10 rs 100 es Ips 10 ps
Skew(per meter) 100 ps Ins
Figure 1.8. A comparison between electrical and optical skew and connection density.
14 Chapter 1
1.2.4. Spatial Bandwidth
Another strength of the optical domain is the spatial bandwidth available through either classical optics or holography. These types of systems normally are composed of multiple two-dimensional optoelectronic integrated circuits (2D-OEICs) interconnected with either bulk optics or holograms. The photonic elements that make up the 2D-OEICs could be simple optical logic gates (e.g., NOR, NAND) or more complex structures performing advanced switching functions (e.g., smart pixels). The number of elements or pixels that can be interconnected in this manner is li mi ted by the resolution and aberration of the optical interconnection system. The maximum number of elements or pixels that can be supported by an optical system is referred to as its space-bandwidth product(17) (SBWP) or the degrees offreedom of the system. The SBWP for several types oflens systems are shown in Figure 1.9. If each pixel can be equated to a pin-out, then device pin-outs greater than 104 can be achieved.
The optical elements of the 2D-OEICs could be a mixture of electronic and optical devices (smart pixels or electronic chips with optical 1/0). This mixture of electronic and optical devices is designed to take advantage of the strengths in both the electrical and the optical domain. The optical devices include detectors to convert the signals from the previous 2D-OEIC to electronic form and modulators (surface emitting lasers or LEDs) to transfer the results of the electronically processed information to the next
SBWP ('pixels')
Fleld ,/ '- -H""" ! 10 mm 100 mm ., ......•... ,. F' Id \, - ~ 1',,1 mm "I.. '''.1. .- .......... .
~II ~'-'" ...... 2 """ \, \ Field
"" \ ........ SBWP == k (---) \... .,.....'... SpotSize
.. ,100ll-m 111111 _ "'-tl. ''''ia., \ \ b ...... \. '\, Complex '\, ~.... • Lenses \
...... .\ .,~1 0 )Im \,~ ....... " " ... '\,. '\ ~'" 'I, "~. I~ __
IIII ''''I "'" --- " \ \ .... --,. .... " '~ --"'i::" 'tc "', ~... - "'-- ....,. "~
,, __ ... " "' 11
....... " GAsPheric .... .... \. Singlets .... ~
\ ... Singlets ''t,,,, I "-. I
100 4-----~----~~--~~--~~--~~ 10-7 10,6 10,5 10-4 10-3 10,2
Spot Size (m)
Figure 1.9. Space-bandwidth product versus spot size (assuming< I-inch-diameter lenses, A = 850 nm).
Introduction 15
2D-OEIC. The electronics does the intelligent processing on the data, and the photonie devices provide the connectivity.
1.2.5. Secondary Strengths
In addition to the quantitative advantages oflarge temporal bandwidth, lower potential communication energy, on-chip power dissipation, reduced skew, and large spatial bandwidth, optics also brings many qualitative benefits for interconnection. Frequency-dependent loss and cross talk, common with electrical interconnection, essentially disappear, as do many problems associated with impedance matching. Optical connections are intrinsically immune to electromagnetic interference, and automatically provide electrical isolation. This isolation can eliminate the problems associated with retaining the same ground potentials in a large system.
1.2.6. New Architectures
Using both of the types of devices available, system architects can design new switching fabrics with capabilities that could not be achieved with the standard electronics technology. Relational devices offer the capability of controlling enormous aggregate bandwidths multiplexed through either time-based or wavelength-based techniques. Logic or digital devices interconnected with free-space interconnects offer the opportunity of avoiding communication bottleneck associated with connection-constrained architectures (e.g., buses). New connection-intensive architectures, maximizing connections, rather than minimizing them, could lead to new high-performance large-dimensional switching fabrics (Figure 1.10). Also, high-fan-out architectures even further utilize the potential connectivity offered by the optical
107
Large Fan-out IndiVidua~
106 Interconne ed Archltectures Gates
Pln-outs 105 ConnectIon
Intensive
104 Archltectures
103
102 4 5 6 7 8
10 10 10 10 10 Gate Denslty
Figure 1.10. System architectural design space.
16 Chapter 1
domain. Finally, deseribing these new arehiteetures and systems will be the foeus of the remainder of this ehapter.
1.3. Switching Fabrics Based on Relational Devices
This seetion diseusses some of the proposed photonie switehing fabries that are based on guided-wave deviees. It will begin with a diseussion of the switehing fabries based on spaee ehannels. The deviees used to implement these fabries inc1ude direetional eouplers and optieal amplifiers. It then diseusses switehing fabries based on time ehanne1s. The diseussion ofthese timebased fabries inc1udes aetive reeonfigurable fabries based on time-division multiplexing, time-slot interehangers, and universal time-slots in addition to passive shared media fabries. The seetion then outlines some of the switehing fabries that have been proposed using wave1ength ehannels. Finally, there is a brief review of multidimensional fabries.
1.3.1. Switching Fabrics Using Space Channels
Aspace ehanne1 is a physieal ehannel that has been established between two users. Such a ehannel ean be viewed as a transparent ehannel whose full bandwidth is available to both users. The three deviees that are the basis of the diseussed spaee ehannel fabries are direetional eouplers, optieal amplifiers, and spatial light modulators. Examples of eaeh type of fabrie will be diseussed in the following seetion.
1.3.1.1. Fabrics Based on Directional Couplers
A direetional eoupler is a deviee that has two optieal inputs, two optieal outputs, and one eontrol input as shown in Figure 1.11. The eontrol input
Bypass
, ,/ z·cur LiNbO 3 subsrrore Exchange
(a) (b)
Figure LI L Directional coupler: (a) physical structure and (b) operation al states.
Introduction 17
is electrical and has the capability of putting the device in the bar state, the upper (lower) optical inputs are directed to the upper (lower) optical outputs, or the cross state, the upper (lower) optical inputs are directed to the lower (upper) optical outputS.(18) The most advanced implementations of these devices have occurred using Ti: LiNb03 technology. (19) The strength of directional couplers is their ability to control extremely high bit-rate information. They are limited by several factors: (1) the electronics required to control them limits their maximum reconfiguration rate, (2) the long length of each directional coupler prevents large-scale integration, and (3) the losses and cross talk associated with each device limit the maximum size of a possible network unless some type of signal regeneration is included at critical points within the fabric.(20) A modest number of these devices have been integrated onto a single substrate to create larger photonic interconnection networks such as an 8 x 8 crossbar interconnection network(21) as shown in Figure 1.12. As another example, a 4 x 4 crossbar interconnection network composed of 16 integrated directional couplers has been fabricated. All of the integrated directional couplers have cross talk less than - 35 dB with an average fiber-to-fiber insertion loss of less than 5.2 dB. (22)
The implementation of a large space switch requires the interconnection of many smaller photonic switches that are used as building blocks. These building blocks will most likely have dimensions less than 16 x 16 because of the long length of directional couplers and the large bending radii required in the integrated waveguides. Two examples of topologies for these building blocks are the crossbar interconnection network(23) and the broadcast network proposed by Spanke.(24) For point-to-point networks, the interconnection of these building blocks to construct a larger switching fabric can be done with Clos, Benes, banyan, omega, or shuffie networks. (25) If video
Input Channels
Output Channef '
Titanium Diffused
Waveguides
Figure 1.12. 8 x 8 cross bar interconnection network.
18 Chapter 1
information is to be a main component of the fabric trafiic, then a broadcast environment becomes important. A good topology for a broadcast network is a Richards network.(26)
A good application of directional coupler-based fabrics is a protection switch. In this environment the only time the switch will need to be reconfigured occurs when a failure occurs in an existing path. Thus, high bit-rates can be passed through the switch with moderate reconfiguration rate requirements. This application matches the capabilities of the directional coupler, and requires long hold times with moderate reconfiguration rates. Once a path has been set up, high-speed data, multiplexed speech, or video can be transferred through the fabric.
1.3.1.2. Fabrics Based on Optical Amplijiers
A semiconductor optical amplifier (SOA),(27) when appropriately biased, can provide optical gain through stimulated emission to any entering signal. On the other hand, an SOA will act as an absorber to the incoming light if the bias is removed. This on/ off switch can be combined with a fan-out interconnection network topology to create a switching fabric. An example is shown in Figure 1.13. On the left side ofFigure 1.13, each ofthe N input channels is split or divided into N separate channels. On the right side, each output channel will combine the light received from the N fanout modules. In the middle of the switching fabric is a column of SOAs that are individually controlled. By turning "on" an SOA, the entering signal is amplified, creating a path from an input to an output. When an SOA is
Input Channel
Output Channel
Figure 1.13. Routerj selector interconnection network based on semiconductor optical amplifiers.
Introduction 19
turned "off," the entering signal is absorbed, blocking that path through the fabric. Thus, by controlling the paths available through the network by the SOAs, a strictly nonblocking network has been established. These fabrics also offer the signal transparency of relation al devices. Detailed calculations have shown that 32 x 32 switching fabrics with an output SNR of 20 dB at I GHz could be fabricated.(28)
J. 3. J. 3. Fabrics Based on Spatial Light Modulators
A spatial light modulator (SLM) is a two-dimensional array of optical modulators. (29) Each of these modulators is independent of the others and has the capability of modulating the incident light. For the applications described in this chapter, the modulators will be assumed to be digital, in that they possess two states: transparent to the incoming light (on) and opaque to the incoming light (off). An SLM that is currently available in the marketplace is based on the magneto-optic effect. (30) These arrays are electrically controlled such that an electrically enabled pixel will be transparent while a disabled pixel will block the incident light. Some other SLMs include the liquid-crystal light valves (LCLV),(31) PLZT modulators,(32) deformable mirrors,(33) and GaAs multiple-quantum weil (MQW) modulators. (34)
An implementation of a cross bar interconnection network using an SLM is illustrated in Figure 1.14.(35) In Figure 1.14 each input fiber channel is split into four fiber channels. Prior to passing through the SLM windows, the light in each fiber is collimated. The light passing through each SLM window is then collected by the collimating lenses and directed into another fiber. The light from each row of the SLM is combined in the fiber and
Input Fibers
SLM
~-
Output Fibers
Collimating Len es
Figure 1.14. Crossbar interconnection network based on spatiallight modulators.
20 Chapter I
directed to an output channel. As with all relational structures, high signal bit-rates pass through the switch with the speed limitation being the fabric reconfiguration time.
1.3.2. Switching Fabrics Using Time ChanneIs
As a result of the large signal bandwidth available in optically transparent devices, the signal bit-rate passing through the device can be much larger than the bit-rate of any single user. In this situation the information from the users can be compressed (in time) and share the transparent devices with many other users. There will be two types of time-division switching fabrics discussed in this section. The first two will be time-slot interchangers (TSI) which actively rearrange the time-slots in channels of time-multiplexed information. The third time-division-based switching fabric uses multiple access techniques to use the available temporal bandwidth of a star coupler.
1.3.2.1. Active Reconfigurable Fabrics
An active reconfigurable fabric is based on the ability to actively reconfigure the time-slots present in a time-division-multiplexed (TDM) stream of information. A conventional TDM signal is normally composed of either a bit-multiplexed or block-multiplexed stream of information. A bit-multiplexed data stream is created by interleaving the compressed or sampled bitsynchronized bits from each of the users. This type of multiplexing is the method of choice for most transmission systems since it only requires the storage of one bit of information for each user at any time. Unfortunately, most of the bit-multiplexed transmission systems are further complicated by adding pulse-stuffing and other special control bits to the data stream. Blockmultiplexing, on the other hand, stores a frame's worth of information from each of the users and then orders the bits entering the channel such that each user's data are contiguous. When used in a switching environment, this multiple access method requires the switching fabric to reconfigure only at block boundaries. By allowing a small amount of dead time between the blocked-multiplexed information, the requirements on the reconfiguration time of the fabric can be relaxed. This can be attractive for switching fabrics, such as directional coupler-based fabrics, that have slow reconfiguration times.(36)
A good application of the bandwidth transparency of optical fibers is through the use of universal time-slots. (37) A universal time-slot is a partitioned section of time that can contain information transmitted at any bitrate. This is illustrated in Figure 1.15, where a frame is composed of 256 timeslots. Each time-slot can contain information at any bit-rate. For example, a time-slot of voice would require approximately 100 kb/s while an adjacent
Introduction 21
Figure 1.15. Universal time-slots.
time-slot could contain video information at a bit-rate in excess of I Gb/s. Switching can be achieved by interchanging the position, in time, of the
time-slots in a frame of time-multiplexed information. Most of the proposed photonic TSIs have been single-stage structures, in that the time-slots of the input frame are directly mapped into the desired time-slots of the output frame through the use of variable length delay lines. An example of such a TSI is shown in Figure 1.16.(38) In panel a, a time-multiplexed information stream with four time-slots of duration ~ comprises an input frame Ti. The output frame To leaving the TSI is delayed by one frame delay (for this example T = 4~). To perform the TSI function each of the input time-slots is directed to the appropriate number of time-slot delays ~ to reposition it into the desired output frame time-slot. By comparing the input frame, t~, to the output frame, t~, it can be seen that the following interchanging of time-slots has to take place: t~ --+ t~, ti\ --+ t~ , t~ --+ t7 , and t~ --+ tg. The connectivity graph for this type of TSI is shown in panel b. This bipartite graph representation assigns the input and output time-slots as the vertices (dots) and the edges as delays. The switching between time-slots is achieved by choosing the appropriate delay that creates a virtual channel between an input and output time-slot. As an example, for the information in t~ to be switched to tg the delay line of I~ must be used. The thick lines represent the connections shown in panel a. Since there is a path between any input time-slot and any output time-slot, this single-stage network is fully connected. Also, since there are unique paths from each input time-slot to each output time-slot, the time-based network is also nonblocking.
Another approach to the implementation of a TSI is to move the input time-slots through multiple stages of intermediate time-slots prior to arriving in their desired output time-slot.(39) For these structures each stage does not
22 Chapter 1
Controlling Electronics
a
TI TI+!
Photonie Time-Slot Interchanger
Inpul Time-Iol
Outpul Time- 101
,I 0
1° 0
, I 1 1°
1 b
11 1° 2 2
I1 1° 3 3
Conneclivity Diagram
Figure 1.16. Fiber delay line-based TSI.
have to be either fully connected or nonblocking. An example of a timebased butterfly interconnect is illustrated in Figure 1.17. In the upper part, the hardware and connectivity graphs for two different periods of butterfly are illustrated. The three different delays are accomplished by either passing the information directly from the input to the output, passing through the fiber delay line once (NA/ 2), or passing through the delay line twice (NA) .
Through the use of multiple stages of time-switches with different delays the rearrangeably nonblocking Ofman network can be implemented. (40) This is illustrated in the middle of Figure 1.17. It is composed of 2 log2 N - 1 serially connected exchange Ibypass nodes (directional couplers) and their associated delay lines. The connectivity of an 8 x 8 multistage TSI is shown at the bottom of Figure 1.17. Three active paths are shown through the network.
1.3.2.2. Passive Shared Media Fabrics
The time-based switching fabrics previously described assurne that the users are time-multiplexed onto a single space channel, with each user
Introduction
Nt:J2
Lnput ~ Output
NiV4
InPut~ Output
Connectivity Graph for Multi-Stage Time-Slot Interchanger
Figure 1.17. Multistage TSI.
23
associated with a particular time-slot. The switching operation is provided by an active reconfigurable fabric that interchanges the temporal position of the time-slots. Thus, rearranged time-multiplexed information is then demultiplexed and delivered to the users. This process allows the creation of virtual connections, in time, between users. Multiple access fabrics, on the other hand, provide a physical connection between all users with aglobaI interconnect such as a bus or star coupler. This physical connection is then shared among all users in time to avoid contention. Ring networks are examples of switching fabrics based on a passive shared medium. The passive shared medium is typically an optical fiber that is accessed in time with either passive taps such as fiber couplers or directional couplers operating as active taps. For a synchronous ring structure, each user is assigned a unique piece of time (time-slot) to read the information from the ring. Other users can send information to a user by entering information into the destination user's time-slot. Access to the time-slots is arbitrated by some form of centralized control. There are also many other schemes for using ring structures in switching applications with both centralized control and distributed asynchronous control schemes based on packet structures.(41)
24 Chapter 1
Instead of using a single fiber as the shared passive media a star coupler can be used. A star coupler is a device with N inputs and N outputs that combines all the input channels and redistributes them equally to all the outputS.(42) A TDMA fabric could then consist of time encoders on each input, the star coupler to combine and redistribute all the input signals, and finally time decoders to select which input should be received. A fabric is referred to as a fixed-transmitter assignment (FT A) network if the encoders or transmitters are fixed and the decoders or receivers can be adjusted to select any input. Conversely, a fixed-receiver assignment (FRA) network has fixed receivers and tunable transmitters. (43)
An example of an FT A multiple access network is illustrated in Figure 1.18.(43) For this fabric the address associated with each output channel is the position, in time, of the sampled input signal. Thus, the effective address for the upper output channel is one unit of delay, while the address of the lower output channel is N units of delay. In Figure 1.18 all synchronous inputs are sampled and directed to a tunable TDMA encoder. The TDMA encoder sets the appropriate delay for the sampled input to match the delay required by the desired output channel. The outputs from all the TDMA encoders are then combined and distributed to all the decoders. Each decoder delays the dock signal the appropriate amount and then incoherently combines it with whatever light is present. If a sampie is present, the combination of the delayed dock and the sam pie will combine to trigger a thresholding device that will indicate that a bit is present. The sam pie will then be converted to a bit of the proper duration .
...rL.. L-...s-t-JTl--+-~------' JD-~ ~ IlJIlut ampling Coded Combined Bit Output
BIt Clock Input Coded inputs Pul e BIt
Figure 1.18. TDMA switching network.
Introduction 25
1.3.3. Switching Fabrics Using Wavelength Channels
Like the time-division fabrics discussed, fabrics based on wavelength channeIs can either rearrange or reconfigure the information present on the different wavelengths or they can share those wavelength channeIs through multiple access techniques. The section begins with a discussion of a proposed wavelength interchanger (WI) and is followed by a review of the work on switching fabrics based on multiple access to wavelength channels.
1.3.3. J. Wavelength Interchanger
lust as in the ca se of a TSI where a switching function can be performed by interchanging the time-slots in a time-multiplexed information stream, a WI can provide a switching function for a wavelength-multiplexed channel as shown in Figure 1.19.(44)
In Figure 1.19 a wavelength-multiplexed signal enters the A-switch. Since each user is associated with a unique wavelength, a connection can be made between two users by converting the transmitter's wavelength (At) to the receiver's wavelength (Ar). The WDM signal enters the A-switch where the power is equally divided among n channeIs. Each of these channeIs will go through a coherent detection process where the information on the desired input wavelength can be detected. This information is then used to modulate a fixed output wavelength laser. The outputs of the fixed lasers, all of different wavelengths, will be combined onto a single fiber. As a specific example, assume the information modulated on An needs to be moved to the carrier AI. The fabric control will adjust the tunable laser associated with the fixed laser generating the AI carrier. This tunable laser will select the information on An. This information will then modulate the fixed output laser of wavelength AI. Thus, the information on An has been transferred to AI.
A- Switch
A 1 "'A I '''2 n A A , .. A I 2 n
Figure 1.19. Wavelength interchanger.
26 Chapter I
n x m ~l~----~----------~~~~--------~~~~~
\.
" .•.• , .. /)\--,"'------"'" ~l r;;;;;;;-----= ...••• -.-. ••••• , .••.............. ~==~~ ', Ci
..........................
Figure 1.20. CI os multistage switched-wavelength network.
Figure 1.20 iBustrates how a coBection of WIs can be interconnected to create a larger dimension fabric. The WIs are connected into a three-stage fabric through the ?.-multiplexors and ?.-demultiplexors. Since the combination ofthe ?.-multiplexor, the ?.-switch, and the ?.-demultiplexor is equivalent to an n x n switch, known network topologies can be used to create larger switching fabrics. As an example, a Clos network using this approach is shown in Figure 1.20.
1.3.3.2. Passive Shared Media Fabrics
Another type of star coupler-based architecture that has received a considerable amount of attention is WDMA. This is schematicaBy shown in Figure 1.21, where the entering information is used to modulate a light source that has a unique wavelength associated with each input. The optical energy from aB the input sources is combined and redistributed by a star coupler to aB the output channels. The tunable filter on each output is tuned so that only the wavelength associated with the desired input channel can pass to the detector. Thus, by varying the tunable filter an output has access to any or aB of the input channels. Several approaches to the tunable filters have been pursued. The first is to use movable gratings. (45) A second type of
Introduction
1
2
r=-"'77"""""'I(Ä. ) --"'I Tunable ---"1 . Dctee!or ! ~
27
Electronic Inputs
Electronic Outputs
n
Figure 1.21. WDMA fabric.
tunable filter could be a tunable Fabry-Perot etalon.(46) Finally, coherent detection could be used as the mechanism to seleet the desired wave!ength.(47)
1.3.4. Multidivisional Fabrics
In the early days of teleeommunications switching, the switehing fabrics used were space division. With the advent of digitized voice it became apparent that electronic hardware in the fabric itself could be reduced by adding the dimension of time to the spaee-division fabric. For example, if a 1024 x 1024 space-division switch was able to switeh 128 time-slots per frame (1 frame = 125 /1s), then a switching fabrie with a dimensionality of approximately 128,000 x 128,000 could be made (e.g., 4ESS™).
An example of a potential 512 x 512 time-space-time (TST) switch is shown in Figure 1.22. The input lines are partitioned into sections of 32 lines which are time-multiplexed onto a single space channel. Thus, each channel consists of 32 time-slots. If the bit-rate of the input signals is 150 Mb /s, then
32 Channols
(ISO Mbls)
512 Inputs
32 TOM Channels (4.8 Chi )
~~----,
Eleclronic Centralized Cootrol
Figure 1.22. TST photonic fabric.
4.8 Chis
32 Channcls
(ISO Mbls)
512 Outputs
28 Chapter I
the time-multiplexed information stream will require a bit-rate> 4.8 Gb/s (::::;208 ps/bit). This time-multiplexed signal then enters the TSI where the 32 time-slots can be interchanged. From there the information enters the time-multiplexed space-division switch (the advantage of multidimensional switching is that the size of the space switch can be small). The output of the space switch is directed to the output TSI, which is then demultiplexed to the output space channels. The difficulty with TST configurations is the timing requirements imposed on the centralized control. For example, to avoid any phase discontinuities on the output channels from the space switch, there needs to be bit alignment of the time-multiplexed information stream entering the 16 x 16 switch. Assuming a 5 Gb/s bit-rate implies that each bit has a pulse duration of 200 ps. Thus, to prevent these phase discontinuities on the output channels, all the input bits should be bit-aligned to within 10 ps of each other. This timing burden will be placed on the initial time-division multiplexor or else an elastic store will have to be placed on the input to the space switch (this assurnes that the controlling electronics can recognize variations of ::::; 1 0 ps). To illustrate the critical packaging problem, if the length of fiber from two TSIs differs by 1 cm (assuming an index of refraction of 1.5 in the fiber), there will be aSO-ps difference in the bit arrival times at the space switch. In addition to the bit and frame alignment required by the space switch, each TSI will require the alignment of bit and frame boundaries to prevent phase discontinuities on its output channel. The strength of the multidimensional switching structures, such as this TST switch, is the minimal amount of hardware required to build them. The cost is increased timing complexity.
Another example of a multidimensional fabric is a packet switch. Such a switch is basically a space-division fabric that can reconfigure itself rapidly to allow the sharing of space channels in time. HYPASS is an example of a packet switching fabric that has been proposed using WDMA,(48) and is illustrated in Figure 1.23. In this fabric, the packetized information enters the fabric from the left where it is initially stored in a FIFO. The objective is to modulate the tunable laser, tuned to the fixed wavelength ofthe designated output port, pass the information through the transport star coupler, and then receive the information at the desired output port. Prior to accessing the transport star coupler, it is necessary to determine if the desired output port is busy. This is accomplished through the specialized control hardware. If an output port is available, the protocol processor associated with the fixed-wavelength receivers will turn on the laser associated with the particular output port allowing light to enter the control star coupler. The tunable receivers attached to the control star coupler can tune to the wavelength of any of the output channels; if the signal is present it will signal the input channel decoder to tune the laser to the appropriate wavelength and then command the FIFO to send the current packet to the desired output channel.
Introduction 29
Figure 1.23. HYPASS fabric.
Note that in this fabric the packet address is converted to the specific wavelength ofthe output channel. Thus, the address in the fabric is the wavelength of light entering the transport star coupler.
1.4. Switching Fabrics Based on Logic Devices
There are certain applications that are not well suited for relational devices. One such application requires the ability to both sense and respond to individual bits of information. A packet switch is a good example of this requirement. A packet entering a network requires a system of devices that can read and understand the header and then reconfigure the network to allow the packet to pass to its desired destination. The ability to interact and sense the individual bits in a stream of information requires either electronic or optical digitallogic devices.(49)
This section reviews some of the photonic switching systems that have been proposed based on digital logic devices. The majority of these systems are also based on free-space interconnects wh ich are designed to exploit the second strength of the optical domain, spatial bandwidth. For these systems, this spatial bandwidth can be viewed as connections or optical pin-outs.(49)
30 Chapter 1
This section begins by describing the type of nodes available to build digital logic systems based on optical interconnects. It then intro duces the concept ofthree-dimensional networks. This is followed by abrief discussion of networks using electronic nodes.
1.4.1. Switching Nodes
To build a large-dimensional digital network requires the interconnection of a large number of smaller switches referred to as switching nodes. Examples of several digital switching nodes are illustrated in Figure 1.24. (50) The triplet notation shown represents the following: (number of inputs, number of outputs, capacity of the node). The first two parameters of the triplet represent the number of inputs and outputs while the third parameter indicates the number of channels that can be actively passed through the node at a given time. The (2, 2, 2) node has two inputs and two outputs with the capability of having both inputs and outputs simultaneously active at any time. This node is topologically equivalent to a directional coupler but since it is composed of digital gates, it does not have the optical transparency of its analog counterpart. The (2, 2, 1) node in the center of Figure 1.24 has two inputs and two outputs, although both outputs contain the same information. Hence, the node has a capacity of one. In this node the input AND gates select which input channel can pass its contents to the outputs. These nodes work weIl in networks that have been designed to guarantee that only one input to a given node can be active at any time. Such networks include dilated Benes,(51) Ofman,(40) and extended generalized shufHe (EGS)(52) networks. FinaIly, there is the 2-module which is a simpler version of a (2, 2, 1) node. This node also requires that the network guarantee that only one node input is active at any time but is more restrictive than the previously described node. Since this node cannot block signals entering on the inputs, it requires that no signal can be present on the unused input line.
(2,2,2) Node
Figure 1.24. Switching' nodes using digital logic gates.
Introduction 31
Switching nodes could be implemented by optically interconnecting opticallogic gates. Some potential opticallogic (digital) devices are:
• Double heterostructure optoelectronic switch (DOES)(53) • Nonlinear Fabry-Perot (NLFP) devices(54) • Nonlinear interference filters (NLIF)(55) • Symmetric-SEED(56) • Vertical-to-surface-transmission electrophotonic devices (VSTEP)(57)
Adding more functionality or intelligence to each of the switching nodes arranged into a two-dimensional array can reduce both the control complexity and the number of stages required in multistage interconnection networks (which converts to lower cost). These smarter nodes fabricated into twodimensional arrays are referred to as "smart pixels."(49) To take advantage of the spatial bandwidth available in the optical domain, integrated electronic circuits could be integrated with optical detectors (inputs) and modulators or microlasers (outputS).(58) This mixture of the processing capabilities of electronics and the communications capabilities of optics will allow connection intensive architectures with more complex nodes to be implemented. In addition, the gain provided by the electronic devices should allow high-speed operation ofthe nodes. In the simplest case, the 2D-OEICs could be arranged into a large 2-D array of "smart pixels" such as (2,2, 1), (2,2,2), (4,4,4) or even self-routing nodes. All the nodes in the 2-D array are electrically independent of each other, with the exception of a common ground and power supply.
1.4.2. Three-Dimensional Interconnection Networks
Large-dimensional interconnection networks can be built by interconnecting 2-D arrays of switching nodes with free-space interconnects, thus creating a 3-D network. To take advantage of the characteristics and attributes of known multistage interconnection oetworks, it is essential that there exist mapping functions that will allow 2-D networks to be logically mapped to a 3-D network. One example of such a mapping function is illustrated in Figure 1.25. The upper panel shows a 2-D multistage EGS network using (2,2, x) nodes and crossover interconnects. To convert this 2-D network to a 3-D network, the 2-D network is fan folded at the dotted lines. (59) This creates a 3-D network using 2-D interconnects between the stages. Note that there are four independent crossover interconnects in the first stage, each lying in a vertical plane. The second crossover stage also forms a vertical plane. On the other hand, the interconnects in the third and fourth stages lie in horizontal planes.
32 Chapter I
2-D Network
3-D Network
Figure 1.25. EGS-crossover interconnection networks.
The potential advantage of these fine-grained switching fabrics is that large-dimensional fabries could be possible in the future. For example, a 1024 x 1024 nonblocking EGS fabric could be demonstrated using 19 (64 x 128) arrays of optically interconnected 2-modules.(60) A 1024 x 1024 strictly nonblocking EGS network using (2, 2, 1) "smart pixels" could be implemented using only 18 (32 x 64) "smart pixels" arrays.
1.4.3. Networks Using Electronic Nodes
2D-OEICs, in general, do not need to be restricted to systems based on chip-to-chip interconnection. These structures could also be used to provide optical interconnection between MCMs or even PCBs. For example, there could be 2D-OEICs, arrays of modulators/microlasers/detectors, flip-chip mounted on MCMs to provide the required MCM-to-MCM connectivity. These optical interconnects provide the advantages of small high-performance input/output footprint and a lower on-chip power dissipation than their electrical counterparts when the distance between MCMs is greater
Introduction 33
32 x 63 63 x 32
32-.-~~-----". r-~--,"---.-- 32
33 ~~-+t-=rI==4+----+F=f-J-t- 33
64
993 _'--I-"l-~I II--.r--,...-,-_ 993
1024 ---'1H._J-t---+-L-J-+--+-"'I---.l-+-- 1024
MCM MCM MM > 3000 pin· ulS > 4000 pin·oulS > 3000 pin·oulS
Figure 1.26. Clos network using MCM and ODLs.
than 1 mm and the bit-rates are in excess of 100 Mb/ s. Areduction in onchip power dissipation should allow a greater gate density on the MCMs before the thermal limit is reached. For example, Figure 1.26 iIIustrates a proposed 1024 x 1024 Clos network in which each of the three stages is composed of multiple electronic ICs mounted on an MCM. The three MCMs, each containing the hardware required for a single stage, would be connected with free-space interconnects. Note that there needs to be in excess of 4000 pin-outs per MCM!
1.5. Summary
This chapter has reviewed several of the basic photonic switching fabrics that have been proposed by the research community. It began with a discussion of the strengths and limitations of the photonic technology. It then described several systems based on relational devices followed by a basic description of switching systems based on logic devices.
The purpose ofthe following chapters is to discuss in detail the capabilities of these previously described systems and devices. The second chapter reviews relational devices. This is followed in Chapter 3 by a discussion of the photonic switching systems that are based on relational devices. Chapter 4 describes optical logic devices and Chapter 5 the optics required for logic
34 Chapter 1
systems using free-space optical interconnection. Finally, photonic switching systems based on digital logic devices is discussed.
1.6. Exercises
I. Why has the telecommunications network evolved from an analog to a digital network (see Chapter I of Digital Telephony by J. Bellamy, Wiley, New York, 1982)?
2. Redraw Figures 1.5 and 1.6 when the interconnect loss is: (a) -3 dB, (b) -10 dB, and (c) - 20 dB. Assume the other parameters given in Table 1.1.
3. What is the control algorithm to guarantee nonblocking operation of a crossbar network (see Figure 1.12)?
4. What is the connectivity diagram of the photonic TSI shown in Figure 1.P.l? Is it nonblocking? What is the control algorithm for the TSI in Figure 1.16?
5. Design a photonic elastic store using directional couplers and fiber loops.
6. Design a 32 x 1 photonic multiplexor using directional couplers. Design a 1 x 32 photonic demultiplexor using directional couplers.
7. Design a star coupler using 3-dB couplers (a 3-dB coupler is a 2 x 2 coupler that splits the optical energy entering either input channel equally among the two output channels) .
8. What is the total laser power required to simultaneously operate 10,000 opticallogic devices at 155 Mb/ s? Assume that each opticallogic device requires (a) 1 pJ, (b) 100 fJ, (c) 10 fJ of optical switching energy.
Controlling Electronics
Fiber Delay Lines
Figure I.P.1. A photonie TSI.
-T o
Introduction 35
9. Given a nonblocking TSI structure similar to the one shown in Figure 1.16 with each frame composed of 24 time-siots and a frame duration of Ti = 125 ps, what is the Iength of fiber required for each of the fiber Ioops assuming an index of refraction n = 1.46 at 1.3 pm? What temperature variation of a fiber Ioop is allowed if a maximum delay variation of 10 ps is required and the incremental time delay of the fiber with respect to temperature is 40 ps/km_oC?(61, 62) What is the temperature toierance of the fiber delay line that is composed of 2N - 1 fiber Ioops?
10. Design a Benes multistage wavelength network based on ;.,3 switches.
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Introduction 37
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41. M. Skov, Implementation ofphysical and media access protocols for high speed networks, IEEE Commun. Mag. June, 45 53 (1989).
42. A. A. M. Saleh and H. Kogelnik, Reflective single-mode fiber-optic passive star couplers, IEEE J. Lightwave Techno/. LT-6, 392398 (1988).
43. P. R. Prucnal and P. A. Perrier, A new direction in photonic switching: A collapsednetwork space-division switching architecture, in: OSA Proceedings on Photonie Switching, (J. E. Midwinter and H. S. Hinton, eds.), Vol. 3, pp. 212 218, Optical Society of America, Washington, D.C. (1989).
44. M. Fijiwara, N. Shimosaka, M. Nishio, S. Suzuki, S. Yamazaki, S. Murata, and K. Kaede, A coherent photonic wavelength-division switching system for broadband networks, Proceedings oIthe 14th European Conference on Optica/ Communication (ECOC '88), Brighton, U.K., pp. 139-142.
45. H. Kobrinski, R. M. Bulley, M. S. Goodman, M. P. Vecchi, C. A. Brackett, L. Curtis, and J. L. Gimlett, Demonstration of high capacity in the LAMBDANET architecture: A multiwavelength optical network, Electron. Lett. 23, 824826 (1987).
46. I. P. Kaminow, P. P. Iannone, J. Stone, and L. W. Stulz, FDM-FSK star network with a tunable optical filter demultiplexor, E/ectron. LeU. 23, 1102- 1103 (1987).
47. B. Glance, J. Stone, K. J. Pollack, P. J. Fitzgerald, C. A. Burrus, Jr., B. L. Kasper, and L. W. Stulz, Densely spaced FDM coherent star network with optical signals confined to equally spaced frequencies, IEEE J. Lightwave Techn%gy, LT-6, 1770 1781 (1988).
48. M. S. Goodman, E. Arthurs, J. M. Cooper, H. Kobrinski, and M. P. Vecchi, Demonstration of fast wavelength tuning for a high performance packet switch, Proceedings oI the 14th European Conlerence on Oplica/ Communication (ECOC '88), Brighton, U.K., pp. 255 258.
49. H. S. Hinton, Architectural considerations for photonic switching networks, IEEE J. Sei. Areas Commun. SAC-6, 1209 1226 (1988).
50. T. J. Cloonan and F. B. McCormick, Photonic switching applications of 2-0 and 3-0 crossover networks based on 2-input, 2-output switching nodes, App/. Opt. 30, 2309 2323 (1991).
51. K. Padmanabhan and A. N. Netravali, Dilated networks for photonic switching, IEEE Trans. Commun. COM-35, 1357 1365 (1987).
52. G. W. Richards, U.S. Patents 4,993,016 and 4,991,168. 53. G. W. Taylor, J. G. Simmons, A. Y. Cho, and R. S. Mand, A new double heterostructure
optoelectronic device using molecular beam epitaxy, J. App/. Phys. 59, 596-600 (1986). 54. J. L. JeweII, M. C. Rushford, and H. M. Gibbs, Use of a single nonlinear Fabry-Perot
etalon as optical logic gates, App/. Phys. Lett. 44, 172- 174 (1984). 55. S. D. Smith, Optical bistability, photonic logic, and optical computation, Appl. Opt. 25,
1550 1564 (1986). 56. A. L. Lentine, H. S. Hinton, D. A. B. Miller, J. E. Henry, J. E. Cunningham, and L. M.
F. Chirovsky, Symmetric self-electro-optic effect device: Optical set-reset latch, 'differential logic gate, and differential modulator/detector, IEEE J. Quantum E/ectron. QE-25, 1928 1936 (1989).
57. K. Kasahara, Y. Tashiro, M. Sugimoto, N. Hamao, and T. Yanase, Double heterostructure optoelectronic switch as a dynamic memory with low-power consumption, App/. Phys. LeU. 52, 679681 (1988).
58. D. A. B. Miller, M. D. Feuer, T. Y. Chang, S. C. Chunk, J. E. Henry, D. J. Burrows, and D. S. Chemla, Field-effect transistor self-electrooptic effect device: Integrated photodiode, quantum weil modulator and transistor, IEEE Photon. Techno/. LeU. I, pp. 62-64 (1989).
38 Chapter 1
59. T. J. Cloonan, M. J. Herron, F. A. P. Tooley, G. W. Richards, F. B. McCormick, E. Kerbis, J. L. Brubaker, and A. L. Lentine, An all-optical implementation of a 3D crossover switching network, IEEE Photon. Technol. Lett. 2, 438-440 (1990).
60. T. J. Cloonan, G. W. Richards, F. B. McCormick, and A. L. Lentine, Extended generalized shuffie network architectures for free-space photonie switching, in: OSA Proceedings on Photonie Switching (H. S. Hinton and J. W. Goodman, eds.), Vol. 8, pp. 43-47, Optical Society of America, D.C. (1991).
61. D. B. Sarrazin, H. F. Jordan, and V. P. Heuring, Digital fiber-optic delay line memory, Digital Optical Computing ll, SPIE 1215, 366-375 (1990).
62. N. Shibata, Y. Katsuyama, Y. Mitsunaga, M. Tateda, and S. Seikai, Thermal characteristics of optical pulse transit time delay and fiber strain in a single-mode optical fiber cable, Appl. Opt. 22, 979-984 (1983).
2
Optically Transparent Devices
2.1. Introduction
The purpose of this chapter is to introduce the photonic switching systems designers to some of the optically transparent or relational devices that can be used as building blocks in constructing larger photonic switching systems. By understanding the basic properties and attributes of these devices, the systems designer can determine the limitations that will constrain the systems he or she designs. Finally, it should be understood that the material in this chapter has been se1ected to teach the basic properties and attributes of several optically transparent devices from a systems perspective rather than from a device physics viewpoint. The design of these devices is beyond the scope of this book.
The chapter begins by discussing the propagation of light in a dielectric medium. This is followed by a review of the linear electro-optic effect. This background is then used to describe the basic operation of electro-optic modulators. Next is a special focus on the directional coupler, which has been the workhorse ofthe optically transparent or re1ational devices. Following the directional coupler, three other switching devices are discussed: the balanced-bridge switch, the X-switch, and the digital electro-optic switch. The chapter then discusses optical amplification, particularly semiconductor optical amplifiers. Finally, there is a short section on spatial light modulators.
2.2. Light Propagating in a Dielectric Medium
As a wave propagates through a dielectric material, the index of refraction seen by a wave can vary as a function of the orientation of the wave to
39
40 Chapter 2
LiNb03 Cry tat T
TE
----4:--+- Y
.....................
x
Figure 2.1 . Propagation of light in a dielectric material.
the crystalline axes of the material. For example, in the z-cut LiNb03 substrate shown in Figure 2.1, a wave propagating along the y-axis and linearly polarized parallel to the z-axis (TM) will see the extraordinary index of refraction of the material (ne:::::: 2.29). On the other hand, if the electric field of the incident wave is parallel (TE) to the x-axis of the LiNb03, then the wave will see the ordinary index of refraction of the material (no :::::: 2.20). Since these two waves see different indices of refraction, their phase velocities (v = ei n) will also be different. In this case the TM wave will travel through the material slower than the TE wave because of the larger extraordinary index of refraction.
This section begins by discussing the index ellipsoid and describing it how it can be used to calculate the index of refraction seen by the two orthogonal components of an impinging wave that are passing through a dielectric material at some arbitrary angle with respect to the z-axis. It then discusses how the index ellipsoid of an electro-optic material will change under the influence of an electric field (linear e1ectro-optic effect). This discussion provides the necessary background für the description of electrooptic devices such as modulators and directional coupler switches.
2.2.1. Index Ellipsoid
When an incident wave impinges on the material at some arbitrary angle with respect to the crystalline axes, then the index ellipsoid must be used to determine the index of refraction seen by each component of the wave. The index ellipsoid is given by
(2.2.1 )
Optically Transparent Devices 41
z z
/ / y
1/ / J
x
x
(a) (b)
Figure 2.2. Relationship between crystalline axes (a) and index ellipsoid (b).
where x, y, and z are the axes of the index ellipsoid and represent the crystalline axes of the material, while n" ny, and nz are the indices of refraction seen by a linearly polarized wave that is parallel to the axis designated by the subscript. This is illustrated in Figure 2.2 where panel a shows the crystalline axis and panel b the index ellipsoid of the material. The procedure required to find the index of refraction seen by an impinging wave of some arbitrary angle is as follows.(\)
• Determine the ellipse formed on the surface of the index ellipsoid by the intersection of (1) a plane that passes through the origin and is normal to the direction of propagation of the incident wave, and (2) the index ellipsoid .
• The directions of the major and minor axes of this ellipse are those of the two allowed polarizations. The lengths of these axes are 2n\ and 2n2 where n\ and n2 are the indices ofrefraction ofthe two allowed solutions.
To illustrate the use of the index ellipsoid, let's find the index of refraction seen by both polarizations of light incident on a LiNb03 crystal at an arbitrary angle 0 from the (optic) z-axis (see Figure 2.3). The first step is to determine the ellipse formed by the intersection of the plane that is normal to the direction of propagation of the incident wave (it must also pass through the origin) and the surface of the index ellipsoid. The ellipse can then be drawn as shown in Figure 2.3a. From this ellipse we can see that the index of refraction for the polarization that is parallel to the xy plane (ordinary wave) will see a value of no while its orthogonal component (extraordinary wave) will see an index of refraction of ne( 0).
42
x
z Direction of
---9
·n •
(a)
Propagatlng Wave
'-...,.
Chapter 2
z Direction oC ___ Propagating Wave
9'-...,.
(b)
Figure 2.3. (a) Index ellipsoid for LiNb03 ; (b) intersection of the index ellipsoid with the yz plane.
The second step is to determine the indices of refraction nl and n2 from the major and minor axes of this ellipse. Since LiNb03 is a uni axial crystal nl = nx = ny = no, thus the projection of the propagating light on the xy plane can be treated as if it is on the y-axis without any loss of generality. The value of n2 which is equal to ne( (}) can be determined from Figure 2.3b using the relation
(2.2.2)
in conjunction with
Z . () - - =sm ne( (})
(2.2.3)
and the equation of the ellipse formed by the ordinary and extraordinary indices of refraction present in the yz plane of the crystal.
(2.2.4)
yields
(2.2.5)
Optically Transparent Devices 43
From this equation we can see that if () = 0° then ne( () = no while if () = 90° then ne( () = neo The difference between the two indices of refraction ne( () - no, is referred to as the amount of birefringence. This amount of birefringence can vary, depending on the angle of propagating light, from zero for a z-propagating wave in a z-cut LiNb03 substrate to ne - no for a y- or x-propagating wave in a z-cut substrate.
2.2.2. Linear Electro-optic Effect (Poekels Effect)
When an electric field is applied across a crystal lacking a center of symmetry such as LiNb03, the index ellipsoid will change to the following
3 3 3
+ 2yz L r4jEj + 2zx L r5ßj + 2xy L r6ßj = 1 (2.2.6) j=1
where Ej refers to the electric field component applied parallel to the jth (1 = x, 2 = y, 3 = z) orientation of the crystal, and rij are the first-order electro-optic coefficients (the higher orders have been neglected) that form the electro-optic tensor of the material. The 6 x 3 matrix form of this tensor is shown in Figure 2.4 in conjunction with the electro-optic coefficients for LiNb03, GaAs, and BaTi03•
Note that the differences between Eqs. (2.2.l) and (2.2.6) include changes in the denominators of each of the terms plus some cross products. The change in the denominators of Eq. (2.2.l) can be represented by
r ll r ll r13 r11 rn r23 r31 r31 r33 r41 r41 r43 rS1 r51 r53 r61 r61 r63
Electrooptlc Tensor
3
(ni + L1ni)-2 = n-;2 + L rijEj j=Q
0 -3,4 8.6 0 0 0 3,4 8.6 0 0 0 0 30.8 0 0 0 28 0 1.6 0
28 0 0 0 1.6
0 0 0 0 0
-3.4 0 0 0 0 1.6
LINb03 GaAs
0 0 8 0 0 8 0 0 13 0 1120 0
820 0 0 0 0 0
BaTlO3
Figure 2.4. Electro-optic tensor for LiNb03, GaAs, and BaTi03 (all coefficients have units of 1O-12 mjV).
44 Chapter 2
Using the binomial series expansion on the first term and setting it equal to the second term gives
3
(n; + An;)-2 = n-;2 - 2n-;3An; + ... = n-;2 + L r;ßj
j~O
(2.2.7)
F or small changes in the index of refraction, the higher-order terms of the binomial series expansion can be neglected. After arearrangement of the terms in Eq. (2.2.7) the change in the index ofrefraction, An;, for the crystalline axis i gives
3
An; = -~n~ L rijEj j~O
assuming the cross products of Eq. (2.2.6) are zero.
(2.2.8)
From Eq. (2.2.6) it can be shown that the coefficients rlj, r2j, and r3j
only cause a change in the respective indices of refraction by an amount An; and do not affect the orientation of the ellipse.
On the other hand, the coefficients r4j, rSj, and r6j not only affect the length of the ellipsoid axes, they can also cause a rotation of the ellipsoid axes. These changes in the index of refraction can be determined by transforming the ellipsoid to a new coordinate system where the axes will coincide with the principal axes of the new ellipsoid. (2)
For example, assuming an arbitrary applied electric field applied to a LiNb03 crystal, Eq. (2.2.6) can be rewritten as
(2.2.9)
where EI ~ Ex, E2 = Ey , and E3 = Ez. r\3 = r23, r22 = -r\2 = -r6\, and r42 = rsl.
Therefore, for the case employing a field in the z-direction of z-cut ypropagating LiNb03 (Ex = Ey = 0), the electrically modified index ellipsoid is represented by
For this case of a y-propagating signal, the TM component (parallel to the z-axis) would see the r33 electro-optic coefficient causing a change in the index of refraction, from Eq. (2.2.8), of
(2.2.11)
Optically Transparent Devices 45
while the TE component (parallel to the x-axis) would have a change in the index of refraction given by
(2.2.12)
Thus, through the use of the linear electro-optic effect, the index of refraction of a material can be changed electrically. The next section discusses how this principle can be used to make modulators and photonic switching devices.
2.3. Modulators
This section introduces and discusses examples of both phase and intensity modulators. It begins with a discussion of electro-optic phase modulators and is followed by adescription ofthe Y-branch intensity modulator.
2.3.1. Electro-optic Phase Modulators
A phase modulator is a device that has the ability to adjust or change the phase of the light leaving the device. Such a device can be implemented using the linear electro-optic effect. The phase change induced by the e1ectrooptic effect can be represented by
Acp = AßL (2.3.l )
where Aß is the change in the propagation constant for a waveguide of length L. This change in propagation constant is given by
Aß = 2nAN A
(2.3.2)
where AN is the change in the effective index of refraction of the guided mode and A is the free-space wavelength of the propagating light. Using Eq. (2.2.8)
3
ANi = -&N/ L rijEj
j~ 1
Assuming a directional field is applied in parallel to one of the crystalline axes such that there is no ellipsoid al rotation, then ANi can be simplified to
(2.3.3)
46 Chapter 2
x
L
+
Input. ----~'~-~~iiiiiiiiiiiiiiiiiiiiiiii-~ .. iiiiii,.;:z:=~y. Output Light- Light
z
UNbO) Substrate
Tltanlum D\ffused Wavegulde
Figure 2.5. Electro-optic phase modulator.
where a accounts for the incomplete overlap of the optical field in the waveguide and the applied electric field. Ifthe configuration shown in Figure 2.5 is implemented, then the field can be represented as Ez ~ V/d where V is the applied voltage on the electrodes and d is the distance between the two electrodes. Using these approximations, the phase change of the device of Figure 2.5, assuming an impinging TE wave on an x-cut crystal, is given by
(2.3.4)
A Ir phase change requires a voltage V"' where
V,,= (2.3.5)
For example, a TE polarization with d = 5 Jlm, A = 1 Jlm, '33 = 30.8 X 10-12 rn/V, L = 1 cm, and N = 2.29, and setting a = 0.25 (typically between 0.2 and 0.3) yields a V" = 0.34 V.
The electrical energy required to make the Ir phase change in the transmitted light beam can be found through the equation.
(2.3.6)
where C = cL with c being the permittivity of the material. * Using Eq. (2.3.6) the energy required to provide the Ir phase change is U" = 173 fJ.
* The permittivity of a material & is the product of the relative permittivity, &" of the material and the permittivity of free space, &0 (8.854 x 1O~'2 F Im). For the case of LiNb03, &, = 35 which gives an & = 3.099 X IO ~ 'O F Im.
Optically Transparent Devices 47
+
Input ••• • Light Output
• Light
Figure 2.6. Y-branch modulator.
2.3.2. Y -Branch Intensity Modulator
An intensity modulator, referred to as a Y-branch modulator, can now be designed using the phase modulator that was just described. Such a device is illustrated in Figure 2.6, where the input light is equally split, so that half the input energy is directed to the upper waveguide and half to the lower waveguide. Two electrodes are placed above and below the upper waveguide creating a phase modulator. If the phase of the upper waveguide is adjusted such that the two electric fields combine at the output port in phase, constructive interference between the two signals will provide an output intensity that is approximately equal to the input intensity (minus loss mechanisms such as absorption, Fresnel reflection at all interfaces, and the modal mismatch from the input fiber to the diffused waveguide). In the other case, if the phase of the upper signal is changed so that the two combining signals are 1800 out of phase, then destructive interference will occur between the two combining electromagnetic fields significantly reducing the output intensity. Thus, in the ideal ca se when no voltage is applied, the intensity of the output signal is equivalent to the input intensity. When a voltage V" is applied to the electrodes, a 1800 phase shift will occur between the two branches of the modulator forcing the output intensity to be zero.
2.4. Photonie Switching Devices
This section reviews four optically transparent switching devices. It begins with a detailed discussion of the directional coupler and is followed by brief descriptions of the balanced-bridge switch, X-switches, and finally the digital electro-optic switch.
2.4.1. Directional Couplers
A directional coupler is an electro-optic device that can be used as a 2 x 2 photonic switchY) The coupler can be treated as a device that can be
48 Chapter 2
Cross State Bar State
Figure 2.7. The two operational states of a directional coupler.
in one of the two states shown in Figure 2.7. The first state is referred to as the cross state. In this state a signal on either input is transferred to the opposite output channel. For example, the information on the upper input channel will be transferred to the lower output channel. The second state is referred to as the bar state. In this state the signals on the input channels are not switched to the other channel. Thus, the information on the upper input channel is passed to the upper output chan ne I.
Physically a directional coupler is a device in wh ich two optical waveguides are brought elose together to allow the energy from one waveguide to couple to the other. Figure 2.8 shows the physical layout of a directional coupler. The parameter L is the length of the coupling region, d is the gap between the waveguides, and w is the width of the waveguides. Electrodes are placed over the waveguides in the region where coupling occurs. The electrodes are separated from the titanium-indiffused chan ne I by a thin buffer layer, typically Si02. The input light in Figure 2.8 is represented by its two orthogonal polarizations.
2.4.1.1. Coupling between Waveguides
An optical waveguide can be created in a material by making a channel of material whose index of refraction is higher than that of the surrounding medium.(4) By choosing a sm all enough dimension for a given index change
Electrodes
TE z-cut UNb03 substrate
Figure 2.8. A directional coupler based on the titanium-diffused lithium niobate technology.
Optically Transparent Devices 49
L
I in -....,._IIiI_.,_ .. IIIIi .... __ ... ~.
LiNb03 Substrate
Figure 2.9. Illustration of the transfer of optical energy from one waveguide to the other. This figure illustrates thc casc when LI/ = 5.
between the waveguide and the surrounding medium a single-mode channel can be guaranteed. For the ca se of titanium-diffused lithium niobate (Ti: LiNbO,) a channel is defined by diffusion of an appropriately shaped titanium strip. The in-diffusion process occurs at temperatures of about IOOO°C for several hours.
When two waveguides are placed elose to each other, the optical energy in one waveguide can couple to the other. This coupling of light occurs because of the overlap in the evanescent fields of the two waveguides. Figure 2.9 illustrates two Ti: LiNb03 waveguides that are elose and paraBel to each other for a distance L. This distance L can range from a few miBimeters to several centimeters. After a specific length, light entering one of these waveguides will couple completely from one waveguide to the other if the propagation constants of both waveguides are equal. The propagation constant for a given waveguide can be written as
ß = 2nNIA (2.4.1 )
where N is the effective index of the guide mode and A is the free-space optical wavelength. (5) In Figure 2.9 the incoming light is periodically coupled between the input waveguide and the output waveguide. The length required for the optical energy in one waveguide to completely transfer to the other waveguide is referred to as the coupling length I. If the waveguides have the same propagation constants, the coupling length can be represented by 1 =
n 12K: where K: is called the coupling coefficient. The coupling coefficient is related to the distance d between the two waveguides by
K: = K:0 e -dir (2.4.2)
where K:o and rare experimentally determined parameters.(6) In Figure 2.9 it can be seen that the light couples from one waveguide to the other several times. Since LII is an odd number, the information present on the two
so
Input Light
Chapter 2
Figure 2.10. Illustration of a directional coupleT with LII = 5.
input channels end up at the opposite output channels. Thus, light has been switched from one waveguide to the other creating a device in the cross state.
To force the directional coupler to go from the cross state to the bar state, an electric field can be applied. This is accomplished through electrodes placed over the waveguides in the coupling region as shown in Figure 2.10. (7)
This electrode pattern is referred to as the uniform Aß electrode configuration. When an electric field E ~ V/ d is applied to the electrodes, there will be a change in the effective index of refraction. This change is
(2.4.3)
where r is the relevant electro-optic coefficient for the crystal orientation being used and a accounts for the incomplete overlap of the optical and applied electric field. A change in the effective index in turn produces a change in the propagation constant of each waveguide. In one waveguide ß will increase while in the opposite waveguide ß will decrease. When the propagation constants of the two waveguides are not equal, there cannot be 100% coupling from one waveguide to the other. The change in the propagation constant Aß is
Aß = ßR - ßs = 27rAN/A (2.4.4)
This change in the effective index then is responsible for a phase change A4J in the light propagating through the waveguide by an amount(5)
A4J = AßL = 27rANL/A (2.4.5)
By characterizing the light entering the two waveguides of Figure 2.10 by the complex amplitudes Rand S, the relationship between these two input signals can be described by the coupled-wave equations(8)
R' - joR = -jICS
S' + joS = -jICR
(2.4.6)
(2.4.7)
Optically Transparent Devices 51
where the prime represents differentiation with respect to the direction of propagation, 8 = Aß /2, and IC = rc /2/. Assuming the input amplitudes Ro and So, Eqs. (2.4.6) and (2.4.7) can be expressed in the matrix form(9. 10)
(2.4.8)
where the asterisk denotes a complex conjugate. The coefficients for the matrix can be found to be(5)
A = cos (LJIC2 + 8 2) + j8 sin (LJIC2 + 8 2)/JIC2 + 8 2 (2.4.9)
B = IC sin (LJIC2 + 8 2)/JIC2 + 8 2 (2.4.10)
For example, if light is injected only into the R waveguide the power output for each waveguide is given by
(2.4.11)
RR* = 1- SS* (2.4.12)
For the case when the propagation constants are equal (8 = 0) and the optical power is injected only into the R input, the power of the S output is
(2.4.13)
From Eqs. (2.4.11) and (2.4.13) it can be seen that energy can completely transfer from one waveguide to the other only if 8 = 0, the propagation constants are equal, and ICL = (2m + l)rc/2 where m is an integer.
2.4.1.2. Cross State Design
When designing directional couplers the device is often set in a cross state with no voltage applied. This implies that L/I is an odd integer. To guarantee a cross talk of - 20 dB or hetter, fabrication tolerances become difficult to achieve.(5. 11) To solve this problem an alternating electrode configuration can be used that will allow the cross state to he electrically tunable.
52 Chapter 2
+V 11 +v +Vz jj .v1
, 11 , ~ ~
, 11 , ~ ~
(a) (b)
Figure 2.11. Example of reverse I'1ß e1ectrode configuration. Panel a illustrates the bar state while panel b shows the path of the light for a cross state.
This electrode configuration is referred to as the reversed !).ß electrode configuration and is shown in Figure 2.1l.(9. 12) In Figure 2.11 the electrodes have been divided at the distance L/2 so that different voltages can be applied to them and L/! = )2.(5) Panel a shows how a device with the reverse !).ß electrode configuration can be put into the bar state. When the voltage VI is placed on both electrodes, the optical signal wh ich begins in the lower waveguide transfers a portion of its power to the upper waveguide at the point L/2 and then couples back into the originating waveguide after the distance L. Thus, for the bar state this device is functionally similar to the previously described device with the uniform !).ß electrode configuration. Panel b illustrates how the cross state can be achieved by reversing the !).ß electrodes. The optical signal enters the lower channel and begins to couple into the upper waveguide. After the distance L/2 the voltage across the electrodes reverses at the point where the optical power is equally split between the two waveguides. The voltage revers al changes wh ich waveguide is the fast waveguide. Thus, by reversing the voltage the light is tricked into coupling into the upper waveguide. Therefore, by using the reversed !).ß electrode configuration an electrically controlled cross state can be achieved. (10)
This is better understood with the cross bar switching diagram shown in Figure 2.12. (5,9) Panel a is the cross bar diagram for uniform !).ß electrodes while panel b is for the reversed !).ß electrode configuration, The ordinate is the ratio between the length of the coupling area Land the coupling length ! while the abscissa corresponds to the phase mismatch between the two waveguides, This phase mismatch is proportional to the applied voltage across the electrodes, It can be seen that when L/! is odd and there is no phase mismatch, i.e., !).ßL/1! = 0, the device will be in the cross state, Also for the case ofthe uniform electrode configuration (panel a), ifthe ratio L/! is not exactly an odd integer, then a complete cross state cannot be achieved regardless of the voltage across the device, In panel a the dotted line illustrates that for a one transfer length coupler (L/! = 1) the required phase
Optically Transparent Devices 53
8~'~~~----------------'
UI UI
2 4 5 6
lißL In
(bl
Figure 2.12. Crossbar switching diagrams for (a l uniform t1ß e1ectrodes and (b) reverse t1ß electrodcs.
mismatch is I'o.ßL I 7r = }3. The vültage required für this phase mismatch can be found from Eqs. (2.4.3) and (2.4.4) to be
(2.4.14)
Panel b shows the crossbar diagram for the reversed I'o.ß switch. The solid lines show the locus of phase mismatch values available für both the bar and cross states when opposite polarity vültages are applied to the electrodes. The dashed lines are the locus of bar state values that occur when the same polarity voltages are applied to the electrodes. It can be seen that electrically controlIed bar and cross states can be achieved when I ~ Li l ~ 3 or 5~LII ~ 7 .
2.4.1.3. Bar State Design
The previously described coupling can be observed by injecting light into one waveguide and then monitoring the output light on the opposite waveguide. The ratio of the output power to the input power will be referred to as the transfer efficiency TI of the coupler. This is illustrated in Figure 2.13a. When the applied voltage is at 0 V, assuming the coupler has been designed with LI I equal to an odd integer, the maximum amount of power should be transferred to the second waveguide. As the applied voJtage across the device is increased, the output power decreases until it reaches a minimum. This minimum represents the cross talk that occurs when the device
54 Chapter 2
11 Tl
DdB DdB
-IOdB - [\0 -IOdB - \ (\1"'"'1 1'"\" -20dB -20 dB -
-JOdB -JOdB -(\
"'f\
-40dB -40dB -
-SOdB -SOdB -f-
-60dB -60 dB-,...
-70dB -70dB
Vollage - Vollage -
{al (b)
Figure 2.13. Transfer efficiency of (a) a rectangular taper function and (h) Hamming taper function .
is in the bar state. As the applied voltage increases, the transfer efficiency repeatedly increases and then decreases. The reason why the output power never reaches the maximum value achieved at V = 0 is that a complete transfer of power only occurs when the propagation constants of both waveguides are equal. When the applied voltage is zero the propagation constants should be equal. At any other voltage flß I "# flß 2' only a partial transfer of energy will occur. A problem with these devices is that the voltage required for the bar state is sensitive to small fluctuations (several tenths of a volt). Thus, a small change in the bar state voltage will cause a large change in the optical cross talk.
From a systems perspective it is desirable to choose a voltage for the bar state and be able to guarantee that the cross talk will always be lower than a given value. One way of accomplishing this is to reduce the sidelobes shown in Figure 2.13a. This can be done by tapering the interaction region of a directional coupler. This is shown in Figure 2.14.
The values of d(z) are chosen using Eq. (2.4.2) and the re\ationship
/(z) = 7rw(z) 2L
(2.4.15)
where w(z) is the taper function.(13, 14) Thus, the distance between the two waveguides can be found to be
(/(Z)) (7rW(Z)) d(z) = -y log - = -y log --
/(0 2/(oL (2.4.16)
Optically Transparent Devices
Figure 2.14. Physical appearance of a directional coupler using a Hamming taper function. -L12
55
_z_ I o +L12
The taper functions that are used correspond to the window functions used in digital signal processing such as the Hamming, raised eosine, Blackman, and Kaiser window functions. For example, the Hamming taper function can be written as(l3)
(21LZ) w(z) = 1 + 0.852 cos L (2.4.17)
while the reet angular taper function is w(z) = 1.0 for - L/2 ~ z ~ L/2. Figure 2.13 shows the response of both a rectangular and a Hamming taper function. A rectangular taper function occurs when there is no gradual tapering between the two waveguides. The 1] for the reet angular taper function is shown in panel a and that for a Hamming taper function in panel b. Note that the first sidelobe in panel b has been reduced to ~ -25 dB instead of the ~ -10 dB of the rectangular taper function shown in panel a.
Therefore, by tapering the 'waveguides, directional couplers can be designed so that above a given voltage the cross talk will be guaranteed to be below a predetermined value. This technique can be used to force the coupler into a bar state that is less sensitive to the applied voltage.
2.4.1.4. Bends in Waveguides
To simplify the description of waveguide coupling in all of the previous figures illustrating directional couplers, the LiNb03 crystal has been cleaved to guarantee the correct coupler length L. When attempting to fabricate several couplers onto a single substrate, this requirement becomes impractical. To allow several couplers to connect to each other on a single substrate,
56 Chapter 2
S-bends are used. (15. 16) The cost of a sharp bend in the waveguide is a higher loss. This additionalloss occurs because the small index difference between the titanium-diffused waveguide and the surrounding LiNb03 is not large enough to completely confine the light as the radius of curvature of the be nd decreases. Thus, the smaller the radius of curvature, the larger is the loss per bend. This loss can be made negligible by limiting the bend radiusY 5• 17)
In the regions where the S-bends connect with the coupler waveguides, there will be a small amount of coupling that will occur between the be nd waveguides. This finite amount of coupling changes Eq. (2.4.13) to
(2.4.18)
where 2cjJ is the phase change due to the coupling between the S-bends. When Hamming-tapered directional couplers are used, this additional coupling can be reduced to a few percent.
One limiting factor in maximizing the density of couplers that can be fabricated onto a single substrate is the bend radius. Because the index change produced by the titanium-diffused waveguides is small, a small bend radius cannot be achieved without a large loss in the optical power. Lowloss bends have required as much as 6.5 mm to produce a 300-pm lateral offset. (17)
2.4.1.5. Polarization
The previous discussion on directional couplers has assumed that the incoming light has only one polarization. Since the Ti :LiNb03 waveguide is a birefringent material, the two orthogonal linear polarizations, TM and TE, will see different indices of refraction. The TM polarization is perpendicular to the plane of the Ti: LiNb03 crystal while the TE mode is parallel to that plane(l8-20) (see Figure 2.8). The problem that arises with these different indices is that the coupling length 1 is highly dependent on the index of refraction of the waveguide. U sing Eq. (2.4.2) and 1 = 1! /2IC gives an expression for the coupling length
(2.4.19)
When comparing the two polarizations, for specific diffusion conditions, the value of 10 is smaller while the value of r -- I is larger for the TM mode. This implies that there will be a value of d where ITM = ITE. This property will be required later in the discussion of designing the cross state of a polarization-independent directional coupler.
In addition to the difference in the index of refraction for each polarization, an applied electric fie\d will affect each polarization differently because
Optically Transparent Devices 57
the electro-optic coefficients for LiNb03 are different for the ordinary and extraardinary crystal axes. For the case of a directional coupler fabricated in a z-cut y-propagating crystal, the ratio between the two electro-optic coefficients for the TM and TE polarizations will be f33/fl3 ~ 3. The voltage required for a given phase mismatch AßL/Ir for each ofthe two polarizations IS
VTM ~ --3t-- (AßL) 2aN f33L Ir
(2.4.20)
VTE ~ 2a::fI3L (A~L) (2.4.21 )
From these equations it can be seen that the TM polarization is affected by an applied voltage three times that of the TE polarization, and that VTM /VTE ~ 1/3.
Since the design of the cross state requires an odd number of coupling lengths for both polarizations, an appropriate interwaveguide separation d is chosen to satisfy this requirement. Thus satisfied, either a uniform Aß coupler(17) or a reverse Aß coupler can be designed, the latter allowing for electrical control of the cross state.(6. 21) The bar state is achieved by using the shaped transfer characteristic of the weighted switched couplers. The transfer efficiency curve far both polarizations is shown in Figure 2.15, where a uniform Aß electrode configuration was used. With the applied voltage set at zero, both polarizations are an odd number of coupling lengths, putting the device in the cross state. As the voltage is increased, the amount of energy transferred to the opposite output is reduced as a function of its
11
Yoltage ---
Figure 2.15. Transfer efficicncy for both TE and TM polarizations.
58 Chapter 2
polarization. Figure 2.15 illustrates that the larger value of r33 which is associated with the TM polarization reduces the voltage required to reach the first sidelobe as compared with the TE polarization. Since the sidelobes for both polarizations are low, ~ -25 dB for a Hamming taper function, any voltage greater than the voltage of the peak value of the first sidelobe of the TE polarization can be used to guarantee cross talk better than - 25 dB. Thus, the bar state is achieved by choosing a voltage large enough to guarantee that both polarizations have been decoupled from the other waveguide.
One cost of designing a polarization-independent coupler is that a higher applied voltage is required. This voltage must be about three times that required of a single-polarization device. A second cost is that the design and fabrication of the directional coupler is more difficult.
2.4.1.6. Current System Design Constraints
The purpose of this section is to outline the main issues that need to be addressed when a switching system is based on Ti :LiNb03 directional couplers. This section discusses the current values of the important design parameters.
a. Voltage Requirements. One parameter that is necessary for the design of a switching system based on directional couplers is the voltage required to change the state of the switch. In practice, for a uniform Aß switch there may be a low bias voltage required for the cross state. This cross state voltage can vary from 0 to 5 V for a single-polarization device.(22) For a polarization-independent device using a reversed Aß electrode configuration, the cross state voltage can be as high as ±25 V.(12)
The magnitude of the bar state voltage will also depend on whether the device is single-polarization or polarization-independent. For single-polarization devices the bar state voltage will be ~15 Vif L = 1.(22) On the other hand, polarization-independent devices require voltages as high as 100 V. (12) The price for polarization-independence is the larger applied voltage. The problem with these high voltages is that when fast reconfiguration rates are needed, the required slew-rate becomes unmanageable.
One method that can be used to reduce the applied voltage is to increase L. (20) By increasing L, bar state voltages on the order of 5 V have been achieved.(5) The problem with increasing L is that the increased length of the devices reduces the total number of couplers that can be integrated onto a single crystal.
b. Switching Efficiency. One of the most important parameters in the design of switching systems based on directional couplers is the switching efficiency. The switching efficiency is the magnitude ofthe ratio ofthe output power when the device is in the cross state to the output power when the
Optically Transparent Devices 59
device is in the bar state. Another commonly used term is cross talk, which is the ratio of the power in the unselected waveguide over the total input power. Another term is the power-transfer efficiency, which corresponds to the power that is transferred from a given input waveguide to the opposite output waveguide as a function of an applied electric field.
At the current time the switching efficiencies for polarization-independent devices are smaller in magnitude than single-polarization devices. Single-polarization devices have reported switching efficiencies as large as 40 dB while polarization-independent devices have only achieved 25 dB. These values represent the highest switching efficiencies achieved and are not commonplace in the literature.
c. Single-Polarization versus Polarization-Independent Devices. One system question that needs to be resolved before the implementation of a directional coupler-based switching network is whether to require the coupiers to be polarization-independent. The advantage of a polarizationindependent system is that standard single-mode fiber can be used. When a polarized signal is injected into a single-mode fiber, the degree of polarization is maintained but the state of the polarization is not. Wh at this means is that a linearly polarized signal injected into a fiber can be changed into an elliptically polarized signal within a few meters. (23, 24) The major disadvantage of a polarization-independent system is that higher voltages will be required for the directional couplers. Currently, voltages for single-polarization devices (LII = I) are in the range of 10-20 V while pohirization-independent devices are in the neighborhood of 30-100 V. When high-speed switching is desired, it will be difficult to switch at these higher voltages.
The advantages of single-polarization devices indude the lower voltages required for their operation, smaller bend radii (TM polarization), and a simpler design and fabrication process wh ich should allow for more optimization. The major disadvantage of single-polarization devices is that polarization-preserving fiber will be required.(25, 26) In the long term this might not be as much of a disadvantage as it appears at present since the losses of this fiber are coming dose to the losses of standard single-mode fiber.
d. Switching Speed. The switching speed of a directional coupler is limited by the capacitance of the electrodes. For the electrodes that have been described, the capacitance can be approximated to be C = &L where &r ~ 35 is the dielectric permittivity of the crystal.(5) Thus, the capacitance of these electrodes is on the order of I pF.
Higher speed electrodes have been developed based on traveling-wave electrodes that have successfully modulated optical signals at a rate of 14 GHZ.(20, 2730)
e. Drift. One potential problem that has been observed with Ti :LiNb03
directional couplers is that the output optical power can migrate from one waveguide to the other when a fixed voltage is placed on the electrodes. This
60 Chapter 2
migration of power is referred to as drift. The cause of this drift appears to be related to a poor Si02layer that separates the electrodes from the titanium waveguides.(31, 32) Devices with effective coatings of Si02, about 200 nm in thickness, have been demonstrated with little or no drift.
f Intercoupler Interference. Intercoupler interference occurs when two or more couplers are fabricated in such elose proximity that an applied voltage on one device can alter the transfer efficiency curves of the neighboring couplers. In the 4 x 4 interconnection network previously mentioned, the couplers were placed elose to each other resulting in this intercoupler interference.(33) Proper ground plane layout can eliminate this potential problem.
g. Device Unijormity. At the present time the uniformity of a large number of directional couplers integrated onto a single substrate is reasonable. (34) The tunability required for variations adds to the complexity of the e1ectronics. It is desirable to have aIl of the couplers on a substrate have the same characteristics. For example, an 8 x 8 fabricated switch(35) has a variation in the switching extinction ratios from -14 to -41 dB and a voltage variation of 9.2 ± 0.2 V.
2.4.2. Balanced-Bridge Switch
Another type of 2 x 2 switching device is the balanced-bridge switch(36) as shown in Figure 2.16a. The two inputs are directed into a directional
Phase ,\lodulator
Inpul + 2 I OulPUI upper~Oir.rlion.1 -=====~====!-...~Olr"IiOn" 1 Upper Inpul Coupler - Coupler Oulput
+V • ± I .VJ
Lo".r ~~-----------' / ~"'" Lmr Inpul ~ -J=.- ~ 'l -J=.- ~ OUlpUI
(a)
(b)
Figure 2.16. Balanced-bridge switch: (a) structure and (b) operation.
Optically Transparent Devices 61
coupler that has been designed to equally divide each input signal between the outputs of the coupler. Although the intensity for a given input is divided equally, there is a distinct phase difference that exists between amplitudes of the fields for the two output waveguides.(37) This is the result ofthe imaginary component in Eq. (2.4.8). For this situation, the phase of the driven guide will always lag 90° behind the phase of the driving guide. For example, if a signal enters the upper waveguide of the input directional coupler, the field entering the lower output waveguide will lag the field passed to the upper output waveguide by 90°. This same principle also applies to the output directional coupler on the right.
By adjusting the phase in one of the waveguides, the balanced-bridge switch can change a given input signal from one output to the other. This phase adjustment is provided by the phase modulator located between the two directional couplers. In Figure 2.l6b, an input signal enters the upper input waveguide of the input directional coupler. The two outputs of this directional coupler have a phase difference of n /2, where the signal in the lower waveguide (driven waveguide) lags behind the upper waveguide (driving waveguide). For case I (dark arrows), ifthe phase modulator is providing no additional phase shift between the two waveguides the output directional coupler will direct the energy in the two waveguides to the lower output waveguide ofthe output directional coupler. Now for case 2 (dashed arrows), the phase modulator has been driven with the appropriate voltage to cause a n phase shift in the upper waveguide, thus forcing the output signal to the upper output waveguide.
This type of structure is attractive from a fabrication point of view since the voltages on the directional couplers can be adjusted individually to provide the 3-dB split required while a single voltage can be used for the phase modulator.
2.4.3. X-Switches
The third optically transparent or rdational switching device is referred to as the X-switch. This device, as shown in Figure 2.17a, consists of two
~~ , OUt.
n \
P Out u.n elcctrodes '
(a)
Pm -(b)
Figure 2.17. (a) Schematic representation and (b) illustration ofmode.
62 Chapter 2
single-mode waveguides of width w, which are crossing each other at an angle a, which should be less than 10 .08) The maximum change of the refractive index in the intersection area is twice that in each of the waveguides. Thus, if the difference in the refractive index between the base material (LiNb03) and the waveguide (titanium diffused into the LiNb03) is An, then the refractive index in the intersection area should be 2An. The basic operation of the X-switch is shown in Figure 2.17b. The input and output waveguides act as linearly tapered directional couplers. Light power that is launched into the fundamental mode of one of the two input waveguides excites the symmetrie and anti symmetrie modes of the two coupled waveguides. It is of critical importance for the nearly lossless operation and the low cross talk ofthe switch, that the tapered coupling region adiabatically convert these mo des into the lowest-order lateral modes of the intersecting waveguides.
The intersecting region is characterized by the fact that the width of the 2An area linearly increases, whereas the total waveguide width decreases to the minimum value w in the middle of the intersection. The waveguide parameters wand An are chosen in such a way that the two lowest-order lateral modes are guided throughout the whole interseetion. The difference Aß between the propagating constants of these two modes leads to an oscillation of their relative phase along the propagation direction. The phase difference at the end of the interseetion region determines the amplitudes of the fundamental lateral modes coupled adiabatically into the two output waveguides. This mode conversion is again almost lossless.
Using the model of two-mode interference, the optical power coupled to the output ports is given by(39)
2 -Pout, = Pin , cos (AßL)
Pout, = Pin, sin2 (AßL) (2.4.22)
where L = w/sin(a/2) is the length of the intersection, and where Aß indicates the mean value of the difference of the propagation constants of the symmetrie and antisymmetrie eigenmodes.
Electro-optic switching can be achieved since the parameter Aß can be controlled electrically. The switching characteristics, as a function of applied voltage, are shown in Figure 2.18. For y-cut LiNb03 the electrode separation d (Figure 2.17a) should be much smaller than the waveguide width w. This narrow separation guarantees that only the propagation constant of the fundamental mode will be strongly modified. Switching devices of this type have been made with the following characteristics: intersection length =
700 J1m, electrode length = 1 mm, bar-state voltage = +25 V, cross-state voltage = -35 V, cross talk <35 dB, and excess loss = 0.5 dB.(40)
Optically Transparent Devices
Output Power
Voltage
Figure 2.18. Switching characteristics of X-switches.
63
The X-switeh was initially designed and developed as a simple switeh of eompaet size for integration into large switehing networks.(41) Although the voltage-Iength produet on x-cut LiNb03 is lower than that of direetional eouplers fabrieated on z-eut LiNb03, the absolute switehing voltage of X. switehes is relatively high beeause of their extremely short length of ~700 j1m.(42) Another advantage of the X-switeh is the simpler eleetrode configuration whieh allows a less sophistieated eleetrode design and eleetronie eontrol ofthe switehes. On the other hand, an advantage of direetional eouplers over X-switehes is their lower sensitivity to wavelength change.
2.4.4. Digital Electro-optic Switches
The final optieally transparent switehing deviee to be deseribed is referred to as the digital eleetro-optie switeh. This eleetro-optie switehing deviee is a four-port deviee that has a steplike response to the switehing voltage. (43) This response eharaeteristie eliminates the need for preeise voltage eontrol of the bar and cross states therefore enabling the operation of many such deviees by a single voltage source. In addition, this deviee ean switeh both polarizations, TE and TM, simultaneously while being insensitive to the preeise wavelength of the ineident light.
Two possible realizations of this digital switeh are iIlustrated in Figure 2.19. The strueture is based on an asymmetrie waveguide junetion, eomposed of two unequal input waveguides, a double-moded eentral region, and a symmetrie output waveguide. The symmetry of the output waveguides ean be destroyed by applying an external eleetrie field. The operation of the deviee is based on the prineiple that asymmetrie branehing performs mode sorting. Light entering the narrow waveguide will exeite the first-order mode of the eentral region of the switeh while light entering the wide waveguide will exeite the fundamental mode. For the symmetrie output waveguides, the fundamental mode of the eentral region will be direeted to the waveguide with the higher index of refraetion while the first-order mode will be routed
64 Chapter 2
3 3
2 4 2 4
(a) (b)
Figure 2.19. Schematic layout of the digital electro-optic switch for (a) x-cut and (b) z-cut LiNbO,.
to the waveguide with the smaller index of refraction. A simulation of the light propagation along the switch is shown in Figure 2.20.(43) For the ca se ofno applied voltage the incident light present in the narrow input waveguide will be equally split between the output waveguides as shown in Figure 2.20b (this assumes the index of refraction for both output waveguides is identical). If a positive voltage is applied to the device, the first-order mode (doublehumped intensity) excited in the central region will be routed to the right output waveguide. On the other hand, if a negative applied voltage is present on the device, the light in the narrow input waveguide will be directed to the left output waveguide. As the applied voltage is increased, switching with cross talk better than -20 dB can be obtained. The calculated output intensity as a function ofvoltage is shown in Figure 2.20d, where the intensity of the light in the two output waveguides is represented by the thick and thin Iines. Notice that this is a steplike response as opposed to the damped
. ) ' . " '. " p.
\ \ " '.
Output '\ Light
) .\
P, " P, P, " " ·v 0 +V
(a) (b) (c) Voltage (d)
Figure 2.20. Simulations of light propagation through the switch with (a) + V bias. (b) unbiased. and (c) - V bias. and (d) output intensity as a function of voltage.
Optically Transparent Devices 65
sinusoidal response of a direetional eoupler. The advantage of the steplike response is that precise voltage control is not necessary; any voltage greater than the threshold value will guarantee that the signal will be appropriately switehed. Since there will be a different threshold for each of the two polarizations, choosing any voltage greater than the largest threshold will guarantee that both polarizations will be switched.
Another potential advantage of this device is its insensitivity to wavelength. It is hoped that this device will be able to simultaneously switch such a broad wavelength range as 1.3 ··1.55 }lm.
The eharacteristics of a fabricated device include: -15 dB cross talk, ± 15 V for TM, ±45 V for TE. The disadvantage of this type of deviee is that it is relative1y long, preventing it from use in large integrated switehing arrays.
2.5. Linear Optical Amplifiers
A deviee that ean be used to overeome the losses assoeiated with optieally transparent or relational deviees is the linear optieal amplifier. These deviees amplify by adding more photons of the same polarization, frequeney, and direetion (stimulated emission) to the photons entering the deviee. A sehematie diagram of a semieonduetor laser amplifier is shown in Figure 2.21 with the active region of width W, thiekness d, and length L stippled. There will be three types of amplifying struetures diseussed in this section: the traveling wave (TW) amplifier, the near traveling wave (NTW) amplifier, and the Fabry-Perot (FP) amplifier. The TW amplifier has the property that light entering the input faeet will only pass through the aetive amplifying region onee. An FP amplifier, on the other hand, allows light to enter the input faeet and re fleet between the two facet mirrors of the cavity (R 1 and R 2 of Figure 2.21), thus forming multiple paths through the active region. Finally, the NTW amplifier is a practieal approximation to the TW amplifier
Figure 2.21. Semiconductor optical amplifier.
66 Chapter 2
limited by the antireflection coating that can be grown on the input and output facets of the device. This section begins by discussing the material gain of a semiconductor optical amplifier (SOA). This result is then used to find the single-pass gain of an SOA which corresponds to the gain of a TW amplifier. Next, the effects of the resonant FP cavity in an FP amplifier are treated. Finally, the NTW amplifier is discussed.
2.5.1. Material Gain
Prior to discussing the single-pass gain of an SOA, there needs to be a short discussion on the material gain. (44) The material gain coefficient per unit length go is generally assumed to have a peak value proportional to the carrier density, a parabolic gain-wavelength characteristic, and a peak gain wavelength which is a function ofthe carrier density. This can be represented by(45)
go = aN [1 _ (A - A,,)2] - aNo AFWHM
(2.5.1 )
where a is the gain constant (2.7 x 10-16 cm2 for InGaAsP), A" is the peak gain wavelength, AFWHM is the FWHM bandwidth of the gain curve, N is the carrier density, and No is the transparency density (1.1 x 1018 cm-3 in InGaAsP when go = 0 at A = A,,). This can be rewritten as
(2.5.2)
where a2 ~ 0.15 cm- I nm-2 (InGaAsP at 1.5 ,um). The peak wavelength A" is also related to the carrier density by
(2.5.3)
with Ao being the wavelength at the carrier density No and a3 being a constant (2.7 x 10-17 nm cm-3 in InGaAsP at 1.5 ,um). The FWHM bandwidth can be shown to be
( )1/2
A 1 _ 2a(N - No) LlAFWHM -
a2 (2.5.4)
These equations show that by increasing the bias current, which in turn increases the carrier density, the peak material gain will increase while the
Optically Transparent Devices
Relatiye Gajn Unit Length
Wavelength --+
Figure 2.22. Gain curves of material gain.
67
peak wavelength will decrease. This is illustrated in Figure 2.22 where the gain curve on the right, labeled go (/1), is the gain curve for an input intensity IJ, while the curve on the left, go (h), is the gain curve for the intensity h which is greater than 11• This shift to shorter wavelengths with increasing carrier density presents a problem in the design of low-reflectivity amplifiers. When antireflection (AR) coatings are applied to a semiconductor laser to form an NTW amplifier, the operating current is generally higher than the original threshold current. This is illustrated in Figure 2.23, where the threshold current required for the SOA to begin lasing is at ith • With the application of AR coatings the lasing threshold is shifted to a much higher current density. This allows AR-coated SOAs to operate at much high er current
Output Power (mW)
No AR Coating .,./'
One Facet AR Coated
\ , 80th Facets AR Coated
ith Input Curreot --
Figure 2.23. Effect of AR coatings on the output power of an SOA as a function of input current.
68 Chapter 2
densities than their uncoated counterparts. Thus, if a semiconductor laser designed to lase at l.55 Jlm is given an AR coating on both facets to convert it to an NTW SOA, the peak wave1ength of the SOA gain pass band will be shorter than the 1.55-Jlm wavelength at which the device was designed to lase. For example, a wavelength shift of 50 nm has been observed in an amplifier with residual facet reflectivities of 10-3. This problem can be minimized by long devices to achieve the same gain with a lower carrier density.
2.5.2. Traveling Wave Amplifiers
According to the previous definition of a TW amplifier, light entering the input facet of the SOA is allowed only one pass through the active amplifying region before passing through the output facet to the outside world. Thus, to find the attributes of a TW amplifier we begin by looking at the single-pass gain of a SOA. The single-pass gain through the active or amplifying region of a SOA for a particular wavelength is given by
Gs = exp (gL) = exp [(~- - a) LJ I + I/Is
(2.5.5)
where r is the optical confinement factor, go is the unsaturated material gain coefficient which is a function of the carrier density, 1 is the incident optical intensity, a is the loss coefficient per unit length, and I s is the saturation intensity given by
hv I s =-
rar (2.5.6)
where a is a gain constant (2.7 x 10-16 cm2 für InGaAsP) and r is the carrier lifetime. From these equations it can be seen that the single-pass gain decreases wi th increasing in tensi ty .
The output saturation power of a TW amplifier, wh ich is the power at which the single-pass gain has decreased by a factor of 2, can be approximated using Eqs. (2.5.5) and (2.5.6) to be
Wdhv Psat(TW) = _.~ In 2
rra (2.5.7)
assuming that the average signal intensity in the active medium has been defined as 1= 10/gL, where 10 is the output intensity and setting the loss coefficient a to zero. For example, for InGaAsP at A = l.55 Jlm if
Optically Transparent Devices 69
W = 1.5 ,um, d = 0.15 ,um, a = 2.7 x 10-- 16 cm2, r = 2 ns, and r = 0.3, the saturation power is approximately equal to 1.0 dBm. Thus, for a 25-dB unsaturated gain this corresponds to an input power of -24 dBm. To increase the saturation power, the carrier lifetime or the confinement factor must be decreased for a fixed active area.
For many applications it is desired to operate the TW amplifiers below that saturation region. In this situation the FWHM bandwidth for an unsaturated single pass through the amplifier can be derived from Eqs. (2.5.2) and (2.5.5), also assuming the unsaturated gain per unit length to be g = rgo - a. Thus,
(2.5.8)
if a is assumed to be zero. From this equation it can be seen that the bandwidth of an unsaturated TW amplifier is a function of the device length and independent of the absolute gain. This implies that as the length decreases, the bandwidth increases. For example, the bandwidth of an unsaturated TW amplifier with L = 500,um, r = 0.3, and a2 =
0.15 cm -I nm -2 (InGaAsP at 1.5 ,um) is 35 nm which corresponds to a frequency bandwidth of 4.6 x 10 12 Hz.
Since the material refractive index n is also a function of the carrier density and therefore the optical intensity, the phase delay passing through the device will also depend on the input intensity. This phase delay is composed of two components. The first is the nominal phase shift associated with a single pass of the amplifier when no signal is present. The second is an additional phase component due to the change in carrier density caused by the incident signal. The total phase shift, represented by cjJ, is (46)
cjJ = cjJo + goLb [_I~] 2 1+ f,
(2.5.9)
where cjJo = 21!Lno/A is the nominal phase shift with no signal present, and b is the linewidth broadening factor (b = 5).
2.5.3. Fabry-Perot Amplifiers
When the input and output facet reflectivities (R I and R2 ) are large, the optical amplifier no longer behaves like a TW amplifier but begins to take on the characteristics of an FP cavity. This can be seen through the gain equations of FP amplifiers. Assuming that the period of the input signal's maximum frequency component is much greater than the cavity round-trip
70 Chapter 2
time, the intensity amplitude, G, and the phase, ljIo, transfer functions for an FP amplifier are given by
G = (1 - R1)(l - Rz)Gs
(l - J R1Rz Gs)z + 4jR;Rz Gs sinz c/J (2.5.10)
and
A.. -I [ J R1RzGs sin 2c/J ] ljIo = ljIin - 'I' - tan
1 - J R1RzGs cos 2c/J (2.5.11)
From Eq. (2.5.10) it can be seen that as the factor J R1RzGs becomes large, the sinz c/J term in the denominator will dominate. This condition yields the characteristic FP periodic peaks in the gain curve as shown in Figure 2.24. The difference, in frequency, between the resonant peaks is the free spectral range (FSR v = c/2nL or FSRA = }.,z /2nL). While the FWHM bandwidth, in frequency v, for one of the resonant peaks is given by
Light Iotensity
825 830 835 840 845 850 Waveleogth (nm)
Figure 2.24. Gain spectrum of a Fabry-Perot optical amplifier.
(2.5.12)
I
855
Optically Transparent Devices
Single Pass Gain G (dB)
25
20
15
10
5
71
10 20 30 Cavity Gain, G(dB)
Figure 2.25. The relationship between the single pass gain G, and the cavity gain G for different facet reflectivities.
The advantage of these FP amplifiers is that the cavity gain, which is the input/output gain of the FP amplifier, can be much larger than the singlepass gain. This is illustrated in Figure 2.25 for different values of reflectivity assuming a peak gain of 25 dB. For example, if the facet reflectivities are equal to I x 10-3, the cavity gain will approximately equal the single-pass gain. On the other hand, ifthe facet reflectivity is 3 x 10- 1, a cavity gain in excess of 20 dB can be achieved with a single-pass gain less than 5 dB.
One weakness of the FP amplifiers is the narrow passbands that are a result of the resonance of the cavity. This narrow-band transmission makes the devices very sensitive to fluctuations in the bias current, temperature, and the signal polarization. For example, a 1.5 pm double-channel planar buried heterostructure laser with no facet AR coatings (R 1 = R2 = 0.3), a length of 200 pm, a threshold hold current of 15 mA, and a maximum internal gain of 25 dB had a measured FWHM bandwidth of 6 GHz. To maintain the gain within ± I dB the temperature needs to be controlled to within ±0.1 °c.(47)
Another weakness of FP amplifiers is their sensitivity to the polarization of the input light. The polarization dependence of the gain spectrum, wh ich affects both the amplitude and polarization of the output wave, is caused by the polarization dependence of the facet reflectivity (R 1•2 ), the waveguide confinement (r), the waveguide propagation constant (ß), and the scattering losses at the waveguide walls. (48) The result of these dependencies is that the gain spectra will have different amplitudes (dichroism) and different free
72
Net Gain (dB)
40
30
20
10
1470 1471 Wavelength (nm)
1472
Figure 2.26. Example of gain spectra for different polarizations.
Chapter 2
spectral ranges (birefringence) for different input polarizations. This is illustrated in Figure 2.26. Also, since each polarization will see a different effective index of refraction, the phase delay through the amplifier will be different for each polarization. From the device ofthe previous example, the measured gain difference between the two orthogonal polarizations was 12 dB. Finally, the output saturation power of an FP amplifier is less than a TW amplifier with the same peak gain. The saturation power for an FP amplifier is given for the ca se when R) = R2 = Rand Gs » 1 by
(F WdhvI ( 2 ) (l-R)Gs Psat P) ::::; - - n rw 1 + RGs (l + RGs)(Gs - I)
(2.5.13)
where (1 + RGs)/2 is the reduction in the single-pass gain required to reduce the resonant gain by 3 dB. For example, if R = 0.3 and G = 25 dB, a decrease in the single-pass gain to 0.97Gs reduces the total cavity gain by 3 dB and thus reduces the output saturation power to -14.5 dBm, a decrease of 15.5 dB from the TW amplifier. Figure 2.27 illustrates the output saturation power as a function of reflectivity for different values of unsaturated gain. It can be seen that for high gain combined with high saturation power, the facet reflectivities must be low.
2.5.4. Near Traveling Wave Amplifiers
Many of the problems associated with the FP amplifiers such as polarization sensitivity and gain saturation are not as critical in TW amplifiers. To make a TW amplifier requires AR coatings applied to the input and output
Optically Transparent Devices
Output Saturation
Power (dBm)
73
10-4 10.3 10-2 10-1 1
Reflectivity
Figure 2.27. The output saturation power as a function of reflectivity (W = 1.5 Jim,
d= 0.15 Jim, r = 2 ns, and r = 0.3).
facets ofthe SOA to reduce their reflectivities. For the case ofTW amplifiers, the facets would have zero reflectivity forcing the factor J R1R2Gs = O. In practice, however, the best reflectivities are greater than 10-4 wh ich puts the amplifier in a region of operation that lies between the FP and the TW devices. Devices that satisfy the requirement that JR 1R2Gs < 0.17 are referred to as near traveling wave (NTW) devices. The equality holds when the residual FP resonances cause a 3-dB peak-to-trough ripple across the passband. The goal in designing NTW amplifiers is to minimize the FP resonances in the passband. Therefore, in the design and analysis of NTW amplifiers a useful metric is the nonresonant gain ratio Gnr. which is defined as the ratio of the minimum gain to the peak gain of a single FP cycle.(49) Thus,
[ J2 1- GR G - s
nr - 1 + GsR (2.5.14)
where R = J R 1R2• Again, this ratio describes the amount of ripple present in the gain spectra. This equation shows that an ideal FP amplifier should have a Gnr approaching zero while a TW amplifier's Gnr should be approaching one. NTW amplifiers operate in the region 0 < Gnr(NTW) < 0.17.
In designing an NTW amplifier, fiber-to-fiber, three parameters can be varied. The first is the facet reflectivity R. The second is the amount of
74 Chapter 2
coupling loss K going from the fiber to the amplifier and then from the amplifier back into the fiber. These losses are typically greater than 2 dB/facet.(50) Finally, and perhaps most important is the acceptable variation in the gain spectrum Gnr . Using Eqs. (2.5.10) and (2.5.14) the maximum possible net gain Gmax can be derived as
G = K(1 - Gnr)(1 - R,)(1 - R2 )
max 4RGnr (2.5.15)
Also, the maximum single-pass gain, as a function of Gnn can be shown to be
(2.5.16)
Figure 2.28 illustrates the maximum net gain Gmax as a function of the facet reflectivity and Gnr• Note that as either the facet reflectivity or the Gnr
decreases, the maximum gain increases. An example of an NTW (DC-PBH) amplifier operating at 1.5 11m with
L = 500l1m, and R, = R2 = 8 X 10-4 gave a maximum achieved gain of approximately 33 dB at a threshold current of 55 mA. The FWHM bandwidth, at an internal gain of 25 dB, was measured at 75 GHz. The temperature could also be varied by ± ISC for a gain variation of ± 1 dB. Finally, the measured gain difference between the two orthogonal polarizations was approximately 2.5 dBY')
Maximum Gain
40
(dB) 30
20
10
0.01 0.1 1.0 10 100 Facet Reflectivity (%)
Figure 2.28. The calculated maximum obtainable net gain Gmax as a function of the facet reflectivity for different values of the nonresonant gain ratio Gm.
Optically Transparent Devices 75
2.5.5. Backward Gain
One of the problems associated with linear optical amplifiers is that not only is the desired signal incident on the amplifier amplified, but so is any signal that enters the output facet such as a reflected signal. For example, a connector downstream from a high-gain SOA reflects a small percentage of its incident light back to the SOA. That reflected light is amplified and passes in reverse direction to the desired optical stream to another connector where again a sm all percentage of light is reflected back toward the SOA. In this condition, if either of the reflectivities of the connectors is large enough, or if the gain of the SOA is large enough, a laser can be formed between these two effective mirrors surrounding the SOA amplifying medium. The backward gain through an SOA is given by(52)
(2.5.17)
For the ca se of NTW amplifiers, assuming R = R 1 = Rz, the peak forward-backward gain ratio is approximately I/GsR. This implies that a desired ratio of 20 dB with a forward gain of 25 dB requires a facet reflectivity R = 3 X 10-5 which is difficult to achieve. If these low reflectivities cannot be achieved, optical isolators will be required to prevent the unwanted lasing.
2.5.6. Systems Considerations
The maximum gains, which have been demonstrated by NTW amplifiers, are on the order of 30-35 dB. At high gains the FP amplifier has two major problems. The first is that as the gain increases, the bandwidth of the amplifier decreases. Thus, at high gains the amplifier may not have sufficient bandwidth for distortionless amplification of high-bit-rate signals. Second, because of the large fields present in the cavity, FP amplifiers tend to saturate at much lower input power than do NTW or TW amplifiers. For example, NTW amplifiers can gene rally operate with output powers in the range of 0 to 5 dBm, while FP amplifiers are in the range of -15 to - 10 dBm. In addition to these problems, FP amplifiers also suff er from their sensitivity to both polarization and temperature. For the case of polarization, the minimum gain difference between the TM and TE signal polarization states can be as much as 14 dB for FP amplifiers and on the order of 3 dB for NTW devices. As the temperature increases there is areduction in the material gain constant a and an increase in the transparency density No. The result is that for NTW amplifiers an increase of 5°C (for L = 500 jlm in InGaAsP at 1.5 jlm) will force a decrease in the gain of approximately 3 dB. On the other hand, a decrease in the temperature increases the gain, but also increases the
76 Chapter 2
pass band ripple. In an FP amplifier these effects are compounded by a shift of the peak resonant wavelength of approximately 10 GHz;oC as a result of the temperature-driven change of the refractive index of the active medium. Thus, for high-gain FP amplifiers, the temperature must be controlled to within 0.1°e.
Although TW amplifiers appear to have the most promise as optical amplifiers, they also have their own problems. First, because of their large bandwidth and spontaneous emission shot noise they have a larger output noise power.(53, 54) This noise can limit their ability to be cascaded. Also, their susceptibility to external reflections forces special precautions, such as optical isolators, when including them in a system.
Another limitation of SOAs is that if multiple wavelengths, such as in wavelength-division multiplexing, are passed through the amplifier, cross talk can occur between the wavelengths unless the input powers are low.
2.6. Spatial Light Modulators
The final type of optically transparent device to be discussed in this chapter is the spatiallight modulator (SLM). An SLM is a device that can modify andj or amplify an optical signal in either one or two dimensions. The modulators that were defined in Section 2.3 describe a one-dimensional (l-D) SLM. A 2-D SLM occurs when a collection of modulators are combined to form a 2-D array. An example of this could be a 2-D array of optical amplifiers that are each individually electronically controlled. When one ofthe optical amplifiers is biased "on," the light entering the amplifying region, referred to as a pixel, will be amplified. When the amplifier is turned "off," the incident light will be absorbed and not passed to the output facet of the amplifying pixel. There are other SLMs that only modify or modulate an incident beam without providing any amplification. This section will focus exclusively on such an SLM that is based on the Faraday effect. Other SLMs have been demonstrated using the electro-optic material PLZT,(55) liquid crystals,(56) and the multiple quantum well (MQW)-based self-electrooptic effect devices.(57)
Magneto-optic SLM
An SLM can be made based on the magneto-optic or the Faraday effect. When polarized light is incident on a magneto-optic material, its polarization can be rotated as a function of an applied magnetic field. This Faraday rotation, 8 F , is given by
(2.6.1 )
Optically Transparent Devices
Polarizer Pixelated Magneto-Optic
SLM
Plant or Polarization
Rotattd
Analyzer
Figurc 2.29. A spatial light modulator based on the magneto-optic effecL
77
where V is the Verdet constant, B is the static magnetic ftux density (usually in gauss), and I is the length of the medium traversed. An example of how an SLM can be implemented using this effect is shown in Figure 2.29, where square pixels of unpolarized light, traversing the SLM from the left to the right. are incident upon apolarizer which passes only the vertical polarization component. This light then impinges the pixelated magneto-optic SLM where the polarization is rota ted based on the direction of magnetization within the individual pixel. For the case where the magnetization is parallel to the direction of propagation of the light, the polarization is rota ted counterclockwise. On the other hand, ifthe magnetization ofthe pixel is antiparallel to the direction of propagation of the incident light, then the light will rotate in a clockwise direction. By setting the angle of the analyzer such that it passes the light that has been rota ted counterclockwise, then light that has been rotated clockwise will be blocked. In the ideal case, Eh- = 45°, which will produce the largest contrast ratio. SLMs with sizes on the order of 64 x 64 have been demonstrated using this principle.(58)
2.7. Problems
I. Derive Eq. (2.2.5)
(2.2.5)
78 ehapter 2
2. For a LiNb03 substrate, if an incident beam of linearly polarized TM light enters the crystal at an angle of 30° with respect to the z-axis, what index of refraction will the two linear polarizations encounter? What is the birefringence?
3. For a y-propagating signal in LiNb03, what is the birefringence?
4. Assume a phase modulator (similar to the one shown in Figure 2.5) with the following parameters: z-cut LiNb03, d = 5 pm, A = 1.3 pm, L = 1 cm, and a = 0.2. What is the voltage required to create a 'Ir phase change for incident TM polarized light?
5. Change the values of I1ßLI'Ir to voltage in Figure 2.12 assuming d= 5 pm, A = 1.3 pm, a = 0.2, z-cut LiNb03 for both the TM and TE polarizations.
6. Using Figure 2.12 and assuming Lil = 3, what are the lowest voltages required for both polarizations of light using (a) uniform I1ß and (b) reverse I1ß electrodes? What occurs if Lil = 3.1?
7. Derive Eq. (2.5.2)
from Eq. (2.5.1)
8. Derive Eq. (2.5.7)
9. Derive Eq. (2.5.8)
Wdhv Psat(TW) = --ln 2 rm
(ln 2 )1/2
I1AFWHM = 2 -a2rL
10. Assuming 4J = 'lrl1vIFSR v , derive Eq. (2.5.12)
(2.5.2)
(2.5.1 )
(2.5.7)
(2.5.8)
(2.5.12)
Optically Transparent Devices 79
11. Find expressions representing the minimum gain and the peak gain for an NTW amplifier and then derive Gnr .
12. Show that
If Gnr = 3 dB (a 3-dB ripple in the gain spectra), what is GsR? What relationship does this answer have between GsR and the definition of FP, TW, and NTW amplifiers?
13. Assuming GsR» (GsR)2, derive Eqs. (2.5.15) and (2.5.16).
14. Given an InGaAsP SOA with L = 500 J1m, A = 1.55 J1m, R1 = R2 = 10-4 , r = 0.3, W = 1.5 J1m, d = 0.15 J1m, and r = 2 ns, find (a) Psat, (b) Gnr, (c) L'lAFWHM, (d) Gmax, and (e) Gs(max).
References
1. A. Yariv, Introduction to Optical Electronics, 2nd ed., Holt, Rinehart & Winston, New York (1971).
2. L. Levi, Applied Optics: A Guide to Optical System Design, Vol. 2, Appendix 14.1.6, Wiley, New York (1980).
3. A. E. Joel, Jr., On permutation switching networks, Bell Syst. Tech. J. May··June, 813822 ( 1968).
4. R. G. Hunsperger, Integrated Optics: Theory and Technology, Springer-Verlag, Berlin (1984).
5. R. V. Schmidt and R. C. Alferness, Directional coupler switches, modulators and filters using alternating ßß techniques, IEEE Trans. Circuits Syst. CAS-26, 1099-1108 (1979).
6. R. C. Alferness, R. V. Schmidt, and E. H. Turner, Characteristics of Ti-diffused lithium niobate optical directional couplers, Appl. Opt. 18, 4012-4016 (1979).
7. M. Papuchon, Y. Combemale, X. Mathieu, D. B. Ostrowsky, L. Rieber, A. M. Roy, B. Sejourne, and M. Werner, Electrically switched optical directional coupler: Cobra, Appl. Phys. LeU. 17,289-291 (1975).
8. S. E. Miller, Coupled-wave theory and waveguide applications, Bell Syst. Tech. J. 33, 661·719 (1954).
9. H. Kogelnik and R. V. Schmidt, Switched directional couplers with alternating ßß, IEEE J. Quantum Electron. QE-12, 396-401 (1976).
10. R. V. Schmidt and H. Kogelnik, Electro-optically switched coupler with stepped t..ß reversal using Ti-diffused LiNb03 waveguides, Appl. Phys. Lett. 28, 503·506 (1976).
11. S. Thaniyavarn, Cross-talk characteristics of ßß phase reversal directional coupler switches, in: Integrated Optical Circuit Engineering II (S. Sriram, ed.), Proc. SPIE 578, 1985, pp. 192198.
12. J. E. Watson, polarization-independent I x 16 optical switch using Ti:LiNb03 waveguides, Conference on Optical Fiber Communication, San Diego, Feh. 1113, 1985, p. 110.
13. R. C. Alferness and P. S. Cross, Filter characteristics of codirectionally coupled waveguides with weighted coupling, IEEE J. Quantum Electron. QE-14, 843-847 (1978).
80 Chapter 2
14. R. C. Alferness, Optical directional couplers with weighted coupling, Appl. Phys. Lett. 35, 260-262 (1979).
15. W. J. Minford, S. K. Korotky, and R. C. Alferness, Low-Ioss Ti:LiNb03 waveguide bends at A = 1.3 Jlm, IEEE Trans. Microwave Theory Tech. M'IT-30, 1790-1794 (1982).
16. S. K. Korotky, E. A. J. Marcatilli, J. J. Veselka, and R. H. Bosworth, Greatly reduced losses for small-radius bends in Ti :LiNb03 waveguides, Proceedings of the European Conference on Integrated Optics, Berlin, 1985.
17. L. McCaughan, Low-Ioss polarization-independent electrooptical switches at A = 1.3 Jlm, J. Lightwave Technol. LT-2, 51-55 (1984).
18. I. P. Kaminow, An Introduction to Electrooptic Devices, Academic Press, New York (1974). 19. A. Yariv, Introduction to Optical Electronics, Holt, Rinehart & Winston, New York (1976). 20. R. C. Alferness, Waveguide electrooptic modulators, IEEE Trans. Microwave Theory Tech.
MTT-30, 1121 1137 (1982). 21. R. C. Alferness, Polarization-independent optical directional coupler switch using weighted
coupling, Appl. Phys. Lett. 35, 748-750 (1979). 22. L. McCaughan and G. A. Bogert, 4 x 4 strictly nonblocking integrated Ti :LiNb03 switch
array, Conference on Optical Fiber Communications, San Diego, Feb. 11 13, 1985, pp. 76 77.
23. I. P. Kaminow, Polarization in optical fibers, IEEE J. Quantum Eleetron. QE-17, 15-22 (1981).
24. R. Ulrich and A. Simon, Polarization optics of twisted single-mode fibers, Appl. Opt. 18, 2241-2251 (1979).
25. J. R. Simpson, R. H. Stolen, F. M. Sears, W. Pleibel, J. B. MacChesney, and R. E. Howard, A single-polarization fiber, J. Lightwave Technol. LT-l, 370373 (1983).
26. S. C. Rashleigh and R. H. Stolen, Preservation of polarization in single-mode fibers, Fiberopt. Technol. May, 155161 (1983).
27. M. Izutsu, Y. Yamane, and M. Tadasi, Broad-band traveling-wave modulator using a LiNb03 optical waveguide, IEEE J. Quantum Electron. QE-13, 287 290 (1977).
28. K. Kubota, J. Noda, and O. Mikami, Traveling wave optical modulator using a directional coupler LiNb03 waveguide, IEEE J. Quantum Electron. QE-16, 754-760 (1980).
29. R. C. Alferness, Guided-wave devices for optical communications, IEEE J. Quantum Eleetron. QE-17, 946-959 (1981).
30. S. K. Korotky, R. C. Alferness, C. H. Joyner, and L. L. Buhl, 14 Gbit/sec optical signal encoding for A = 1.32 Jlm with double pulse drive of a Ti :LiNb03 waveguide modulator, Electron. LeU. 20, 132133 (1984).
31. S. Yamada and M. Minakata, DC drift phenomena in LiNb03 optical waveguide devices, Jpn. J. Appl. Phys. 20, 733 (1981).
32. O. G. Ramer, C. Mohr, and J. Pikulski, Polarization-independent optical switch with multiple sections of !'.ß reversal and a Gaussian taper function, IEEE J. Quantum Electron. QE-18, 1772 1779 (1982).
33. J. R. Erickson and H. S. Hinton, Implementing a Ti :LiNb03 4 x 4 nonblocking interconnection network, in: Integrated Optical Circuit Engineering II (S. Sriram, ed.), Proc. SPIE 578, 1985, pp. 192-198.
34. F. T. Stone, J. E. Watson, D. T. Moser, and W. J. Minford, Performance and yield of pilot-Iine quantities of lithium niobate switches, SPIE OE/ Fibers'89, Boston (1989).
35. J. E. Watson, M. A. Mibrodt, K. Bahadori, M. F. Dautartas, C. T. Kemmerer, D. T. Moser, A. W. Schelling, T. O. Murphy, J. J. Veselka, and D. A. Herr, A low-voltage 8 x 8 Ti: LiNb03 switch with a dilated-Benes architecture, IEEE J. Lightwave Technol. 8, 794-801 (1990).
36. V. Ramaswamy, M. D. Divino, and R. D. Standley, Balanced bridge modulator switch using Ti-diffused LiNb03 strip waveguides, Appl. Phys. LeU. 32, 644-646 (1978).
Optically Transparent Devices 81
37. R. G. Hunsperger, Integrated Optics: Theory ami Technology, Chapter 7, Springer-Verlag, Berlin (1984).
38. A. Neyer, Electro-optic X-switch using single-mode Ti: LiNb03 channel waveguides, Electron. Let!. 19,553 554 (1983).
39. A. Neyer, W. Mevenkamp, and B. Kretschmann, Optimization ofX-switches for integrated optical switching networks, Technical Digest of the Fifth International Conference on Integrated Optics and Optical Fiber Communications/ 11th European Conference on Optical Communications, Venetia, Italy, 1985, Vol. I, pp. 369 372.
40. A. Neyer, W. Mevenkamp, and B. Kretschmann, Nonblocking 4 x 4 switch array with sixteen X-switches in Ti:LiNbO" Technical Digest of the Topical Meeting on Integrated and Guided- Wave Optics, Atlanta, 1986, Paper WAA2.
41. E. Voges and A. Neyer, Integrated-optic devices on LiNb03 for optical communications, J. Lightwave Technol. LT-5, 12291238 (1987).
42. J. Ctyroky, Voltage length product of X and Z-cut Ti :LiNb03 directional coupler and BOA switches: A comparison, J. Opt. Commun. 7,139-143 (1986).
43. Y. Silberberg, P. Perlmutter, and J. E. Baran, Digital optical switch, Appl. Phys. Lett. 51, 1230-1232 (1987).
44. M. J. O'Mahony, Semiconductor laser optical amplifiers for use in future fiber systems, J. Lightwave Technol. 6, 531 544 (1988).
45. L. D. Wcstbrook, Measurements of dg/dN and dn/dN and their dependence on photon energy in 1.5 J1m InGaAsP laser diodes, Proc. lEE 133, 135 141.
46. M. J. Adams, H. J. Westlake, M. J. O'Mahony, and I. D. Henning, A comparison of active and passive bistability in semiconductors, IEEE J. Quantum Electron. QE-21, (1985).
47. H. J. Westlake and M. J. O'Mahony, Gain characteristics of a 1.5 J1m DCPBH InGaAsP resonant optical amplifier, Electron. Lett. 21, 33 34 (1985).
48. J. C. Simon, Semiconductor laser amplifier for single-mode optical fiber communications, J. Opt. Comm. 4, 51-62 (1983).
49. G. Eisenstein and R. M. Jopson, Measurements of the gain spectrum of near-travelingwave and Fabry-Perot semiconductor optical amplifiers at 1.5 J1m, Int. J. Electron. 60, 113 121 (1986).
50. I. W. MarshalI, Low loss coupling between semiconductor lasers and single mode fiber using tapered lensed fibers, Br. Telecommun. Tech. J. 4, (1986).
51. M. J. O'Mahony, I. W. MarshalI, H. J. Westlake, and W. G. Stallard, Wide-band optical receiver using traveling wave laser amplifier, Electron. Lett. (1986).
52. I. D. Henning, M. J. Adams, and J. V. Collins, Performance predictions from a new optical amplifier model, IEEE J. Quantum Electron. QE-21, 609-613 (1985).
53. T. Mukai, Y. Yamamoto, and T. Kimura, S/N and error rate performance in AIGaSa semiconductor laser preamplifier and linear repeater systems, IEEE J. Quantum Electron. QE-18, 1560 1568 (1982).
54. D. M. Fye, Practical limitations on optical amplifier performance, IEEE J. Lightwave Technol. LT-2, 403406 (1984).
55. A. Himeno and M. Kobayashi, 4 x 4 optical-gate matrix switch, J. Lightwave Technol. LT-3, 230-235 (1985).
56. A. A. Sawchuk and T. C. Strand, Digital optical computing, Proc. IEEE, July 1984, pp. 758 -779.
57. G. D. Boyd, Quantum-weil Fabry- Perot electro-absorption and refraction modulators and bistability, in: OSA Proceedings on Photonie Switching (H. S. Hinton and J. W. Goodman, eds.), Vol. 8, pp. 222-226, Optical Society of America, Washington, D.C. (1991).
58. W. E. Ross, D. Psaltis, and R. H. Anderson, 2-D magneto optic spatial light modulator for signal processing, SPIE Conference, Crystal City Arlington, Va., May 3-7, 1982.
3
Optically Transparent Systems
3.1. Introduction
This chapter covers systems that use optically transparent devices for space-division switching, time-division switching, and spectral-division switching. Some systems that we will discuss, especially those c1assified as using spectral-division switching, may contain both optically transparent and optical logic components, but the optical logic components are usually at the edge of the network and the information is distributed principally through optically transparent devices. Since optical logic devices are not covered until Chapter 4, some devices are introduced in a rudimentary way when their characteristics are important to the system under consideration. More rigorous device descriptions can be found in Chapters 2 and 4.
Each section begins with some fundamentals about the type of switching discussed and then moves into specific optically transparent systems that have been researched, and in some cases fabricated and demonstrated.
3.2. Space-Division Switching Networks
In space-division switching networks, inputs and outputs are connected via physical paths. Different connections use different paths, and each new connection requires additional physical space in the switching fabric. Early telephone switching systems used arrays of relays that acted as crosspoints that could make an electrical path between an input and an output. Switching has since become much more complicated as analyses reduce the resources required for interconnections. We will not attempt here a comprehensive analysis of network and interconnection theory, and will develop little formalism. Readers al ready familiar with network theory fundamentals may skip this section and those interested in more detail can find it in several
83
84 Chapter 3
(a) (b)
Figure 3.1. (a) Direct, fuJly connected users. (b) Users connected to a switching center.
excellent texts. (15) This section will discuss a method of classitication of space-division networks, describe the characteristics of each class, and provide examples of each class.
3.2.1. Switching Network Characterization
A simple approach to connecting N users together is to rnake a pairwise connection between every user (Figure 3.1 a). This approach requires N(N - 1)/2 wires or tibers between the users, and is clearly inefficient. Econornies in connections can be realized by selecting some central location as a switching center and by using only N wires or fibers to connect each user to the switching center.
The network inside the switching center will have connection capability based on trade-offs between cost, complexity, and user needs; we will here attempt a classitication of such networks based on their connection capability. Figure 3.2 shows a line of connection capability that extends from partial connectivity to redundant strict1y nonblocking connectivity.
The line can represent point-to-point networks or broadcasting networks. At the extreme left of the line is no network at all-the ca se of isolated points with no comrnunication. As we rnove to the right the networks allow partial connections between the points but any two points chosen at randorn
Partial Full Rearrangeably Connection Connection Non-B1ocking
Wide-Sense Non-B1ocking
Strictiy NonBlocking
Figure 3.2. Line of connection capability.
Redundant Strictly NonBlocking •
Optically Transparent Systems 85
have a probability less than one of being connected. At full connectivity, any one input may connect to any one output, but some connections are not possible if other connections already exist in the network. If the network is rearrangeably nonblocking, any point may be connected to any other point provided we are allowed to reroute so me existing connections. All permutations of inputs to outputs can be established by a rearrangeably nonblocking network. Wide-sense nonblocking networks guarantee that a connection between an idle input and an idle output will never be blocked provided that we put up all connections following the right algorithm. Strictly nonblocking networks also guarantee that a connection between an idle input and an idle output will never be blocked, but any available path can be used for any connection. On the far right of the connectivity continuum are networks that have more than enough elements to be strictly nonblocking; these networks are designed to maintain an acceptable level of connectivity even when elements within the network fai!.
3.2.2. Partially Connected Networks
Although partially connected networks have Iimited function, larger networks are often built from smaller, partially connected network pieces. One example of a partially connected network is the perfeet shuffie- exchange network shown in Figure 3.3.
The perfect shuffie interconnection is named after shuffiing a deck of playing cards; to do a perfect shuffie we partition the inputs into a top half and a bottom half and interleave the halves perfectly when connecting them to the next stage. Using the perfect shuffie interconnection and two stages
o 1
2 3
4
5
6 7
Inputs
o
2 3
4
5
6 7
Outputs
Figure 3.3. 8 X 8 perfect shuftlc interconnection and two exchange stages.
86 Chapter 3
of 2 x 2 exchange nodes as switching elements we can construct the 8 x 8 shuffie- exchange network shown in Figure 3.3.
This 8 x 8 perfect shuffie network is partially connected; any input can get to exactly half of the outputs. If there are existing connections in the network, even this connectivity can be frustrated. For example, if input 0 connects to output 0, the connection from input I to output I is blocked by input 0 taking the upper output of the top left switching element.
3.2.3. Fully Connected Networks
Adding one more stage of shuffie interconnection and one more stage of 2 x 2 switching elements to the network in Figure 3.3 produces the fully connected delta network shown in Figure 3.4.(6) Any input can connect to any output provided there are no contentions for links with existing connections in the network. From any input to any output there is exactly one path. In a delta network with no buffering, new connections can still be blocked by existing connections. If a connection from input 0 to output 0 exists in the network, a connection from input I to output I cannot be made.
If we folIowall possible paths an input can take, we see that the input reaches all outputs via a binary tree; branching to two links in the first stage, four in the second, and eight in the third. For a network built from 2 x 2 shuffie- exchange stages, full connectivity requires log2 (N) stages of N / 2 switching elements each for a total of (N / 2) x log2 (N) switching elements, where N is the number of inputs and outputs. A binary tree structure is also used in the banyan network shown in Figure 3.5.(7) In the banyan network the treelike structure is more obvious because of the disjoint sections in the second half of the network.
o 1
2 3
4 5
6 7
Figure 3.4. 8 x 8 delta network.
o 1
2 3
4
5
6 7
Optically Transparent Systems
o
2
J
4
5
6 7
Figure 3.5. 8 x 8 banyan network.
3.2.4. Rearrangeably Nonblocking Networks
o
2 J
4 5
6 7
87
Networks are rearrangeably nonblocking if any idle input may be connected to any idle output provided that we may rearrange existing connections. Another way to think of rearrangeably nonblocking networks is that they are capable of any permutation of inputs to outputs. Since they generally use fewer switching elements than strictiy nonblocking or wide-sense nonblocking networks, rearrangeable networks are preferred whenever all N desired connections are requested simuitaneously, provided there is enough processing power to compute the routing. Rearranging existing connections may cause a disruption of service. If the system is carrying voice or video, a disruption of a few bits may go unnoticed by the user; a system carrying computer code or accounting data would require robust protocols to recover the data lost during rerouting. One mayaiso construct rearrangeably nonblocking networks that guarantee that for any connections that need to be rerouted, the rerouted connection may be established be fore breaking the existing connection. Protocols could therefore be constructed that would anticipate a disruption and make a transition to the new route without losing data.
Many rearrangeable networks have been conceived and topological equivalency between several of these networks has been proven.(8)
As a beginning ex am pie, consider a three-stage network with n x n first and third-stage switches and N inputs and outputs. Ifwe require the network to be rearrangeably nonblocking, we must have n center-stage switches. The proof of n center-stage switches being sufficient is due to Siepian and Duguid and relies on a set theory resuit on distinct representatives of subsets.(9-11) This same set-theoretic proof is the foundation of a branch of mathematics called transversal theory. (12)
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Figure 3.6. 4 x 4 Benes network.
Using a 2 x 2 switching element as a building block and the result that n center-stage switches are sufficient for the network to be rearrangeably nonblocking, we can construct a 4 x 4 rearrangeably nonblocking network as shown in Figure 3.6.
An 8 x 8 rearrangeable network can then be built from two of these 4 x 4 networks as shown in Figure 3.7 and the same technique may be applied recursively to construct rearrangeably nonblocking networks of any size. This construction technique is attributed to V. E. Benes and the networks thus constructed are called Benes networks.
An N x N Benes network requires 2 log2 N - I stages of N / 2 couplers each. To illustrate the economies of accepting rearrangeably nonblocking networks, we note that a 64 x 64 crossbar network requires 4096 switching elements whereas a rearrangeably nonblocking Benes network requires only 352 switching elements, less by more than an order of magnitude.
The mathematical proof that Benes networks are rearrangeably nonblocking does not necessarily provide a practical approach to setting up connections such that no blocking occurs. Fortunately, an algorithm for routing calls in Benes networks is provided by Opferman and Tsao-Wu and is called the looping algorithm.(13)
o 1
2 3
4
5
6 7
Figure 3.7. 8 x 8 Benes network.
o 1
2
3
4 5
6 7
Optically Transparent Systems 89
The looping algorithm, like Benes networks themselves, is a recursive algorithm, except that the recursion starts at the outside of the network and works inward, like peeling an onion. Let i represent an arbitrary input and tr(i) the output to which i will be connected. Let tr(j) be the output that pairs with tr(i) on a single 2 x 2 switch in the last stage; where input} may or may not pair with i on a switch in the first stage. The looping algorithm starts at the arbitrary input i and connects input i with output tr(i) through the center-stage network A (see Figure 3.8). Since tr(i) pairs with tr(j) we connect input} and output tr(}) through center-stage switch B. Now input } pairs with another input we will call k. If k = i, one loop of the looping algorithm is completed and we start again at an arbitrary input. If k #- i, then we connect input k to output tr(k) through center-stage network A. We continue with the same pattern alternating center-stage networks and connecting inputs and outputs based on their pairings with the last connection until we arrive at an input or output that pairs with an input or output that is already connected. We then choose another idle input at random and start the process again. When we have connected all inputs and outputs in the outer stages, we move to the subnetworks and repeat the process until all connections are made. For example, suppose we have the 8 x 8 network shown in Figure 3.8 and we want to realize the permutation (5,6,7,4, 1,0,2,3).
That is, input ° connects to output 5, input 1 connects to output 6, input 3 connects to output 7, and so on. The connection <0,5> is made through subnetwork A, the connection 0, 4> through subnetwork B, <2, 7> through A, and < 1, 6> through B. Since input 1 pairs with input ° and input ° is already connected, we choose another idle input at random, say input 7. We connect <7,3> through subnetwork A, and <6, 2> through B to complete
o
2 3
4
5
6 7
A
B
Figure 3.8. Rearrangeable network and the looping algorithm.
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another loop. Choose input 4 and connect (4, I) through A, (5,0) through B to complete the finalloop. Each subnetwork (A and B) now realizes its own permutation by using the looping algorithm on the subnetwork. This continues until the center-stage subnetworks are 2 x 2 switches. By applying the looping algorithm layer by layer in a large Benes network we can guarantee that any permutation of inputs to outputs can be done.
If we do not know the entire permutation before making some of the connections, we may have to reroute existing connections to enable new connections to be made. Of course we would like to minimize the number of connections that need to be rearranged. M. C. Paull proved that at most n - 1 connections need to be rerouted for any new connection to be made.(14)
Several other rearrangeably nonblocking networks have a structure similar to Benes networks in that they consist of columns of 2 x 2 switches interconnected in various ways. The shufHe-exchange network, for example, uses the same interconnection between every stage in the network. This uniformity becomes attractive because partitioning the hardware for a shuffie network leaves pieces that all look the same and can be mass produced, typically from a single semiconductor chip design. In addition, a perfect shuffie network can be realized by a single stage of shuffie and a single stage of exchange, provided that the data can recirculate from input to output for as many stages of shuffie and exchange as is required for the desired permutation.
How many stages of shuffie-exchange are required for the switch to be rearrangeably nonblocking? At this writing the answer is not as simple as for the Benes network. It is conjectured that only 2 log2 N - 1 stages are required but this has been proven only for N ~ 8. For shuffie-exchange networks with N> 8 the best proven results are that 3 log2 N - 4 stages are required. (15)
Why has no one exhaustively proven that 2 log2 N - 1 shuffie stages is enough to do all permutations of N = 16 inputs? The number of permutations of 16 inputs is 16! = 2.1 x 1013 so even ifwe have a computer that could try a new permutation every 10 ps, exhaustive simulation of all possible permutations for N = 16 would require over 6 years!
3.2.5. Wide-Sense Nonblocking Networks
Networks that are nonblocking in the wide sense depend on the history of existing connections. If we use only 2 x 2 switches in the center stage of a three-stage network, then [3n/2] is the number of center-stage switches required for a wide-sense nonblocking switch, where [x] is the largest integer less than or equal to X.(I) SO if we can endow the routing algorithm with enough intelligence to pack each center-stage switch before using another, we need only provide [3n/2] center-stage switches.
Optically Transparent Systems 91
Figure 3.9. 4 X 4 wide-sense nonblocking network.
If we allow the center-stage switches to be any dimension r x r instead of just 2 x 2, then [2n - njr] has been shown to be a lower bound on the number of center-stage switches required for a wide-sense nonblocking network, but this result takes no account of a packing rule.(16)
Another example of a network that is nonblocking in the wide sense is the crossbar network. The crossbar is sometimes mistakenly referred to as strictly nonblocking because of the simplicity of the routing algorithm that guarantees nonblocking operation. If we connect input i to output j by routing horizontally in row i to column j, then vertically to the output, we are guaranteed that any idle input can connect to any idle output. If on the other hand we zigzag down through the crossbar to make connections, we can easily run into a blocking condition. Our choice of algorithm, albeit simple, is crucial in assuring nonblocking operation of the crossbar.
Other wide-sense nonblocking networks may have algorithms that are much more obscure. Figure 3.9 shows a 4 x 4 network that is nonblocking in the wide sense and uses the fewest known number of 2 x 2 switches to implement a 4 x 4 nonblocking network that needs no rearrangement.
The rule that guarantees nonblocking operation is to never allow all of the four inner switches to be in the same state (cross or bar). Any combination of connections can be put up in any order without breaking the rule. The reasoning behind the rule requires an exhaustive enumeration of the equivalent states of the network.(17)
The body of research available on wide-sense nonblocking networks is sparse because of the complexity of considering not only the number of possible interconnections but also the number of ways to arrive at these interconnection patterns.
3.2.6. Strictly Nonblocking Networks
If a nctwork is strictly nonblocking, any idle input may be connected to any idle output, no matter how many other connections are established and no matter how the other connections were put up. The directly connected network 01' Figure 3.1 a is strictly nonblocking. Since there is a dedicated path from any input to any output, existence of a connection between an idle input and an idle output does not depend on other connections. A
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Figure 3.10. 4 x 4 router / selector switch fabric.
variation on this network, implemented with 2 x 2 switching elements, is shown in Figure 3.10 for an 8 x 8 network.(18)
In this network, routing is done by following the binary trees whose roots are the desired input and output. The leaves of the input tree and the leaves of the output tree will meet at exact1y one link in the center of the network. The routing algorithm is simple-use the only path from input to output. Although the distinction may be smalI, we classify this network as strictly nonblocking rather than wide-sense nonblocking because there are no blocking states to avoid. The drawback of this network is that every branching of the tree requires a 2 x I or I x 2 switching element. In general, an N x N network ofthis type will require N - I switching elements for each input and N - 1 switching elements for each output, 2N(N - I) switching elements total. In addition, the failure of any link in the network will prevent the connection of at least one input- output pair.
C. CI os showed that for networks of large enough dimension, strict1y nonblocking networks could be constructed that use fewer crosspoints than the crossbar network.(19) This result is a counterexample to the intuitive notion that more connection capability requires more crosspoints. Clos also included the proof of the strictly nonblocking capability of these networks.
Optically Transparent Systems 93
n
n
N N
Figure 3.11. N X N three-stage elos network.
Consider the three-stage, symmetrie CI os network shown in Figure 3.11. We assign the following labels to the parameters of this network. Let:
N = the number of inputs and outputs of the network n = the number of inputs per switch in stage 1 and the number of
outputs per switch in stage 3 m = the number of outputs per switch in stage 1 and the number of
inputs per switch in stage 3 = the number of center-stage switches r = the number of switches per stage in stages 1 and 3
Note that every switch in stage 1 connects to every switch in stage 2 by exactly one link; a mirror image of this connection pattern exists between stages 2 and 3. Select an arbitrary input i and output j To assure strictIy nonblocking operation, we must guarantee that whatever other connections exist in the network, a connection can be made between input i and output j. Input i shares its input switch with n - 10ther inputs, all of which may be connected to different output switches through different switches in stage 2. There must, therefore, be at least n - 1 center-stage switches to satisfy these connections. Further, the switch output that j connects to has n - I other outputs that may be connected to n - I center-stage switches other than those required by the n - I input connections. Once the demands of
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the n - I inputs and n - I outputs are satisfied, there must still be one free centerstage switch for the connection from i to j, so the total number of centerstage switches required is
m = 2(n - 1) + 1 = 2n - 1 (3.2.1)
Having shown that the elos network is strictly nonblocking, we turn to the practical question of how many crosspoints are saved by choosing the elos network instead of the cross bar. If we assume that each of the switches in the elos network is a crossbar switch, the total number of crosspoints in the first and third stages is 2nr(2n - 1), and the total number of crosspoints in stage 2 is r2(2n - 1). So the total number of crosspoints in a three-stage symmetric Clos network is
C(3) = 2nr(2n - 1) + r\2n - 1) = (2n - I)(2nr + r2 ) (3.2.2)
If we consider only elos networks where N = n2, then r = n and Eq. (3.2.2) reduces to
C(N, 3) = 3n2(2n - 1) = 3N(2JN" - 1) (3.2.3)
so whenever
3N(2JN" - 1) < N 2 (3.2.4)
the elos network uses fewer crosspoints than the crossbar. Solving for N in Eq. (3.2.4) and truncating we have the result that for N ~ 25, the elos network requires fewer crosspoints than the crossbar.
As elos networks become Iarge, each of the switches in the network may be made more efficient by reducing them to smaller elos network modules inside a Iarge elos network as shown in Figure 3.12. This recursive construction of elos networks maintains their strictly nonblocking capabilities and Iends itself to straightforward computation of the crosspoints saved. In Figure 3.13, we see that the number of crosspoints for elos networks diverges from the N 2 line of the crossbar and that several thousand crosspoints can be saved in a Iarge network by using a elos network rather than the crossbar.
3.2.7. Redundancy in Networks
Physical networks are built with imperfect parts that have a nonzero probability of failure. For critical applications where a connection failure cannot be tolerated, networks are often entirely duplicated. The duplicate network may be powered on and idle or it may run in Iockstep with the
Optically Transparent Systems 95
Figure 3.12. Five-stage elos network built recursively from three-stage networks.
main network so that it can be switched in with minimal disruption. We may provide a degree of redundancy without fuH duplication by building the switching fabric with more switching elements than are needed. If some elements fail, there will still be enough elements to carry all or part of the desired connections.
3.2.8. Blocking Probability
Although characterizing networks by their connection capability gives us a way to catalog networks, it ignores the more involved continuum of blocking probability. Two networks that are blocking networks may have vastly different blocking probabilities. It may be that we can contrive a network such that some connections could be blocked, but that the probability of blocking is so low that blocking never occurs during the functional lifetime of the switch.
3.2.9. Output Concurrency
If all inputs to a network can operate independently, more than one input may simultaneously request a connection to the same output. Since a
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107
Crosspoints
lOS
C(S)
100 1000 10,000
Number of Inputs, Outputs (N)
Figure 3.13. Crosspoint count comparison between crossbar and three-, live-, and seven-stage Clos networks.
single output can connect to only one input at a time, even a strictly nonblocking network will refuse input requests if the output is busy. In a packet switching network connections may be set up and tom down quickly, even single packets may be sent from source to destination; it therefore often makes sense to store the unaccepted packets in a buffer until the output is free. Whether to buffer on the input side, the output side, or internal to the network continues to be the subject of much discussion and research.(20, 21)
3.3. Space-Division Switching with Optically Transparent Devices
Using the background of optically transparent devices discussed in the last chapter and the introduction to space-division switching just presented, we will now discuss several photonic switching systems based on optically transparent devices.
Optically Transparent Systems 97
In photonics, opticaJly transparent switching systems direct photons from an input to an output. A spatial light modulator (SLM) aJlows an input to reach an output through free space; a directional coupler establishes an optical path between an input waveguide and an output waveguide. Since opticaJly transparent devices do not absorb incoming photons but rat her redirect them, there is no time lost on energy conversion. Space-division switches built from opticaJly transparent devices can, therefore, support high data rates; the data rate in the network is usuaJly limited by the optical transmitter and receiver, not the switching fabric. In addition, space-division switches built from opticaJly transparent devices often aJlow bidirectional transmission through the same network, and can often accommodate several wavelengths per channel.
Because the data traversing them do not effect a change of state, opticaJly transparent space-division switches cannot easily process headers on packet data and it is difficult to synchronize switching times with data transitions.
3.3.1. Optically Transparent Systems Using Spatial Light Modulators
Given an N x N array of individuaJly controJlable SLMs, an N x N photonic switching system can be constructed using fiber splitters and combiners. N fiber splitters are used to replicate the N inputs N times and direct each replication to one SLM of the array. In Figure 3.14 the inputs are fanned out along the columns of the SLM array.(22)
Spatial Light Modulator Array
Inputs Outputs
Figure 3.14. 4 x 4 optical splitter/ combiner based on a spatiallight modulator array.
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Each pixel in the SLM array then allows one copy of each of the inputs to pass through the SLM to the fiber combiners on the output. The fibers in a row converge to one output. The SLMs are controlled such that only one pixel in a row is transparent, allowing one input through to a particular output. A network constructed this way is strictly nonblocking. This SLM network also has broadcasting capability; any input can reach any subset of outputs by making the proper SLM pixels transparent.
The SLMs in this splitter/combiner network could be mechanical shutters, magneto-optic elements in crossed polarizers, self-electro-optic effect devices made from 111-V semiconductors, or switched optical amplifiers. (23)
Mechanical shutters reconfigure in milliseconds, magneto-optic devices in microseconds, self-electro-optic effect devices and switched optical amplifiers in nanoseconds; the speed of reconfiguration depends on the technology used. The data rate is limited by the bandwidth of the source and detector.
The splitter/combiner architectures are inherently limited by the splitting and combining functions. If the switch dimension is N x N, the power reaching the pixel of the SLM is IIN times the launched power, and the power finally reaching an output is 11 N 2 times the launched power. There are also scattering losses at the splitters and combiners, losses associated with the coupling between the SLM and the fibers, and absorption in the SLM. If we let:
Ur = Totalloss L s = Scattering loss in each fiber splitter or combiner L F = Coupling loss at each fiber-SLM interface LSLM = Absorption loss in the SLM
then the total loss in an N x N network would be
LT = 10 log (11 N 2 ) + 2Ls + 2LF + LSLM
= -20 log (N) + 2Ls + 2LF + LSLM (3.3.1 )
Ifwe let L s = -1 dB, L F = -1.5 dB, and L SLM = -2 dB, then a 16 x 16 splitter 1 combiner network would have a total loss of - 31.08 dB, and a 64 x 64 network would have a totalloss of -43.12 dB.
Loss is not the only limiting factor on a splitter/combiner system. Since the SLM pixels may not be perfectly absorbing in the opaque state, some unwanted light willieak through and corrupt the intended signal. The signalto-cross talk ratio (SXR) will just be 1/(N - l)x where x is the ratio of the output of the SLM to the input of the SLM when the SLM is in the opaque state minus the SLM 10ss in the non-opaque state. Since both signal and noise terms experience the same amount of loss, loss terms are excluded from this
Optically Transparent Systems 99
analysis. In decibels the SXR becomes -10 log (N - 1) - 10 log (x = -10 log (N - 1) - X where X = 10 log (x). So in a 64 X 64 splitter/combiner network with cross talk of - 30 dB, the total SXR = -18 + 30 = 12 dB.
3.3.2. Optically Transparent Systems Using Guided-Wave Electro-optic Switches
Most conventional space switching architectures can be built from the 2 x 2 guided-wave optical directional couplers described in the last chapter. The maximum network dimension for directional coupler switches can be limited by several factors. Since each directional coupler may be from 2 to 15 mm long with gradual waveguide bends connecting couplers, and since Ti: LiNb03 substrates are patterned on wafers", 76 mm in diameter, a network patterned on a single wafer is probably limited to a few hundred couplers. In addition, since each coupler requires at least two electrical connections, large arrays of couplers can make electrode routing difficult and can lower the frequency response of the electrode circuit.
Cross talk and loss also limit the size of photonic switches made from directional couplers. The loss limitation is generally not as severe as for the splitter/combiner architectures since the light is routed rather than divided.
Analyzing the loss and cross talk limitations for guided-wave photonic switches can be a complex and tedious process because of the cumulative effect of cross talk in more involved architectures. Computer simulation yields the most accurate cross talk estimates. Analytical solutions to loss are estimated by assuming all directional couplers attenuate equally and by summing the loss along the worst-case path through the network. Analytical solutions to cross talk also assurne coupler uniformity and attempt to accumulate the cross talk along the worst-case path in a fully loaded network.
We will develop some analytical solutions to loss and cross talk in the following sections. To simplify the analyses we define loss and cross talk such that noise entering the signal path at a coupler is attenuated by both loss and cross talk values for that coupler. This will allow us to cancel loss from the SXR calculations in architectures where the signal and noise paths traverse the same number of couplers. In all architectures we will discuss, we ignore the fiber-waveguide losses in the SXR calculations since the signal path and all noise paths experience the same fiber-waveguide loss.
3.3.2.1. Crossbar Architecture Using Directional Coupler Switches
An example of 4 x 4 crossbar switch made from directional couplers is shown in Figure 3.15.(24) As discussed in the last section, crossbars require N 2 couplers. Assurne that all directional couplers in the 4 x 4 guided-wave
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10
Figure 3.15. 4 x 4 cross bar with directional couplers.
optical crossbar are initially in the cross state. To connect input i to output j, the coupler at the intersection of row i and column j is switched to the bar state.
The worst-case loss through a guided-wave photonic crossbar can be estimated by assuming that the most lossy connection traverses the most directional couplers. If we let:
L F = Loss at the fiber-waveguide interface L c = Loss suffered travt;rsing a directional coupler and its connecting
waveguides LT = Totalloss
all in decibels, then the worst-case fiber-to-fiber loss in an N x N cross bar made from directional couplers is just
~ = 2LF + (2N - I )Lc (3.3.2)
where the 2N - 1 term comes from traversing the couplers in the top row and the couplers in the rightmost column. For example, if L F = -1 dB and
Optically Transparent Systems 101
Lc = -0.5 dB, then the worst-case loss estimated for a 16 x 16 crossbar switch would be Lr = -17.5 dB.
In computing loss, it was convenient to use the decibel values for the computation; in computing cross talk, it is often more convenient to use a ratio ofthe output power to the input power for a given coupler. In preceding paragraphs we have used subscripted uppercase letters to represent decibel values; here we will use lowercase versions of the same parameters to indicate the associated power ratios. In other words, L F = lO log (IF) or conversely IF = IO/F/IO. To caIculate a worst-case SXR we choose a path that will be intersected by the most other connections that are attenuated least before intersecting the chosen path. We shall refer to the chosen path as the signal path and the paths creating cross talk in the signal path as noise paths.
To caIculate the worst-case cross talk in a crossbar network we select the signal path that intersects the most other paths in a fully loaded network. The path most likely to have the highest cross talk in the crossbar is from input 10 to 0 0 in Figure 3.15, since all other connections intersect this connection in the first column of couplers. Since all intersections of signal and noise paths occur in the first column, each noise path has experienced no coupler attenuation before intersecting the signal path. The signal path, however, has experienced one coupler attenuation before intersecting the first noise path, two attenuations before intersecting the second noise path, and so on. If we let the power entering any input be P1N and the power leaving any output be POUT, then the signal path output power is POUT = PIN(l~). The cross talk power entering the signal from the input just below the top input and propagating with the signal to the leftmost output will be POUT•I = PIN(xc)ltN-I). In general, input i will contribute cross talk power
(3.3.3)
The total cross talk will then be the sum of the cross talk from all noise path inputs and will be
N-I
P _ P ~ ( )l(N - i) OUT, cross talk - IN L.. Xc C (3.3.4)
i= I
which can be reduced to the closed form
N [1 - ltl- NJ ]
POUT, cross talk = PIN(XC )lc lc _ 1 (3.3,5)
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Therefore, the SXR for the crossbar is 10 log (POUT, signad POUT, erosstalk) or
__ _ [l-lO(I-N)Lcl IOJ - Xc 10 log L /10 10 c - 1
dB (3.3.6)
For example, let the loss per coupler be L c = -0.5 dB and the cross talk per coupler be Xc = -30 dB, then a 16 x 16 crossbar will have an SXR =
13.7 dB. In Figure 3.16, values of SXR are plotted for several switch sizes and loss values, assuming that cross talk is uniform at - 30 dB.
Although this type of analysis reveals the relationship between loss, cross talk, and SXR, it is only an approximation. We have ignored the possibility of each directional coupler having different loss and cross talk values, and different cross talk values for the cross and bar states. Figure 3.16 points out that even for directional coupler switches with cross talk of - 30 dB and a loss per coupler of -0.5 dB, a requirement for an SXR =
11 dB would limit the switch size to 16 x 16 for the crossbar. Realizing the switch dimension limitations imposed by the cross talk,
directional coupler switch architects proposed and built a modified crossbar that uses two directional couplers at each junction of a row and column (see Figure 3.17). (25)
Therefore, 2N 2 couplers are required for a switch of dimension N. Loss calculations for the double crossbar are straightforward. The
worst-case loss path traverses 2N couplers so the total loss for the double
30
10 SXR
(in dB) 0
-10
-20
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Coupler Loss L c
Figure 3.16. Crossbar signal-to-cross talk ratio with coupler cross talk = - 30 dB.
Optically Transparent Systems 103
(a)
(b)
Figure 3.17. Double crossbar: (a) conceptual, (b) waveguide layout.
cross bar is just
(3.3.7)
The double crossbar guarantees that noise is isolated from the signal by two directional couplers. In other words, any noise that enters the signal will be multiplied by at least x~" or equivalently, diminished by 2Xc dB. To compute an approximation of the worst-case SXR for the double cross bar, we need only square the cross talk term of Eq. (3.3.6) to get
_ _ _ [1 - 10(1 -NJLcllOJ - 2Xc 10 log -L-/-IO---
10 C - I dB (3.3.8)
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Since the cross talk of an individual coupler is the dominant term in the SXR calculations, this double isolating effect allows for switches of much larger dimension. For sm all switches the worst-case SXR of a double cross bar may actually be better than the isolating capability of a single coupler. In architectures employing this double isolation technique, the switch dimension may be limited by loss or size of the substrate, instead of cross talk.
In the crossbar architecture, there are no waveguides that cross over each other. In the actual layout of the double crossbar, there are several waveguide crossovers. The contribution of the crossovers to the total insertion loss and to the SXR of a directional coupler switching architecture can range from negligible to severe and depends on the angle of intersection of the waveguides.(26) For simplicity, we will assume negligible effects from the crossovers in all analyses in this section. More accurate predictions can be simulated with the crossover effect included in the simulation model.
3.3.2.2. Router/Selector Architecture Using Directional Coupler Switches
The double crossbar is only one of a dass of architectures conceived specifically to avoid cross talk. The router/selector architecture shown in Figure 3.18 also isolates the signal from the noise by two couplers. Router/ selector architectures require 2N(N - 1) couplers. Since this architecture
Figure 3.18. 4 x 4 router / seiector switch made [rom directional couplers on multiple substrates.
Optically Transparent Systems 105
uses only I x 2 and 2 x I directional couplers, the only opportunity for firstorder cross talk is in the couplers on the selector side. But since only one of the N paths to each output can carry a signal, we are guaranteed by the routing algorithm that the couplers on the router side will route any noise paths away from the selector-side coupler tree that has the signal path. Figure 3.18 shows a 4 x 4 router /selector architecture fabricated on eight different substrates which are interconnected with optical fibers. This fabrication assures us that there is no cross talk from waveguide crossovers since the interconnection fibers will be weil isolated from each other.
The router/selector architecture can also be integrated onto a single Ti: LiNb03 substrate as shown in Figure 3.19.
The loss in a router/selector architecture is nominally the same for all paths and is LT = 4LF + 2(10g2 N)Lc for the multiple-substrate version and LT = 2LF + 2(10g2 N)Lc for the single-substrate version.(27)
To estimate the worst-case cross talk in the router /selector architecture we will first make one simplifying assumption beyond those of coupler uniformity and negligible effects from crossovers. We will assurne that for each tree of couplers, the couplers at the same level in the tree will all be in the same state. This assumption will apply to both the router and selector side of the architecture. The assumption not only eliminates some ambiguity in the cross talk calculations, but also reduces the number of electrode drivers; only one driver is required per tree level rat her than for each coupler.
All paths traverse the same number of couplers, so the loss terms in the signal and cross talk will cancel in the SXR calculation; we will therefore omit loss terms from the analysis. Since we are ignoring the effects of crossovers, any path could be chosen for the SXR analysis. In Figure 3.20 we have chosen the signal path to be from input 0 to output 7.
Figure 3.19 4 x 4 routcr/sciector intcgratcd on a single suhstrate.
106 Chapter 3
Figure 3.20. Router /selector signal-to-cross talk ratio.
We have also eliminated most couplers and connections not involved in the SXR analysis. The worst-case SXR occurs when the network is fully loaded and when there are a maximum of noise paths that are least attenuated before entering the signal path. For an 8 x 8 router/selector, there are three couplers on the selector side where cross talk may enter the signal (couplers a, e, and gin Figure 3.20). Since we have chosen the path from 10
to 0 7 as the signal path, and since all couplers at the same level of the tree are in the same state, couplers a through g will select their top inputs. In a fully loaded network, it can occur that the bottom input of coupler a and the top inputs of couplers band c all have a noise power that has been attenuated by only one cross talk term. The noise power at the bottom input of coupler a enters the signal path through its second cross talk attenuation in coupler a. The noise power at the input of coupler b traverses coupler b
Optically Transparent Systems 107
without cross talk attenuation and enters the signal path at coupler e through its second cross talk attenuation. The noise power at the input to coupler c traverses coupler c and coupler f without cross talk attenuation and enters the signal at coupler g through its second cross talk attenuation. The noise power in this example would then be POUT. cross talk = PIN(3xl:). This example extends to the general case where each selector output tree has logz N couplers where noise may enter the signal path after two cross talk attenuations; therefore, the total output cross talk power in the general case is
P OUT. cross talk = PIN(lOgZ N)x~ (3.3.9)
In the SXR calculations, the PIN terms of the signal and cross talk powers will cancel leaving
SXR=IOIOg[ I z]=-1OIOg[IOgZN]- 2Xc (3.3.10) (logz N)xc
A more thorough analysis by SpankeZ7 shows the cross talk power more accurately to be
logz N [ (logZ N)I .] P =P . X 21
OUT, cross talk IN.2: '1(1 ZN _ ')1 c ,~ I l. og 1 .
(3.3,11)
but in practice the x~ and higher terms contribute negligible cross talk. Using Eq. (3,3.10), the SXR for a 16 x 16 router/selector with coupler cross talk Xc = - 30 dB will be SXR = 54 dB, significantly better than the crossbar SXR.
3.3.2.3. Benes Architecture Using Directiona/ Coup/er Switches
We have so far considered the crossbar architecture which is nonblocking in the wide sense and the router/selector and splitter/combiner architectures which are nonblocking in the strict sense. We will now briefly analyze the directional coupler version of the Benes network, a rearrangeably nonblocking architecture. The Benes network lends itselfwell to implementation with directional couplers because it recursively grows from 2 x 2 elements. The number of couplers required is (N /2)[210gz (N) - I]. It can be shown that the Benes network is still rearrangeably nonblocking if one coupler in one of the outermost columns in each recursion is set in a fixed state (cross or bar).(Z8)
Strictly speaking, then, a 4 x 4 Benes network requires only 5 couplers, an 8 x 8 Benes network requires 17 couplers, and in general an N x N Benes network requires
COUPLERSSenes = N logz (N) - N + I couplers. (3.3.12)
108 Chapter 3
The worst-case optical loss experienced traversing a Benes network (again excluding crossover effects) is just the number of stages in the network plus the fiber-substrate coupling losses or
(3.3.13)
Since both noise and signal paths traverse the same number of couplers and therefore have the same loss, we can exclude the loss terms from the SXR calculation. In a fully loaded Benes network, noise paths will intersect with the signal path at every coupler in the signal path, so the total first-order cross talk power (ignoring loss) is
POUT, cross talk = P1N(Xc) [210g2 N - I] (3.3.14)
which is a good approximation as long as N« I/xc. Therefore,
SXR = -10 log [210g2 N - I] - Xc (3.3.15)
If Xc = -30 dB, then the SXR for a 16 x 16 Benes network is 21.5 dB. Benes networks can also be adapted to give better SXR performance
by dilation, that is, by adding a second Benes network (minus one stage) and employing routing schemes that guarantee that no signal path will intersect a noise path (see Figure 3.21).(29) In other words, clever routing can guarantee that the signal will experience no first-order cross talk terms. In addition to Benes networks, omega networks and Clos networks can be transformed into networks of equivalent connectivity but with no noise path intersecting the signal path at a single coupler.
The total number of couplers in a dilated Benes network is nominally just 2N log2( N) but as in the Benes network, some couplers need not have switching capability and can therefore be omitted (those in dashed lines in Figure 3.21). With these redundant couplers omitted, the coupler count for the dilated Benes becomes
COUPLERSdilated Benes = 2N log2 (N) - (N /2) (3.3.16)
As with the Benes network, the total loss in a dilated Benes network is determined by the number of stages, therefore
LT = 2LF + (2 IOg2 N )Lc (3.3.17)
Because the loss from the couplers is principally associated with attenuation in the waveguide, and because the worst-case path may not include the
Optically Transparent Systems 109
Stage # 0 2 3 4 s
I +6x~
I + IOx~
POUT = I + 15x~
Figure 3.21. 8 x 8 dilated Benes network (dashed elements not strictly needed).
couplers omitted in the coupler count of Eq. (3.3.16), the loss and cross talk calculations will ignore the differences between a full dilated Benes network and one with superfluous couplers omitted.
The SXR for the dilated Benes can be calculated to second-order cross talk precision by noticing that the amount of second-order cross talk added to the signal increases by one at each stage. In Figure 3.21, we have chosen the path from input 7 to output 7 to represent the signal path (any path may be chosen) . Letting P1N = I for simplicity, we see that the outputs of the zeroth-stage couplers will have powers (1 - xc) ~ 1 and Xc, where Xc is the cross talk value per coupler (we will ignore any loss terms). The inputs of any coupler in the first stage must be I and Xc because in a fully loaded dilated Benes, every coupler will have a signal traversing it and no two signal paths intersect at a single coupler. The outputs of any coupler in the first stage are just I + x~ and 2xc. In general, if we ignore powers of Xc greater than 2, the outputs of any stage i are just (i + I )xc and
I + ± j(x~.) = 1 + x~ (~) (i + 1) ; ~ I 2
(3.3.18)
110 Chapter 3
In the right side of Eq. (3.3.18), the first term (1) represents the signal power and the remainder of the equation represents the cross talk power. Since the last stage in our numbering (starting with stage 0) of the dilated Benes is stage 2 log2 N - 1, the SXR for an N x N dilated Benes network is just
SXR = -2Xc - 10 log[(2 log2 N - 1)(log2 N)] (3.3.19)
3.3.2.4. Coup/er Count, Loss, and Cross Talk Comparisons
A graph of the couplers required for the optically transparent spacedivision networks discussed in this section is shown in Figure 3.22 for networks of various sizes.
A graph of the loss experienced in the architectures is shown in Figure 3.23. We can see that for large networks, one must either seIect the architectures where the loss is proportional to the log of the dimension of the switch or be prepared to amplify or regenerate the optical signals.<30) We must, however, be careful about taking the data of Figure 3.23 too literally. The loss experienced in a guided-wave photonic switch is not really a lumped loss associated with each coupler but rather a combination of losses including propagation loss in the material, scattering loss at waveguide bends, and loss from incomplete power transfer in the coupling and crossover regions.
10'r---------------------------------,
umber 104
of Couplers 103
10
4
Number of Inputs, Outputs (N)
Figure 3.22. Comparison of number of couplers.
1024
Optically Transparent Systems
o .................. Dilated Benes ............... ';~~;~;is~;~~'t~~'"& "B"~~~~""""""""""""
-10
-20
-30 Loss in dB
-40
-50 4 8 16 32
Number or Inputs, Outputs (N)
111
64
Figurc 3.23. Optical power loss versus switch dimension, assuming - 0.5 dB of loss per coupIer, and -I dB of loss at each fiber waveguide interface.
Figure 3.24 shows a comparison of the SXR for the five architectures, assuming -0.5 dB ofloss per coupler, -I dB ofloss for each fiber-waveguide interface, and -30 dB of cross talk per coupler. The benefit of designing architectures to avoid cross talk is apparent. We see that the crossbar and double crossbar have essentially the same curve shape but the double
60
40
Signal-toCrosstalk Ratio (SXR) 20 in dB
o
4
RouterlSelector --------- -------------------------------Dilated Benes
.................................
Crossbar
8 16 32 64
Number or Inputs, Outputs (N)
Figure 3.24. Signal-to-cross talk ratio (SXR) versus switch dimension (N), assuming loss per coupler = -0.5 dB and cross talk per coupler = - 30 dB.
112 Chapter 3
crossbar SXR is affected only by second-order cross talk and is therefore consistently 30 dB better than the SXR of the single crossbar. The SXRs of the two Benes architectures also have the same curve shape but do not track exactly at 30 dB because the dilated Benes is not a precise duplication of the Benes architecture. Again we can select an architecture based on switch specifications; a switch larger than 32 x 32 willlikely have to use some cross talk avoidance architecture or regenerate the signal (amplification is not sufficient to mitigate SXR) somewhere in the middle of the switch.
Although the SXR model used in this analysis is not perfect, it is a more accurate model than that used for the loss analysis. The cross talk is largely attributed to the coupling region, so calculating the SXR by accumulating each coupler's cross talk can provide a reasonable approximation to the worst-case SXR. It must be stated, however, that in practice all couplers will not have uniform cross talk values; and the cross talk from crossovers may not be negligible if the architecture does not permit steep crossover angles.
Data from these graphs can be used to specify guided-wave photonic switching systems with a range of attributes. A small system that is used as a time-multiplexed switch might use the Benes network. A large system that establishes connections serially may choose the double crossbar or router/selector architecture.
3.3.2.5. Architecting around Cross Talk Limitations
In the double crossbar, router/selector, and dilated Benes networks we ean see the architecture of the switch being used to mitigate deficiencies of the couplers. These architectural sehemes may be employed to craft a network that has almost any desired SXR. Essentially we can trade couplers for better SXR performance. Any number between zero and the maximum of first-order cross talk terms can be guaranteed. This is an important innovation brought about by research into guided-wave photo nie switching arehitectures.
3.3.2.6. Other Optically Transparent System Design Parameters
Loss, SXR, and the number of couplers represent only a few of the parameters to consider when designing optically transparent systems with directional couplers. If the system must switch rapidly, the electrodes must be designed as transmission lines and eare must be taken to maintain a consistent impedanee and to terminate the line with the eharacteristie impedanee. If the system uses single-polarization eouplers, then the light ente ring the photonic switch must be polarized before entry, either with a polarization compensator or by using polarization-maintaining fiber from the laser to the network. The effects of temperature and humidity must be taken into
Optically Transparent Systems 113
account when designing an optically transparent system that may be deployed in hostile environments.
3.4. Multiple-Access Channel
In space-division networks there are physical space channels that connect one user to another with an available bandwidth Re. The connection between users may require a bandwidth Ru. When Re = Ru there needs to be one space channel assigned to each connection. When Re » Ru. it is desirable to share the available bandwidth between several connections by allowing multiple access to the same space channel.
Methods of providing this multiple access can be categorized according to their operational description in either the time or spectral (frequency or wavelength) domain as illustrated in Figure 3.25.
In time-division multiple access (TDMA), information from different users arrive at the destination at different moments in time. Several possible implementations ofTDMA include bit- or block-multiplexing, code-division, and packet switching. To accommodate more users in a channel, the pulse widths of the information passing through the channel are made narrower in time. This compression of the data in time is of course accompanied by
User Needs Single-Access Multiple-Access
Time-DiYision
.l.1.ru ~ ±~&ro lli1ml~i!.llb ß!!!!!!wlglh • Bit-Multiplexed
Ioo &00 • Block-Multiplexed • Code-Multiplexed • Packets
Speclral-Diyjsjon
L:-.ro • Wavelength-Multiplexed • Frequency-Multiplexed
Figure 3.25. Bandwidth utilization of a single space channel.
114 Chapter 3
a spreading of the frequency bandwidth required, so multiplexing more users requires more bandwidth. At the destination, a given user's information may be directed to a particular output. For example, most switching systems can terminate T1lines which operate at a bit-rate of 1.544 Mb/s. Since digitized voice requires only 64 kb/s, 24 voice users are time-multiplexed together to form the 1.544 Mb/s rate.(3!) In the switch, a user's information may be shifted to a different point in time relative to other users' information, thereby directing the information to the desired destination.
The second method of multiple access involves the sharing of the available spectrum and is called spectral-division multiple access. Implementations inc1ude frequency-division multiple access (FDMA) and wavelength-division multiple access (WDMA). An example of FDMA is radio broadcasting where many channels are modulated onto carriers of different frequencies; users then tune to the carrier onto which is modulated the desired station. WDMA uses essentially the same concept as FDMA but the carriers are much high er in frequency and are therefore more conveniently referred to by their wavelength.
3.5. Time-Division Multiple Access Networks
This section outlines some of the TDMA techniques that have been considered for optically transparent system implementation. We begin by discussing TDMA systems implemented using either bits or blocks, and show some implementations with optically transparent devices. We then discuss an implementation of TDMA based on code-division multiple access (CDMA), describe some hybrid combinations of TDMA and space-division switching, and conc1ude with a discussion of packet switching using optically transparent devices.
3.5.1. Bit- versus Block-Multiplexing
Bit-multiplexing is a method of multiple access in which the users each put one bit into the channel until all users have sent a bit; this series of bits constitutes a frame. Subsequent frames also contain one bit per user. If there are N users each sending data at a rate of r bits per second, then the channel must have a data rate of Nr bits per second and a frequency bandwidth inversely proportional to the bit time. This is illustrated for N = 4 in Figure 3.26, where it is assumed that all user data streams are bit-synchronized.
Bit-multiplexing has often been chosen for transmission systems since it only requires the storage of one bit of information for each user at any time. Most bit-multiplexed transmission systems also add pulse-stuffing and
Optically Transparent Systems
Unmuxed User Bit
Time
User #1 ----1f---+--+------+--+---!---+--
User#2 ----1~--+--~-----+--+---!---+--
User #4 -----1f----+---
Bit-Multiplexed
B1ock-Multiplexed
Block j
Figure 3.26. Time-division multiple access for both bit and block-multiplexing.
115
Muxed User Bit
Time
other special control bits to the data stream to adjust for frequency differences and to provide some communication about the integrity of the system. In the switching environment, bit-multiplexing requires the capability to reconfigure the switching fabric in a time shorter than a single bit duration. For nonreturn-to-zero (NRZ) formats, the reconfiguration must be significantly shorter than a single bit duration, while return-to-zero (RZ) formats may allow one-half of the bit time for reconfiguration.
In block-multiplexing, on the other hand, the system stores several bits (calIed a block) of information from each user and then sends a block from each user during each frame (Figure 3.26). An example ofblock-multiplexing is the synchronous optical network (SONET) format which uses 8-bit blocks ca lied octets.(J2) When used in a switching environment, this multiple access method requires the switching fabric to reconfigure only at block boundaries. By allowing a small amount of guard time between adjacent blocks, the requirements on the reconfiguration time of the switching fabric can be relaxed. This can be attractive for switching systems, such as the guidedwave systems, that may have reconfiguration times that are lünger than a bit time.m . 34)
116 Chapter 3
3.5.2. Bit- and Block-Switching Using Optically Transparent Devices
Perhaps the simplest example ofTDMA switching is bit-switching.(35,36) In Figure 3.27, bit-synchronized information is sampled by the multi
plexor. In this ca se there are four inputs, forcing the bit duration of the sampled data to be one-fourth the input bit duration. Through the controlling electronics, the demultiplexor directs each of the sampled bits to the appropriate destination. These sampled outputs must then go through a device that can stretch the sampled information to an entire bit duration. An example of this device could be a bistable laser diode. (37)
An example of TDMA block-switching is the sharing of a linear bus. An example of this is the case where all users have both read and write access to the same bus. Depending on the control scheme, a user can write information onto the bus. The receiving user, once it knows when to read the bus, can receive the information. The control for bus structures can be either centralized using preassigned time-slots, or distributed using a packet environment where the users continually monitor the bus for information directed to them.
Another example of TDMA switching is the time-slot interchanger (TSI) illustrated in Figure 3.28. In panel a the four input signals are timemultiplexed onto a single space channel. User A is put on the bus first, with user D being last. The TSI interchanges these time-slots of information in time. For this example, user A's time-slot has been moved into time-slot 12 .
Since the TDMA demultiplexor will direct time-slot 12 to user C, a connection has been made between user A and user C. Also, notice the connections between user Band user D, user C and user B, and finally user D and user A.
In Figure 3.28 the TSI preserves frame integrity, but in general a TSI may or may not preserve frame integrity. For example, if user A needs only to move from time-slot 10 to time-slot t2, it need only be delayed two timeslots, but it remains in the same frame. User C, on the other hand, must
Figure 3.27. A time-division bit switch.
Optically Transparent Systems 117
Time-M ulliplexed
rDEMiJXt=~-1L~~g:~_-:::--~=f---' Output MUX/---
Ii n 12 11 !2l O .gII '" 0 .~.
Figure 3.28. TDMA switching using block-multiplexed signal formats, illustrated using (a) conceptual time-slol interchanger and (b) an example of a photonie implementation of a timeslot interchanger.
move to the following frame since it must shift from time-slot t2 to time-slot t l and it cannot shift forward in time. Therefore, the bits from user A and user C that were in the same frame at the input of a TSI will be in a different frame at the output of the TSI-frame integrity is not maintained. Although requiring frame integrity to be maintained requires more delay (user A must be delayed six time-slots to maintain frame integrity), it keeps different users bit-synchronized and facilitates aggregating of connections and coordinating connections that may be parts of a multiconnection call.
Panel b of Figure 3.28 illustrates a proposed photo nie implementation of the TSI. (38) The input time-slots of the TSI are directed to fiber-delay lines where they can recirculate until needed at the output. The fiber-delay Iines must create a time delay equal to the duration of a time-slot. For example, the bit at input time-slot to will need to pass through the fiber-delay line n + 3 times, while the bit at input time-slot tn will pass through the fiber loop only once.
Regardless of the type of multiplexing used, whether bit or block, there will still be the need to synchronize the incoming data to bit and, in most cases, frame boundaries.(39) This is illustrated in Figure 3.29. In panel a, block-multiplexed inputs pass through the input regenerators be fore reaching the photonie switch. Since each of the inputs passes through a different amount of fiber en route to the switch, and since fiber has a phase delay
118
Regenerator
Regenerator
Regenerator
Regenerator
D .. Guard Band
•• ~O ·· Data S\~ilch t ime (b)
i hll5e Discontmuities
( H~ghly Probable)
S~itch time
Chapter 3
Figure 3.29. (a) Unsynchronized photonie switching system; (b) synchronization through the use of an elastic store.
associated with temperature of 42 psjkm_oC,(40) each of the input blocks could arrive at a different point in time and the relative difference between arrival times can change dynamically with the temperature of the respective fiber routes.
Regardless of how fast the photonic switch can reconfigure itself, there will still be bit-phase discontinuities in the switched output channels. For example, if there is no bit-phase alignment of the channeIs entering the space switch, after switch reconfiguration there will not be a constant phase relationship between adjacent bits on a given output channel. Thus, the bits on a given output channel will not have the same phase as the bits that preceded them in time. These phase discontinuities could force the regenerators downstream to begin their resynchronization process, wh ich could prevent any information from passing through the network for hundreds of nanoseconds. This is unacceptable! To prevent this problem, e1astic stores could be used to line up both the bit and frame boundaries as illustrated in panel b of Figure 3.29.
A photonie elastic store can be implemented by connecting variable lengths of optical fiber with directional couplers as shown in Figure 3.30.(4), 42)
Optically Transparent Systems 119
2 m·2
Output Fiber Input Fiber ••• ----+<=~
~ Figure 3.30. An example of a photonie elastic store.(42)
For this system, when the directional coupler is put in the bar state the incoming light will not pass through the next fiber loop. Alternatively, if the coupler is put in the cross state the entering light will be forced to travel through the upcoming fiber loop. Each of these loops can be weighted to be integer multiples of minimum allowed bit error for the bit alignment section, or integer multiples of the bit duration for the frame alignment component of the elastic store. The delay required to line up both the bit and frame boundaries can be calculated by electronically monitoring the input data stream .
3.5.3. CDMA Switchiug
Another time-division method of sharing available bandwidth, especially in optical fiber, is to represent each user's bits by oue of a set of orthogonal or pseudo-orthogonal codes.(43 45)
In panel a of Figure 3.31, different code sequences are used to represent the bits from different users. When no bit is present, there will be no information present on the user's input channel. In panel b, a conceptual implementation of code-division multiplexing is illustrated. Assuming bitsynchronized inputs, the code-division multiplexing scheme begins by generating a short pulse for every bit entering the system. In Figure 3.31 this operation is labeled as the pulse generator. This pulse is then split among k fiber-delay Iines. The code sequence representing a given input channel is then composed of a unique collection of smaller pulses (chips) of different delays. The code sequences from each of the encoders are then combined in a single space channel. Since all other users perform a similar function on their bits, this CDMA channel contains the superposition of all the different code sequences generated by the encoders. The CDMA decoders, like the encoders, begin by splitting the optical energy among a group of fiber-delay Iines. The decoder for user j has to undo the code sequence generated by its corresponding encoder. The fiber delay lines in the decoder are set at the appropriate lengths to combine all the individual pulses of a code sequence into a single pulse at the end of a normal bit duration. Since the bit-codes are either orthogonal or pseudo-orthogonal, a simple thresholding decision
120
User #1 _~iiJJiD~~===:::;-_lL.IIOOL..JII...-'--_~mo~~_ User #2~1 I U mh I IlUlI iiTiiJITL-User #3 ~lllIJIlOliULLL1.L..1 _ _ _
ser#4 UiLJm~ ____________ __ (a)
CDM Encoders CDM Decoders
Chapter 3
Figure 3.31. Example of code-division multiplexing where (a) illustrates the representation of users' bits and (b) is a simple code-division multiplexing implementation.
determines whether a bit is present or not. Finally, the output ofthe decoder, assuming a bit is present, has to be integrated or stretched to an appropriate bit duration.
An example of a switching system based on CDMA is shown in Figure 3.32. The difference between the code-division multiplexor shown in Figure 3.31 and the CDMA switch in Figure 3.32 is the tunable decoders. For a switching system, each encoder is fixed for a particular code sequence while the decoders must be able to tune to any input code sequence. This implies that each decoder must contain the inverse of all delay loops present in the encoders. Another implementation could have used variable encoders and fixed decoders. The star coupler used in Figure 3.32 could also be used in the system in Figure 3.31 since star couplers distribute the signals from each input channel to all the output channels. (46)
This CDMA switch allows each output decoder to access any of the input channels, and to provide a strictly nonblocking switch.
The strength of this CDMA switching system is that the high-speed portion of the system control is both distributed and photonic. This distributed control is the result of the code sequence being an effective address
Optically Transparent Systems
CDMA Encoders
• • •
STAR COUPLER
Tunable CDMA Decoders
• • •
Figure 3.32. A CDMA system with tunable decoders.
121
read by the designated decoder. The role of the controlling electronics is to determine which fiber-delay lines are to be included for a given decoder. The weakness of these CDMA switching systems is that the number of chips per bit increases as the dimension of the system grows and necessitates very narrow pulses for high-speed switches of large dimension.
3.5.4. Combined Time- and Space-Division Switching
The space-division switches of Section 3.3 and the TDMA switches of this section can be combined in hybrid schemes to increase the overall capacity of the system. For example, if a 1000 x 1000 space-division switch were able to switch 128 time-slots per frame (1 frame = 125 j1.s), then a switching fabric with a dimensionality of 128,000 x 128,000 could be made.
There are many ways of combining these two switching dimensions, including time-space (TS), space- time (ST), time- space- time (TST), space--time- space (STS) . Figure 3.33 is an example of a TST switching fabric. In Figure 3.33, the path for a time-slot is shown from input to output. Note that for a TST switching fabric the input first sees a TSI wh ich is the initial "T" of TST. The signal then passes through aspace switch (the "S" part), and then finally the information passes through another TSI, which is the final "T."
An example of a 512 x 512 TST switch is shown in Figure 3.34, where the input lines are partitioned into sections of 32 lines which are timemultiplexed onto a single space channel. Thus, each channel consists of 32
122 Chapter 3
TSI rn rnm
TSI rnaJC)rn
TSI aJllI
~pace [!I [3] [1][l] witch [3][JI[)]
TSI TSI
ß][])[]][!]
D 0 0 0·· TimeSlots
Figure 3.33. An examp1e of a timespace time switch.
time-slots. If the bit-rate of the input signals is 150 Mb/s, then the timemultiplexed information stream will require a bit-rate> 4.8 Obis (~200 psibit). This TDMA signal then enters the TSI where the 32 timeslots can be interchanged. From there the information enters the spacedivision switch (because both time and space are used, the size of the space switch can be smalI). The output of the space switch is directed to the output TSI, the output of wh ich is then demultiplexed to the output channels. The
512 INP TS
32 x 32 TSI
32 x 32 TSI
pace Switch
Cenlralized Control
Figure 3.34. 512 x 512 time-space-time switch.
32 x 32 TSI
32x 32 TSI
512 OUTPUTS
Optically Transparent Systems 123
difficulty with TST configurations is the timing requirements imposed on the centralized contro\. To avoid any phase discontinuities on the output channels from the space switch, there needs to be bit alignment of the TDMA information stream entering the 16 x 16 switch. Assuming a 5 Obis bitrate, each bit has a pulse duration of 200 ps. Thus, to prevent phase discontinuities on the output channels, all the input bits should be bit-aligned to within 10 ps of each other. This timing burden will be placed on the initial TSI multiplexor or else an elastic store will have to be placed on the input to the space switch (this assurnes that the controlling electronics can recognize variations of ;:;::;10 ps). To illustrate the critical packaging problem, if the length offiber from two TSIs differs by 1 cm (assuming an index ofrefraction of 1.5 in the fiber), there will be a 50-ps difference in the bit arrival times at the space switch. In addition to the bit and frame alignment required by the space switch, each TSI will require alignment of bit and frame boundaries to prevent phase discontinuities on its output channe\.
The strength of multidimensional switching structures, such as the TST switch in Figure 3.34, is the minimal amount of hardware required to build them. An example of a pure space-division switch, a rearrangeably non blocking interconnection network based on a Benes architecture, is shown in Figure 3.35. The basic building block is a 2 x 2 switch wh ich could be a LiNb03 switch or an optoelectronic integrated circuit structure with waveguide interconnections both entering and leaving the substrate. This space switch requires ;:;::;9000 waveguide interconnections and ;:;::;4300 2 x 2 switches. The TST switch of Figure 3.34 requires ;:;::;2000 waveguide interconnections, 32 multiplexors (demultiplexors), one 16 x 16 space-division switch, and = 1000 directional couplers for the TSIs. Thus, the advantage of minimized hardware comes at the cost of increased timing complexity.
21og1 (N) - I tages
512 Input 512 Outputs
Figure 3.35. 512 x 512 rearrangeab1y nonblocking space-division switch.
124 Chapter 3
Data Data ~ OPTICAL NETWORK
ELECTRICAL CO TROL NETWORK
Figure 3.36. Photonic packet switching network with distributed electronic control.
3.5.5. Packet Switching
Packets are another method of allocating the available bandwidth of a channel. For this approach, the bit-rate of the information passing through the channe1 is set at its maximum possible value. The information from the users is collected and stored in sm all amounts, which can be either fixed or variable lengths. When the channel is available, the data are injected into the channe1 with a special header directing the path to be followed by the data. The header normally provides the address information necessary for the transmitted data to get to their destination. Some advantages of packet systems are that their control structure is distributed and they can more easily accommodate varying data rate requirements.
Since a directional coupler cannot react to the presence of light traversing it, directional coupler switches cannot direct1y read headers and route packets based on addresses in the data stream. A packet-switching system using directional couplers can, however, be built by providing an electronic overlay network (see Figure 3.36). Optical splitters in front of the photonic network direct a small portion of the light to the e1ectronic overlay network which reads the header, determines the correct path, and sets the voltages on the directional couplers to direct the light accordingly. Since the strength of optically transparent systems is the high data rates they can support, it is unlikely that the e1ectronics will be able to process the header before the data bits reach the photonic network. There are several ways to allow for the necessary processing time: (I) send the incoming signal through an appropriate length of fiber to delay its entry into the photonic network, (2) send the he ader in advance of the data, or (3) skew the headers in the data stream such that the he ader for a packet enters the network just be fore the data of the preceding packet.
3.6. Spectral-Division Multiple Access Networks
Having discussed systems using space and time as switching dimensions, we turn now to spectral-division multiple access switching which we will
Optically Transparent Systems 125
group into three broad categories and give examples of each. First we provide a brief review of electrical FDMA systems. Then we discuss subcarrier multiplexing where the optical carrier has subcarriers, usually at radio frequencies (rf), that are modulated by the information signal. In the next dass of systems the optical carrier is modulated directly and channel spacings are in the kilohertz to gigahertz range; we call these systems optical FDMA systems. WDMA systems are treated next; again the optical carrier is modulated but the channel spacings are on the order of nanometers. Finally we explore an alternative to frequency or wavelength tuning through a multihop technique.
3.6.1. Electrical Frequency-Division Multiple Access
A common encounter with an FDMA system is a heterodyne radio system. In broadcast radio, several sources of audio information are imposed on different carriers. These carriers propagate together in free space and a desired channel is selected by tuning the local radio to one of the carrier frequencies. Instead of broadcasting into free space, the channels could be combined on an electrical conductor as in the coaxial cable that carries multiple channels of cable television to a tuner in the residence. A typical heterodyne or homodyne FDMA system is shown in Figure 3.37, where the s are the signal functions.
3.6.2. Subcarrier Multiple Access Systems
In a typical cable television trunking system, repeaters must be spaced less than a kilometer apart to boost signal strength. The distance between repeaters in a cable television system can be extended if the electrical signal is converted to an optical signal and sent through optical fiber rather than
-------, , SI , demod.~ sj
.. _-----~
• • • cos (2It/e11) cos (21t/./) • • •
-------, , SN , demod. :-- SI
... _----_.
cos (2ltte/l ~ cos (21t/./)
Figure 3.37. Heterodyne or homodyne frequency-division multiple access system.
126
reccive
Power Splitler
cos I (21tlo.' Il
Chapter 3
,..-----,~~~~~ sJ
• • •
Figure 3.38. Subcarrier multiplexed frequency-division multiple access system.
coaxial cable. There is a loss of signal strength in the electrical-to-optical and optical-to-electrical conversions, but in recent years the advantage of optical signal propagation has begun to outweigh the conversion penalty in cable television trunking systems and possibly even feeder systems.
Modulating a laser with an rf, frequency-division multiplexed signal is called subcarrier multiplexing (SCM).(47) The subcarriers are the different rf carriers, each representing a different channel. At the receiver the subcarrier is recovered and is demodulated to recover the information signal. An ex am pie of a subcarrier multiplexing system is shown in Figure 3.38.
The main difference between an optical subcarrier system and an electronic FDMA system is the conversion to light far the transmission. The optical signal is attenuated less in transmission, but care must be taken to minimize the noise that is introduced. Noise comes from three principal sources: (1) amplifier noise from the laser transmitter amplifier and the lownoise amplifier following the detector, (2) laser relative intensity noise (RIN) which is caused by a combination of quantum effects in the laser and by reflections and dispersion, and (3) intermodulation distortion caused by nonlinearities in the laser and receiver. The carrier-to-noise ratio (CNR) is given by the ratio ofthe peak carrier power to the band-limited channel noise power; a target value of CNR for cable television systems is 50-55 dB.(48. 49)
Although several types of modulation can be used in an SCM system, we will consider as an example the simple case of amplitude modulation of the subcarriers. Each of the channels entering the power combiner would have the form
Si cos[(21l'J,Jt] (3.6.1 )
where Si is the ith information signal function and J,'i is the ith carrier frequency. The modulated signals are summed and a dc bias is added to get
Optically Transparent Systems
the modulation current
N
li(t) = Idc + (Ide - Ich) L miSj cos (27r.t:..jt) j~1
127
(3.6.2)
where mj is the modulation depth Ide is the bias current, and ICh is the laser threshold current. This current modulates the laser; the resulting output power JS
ap a2p (I - 1)2 a3p (I - I )3 p( t) = P + -(I - I .) + _. dc + _. dc +
dc al dc al2 2 al3 6 (3.6.3)
where all but the first two terms are a result of nonlinear distortions of the laser modulation.<sO) The received power from the linear term is converted back to current at the photodiode, resulting in
(3.6.4)
where a accounts for the splitting loss and the photodiode conversion loss. The desired signal can be recovered from lo(t) by tuning the output oscillator to the frequency appropriate for homodyne or heterodyne detection.
The second-order and higher terms of Eq. (3.6.3) are unwanted signals resulting from nonlinear modulation of the laser. The (I - I dc )2 term results in a signal with the form
(3.6.5)
which has terms at frequencies!ci ±j;j, I ::::;; i,j::::;; N. The ratio of the power in these second-order terms to the carrier power is called the composite second order (CSO).
The term (I - I dc? contains signals with frequencies!ci ±!cj ±fck, where 1 ::::;; i,j, k ::::;; N. The ratio of the power in these third-order signals to the carrier power is called the composite tripie beat (CTB). The CSO and CTB are usually expressed in decibels referenced to the carrier (dBc).
128 Chapter 3
If we assume carriers are spaced at constant frequency intervals Af, we can see that adjacent carriers.r. and h will generate CSO terms at Af and 2]; + tlf Depending on the number of the subcarriers and whether or not they span an octave, the CSO terms could fall outside the band or in the band but tending away from the center of the band. For ex am pie, the CTB signal 13 + h - ]; = 3tlf + ]; = i'4 falls directly on the next higher carrier. In addition, different combinations ofCTB frequencies can fall on the same carrier, compounding the degradation of the desired signal. The effects of CSO and CTB can be somewhat mitigated by non-uniform carrier spacings, which cause the intermodulation distortion products to fall between carriers.
Just as in electrical FDMA systems, the CNR in an SCM system can be improved by using frequency modulation,(51) frequency-shift keying,(50) or phase-shift keying(52) of the subcarrier frequencies; in these systems frequency jitter in the laser output must be carefully controlled.
In alternative SCM systems, the subcarriers each modulate a laser and the signal combination is done optically; signal distribution could also be done optically, at the expense of deploying aseparate optical detector for each output.
Laser modulation can be accomplished directly through current modulation or externally with the Ti: LiNb03 Mach-Zehnder or directional coupIer modulators discussed in Chapter 2.(53)
3.6.3. Optical Multiple Access Networks
Optical multiple access networks have architectures similar to electrical FDMA systems, but the optical carrier may be in the hundreds of terahertz instead of the megahertz or gigahertz range of the electrical carrier. An optical multiple access network is shown in Figure 3.39. In this network, lasers of different fixed optical frequencies or wavelengths are combined in a star coupler such that every optical channel appears on each fiber leaving the star coupler. The modulation bandwidth, laser linewidth, and filter bandwidth determine the number of channels in the system.
[!r!ec~e~iv~e!l---__ s •
• r.r:eecCie;r.ivVEe~--__ Sj
Figure 3.39. Optical multiple access network with tunable filters.
Optically Transparent Systems 129
Er!ec~e~iv~e~rl---__ s •
• •
Er!ec~e~iv~e~rl----- s/
Figure 3.40. Optical multiple acccss network with tunable lasers.
A receiver on the right side of the star coupler has a tunable filter that exc1udes al1 but one optical channel. The se1ected channel is received, converted to an electrical signal, and decoded to produce the information signal. Alternatively, each receiver could have a fixed filter and each laser could be tunable to any channel (see Figure 3.40). An optical multiple access network with tunable receivers has broadcast capability; an optical multiple access network with only tunable lasers does not unless the fixed receivers can pass more than one channel.
We must be careful to distinguish between optical multiplexing and optical multiple access switching. If neither the laser nor the receiver is tunable, we have only multiplexing; multiple access switching implies that sources can communicate with different destinations at different times, therefore tuning of either the laser or the receiver is imperative.
The star coupler in these optical multiple access networks is usual1y constructed of log2 (N) stages of 2 x 2 couplers interconnected so that any input can reach al1 outputs. An 8 x 8 star coupler architecture using perfect shuffie interconnections is shown in Figure 3.41.
Figure 3.41. An 8 X 8 star coupler using perfeet shuffle interconnections.
130 Chapter 3
The total throughput of an optical multiple access network is limited by the modulation speed of the transmitters and receivers, the power budget of the system, the usable optical bandwidth, and the range and resolution of the filtering devices.
The total throughput limited by the power budget has been analyzed by Henry et al.(54) If the input power at a single channel of the star coupler is PT, then the output power per channel is
(3.6.6)
where ß is a multiplying factor that accounts for the excess loss in each 2 x 2 coupler. The maximum bit-rate is limited by the minimum number of photons per bit, np, that can be detected at the receiver. The received power at the maximum bit-rate is then
(3.6.7)
where B is the maximum bit-rate, h = 6.625 X 10- 34 J . s is Planck's constant, and v is the frequency of the received light. Setting the output power per channe1 equal to the input power on the receiver, we combine Eqs. (3.6.6) and (3.6.7) to arrive at a maximum throughput of
(3.6.8)
This throughput is plotted against the number of inputs, outputs in Figure 3.42 where we have assumed np = 100 photons/bit, a wavelength of 1.55 pm, and ß = 0.955 (which corresponds to an excess loss of -0.2 dB per 2 x 2 coupler). The input power is assumed to be I mW and a 9-dB total loss is assumed for connectors, filters and devices, and margins. The slope of the dotted line in Figure 3.42 results from the excess loss in the couplers. Power-budget limitations may be mitigated in larger systems by the addition of optical amplifiers between stages of large star couplers, but each amplification adds noise that decreases the signal-to-noise ratio.
Brackett compared these theoretical data with direct detection and coherent detection experiments reported throughout the 1980s. (55) The other two plots in Figure 3.42 are taken from the power-budget limit plotted from several of these experiments. The dashed lines represent bit-rates that are and will be used in commercial lightwave transmission systems.
The total throughput is also limited by the ability to access the available optical spectrum. In theory, the available optical bandwidth of the fiber between 1.2 and 1.6 pm is in the tens of terahertz, but the tuning range and
Optically Transparent Systems 131
Tolal Throughput
B· N
( Gb/s)
10,000 ,....-----r---....------r---,----:--r.----, ....... ... .. .. ........... ....... ... ... .... .... ..... .. ....• ..1 . TheoreticaJ @ 100 photons/bit / .... / ..... ....... .. .
i~:~:~~"u.n// "P7~ 3000
1000
300
100 ./Direct Detection
5 Gbl
.//2.5 Gb! ...-//" Em,l';'"
30 .' .. / 600 Mb/~/~50 Mb/s . ~ "
"" , . 10 L-~~_~~ ___ ~ __ ~ ____ -L __ ~
10 30 100 300 1000 3000 10,000
Number of Input , Outputs N
Figure 3.42. Power budget limits of optical multiple access networks with star couplers for theoretical . direct detection. and coherent receivers. Assuming 100 photons/ bit, loss per coupler of 0.2 dB, 1.55 pm wavelength, I mW input power per channel, and 9 dB opticalloss total for connectors, filters , and margins.
resolution of practical lasers and filters substantially reduces the accessible bandwidth. Letj~ = pB be the channel spacing in frequency. The corresponding channel spacings in wavelength can be caIculated from
df - c
d)" )..2 (3.6.9)
where j~ :::::; df, ).. is the wavelength, and c is the speed of light in a vacuum. The total wavelength range required for a given bandwidth is then
)..2 i1A :::::; N . d)" :::::; BN p -
c (3.6.10)
Ifwe assurne p = 6, as caIculated by Kaminow for a single Fabry-Perot filter (a summary appears in the next section), and a wavelength range around 1.55 11m, then the total wavelength range required for a total throughput of 1000 Gb/ s is about 48 nm. This would not limit the direct detection systems plotted in Figure 3.42, but more optical bandwidth or
132 Chapter 3
Incident Light Intra-cavity light
Transmilled Light .. .. Reflected Light - -
Mirror Mirror
Figure 3.43. A simple optical cavity.
closer channel spacings are required for the coherent systems to be limited by power budget, rather than by wavelength range.
The characteristics of tunable lasers and tunable filters are key to accessing the available optical bandwidth. Extensive research has produced a variety of tuning and filtering mechanisms. A formal treatment of tuning approaches is too involved to include here; we will therefore limit our discussion to an informal qualitative description of a few tunable devices.
The optical cavity is an integral part of any laser and provides the feedback that determines the frequency properties of the laser. (56) The simplest ca se of an optical cavity is two parallel mirrors (see Figure 3.43).
An optical wave propagating in the cavity refl.ects from mirror to mirror and experiences a phase change at each refl.ectioll. The wavelengths for which the cavity length is an integral number of half-wavelengths, n . .1../2, where n is an integer, will resonate in the cavity and emit a strong output beam. The length ofthe cavity, then, determines the wavelengths that will resonate. Since several wavelengths will typically resonate in a semiconductor laser cavity, gratings can be included either in the cavity (distributed feedback lasers) or as refl.ectors outside the pumped region (distributed Bragg refl.ector) to select a single resonant frequency (see Figure 3.44).(57)
Pumped OFB Region
OFB Laser
Passive Waveguide
Active Region
Distributed Reflector
OBR Laser
Figure 3.44. Schematic representation of a distributed feedback laser and a distributed Bragg reflection laser.
Optically Transparent Systems 133
Table 3.1. Tunable Lasers
Tuning mechanism Tuning range Tuning speed Ref.
DFB, DBR current injection 2-15 nm ns 58 Thermal ~l nm ms 59 External cavity, mechanical 40 nm ms 60 External cavity, electro-optic 7nm ns 61 External cavity, acousto-optic ~80nm iJs 62
Tuning is achieved by changing the optical length of the cavity either physically by changing the distance between the mirrors or optically by changing the index of refraction within the cavity. The cavity physical distance can be changed by thermal effects, by piezoelectric effects, or by manually moving the mirrors. The cavity index of refraction can be changed by current injection which increases the concentration of carriers within the cavity. Some tunable laser experiments are listed in Table 3.1, including the tuning mechanism, tuning range, tuning speed, and a reference.
Some tunable filters also use an optical cavity. A tunable optical amplifier (discussed in Chapter 2) uses an optical cavity like that of a laser, but the amplifier is opera ted below the lasing threshold, and provides frequency-selective gain to amplify the frequencies of interest. The fiber Fabry-Perot filter, discussed in the next section, uses optical fiber as the optical cavity. The cavity mirrors are connected to a piezoelectric crystal wh ich can change the distance between the mirrors by applying an electrical signal.
The electro-optic and acousto-optic properties of crystals such as lithium niobate (discussed in Chapter 2) can also be used to construct filters. In these filters, the incoming light is polarized, passed through a wavelengthselective polarization converter, and filtered by another polarizer. The converter changes the polarization of only the desired wavelength to allow it to pass through the output polarization filter. The polarization conversion can be tuned electro-optically (see Figure 3.45) or acousto-optically (see Figure
Figure 3.45. Electro-optic double pass tunable filter.
134 Chapter 3
Figure 3.46. Acousto-optic tunable filter.
3.46). In Figure 3.45 the input polarizer and output polarizer are the same device; the signal gets a second pass through the wavelength-selective polarization converter after reflecting from the mirror. The acousto-optic filter shown in Figure 3.46 uses separate couplers as polarizers. By using multiple rf drive signals, the acousto-optic filter can pass multiple wavelengths. These electro-optic and acousto-optic filters can also be included as the extern al cavity for a tunable laser by using the laser for gain and the extern al cavity to select the desired wavelength(s).
Table 3.2 is a list of tunable filters, and includes a tuning range, resolution, number of channels demonstrated (projected), tuning speed, and a reference for each.
Tunable lasers or tunable filters, and optical power distribution devices like a star coupler are the key components of WDMA systems. We cannot
Table 3.2. Tunable Filters
Tuning NO.of Tuning Filter type range Resolution channels speed Ref.
Optical amplifier 20.6 A 8GHz 32 63 DBR active filter I GHz 64 Fabry-Perot laser diode 188 GHz 5GHz 25 ns* 65 Piezoelectric fiber Fabry-Perot -100 GHz 30 ms* 66 Tandem fiber Fabry-Perot (1000) ms* 66 Single angle-tuned etalon 40-52 nm 0.25-5 nm 16 s* 67 Multiple angle-tuned etalon 2-74 nm 0.025-1.5 nm s* 67 Liquid crystal etalon 60 nm 0.4 nm 68 Electro-optic 16 nm 0.6 nm ns 69 Acousto-optic 400 nm -1 nm /1S 70 Movable reflection grating 350 nm 12-38 nm s* 7\
• Estimated.
Optically Transparent Systems 135
Table 3.3. Some Reported Optical Multiple Access Experiments
Company NA Capacity Channel Ycar (system) (cst. max.) (perA) spacing Type Ref.
1984 AT&T 4 (13) 300 Mb/s 2nm Fiber combiner, 72 tunablc lasers
1985 BTRL 7 280 Mb/s 15nm Broadcast star, 73 tunable receivers
1986 Heinrich 10 (128) 70 Mb/s 60Hz Coherent broadcast 74 Hertz I. star
1987 BCR 16 20b/s 2nm Broadcast star 59 (Lambdanet) interconnect
1987 BCR(FOX) 32 (256) IOb/s 1.5 Ä Broadcast star 75 interconnect
1987 AT&T 3 (30 1000) 45 Mb/s 270 MHz FDM broadcast 66 star
1987 AT&T 3 (_10') 45 Mb/s 300 MHz FDM coherent 76 broadcast star
1988 BCR 16 20b/s 2nm Etalon tuned 78 broadcast star
1988 AT&T 2 (128) 250 Mb/s 1.5 OHz Broadcast star: 79 tunable fiber amp.
1990 NTT 100x I 622 Mb/s 100Hz FDM star: 80 Mach-Zehnder
filters
consider here all of the systems made possible by combinations of lasers, filters, and modulation techniques; a list of some optical multiple access network experiments is shown in Table 3.3. For each system, the number of wavelengths, channel spacing, type of system, and a reference are given.
The rest of this section concentrates on specific examples, each chosen to highlight a different facet of optical multiple access networks. The first example is an analysis and experiment by I. P. Kaminow et al. and is an FDMA, FSK-modulated system with fixed lasers and fiber Fabry-Perot filters.(66) The second system, analyzed and constructed by B. Glance, is also FDMA, FSK-modulated and uses fixed lasers, but the receivers use coherent reception heterodyning to select the desired input.(76.77) The last system, reported by E. Arthurs et al., uses two WDMA networks-one for data, the other for control; current injection is used to tune the semiconductor lasers and filters.(81) This system will be used to highlight control and performance aspects.
3.6.3.1. Optical FDMA FSK Direct Detection Example
Our first example has essentially the architecture shown in Figure 3.39, with narrow-linewidth lasers and fiber Fabry-Perot filters (see Figure 3.47).
136
Tunable Fabry·Perot Filter
Tunable Fabry.Perol Filter
receiver s,
• receiver
Figure 3.47. Optical FDMA system using tunable Fabry-Perot filters.
Chapter 3
An input signal changes the current in the laser, thereby changing the laser frequency. The input signal is a binary bitstream and the laser is FSK modulated. Signal distribution is through a fiber star coupler.
The capacity of this FDMA system depends on the modulation frequency, the laser linewidth, the power budget, and the resolving power ofthe Fabry-Perot filters at the receivers.
The frequency shift required for the FSK modulation is realized by modulating the laser drive current with the digital information waveform. The laser frequency change per unit current change is typically in the range of 100 MHz/ mA to 10 GHz/ mA.
Let fd be the frequency spacing between the frequency representing a logical "0" and a logical "]" (see Figure 3.48). Let!c be the frequency spacing between logical "1" frequencies of adjacent channels.
To select channel I at an output, the Fabry- Perot filter must be tuned to exclude all but the logical "]" frequency of chan ne I 1 ; this narrow filtering acts as both channel selector and frequency discriminator. The output of the Fabry- Perot filter is then an amplitude shift keyed (ASK) signal that can be detected directly by a photodiode. The resolving power of the Fabry- Perot filter can be analyzed by considering its power transmission as a function of the frequency of the incident light on the filter. This formula
power
channel 1 channel2
Figure 3.48. Frequency-division multiplexed FSK-modulated channels.
Optically Transparent Systems 137
is derived in detail in Chapter 4; we will present only a eoarse deseription here and use the resultant equation.
A Fabry-Perot filter is essentially a eavity bounded on two si des by mirrors. Light in eide nt on the Fabry-Perot filter eauses multiple refleetions inside the eavity; these multiple refleetions interfere eonstruetively or destruetively with eaeh other depending on the frequeney and optieallength of the eavity. If we assume that the eavity is lossless, that the eavity length is mueh longer than the wavelength of the ineident light, and that the angle of ineidenee of the light is very smalI, then the power transmission through the Fabry-Perot eavity as a funetion of frequeney is given by
I t
I j [l + Fe sin2 (27rnedf/c)] (3.6.11)
where Fe is the eoeffieient of finesse, ne is the index of refraction in the eavity, d is the eavity length, fis the frequeney of the incident light, and c is the speed of light in a vaeuum.
A plot of this power transfer funetion is shown in Figure 3.49. The eoefficient offinesse is a funetion ofthe refleetance ofthe mirrors. The higher the refleetance, the larger Fe beeomes and the more rapidly the peaks fall off, thereby narrowing the filter bandwidth. The free speetral range (FSR) of the filter is the spacing between adjaeent maxima in the power transfer plot and ean be expressed as
(3.6.12)
The FSR is determined by the cavity length and index of refraction in the eavity; the FSR limits the number of channels that may be plaeed between
" li ... ------ FSR -----.-.1
~~------~--------------~~----~~f
Figure 3.49. Fabry Pemt filter power transfer function.
138 Chapter 3
the peaks in Figure 3.49. In particular, the number of channels is given by
(3.6.13)
where [x] is the largest integer less than or equal to x. Tuning the Fabry~Perot filter is done by changing either the mirror spacing, or the index of refraction in the cavity. Substituting Eq. (3.6.12) into (3.6.11) we have
I t
L 1 + Fe sin2 (1I"f/FSR) (3.6.14)
We can see from Eq. (3.6.14) that when the frequency of the light is an integer multiple of the FSR, lt/ L reaches a maximum and light is transmitted through the cavity. The frequency bandwidth 3 dB down from the peak (or full width at half-maximum) can be derived from Eq. (3.6.14) to be
2FSR . _I ( 1 ) hdB = -1I"- sm ftc
If we assume ft » 1, then
2FSR hdB~--
1I"ft
(3.6.15)
(3.6.16)
We design the filter such thathdB = B where B is the bandwidth of the information signal. The ratio of the separation of adjacent maxima to the 3 dB down bandwidth of a peak is called the finesse and is given by
FSR 7r'fiic F=-=-
hdB 2 (3.6.17)
Bit errors can occur in a channel if power from the channellogical "0" and/or power from adjacent channels leak through the filter to the detector. In practice, adjacent channel cross talk is dominated by the adjacent channel logical "0." To calculate an accurate power cross talk we must first obtain an analytical expression for the frequency spectrum of a modulated "0,"
Optically Transparent Systems 139
Fabry-Perot filter speclrurn
~ Td"''''d I,,,, r"q","" 'p"'"
channel2 Crosstalk power
Figure 3.50. Cross talk power of FSK-modulated lasers through a Fabry-Perot filter.
multiply the two adjacent logical "0" spectra by the Fabry-Perot filter power transfer spectrum [Eq. (3.6.14)] and integrate (see Figure 3.50).
Unfortunately, the analytical form for the FSK-modulated laser is not explicitly known. An estimate of the cross talk power can be obtained by summing the contribution of unmodulated carriers at the logical "0" frequencies on either side of the filter plus the contribution calculated by integrating the product of the filter cquation and an equation that has the same f -4 characteristics as the tail of the modulated spectra. The calculations for this estimate are detailed in Ref. 66 and yield several interesting results. First it can be shown that the optimal channel frequency spacing is!c = 2icJ; or the frequency of a channel logical "1" should have the same frequency spacing between the same channel "0" frequency and the adjacent channel "0" frequency. If we let Px represent the power from cross talk and P the power difference between a logical "1" and zero power, then the power difference in the presence of cross talk is reduced to P - Px and the optical power penalty from the cross talk is
Px = -10 log (I _ :x) (3.6.18)
If we consider Px = 0.1 dB to be a negligible power penalty, then it turns out that jd/ B ~ 3.2 and therefore the channel spacing is limited to
.fc = 2jd = 6.4B (3.6.19)
Substituting Eq. (3.6.19) into (3.6.13) we have
(3.6.20)
140 Chapter 3
where [X] denotes the largest integer less than or equal to x. Fiber Fabry-Perot filters have been realized with a finesse F = 200,(82) therefore the maximum number of channels supported is N= 31. If multiple Fabry-Perot filters are employed in tandem, the number of channels can increase to N > 1000.
3.6.3.2. Optical FDMA FSK Coherent Detection Example
In this coherent detection example, the transmit lasers are at fixed frequencies and are FSK modulated. The FSK signals from the different sources enter a star coupler; each channel leaving the star coupler has power from each of the inputs to the star coupler, but each channel's power is nominaBy divided by the total number of outputs. A receiver selects a particular channel by coupling the output signal with a laser local oscillator signal that has a frequency elose to the frequency of the channel of interest, and impinging the coupled signals on a photo detector. As in heterodyne radio systems, a sum and difference frequency are generated. The sum frequency is a higher optical frequency and is easily filtered out. The difference frequency is typicaBy in the gigahertz to megahertz range and is filtered out by an electrical filter. The filtered FSK signal then enters a discriminator where the digital information is recovered.
Although this coherent reception uses the same concept as radio heterodyning, there are important differences. For efficient signal recovery, the modulated optical signal and the local oscillator must have the same polarization; their electrical field vectors must have the same orientation.
Let s(t) be the binary information signal used to frequency modulate the optical carrier,
(3.6.21 )
Then the modulated signal is
(3.6.22)
which enters the star coupler where it is combined with the modulated light from aB other inputs. At an output channel of the star coupler the signal has the form
1 N ~ S = IV L E/icOS [(27ffli + 27fSi(t»t]
i~1
(3.6.23)
which mixes with the local laser oscillator So = Eo cos (2"/ot) before being received by the photodiode. The photodiode relates input optical power to
Optically Transparent Systems
o Ji/-I.
local oscillator frequency
selected channel
I. Ji. optical frequencies
intermediate frequencies
141
Figure 3.51. Channel mappings [rom oplical frequencies 10 intermediate frequencies.
output current. If we assurne that EI has the same polarization as Eo, then the input power has the form
(3.6.24)
The s; term eontains a de term and a frequency twice the loeal oseillator frequeney; this s; term is easily filtered out. The S2 term contains sum and differenee frequencies of the modulated source lasers; the sum frequencies are filtered out, the difference frequeneies have the form
IJii -llj I (1 ~ i,j ~ N) (3.6.25)
and appear near the intermediate frequencies as the low-Ievel interference shown in Figure 3.51. The middle term on the right-hand side ofEq. (3.6.24) contains the difference frequencies
(I ~ i ~ N) (3.6.26)
The frequeney speetra be fore mixing and the mapping after mixing are shown in Figure 3.51. Note that the ehannel spaeings at optieal frequeneies must be far enough apart to aeeount for the interleaving effect of the image frequencies at the intermediate frequeneies.
There are eonstraints on the seleetion of the loeal oseillator frequeney. The loeal oseillator frequeney must be tuned dose enough to the desired ehannel so that the differenee in their frequeneies falls within the intermediate frequeney (IF) range, but the loeal oseillator eannot be tuned too dose to the desired frequeney or the resulting IF will interfere with the demodulated signal. To avoid overlapping ofthe desired ehannel with the adjaeent channel
142 Chapter 3
image frequency, the local oscillator frequency must meet the criteria lflj - !o) - (fo - JIi) > B, where j = i + 1 and B is the channel bandwidth.
In the experiment by B. Glance et al.,<76) the bandwidth B was 45 Mb/s and the channel spacing was chosen at 300 MHz; four channels were used for the experiment. The theoretical potential throughput considering only available frequency spectra is 4500 Gb/s; optical power limits and laser modulation bandwidth may limit the potential to less than this amount.
This coherent detection approach has a higher sensitivity than the direct detection approach discussed in the last section, and would therefore allow more channels with the same source output power. The dis advantage of coherent detection is the requirement of a local oscillator and a more sophisticated receiver.
3.6.3.3. Wavelength-Division Multiple Access Network Example
The next example uses two WDMA networks. As with the past two examples, information channels are again represented by different optical frequencies; the concept is similar to the FSK FDMA networks in the previous sections but the optical channel frequency separation is wider and therefore expressed in measurements of wavelength. The wavelength separation of the channels in this network are in the range of 0.05 nm to 1 nm (8.9 GHz to 178 GHz at 1300 nm) depending on the lasers and filters used.
The hybrid packet switching system (HYPASS) shown in Figure 3.52 uses two WDMA networks, one for transport and one for contro!. In the transport network, tunable lasers are used to select a wavelength that corresponds to the filter wavelength of a specific output receiver. In the control network, fixed-wavelength lasers broadcast to all control receivers; each receiver tunes to the desired control channel to check the status ofthe output.
The HYPASS network addresses the connection management protocols, an important topic not discussed in the previous examples. That is, how do the inputs and outputs agree among themselves wh ich inputs are to connect to which outputs at a given time? Although the bandwidth available in this optical multiple access network can be in the terahertz range, the problem of negotiating connections and resolving conflicts is essentially the same problem encountered in any multiple access network.
The HYPASS network manages connections with an input polling and collision detection scheme employed by each output. The network is synchronized and time divided into frames which are furt her divided into time-slots. An incoming packet is buffered at the input and its destination is decoded. The input transport laser tunes to the destination wavelength in anticipation of transmitting the packet. Before sending the packet into the transport network, the input tunes its control receiver to the destination control wavelength to check the status of the output. If the destination can accept the
Optically Transparent Systems
Tunable Filters
Figure 3.52. Diagram of HYPASS WDMA system.
143
packet, it broadcasts its availability to the inputs over the control network using an input tree polling protocol discussed later. Once the input receives the information that the output is ready, the packet is sent into the transport star coupler which broadcasts the packet to all output filters. Only the destination output filter will pass the packet. If the packet is transferred successfully, the output sends an acknowledgment through the control network to the input source.
The total throughput of the network is influenced by the laser and filter tuning speeds, the nature ofthe trafik, the connection management protocol, and the technology used in the hardware implementation.
Dedicated connections can be established in the HYPASS network by reserving time-slots for specific input-to-output combinations. Reserved connections are usually required by services with strict real-time delay constraints. Random or bursty trafik can compete for time-slots that are not preassigned.
For example, let:
F== the number of time-slots in a frame N == the number of inputs and the number of outputs R == the data rate of each input channel in bits per second ri,i == the data rate of a connection from input i to output j
144 Chapter 3
A preassigned connection from input i to output j at a data rate of rjJ
would be assigned njJ = F(rd R) time-slots per frame. For the preassigned connections, this synchronous optical multiple access network operates like the time-multiplexed switches discussed in the section on time-division switching.
The unassigned time-slots for each output are filled by input packets that contend for access to a specific output. In a single time-slot, if more than one input has a packet destined for the same output, some protocol must resolve which packet goes first. In one scenario, an output could poIl each input seriaIly through the control network, aIlowing each a dedicated access to the time-slot. The maximum number of polIs would just be N, the number of input ports. This would seem to be the best approach if aIl inputs always had a packet destined for the same output.
At the other extreme, aIl inputs could be polled simultaneously. If no input or one input responds, then the poIling starts over. If more than one input responds, then the packets coIlide and the output notifies the contending inputs of the failure. No new inputs are aIlowed to contend until the existing contention is resolved. After a collision, inputs could wait a random number of time-slots before retransmission, or use a more efficient protocol such as the tree poIling protocol.
In the tree protocol, each point in the tree is labeled with an ordered pair (I, m) where I represents the level in the tree and has the range 0:( 1:( log2 (N) and m represents the branches at level land has the range o :( m :( 2' - I. The inputs of the network are logically represented by the leaves of the tree (see Figure 3.53).
A contention resolution interval (CRI) starts when an idle output wants to notify the inputs that it is accepting packets. New packets can contend for the output only at the beginning of a CRI. The algorithm traverses the input tree as folIo ws :
0,0
/~ 1,0 1,1
~ ~ 2,0
A 2,1
A 22 2,3
A 3,0 3,1 3,2 3,3 3,4 3,5 3,6 3,7
Figure 3.53. Binary tree representation of HYPASS network inputs.
Optically Transparent Systems 145
I. Poil allleaves (inputs) of root (I, m). If no packet received or one good packet received, then stop traversing the tree. Else if a collision is sensed
2. Traverse the left subtree-the leaves of (/ + 1, 2m), then the right subtree-the leaves of (l + I, 2m + 1).
For example, if inputs 1 and 6 of Figure 3.53 have packets to send to output 5, then the tree protocol employed by output 5 would be:
I. Poil all leaves of 0,0; that is, poil all inputs. 2. Detect a collision (from inputs land 6 sending simultaneously). 3. Poil allleaves of 1,0 (inputs 0-3). 4. Receive packet from input 1 and acknowledge. 5. Poil allleaves of 1,1 (inputs 4-7). 6. Receive packet from input 6 and acknowledge. 7. Stop tree traversal.
This tree polling algorithm is much more efficient than the simple serial polling scheme, even when the network is under a balanced heavy load.
If we let f == the probability that an input port has a packet and let r characterize the load balance, that is, r = I for uniform loads and r = 2 when there are twice as many packets at different input ports destined for the same output port, then the probability that an input port has a packet for a given output port is just
f p=~r
N (3.6.27)
In Figure 3.54 we see that the number of probes in a CRI depends somewhat on the uniformity of the loading but only weakly on the total number of inputs.
An improvement on the tree polling algorithm uses the history of loading for the output. This technique, called the dynamic tree polling protocol,(83) allows the tree polling to start at any level in the tree. The starting level is determined by the length of the last CRI. Essentially, the more heavily the output is loaded, the doser to the leaves the polling begins.
3.6.4. Multihop Lightwave Networks
One can avoid the need for tunable filters or tunable lasers and still exploit many wavelengths on a fiber by using network nodes to relay information packets.(H4) Each node or network interface unit (NIU) is assigned
146
5
4 -
umber 3
I p = 2
I of Probes P = N
2 2
p =
16 32
Chapter 3
In pul
Figure 3.54. Number of probes in a contention resolution interval for different numbers of inputs and different loading factors.
a fixed set of transmit wavelengths and a fixed set of receive wavelengths. In Figure 3.55, each NIU has two receive wavelengths and two transmit wavelengths. All nodes transmit to and receive from the same fiber bus. If NIU 1 wants to communicate with NIU 5, it just sends out a packet on wavelength 11,], but if NIU 1 wants to communicate with NIU 8, it must first send the packet on wavelength 11,1 to NIU 5 with instructions to forward the packet to NIU 2. NIU 5 relays the packet out on 11,10 to NIU 2 with instructions to forward the packet to NIU 8. NIU 2 then selects wavelength 11,4 to send the packet to NIU 8. Using this multihop approach, any NIU can connect to any other in at most three hops, provided there is no contention for resources.
The interconnectivity between NIUs is determined by the choice of wavelength. If we map this wavelength interconnection into an equivalent
Figure 3.55. Eight-node multihop network.
Optically Transparent Systems 147
space connection, we see that the interconnection pattern of Figure 3.55 becomes the perfect shuffie interconnection shown in Figure 3.56, where each interconnection li ne represents a different wavelength.
Note that NIUs I through 4 appear in the third and first columns; this is meant to show that a connection may loop from the first column to the second, then back to the first in a cylindrical interconnection pattern. In the previous interconnection example ofNIU I to NIU 8, it is easier to see from Figure 3.56 that NIU 1 could connect to NIU 8 through NIU 6 and NIU 4 as weil as through NIU 5 and NIU 2.
The perfect shuffie is certainly not the only possible interconnection pattern, but its uniformity lends itself weil to more general further analysis. To characterize a perfect shuffie multihop network we must determine how the NJUs will be divided into columns and how many wavelengths per NIU will be used. Let k be the number of columns and p the number of wavelengths per NJU. In the network in Figure 3.56, k = 2 and p = 2. The maximum number ofhops required between NIUs is 2k - I, and the total number of NJUs is given by
(3.6.28)
The expected number of hops between NIUs chosen at random can be computed from
2k - l
E[number of hops] = I hp(h) (3.6.29) h ~ l
Figure 3.56. Spatial equivalent of wavelength connectivity in Figure 3.55.
148
where
p(h) = number of nodes reached in h hops n - 1
Chapter 3
(3.6.30)
or the probability that for two NIUs chosen at random, the destination NIU is h hops from the source NIU.
The number of destination NIUs reached in h hops from any source NIU is given by
l h = I, 2, ... , k - 1 k h-k
P -p h = k, k + I, ... , 2k - 1 (3.6.31 )
Using the expressions in (3.6.31) to find the number of nodes in (3.6.30) and plugging into (3.6.29) we arrive at the expected number of hops
k-I hl 2k- 1 h(pk_ ph-k) E[ number of hops] = L --+ L
h~ln-1 h~k n-I (3.6.32)
Using (3.6.28) and reducing (3.6.32) to closed form we have
[ b fh ] kpk(p-I)(3k-I)-2k(pk_l) E num er 0 ops =
2(p - l)(kl- I) (3.6.33)
The throughput per NIU, normalized to the channel transmission rate, isjustpj E[number ofhops]. In Figure 3.57 we plot the throughput per NIU, assuming 1 Gbjs channel rates and various values of p and n; the value of k is derived from (3.6.28). A line indicating the per-NIU throughput of a single-channel bus is given for comparison. All plots assurne raw data transmission with no overhead.
3.6.5. Combined WDMA and Subcarrier Multiplexed Systems
In addition to several sub carriers being multiplexed onto one lightwave carrier, severallightwave carriers may be combined to increase the overall system capacity. Since the subcarriers are modulated onto the lightwave carrier, care must be taken to choose wavelengths that are separated far enough apart that the subcarriers at one wavelength do not interfere with the subcarriers of another wavelength.
Optically Transparent Systems
Throughput perNIU (Mb/s)
10,000
1000
100
10
0.1
149
Singlc·channel bu
10 100 1000 10,000
umber of JUs
Figurc 3.57. Multihop throughput per NIU for several values of wavelengths per NIU.
3.6.6. Wavelength Routing
In addition to using wavelengths in optical multiple access systems, wavelength-division switching can be used in an analogy to space-division switching. In these systems, the wavelengths chosen through the switch determine a different physical path through the network. Figure 3.58 shows one example of a network using wavelength switches and fixed WDM devices to construct networks that are topologically equivalent to a rearrangeable elos network. (63.85) The wavelength switches exchange one wavelength for another by extracting each wavelength with a tunable filter, converting each extracted wavelength to an electrical signal, and using the e1ectrical signal to modulate a laser with a narrow linewidth at the new wavelength.
3.7. Problems
1. Given that an N x N Benes network is still rearrangeably nonblocking if one coupler is removed from either the input or the output stage,
ISO
• • • 1/
(a)
• • • n
(b)
Chapter 3
ON
0.
• • •
n ON
Figure 3.58. Wavelength routing network (a) and space-division equivalent (b).
prove that the total number of couplers required for an N x N Benes network so reduced is
COUPLERSBenes = Nlog2 (N) - N + 1.
2. Derive an expression for the number of crosspoints in an N x N symmetric, strictly nonblocking, five-stage Clos network. Assume that the number of inputs per switch in the first two stages and the number of outputs per switch in the last two stages is n = N 1/3.
3. Compute the signal-to-cross talk ratio (SXR) in a 16 x 16 guided-wave crossbar network where cross talk per coupler is -25 dB and loss per coupler is -0.3 dB.
4. Derive worst-case loss and SXR express ions for an N x N shuffieexchange network with 3 10g2 (N) - 4 stages. Assume lossless waveguide crossovers.
5. The two center stages of router/selector networks form into natural groupings of four couplers (see Figure 3.19). If each of these fourcoupler groupings were coalesced into a single 2 x 2 coupler as shown
Optically Transparent Systems 151
Figure 3.P.I. Modified 4 X 4 router/selector.
in Figure 3.P.I, wh at would then be the expression for the SXR in an N x N modified router / selector? Assurne lossless couplers.
6. You have been asked to design a guided-wave optical switch for the 20 fiber-optic lines now passing through your facility. Any idle incoming fiber must be able to connect to any idle outgoing fiber at any time. The switch may not rearrange existing connections to establish new connections. The total power budget available the input fiber connector to the output fiber connector is 20 dB. The worst-case SXR must be at least 25 dB. Assurne that the fiber- switch interface loss is -2 dB, that the loss per coupler is -0.5 dB, and that the cross talk per coupler is - 30 dB. Which of the waveguide switch architectures discussed in Secti on 3.2 would meet the requirements of this application? Wh at would be the worst-case loss and SXR?
7. The set of codes Co = (100100100), CI = (100010001), C2 = (100001010) are orthogonal codes derived from prime sequences obtained from a Galois field.(43) These orthogonal codes might be used for a three-node CDMA system. What is the maximum number of Is that result when any time-shifted versions of any two codes are logically ANDed together? Wh at is the maximum number of Is that result when any code is ANDed with itself?
8. In the TSI shown in Figure 3.P.2, ass urne that frame integrity is maintained and indicate how many time-slots each user was delayed in the TSI (e.g., B = 14 time-slot delays).
9. Assuming that frame integrity is maintained, wh at is the maximum delay in time-slots for any time-slot permutation in a system of N time-slots?
152 Chapter 3
Figure 3.P.2. Time-slot interchanger of eight time-slots.
10. The individual data rate requirements for a transmission system are as follows:
User 1:10 Mb/s User 2:20 Mb/ s User 3 :50 Mb/ s User 4:30 Mb/s
a. What is the total data rate requirement of the transmission system?
b. Wh at is the minimum number of bits per frame?
c. What is the frame rate?
11. In a heterodyne subcarrier multiplexing system, four signals are modulated onto four subcarriers that have a center-to-center spacing of 20 MHz, with the lowest frequency subcarrier centered at 90 MHz. The intermediate filter (IF) following each output mixer is centered at 10 MHz.
a . What local oscillator frequencies would be used to recover each of the four signals?
b. At wh at frequencies would composite second-order (CSO) distortions be found?
c. At wh at frequency would we expect to find the most power from CSO distortion?
12. What is the maximum theoretical throughput of a star-coupler-based optical multiple access network with the following parameters? Input power = 0 dBm, loss per 2 x 2 coupler in a star coupler = -0.2 dB, wave1ength A = 1.310 J.l.m, number of photons per bit = 100. Ignore any excess losses due to connectors.
l3. Calculate the free spectral range (FSR) of a fiber Fabry- Perot filter if the cavity index of refraction is 1.5 and the cavity length is 1 cm.
14. Reduce Eq. (3.6.32) to (3.6.33). Recall that
(3.7.1)
Optically Transparent Systems 153
3.8. Solutions to Problems
I. Since the coupler to be omitted can be arbitrarily chosen from either the input stage or the output stage, we can assume without loss of generality that the output stage is consistently chosen for the omission. Since no couplers are omitted from the input side ofthe network, the total number of couplers in the first log2 (N) stages is just (NI2) log2 (N). The number of couplers in the output stages varies by stage from N 14 in stage log2 (N) + I, to NI2 - 1 in stage 210g2 (N) - 1. The total expression for the number of couplers is then
N log,( N) (N N) COUPLERSBenes = -10g2 (N) + I - - -i
2 i~2 2 2 (3.8.1)
which can be rewritten as
N [( log2 N - I) log,N 1 ] COUPLERSBenes = -log2 (N) + N - I i (3.8.2)
2 2 i~2 2
The summation in Eq. (3.8.2) can be expressed in closed form, yielding
N [(IOg2N- I) (I I)] COUPLERSBenes = 2 10g2 (N) + N ---2-- - 2: - 2(1og,N)
(3.8.3)
which can be reduced to
COUPLERSBenes = N log2 N - N + I (3.8.4)
2. The number of couplers in a three-stage Clos network where n = r is C(3) = 3n2(2n - 1). Since a five-stage Cl os network has three-stage Clos networks as center-stage switches, the number of couplers in a five-stage Clos network where n = N I/3 is just
C(5) = 2n\2n - 1) + (2n - 1)C(3) = 2n\2n - I) + 3n2(2n -1)2 (3.8.5)
which reduces to
C(5) = 16n4 - 14n3 + 3n2 = 16N4 / 3 - 14N + 3N2/3 (3.8.6)
154 Chapter 3
3. The loss per coupler is -0.3 dB and the cross talk per coupler is -25 dB. Plugging these values into Eq. (3.3.6) yields
[1 - 1O(~15)(~O.3)/IO]
SXR = 25 - 10 log IO~03/1O _ 1 = 10.65 (3.8.7)
4. Ifwe ignore loss from crossovers, the expression for the shuffie-exchange is analogous to the loss expression for the Benes network. The loss will then be the number of couplers in the path times the loss per coupler plus fiber-substrate losses or
LOSSshuffle-exchange = 2LF + (3 log2 N - 4)Lc (3.8.8)
The SXR analysis for the shuffie-exchange network will also parallel that of the Benes network. In a fully loaded network, each coupler will have two active signals traversing it so the number of first-order cross talk terms is just the number of stages in the network. Therefore, the SXR will be
SXRshuffle-exchange = -10 log (3 log2 N - 4) - Xc (3.8.9)
5. The first log2 N - 1 stages are 1 x 2 routers and contribute no cross talk. The last log2 N - 1 stages can introduce, in the worst case, only squared cross talk terms. The center-stage 2 x 2 coupler will introduce a firstorder cross talk term. The SXR expression for the modified router/selector then be comes
[ I] SXR = 10 log 2 (lOg2 N - l)xc + Xc
= -Xc-1010g[(log2N-I)lifcllO+ I]
where the -Xc term is clearly dominant.
6. Since the switch must be nonblocking and rearrangements are not allowed, the Benes and dilated Benes architectures are eliminated. (If we remove the restriction that only one signal can be active in any coupler in the dilated Benes, the dilated Benes may have connection capabilities beyond rearrangeably nonblocking, but the authors are unaware of any proof of the dilated Benes being strictly nonblocking or wide-sense nonblocking when this restriction is removed.)
Optically Transparent Systems 155
For the remaining analyses, we use the applicable parameters N =
20, Lc = -0.5 dB, LF = -2 dB, Xc = -30 dB. The crossbar SXR can be computed as
[1 - 1O(I-N)Lcl 10J
SXRcrossbar = -Xc - 10 log IOLc/lo _ I
[ -7.91 ] = 30 - 10 log -- = 11.4 dB -0.109
(3.8.10)
which does not meet the SXR requirement of 25 dB. The worst-case loss in the double crossbar is LT = 2LF + 2NLc =
- 24 dB which exceeds the power budget of 20 dB. This leaves the router/selector architecture. For the worst-case loss
and SXR, we must calculate the router/selector values for the dimension of the next higher power of 2 and therefore let N = 32. The worst-case loss is then
LI = 2Lr + (2 IOg2 N)Lc = -9 dB (3.8.11)
for the single-substrate router/selector and L r = -13 dB for the multiple-substrate router /selector. Both worst-case losses for the router /selector are within the 20 dB power budget. The SXR for the router /selector becomes
SXR = -10 log [log2 (32)] - 2(-30) = 53 dB (3.8.12)
which is weil above the 25 dB specification.
7. In general, the coincidences of 1 s, or the peak of the cross-correlation function, for prime codes ofthis type are one or twO.(43) The coincidences (maximum number of Is ANDed) for time-shifted versions of these three codes can be found by exhaustive comparison to be one (see Figure 3.S.1 for one pairwise comparison). The maximum number of Isthat resuIt when a code is ANDed with itself (the autocorrelation) is just the total number of Is in the code or three for the codes Co, CI, or C2 .
8. Time-slot delays: A = 12, B = 14, C = 7, D = 11, E = 9, F = 6, G = 4, H=1.
9. Maximum delay is experienced when the first time-slot in the input frame is moved to the last time-slot position in the output frame. Let N be the total number of time-slots, then the first time-slots must delay N - I
156
Co
Cl (To) Cl (T3)
Cl (T4)
Cl (T6)
Cl (T7)
Cl (Tg)
Cl (T IO)
Cl (Tll )
Cl (T I4 )
' , , 100100100 :
100010001
10001QOO~
100010001 , , ,
10Q01QOOl , , ,
1oooioo01 , , ,
iOO~10QOl lQOOjOOOl
lOOQ10001 100010001
Chapter 3
Max. Number ofls in CoAND Cl (1)
1
1
1
1
1
1
1
1
1
Figure 3.S.1. Exhaustive comparison of coincident I s in time-shifted codes Co and Cl.
time-slots to get to the beginning of the output frame, and N time-slots to reach the last position in the output frame. Therefore, the maximum delay is 2N - I.
10. a. Total data rate IS sum of individual requirements =
10 + 20 + 50 + 30 = 110 Mb/s.
b. Minimum number ofbits per frame = I + 2 + 5 + 3 = II bits/frame, assuming each user must appear in each frame.
c. Frame rate is F = 10 megaframes/s.
Il. The four subcarrier frequencies would be 90, 110, 130, and 150 MHz.
a. To reach the IF center frequency of 10 MHz, we must have local oscillator frequencies 10 MHz in frequency away from the subcarrier frequencies or at 80, 100, 120, and 140 MHz.
b. CSO distortions occur at the sum and difference frequencies of each pairwise combination of the subcarriers. Therefore, the answers are:
150 + 130 = 280 MHz, 150 - 130 = 20 MHz, 150 + 110 = 260 MHz, 150 - 110 = 40 MHz, 150 + 90 = 240 MHz, 150 - 90 = 60 MHz, 130 + 110 = 240 MHz, 130 - 110 = 20 MHz, 130 + 90 = 220 MHz, 130 - 90 = 40 MHz, 110 + 90 = 200 MHz, 110 - 90 = 20 MHz.
c. The highest component of CSO distortion occurs at 20 MHz.
Optically Transparent Systems 157
12. Massage the given data into the expressions required for Eq. (3.6.8):
c 3 X 108 m/s v = 1" = . 6 = 229 X 1012 cycles/s (3.8.13)
" 1.310 X 10· m/cycle
ß = 10 02/10 = 0.955 (3.8.14)
log2 (32) = 5
Then substitute and compute:
PT. ßlog,N
B·N=---h· v· np
(0.001)(0.955)5 = 52.4 THz (6.625 x 10-34)(229 x 1012)(100)
13. Substituting the given values into Eq. (3.6.12), we get
(" 3 X 108
FSR = -- = = 10 GHz 2ncd 2(1.5)(0.01)
14. Starting with Eq. (3.6.32)
(3.8.15)
(3.8.16)
k-I hph 2k-1 h(pk _ ph-k) E[number of hops] = L -- + L (3.8.17)
h~ I n - 1 h~k n - 1
1 [k - I 2k - I (1 2k - I )] E[number of hops] = -k- L hph + l· L h - k· L hph
(kp - I) h ~ I "~k P h ~ k
First term of Eq. (3.8.18)
kII hp" = [(1 -pHI - kpk-I~ + (p - pk)]
h-I (l-p)
Second term of Eq. (3.8.18)
2k I kpk pk. L h = - (3k - I)
2
(3.8.18)
(3.8.19)
(3.8.20)
158 Cbapter 3
Third term of Eq. (3.8.18)
Combining (3.8.19)-(3.8.21), reapplying the multiplier in (3.8.18), and reducing yields
[ b f h ] kpk(p - I )(3k - I) - 2k(l- I) E num er 0 ops = -=---=---'---'-------'-,-----"'----'--
2(p - I)(kpk - I) (3.8.22)
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Optically Transparent Systems 159
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160 Chapter 3
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62. G. Coquin, K. W. Cheung, and M. M. Choy, Single- and multiple-wavelength operation of acousto-optically tuned lasers at I.3 ILm, IEEE J. Quantum Electron. QE-25, 1575-1579 (1989).
Optically Transparent Systems 161
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70. K.-W. Cheung, Acoustooptic tunable filters in narrowband WDM networks: Systems issues and network applications, IEEE J. Sei. Areas Commun. SAC-8, 1015 1025 (1990).
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75. E. Arthurs, J. M. Cooper, M. S. Goodman, H. Kobrinski, M. Tur, and M. P. Vecchi, M ultiwavelength optical crossconnect for parallel-processing computers, Electron. Let!. 24, 119-120 (1986).
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162 Chapter 3
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4
Optical Logic Devices
4.1. Introduction
Free-space digital optics relies on optical devices which may be required to play the same role as a transistor in digital electronics. In addition to being an optical port, i.e., a modulator or emitter and a detector, they may also be required to act as a thresholding device. Such devices are called optically bistable (OB). OB devices are optical elements which, over some range of light input powers, have two possible output states. The range of powers over wh ich they are bistable corresponds to a region of hysteresis and is bounded by two discontinuities at which switching between the two states can occur. Such switching can be induced by holding close to one of these discontinuities and making an incremental change in the total light input. This power increment can derive from an independent (signal) input. It is possible to obtain a change in output larger than the signal input and hence achieve digital gain.
Devices showing differential gain, in which small changes in one beam produce larger changes in another, could be used as the basis for a switching system, and there are many ways of achieving such behavior. Many bistable devices can be adjusted to a regime where they are not quite bistable, but still show a strong "kink" in their input/output characteristics with a slope greater than one (i.e., differential gain) making them the optical equivalents to the transistor. In this chapter all such logic devices are referred to as bistable for brevity.
Since the first demonstration of devices of this sort in the late 1970s there have been a large number of experimental OB systems reported. Figure 4.1 summarizes the way in which the many OB devices can be subdivided into four main classes, I-IV. The first division is between active and passive. Active devices are those where the total light output can be more than the total light input (i.e., those having an internal gain stage or light source).
163
164 Chapter 4
Pusive/lntrlnsic Passive/Hybrid Active/lntrlnsic Active/Hybrid
Figure 4.1. CIassification of optically bistable devices.
Passive devices have no light-generating or -amplifying components and consequently only produce signal gain by transferring a signal from one lowpower beam to another of higher power. In these the power source is in the form of an optical input.
A common conceptual difficulty is understanding how "passive" devices, that is, devices that are not themselves a source of optical energy, can provide any kind of optical gain. "Active" devices, such as laser diode amplifiers or a device such as a photo transistor driving a light-emitting diode, can clearly provide real optical gain since they convert some other source ofpower (e.g., electricity) into light. The key is that "passive" devices, just like the transistor in electronics, do not just dissipate input power, but can induce large changes in power in one beam with small changes in power in another. Such passive devices require some external optical power source to generate the beam that will be modulated, but it may be possible to run many such passive devices from a single light source. The use of "active" and "passive" here is different from that in electronics, where "active" devices are components such as transistors, and "passive" refers to components such as resistors and capacitors.
Both active and passive OB devices can be further divided into hybrid and intrinsic. A hybrid device is one in which the feedback required for OB is provided electrically. This may involve some external circuitry or be achieved by the internal electrical characteristics of the device. In all cases switching occurs as a consequence of positive feedback; sometimes arising
Optical Logic Devices 165
from an intrinsic nonlinear absorption process; sometimes provided by an optical cavity, and sometimes by an extern al electrical feedback mechanism. The switching speeds of hybrid devices are usually ultimately limited by the time constants ofthe electrical feedback. Intrinsic OB devices are constructed from optically nonlinear media and rely on either direct optical feedback or the nature of the nonlinearity itself. In this ca se switching speeds are determined by medium time constants or, in very fast devices, the optical feedback time.
Hybrid is a term that applies to those devices involving dissipative electronic transport. Until recently, hybrid devices had a reputation for being inefficient; it is a common opinion, for example, that it is inefficient to convert energy from optical to electrical and back to optical, and hence that the performance of such a device is fundamentally limited. In fact, the efficiency of hybrid devices depends on the degree to which they are in tegrated; there is nothing fundamentally inefficient about photodetectors, laser diodes, or some modulators. The inefficiency comes about in practice from the energy required far electrical communication over macroscopic distances from one device to another. The integration of every component is a technologically demanding task.
Class I (intrinsic) devices are discussed in detail in Sections 4.2-4.4. In Section 4.2, the origin of different types of optical nonlinearities is discussed in the context of those used for logic devices. In Section 4.3, general details of refractive optical bistability are presented illustrated by the three systems most studied: those based on InSb, GaAlAs, and a thermal nonlinearity. Section 4.4 introduces devices at an earlier stage of development which are being studied primarily as devices wh ich have potential to switch more rapidly than electronic devices.
Class 11 devices (passive/hybrid optoelectronics) are combinations of optical modulators and detectors; changes in the detected light level incident are fed back to the electrical control of the modulator. This class includes the many types of optically addressed spatial light modulators studied and used for optical computing (e.g., the Hughes liquid-crystal light valve). Although constructed as spatial light modulators, they can simulate logic gates with little difficulty. However, they are of no interest in the context of this chapter and are discussed in Chapter 5. Devices of this class have been proposed and constructed specifically as optical logic devices and are discussed in Section 4.5.
CI ass IU devices (active/hybrid) are those that usually include an optoelectronic detector, such as a phototransistor wh ich controls a source such as an LED or a laser. These are discussed in Section 4.6.
The Cl ass IV devices (active/intrinsic) oftechnical interest are all based around laser diodes as the active components. The system with the lowest
166 Chapter 4
operating energy is discussed in Chapter 3 in the context of using it as a relation al device. Section 4.7 is a conclusion and restates the comparisons made throughout the chapter between the different systems.
4.2. Optical Nonlinearities
4.2.1. Introduction
This section presents an introduction to the origin of optical nonlinearities. (1,2) The large electric fields in laser beams exceed the limits assumed in the conventional theories that described the properties of optical materials. That is, the response of the medium to the applied field [quantified by its polarization (P)] was no longer linear at these high irradiance levels:
(4.2.1 )
where E is the applied electric field, &0 is the permittivity of free space, and XI, X2, X3 , etc. are the linear, second-order, third-order, etc., susceptibilities, respectively.
This addition to electromagnetic theory gave rise to a range of new effects: second harmonie generation, up / down conversion, parametric amplification, and the electro-optic effect discussed in Chapter 3. These are all second-order nonlinear phenomena which result from the quadratic dependence of the medium polarization upon applied electric field and a coupling between three optical waves. Another important range of phenomena arise from the cubic response to the applied field. These third-order processes can lead to purely dielectric phenomena, such as irradiance-dependent refractive indices. By exploiting purely dielectric third-order nonlinearities, such as the optical Kerr effect, changes can be induced in the optical constants of the medium which can be read out directly at the same wavelength as that inducing them. This then opens up the possibilities for digital optical circuitry based on cascadable all-optical logic gates.
Another group of nonlinear devices have been developed that rely on real excitation of the optical medium (normal linear absorption) and the consequent changes in the optical properties resulting from this change in state of the medium. They are known as "dynamical" or "resonant" nonlinearities and unlike the nonresonant effects, which have response times determined by the dielectric relaxation times (e.g., ~1O-14 s), they have slower responses, determined by the relaxation time of the excitation (e.g., 10-11 to 10-6 s). The advantage ofthese re sonant nonlinearities, however, is that they are proportionally more sensitive (e.g., by factors of 103_108). This has permitted the demonstration of a range of optically nonlinear effects,
Optical Logic Devices 167
such as optical bistability and photorefractive gratings, at milli watt power levels-thus raising the prospect of large arrays of opticallogic gates operating in parallel, utilizing free-space and reconfigurable interconnects to form practical photonic switching systems.
4.2.2. Nonresonant Optical Nonlinearities
All optical nonlinearities can be characterized by a susceptibility X n. It is important to distinguish between effects due to the imaginary component of X, and the real part. In general, Xn = X~ + X~. Taking the linear susceptibility first; Xl determines the linear dielectric constant (l + xl) and hence the refractive index, n. x7, if negative, results in linear absorption, a, and if positive, gain (as in a laser). Thus, Xl (real) refers to the purely dielectric response of the medium and Xl (imaginary) refers to energy transfer to or from the medium. The following briefly reviews third-order (nonresonant) nonlinearities.
Real Part oI the Third-Order Susceptibility
A significant value for X] can provide direct modification of the dielectric constant (and hence refractive index) by an optical field. A dc field applied across a homogeneous isotropic medium can induce birefringence. The effect is equivalent to inducing uniaxial birefringence with the optical axis directed along the applied field direction. The birefringence, I1n, can be quantified by comparing the refractive indices for light polarized parallel [n(O)] and perpendicular [n(90)] to the field by I1n = n(O) - n(90) = nK E 2
where nK is the dc Kerr coefficient. In common with the linear electro-optic devices described in Chapter 3, the dc field can be replaced by an oscillatory (optical) electric field. The time-average change in refractive indices are not zero because of the dependence on E 2• Consequently, a modulator can be made in which the applied voItage is replaced by an optical input. In this manner, one light beam can influence another.
Since the induced optic axis is in the direction of the electric field, it follows that the light beam causing the Kerr response will itself be aware of the changes in refractive index (because it is propagating perpendicular to the optic axis). Thus, the light experiences an irradiance dependence of refractive index when it is within a Kerr medium (assuming it is sufficiently intense).
The relation between the change in refractive index and X], in a non absorbing medium, can be determined as folIows, using Eq. (4.2. I) :
D = coE + P
= coE + coXiE + cOX2E2 + COX3 E3 ... (4.2.2)
168 Chapter 4
Assuming a centro-symmetric medium, X2 = 0, then
where G, the dielectric constant, is:
and GL = 1 + X; is the linear dielectric constant. Writing
then the refractive index:
[ 2 ( )1/2 J1/2
n=Ji=~ 1+ G~ Ji~O X3
l.e.,
- C+ X3 JiJio I ( )1/2
n-y'GL --G L GO
(4.2.3)
glvmg
(4.2.4)
where
(SI units)
Commonly, X 3 is quoted in esu and n2 in cm2 jkW; in these units their numerical values are similar.
This type of nonlinearity gives rise to a number of effects including:
• Self-focusingjdefocusing (dependent on the sign of n2) • Self phase modulation • Four-wave mixingjphase conjugation • Optical bistability • Nonlinear optical switching
Typically the magnitude of n2 due to nonresonant nonlinearities range from ~4 x 1O-16 cm2jW in glass(3) to ~1O-1l cm2jW in PDA-PTS.(4)
Optical Logic Devices 169
4.2.3. Resonant Optical Nonlinearities
The simplest type of resonant nonlinearity is the opto-thermo-optic effect, where optically induced heating of the medium is the excitation mechanism by which the optical constants (a and n) are altered. For example, residual absorption in a semiconductor at a wavelength greater than the band edge will lead to an increase in temperature when irradiated and a consequent shift in the band edge (usually to slightly longer wavelengths). This causes changes in the absorption and, because the (real) susceptibility rises in value as the band edge is approached, there is a corresponding change (usually an increase) in the refractive index, n. This change appears equivalent to the optical Kerr effect, except that it is diffusive in nature.
In general, any material with a significant thermo-optic coefficient (dn/dn and some absorption will exhibit a refractive optothermal nonlinearity. Effective n2 values in the range 10-4 to 10-6 cm2/W can be readily achieved.(2) Thermal response times are slow, being determined by how long it takes heat to diffuse away from the illuminated region. They are usually in the range of 10-6 to 10-3 s. Note, however, that this effect may be an important consideration when designing devices based on other, faster, nonlinearities involving significant power dissipation in the optical medium.
More relevant to the development of fast (resonant) nonlinear devices are those phenomena in which transitions between electronic energy levels give rise to altered optical properties. The simplest case to consider which iIlustrates surprisingly weIl the properties observed in semiconductors is a two-Ievel atomic transition. Such a transition can be characterized by the imaginary and real components of the susceptibility.
These are related by the Kramers-Kronig relations(5l:
I fC(~"( ') X'(co) = -- PV L!? __ dco'
Jr co' - co -Cf]
( 4.2.5)
1 fcx, '( ') X"(co)=-PV ~dco'
Jr co' - co cx'
(4.2.6)
where PV refers to the principal values of the integrals. The relationships between X', X", and the refractive index and absorption coefficients are:
,2 (ae2) X = n - 1 - 2co
for a < 4Jr/Ao (4.2.7)
170
and
" acn X = (i)
Chapter 4
(4.2.8)
It is clear that any modification of one component of susceptibility, i.e., either of the optical constants: n or a, will result in a change in the value of the other. In general, any absorbing transition can be saturated above some critical irradiance level (dependent on the oscillator strength and the relaxation time, TI) and consequently the absorption coefficient, a, is reduced (see dotted X" curve in Figure 4.2). As the spectrum of X' must be similarly saturated, it follows that at frequencies below the transition peak the refractive index is reduced, while at high er frequencies it is increased. Thus, assuming that the incident light is closely (but not exactly) resonant, a Kerr-type refractive nonlinear response is obtained.
Typically, at frequencies beyond the resonance half-width, nz is dependent on the dipole matrix element, j1fi; the excitation lifetime, TI; and the detuning from resonance ((i)fi - (i)), as follows(Z):
(4.2.9)
This relation indicates: a trade-off between speed (TI) and sensitivity (nz); a sharp resonance term; and a strong dependence on j1fi. In any opticallogic device a large response is desirable for a minimum level of absorption. Noting that the switch energy will be proportional to the ratio TI / nz, the material figure of merit is nz/ a TI. Taking into account the resonant nature of a and its linear dependence on the transition oscillator strength, f: (f rx j1;i), it is clear that an efficient device, based on resonant nonlinear refraction, must utilize a transition with a maximum oscillator strength.
Solid-state (e.g., semiconductor) media provide strong absorption over short path lengths and hence the potential for compact devices. Transitions
w
Figure 4.2. The real (n) and imaginary (a) components ofthe susceptibility (Xn = XI + jx~).
Optical Logic Devices 171
utilized usually involve excitation of electrons across the energy gap that separates the valence and conduction bands. In direct-gap semiconductors (e.g., GaAs) these transitions form an absorption band with a sharp edge and thus, as with the atomic transition, a strong associated real susceptibility.
Saturation of the transition occurs as a result of excited electrons and holes forming significant populations at the valence and conduction band extrema (in local thermal equilibrium) which partially block further transitions. This has the effect of blueshifting the band edge and consequently reducing the refractive index (see dotted curves in Figure 4.3). Saturation of any exciton feature on the band edge also has the same effect.
In this case, assuming a fully thermalized excess-carrier population described by Boltzmann statistics(6)
(4.2.10)
Pcv is the momentum matrix element and the function J is a resonance term. Equation (4.2.10) is directly equivalent to the ca se for an atomic two-level system [Eq. (4.2.9)], with Eg replacing Wfi and a(ePcv )2 replacing Ilii (or all~). It is again apparent that a large value for the matrix element is required if nda T, is to be maximized.
The resonant nonlinearities can be classified as those in which the detuning between the photon and transition energies (!J.E) is such that the uncertainty time (hl!J.E) is greater than the dephasing time h Intraband scattering, due, for example, to electron-electron and electron -phonon interactions, is described by a damping or dephasing lifetime T2 • Under these circumstances an excited population can be established with characteristic intraband and interband relaxation times T2 and TI, respective1y.
a n
f 2
11 2 11
Figure 4.3. The effect of blueshifting the band edge.
172 Chapter 4
4.2.3.1. Dynamic Moss-Burstein Shift (InSb)
The Moss-Burstein shift was first described in the context of the bandedge dependence on doping concentration. The observed apparent increase in band gap when a semiconductor is doped is a consequence of degenerate filling of states at the bottom of the conduction band. It was first observed with n-type doping of the narrow-gap semiconductor InSb, in which the low electron effective mass makes it relatively easy to raise the Fermi level into the conduction band.
The same effect can be obtained as a result of optical excitation of electrons into the conduction band. As discussed above, the band-edge shift results in a change in refractive index and hence n2-type nonlinearity for radiation in the band-tail spectral region.
Assuming that the distribution of excited carriers can be approximated by Boltzmann statistics, then the change in refractive index is given by
n = nl + (1'/:iN (4.2.11)
where /:iN is the photoexcited carrier density and (1' is the nonlinear refractive cross section: /:in/ /:iN. Provided the carrier lifetime, TI. is independent of /:iN, then
Under constant-power illumination, /:iN is given by
and hence
/:iN = aITI
hv
(4.2.12)
(4.2.13)
(4.2.14)
It can be seen that the figure-of-merit n2/ a TI is determined by the cross section, (1'. Figure 4.4 shows how (1' for InSb is weakly resonant with the band edge.
Knowing (1', the refractive nonlinearity can be modeled in terms of the photoexcited carrier dynamics (generation and recombination). The maximum value in InSb, (1' ~ - 4 X 10-14 cm3, occurs at a wavelength of 5.3 Jlm in 77 K sampIes and is consistent with n2 = -10-3 cm2/W assuming TI ~ 500 ns and a ~ 20 cm -I. (6, 7) Note that this gives the high value nd T = -2000 cm2/J, though at the expense of some absorption. Any mechanism
Optical Logic Devices 173
4
2
Figure 4.4. Nonlinear refractive cross section of [nSb.
by wh ich TI can be reduced, e.g., surface recombination or enhanced trap recombination, speeds up devices based on this effect without sacrificing the low switching energy-determined by (n2/TI)-I.
4.2.3.2. Exciton Saturation Nonlinearity ( Bulk GaAs)
Wider-gap semiconductors, such as GaAs, show c\ear exciton features on their band-edge absorption spectra, particularly at low temperatures. Operation at a wavelength on the wing of the strongest (n = I, heavy-hole) exciton line can lead to a large refractive nonlinearity, directly analogous to the atomic transition saturation process described above. Figure 4.5 shows the absorption saturation that can be obtained in a multiple quantum weH GaAs sampie at room temperature using '" 10 kW /cm2 .<H)
A number of mechanisms can cause saturation of the exciton absorption: coulomb screening, phase-space filling, and exciton interactions.<H.9) The first of these, widely presented as a dominant process, proceeds as
c: .2 e. o E «
Photon Energy
Figure 4.5. Saturation of absorption in multiple quantum weil materia l.
174 Chapter 4
folIows. Excitons are created by the generation of electron-hole pairs with insufficient energy to fuHy escape their coulomb interaction and they exist as a mobile hydrogen-like entity. Due to the low binding energy of the excitons and also the background band-tail absorption (corresponding to excitation of free carrier pairs) at sufficient irradiance levels, a significant free carrier population is also excited. This background plasma can screen the weak electron-hole interaction and hence destroy the exciton resonance.
The relaxation time for this nonlinearity (as with the band-blocking effect in InSb) is determined by the free-carrier recombination time, TI. Also like band-blocking, the nonlinearity can be characterized by a, that is, the change in index per excited carrier (both to exciton levels and conduction band). It should be noted that, in practice, the GaAs exciton feature can be relatively easily saturated, at wh ich point the remaining n2 contribution is once again the band-blocking, dynamic Moss-Burstein shift effect. In addition, other factors, such as band-gap renormalization, should be included when modeling these nonlinearities.
Values of a, for bulk GaAs, of _10-20 to -10- 19 cm3 have been reported, along with n2 up to -2 X 10-5 cm2/W. Relaxation times are typieaHy ~ IOns, giving n2/ TI ~ -2000 cm2 / J which is comparable to InSb (but at the expense of a much larger a of ~5 x 103 ern-I).
The maximum value of the index cross section, a ~ -10- 19 cm -3, compa red with -4 x 10- 18 cm -13 for InSb, is consistent with the scaling expected for band-gap resonant optoelectronic nonlinearities: n2 = E; 3 ;
aocn2/ vocE;2; Eg(GaAs)/ Eg(InSb) =)40.
4.2.4. Introduction to Electroabsorption and SEEDs
Perhaps the most widely researched area of photonic switching optoeleetronie devices is the quantum well self-electro-optic effeet devices (SEEDs).(IO) SEEDs rely on changes in the optical absorption that can be induced by ehanges in an eleetric field perpendicular to the thin semiconductor layers in quantum weIl material. The physics of the devices has been explained elsewhere(lI. 12) and, other than abrief description of the devices, this section will focus primarily on the applications of these devices to photonic switching systems. A quantum weH consists of a thin ~ I 00 A material such as GaAs bounded on both sides by a material such as AlxGal - xAs with a higher band gap than the thin material in the center as shown in Figure 4.6. The thin material is ealled the weH and the thick material is eaHed the barrier. Many seetions ean be stacked on top of each other (i.e., barrier, weH, barrier, weIl, barrier, etc.) to get a device consisting of multiple quantum weHs. If the barriers are thick enough, then the weHs act independently and the effeet of having multiple weHs is to multiply the absorption of a single weH by the number of wells. Modern semiconduetor growth methods,
Optical Logic Devices 175
~ _ __ --,,/ AJGaAs
- GaAs Quantum WeU (oarrow gap)
~ AIGaAs AJGaAs
Banier layers (wide gap)
Figure 4.6. Illustration of multiple quantum weHs.
such as molecular-beam epitaxy, enable the weil and barrier thicknesses to be preciseJy controlled to essentially one atomic layer.
In bulk semiconductor materials, there is a very smooth absorption spectrum starting at the band-gap energy (-,,870 nm for GaAs) and rising smoothly for increasing photon energy (shorter waveJength). This absorption spectrum near the band gap changes as we apply an electric field. This effect is known as the Franz- Keldysh effect.(13. 14) In quantum weIl materials, the electron and hole energies are quantized and large discrete steps in the absorption spectrum are seen even at room temperature, quite unlike the smooth absorption spectrum observed in bulk materials. The wavelengths of these absorption steps shift with applied fields perpendicular to the wells. It has been calculated(15) (neglecting excitons which we will discuss briefly) that as the quantum wells are thickened from 100 A to 300·-500 A, the discrete behavior becomes almost continuous; thus, the quantum confined behavior essentially becomes the Franz-Keldysh effect in bulk semiconductors.
At low temperatures in bulk materials or quantum weHs, the electron- hole coulomb interaction plays a significant role. The absorption spectrum exhibits peaks which are called exciton peaks. When a photon is absorbed at these peaks, abound electron-hole pair (exciton) is created which does not immediately separate into an eJectron and a hole but remains together like a hydrogen atom. In bulk materials, the excitons are larger (~300 A) and are short-lived, so excitonic features in the absorption spectrum are not observed at room temperature. However, in quantum wells, the exciton is confined by the weHs; thus, strong peaks are seen even at room temperature. When an electric field is now applied, the electron and hole tend to move toward the opposite sides of the weIl. However, because of the sides of the weHs, the electrons and holes can still orbit around each other and the exciton is preserved. In bulk materials, the electron and hole would be ripped apart by the fieJd with no barriers to keep the exciton intact. In quantum weil material, applying an electric field reduces the photon energy required to create the electron and hole; thus, a redshift is seen in the
176
c (J
o U c: .2 C. 13 .f -<
Chapter 4
1.42 Photon Encrgy ( eV)
Figure 4.7. Absorption spectra as a function of applied e1ectric fields (from Ref. 11).
absorption spectrum of quantum weil material when a field is applied. A plot of the absorption spectrum at different applied electric fields is shown in Figure 4.7.
This effect has been called the quantum confined Stark effect (QCSE)(16, 17) by analogy of the Stark shift seen in the absorption spectrum of a hydrogen atom under strong applied fields. The QCSE has been demonstrated in several material systems, among them GaAs/ AlGaAs,(IO) InGaAs/Inp,(I8) InGaP/InP,(I9) and GaSb/GaAs.(20)
By far the best results are obtained with GaAs wells and AlGaAs barriers; thus, most of the work on devices has been with these materials. The changes in absorption of the GaAs quantum weHs are large; I-J1m-thick quantum weil material can have optical transmission changes greater than a factor of two with only 5 V applied. This fact enables arrays of devices to be made with acceptable performance for light propagating perpendicular to the surface of the array, that are useful for free-space photonic switching systems experiments.
The device structure used most often for SEEDs consists of areverse biased p- i- n diode with the multiple quantum weHs in the intrinsic region. The quantum weH region, for the most part, consists of identical weHs and barriers. However, more complex quantum weH structures may give improved performance. One such structure uses coupled quantum weHs(21) as shown in Figure 4.8. In symmetric coupled weHs, the electron and hole have equal prob ability of being in either weH with no e1ectric field across the wells. However, when an electric field is applied, the electron is puHed toward one weH and the hole puHed toward the other. When the probability of finding an e1ectron and hole in the same weH is reduced, the absorption is greatly reduced.
Optical Logic Devices 177
~------7>I AIGaA
Figure 4.8. Coupled quantum weHs. (a) Illustration of strueture. (b) Illustration of eleetron and hole wave funetions with and without applied fields.
(a)
GaAs
~ A~ ~-~ ~
Related to the QCSE in symmetrie eoupled weHs is an effeet known as Wannier- Stark loealization in superlattiees.(22,23) A superlattiee, as defined here, eontains alternating low- and high-band-gap materials (just like quantum weHs), only this time eaeh layer is just 20- 30 A thiek. Sinee the layers are so thin, with no field applied, the eleetrons and holes are not eonfined to the weHs and there is a smooth (no abrupt) absorption edge similar to bulk materials, However, when the eleetrie field is applied, the eleetrons beeome "loealized" in the weHs ereating a sharp (diserete) absorption edge.
Another strueture uses asymmetrie weHs.(24-26) An asymmetrie weIl ean be defined as one where the band gap varies aeross the weIl thiekness, This variation ean be aehieved, in prineiple, by varying the eoneentration of Al in an AIGaAs weil, for example as illustrated in Figure 4,9, The result of this is to add aprebias to the weIl, separating the carriers, making the
Quantum Weil (narrow gap) Al.Ga(I _.)As (x=O to 0_2)
Alo_3G30.7As Barrier layers (wide gap)
Figure 4.9. Asymmetrie quantum wells.
178 Chapter 4
electron tend toward one side of the weIl and the hole tend toward the other side, even with no applied field. The application of the field can then compensate for the built-in prebias. In this manner, the absorption spectra with and without field are reversed from that which occurs in standard quantum wells. The asymmetrie device is said to be "blueshifted" because the application of the field increases the energy required to create an electron-hole pair.
A similar device uses strained InGaAs wells with GaAs barriers grown on a GaAs [111] substrate.(27) GaAs grown in this orientation is piezoelectric; thus, the strain induced by the lattice mismatch between the InGaAs wells and the GaAs barriers creates a built-in electric field. As in the asymmetrie wells, the built-in field can now be canceled by the application of an external field, creating another "blue-shifted" device.
Adjusting the carrier concentration in quantum wells gives another method of controlling the absorption with applied electric fields. The physical mechanism, termed phase space absorption quenching (PAQ),(28) occurs because at high carrier concentrations, the quantum weIl cannot absorb light because of the Pauli exclusion principle. (We can also optically control the carrier concentration in quantum wells; indeed, this is how the opticallogic etalons work.) The magnitude of the effect is comparable to the QCSE (Aa = 104 ern-I), yet the absorption is quenched over a spectral range of ",90 meV or ",60 nm. The simplest way to control the carrier concentration in a quantum well is to use the well as the conducting channel in a field effect transistor (FET).(28) One such device used an InGaAs/InP FET and the light was incident through the back of the substrate and reflected from the back side of the gate meta!. (29) Since there was only a single well in these devices, the overall absorption was quite small. Using either aresonant cavity or waveguides in conjunction with this device could increase the absorption enough to make a worthwhile device. Indeed, a waveguide device has been made using AIGaAs/GaAs FETs in which the transistors were connected to make a set-reset latch.(30)
A vertically integrated device used acharge sheet or electron reservoir (vertically) next to each quantum well to provide carriers that could be moved into the well by the application of an electric field. (31) Since the device is vertically integrated, several repeat periods can be stacked on top of each other, thereby increasing the absorption and contrast ratio to levels needed to contemplate building arrays of SEEDs from these devices. However, in the first device made, the overall absorption was still only a few percent. Additionally, waveguide modulators have also been made using a similar structure. (32)
As stated earlier, most of the work on SEEDs has used p-i-n diodes with the quantum wells in the intrinsic region of the device. By changing the voltage across the diode directly, the device can be used to electrically
Optical Logic Devices 179
modulate an incident beam of light. (33) The basic principle of a SEED is to use the current detected in a photodetector to change this voltage; these devices have optical inputs and optical outputs, even though electrical currents flow within the devices. If the photodetector and modulator are integrated, the SEED can be quite efficient and is one of the lowest-energy devices proposed for photonic switching. SEEDs will be discussed in Section 4.5.
4.3. Intrinsic Bistability
4.3.1. Fabry-Perot Etalon
The first aptical lagic device to be described will be the nonlinear Fabry-Perot etalon (NLFP). To understand how an NLFP operates requires good understanding of the properties of the Fabry-Perot etalon.(5) A Fabry-Perot etalon is composed of two highly reflective mirrors that are separated by a finite distance d. The volume between the mirrors is referred to as the cavity of the etalon. This type of device is also referred to as a Fabry-Perot interferometer although it has become convention to refer to a device with movable mirrors as an interferometer while referring to the structure as an etalon if the mirrors are fixed. Figure 4.10 illustrates the major parameters associated with an etalon. The two mirrors MI, M2 have amplitude reflection coefficients of rl, r;, r2, r2, where nonprimed values correspond to the light entering the cavity and primed values to the light that is leaving the cavity, in addition to the amplitude transmission coefficients tl, t;, t2, t; (r, and r2 may be different from r; or r; only if the mirror is a
Incldent Light
Renected Light • n
i
•
- --- d---
Intercavity Light
• •
n c
TransmItted Light
n
Figure 4.10. Fabry Perot etalon.
180 Chapter 4
>' d
tf-i tlriEI
..... -----------. Er! I~ t1rirl EI
~ ltrfrtEj
Eil
~ -----------. Er2 ttrfrfE j
~~rrfE. Eil
::::=- -----------. ~~ t1rrrrEj EtJ • °1 0j oe
Erl ~ M2
Figure 4.11. Transmitted and reflected rays of a Fabry- Perot etaloll.
dielectric stack with at least one partially absorbing layer) . There are four rays of light associated with the etalon. The first ray is the incident light that impinges upon the etalon. The second ray is the light that passes through the etalon; this ray will be referred to as the transmitted ray. The third ray is the reflected ray. Finally, the last ray of light is a standing wave of optical energy that is present in the cavity of the etalon.
Consider what happens to a single ray incident on an etalon as shown in Figure 4.11. A wave of amplitude Ej is incident on M j at point A (see Figure 4.12) with an angle Oj. Part of this incident wave is reflected (Erj =
rjEj) and part transmitted (tjE;) into the etalon cavity. The light in the cavity continues until it encounters point B on the second mirror M2 where part is reflected (tjr2Ej), and part transmitted leaving the cavity (Et = tjt2Ej). The reflected portion of the light then reverses its direction and heads toward point C on M j where part is again reflected (tjr2riEj) and another portion of light leaves the cavity (Er2 = tjr2tjEj). The two reflected waves emerging from the etalon are parallel with a path length difference
(4.3.1)
Since (AB) = (BC) = d/ cos Ot and using Snell's law, the optical path difference is given by
(4.3.2)
This result is somewhat counterintutive; it shows that the cavity gets effectively thinner as the angle 0 is increased although it is obvious in Figure 4.12 that the light path is longer within the cavity. The phase difference, Ö,
Optical Logic Devices
Ei ----d----+
~LA _____ _
n c
\8\
n. I
Figure 4.12. Transmitted and rcflectcd rays used to determine the optical path difference (5 0,
a Fabry Perot etalon.
between two adjacent reflected rays (or transmitted rays) is the product of the free-space propagation number, ko, and the path difference L1. If nc # nj, then there may be a phase shift of cjJ at the boundary. Thus, the total phase shift 8 between the two waves can be written as
(4.3.3)
where cjJ represents the phase change that can occur at the interface between the two materials. For dielectric materials at normal incidence, if nc > nj, then cjJ = n; if nc < nj, then cjJ = O. At nonnormal angles of incidence or for materials which absorb, the phase change is dependent on () and polarizationY4) It should also be noted that the path difference for the transmitted wave will be the same as the reflected wave.
When the mirrors MI and M 2 have large amplitude reflection coefficients, there will be many reflections within the cavity. This is illustrated in Figure 4.12. To model the operation of the etalon, assume that ()j = ()t =
O. Also, assume that the incident wave is represented by
(4.3.4)
The reflected electric field can then be represented by
( 4.3.5)
182 Chapter 4
since they are all parallel to each other. This equation can be rewritten as
Er = rEi + tr't' Ei e -jö + ... + tt'r,(2N -3) Ei e -j(N -I)ö (4.3.6)
If r' e - jö < 1, then the series converges to
[ r'tt' e-jÖ ] Er=Ei r+ 2 _·ö
1 - r' e J (4.3.7)
For the case of zero absorption for both the medium and mirrors, r = -r' and tt' = 1 - r 2 which allows the previous expression to be written as
(4.3.8)
Since I i = EiEt /2, the reflected intensity Ir = ErEi /2 is
I = /; 2r2(1 - cos 8) r I (1 + r4) - 2? cos 8
(4.3.9)
Similarly, I t can be found to be
(4.3.10)
To gain a better intuitive picture ofwhat these devices are doing, set cos (j = 1 - 2 sin2 (8/2). Thus, Eqs. (4.3.9) and (4.3.10) can be rewritten as
I = /; [2r/{1 - r2)f sin2 (8/2) r 1 1 + [2r/(1 _ r2)]2 sin2 (8/2)
(4.3.11)
1 I = /; -------:---:---=----
t 1 1 + [2r/{1 - r2)f sin2 (8/2) (4.3.12)
These equations can be further simplified by introducing the quantity referred to as the coefficient of.finesse which is represented by
F. =(~)2 c 1 _ r 2
(4.3.13)
Optieal Logie Deviees 183
which can also be written as
4R F = --~-
e (I _ R)2 (4.3.14)
since the rejiectance at an interface is Ir / I j = R = r2• Substituting this new quantity into Eqs. (4.3. 12) and (4.3. I 3) yields
Ir Rr =-
p Ij
Fe sin2 (0/2)
I + Fe sin2 (0 / 2)
I
(4.3.15)
(4.3.16)
where Rfp is the reflectance and Trp refers to the transmittance of the etalon. The expression [I + Fe sin2 (0 / 2)] - 1 is referred to as the Airy function, A(o), and iIIustrated in Figure 4. I 3. In panel a, the ratio ofthe transmitted intensity to the incident intensity is shown as a function of the round-trip phase delay 8. The maximum transmission, assuming a lossless system, is unity which implies that the minimum reflection is zero. The minimum transmission is
(4.3.17)
and occurs when 8 is an odd integer multiple of 7L On the other hand, the maximum reflection for a lossless system is I - Tfpm;n which is
, , '. Fe:: I
Fc =200 0\.........:==----==---==---
-21t o 2n
(a)
41t
, I , , .,
/) 0 -21t 0
Figure 4.13. (a) Transmission and (b) reflection of a Fabry- Perot etalon .
(4.3.18)
184 Chapter 4
The location of these peaks can be determined by equating (4.3.3) to integer multiples of 21C,
(4.3.19)
where vp is the frequency of the incident light, cp is the phase change that results at the air-material interface of the etalon, and q = 1,2, ... , n. When dis large relative to the wavelength q » cp 121C, the previous equation simplifies to
qc v =-
p 2ncd (4.3.20)
or
A" = 2ncd (4.3.21) q
The frequency difference between two adjacent peaks, referred to as the free spectral range (FSR), can be found by subtracting 8(q + 1) from 8(q) and equating it to 21C, for the case of a Fabry-Perot etalon where (}t = 0°
c FSR v =.1v =--
2ncd (4.3.22)
A similar relationship can be found for the difference in wavelength between the two peaks by assuming that .1A.« .1.0. Thus, Eq. (4.3.22) can be written as
(4.3.23)
From the equations above, it can be seen that increasing d will increase the FSR.
The bandwidth of these peaks, which is defined as the full width of the bandwidth at half its maximum value (FWHM), can be found by setting the reciprocal of the Airy function equal to 1/2. Since 11 ftc is normally a
Optical Logic Devices 185
small number, the FWHM bandwidth is
(4.3.24)
(4.3.25)
(4.3.26)
From these equations it can be seen that large values of Fe lead to narrow bandwidths. A parameter that is used extensively in the discussion of etalon structures is the finesse, F, of the cavity. The finesse is defined as the ratio of the free spectral range to the FWHM bandwidth which can be written as
F _nft_n}R -------
2 l-R (4.3.27)
Consider qualitatively how the etalon works. Of the impinging light on the etalon, usually only a sm all portion will actually enter the cavity, I e =
(I - RaI;, where Rr is the reflectance of the initial reflecting surface, Ie is the intensity of the light in the cavity, and I; is the intensity of the impinging light. The rest ofthis incident light will be reflected from the reflecting surface (Ir = RrI; where Ir is the reflected intensity). The light that enters the cavity will continue to propagate until it encounters the second reflective surface. At this interface, a sm all portion of the light will be allowed to escape the cavity [It = (I - Rb) Ie. where Rb is the reflectance of the second interface and I t is the transmitted intensity]. The light that initially ente red the cavity is now propagating in the opposite direction until it is reflected by the initial reflective surface Rr where the majority of the light will reverse directions within the cavity and another small part escapes from the cavity. If the round-trip phase delay of the cavity is equal to an integer multiple of the wavelength of the light in the medium, then constructive interference will occur between the light that has been propagating in the cavity and any new light that is entering the cavity (assuming the coherence length ofthe incident light is much larger than the cavity round-trip distance). When this resonance condition occurs, large intensities of light can be built up within the cavity. The intensity of the light within the cavity has to be equal to the transmitted intensity divided by one minus the reflectance of the output mirror of the etalon. For example, if the mirrors of the etalon have reflectivities of 0.99 which is easily obtainable using high-quality coatings, and the input power
186 Chapter 4
is 1 mW, then the power within the cavity is 100 mW. Thus, in the steady state, large intensities can be built up within a cavity. The device can thus behave as if the two mirrors become transparent. For the case when Itl I j =
1 and Irl I j = 0, the energy within the cavity will add destructively with the light that is reflected from the first mirror to yield a zero-intensity reflected beam. The transmitted beam on the other hand is a small portion of the intercavity intensity that is passed through the final mirrored surface.
4.3.2. Steady-State Nonlinear Etalons
With this understanding of the operation of Fabry- Perot etalons, now consider the characteristics of a device when a nonlinear material is placed in its cavity. Suppose that the etalon previously described has an index of refraction that varies with intensity. This can be represented by
( 4.3.28)
where no is the linear index of refraction, n2 is the nonlinear index of refraction, and Ie is the intensity oflight within the cavity. Since the peak resonance of the etalon is a function of the index of refraction of the cavity nc , Eg. (4.3 .21) can be rewritten as
(4.3.29)
assuming that q» </>12n. Thus, at low cavity intensities the resonant peak would be at the same wavelength as that if a linear medium were present in the etalon (Figure 4.l4, solid lines). As the intensity increases (Figure 4.14, dotted lines), the resonant peak shifts, to longer wavelengths, if n2 is positive. With an incident beam of wavelength AI, the device of Figure 4.l0 will
T
o
Figure 4.14. Shift of etalon resonant peaks due to non linear index of refraction.
Optical Logic Devices
Figure 4.15. Input/ output characteristics of the reftected output from a nonlinear Fabry -Perot etalon.
187
initially be reflective. As the intensity is increased, the resonant peaks of the cavity will shift increasing the transmission of the device.
The effect of a nonlinear index of refraction on the reflectivity of an etalon as a function of input intensity lin is shown in Figure 4.15. As lin
increases, the resonant peak shifts into coincidence with the incident wavelength, thus reducing the reflectivity of the etalon. At low intensities, the cavity resonance peak is not coincident with the wavelength of the incident light, thus the reflectivity is high which allows little of the incident light to be transmitted. As the intensity of the incident light lin increases, so does the intercavity light intensity which shifts the resonance peak. This shift in the resonant peak increases the transmission which in turn reduces the reflectivity. This reduction will continue with increasing lin until a minimum value is reached at which power it will start increasing.
The characteristic curve (Figure 4.15) can be used to approximate an all-optical NOR gate. The operation of a NOR gate is described by Table 4.1. Thus, when no inputs are present the output is a "one," while the presence of any input will force the output to a "zero." To implement a NOR gate function using the characteristic curve shown in Figure 4.15 requires a third input which is referred to as the bias beam, represented by h. This energy source biases the etalon at a point on its operating curve such that any input will exceed the non linear portion of the curve moving the etalon from the high transmission state. This is illustrated in Figure 4.16. Panel a illustrates the relationship between the inputs and outputs of the physical device. Panel b shows how the bias be am h combines with the inputs I 1 and 12 to exceed the threshold of the nonlinear characteristic curve.
Table 4.1. Truth Table ror NOR Gate
linl lin2 fout
0 0 I 0 1 0
0 0 0
188 Chapter 4
(a)
Figure 4.16. (a) Multiple inputs into an optical etalon. (b) Input / output characteristics of optical NOR gate.
The nonlinear curve shown in Figure 4.15 does not exist for all values of O. To qualitatively visualize the steady-state effects of different initial detunings, consider the problem from the viewpoint of the round-trip phase o and how it varies with increasing output intensity. The round-trip phase can be represented by 0 = 00 + 02/" where 00 is the linear phase term, 02 is the nonlinear intensity-dependent phase, and I t is the transmitted intensity from the etalon. Solving this equation for I t and then dividing both sides by lin wh ich is the input intensity incident on the etalon, yields one solution to the transmission through the etalon :
(4.3.30)
A second equation that represents the transmission through the etalon is the Fabry- Perot cavity transmission curve that has been given by Eq. (4.3.) 6):
(4.3.16)
The graphical solution to these two simultaneous equations is shown m Figure 4.17.05)
In panel a, the straight lines with different slopes are the result of Eq. (4.3.30). Note that the slope decreases as the input power increases. The characteristic Fabry- Perot peaks are the contribution of Eq. (4.3.16) with the first peak being located at the initial detuning 00 = 7r. The intersection ofthese two equations will be the transmitted output ofthis nonlinear device. Panel b illustrates the transmission of the device. For low intensities the line marked A and the Airy curve intersect at point a. As the input intensity increases, the slope of Eq. (4.3.30) changes to the line represented by B. The intersection of the two curves is represented by point b. In panel b, the
Optical Logic Devices
A
f
e
B c
g h
O J-~ ______ ~ ____ ~~ ____ -+-+ 2 4
8 - 80 7t (a)
6
A B c
T
1
(b)
Figure 4.17. Graphical interpretation of non linear Fabry- Perot etalon.
189
change from point a to b can be seen to be just a sm all increase in the transmission. As the intensity continues to increase, it eventually arrives at point c which is associated with line C. Any increase in input intensity will force the intersection of the two equations to jump to d. Thus, at point c a small variation in the input intensity can cause a large change in the output intensity. After this point has been exceeded, the output will continue to increase monotonically until the next Fabry-Perot etalon peak is encountered. After the input intensity has forced the etalon to point d, a different path will be traced out as the intensity decreases. As the intensity decreases through e to point f, another discontinuity will occur as shown in panel b. The transmitted intensity as a function of the input intensity for this example is shown in Figure 4.18. This optical hysteresis is commonly
I, r e
c
b
Figure 4.18. Output versus input intensity for a nonlinear Fabry Perot etalon.
190 Chapter 4
referred to as optical bistability since there are two stable states present. The width of this hysteresis region is a function of (J or ~.
It is important to understand that this graphical technique only works for pure dispersive bistability, where dispersive bistability implies that the index of refraction is the only variable that varies with time and the absorption is zero. Bistability based on nonlinear absorption is referred to as absorptive bistability and is described in Section 4.5.
This graphical technique, Figure 4.17, is a very useful qualitative technique for introducing the behavior of the nonlinear etalon. However, as a precise method of predicting the detailed shape of the characteristic, it is extremely tedious. Also it is very inflexible since in practice, all systems of interest have both intensity-dependent absorption and n2. Fortunately, an alternative technique for predicting the etalon's behavior exists which is always used as a starting point to model the behavior of these systems. (36)
The dummy-variable method is readily implemented on a computer. The method is introduced below for the more general case of an absorbing etalon.
If the front and back mirror reflectivities are Rr and Rb and the absorption coefficient of the nonlinear material (which is filling the cavity of physical thickness d) is a, then one obtains Ra = (RrRb)I/2 exp (-ad) and F = 4Ra /(l - Ra f(36) Clearly, high absorption will decrease finesse, as williow mirror reflectivity. Without finite absorption, however, there will be no refractive index change for this form of nonlinear etalon. The optimization of cavity design thus depends on achieving the correct balance of absorptance and finesse.
For any given internal irradiance there is one solution for the transmitted irradiance, and just one initial irradiance that could have produced the internal value. Define a characteristic irradiance I b and a scaled internal irradiance x by:
x = Iad/lb (4.3.31 )
The incident, transmitted, and reflected irradiances are all single-valued functions of x,
a = exp(-ad)
(4.3.32)
(4.3.33)
(4.3.34)
(4.3.35)
Optical Logic Devices 191
a) b)
c} d)
Figure 4.19. Output vcrsus input intensity for non linear FabryPerot etalons at different initial detunings.
Hence, using x as a dummy variable, one can plot It or Ir versus 10 for given cavity parameters, these irradiances being scaled characteristically to h.
Characteristics like those shown in Figure 4.19 are typical, the difference between panels a and c or band d is obtained by a different choice of initial detuning. In practice, this change is trivial to perform ; a selection of the ways in which it is implemented include: use of a tunable laser, variation of angle of incidence, translation of a wedged sam pIe, and a background index change induced for example by resistive heating.
For low-irradiance bistability one wishes to minimize the critical irradiance I e for which the Fabry Perot response shows a steplike form. For irradiances greater than I e , bistability can be achieved provided that the initial detuning is greater than the corresponding critical detuning 60 , For lower irradiances, bistability is never observed.
(4.3.36)
The cavity factorfis a function of Rr, Rb, and D (the latter being scaled to the absorption length a-'). h depends on the material and on the radiation wavelength. Provided that n2 is not influenced by the cavity configuration,
192 Chapter 4
f
Figure 4.20. The cavity factor, f, as a function of the front and back mirror reflectivities, R, and Rh, for two different absorption lengths, 2d.
lb is independent of the eavity parameters.
_ ad(l - R;) j2 (3(F + 2) - C)2
f - Cl - Rr)(l + Rba)(1 - a) 16 «F+ 2)C- (F+ 2)2 - 2F2)1 /2
c = [(3F + 2)2 - 8F]I /2 ( 4.3.37)
The initial detuning depends only on the finesse :
s: j2 3(F+ 2) - C . _I (3F+ 2 - C)I /2 U C = 4 (F + 2)C _ (F + 2)2 _ 2F2 + sm 4F (4.3.38)
Figure 4.20 shows how f varies with Rr and Rb for two eases of ad. In order to aehieve low-irradianee bistability, one requires that a small
thiekness eombines with partieular refleetivities. As dis deereased, the toleranee on the range of Rr and Rb that gives Jow f beeomes finer; the limit is therefore set by fabrieation ability.
4.3.3. Observations of Refractive Bistability
This seetion introduees three refraetive bistable systems that between them illustrate many of the properties other systems possess.
4.3.3.1. Nonlinear lnterference Filters
The first system in whieh passive intrinsie optieal bistability in a semieonductor was observed was in the form of an interference filter.(37) A simple
Optical Logic Devices 193
interference filter has a general form similar to a Fabry-Perot etalon, being constructed by depositing aseries of thin layers of transparent material of various refractive indices on a transparent substrate. The first severallayers deposited form a stack of alternating high and low refractive index all of optical thickness equal to one-quarter of the operating wavelength. The next layer is a low integer (1-20) number of half-wavelengths thick and finally a further stack is deposited to form the filter. The two outer stacks have the property of high reflectivity at one wavelength and thus play the role of mirrors forming a cavity. A high-finesse cavity is usually formed when both mirrors are identical, i.e., of equal reflectivity. However, unlike an empty Fabry-Perot etalon, due to absorption in the spacer (which may be necessary to induce nonlinearity), matched (equal) stack reflectivities do not give the optimum cavity design to minimize switch power. A balanced design which takes into account the effective decrease in back mirror reflectivity due to the double pass through the absorbing cavity is preferable and also results in greater contrast between bistable states. (38) The balanced design Rr = Rb exp (-2aD) is easily achieved by varying one or all of the available parameters: number of periods, thickness, and refractive index of each layer within either stack. Another difference between an interference filter and a Fabry-Perot etalon is that the free spectral range of the former is dependent on spacer thickness and stack design whereas in the latter it is simply the reciprocal of the optical thickness.
The interest in nonlinear interference filters by several groups is due in part to three advantages it possesses over other intrinsic systems.
I. It relies on a thermal nonlinearity and thus the absorption can be introduced by any partially absorbing material forming part of the filter either in the cavity, as one of the mirrors, or external to the optical cavity. Thus, although a given filter will only work within a narrow range of wavelengths (with filters that operate in the visible the FWHM of the pass band of a single-cavity device is typically -2 nm wide, thus the source must have a linewidth very much less than this), different filters of similar construction can be operated at whichever part of the spectrum there is a convenient laser source. The electronic-nonlinearity-based systems are not this flexible.
2. The requirement for an array of gates has as a consequence the need for high sampie uniformity. The lack of information on the spatial uniformity of response for any intrinsic system other than filters is almost certainly indicative of the current unsatisfactory performance in this respect of most systems. Measurements on filters, however, show a systematic variation of threshold power to observe bistability of typically 5% over a centimeter which is negligible.
194 Chapter 4
3. The systems utilizing an electronic nonlinearity also heat up during operation. Typically, about a third ofthe incident power is absorbed and ultimately contributes to heating. Systems operating at midinfrared wavelengths (e.g., InSb) have sufficiently high nonlinearities such that the effects due to this heating are negligible. However, as a consequence of the strong dependence of the electronic n2 on operating wavelength, the nonlinearity in materials with a band gap of around 1 eV (e.g., GaAs) is so low that continuous operation of a single channel to minimize thermal effects is usually all that can be achieved.
The principal disadvantage of thermal-nonlinearity-based systems, including filters, is the high switching energy required. However, in the case of filters, it seems possible that by operating with small device volumes, suitably low switching powers will result «1 mW) to enable simultaneous operation of the order of 102 pixels (gates) with one laser diode and that simultaneously, switching times of '" 1 ps will be possible.
This extrapolation to small device volumes is based on an analysis which predicts the observed spot size dependence of switch power and time at large spot sizes (> 10 pm): power proportional to spot diameter and time proportional to spot area. (39) (This is in contrast to the spot size dependence observed for electronic-nonlinearity-based devices in which, at large spot sizes, the power is proportional to beam area and the time is independent of spot size, being determined solely by the carrier recombination rate.(40») However, the spot size scaling of power does not follow this dependence, in either nonlinearity case, if the spot size is reduced below a critical value. As an example of the loss of the linear dependence, measurements performed using a nonlinear interference filter and radiation of wavelength 0.633 pm showed that as the spot size was reduced below 15 pm, to 8 pm, the switching power increased from 15 mW to 20 mW.(41)
One reason for the departure from the dependence observed at large spot size is the effect of diffusion. In the case of electronic-nonlinearity-based devices, the photoexcited carrier population's transverse diffusion through the material will mean that those carriers outside the illuminated region will not contribute to the observed phase shift. Similarly, heat diffusing outside the illuminated region does not contribute in the thermal nonlinearity case. Hence, at spot diameters smaller than the diffusion length, this effect will become apparent.
Another effect which influences the spot size scaling in the thermal devices is due to the opposing phase shifts caused by the electronic and thermal contributions. As the spot size is decreased, the switching intensity is increased and since the refractive index change due to the electronic effect is intensity dependent, its contribution will be increased. However, in the
Optical Logic Devices 195
use of interference filters with ZnSe as the spacer material, this effect is probably negligible due to the magnitude of the electronic nonlinearity. The nonlinearity is so small that it is only observable using novel techniques such as beam defocusing using the extremely high fluences available from excimer or mode-Iocked lasers. (42)
The final effect considered here is that due to the small depth of focus of a beam focused to elose to the diffraction limit. The confocal parameter of a Gaussian beam focused to a diameter of 2A is only 21l"A. The effective optical thickness of a cavity (L) is given by the photon lifetime, L =
d/( ad - In R.)(5) Typically, etalons ofthickness 2A are used, RrRb is approximately equal to unity, and ad = 0.1 giving L = 20A. Clearly this effective thickness should have been less than the depth of focus if the power density at the focus is to be applicable. In addition, the finesse will decrease if the depth of focus is of the same order of magnitude as L since diffraction of the beam within the etalon will mean that, although the radiation angle of incidence may be normal to the cavity mirrors, some ofthe light propagating back and forth within the cavity will be at an angle to the cavity and consequently experience a different optical thickness. The effective finesse of an etalon decreases as the spot diameter is decreased(43) (or the solid angle of the cone of rays passing through a filter is increased). Typically, a coefficient offinesse of greater than 30 is used; the reduction in finesse and nonuniform power density adversely affects the spot size scaling at a spot diameter below ",3A.
One solution to some of the problems experienced with etalons at small spot sizes is the pixellation of sampies into 2-D arrays of microresonators each of which acts as a waveguide. Additional benefits of this approach are that cross talk between adjacent channels will be reduced to an acceptable level and beam distortion (defocusing) caused by the nonlinearity will be minimized. Experiments have shown the feasibility of this approach using electronic-nonlinearity-based GaAs etalons. (44)
4.3.3.2. InSb
One of the most studied intrinsic bistable devices is based on InSb in which bistability was first observed in 1979.(45) When the power level of a Gaussian beam from a carbon monoxide laser ofwavelength 5.5 pm incident on a crystal of InSb cooled to 80 K is increased above 30 mW, a defocusing effect is observed. This indicates that there is nonlinear refraction. The nonlinearity is so large (n2 = 1 cm2 kW-2) that a change of refractive index of 10-2 can be achieved with modest laser powers. Devices only require lln/n =
10-3 so that devices operating with less than a milliwatt have been achieved. (46)
196 Chapter 4
The current performance for InSb for an etalon ofthickness 50 j1m with a spot diameter of 50 j1m is operation with 650 j1W. Switching times are around 200 ns leading to a switching energy for this device of 100 pJ. Scaling to a spot size comparable to the wavelength could in principle reduce this to 1 pJ. However, the arguments presented above on the difficulties this would present are applicable to electronic nonlinearities. Thus, it is unlike1y that such improvements can be made. In InSb at 80 K the high mobility (106 cm2 /V -s) and long recombination time (200 ns) give a diffusion length of 60 j1m. Thus, reducing the spot size has little effect on the switching power.
4.3.3.3. GaAs Etalon
Bistability in GaAs (and GaAlAs) devices utilizing an e1ectronic nonlinearity was also first reported in 1979.(47) It has been extensive1y studied since then and continues to evolve into a potentially useful device. The current best reported performance figures are bistability at 4 m W input power with a 25-ns switching time. The switching energy is therefore ",100 pJ, which is similar to the best InSb results.(48) However, a l6-j1mdiameter be am was used to obtain the GaAs result so the irradiance is 0.5 mW j1m- 2 compared with an irradiance level of 0.1 mW j1m-2 required to operate an InSb device. This high irradiance level leads to significant local heating. Operation therefore usually requires a low duty factor (100 to 1) wh ich largely obviates the potential advantage of such a short switching time.
A thermally stable system can be obtained by (1) optimizing the cavity design to lower the power required, (2) using a thermally stable sam pIe mount, and (3) only operating one device. Substantial further improvements would have to be made to enable large arrays of c10sely packed devices to be used in parallel.
Ultrapure GaAs or "trapping" of excited carriers using n-i-p-i structures and type 11 superlattices has been used to extend the lifetime to ",50-100 ns and thus enhance the nonlinearity (n2). However, significant reduction in switching energy is not obtained. Most authors propose that the energy can be reduced by using small device volumes. However, the effects detailed above prec1ude the use of near-diffraction-limited beams unless microresonators are used. Etching (or proton bombardment) to define these structures would entail introduction of defects only a few micrometers from excited carriers. Since the diffusion length is increased when the effective recombination time is increased, it is unlikely that the "slow" devices can be "pixellated" without detriment to the magnitude of the nonlinearity.
A novel approach which gets around the need for a device that can be opera ted at a low duty cyc1e(49) is the pump/probe technique. This relies on
Optical Logic Oevices 197
A B C
Initial Transmission Rel1ection
T Oetuning
0 NOR OR
1/2 NANO ANO 1 XOR XOR
3/2 OR NOR
2 ANO NANO /
0 2 D),.
(a) (b)
Figure 4.21. (a) Position of resonant peak after inputs are prcsent. (b) Table showing logic function of initial detuning.
reading the state of a gate with a high-power probe not absorbed by the material (MQWGaAlAs) just after it has been set by a lower-power pump which is absorbed. The "state" is the position of a resonance feature which is altered by the refractive index change caused when the pump beam is absorbed. Figure 4.21 illustrates how different optical logic gates can be implemented using this technique through the appropriate choice of initial detuning. Spectral shape A corresponds to no inputs on the device, B occurs when one input is impinging the etalon, and C occurs when both inputs are present. The operation of C, assuming an initial detuning of 2, is shown in Table 4.2. Low-energy operation was obtained (I pJ) but the system is not easily cascadable in its present form due to the output and input wavelengths being different. The use of a dichroic absorber or an isolated absorption feature (due to an exciton) could in principle solve this problem.
4.3.4. Transient Behavior of Nonlinear Etalons
The discussion of nonlinear etalons has been limited up to this point to the case of steady-state operation. This section introduces the transient operation of the device.
Table 4.2. Truth Table for Spectral Shape C of Figure 4.21 Assuming an
Initial Detuning of 2
hl] lin 2 f o ut
0 0 0 0 I 0
0 0
198 Chapter 4
In looking at the transient nature of these etalons, it is important to understand that they will behave in the predefined manner only after the energy in the cavity has built up. This leads to the definition of two other terms: photon lifetime (, p) and cavity buildup time ('c). The photon lifetime refers to the time it takes for a cavity to decrease its energy from the maximum value to that maximum value divided by e. If a package of photons starts at the left reflecting surface of Figure 4.1 0, travels to the right reflecting surface, and then returns to its initial starting location, it will have reduced by a factor of (I - R2 ) where R is the reflectance of the reflecting surfaces. Assuming the cavity is empty, this decrease in <pp will occur in the time 2d/c. Thus, a differential equation can be constructed for the rate of change of the photons within the cavity:
d<pp __ ~ - R2
dt - 2d/c <pp (4.3.39)
This equation has the solution
(4.3.40)
where
(4.3.41)
and <ppO refers to the initial number of photons that is present in the cavity at t = 0.
The cavity buildup time (, c), on the other hand, is the time required to build up the intensity within the cavity to 1/ e of its eventual maximum value and is defined as 'c = 'r/[I - Ra ei8o] where 80 is the initial detuning of the cavity.
This discussion will begin by showing the relationship between the transient behavior of the etalon or interferometer and both the material response time, m and the cavity round-trip time, r. The only transient effect discussed is critically slowing down (CSD).
Critical Slowing Down
CSD is a phenomenon that occurs when Tm» T r and the input intensity Iin is approximately equal to the steady-state bistable threshold Iss. When
Optical Logic Devices 199
IOU!
Is lin (a)
IOUI
" 111
Figure 4.22. (al Characteristic curve of bistable optical device. (b) Time response for different switching increments v where VI = 4.6, V{lI} = 1.4, and V{lII} = 0.03. (c) Characteristic switching time versus increment of input switching signal beyond the critical value.
these two conditions are met, the time required for the nonlinear etalon to switch dramatically increases. (50,5\) This is illustrated in Figure 4.22. Panel a illustrates the input/output characteristics of a bistable optical device. Panel b illustrates the transient response of this device for three different
200 Chapter 4
values of switching increments (, where ( is given by
( 4.3.42)
For the first case, with ( = 4.6, the delay before the device switches states is unnoticeable. With ( = 1.4 there is a modest delay between the time the device should change states and when it actually does. Finally, in the third case with ( = 0.03, there is a significant delay before switching occurs. Thus, as I in approaches Iss the delay before switching occurs increases. The relationship between the deJay and the switching increment ( is shown in panel c where T is equal to 1/ e of the final steady-state value. Note in this panel that as ( --+ 0, T --+ 00. To compensate for CSD, the input intensity for an input signal to an NLFP with Tm» T r will have to be at least twice the steady-state threshold intensity Iss.
One effect of CSD on the operation of logic gates in an optical circuit is to give a switching time longer than that wh ich might be expected given the logic gate performance when irradiated by a high-energy pulse.
This behavior is not of course only restricted to optically bistable systems, it occurs in alm ost any bistable system. To understand the physical origins of CSD it is helpful to consider a mechanical analogy the dynamic behavior of which is similar, in a limited qualitative sense, to an optically bistable system. Figure 4.23 represents a steeJ ball at rest in an indentation in a plane. Another indentation is adjacent. To get out of one potential weIl and into the other, the ball must be supplied with sufficient kinetic energy dmv2 ) to get it over the barrier height (h). Clearly if dmv2 = mgh), then the ball would stop at the top of the hilI. This is a point of unstable equilibrium. Given slightly more energy than that required, the ball would slow, nearly stop, and then fall into the adjacent hole. More energy than that required would induce the baU to take a shorter time to change positions.
Figure 4.23. Steel ball analogy to critical slowing down .
Optical Logic Devices 201
The important point to note is that the dependence of the time taken on the extra energy is not linear. To illustrate, consider a vertical barrier height of 5 m and a I-kg mass; the minimum energy required is 50 J. With this energy the ball would reach the top of the barrier in I s. Given 10'/-;, more energy the top of the barrier is reached in only ~0.65 s. Thus, supplying a small amount of extra energy above the minimum produced a large decrease in the switching time.
Two semiconductor systems in which this phenomenon has been studied extensiveiy are nonlinear interference filters (NLIF) and InSb since they can be easily opera ted continuously wh ich significantly increases the ease of analysis. For examp\e, compare the switching time obtained with NLIFs when used in a circuit (~10 ms) with that obtained when an identical gate is irradiated by a picosecond-duration pulse (~l pS).(52,53) The switching time is dependent on the degree of overswitching used, i,e" the amount by which the minimum is exceeded, If an NLIF with a switching power of 10 mW is biased by a holding beam of 6 mW and switched with a signal power of 4 mW, the switching time is 0,25 s, However, if a signal power of 15 mW is used, the switching time is reduced to only 0,5 mS,(54)
If a Fabry Perot etalon containing a material having a thermal nonlinear refractive index is illuminated with a wavelength absorbed by the material, the rate of change of temperature of the device can be written as
d!1T K)/o !1T
dt I + Fa sin2 (5 + K2!1T) r (4,3.43)
where K), K2 , and Fa are constants and 10 is the incident light irradiance, The first term on the right-hand side represents the rate of heat deposition into the device due to the internal light intensity, which is proportional to 10 and is dependent on the temperature rise via the Airy function. This is the driving term, The second term represents the rate of heat ftow out of the device due to thermal conduction which is proportional to the temperature rise and dependent on r, the thermal time constant of the device. This is the heat sinking term. The net rate of change of temperature of the device is thus proportional to the difference between these two terms wh ich is plotted in Figure 4.24.
Consider first the situation shown in panel a, In this case 10 is just sufficient to cause the device to switch onto resonance. This is represented on the graph by the point labeled "equilibrium point" where the two curves intersect and dT / dt = O. In order to reach this point it can be seen that the device has to pass through a region where the two lines come very dose to each other causing dT/dt to have a very small value for this period. This manifests itself as a long time delay in the middle of the switch process, If the driving term were any smaller, then the curves would intersect at this
202
Equilibrium point
_......,;:;;r----- Heat inking term
Tempcraturc ri e (a)
Hcatsi nking tcrm
Tcmperaturc ri 'c (h)
Chapter 4
Figure 4.24. Switching in a Fabry-Perot etalon with athermal non-linearity. (a) 10 slightly greater than critical intensity; (b) 10 much greater than critical intensity.
point and the device would end up in an off resonance stable state, in other words it would not reach the switch threshold.
Now consider panel b. In this case, 10 is much larger, causing the driving term to scale up proportionately. This means that the two curves no longer pass dose to each other during switch on, therefore there is no significant delay during the switch process. This dependence of switch-on time upon input irradiance is referred to by the term critical slowing down.
The switching dynamics of nonlinear interference filters can be found from a solution of the time-dependent he at equation. The heat equation for an optothermal bistable device has been solved. (54) Consider the case of an input power PL which initially biases the device below the switching threshold Pu. The device is switched by the instantaneous application of an
Optical Logic Devices 203
increased input power level PH , wh ich is above the switching threshold. The switching time of the device is given by
for
PH - Pu 0<-·----«1
Pu
(4.3.44)
where A(T) is the temperature-dependent absorptance (the proportion of power absorbed; R + T + A = I) and r 0 is the thermal time constant.
It is also clear from this equation that there is a dependence also on the degree of overswitch and holding level of the device. This dependence is observed in all passive intrinsic bistable systems. Figure 4.25 shows a comparison of experiment and the above theory of CSD in a ZnSe NLIF.
The reason CSD is important is that in a circuit based on identical intrinsic logic gates, both the switch on and off times are domina ted by this effect. The clock rate possible may be orders of magnitude slower than that predicted if CSD is ignored. Typically, intrinsic devices have a contrast of ~3:1 with a maximum reflection or transmission of ~75%. Thus, only -50% of the incident power is available as output. There is a minimum fan-out of two reducing this to 25'1"0. This power must be routed through an interconnect wh ich can in principle be lossless but in practice is usually lossy. The remaining signal power must switch the next device by providing sufficient power to exceed the difference between switching power and holding power. This is usually at least 10% of the holding power to ensure that noise, lack of uniformity in the array, and array generation do not produce spurious switching. The result is that, in all intrinsic bistable systems, regardless of which nonlinearity it is based on or structure is used, the switching signal will only exceed the minimum required by a few percent and CSD will be evident.
4.3.5. Review of Observations
Table 4.3 is a review of the observations of intrinsic bistability known to the authors. The first and second columns refer to the semiconductor, and structure in wh ich it is used, either as an etalon or bulk. The third column lists the mechanism of bistability studies; the first letter, T or E, denotes thermal- or electronic-based intrinsic nonlinearity, and the second letter, A or R, denotes whether the positive feedback is provided by increasing absorption or by an etalon, refractive bistability. The next four columns
204
'-
S o E f=
I~ r--.---------------.
• PL '" 0.6 Pu • PI . '" O. Pu
• 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
Upper Swi tch Power (PHIPu) (a)
1000 r-"""'TI""---------------,
100
10
- PL ", 0.6 P
. - - - PI. '" O.R Pu
pper Switch Power (PIlIPU) (b)
2.2
Chapter 4
Figure 4.25. Comparison of theory and experiment for critical slowing down in Zn Se nonlinear interference filters.
are the operating wavelength, ambient temperature, switch power, and switch-on time in the absence of CSD. The final column is a relevent reference, not necessarily the reference that first reported the observation. The table is tabulated by increasing wavelength and illustrates the diversity of conditions in wh ich bistability can be observed.
4.4. Fast Nonlinearities
This section is a review of recent observations of nonlinearities which those studying the phenomena believe have potential for use as fast (switching times of < Ins) logic gates. However, in all cases, the claims of usefulness are made without regard to interfacing with existing technology. In
Optical Logic Devices 205
Table 4.3. OB Class I (Passive/Intrinsic)
Semiconductor Structure Mechanism ?c(nm) T(K) P(mW) t (s) Ref.
CuCl Etalon ER 390 77 106 5 x 10 ~ 10 55 Cds Etalon TR 487 2 2 10 ' 57 Cds Bulk TA 487 50 5 I 0 ~.l 59
Zn Se Bulk TR 476 300 35 5 x 10 4 61 ZnSc Etalon (thin film) TR 514 300 0~8 10 ' 63 GeSe, Bulk TA 633 300 14 I 65 Dye Etalon EA 694 300 10 'I 67
Li Xtal Etalon TR 633 300 0.5 10' 69 GaAIAs Etalon MQW TR 830 300 4 x 10-' 71 GaAIAs Waveguide TR 821 300 2 10 I 73 Li Xtal Etalon TR 830 300 0.5 10 ' 74
Dye Etalon EA 1.06 300 10 9 76 PTS Etalon ER 1.9 300 10 9 78 InSb Etalon ER 5.5 80 2 5 x 10 7 80
PbSnTe Etalon TR 5.5 300 3 0.2 82 InSb Etalon TR 10.6 300 75 I 84
CdHgTe Etalon ER 10.6 300 10' 5 x 10 ' 86 Te Etalon ER 10.6/5.3 300 10' 10~ 7 88
Cds Etalon ER 490 2 8 2 x 10 9 56 Cds Bulk T/EA 487 2 2 x 10' IO~ 9 58 Cds Etalon TA 508 300 10" 60 ZnSe Etalon Bulk TA 514 300 140 5 x 10 4 62
GaSeS Etalon TRjA 514 100 300 64 CdSSe Etalon TR 647 300 600 I 66
Dye Etalon TR 514 300 5 2 x 10 4 68 GaAIAs Etalon MQW ER 830 300 6 4 x 10 ' 70 GaAIAs Etalon MQW TA 860 300 2.7 3 x 10 I 72
ZnSe Etalon (thin film) TR 830 300 3.7 10-' 43 CdTc Bulk TA 850 300 20 10 ' 75
Si Etalon TR 1.06 300 500 6 x 10 ' 77 InAs Etalon ER 3.180 3 2 2 x 10 7 79 InSb Bulk TA 5.5 80 10 10 ' 81 InSb Etalon ER 10.6 300 10' 10 ' 83
CdHgTe Etalon TR 10.6 300 20 I 85 CdHgTe Etalon ER 10.6 80 160 10 6 87
Ge Etalon TR 10.6 300 5 x 10' I 89
particular, all of these nonlinearities could only be used in gates which have to be critically biased. Such gates are difficult to operate reliably. Other features which may obviate the advantage of high speed are operation near the damage threshold of the material, poor contrast, and low throughput. In addition, heating may occur at high duty cycles. It is the combination of duty cycle and switching time which must be considered when comprising the performance of the different candidates for a viable system.
4.4.1. Kerr Effect in Inorganic Solids (Glasses)
Optical glasses have measurable nonlinear refraction as a result of a finite value for XJ. The underlying microscopic origin of the nonlinearity is that the bound electrons are not in perfectly parabolic potential wells, due to the multiple resonance that inevitably exist. Although X 3 is smalI, nonlinear refraction can be a problem in large Nd: glass laser amplifiers where, due to
206 Chapter 4
the high fields and the positive sign of n2, self-focusing can occur. In general, n2 is greatest in high-index glasses with large dispersive powers. For example, fused silica (n = l.46) has n2 = 2.7 X 10-16 cm2/W, while SF-7 glass (n =
1.64) has n2 = 16 x 10-16 cm2/WY' 90) Estimating the response time (dielectric relaxation time) to be 10-15 to 10-14 s gives n2/' around 0.1-1 cm2/J. Because n2/. is of reasonable magnitude, and because absorption can be very low in glasses, the overall figure of merit n2/ a. can be large. This raises the possibility of constructing nonlinear optical switching devices based on ultrashort pulses (fs) propagating down glass fibers.
A soliton gate based on this nonlinearity has been demonstrated. (91.92) The demonstration of an all-optical cascadable NOR gate with gain uses 300-fs-duration pulses of wavelength 1.7 pm. The energy required in the pulses is '" 1 0 pJ due to the requirement that a soliton is generated. The nonlinear medium is a 75-m-long polarization-maintaining fiber. The highly birefringent fiber length is chosen equal to 25 times the soliton period. It has an extinction ratio of 20: 1 when carefully coiled on a 30-cm-diameter drum. Apolarizer in the exit beam analyzes the output.
4.4.2. Kerr Effect in Organic Solids (Polydiacetylene)
There is considerable interest in both nonresonant and resonant nonlinearities in organic optical media. At least two factors lie behind this: (1) there exists a vast range of organic compounds, each with many variants, and hence various desirable properties can be chemically engineered, and (2) long polymer chains can be constructed to give greatly enhanced X3 values. This 1atter aspect is of particular importance. It arises from the fact that conjugated polymers (such as polydiacetylene), which are carbon chains with alternating single and multiple bonds, act as one-dimensional periodic electronic structures. That is, electrons are shared along the chain in a manner analogous to the crystal orbitals in a semiconductor. This leads to an energy gap (Eg) and a large oscillator strength, paralleling the similar effects that can be obtained in low-dimensional semiconductors. The energy gap Eg scales linearly with l/m, where m is the number of double bonds in the carbon chain. It has also been shown theoretically that for m > 4, 10gIO (X~m)/x3) = -lO/m indicating an initial rapid increase in X3 as the chain is extended, reaching a value of 50% of maximum at m '" 30, and an asymptotic approach to maximum value as m -+ 00. Thus, X3 for the polymer can be orders of magnitude greater than for the monomer, e.g., a factor of 600 has been measured for polydiacetylene TCDU.(93)
The values of n2 measured in a polydiacetylene PTS sam pIe with a 650-nm absorption edge range from 2 x 10-10 cm2/W (resonant) to 1.3 x 1O-1l cm2/W in the transparent region (nonresonant). Further from resonance (2.62 pm) n2 '" 3 x 10-12 cm2/W has been reported.(94) For the
Optical Logic Devices 207
nonresonant nonlinearity we can estimate a response time, r _ 10- 15 _10- 14 s. This implies that n21 r - 4000 cm211, approximately three orders of magnitude greater than for glass.
4.4.3. Optical Stark Shift in Semiconductors (GaAs)
When interacting with a transition off resonance, a large optical field will induce a shift in the transition energy-the effect known as the optical (or A.C.) Stark effecL For a simple two-Ievel system the shift is such as to increase the detuning between the pump and the transition frequencies. Thus, when pumping on the long-wavelength side of an optical resonance, a blueshift can be induced. Inevitably, this will be associated with a change (a decrease) in refractive index.
The above may be regarded as an alternative description of the optical Kerr effect in asolid: elearly the two effects have fundamentally the same origins. In highly nonresonant situations, such as visible light in glasses, the interaction no longer dominantly involves any single transition; strong absorption features exist at both longer and shorter wavelengths. The positive (self-focusing) nz in glasses is therefore fully compatible with this picture. (95)
The term "optical Stark shift nonlinearity" has been used to describe an ultrafast nonresonant nonlinearity associated with the exciton transition in a GaAs multiple quantum weIl. It was shown that a 250-fs pulse of peak irradiance 1 GW Icmz can induce a shift of - 1.5 nm in the exciton absorption edge with nearly fuH recovery within 500 fs. (96) The exciton was at 817 nm wavelength and the pump pulse at 827 nm, elear of the absorption region. An optical gate was constructed by incorporating this material within a Fabry-Perot etalon to be sensitive to the associated (equally fast) change in refractive index.(97) The observed shift in peak was equivalent to an index change of 0.001.
The above results imply a value of nz - lO- IZ cmz IW. The actual pump irradiance inside the Fabry-Perot cavity was not specified. Although the device response time in this experiment was limited by the cavity buildup time (-200 fs), the medium response time is significantly less, say 10- 13 s. This implies va lues of nzlr of around 10 cm211. These relatively high values (comparable to the organic materials) are a consequence ofthe elose proximity of a sharp transition with a large oscillator strength.
4.4.4. Induced Transition Nonlinearity (CuCI)
In the wide-gap semiconductor CuCl at 4 K, strong two-photon excitation of a biexciton occurs at photon energies ne ar 3.186 e V (enhanced by the nearby, large oscillator strength, exciton resonances at 3.170 and
208 Chapter 4
3.202 eV). In the same fashion as an exciton is compared to a hydrogen atom, a biexciton can be likened to deuterium. Two holes and two electrons interact to form an entity with a slightly lower energy state than an individual exciton. Thus, a small increase in energy will cause the biexciton to dissociate into its components.(98) This has been used to obtain a fast refractive nonlinearity. In this case the mechanism is the reverse of saturation. At low irradiance levels there is no absorption feature while at higher irradiance the complex susceptibility follows the usual form in the region of an allowed transition. The consequent changes in a and n can last as long as the intense light is applied and in this sense the effect is nonresonant. In practice, of course, on the two-photonic resonance a real population of biexcitons is generated and consequently an associated, weaker, long-term resonant-type process is also present. Alternatively, the pump can be detuned to dominantly excite only a virtual biexciton population.
Optical bistability experiments in CuCI imply n2""" 10- 11 cm2/W for the virtual transition process. Assuming a picosecond response, n2/r,...., 10 cm2/J.
4.4.5. Quantum Enhanced Interband Nonlinearities (Semiconductor-Doped Glasses)
In a quantum weIl configuration the GaAs excitons are strongly perturbed by the spatial confinement to have increased ionization energies. In addition to ensuring strong exciton absorption features on the roomtemperature GaAs band edge, this also results in an enhanced oscillator strength and hence a larger nonlinearity. The higher exciton ionization energy makes the e-h interaction more difficult to screen and consequently the saturation arises more from phase space filling (occupation of states needed to create the exciton) and exciton broadening ofthe transition.<99, 100)
Studies of exciton absorption saturation in GaAs have demonstrated the enhancement provided by the 2-D quantum confinement. For a weIl width of 7.6 nm the refractive index change for every carrier created, er, is increased by a factor of three over the bulk value, and !in values as large as 0.1 have been measured. This increase in nonlinearity is, as expected, directly proportional to the increase in peak absorption (Le., the oscillator strength). The effective n2 at low excitation levels (100 W cm-2) is ,...., -2 X 10-4 cm2/W, but again the corresponding absorption coefficient is also large: ",I x 104 cm-l. The value of er is ,....,-2 x 10-17 cm-3, while n2/r,...., -10,000 cm2/J.
To further enhance the nonlinearity it is logical to consider lowerdimensional systems, e.g., quantum wires and quantum dots. Several groups are already investigating GaAs quantum dots produced by etching fine pillars in quantum weIl material. An alternative possibility is to exploit the
Optical Logic Devices 209
semiconductor microcrystallites that ex ist in color filter glass. The semiconductor-"doped" glasses typically exploit CdS/CdSe alloys to provide a sharp absorption edge at the desired wavelength. The size of the smallest crystallites, < I 0 nm, indicates that quantum confinement effects should be present; however, the spread of sizes prevent clear observation of such phenomena. Nonetheless, significant fast nonlinearities have been measured (and exploited) in these materials.(IOI) The dominant nonlinear mechanism has been attributed to the occurrence of band-filling in the semiconductor. Because of the dilution factor, the nonlinearity is smalI, n2 ~ - 3 X 10- 12 cm2/W, A =
500 nm (CdSo 9 Seo I), but it is fast, TI ~ 20 ps due to rapid surface and/or Auger recombination. This yields a value n2/r ~ -1.1 cm2/J. Again because of the dilution factor, the absorption is much smaller, a = 4 cm -I, and hence n2/ at is comparable to bulk GaAs at a similar detuning from resonance.
4.4.6. Quantum Enhanced Intraband Nonlinearity (GaAs-MQW)
Transitions between the quantized subbands created in a quantum weil sampie can also be used as the basis of aresonant nonlinearity. No device demonstrations have been made using this effect but a large nonlinearity is predicted from spectroscopic measurements of transitions between conduction subbands in GaAs wells. The mechanism is again assumed to be fun damentally a saturation process. Because of the 2-D carrier confinement the conduction band density-of-states has a steplike structure-each step corresponding to an increase in quantum number. As a result of this, there is a very strong interaction with light tuned to the subband separation (i.e., a large oscillator strength). Thus, a large nonlinearity is expected.
From the GaAs spectroscopic studies, and the known intraband relaxation times, ~ I 00 ps, a nonlinearity of up to n2 ~ 10-5 cm2/W has been predicted for 1O.6-,um wavelength radiation resonant with the lowest subband transition.(102.I03) This implies a high n2/r ~ 105 cm2/J, although once again there will also be a high absorption wh ich will lead to thermal problems.
4.4.7. Fast Coherent Resonant Nonlinearities (CdSe)
In discussing the resonant nonlinearities, it has been assumed that illuminating pulse durations are longer than T2, i.e., that the nonlinearity is the result of a thermalized excitation. With a pulse shorter than T2, different results are expected as a result of the coherent superposition of photon and excitation states.
An example of this is exciton saturation in GaAs MQWs which for a 100-fs pump pulse can be significantly greater than the quasiequilibrium value reached after ~300 fs.(104) Degenerate four-wave mixing experiments in Cd Se have also shown considerable enhanced refractive nonlinearities on
210 Chapter 4
time scales less than T2• At low temperatures (",4 K), dephasing times T2
for exciton transitions can be as much as 10 ps, at low excitation densities .(105) Exciton-to-biexciton transitions have been shown to give rise to nonlinearities up to a factor of 100 times larger during this initial excitation period, as compared with the longer-Iasting (TI) change in optical properties. Short-term n2 '" 10-7 cm2/W with a picosecond response implies n21 r '" 104 cm2/J·
4.5. Quantum Weil Optoelectronic Devices
The next two sections discuss optoelectronic devices. As we defined earlier, these devices can be thought of as those in which electrical currents flow in a circuit. Optoelectronic devices can be separated into two groups. The first group that we will consider are passive devices, i.e., those devices which use the input signal beams to modulate a bias or clock beam. We focus on the quantum weIl SEEDs. Active devices use the input signals to directly control a light-emitting diode or laser diode that is part of the device itself. Perhaps the most widely used active devices are based on the double heterostructure optoelectronic switch (DOES). Bistable laser diodes will not be described here, aIthough there will be abrief discussion about devices using photodetectors, electronic logic, and laser diodes.
4.5.1. Bistable (Two-Terminal) SEEDs
The first SEED used a single modulator in se ries with a resistor as shown in Figure 4.26.(106) In this device the p-i- n diode modulator also acts as the photodetector. The operation ofthe device can be described as follows. Suppose initially, no light is incident on the photodetector. Then since there is no current, the power supply voltage essentially appears across the photodiode. As we increase the optical input power, the photocurrent causes a voltage drop across the resistor, and the voItage across the photodiode decreases. If we operate the device at a wavelength where a decrease in
p. ipholO '"
1
1
Figure 4.26. Resistor-biased SEED.
Optical Logic Devices 211
voItage causes an increase in absorption, then this increase in absorption causes an increase in photocurrent. This increase in photocurrent causes a larger voltage drop across the resistor, further reduction in vo\tage across the photodiode, further increase in absorption, and further increase in photocurrent. This will continue until the quantum efficiency of the photodiode drops off as it approaches forward bias (near 0 V). The net result is that the device switches abruptly from a high to a low voItage state. Since we assumed increasing absorption with decreasing voltage, this switching from "high" to "low" voItage state corresponds to the optical output being switched from a "high" to the "low" optical state.
Because it is somewhat difficuIt to integrate the resistors and the quantum weil p-i -n diodes, arrays of bistable SEEDs were made that use photodiodes for the load instead of resistors.(I07. 108) This diode-biased SEED (D-SEED) consisted of a vertically integrated quantum weil diode, ohmic connection (tunnel junction), and photodiode as shown in Figure 4.27. The bias and signal beams at 850 nm passed through the load photodiode and were incident on the quantum weil p-i-n diode and a bias be am at 633 nm, for example, was absorbed in the load photodiode. The operating range of the devices could be scaled by adjusting this optical bias on the photodiode over a range of over seven decades in power. Also, the device could act as a dynamic memory, where the device could hold either of its two states for up to 30 s with both the red be am and infrared beams removed.(108) SimuItaneously applying both beams allowed readout of the memory state. Finally, the red beam could be used to switch the infrared beam such that an array could be thought of as a visible-to-infrared modulation convertor or even an incoherent-to-coherent light modulation convertor.(109) Both 2 x 2 arrays of 200-jlm2 D-SEEDs and 6 x 6 arrays of 60-jlm2 D-SEEDs have been made.
i photo
SL-superlattlce MQW - multiple
quantum weil p
out
Figure 4.27. Photodiode-biased SEED (from Ref. 26).
photodiode
tunnel Junctlon
MQWdiode
212 Chapter 4
4.5.2. Three-Terminal SEEDs
Bistable devices such as those mentioned above are effectively twoterminal devices and require precise control of power supply voltages, bias beam powers, and reflections ofthe output back onto the system.(I09) Threeterminal devices that avoid critical biasing and provide some input/output isolation are preferred for photonic switching applications. Two devices will be described that have the characteristics of three-terminal devices. One device, the symmetric SEED(lIO) (S-SEED), uses differential inputs and is bistable in the ratio ofthe two inputs. The second approach is to use separate photodetectors and modulators with electronic transistors for the gain mechanism.(III-113) Devices of this second type that have been made so far use single-ended inputs which require high input contrast ratios to avoid critical biasing. However, recently devices operating at low temperatures(114) or using resonant cavities(115) have demonstrated contrast ratios that are potentially good enough for use in single-ended systems.
4.5.2.1. Symmetrie SEED and Related Deviees
The S-SEED shown in Figure 4.28 has two p-i-n diodes, each containing quantum wells in the intrinsic region, with one diode behaving as the load for the other (and vice versa). Because the switching of the device depends on the ratio of the two optical inputs, the S-SEED is therefore insensitive to optical power supply fluctuations if both beams are derived from the same source. The device has time-sequential gain, in that the state of the device can be set with low-power beams and read out with sub se quent high-power beams. The device also shows good input/output isolation, because the large output does not coincide in time with the application of the input signals. Therefore, the device does not require the critical biasing
Figure 4.28. Symmetrie SEED. (a) Sehematie diagram; (b) physieallayout.
Optical Logic Devices
Figure 4.29. Characteristics of both quantum weil diodes.
o V (a)
T
o V (b)
213
H
that is common to most optically bistable devices, and has the attributes of a three-terminal device.
The operation of the device can be understood through the use of load lines as shown in Figure 4.29a. By solving for the voltages across the quantum well diodes as a function of the two input power levels, we can determine the optical transmission of the two diodes and hence the input/output characteristics. The solid curves are the photocurrent versus voltage for a quantum well diode at three different input powers. In terms of the voltage present on this diode and the incident optical power, Pin !' these currents are given by:
. = P T/(VI/Lq [I _ -«(VIIL)L] II 101 hV e (4.5 .1 )
where T/( VI) is the quantum efficiency (number of carriers generating photocurrent per photon absorbed), hv is the energy of a photon, q is the charge of an electron, L is the optical path length in the quantum well material (i.e., the thickness for a transmissive device and twice the thickness for a reftective one), and a( VI / L) is the absorption as a function of applied field. This is actually an approximation because the diode current when forward biased should, in fact, be added to this photocurrent when the diode goes into forward bias. The dashed line is the current of the rest of the circuit versus the voltage on the first p- i- n diode. In this case, this current is the photocurrent on the second (load) quantum weil diode for an input power on the load diode equal to that incident on the first diode in the middle curve. This current, in terms of the voltage on the first diode and the incident power on the load diode, P in" is equal to:
. _p T/(Vo-VI)[l_ -a«Vo - VIl / L)L] lload - in, e
hv ( 4.5.2)
The solid curve in Figure 4.29b is the transmission versus voltage for the first quantum weil diode, and the dashed curve is the transmission of the
214 Chapter 4
load quantum weil diode versus the voltage on the first diode. The optical transmissions, T( VI) and T( Vo - VI), of the two photodiodes in the S-SEED are given by:
(4.5.3)
and
(4.5.4)
Since the voltage on the load diode is equal to the supply voltage minus the voltage on the first diode, the transmission versus voltage and current versus voltage curves for the load diode are the same as the first diode but shifted to the right by an amount equal to the supply voltage and inverted from left to right. The data in Figure 4.29 correspond to the excitonic absorption peak wavelength occurring at 0 V external bias. As the bias is increased, the electric field perpendicular to the wells causes the location of the peak to shift to longer wavelengths (the QCSE), and the absorption decreases and the optical transmission increases. By a similar argument, the responsivity of the device decreases with increasing applied voltage (because less light is absorbed) provided that the intrinsic region is fully depleted of carriers, wh ich occurs at voltages greater than a volt or so. With roughly equal optical input powers on each diode (the middle solid curve in Figure 4.29a), there are three intersection points (B, C, and D), and the device is bistable. At intersection point D, the first diode has low voltage and low transmission (point J in figure 4.29b), whereas the load diode has high voltage and high transmission (point I in Figure 4.29b). At intersection point B, the situation is exactly reversed corresponding to the other stable state, with the first diode having high voltage and high transmission (point G) and the load diode having low voltage and low transmission (point H). Point C is easily shown to be unstable.
In operation, two sets of two beams are incident on the device as shown in Figure 4.30a. First, a set of une qual power beams (signal beams) sets the state of the device. Provided the difference in power between the signal beams is sufficiently large, we can force the device to be in one state (point A in Figure 4.29a) or the other state (point E in Figure 4.29a). A contrast ratio of 2: 1 is more than sufficient to ensure this, and since the signal beams willlikely be derived from the output of another S-SEED, the contrast ratio will normally be greater than 2: I. F or example, if the power incident on the first diode is significantly less than that on the load diode, the device will be in astate shown by point A in Figure 4.29. In this state, the first diode will have "high" optical output as shown by point G and the load diode will have "low" optical output as shown by point H. Conversely, if the power
Optical Logic Devices 215
cloc.k
s~---r-,~--------------
r ... _.
Q
Q
üme(arb. units) (a) (b)
Figure 4.30. S-SEED operating as a clocked S-R flip-flop.
incident on the first diode is significantly greater than that on the load diode, the device will be in astate shown by point E in Figure 4.29. In this state, the first diode will have "Iow" optical output as shown by point J and the load diode will have "high" optical output as shown by point 1. Since the currents from the first diode and load diode scale with input power, it is only the ratio of the two input powers that determines the operating point. Thus, if both input signal beams are derived from the same laser, any variations of the laser power will occur in both beams, and the device will be insensitive to these fluctuations.
The second set of beams are equal-power dock beams that are used to read the state of the device. During the application of the signal beams, the dock be am powers must be low compared with the signal beam powers. Since the state of the device is determined by the ratio of the total power incident on each of the two quantum weil p -i- n diodes, any dock power present when the signal beams are trying to set the state of the device will effectively degrade the contrast ratio of the input beams, possibly causing the device not to switch. After the state of the device has been set, we apply the equal-power dock beams to each diode to read the state. As we stated above and illustrated in Figure 4.29a, the device is bistable when there are three intersection points (i.e., B, C, and 0). This will only occur ifwe operate the device at a wavelength where there is a region of decreasing absorption (and therefore decreasing current) for increasing voltage (e.g., at the wavelength shown in Figure 4.29). Furthermore, the device will only be bistable when the optical input power levels are comparable, and will have unly a single state when the power in one diode significantly exceeds the power in the other. Therefore, when reading the state of the device, the two dock
216 Chapter 4
beams must have sufficiently equal optical powers to ensure that the device remains in the bistable region, so that either state can be read out without altering it. However, since the bistable loop is wide (particularly at 15 V), it is easy to satisfy this requirement.
This device has an interesting attribute which we call "time-sequential gain." Since the currents in both the first diode and load diode scale with input power, the operating point when read out will be independent of clock power and only dependent on the state of the device before the clocks were applied (i.e., point A or E in Figure 4.29a). Therefore, the input clock powers may be many times greater than the input signal powers that were used to set the state of the device, and the device has optical gain as illustrated in Figure 4.30b. It is not optical gain in the sense of an optical amplifier where the optical signal itself is amplified, but, in this device, the weaker signal beams contral a set of stronger clock beams, much like in a bipolar transistor where a weaker base current controls a stronger collector current. Because we apply the signal beams first and then the clock beams, we refer to this as time-sequential gain. In addition, because the output does not coincide in time with the application of the input, the device has effective input/output isolation in that a reflection of the output signal back onto the input will not occur at a time when the device is most sensitive to the input. Since the device can hold its state (i.e., the voltage on the two diodes) for a short period of time without any incident light, it does not matter if there is a time between the removal of the signal beams and the application of the clock beams where no light is present. Therefore, the timing of the optical inputs is not critical.
Since bistability has been observed at optical input powers varying from less than 10 nW to greater than 8 mW, we can have a large effective signal gain. Of course, switching at low powers takes praportionately longer, so that gain is obtained at the expense of switching speed. Thus, the device has a constant gain-bandwidth product, just like many other amplifiers. The amount of gain in a system built entirely with S-SEEDs will be determined by the absorption losses in the devices themselves, the fan-out of the devices, and reflections, absorption, and scattering losses in the optical components used to interconnect the devices. We want to minimize these losses so that the signal beams will be as large as possible and the switching time will be smalI. We will discuss the switching times of these devices in more detail later.
Since the S-SEED has many desirable qualities, such as insensitivity to optical power supply fluctuations and time-sequential gain, we would like to be able to perform logic functions (such as NOR, OR, NAND, and AND) in addition to memory functions (i.e., set-reset latch). We would like the inputs to be differential, thus still avoiding any critical biasing of the device. One way to achieve a logic gate operation is shown in Figure 4.31. We will
Optical Logic Devices 217
p~~;'~Y , Q Preset I I a Signals Ro R~ Clock
Cloc """,,, ' Output Prese~.,,""""""" -
Inpulo Input l
i'><1 So S\ Ho R) Preseta Prese't, Q Q 0 0 1 1 I 0 1 0 0 1 1 o I 0 1 0 1 0 0 1 0 1 0 1 1 0 0 0 1 1 0 0 1 1 1 0 0 0 1 1 0 1 0 1 NOR 1 0 0 1 1 0 1 1 1 0 0 1 0 1
Figure 4.31. S-SEED logic gate showing schematic diagram, timing diagram, and truth table.
define the logic level of the inputs as being represented by the power of the signal on the set input relative to the power of the signal incident on the reset input. For example, when the power of the signal incident on the set input is greater than the power of the signal on the reset input, we will call this a logic "1." For the noninverting gates, OR and AND, we can represent the output logic level by the power of the signal coming from the Q output relative to the power of the signal coming from the Q output. As before, when the power of the signal coming from the Q output is greater than the power ofthe signal on the Q output, we will call this a logic "1." To achieve AND operation, the device is initially set to its "off" or logic "0" state (i.e., Q low and Q high) with preset pulse B incident on only one p- i- n diode as shown in Figure 4.31. If both of the input signals have logic levels of "I" (i.e., set = I, reset = 0), then the S-SEED AND gate is set to its "on" state. For any other input combination, there is no change of state, resulting in AND operation. After the signal beams determine the state of the device, the dock beams are then set high to read out the state of the AND gate. For NAND operation, we simply redefine the logic level as being represented by the power of the Q output signal relative to the power of the Q output signal. That is, when the power of the signal coming from the Q output is
218 Chapter 4
Figure 4.32. Voltage-biased M-SEED.
greater than the power of the signal on the Q output, we will now call this a logic "I." The operation of the OR and NOR gates is identical to the AND and NAND gates except that preset A is used instead of preset B. Thus, a single array of devices can perform any or all of the four logic functions and memory functions with the proper optical interconnections and preset pulse routing.
The S-SEED concept can be extended to any number of diodes connected in se ries with a voltage source(116) as shown in Figure 4.32. Each diode in these multistate SEEDs (M-SEEDs) has states of "high" or "low" optical output. For a device with N diodes, only the diode with the least input power will have a "high" optical output and the others will have a "low" optical outputY 16) For three such diodes, the device acts as an enabled S-SEED where the light beam incident on the added third diode acts as an enable input. When the enable input is high, the remaining two diodes act as a symmetric SEED. However, when the enable input is "Iow," all the voltage appears across the enable diode, no voltage appears across each of the two "output" diodes, and both outputs are low. Thus, the device has three states: two active states in which the two output beams have complementary outputs, and an inactive or "high-impedance" state in wh ich both outputs have a low output. A simple "tristate" bus has been demonstrated using the outputs from two such devices to switch a third one. (117)
One can extend the S-SEED in a different manner to get differential devices that can perform any Boolean logic function as iIIustrated in Figure 4.33.(118) The basic concept is that the input light beams are incident on a group of input photodetectors, which may be quantum weil p- i-n diodes, that are connected to the center node of an S-SEED. The input photodetectors are electrically connected in a manner that resembles the transistor connections in the CMOS logic family (a nondifferential version has input photodetectors connected similar to the transistor connections in NMOS). After the application of the input signals, the voltage on the output S-SEED is either high or low depending on whether or not the logic function is satisfied. These new logic SEEDs (L-SEEDs) also retain the desirable
Optical Logic Devices
-lnpul ~
'iilgnal~ : -=
Figure 4.33. Logic-SEED.
219
qualities of the S-SEEDs; that is, they avoid critical biasing, have timesequential gain, have good input/output isolation, provide signal retiming, and can be opera ted over several decades in power level. Thus, the devices should be easy to use for future optical computing and photonic switching experiments.
For example, let us consider a function given by E = AB + CD, implemented using differential inputs and outputs as shown in Figure 4.34. Subgroup land subgroup 2 implement an AND function of A and B. Similarly, subgroup 3 and subgroup 4 implement the AND function of C and D. To implement the OR of AB and CD, we connect subgroups land 3 in parallel and subgroups 2 and 4 in series. To understand the operation of the gate, assume that a diode with a "high" input has a low impedance and one with a "Iow" input has a high impedance. The center node of the output S-SEED, which provides the output beams E and E, will be '" Vo if both A and B are "high" or both C and 0 are "high." In this case, subgroups land 3 are low impedance and subgroups 2 and 4 are high impedance. Otherwise, subgroups land 3 will be high impedance and subgroups 2 and 4 will be low impedance and the center node will be ",0 V. By operating at a wavelength that gives an increasing output with increasing voltage, the logic function is satisfied.
To implement this function using the single-ended dass of circuits instead, we replace subgroups 2 and 4 by a single diode with an incident reference beam. By generating the reference be am using the same laser that supplies the signal beams, we have a nondifferential logic family without critical biasing. Also, eliminating subgroups 3 and 4 makes a differential AND/NAND gate (i.e., E = AB) that does not require preset beams Iike previously demonstrated logic with S-SEEDs. ()O)
4.5.2.2. Transistor-Biased SEEDs
A second dass of SEEDs has transistors that provide gain between the photodetector and modulator. To date, two versions of this type of device
220
c _
ubgroup 3
clk _ E-
- E-
n • p
subgroup 2
Figure 4.34. Logic-SEED implementation of AB + CD.
Chapter 4
have been made. One version consists of a heterojunction phototransistor in series with a quantum weIl modulator(III .• 13) as shown in Figure 4.35. The heterojunction phototransistor may even have quantum wells in the base-collector junction,(I19) and mayaiso be placed in parallel with the p- i-n diode in a conventional (resistively biased) SEED.(120)
A second "amplified" SEED consisted of a quantum weIl photodiode, a GaAs MESFET, and a quantum weIl modulator.(112) In this second
P .......... In
p -bim.
, p
- P ut
Figure 4.35. Transistor-biased SEED.
Optical Logic Devices
V bia.~
... POU1
Figure 4.36. Field etfect transistor-biased SEED (F-SEED).
221
example, the quantum well detector and modulator are identical. The top layer of the modulator was made of n-type GaAs and thus the MESFETs were fabricated directly on top ofmodulators as shown in Figure 4.36. There were some compromises made in the structure; the n-type layer is somewhat absorbing (although it was thin) and the p-type layer beneath the FETs adds to an increased gate-drain capacitance, but the fabrication of the device was nearly identical to standard MESFET processing.
As opticallogic devices, either the phototransistor version of the devices or the MESFET versions are similar. Both devices are single-ended devices that switch when the input(s) exceed a threshold. This has several negative aspects. One is that the device is no longer scalable unless that threshold is set optically, although in some of the phototransistor devices it could be. Another is that these devices are not latching, and retiming of the data is not done. Third, if the expected input contrast ratio is moderately poor, the device can be said to be critically biased in the sense that a small variation of the input signals can cause the device to switch. This third problem can be overcome if high-contrast quantum weil modulators are available. Recently, measurements done at liquid helium temperatures showed a contrast ratio of over 1000: 1. However, a better way to improve the contrast is through the use of aresonant cavity.(l21) A simple way to do this is to build the modulator on a reftector stack, and balance the back reftection through the modulator and the front reftection off the top surface and recent results using this technique have given greater than 100:1 co nt rast ratio.(115) If uniform devices of this type can be made, single-ended devices without critical biasing are possible. Of course, there is nothing that precludes us from making differential devices incorporating electronic gain. These devices may be preferable since they avoid the need for "thresholding" altogether.
222 Chapter 4
Indeed, the purpose of building the FET-based devices was more in demonstrating the capabilities to integrate electronic devices and quantum weIl modulators together, not for the purpose of demonstrating the particular logic gate that they had implemented.
4.5.3. Energy Requirements in SEEDs
We mentioned earlier that the optical energy required in SEEDs is among the lowest of all devices proposed for switching. We will show how to calculate this switching energy for S-SEEDs; for all SEEDs without electronic transistors, the calculations are similar. Lastly, we will comment on energy improvements that could be expected by using electronic transistors for gain.
The required energy can be calculated by the time it takes to charge the capacitance ofthe device with the photocurrent. Ifwe use Kirchhoff's current law at the center node of the two diodes (see Figure 4.26), we get:
p. S(V) - P S(V, - V) = C dV _ Cd(Vo - V) 10 1 102 0 dt dt
( 4.5.5)
where C is the capacitance of a single p-i--n diode, P'nl and P'n2 are the optical input powers incident on the first and second diodes, respectively, S( V) and S( Vo - V) are the responsivities ofthe two diodes, Vo is the power supply voltage, and V is the voltage across the bottom p-i-n diode. This expression is difficult to calculate directly, so we can make an approximation by assuming that the responsivity of the two diodes is constant and given by Sand assuming dVjdt is equal to the supply voltage, Vo, divided by the switching time, 111. In this case we get
(4.5.6)
where Cot is the total device capacitance across the two quantum weH p i- n diodes plus the additional capacitance of one of the isolation diodes that were used to isolate the two p layers ofthe quantum weH diodes. This method of calculating switching speeds ignores the effects of CSD that are present in any bistable device, and therefore one must solve Eq. (4.5.5) to calculate the switching speed as a function ofthe modulation frequency ofthe ramped signal.
We could define an optical switching energy, Eopt , that is the additional optical energy that would have to be provided by a single additional beam to switch a symmetricaHy biased device. An approximation to Eopt can be
Optical Logic Devices 223
found by multiplying both sides of Eq. (4.5.2) by the difference in the optical power levels incident on the two diodes. This gives
CtotV Eopt = AtAP = -_-S
(4.5.7)
where AP = Pin\ - Pi"2' Equation (4.5.3) shows that the speed and power scale inversely and the switching energy remains constant. [This is also evident from the exact solution to Eq. (4.5.1 ).] There is also an electrical switching energy wh ich can be defined as
( 4.5.8)
Additionally, both the electrical and optical switching energies are linearly related to the device capacitance. Measurements on devices with an area ranging from 100 j1m2 to 10,000 j1m 2 indicated an optical switching energy of ~7.5 fJ/j1m 2 compared with a calculated number of ~5.9 fJ/j1m 2 .(l22)
The results demonstrated approximate scaling of energy with device size as expected. These energies place a limit on the maximum speed of the device in multistage photonic switching systems, because generaIly the power available to switch the devices is limited by saturation ofthe quantum weIl regions of devices in a previous stage. However, using mode-locked pulses, rise times as fast as 33 ps have been measured,(I23) limited by the time it takes the carriers to escape from the weHs.
The S-SEED can also opera te as a signal sense amplifier to make it more sensitive to small signal inputs.(124) For the S-SEED operating as a sense amplifier, a set of equal-intensity beams with a wavelength (AI) several nanometers longer than the zero field excitonic peak wavelength (.1.0) is first applied to the device. At this wavelength, the device is not bistable and switches to its only stable operating point with essentiaIly half of the supply voltage across each diode. Then the signal beams at .1.0 are applied. RecaIl that at .1.0, the device has two stable states consisting of approximately the supply voltage across one diode and no voltage across the other. Because, when the signal beams are initially applied, the voltage across each diode is half the supply voltage, the device is initiaIly unstable. Therefore, any smaIl difference in the set and reset input beams will start to switch the device toward one ofits two stable states. Once the device has been at least partiaIly switched by the signal beams, the equal higher power dock beams (.1.0) can complete the switching.
Electronic gain has been touted as improving the required switching energy of the devices; however, none of the devices that have been described in the literature has accomplished this. For example, in the transistor-biased devices shown in Figure 4.35, the base-coHector capacitance needs to be
224 Chapter 4
charged directly with the photocurrent, not the amplified photocurrent. This is a direct result of the Miller capacitance that is present in common emitter or common source transistor amplifiers. More sophisticated circuits may be used, e.g., the first stage may provide current gain and later stages voltage gain. However, more complex circuits require more chip area. Also, some of these circuits may reduce the required optical energies, but still require large electrical energies.
4.5.4. Smart Pixels
In the above discussion, transistors were incorporated with quantum weil modulators and detectors to provide gain and input-output isolation. That is, their purpose was to make three-terminal devices. However, that is only one application of the integration of electronics with quantum well modulators and detectors. Perhaps more widely applicable is to use the detectors and modulators to interconnect electronic circuitry. There are at least two physical configurations that may make sense (Figure 4.37). The first approach is to concentrate the optical inputs and outputs in a 2-D array, surrounded by the electronic circuitry. This approach is probably the simplest to implement today, because the electronics can be separated from the modulator array on different chips. An advantage of this approach is that the optical field of view is kept smalI, although it will be larger than a SEED array of the same number of inputs and outputs, because the devices will need to be spread apart to allow electrical connections to the modulators. However, the disadvantage is that the interconnections will be limited by the number of electrical paths that one can reasonably get into the modulator array, much like today's electronic chips are limited by the number of input/output pads around the periphery of the chips.
Another approach is to integrate the electronics together with the optical inputs and outputs. This approach, often referred to as smart pixels, solves the wiring problem because all electrical interconnections are short.
photoni s
• • •••• •••• (a)
jsman pixel
~ • • • • • • • • • • •
(b)
• • • • Figure 4.37. Electronics integrated with
SEEDs. (a) Electronics on the periphery; (b) smart pixels.
Optical Logic Devices 225
However, this approach has the disadvantage of requiring a larger optical field of view and may require the monolithic integration of the electronics and the quantum weil modulators, something that has been demonstrated on a sm all scale as was discussed with the F-SEEDs, but has not yet been done on a large scale. Also, the integration of quantum weil devices with silicon VLSI has not been done, although promising results have been shown growing quantum weil modulators on silicon substrates.(I25, 126) Several spatial light modulators have been integrated with silicon integrated circuit technology, such as PLZT modulators.(l27)
4.5.5. Other SEEDs
Several other SEEDs have been proposed and demonstrated that may prove useful for photonic switching.
One is a modulation convertor(128) shown in Figure 4.38 that consists of a GaAs/ AIGaAs MQW p-i-n diode connected in series with an InGaAs/InP MQW p-i-n diode. In this device, the wavelengths of the excitonic peak at 0 V external bias, Ao, were ",850 nm and '" 1.6 pm for the two diodes, respectively. In this device, one diode has an incident modulated beam and the other diode has an incident CW beam. The modulated beam causes the device to switch, thus transferring the modulation to the CW input light be am of the other wavelength. One notable feature of the device is that it behaves symmetrically, that is, modulation may be transferred from a lower wavelength to a higher one or from a higher one to a lower one.
Another is a SEED based regenerator shown in Figure 4.39.(129) The SEED regenerator performs clock recovery, retiming, and logic level restoration (amplification) of an input data stream. The first component of the regenerator is a SEED oscillator. Because the MQW p-i-n diode modulators shows negative resistance at Ao, they can be made to oscillate by designing the appropriate load. SEED oscillators have been demonstrated at frequencies as high as 110 MHz using devices that were rather large.(130) This SEED oscillator can be injection locked to an incident optical input signal. By using the incoming pseudorandomly modulated data input to injection lock a SEED
Figure 4.38. Wavelength convertor SEED.
226
~CWL,., .-injection locked o cillator
." I
Figure 4.39. SEED optical regenerator.
Chapter 4
oscillator, the oscillator puts out the correct frequency corresponding to the dock of the data input, thereby performing the dock recovery function. This dock is then used in conjunction with the incoming data modulated input signal to restore logic level and timing to the signal through a simple AND gate. Because discrete components were used for the demonstration, bit rates were limited to a few kilohertz. Integrated components should produce much faster regenerators.
4.5.6. Other QCSE devices
Two devices will be described that use the QCSE without externailoads or circuits. Perhaps the best way to operate these devices in a system would be using pump-probe techniques, where the pump sets the state of the device and the probe reads the state. By using mode-Iocked picosecond pulses for the pump and probe beams, the device can be read without altering the state of the device; that is, the device cannot respond fast enough to change its absorption until the probe beam is finished.
The first of these devices are the MQW hetero n- i-p-i structures.(131) The basic device is illustrated in Figure 4.40. The basic structure consists of a small number of quantum wells, say eight,031) sandwiched between p-type and n-type wide-gap material. This basic structure is repeated several times until there are enough quantum wells to provide the desired amount of absorption change. In operation, with no incident light there is an electric field present across each quantum weil region because of the contact potential or built-in field from the diodes. When light is absorbed in the device, the photogenerated electrons and holes are spatially separated by the electric fie\d and move into the p and n regions. These excess carriers in turn reduce
Optical Logic Devices
Figure 4.40. Multiple quantum weil n-i-·p- i device. (a) Illustration of structure; (b) band diagram .
(a)
227
n - AIGaA i-MQW
p- AIGaA i-MQW
· • •
~~ n i-MQW P i-MQW n i-MQW p i-MQW n
(b)
the electric field across the quantum weIl region, thus changing its absorption. After aperiod of time, the photogenerated carriers recombine and the device is essentially reset to its "high" field state and ready for more inputs.
Since the nonlinear effect in the MQW n- i-p- i devices and the SEEDs are the same, the relative operating energies (in terms of optical power) are the same. In these devices, the maximum voItage across the wells is determined by the contact potential of the diode, and this voltage is nearly fixed for a certain material system. The electric field across the wells can be controlled by changing the number of wells in the intrinsic regions. Using only a few wells means that there will be a relatively large electric field and a corresponding large change in absorption coefficient, but since there are only a few wells the overall absorption will be small unless a number of repeat periods are used . For the devices described in Ref. 131, there were eight wells in the intrinsic region, which gave an electric field of 8 x 104 V Icm which is comparable to the fields normally applied across SEEDs.
The speed of these devices is limited by the recombination times of the photocarriers. These times are somewhat increased because of the spatial separation of the charges, unless they recombine on the sidewalls of a mesa. The recombination times have been in the microsecond time frame. By comparison, in SEEDs, the carriers are swept out as photocurrent and switching in less than I ns has been observed.(123) However, it may be possible to design the MQW hetero n-i- p- i devices for faster recombinatioll. However, if the recombination is too fast, the carriers will not be sufficiently separated into the respective p- and n-type regions and the electroabsorption will be lost.
A similar device is the diffusion-assisted optoelectronic switch or DAOS device(132) shown in Figure 4.41. In this device an MQW p- i-n diode is reverse-biased without a load resistor. When the optical input is applied, photocarriers are created in the wells which then move through the wells vertically. After reaching the p and n regions, the packet of charges screen
228 Chapter 4
1<0 t=O
~~
Figure 4.41. Diffusion-assisted optical switch.
the externally applied field causing the device absorption to change. At this time a probe beam reads the state of the device. Finally, the carriers diffuse laterally and come out as photocurrent, and the screening voltage disappears. The advantage of such a device is that, ideally, the packets of charge remain localized, that is, the screening only takes place in a smaH region defined by the spot size. (This should be true in the n-i-p-i devices as well.) Thus, an array of devices is fabricated by simply fabricating one large mesa. However, in the initial device, the lateral movement of the carriers in the p and n regions was too fast; as soon as the electrons escaped from the weHs they diffused lateraHy very quickly, thus they did not remain in the p and n regions long enough to collect all the charge for the probe beam to read them out. Efforts are under way to "slow down" the lateral movement of the carriers. In this device, mode-Iocked lasers must be used, since the probe be am must read the state of the device before the carriers generated from that be am escape from the weHs and alter the field. Because of the simplicity of both this and the MQW hetero n-i-p-i devices, they are inherently single-ended and thus require good contrast ratios to be considered for photonic switching systems.
4.6. Active Switching Transistor Devices
There are two basic types of active logic devices. The first of these are the light switching "thyristorlike" devices, and the most prevalent of these are the DOES.(I33) The second type is the integration of photodiodes, electronics, and lasers, similar to the smart pixels discussed in the last section, but using active devices instead of modulators. Only a limited amount of work has been done in this area, and most of it with light-emitting diodes (LEDs) as the active device.
Optical Logic Devices
RIeFET
p-n JunCllOn
229
I Ughl .mi, ;00
barrier layer ~ ________ .charge heet (30A p ++)
1.0 m GaAs n collector
substrate
+ Figurc 4.42. p-channel DOES device.
The DOES,(\33) illustrated in Figure 4.42, is a digital active opticallogic device with "high" and "low" light emitting optical output states corresponding to electrical states of high impedance (low optical output) or low impedance (high optical output). The device can be driven from one state to the other either electrically or optically. The optical output can be either a lasing output or LED output; most prevalent have been the LEDs because they are simpler to make. Since the device is optoelectronic, like the SEEDs, many functionalities are possible. In this section we will describe the basic device, and focus on a few of the functionalities that have been realized using these devices.
The DOES essentially consists of an inversion channel heterojunction bipolar transistor (BICFET)(134) integrated vertically with an additionalp-n junction as shown for the p-channel devicc in Figure 4.40. The BICFET is a high-performance heterojunction transistor that, unlike heterojunction bipolar transistors, contains no base. The p-channel device in Figure 4.40 contains a thin (~30 A)p + layer or charge sheet sandwiched between widegap (AIGaAs) and narrow-gap (GaAs) n layers. An inversion channel, a channel in which the dominant carriers are now holes, forms between the two n regions. The purpose of the charge sheet is merely to act as a source of holes; that is, hole current in the inversion channel controls the colJector-emitter electron current, thus the device has current gain, like a bipolar transistor, yet it contains a channel, like a field effect transistor.
In the DOES, the BICFET takes the place of a bipolar transistor in a conventional thyristor.(I35) The current ftow in the DOES is somewhat
230 Chapter 4
different from that of a standard p-n-p-n device, although externally their current-voltage characteristics are the same.(!33) A diagram of the current f1.ow for a p-channel device is explained in Ref. 133. n-channel devices have also been made.(!36) The switching characteristic for the p-channel device will be described below. Under forward bias in the high-impedance state, the collector region is depleted of all carriers, while the collector-substrate p-n junction is forward-biased. Initially, there is the high-impedance state, because few carriers f1.ow through the depleted collector and there is a large voltage drop across the collector. When excess carriers (holes) are genera ted in the collector region because light is shown on the device or thermally due to an increase in voltage, switching begins. The excess holes generate an even larger increase in electrons f1.owing in the barrier (emitter) layer because of the gain ofthe device. Without recombination in the depleted collector, these electrons must cause an increase in electron current of the collector -substrate p-n junction. The hole current in the collector-substrate diode must also increase with the electron current because the external current f1.owing out the ohmic contact to the substrate remains smalI. This hole current now causes a further increase in the barrier hole current, which causes further increase in the barrier electron current, etc. There is positive feedback so long as the collector-substrate hole current density is greater than the holes generated by the input light (or thermally genera ted holes from increasing the supply voltage). The positive feedback mechanism stops when there are so many carriers in the collector region that they now readily recombine. It is this recombination that is responsible for light emission.
One can also understand the operation of the DOES using load lines similar to what was described for SEEDs. For the simplest device, the load consists of a resistor and apower supply. In Figure 4.43, we see that for small amounts of light, the device will be at point A. Point A is in a region of high electrical impedance and no optical output. As we increase the input
V
R
P [ ,
n
p
n
C
ß
'fR
light input no light input
v
Figure 4.43. Load line representation of the DOES.
Optical Logic Devices 231
light intensity, there is no longer an intersection point near A and the device will switch to point B. At this point the electrical impedance is low and light is emitted. When the input light is removed, the operating point returns via the origin to point A, provided the electrical supply is momentarily set to zero.
The device can be electrically switched as folIows. Again assuming no input intensity, the initial operating point is at point A. If we increase the power supply voltage, the device will switch to point C. Point C, like point B, is in the region of light emission and low impedance. To turn off the device, the power supply must then be reduced to zero, at which point it may be increased up to some voltage Vcrit at which switching occurs.
To induce electrical switching in a simpler manner, three-terminal devices have been made that use a third contact to the collector of the BICFET.(137) These devices, known as LEDISTORS or LASISTORS depending on whether the emission is stimulated or spontaneous, use the third terminal voltage to either control the hole concentration in the channel by the injection of electrons into the collector-substrate junction or control the charge in the inversion channel directIy. Since the charge in the channel controls the current flow in the device, improved performance results if the third terminal is contacted directIy with the charge sheet that becomes the inversion channel. (138) The effect of the third contact is, under the appropriate bias, to reduce the supply voltage required for switching in a manner similar to that illustrated for light inputs in Figure 4.43. That is, the voltage applied directly to the third terminal can switch the device electrically, without the need to turn on and off the supply voItage.
Since the DOES devices are optoelectronic, combinations of them can yield improved performance and increased functionality compared with a single device with a resistor. One example ofthis is a differential device made by simply connecting two DOES devices in parallel and connecting that combination in series with a resistive load as iIIustrated in Figure 4.44.(139)
R Pinl Pin2
! ! p p
n n
p p
n n
1 - - 1 - -Poull Pollt2
Figure 4.44. Differential comparator DOES device.
232 Chapter 4
The operation of the device can be described as follows. When the device is biased below threshold, that is, with the device unilluminated, both optical switches are "off." When the device is illuminated, the one with the highest power is switched "on." The increase in current leads to a voltage drop across the resistor which in turn leads to a lowering of the voltage across both optical switches. Therefore, the one with the lower input cannot be switched "on." Unless both inputs were illuminated with precisely the same power and both devices had identical characteristics (both of these are impossible), only one of the two optical switches will emit light. Differential operation from -0.6 mW to -4 mW was obtained with this device.
This device can be operated as a sense amplifier as weIl. (140) In sense amplification operation, the voltage is ramped up from zero to a voltage greater than threshold while the input signals are applied. When the voltage reaches threshold, the one with the small amount of light on it will be preferentially turned "on." By the argument above, the other diode is prohibited from turning "on." Therefore, this device also acts as a differential comparator. The device is actually turned "on" using the electrical supply voltage; the optical input just preferentially determines which diode is "on" as opposed to in the non-sense-amplified comparator, where the optical signal had to supply the switching energy as weIl. This allowed the required optical input powers to be reduced from fractions of a milliwatt to subnanowatt levels.
The switching speeds of these devices are rather impressive, especially considering that all of the devices made to date are quite large. For electrical switching, the Re time constants determine the speed ofthe device, provided the third contact (ifused) is attached to the channel directly.<\38) The optical turn-on time is limited by the time it takes the photogenerated carriers to diffuse into the light-emitting region. (141) Optical turn-off times are also limited by Re. For devices made so far, the Re time constants are in the range of 1-10 ns, and optical switch-on times were in the tens of nanoseconds. Performance of the devices is expected to improve as the areas are reduced, switching times comparable to the best electronic devices (tens of picoseconds) are possible, although the optical turn-on times of at least the surface emitting LED devices will continue to be slower since this time is determined by diffusion effects and not device capacitances and resistances. Lasing devices should off er improved optical turn-on times.
Switching powers or switching energies have been high because of the large sizes of devices and the fact that all of the surface emitting devices have been LEDs. The required input optical switching energy density can be quite low (0.02 fJ / Jlm2) if the device without light is biased critically just below threshold.<\38) As described above, the differential DOES using sense amplification gives a device that operates at very low powers and with only a few picojoules ofincident optical energy. However, the electrical switching
Optical Logic Devices 233
energy is much higher. For all LED-based devices, the electrical power dissipation is much too high since currents need to be at least tens of milliamperes. AdditionaJly, incoherent light from an LED cannot be effectiveJy coJlected from small devices or focused onto smaJl devices. Therefore, the LASING DOES or LASISTOR(137) is needed in order to reduce the total power dissipation to acceptable levels,(142) although the laser in this device was not surface emitting. Surface emitting microlasers(l43,144) provide an ideal laser because of their smaJl size, single mode operation, and low thresholds. The surface emitting microlasers consist oftwo AIAs/ AIGaAs dieJectric mirrors with a thin active layer in between. This active layer typicaJly consists of one or a few MQWs. The material is etched vertically into small posts, typicaJly 1-5 J.lm in diameter. Thresholds are typicaJly on the order of a miJliwatt.
The DOES provides a very compact device with much functionality. Another approach to active devices might be to combine lasers with electronics and photodiodes as has been proposed for optical interconnections of electronic circuits. Since the logic function is implemented with electronic circuitry, any functionality can be achieved. Several examples of logic gates have been made using GaAs circuitry and light-emitting diodes. Again, surface emitting microlasers provide an ideal emitter for this purpose, because of their small size and low threshold current. However, the integration of these lasers with the required electrical components has yet to be demonstrated.
4.7. Conclusion
The Optical Society of America organizes annual Topical Meetings on Optical Computing and Photonic Switching, Since their inception in the mid-1980s, they have been the largest conferences dedicated to these fields. The papers presented at these conferences are representative of the changes in the direction of research and development. Initially, all-optical bistable devices were proposed for use in systems. The perceived advantage of minimizing or even avoiding any photonic-electronic transformations was a strong attraction. Consequently, there was a great deal of work on optical nonlinearities which was justified by its potential application to these areas. However, after several years, it is apparent that, even with the ability to engineer semiconductors at an atomic level, the achieved switching energy of all-optical devices is several orders of magnitude greater than that required. The drop in the interest in all-optical nonlinearities is demonstrated for example by the failure of the OSA Topical Meetings on Optical Bistability to continue after 1988, by the fall in the papers submitted to
234 Chapter 4
journals, and by the groups that have moved onto fields which show more promise.
In addition to the large switching energy of all-optical nonlinearitybased logic gates, another aspect of their performance has speeded their decline as viable devices: all of them must be critically biased. The best allopticallogic gates may, in several years' time, be developed to a point where subnanosecond switching times are possible, simultaneously with room-temperature, continuous operation of hundreds of channels at laser diode output powers and wavelength. Unfortunately, such a device would still not be viable due to the poor tolerance all such devices have to loss of uniformity. Even a high-contrast device must be able to tolerate large fluctuations in the signal powers incident on it. All-opticallogic gates are intrinsically threshold devices that must be critically biased to achieve gain. In addition, they are two-port devices that are independent of however the signal beam is incident on the device. As a consequence it can be shown that even in unrealistically ideal circumstances ofno variation in response across the array, the tolerance to loss ofuniformity in the signal beams would be only ±1O%. To ensure that the uniformity is always this good is probably impossible in any commercial application.
It is also unnecessary to always achieve this uniformity, since with the invention of differential optical logic devices came the ability to construct devices that are several times more tolerant. In addition, the use of hybrid devices has brought with it the possibility of decreasing switching energies to comparable levels as electronic logic. The short-term future of optical logic devices is therefore concentrating on the developments detailed in the final section of this chapter-the integration of electronic logic and optical modulators to provide optical interconnections.
4.8. Problems
I. Show that
2. Using Eq. (4.3.24) show that
a.
b.
Optical Logic Devices 235
3. Given two mirrors of reflectance R I and R2 separated by a distance d, show that the total interferometer transmittance can be given by
(Assurne that any phase shift at the mirror interfaces can be ignored.)
4. Using Figure 4.3, derive Eq. (4.3.10).
5. Derive Eqs. (4.3.11) and (4.3.12) from Eqs. (4.3.9) and (4.3.10).
6. Show that the transmission through a Fabry-Perot etalon can also be represented as
Er tt' e -jwd/c
Ei 1 - r,2 e -jwd/c
7. Show multistability by substituting (4.3.30) into (4.3.16) and plotting the result for both Fe = 5 and 100.
8. a. Calculate the required optical energy for a single beam incident on one of the two diodes of an S-SEED with a capacitance per diode of 20 fF, apower supply voltage of 10 V, and an average responsivity of 0.5 A/W?
b. How much energy is required from each of the two beams if the input contrast ratio is 2: I?
Answer:
E=2CV/S a. E = 400 fJ b. E = 800 fJ, 400 fJ
9. The input to a SEED consists, in the simplest case, of the output from a SEED in the previous stage attenuated by the optics interconnecting the devices. At what bit-rate would a system consisting of cascaded SSEEDs operate if the reflectivities of the devices in the two states are 10u;;, and 30'Y(" the transmittance of the optics between stages 50%, the required difference in energy between the two beams 200 fJ, and the dock power incident on each ofthe diodes ofthe previous stage 100/lW?
Answer:
P2 = 100 x 0.30 x 0.50 = 15 /lW PI = 100 x 0.10 x 0.50= 5/lW Differential power = 10 /l W
236
Differential energy = 200 fJ Switching time = 20 ns Bit-rate = 1/2 switching time = 25 Mb/s
Chapter 4
10. A device of very high contrast ratio can be made by placing the MQW material in aresonant cavity between the bottom dielectric mirror and the top surface of the device (without an antireflection coating). On resonance, the reflectivity is given by
R = [jR~ - tfif [1 - tJR1R2f
where t is the transmissivity of the quantum well region in one direction and jR; and JR;. are the front and back reflectivities, respectively. If a reflective modulator with a front surface that has been antireflection coated has been made with reflectivities of 10% and 30% in the two states, what is the reflectivity in the "high" state for an asymmetrie Fabry~Perot modulator that is made from quantum well material with the same absorption coefficients assuming the "low" state reflectivity is zero and R 1 and R2 are 31% and 95%, respective1y?
Answer:
For the original device calculate the absorption lengths: alpha (low state) x length = -0.5 In (0.10) = 1.15 alpha (high state) x length = -0.5 In (0.30) = 0.60
Next, calculate t for R = 0: t = 0.55/0.97 = 0.57
Next, calculate new absorption lengths for that t (in the low state) alpha (low state) x new length = -ln (0.57) = 0.56
From this result we find the new length in terms of the old length: alpha (low state) x new length/alpha (low state) x old length =
0.56/1.15 = 0.488 That is, the ASFP device is 0.488 times as thick as the antireflectioncoated device
alpha (high state) x new length = alpha (high state) x old length x 0.488
= 0.60 (0.488) = 0.2928
t = exp [-alpha (low state) x new 1ength] = 0.57 t = exp [-alpha (high state) x new 1ength] = 0.746 Substituting into the above equation: R (low state) = 0 R (high state) = 13.6%
Optical Logic Devices 237
11. The required optical energy that must be supplied to the programmable logic array (PLA) in Figure 4.34 can be approximated by counting the number of diodes that change state. How much larger is the PLA energy relative to an S-SEED energy if they operate at the same voltage and have the same capacitance?
Answer:
Six (two input diodes above the node and two input diodes below the node must change state; in addition, both output diodes change state).
12. If a DOES device requires 5 mA of current to produce a usable amount of power and has a forward bias voltage of 1 V when lasing, and has a turn-on voltage (near point A in Figure 4.43) of 6 V at 1 J1A, wh at is the minimum value ofload resistance that can be used? (Assume apower supply of 6 V is used.)
Answer:
Supply voltage is 6 V. 5 V /5 mA = 1 K
13. If the same device has a capacitance of 50 fF,
a. What is the electrical energy dissipated during switching?
b. What is the average power dissipated in the device?
c. What is the average power dissipated in the load?
Answer:
a. E = (1/2) CV2 = (1/2)( 50 fJ)(25) = 625 fJ
b. Power in device when "on" = 1 V (5 mA) = 5 mW Power in device when "off":
Voltage across device when "off" = 6 V - 6 x 1 J1A/1.2 mA =
5.95 V Power in device when "off" = 5.95 V x 1 J1A = 5.95 J1W
Average power is 2.5 mW if the device is on half the time
c. Power in resistor when "on" = 5 V (5 mA) = 25 mW Power in resistor when off = 0.05 V (1 J1A) = 0.05 J1 W Average power is 12.5 mW if the device is on half the time
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Optical Logic Devices 243
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118. A. L. Lentine, D. A. B. MiHer, J. E. Henry, J. E. Cunningham, L. M. Chirovsky, and L. A. D'Asaro, Optical logic using electrically connected quantum weil p-i- n diode modulators and detectors, App/. Opl. 29, 2153-2163 (1990).
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120. S. Hong and 1. Singh, Theoretical investigation of an integrated all optical controller modulator device using QCSE in a multiquantum weil phototransistor, IEEE J. Quantum Electron. QE-25, 301311 (1989).
121. D. R. P. Guy, N. Apsley, L. L. Taylor, and S.l. Bass, Theory ofe1ectro-optic modulator based on quantum wells in a semiconductor etalon, in: Quantum Weil and Superlatfice Physics (G. H. Dohler and 1. N. Schulman, eds.), Proc. SPIE 792, pp. 189-196 (1987).
122. A. L. Lentine, L. M. F. Chirovsky, L. A. D'Asaro, C. W. Tu, and D. A. B. Miller, Energy scaling and sub-nanosecond switching of symmetrie self electro-optic effect devices, IEEE Photon. Technol. Lett. 6,129-131 (1989).
123. G. D. Boyd, A. M. Fox, U. Keller, D. A. B. Miller, L. M. F. Chirovsky, L. A. D'Asaro, 1. M. Kuo, R. F. Kopf, and A. L. Lentine, 33 ps optical switching ofsymmetric self e1ectrooptic effect devices (S-SEEDs) in: Conference on Lasers and Electro-optics (Postdeadline Papers), pp. 604605 (1990).
124. L. M. F. Chirovsky, A. L. Lentine, and D. A. B. Miller, Symmetrie selfe1ectro-optic effect device as an optical sense amplifier, in: Conlerence on Lasers and Electro-optics, 1989 Technical Digest Series, Vol. 11, Paper M12, Optical Society of America, Washington, D.C.
125. W. Dobbe1aere, D. Huang, M. S. Unlu, and H. Morkoc, AIGaAs/GaAs muItiplequantum weH reflection modulators grown on Si substrates, Appl. Phys. Lett. 53, 9496 (1988).
126. K. W. Goosen, G. D. Boyd, 1. E. Cunningham, W. Y.lan, D. A. B. MiHer, D. S. Chemla, and R. M. Lum, GaAs-AIGaAs multiple quantum weH reflection modulators grown on GaAs and silicon substrates, IEEE Photon. Technol. Lelt. 1,304-306 (1989).
244 Chapter 4
127. S. Lee, S. C. Esener, M. A. Title, and T. J. Drabik, Two-dimensional silicon PLZT spatial light modulators--design considerations and technology, Opt. Eng. 25, 250·260 (1986).
128. I. Bar-Joseph, G. Sucha, D. A. B. Miller, D. S. Chemla, B. I. Miller, and U. Koren, Self electro-optic-effect device and modulation converter with InGaAs/InP multiple quantum wells, Appl. Phys. Lett. 52, 51-53 (1988).
129. C. R. Giles, T. Li, T. H. Wood, C. A. Burrus, and D. A. B. Miller, An all-optical regenerator, Electron. Lett. 24, 848-850 (1988).
130. C. R. Giles, T. W. Wood, T. Li, and C. A. Burrus, Quantum weil SEED optical pulse generator, in: Topical Meeting on Quantum Wells Jor Optics and Optoelectronics, 1989 Technical Digest Series, Vol. 10, pp. 115-116, Optical Society of America, Washington, D.C.
131. A. Kost, E. Garmire, A. Danner, and P. D. Dapkus, Large optical non-linearities in a GaAs/ AIGaAs hetero n-i-p-i structure, Appl. Phys. Lett. 52, 637-639 (1988).
132. T. Sizer 11, G. Livescu, J. E. Cunningham, and D. A. B. Miller, Diffusion assisted optical switch: A new logic device, in: OSA Proceedings on Photonic Switching (J. E. Midwinter and H. S. Hinton, eds.), pp. 12-14, Optical Society of America, Washington, D.C. (1989).
133. G. W. Taylor, J. G. Simmons, A. Y. Cho, and R. S. Mand, A new double heterostructure optoelectronic switching device using molecular beam epitaxy, J. Appl. Phys. 59, 596600 (1989).
134. G. W. Taylor and J. G. Simmons, The bipolar inversion channel field effect transistor (BICFET)-A new field effect solid-state device: Theory and structures, IEEE Trans. Electron Devices ED-32, 2345-2367 (1985).
135. See, e.g., B. G. Streetman, Solid State Electronic Devices, Prentice-Hall, Englewood Cliffs, N.J. (1972).
136. See, e.g., G. W. Taylor, R. S. Mand, A. Y. Cho, and J. G. Simmons, Experimental realization of an n-channel double heterostructure optoelectronic switch, Appl. Phys. Lett. 48, 1368-1370 (1986).
137. G. W. Taylor, R. S. Mand, J. G. Simmons, and A. Y. Cho, Ledistor: A three-terminal double heterostructure optoelectronic switch, Appl. Phys. Lett. 50, 338-340 (1987).
138. D. L. Crawford, G. W. Taylor, P. Cooke, T. Y. Chang, B. Tell, and J. G. Simmons, Optoelectronic transient response of the self-aligned double heterostructure optoelectronic switch, Appl. Phys. Lett. 53, 1797··1799 (1988).
139. K. Kara, K. Kojima, K. Mitsunanaga, and K. Kyuma, Differential optical comparator using parallelly connected AIGaAs pnpn optical switches, Electron. Lett. 25, 433-434 (1989).
140. K. Kara, K. Kojima, K. Mitsunanaga, and K. Kyuma, Differential optical switching at subnanowatt input power, IEEE Photon. Technol. Lett. 1,370-372 (1989).
141. D. L. Crawford, G. W. Taylor, and J. G. Simmons, Optoelectronic transient response ofan n-channel double heterostructure optoelectronic switch, Appl. Phys. LeU. 52, 863-865 (1988).
142. G. W. Taylor, P. Cooke, P. Claisse. M. G. Young, T. Y. Chang, and B. I. Miller. A single quantum weil DOES laser for optical computing, IEEE LEOS Annual Meeting, Paper OE-25, p. 19 (1989).
143. J. L. JeweII, A. Scherer, S. L. McCall, Y. H. Lee, S. Walker, J. P. Harbison and L. T. Florez, Low threshold surface emitting microlasers, Electron. Lett. 25, 11231124 (1989).
144. J. L. JeweII, Y. H. Lee, A. Scherer, S. L. McCall, N. A. Olsson, J. P. Harbison, and L. T. Florez, Surface emitting microlasers for photonic switching and interchip interconnections, Opt. Eng. 29, 210214 (1989).
5
Free-Space Optical Hardware
5.1. Introduction
Free-space digital optics is a topic based on many disciplines: nonlinear optics, computer and switching network architectural design, semiconductor physics, mechanical design, and, of course, optical system design. Initial work in this area concentrated on the discovery and development of nonlinear optical effects with which to form optical switching devices or logic gates. Progress on the device front stimulated research on switching and computing architectures to capitalize on the potential advantages of freespace digital optics. However, without arrays of practical devices, realistic demonstrations of these architectures were not possible. With the development of batch-fabricated symmetric SEEDs, nonlinear interference filters, and liquid-crystal and magneto-optic spatiallight modulators, more complex system experiments became possible. (I 5) The demonstration of these experiments required careful attention to the optical and opto-mechanical system design, in addition to significant device and architectural research.
A generic schematic of a free-space digital optical system is shown in Figure 5.1. We wish to communicate information from one device array to another. Instead of using electronic signals and wires, connections are made with optical signals, and the wires are "replaced" by an array oflight beams. These beams pro pagate between the two arrays of devices and are focused to spots at the device array planes. The beams from each device array may be from self-Iuminous emitters (lasers or LEDs) or the beams may be generated external to the device array and modulated by the devices on the array (see Chapter 4). The "output pins" of a device array are now an image consisting of a two-dimensional array of spots, corresponding to the spatially separated emitters or modulators. The optical system between the device arrays must collect the light from this image, manipulate the image to perform the desired interconnection pattern, and then refocus the spot array image onto the detectors of the second device array.
245
246
Inputs
Device Array
Device Array
Figure 5.1. Basic optical interconnection task.
Chapter 5
Outputs
In the implementation of this task, we must make decisions and tradeoffs between different types of imaging and interconnection arrangements. The system examples in this chapter share several common goals. The optical power lost along the path from one device array to the next must be minimized, since the available optical signal power will influence system speed and reliability. The cross talk, or coupling of light between channels should be minimized. To be practical, the systems should be simple, and use few components. The time required for assembly and alignment, as weil as the thermal and mechanical stability are also important practical issues. Modular system designs help these issues in addition to improving the system repairability. Finally, the systems must ultimately offer a significant cost and/or performance advantage over other technologies (e.g., electronics).
This chapter discusses the basic optical effects and hardware components required to implement a switching or computing system based on freespace digital optics. It concentrates on the concepts and issues commonly dealt with in free-space optical hardware design. This will familiarize the reader with many of the basic concepts and terminology especially relevant to free-space digital optics, and relate practical details that are useful in experimental work. Since imaging is fundamental to free-space digital optics, simple imaging is reviewed, and the accumulation of aberrations is discussed in Section 5.2. Polarization effects are widely used in these systems, and a review of the practical aspects of these effects is given in Section 5.3. Techniques for generating the arrays of beams or spots which form the "wires" in these systems are discussed in Section 5.4. A major issue in these systems
Free-Space Optical Hardware 247
is the problem of combining the many input signal beams with the "power supply" optical beams, and then providing a path for the output beams. This issue is discussed in the section on be am array combination and interconnection at the end of the chapter. A short summary of useful Fourier optics concepts is included as an appendix.
5.2. Imaging and Aberrations in Free-Space Digital Optics
Free-space optical switching is sometimes referred to as imaging optical switching, because most proposed systems use imaging operations to control the divergence of the optical signals and concentrate the optical power. One might think that the low divergence of laser beams might make imaging operations unnecessary, and that we could simply "steer" collections of beams from device array to device array. While this is indeed possible, it is not very practical. The reason for this is that the divergence angle of a laser beam is directly related to the be am diameter. The Gaussian beam diameter is specified by its radial intensity profile(6):
Gaussian bcam intensity = I(r) = 10 e ~2(r/w()2
full divergence angle = 0 = 4~ trdo
(5.2.1)
A common criterion for be am diameter is twice the radius, Wo, at which the intensity is l/e2 of the peak value (10). The laser wavelength is A and do =
2wo is the diameter of the Gaussian laser beam at its l/e2 intensity points. In Chapter 4, we saw how device switching energies scaled with their size, thus leading us to desire small devices and equally small diameter beams with which to address them. These small beams will have correspondingly large divergence angles, and thus will increase in size very quickly as they propagate toward the next device array. For example, assurne we have a (5 j1m)2-sized device and a (5 j1m)2-sized beam at a wavelength of 850 nm is being transmitted through or reflected from it. This be am will have a divergence angle of about 12° and after propagating only I cm, it will have grown to be over 2 mm in diameter! Depending on the sizes and spacings of the devices in the second array, only a small part of the beam's energy will couple into the devices, and significant cross talk may result. Guided wave optical systems control this divergence with waveguides; free-space optical systems can similarly concentrate the signal power by imaging. The imaging systems must have the following characteristics:
I. High resolution to collect all ofthe light from small sources or modulators and concentrate the signal energy onto small detectors. As discussed in Chapter 4, this minimizes the switching energy required.
248 Chapter 5
2. Isoplanaticism, so that the size, shape, and energy content of the signal spots do not change significantly across the array of devices. This implies an optical system with very little aberration, and no "clipping" or vignetting of the signal beams wh ich might cause energy differences between them.
3. Low loss since power loss may affect system speed and tolerances.
Two types of imaging have been proposed for this signal concentration function: microlens array and bulk optical systems. Microiens array systems will not be discussed in detail in this chapter, but the following brief overview will provide the basic idea behind these systems. The microlens approach dedicates aseparate optical system for individual or small groups of optical signals, as in Figure 5.2. Each pair of microlenses forms a "Iens waveguide" to limit the effects of diffraction. Systems using this approach have been proposed,(7-9) and preliminary experiments have been constructed. (I 0 13) As these microiens systems attempt to provide high densities of interconnections, the systems issues of mechanical alignment, optical power loss, and
Device Array Device Array Microlens arrays
(a)
Device Array Device Array Bulk optics
(b)
Figure 5.2. Microlens array and bulk optical interconnections.
Free-Space Optical Hardware 249
signal cross talk between channeIs become limiting factors. These issues have not been extensively explored, but work in this area is being pursued.(l4,15) In the bulk optical approach, the entire array of devices is treated as a single object, and it is imaged onto the next device array much as a scene is imaged onto the film in a camera. This bulk imaging technology is weil understood, and although it is still a rapidly developing area, it is a well-established technology. As a result, several complex bulk optical free-space system experiments have been demonstrated to date. (1-5) Most of the optical hardware issues in free-space digital optical system design are common to both bulk and microIens systems.
In this chapter we will concentrate on bulk optical implementation examples, and this section will quickly review first-order optics and thin lens imagery, discuss the wave-front aberration equation, the primary geometrie aberrations, lens resolution, and optical system space-bandwidth product.
5.2.1. First-Order Optics
Optical imagery can be investigated in several ways and at severallevels of precision. The two main approaches are physical optics and geometrical optics. Physieal optics design directIy models the wave nature of optical propagation, and accurately describes wave phenomena such as diffraction and interference. While it is more physically representative, it also requires more complex calculations and thus a good deal of computing power, and the numerical simulation techniques may generate errors of their own if used incorrectIy. Fortunately, commercial physical optics design programs are becoming available which can help novice users avoid many common pitfalls. Geometrie opties design is much more commonly used since the computing requirements are gene rally less demanding. Geometrical and physical optical models converge in the limit as the wavelength of the light in the optical system decreases to zero. Geometrical optics models the optical wave fronts by tracing rays as they are refracted or reflected by the surfaces of the optical system. These rays represent the normals to the wave front, and they are refracted according to Snell's law:
(5.2.2)
where nl,2 are the refractive indices of the incident and refracted media and (}1,2 are the incident and refracted ray angles, as in Figure 5.3. By recording the optical path lengths of an array of rays as they traverse the optical system, we can reconstruct the "geometrie" wave front as it exits the system, thus providing a link back to the physical optics interpretation. This is the method used by most ray tracing programs to provide diffraction information. The calculations required for geometrical optics design are relatively
250 Chapter 5
objecl
Figure 5.3. Imaging by a single refractive surface.
simple, and computing power or time required is largely dependent on the number of rays traced.
Perfeet "point-to-point" or stigmatic imagery requires that a spherical wave diverging from an object point be collected by an optical system and converted to another spherical wave converging to an image point. For the simplest case of a single refracting surface, the surface must have a nonspherical shape. This aspheric surface is much more difficult to manufacture than spherical surfaces, but fortunately, the effects of an aspheric surface may be duplicated by several appropriately spaced spherical surfaces. Additionally, there is a small region about the optical axis where the shape of the aspheric and spherical surfaces are essentially identical, and within this region spherical surfaces provide nearly ideal imagery. First-order geometrical optics design is based on the assumption that the rays in the system pro pagate only within this paraxial region. Paraxial rays pro pagate approximately parallel to, and in a small region about, the optical axis (the axis of rotational symmetry of the optical system); thus, the angles of incidence of these rays on the surfaces of the lenses in the system are small. This assumption has many implications, one of wh ich may be seen by examining the power series expansion of sin ():
()3 ()s ()7 sin () = () - - + - - - + ...
3! 5! 7! (5.2.3)
For small values of (), the ratio of the terms in () raised to powers greater than one to () is smalI, so we can approximate sin () ~ (), and thus Snell's law may be rewritten:
(5.2.4)
Free-Space Optical Hardware 251
While today's readily available computing power makes ray tracing quick and easy, before the advent of computerized ray tracing simplification of the calculations was needed to complete many designs. Even today, these simplifying assumptions let us develop an intuitive "feel" for the basic imaging characteristics of an optical system without complex calculation. In addition, first-order optics is a means for easily determining the physical characteristics of an optical system: the image size and location, overall system size, the light-gathering power of the system, and so forth.
Under the paraxial approximation, all of the rays exiting from an object point on the optical axis will be refracted by spherical surfaces such that they all converge to the same image point. Another way of stating this is that upon refraction by a spherical surface, an incident paraxial spherical wave front (e.g., from a point source on axis) is transformed into an exiting wave front which is spherical. Such a wave front will form an "ideal" image point at the wave front sphere's center. This is the basic definition of perfeet imagery for a point object. The size of the paraxial region about the optical axis depends on the aberration correction of the system, since imagery within the paraxial region is essentially perfect (although "perfect" may be a very qualitative term, and is often dependent on the application). First-order theory thus provides a "reference" with which we may measure the system aberrations. Since the first completely general analysis of this approximation is usually attributed to C. F. Gauss, "first order," "paraxial," and "Gaussian" optics are all commonly used to refer to the simplified model. By measuring the differences between rays traced by Snell's law and the ray positions predicted by paraxial theory, we can quantify the aberrations present in the system. Using only the first- and third-order terms, third-order aberration theory, discussed in the next section, provides a framework for investigating nonideal imagery.
Using the paraxial approximation, the first-order imaging properties of a single surface (Figure 5.3) may be derived{16l:
nl + nz = n2 - nl
So Si R (5.2.5)
where nl and n2 are the refractive indices, object distance So is positive if it is to the left of the surface vertex, V, image distance Si is positive if it is to the right of V, and the surface radius of curvature R is positive if its center, C, is to the right of V. The object and image positions, So and Si are called the conjugate positions.
Most lenses consist of at least two refracting surfaces, and by applying Eq. (5.2.5) to both surfaces sequentially, some algebraic manipulation leads
252 Chapter 5
to the Gaussian lens equation(17):
1 I 1 -+ - =--So Si I
(5.2.6)
where
(5.2.7)
is the effeetive Ioeal length (efl) of the thiek lens in air. The lens index of refraetion is nI, the radii of eurvature of the two surfaees are R) and R2, and the lens thiekness is d. The efl is the distanee between the Ioeal planes and the principal planes of the lens. The first foeal plane is the loeation from whieh the diverging rays from an on-axis point souree exit the lens parallel to the optieal axis, as in Figure 5.4a. This eorresponds to an infinite image distanee, Si = 00, or a eollimated output beam. The seeond foeal plane is the loeation to whieh a eollimated input beam (so = (0) is foeused, as in Figure 5.4b. Due to the finite thiekness of the lens, as an ineident ray is refracted at eaeh surfaee its exiting height on the lens is different from its incident height. The prineipal planes are the surfaees formed by the intersections of extensions of the entering and emerging rays. They may reside inside or
primary principal
plane
"principal urface"
objecl plane
.. eH
• fft"
{al
set;on~arl prmclpa
plane
"principal surface" •
(b)
image plane
eil ..
• bll ..
Figure 5.4. Thick lens principal surfaces. (al Primary principal surface and first or front focal plane ; (bl secondary principal surface and second or back focal plane.
Free-Space Optical Hardware 253
outside the lens, depending on the lens shape and refractive index. From Figure 5.4, we see that the "planes" are only planar in the paraxial region; outside this region they frequently approximate spherical surfaces. The principal points are the points where the surfaces intersect the optical axis. The front and back focallengths are measured from the lens vertices to the focal planes.
Since in many cases lenses are thin, we can simplify their modeling by neglecting the small effects of their thickness. This approximation is surprisingly useful, and for a thin lens the focal length becomes:
(5.2.8)
In this ca se of an infinitesimally thin lens, the principal planes (and vertices) naturally coincide, and the focal length is measured from the plane of the lens. The approximations of first-order optics and thin lenses may at first seem very limiting, but systems with long focallengths and smallIens diameters and thicknesses are quite accurately modeled under these assumptions. In fact, the thin lens model can even be used to estimate the aberration contributions of various elements in an optical system. (17) The Gaussian lens equation is still valid, and one example of thin lens imagery is shown in Figure 5.5. Three rays are seen: a ray entering the lens parallel to the optical axis passes through the back focal point, a ray passing through the front focal point emerges from the lens parallel to the optical axis, and a ray passing through the center of the lens is undeviated. The trans verse magnification is defined as
(5.2.9)
~
I-----~ r =i ... ~ ___ r_-__ Si
Figure 5.5. Thin lens imagery.
254 Chapter 5
where himage, objcc! are the transverse image and objeet heights, and distanee below the optieal axis is negative, The longitudinal magnifieation (along the optieal axis) is
(5,2,10)
Two lenses may be eombined to form a compound lens of foeal length
(5,2.11 )
where f1,2 are the foeal lengths, and d is the separation between the lenses. In many experimental systems, the eombination of two lenses provides a very eonvenient means of aehieving a given foeal length lens with off-theshelf eomponents.
The imaging arrangement of Figure 5,5 is ealledfinite conjugate imaging, sinee both the objeet and the image are loeated a finite distanee from the lens. This arrangement is used in optieal systems ranging from a simple magnifying glass, to photographic eameras and mieroseopes.
Infinite conjugate imaging, shown in Figure 5.6a, is used in teleseopes as weil as by the relaxed human eye, From Eg. (5.2.3), we ean see that as the objeet distanee, So, approaehes the foeallength,f, the image distanee, Si,
will get larger. When So is egual to f, the image is loeated at infinity. If a point souree is imaged in this manner, the result is a eollimated beam, as in Figure 5.6b.
In addition to the eoneepts defined so far, the following glossary introduces a few more useful terms.
• Field of view (FOV): generally refers to the angular extent of the objeet imaged by the optieal system,
f
image plane objecl plane
(a) (b)
Figure 5.6. Infinite conjugate imaging. (a) Collimated beam imaged to a point ; (b) collimation of a point source.
Free-Space Optical Hardware 255
• Image field: the image area over wh ich the system is designed to be used is commonly referred to as the image field, or simply the "field" of the system. For a circularly symmetric lens system, this field can be specified as an image diameter, F. For infinite conjugate systems, we can also define a field angle as
~1 (F) (}I' = 2 tan 2.t; (5.2.12)
• Clear aperture : the diameter of the unobstructed aperture of a lens or other element, as opposed to the edge-to-edge diameter, which may include mounting bevels or other obscurations.
• Aperture stop (AS): the lens rim, diaphragm, mask, or other element which determines the amount of energy reaching the image plane.
• Field stop (FS): the element which limits the size of the object imaged by the system and thus determines field of view of the system.
• Exil pupil (window): a pupil is an image of the AS, and a window is an image of the FS. The exit pupil is the image of the AS formed by the elements following it (between the AS and the image). Likewise, the exit window is the image of the FS.
• Entrance pupil (window): the elements between the object and the AS (or FS) will form an image of the AS (or FS) in image space, and these images are the entrance pupil (and window).
• Chief" ray: a ray directed toward the center of the entrance pupil. Since the entrance and exit pupils are images of the AS, the chief ray also passes through the center of the AS and exit pupil.
• Optical path distance: or optical path length is the product of distance times index of refraction for each segment of the ray propagation path through each element and air space of the optical system.
• Lens power: the reciprocal of the effective focal length of a lens or optical system.
• Vignetting: in many optical systems, all of the energy from object points near the optical axis is transmitted, while some energy from points near the edges of the object field is "clipped" by the AS. This loss of energy leads to an image with "faded" or dirn edges. Such an image is said to be vignetted, and in free-space optical interconnection systems, vignetting causes undesirable variation of the optical signal levels.
• Defocus: a shift of the image along the optical axis with respect to a reference plane (e.g., the device array plane).
• Depth of focus: maximum permissible defocus that a system may tolerate and still have an acceptable image. The system tolerance to defocus is very application dependent since defocus will cause the spot
256 Chapter 5
images to increase in size (blur) and mayaiso cause them to shift position laterally. These effects may cause less power to be coupled into the devices, thus slowing system speed, and/or introduce variations in signal power, causing operational eITors. The amount of acceptable size increase is dependent on the particular application, the device size, the abeITations present in the system, and the mechanical tolerances ofthe system. Computer simulations provide the most accurate means of determining system sensitivity to defocus.(I8)
• Telecentric imaging: imaging in which the chief ray is perpendicularly incident onto the image plane. Since the chief ray crosses the optical axis at the center of the exit pupil, a telecentric image implies an infinitely distant exit pupil. The exit pupil will be imaged at infinity if the AS is located in the front focal plane of the lens, or collection of elements within an optical system.
Infinite conjugate imaging is commonly used in free-space digital optical systems. One reason for this is that flat, or plano elements such as beam splitters, windows, polarization retarders, etc. may be placed in the collimated beams without introducing additional wave-front aberration. The effects of plano elements on converging or diverging beams will be discussed in the next section. Another reason for using infinite conjugate imaging is that it is simple to ensure telecentric imaging. In a nontelecentric imaging system, the co ne of rays forming an off-axis spot image is incident at an angle to the image plane. Thus, if the image plane is slightly defocused, not only will the spot increase in size, but it will also move off its associated device. Additionally, certain device structures may require telecentric im aging for efficient coupling of their optical inputs. For example, resonator and specially coated devices (such as etalon devices and nonlinear interference filters) can be very sensitive to large angles ofincidence in their input signals, and very small devices will exhibit wave-guiding properties.
A finite conjugate imaging system may be made to have a telecentric image space by positioning the aperture stop at the front focal plane of the lens, as in Figure 5.7a. In many system designs, we wish to relay the image of one device array to the next, and telecentricity in both object and image space is desirable. This can be done at finite conjugates, but it requires an additional image plane, and the introduction of a field lens to image the aperture stop of the first lens to the front focal plane of the third lens, as in Figure 5.7b. The afocal infinite conjugate image relay of Figure 5.8 provides a simpler way of achieving telecentric imaging. A telecentric afocal infinite conjugate image relay is formed by combining the lenses of Figure 5.6 with aseparation equal to the sum of their focal lengths. This telecentric image relay requires only two lenses, and these lenses may have sm aller diameters than those in the finite conjugate case. To achieve telecentric imaging in this
Free-Space Optical Hardware
• • non-telecentric
(a)
telecentric
(b)
• telecentric
image plane
257
telecentric
Figure 5.7. Finite conjugate telecentric imaging. (a) Tclecentric in image space; (b) tclecentric in object and image space.
case, the aperture stop must be located in the front focal plane of the second lens. By cascading these telecentric relay systems, we not only move the image from plane to plane, but also avoid vignetting the beams by "reimaging" the aperture stop before and after each relay. This arrangement allows the placement ofbeam splitters, retarders, etc. to be made into the "collimated space." When collimated beams pass through plane parallel plates of gl ass such as
x
object plane
aperture stop
Figure 5.8. Telecentric infinite conjugate image relay.
258 Chapter 5
beam splitters and retarders, they do not accrue any aberrations, assuming the plate surfaces are flat, and the glass is homogeneous.(19) The layout of lenses to perform telecentric image relays requires only the simple addition of focallengths to ensure that all of the rays are contained within the optical system and are not clipped by the lens edges. Telecentric infinite conjugate imaging is used in most of the examples discussed in this chapter. The object is thus an array of spots from the sources and these spots are collimated to form an array of collimated beams. The collimated beams propagate through beam splitters and other elements until they encounter another lens and are again focused to an array of spots in the image plane.
5.2.2. Geometrie Aberrations
Optical design and aberration analysis generally proceeds from firstorder design, during which the rough layout, magnifications, conjugate positions, lens diameters, and so forth are decided upon, to the next stage, where aberration effects are analyzed and compensated. The analysis of the accumulation and compensation of aberration in optical systems is a topic that has received much attention. This section will briefly introduce aberration theory by presenting some common aberration terminology, describing the third-order, or primary aberrations, and discussing the dependence of aberrations on aperture and field. Since we will be discussing laser-based systems, only the monochromatic aberrations will be reviewed.
The paraxial assumption offirst-order optics allowed us to replace sin 0 with 0 in Snell's law. If we now include the first and third-order terms of the sin 0 expansion:
03 sin 0 ~ 0 --
3! (5.2.13)
in Snell's law, we are no longer guaranteed ideal imagery. The system may not form its image at the location and to the size predicted by first-order optics. The difference in this case is due to third-order or primary aberrations, which represent a breakdown of the difference into five independent effects. Since these effects almost always appear in combination, the breakdown is somewhat artificial, but it is quite useful in understanding and compensating for the accumulation of the aberrations. This breakdown of the primary aberrations was investigated and codified by Ludwig von Seidel, who also published explicit formulas for calculating them. Hence, they are also called the Seidel aberrations. If we include more terms in the sin 0 expansion, we will see additional, but generally sm aller differences, corresponding to higherorder (fifth, seventh, etc.) aberrations. Today, exact ray tracing (i.e., sin 0 =
sin 0) is easily done on a computer, but the organization of the overall
Free-Space Optical Hardware 259
aberration into separate effects remains an important tool in understanding and minimizing the aberrations.
Aberrations are expressed as ray aberrations or as wave-front aberrations. Ray aberrations can be expressed as the difference in position between an exact ray intercept and a paraxial ray intercept in the paraxial image plane. Wave-front aberrations are measured as the deviation of the wave's phase front from that of an ideal reference sphere centered on the paraxial image point. Thus, the deformation ofthe wave front from an ideal spherical shape is the wave-front aberration. Wave-front aberration concepts offer a more physically intuitive perspective of the system, especially for well-corrected, or "diffraction-limited" systems. Additionally, when expressed in terms ofthe wave-front, aberration contributions from several elements in an optical train may be simply added together to determine the total wavefront aberration (to sum ray aberrations, the relative magnification between the elements must also be incorporated). The wave's phase front is usually determined by recording the optical path distances of a "fan" of rays as they propagate through the system. Historically, the ray aberration interpretation has been more widely used. The advent of in expensive computing power and widespread use of interferometric optical testing has made the wave-front aberration view the more useful of the two. However, most commercial optical analysis and design programs provide relevant output in either format.
For circularly symmetric optical systems, we can describe the wave-front and the reference sphere for each image point in terms of polar coordinates in the system exit pupil. These polar coordinates are the normalized aperture variable, p, and the azimuthaI angle, cfJ. The angle cfJ is measured from an imaginary line in the image plane connecting the optical axis and the image point called the image vector. The difference between the wave-front and the reference sphere represents the wave-front aberration, and since it may also be a function of the image point, we can incorporate a third variable, the normalized image height, h. The wave aberration equation can then be written as apower series(20):
Weh, p, cfJ) = W020p2 + Wll1hp cos cfJ + W040p4 + W D1 hp3 cos cfJ
+ W222h2 p2 cos2 cfJ + W22oh2 p2
+ W3II h3p cos cfJ + W060p6 + W1s1hps cos cfJ
+ [W331h3p3 cos cfJ + Wm h3p3 cos3 cfJl
+ [W240h2 p4 + W242h2 p4 cos2 cfJ 1 + W420h4p2
+ W422h4p2 cos2 cfJ + Ws11hSp cos cfJ
+ ... + {higher-order terms} (5.2.14)
260 Chapter 5
In the first two terms, the powers of p and h add up to two, and they represent the "first-order optics" operations of change of focus and change of the reference image height. The "order" of the aberration terms is thus one less than the sum of the p and h powers. The next five terms of this equation in which the powers of p and h add up to 4 are called the thirdorder or primary aberrations. They correspond to the monochromatic Seidel aberrations. The nine terms of this equation in wh ich the powers of p and h add up to 6 are called thefifth-order aberrations. The common terminology for this grouping of aberrations is presented in Table 5.1. The coefficients Whp </> represent the maximum value (in waves ofaberration) ofthe particular aberration term, or the aberration when the normalized polar coordinate and image height are both equal to 1. The wave-front aberration equation thus describes the dependence of aberration within a particular system as a function of aperture and field. This dependence is listed in Table 5.1. To calculate the values of the primary aberrations (and thus the coefficients W040 , W I3I ,W222 , etc.), Seidel derived simple but explicit formula relating the constructional parameters (lens curvatures, indices, etc.) and the data of two paraxial ray traces.(17) Similar formula for some of the higher-order aberrations have been found, but they are generally much more unwieldy.
The transverse ray aberrations (TA) can be derived from the wave-front aberrations by a derivative relationship(20):
TA = - i 8W(h, p, (/J) n 8p
(5.2.15)
Table 5.1. Wave-front Aberration Dependence on Aperture and Field
Versus Versus Aberration W(h, p, 1jJ) term apert ure (p) field (h)
Third-order or primary aberrations
Spherical aberration W040p4 p4
Coma W 13l hp3 cos ljJ p3 h Astigmatism Wm h2 p2 cos2 ljJ p2 h2
Field curvature W22oh2p2 p2 h' Distortion W3l1 h'pcos ljJ p h'
Fifth-order aberrations
Spherical aberration W060p6 p" Linear coma W 15l hp5 cos ljJ p5 h Elliptical coma W331 h3p3 cos ljJ + W333h'p' cos3 1jJ 2p3 2h3
Oblique spherical W240h2p4 + W'42h2p4 cos21jJ 2p4 2h2
Astigmatism W420h4p2 p' h4
Petzval field curvature W422h4p2 cos2 ljJ p2 h4
Distortion W5II h5 p cos ljJ P h5
Free-Space Optical Hardware 261
where / is the distance from the exit pupil to the image point and n is the index of refraction of the image medium. Applying this relationship to Eq. (5.2.14) shows that the primary transverse ray aberrations are of third order in (p + h), hence the terminology: third order, fifth order, seventh order, etc. The primary wave aberrations will be discussed in more detail below.
Spherica/ aberration is change of focus with aperture, so that rays traversing the outer portions ofthe lens (marginal rays) are focused at a different point than those rays dose to the center of the lens (paraxial focus) , as in Figure 5.9a. When this point is doser to the lens than the paraxial focus, we have undercorrected, or negative spherical. Undercorrected spherical is usually associated with singlet spherical lenses of positive focal length, and the converse case, overcorrected spherical, with negative elements. Hence, combinations of positive and negative elements may be used to control spherical aberration. We can see from Table 5.1 that spherical aberration increases with the fourth power of the aperture, but has no field term. Thus, primary spherical aberration is constant across the field. Doubling the
o
1
(b)
(a)
image plane
image plane (paraxialjocus)
(e)
Figure 5.9. Spherieal aberration and eoma. (a) Undereorreeted (negative) spherieal aberration of a planoeonvex lens; (b) positive eoma (note marginal rays foeus higher than paraxial rays); (e) eoma "eomet pattern."
262 Chapter 5
aperture of a lens will increase the spherical wave aberration contribution by a factor of 16. It should be noted that the orientation of the plano convex lens in Figure 5.9a represents the worst orientation of the lens for infinite conjugate imaging. Simply ftipping the lens so that the plano side faces the image will dramatically improve its performance.
Coma is a change of magnification with aperture, so that off-axis rays traversing the edge portions of a lens are focused at a different height than the paraxial rays. The marginal rays from the outer "zones" of the aperture focus to circles of increasing size, as in Figure 5.9b, c. This creates the "comet" pattern for which the aberration is named. Positive coma is present when the marginal rays are focused at a high er point in the image plane than the paraxial rays. Negative coma is present in the opposite case. Positive coma thus leads to the comet-shaped spot diagram of Figure 5.9c if coma is the only aberration present. From Table 5.1, we see that primary coma increases cubically with aperture, and linearly with field height.
Astigmatism is present when off-axis rays are focused in a particular asymmetric manner. As shown in Figure 5.10, we refer to the plane containing the optical axis and the object point as the tangential or meridional plane, and the perpendicular plane, containing the chief ray, is the sagittal or radial plane. Astigmatism causes the rays propagating in the tangential plane to come to focus at a different point than those rays propagating in the sagittal plane. As we move from one focal plane to the other, the image changes from a vertical line segment, to a circular blur to a horizontal line segment.
optical axis
sagittal focal Une
best focus
Figure 5.10. Astigmatism. Note separation betwecn sagittal and tangential focal planes.
Free-Space Optical Hardware 263
The surface of best focus lies one-half of the distance from the sagittal surface toward the tangential surface. Astigmatism increases quadratically with aperture and image height. This causes the two image planes to be paraboloid.
Field curvature causes the image "plane" to have a curved shape, as in Figure 5.11 a. This curvature of the image surface is due to the combined effects of astigmatism and Petz val curvature, so that some field curvature may be present even in the absence of astigmatism. Positive lens elements cause the image field to curve inward toward the object plane, while negative elements have the opposite effect. The Petzval condition states that the Petzval field curvature of a multielement lens will be flat if
(5.2.16)
where nj is the element's index ofrefraction andj; is its focallength. Although satisfying this condition removes the "inherent" field curvature of the lens, the surface of best focus may still be nonplanar, due to other aberrations,
device
o o o o o o o
object plane
devices
object plane
(a)
(b)
devices
image plane
devices
13 4d' . , rstortton 11
9
S
3
image plane
Figure 5.11. Geometrie aberrations. (a) Field curvalure; (b) distortion.
264 Chapter 5
such as astigmatism. Since field curvature is also quadratically dependent on aperture and image height, the curved image plane is also paraboloid.
Distortion is a change of magnification with image height. This causes the image spots to be focused at positions farther from the positions predicted by first-order optics as the image height is increased, as in Figure 11 b. Since distortion increases with the cube of the image height, the distortion can increase rapidly with large fields if left uncorrected. Recall that for infinite conjugate imaging, x = ftan (). In the presence of barrel distortion, x <ftan (), while for pincushion distortion, x> ftan ().
From the preceding discussion, we see that in practice, lenses have "nonideal" performance. In fact, in a given optical system, every surface encountered by the illuminating beam changes (for better or worse) the optical wave-front. This effect may be used to balance the contributions of one element against those of another. This balancing can be seen in the infinite conjugate relay ofFigure 5.8. Assuming that both lenses are identical (i.e., a unity magnification image relay), then the second lens (to the right in Figure 5.8) is performing a reciprocal operation to that of the first lens. Both lenses contribute wave-front aberrations so that all five of the primary aberration terms are present. The terms that are even functions of the aperture variable, p, will add, and those terms that are odd functions of p will cancel. Thus, spherical aberration, astigmatism, and field curvature will worsen, but coma and distortion will cancel. This is one reason why many high-performance optical systems exhibit a great deal of symmetry.
lust as the actual performance of lenses often falls short of ideal, the actual flatness of the plane surfaces of be am splitters, windows, and retarders is not perfect. These deviations from flatness will be transferred to the wave front as it pro pagates through the plan ar elements. Errors of twice the deviations are acquired when the wave front reflects from a surface. Thus, in systems with many plano elements in the optical path, care must be taken to match the quality of the plano parts to that of the lenses. For example, common commercial beam splitters are specified to be flat to only ,1/2 across 80% of their clear aperture.
In collimated light, plane parallel plates are free of aberrations, but even a perfectly flat plate may introduce aberrations if it is placed in a converging or diverging beam. The plate may add spherical aberration, astigmatism, and sagittal coma.(19) This is why infinite conjugate imaging is commonly used in high-resolution systems containing beam splitters and other plano parts in the optical path. If the plate is in a telecentric image space, as in Figure 5.12, only spherical aberration is contributed. Since the marginal rays focus in back of the paraxial rays, the plate contributes overcorrected spherical aberration. In fact, such plates are often used to balance the undercorrected spherical aberration introduced by simple positive lenses. Note that the plate of Figure 5.12 also shifts the position of the focal plane of the lens.
Free-Space Optical Hardware 265
image plane
Figure 5.12. Overcorrected (positive) spherical aberration of a plane plate.
Ifthe image space is nontelecentric, or the plate is tilted, spherical aberration, astigmatism, and coma will be introduced.(I9) A tilted plate will also affect both the longitudinal (focal) and lateral positions of the image.
The mounting of elements in an optical system can have a dramatic affect on the system performance. Tilts (or decenters) of lenses can compound the effects of other aberrations in the system. One of the most common effects is due to lens tilts in systems with spherical aberration. In such systems, tilts will introducejield-independent coma, which may be present in large amounts even on-axis.
5.2.3. Resolution and Spot Size
Although we can significantly simplify our analyses by assuming that the spot images are formed by cones and j or bundles of rays, this geometric optics approach suggests that an unaberrated focused spot is infinitely small. Of course this is not the case, and without aberrations the spot size is determined by difJraction. Diffraction can be understood as an interference effect. Recall that two coherent beams interfering at an angle form a pattern of fringes in which the fringe spacing depends on the angle between the beams. One way that diffraction can affect the spot size is through interference between the light diffracted by the limiting apertures (Jens boundaries, masks, etc.) and the undiffracted light passing through the apertures. The interference pattern formed determines the shape and extent of the spot. However, the size of even an "unclipped" Gaussian beam is still determined by the wave nature oflight, and we can think ofthe light beam being focused as interfering with itself. Just as the period of the fringes formed by the interference of two collimated beams is dependent on the angle between the beams, the size of a focused spot is also dependent on the angle at which the si des of the beam are being "bent" toward each other. The greater this angle, the closer are the fringes, or the smaller the spot. For uniform-intensity
266 Chapter 5
illumination, the angle of the focusing "cone" is represented by the numerical aperture (N.A.) or by the relative aperture (// #) of the converging (or diverging) be am :
N.A. = n sin e 1 1/ # = D
(5.2.17)
(5.2.18)
where 1 is the focallength, n is the index of refraction of the medium before the spot image, and e is the half angle of the cone of rays. The illuminating beam may overfill the lens, in which case D is the entrance pupil diameter of the lens, or it may underfill the lens, and Dis just the beam diameter. In the latter case, the beaml/# may be greater than the lensl/# (f/ Dbeam > 1/ Dlens)'
For infinite conjugate imaging, the following relationship holds:
I N.A.= --~
2(// # ) (5 .2.19)
The N.A. is defined according to Eq. (5 .2.17) because the diameter of the beam is measured at its intersection points with the principal plane of the lens. This "plane" is actually "planar" only in the paraxial region; it is really a curved surface, or a spherical surface of radius R for an aplanatic lens, as in Figure 5.13. The focallength, f, is also measured from this surface, so for infinite conjugate imaging, we have
D .() f'{) .() D 1 - = nR sm !7 = n sm!7 or n sm !7 = - = ---2 21 2(// #)
(5.2.20)
For uniform illumination, diffraction from the edges of the aperture is significant, and the familiar Airy disk intensity profile(21) emerges. The spot
principal plane (surface)
D
Figure 5.13. Numerical aperture (N.A.) = n sin () = 1/ 2(// #).
Free-Space Optical Hardware 267
size is commonly measured as the diameter of the inner disk, and is
D spot = 2.44)" Cfl #) (5.2.21)
The spot size formed with uniform illumination of a given wavelength is thus uniquely determined by the lensfl #. For this ideal, unaberrated spot, 84% of the beam's energy is focused within the disk, with the remainder (16°;',) distributed in the surrounding rings.
When focusing a laser beam, the intensity profile is gene rally Gaussian rather than uniform. A lens with an infinitely large aperture focuses the illuminating beam to a spot diameter of:
or approximately
4)" D =~
spot n()
4)" f D =-- ----
spot 2 n Wo
(5.2.22)
The Gaussian beam radius is Wo (at the Ile2 intensity points), and the approximation assumes tan () 12 = wolf ~ () 12. In this case the spot size is again determined by the factor f 12wo, which is similar to the lens f 1#, but related to the beam diameter rather than the lens diameter. The sm all-angle approximation is less accurate for low fj2wo ratios, but since the spot formed by such low ratios are quite smalI, the magnitude of the error is also small. For example,fl2wo = 1 introduces about 8% error. Because the spot is only 1.2 J1m in diameter (at 850 nm), the error is less than 0.1 J1m. For fl2wo =
4, the error is less than 0.02 J1m. For realienses with finite apertures, the edges of the Gaussian beam
are "cIipped," and the resultant truncated Gaussian illumination is focused. The amount of energy cIipped by an aperture of radius r is I1P I P = e -2(r/wo)'; thus, 86.5% of the beam's energy is contained within the 1 I e2 intensity diameter. When the amount of cIipped energy is less than 0.1%, Eq. (5.2.22) pro vi des accurate results.(22) When the cIipping is greater than 0.1 'X" diffraction effects from the apert ure cause an effective decrease in the illuminating beam's waist radius(23) according to:
(5.2.23)
where r is the radius (semiaperture) of the lens. This equation assumes that the lens focal length is less than the illuminating beam's Rayleigh range (nw~1 ).,), that the spot size is much sm aller than the illuminating beam waist,
268 Chapter 5
and that w' ~ Wo. Combining Eqs. (5.2.22) and (5.2.23), we have
4)" I 4).,[ rlwo ] Dclipped.spot = -; 2w' = ----;;- I _ e -(r/wo)2 (li #) (5.2.24)
or
4).,[ k ] Dclipped-spol = -; 1 _ e -k2 (li #), k = r/wo = c1ipping ratio
For mildly truncated Gaussian illumination, the spot size is dependent not only on the lensll # and the beam diameter, but also on the c1ipping ratio, k, the ratio of lens c1ear aperture to the beam diameter. Empirical formulas for spots formed with truncated Gaussian illumination have also been developed(24) :
Dclipped-spot = K)., (li #) (5.2.25)
where Dclipped-spot is again measured at its 11 e2 points, and K is a shape factor determined by the c1ipping ratio, k. An empirical formula for the factor Kis
K 2 = 1.6449 + 0.6460 0.5320 e (llk - 0.2816)1821 (llk - 0.2816)1.891
(5.2.26)
For c1ipping ratios greater than about 3.5, the den omina tors of Eq. (5.2.26) become complex, and the expression is no longer valid.
From Figure 5.14, we can see that the results from the analytic (solid line) and the empirical (dotted line) formulas for "truncated-beam" spot sizes [Eqs. (5.2.24) and (5.2.25)] match to within ab out 4% for c1ipping ratios greater than 1.2.
The amount of the energy from each be am actually delivered onto a device may be lowered by c1ipping at the lens. If pixellated devices are used, additional energy may be lost due to c1ipping at the device edges. A beam truncated at its l/e2 points will lose 13.5% ofits energy. Ifwe have a c1ipping ratio of I at the lens, and form a spot with a I/e2 diameter equal to the device diameter, we will only deliver 74.8% ofthe beam's energy. To increase the lens throughput, we must increase the lens diameter, and thus the c1ipping ratio, k. From Eq. (5.2.24), however, we see that if thell # is kept constant, this increase in the c1ipping ratio will also increase the spot diameter, causing more loss at the device. To decrease this loss, we must decrease the lensll # and use a "faster" (and generally more expensive) lens. This trade-off is
Free-Space Optical Hardware
E ~
~ .. '0'5 '0 a. (J)
1.0
___ = analytic
............ = empiricaJ
waveJength = 850nm
,.2
v,
' .4 1.6
clipping ratio, r/WO
Figure 5.14. 99'/':, energy spot size versus clipping ratio for i/I· i/4 lenses.
269
2.0
ilIustrated in Figure 5.15, where the beam power delivered to a 5-/oLm diameter device is plotted against the clipping ratio, for severalf/# values. From Figure 5.15 we see that to couple 99% of a Gaussian beam at 850 nm into a 5-J.lm device, we need to use about anjj1.7 lens at a clipping ratio of about 1.7. For lower clipping ratios, power is lost due to c1ipping at the lens; for c1ipping ratios greater than 1.7, power is lost due to c1ipping at the detector.
5.2.4. The Diffraction Limit
In light of the earlier discussion of aberration, it is worthwhile to discuss the term diffraction-limited. The term may be applied to any wave front. The wave front may originate from many sources : a laser, a simple lens, or a complex optical system, but perhaps the most common usage of diffractionlimited is as ametrie of lens quality. This term is usually applied to optical systems with very low aberration, so that the diffraction effects "dominate" the image formation. Thus, the real question is: when do the aberration effects of a lens begin to dominate the diffraction effects? Several criteria have been derived for making this decision, and they generally give different "diffraction limits," depending on the types of aberrations present. One of
270
~ (I) c (I)
"'C (I)
a. ::J 0 0
::!
~
~
" 0
"! 0
"l 0
ci
os 1.0
5 um detector
wavelength = 850nm
1.5 2 .0 25
clipping ratio, r/wO
Chapter 5
3.0 3.5
Figure 5.15. Energy delivered to 5-l'm diameter device versus clipping ratio andf/#.
the most widely used is the Rayleigh limit. While initially proposed only for defocus considered as an aberration, the following variant is commonly used. (17) An optical system is diffraction-limited if its output wave front will lie between two concentric spheres (centered at a selected image point) which are spaced by ).,/4. This peak-to-valley wavefront limit (Wp - v ) is simple to calculate and measure and is quite widely used. Alternately, we can calculate the rms value of these wave-front variations, and a W nns less than about 0.075 is usually considered "diffraction-limited." However, a lens which has Wp _ v ~ ).,/4 does not produce a "perfect" spot, and this can lead to some confusion in understanding the performance of a lens. As mentioned earlier, the Airy pattern formed by a uniformly illuminated ideal lens has 84°A, of the beam's energy in its central disko A Wp - v = ).,/4 of spherical aberration drops this value to only 68%, without significantly changing the size of the disk. A half wave of spherical aberration lowers this central disk energy to only 40%.(19) One reason for the confusion is that the "minimum useful performance" of an optical system is very dependent on the application. Many applications are most concerned with the overall spot size, while others value the peak irradiance, and others wish to maximize the rather subjective (but very real) parameter of "image quality." For applications in
Free-Space Optical Hardware 271
wh ich the peak intensity is more important than spot size, the Rayleigh criterion (Wp _ v ~ ..1/4) may not be "diffraction-limited." For the types of free-space optical systems described in this chapter, we can concentrate on the individual spot images rat her than on their collective effects. We are primarily interested in delivering the maximum optical power to each device, while limiting the power delivered to other devices (cross talk). Thus, the most useful metric for these systems is the total energy encircled (or "ensquared") by a detector of a given size, in the presence of the system aberrations and misalignments. Unfortunately, this is a somewhat uncommon measure of system quality. A more common and still useful "limit" is based on the Strehl ratio of a lens or optical system, which is defined as the ratio of the aberrated intensity peak to the unaberrated intensity peak. For small aberrations (Wrms < 0.1), it can be expressed in terms of the wavefront phase variance as(2Sl:
= I - (j~ave front (5.2.27)
where W(X, y) is the wave-front aberration expressed in terms of x and y coordinates instead of polar coordinates. We can also write this as
Strehl = I _ (~~ W )2 ..1 rms ( 5.2.28)
Generally, a Strehl ratio of 0.8 is considered diffraction-limited, and this is sometimes referred to as the Marechal criterion. This limit is somewhat more difficult to measure and calculate but it is used extensively, especially in wellcorrected laser-based systems.
When aberrations dominate the spot image (Wp - v > ..1), the spot images can be calculated using geometrical optics and ray-traced spot diagrams.
5.2.5. Space-Bandwidth Product
Just as temporal bandwidth indicates the maximum rate of change of a signal with respect to time (in cycles per second), we can describe a signal's maximum rate of change with respect to spatial position via spatial bandwidth (SBW; cycles per millimeter). This comparison is shown by the two single-frequency spatial (i.e., a sine-bar chart) signals in Figure 5.16. Con-
272
intensity
image
inlensity
image
a m P I
u d
Chapter 5
e 10 20 40
a m p I
u d
patiaJ frequency (cycles/mm)
e 10 20 40 spatiaJ rrequency
(eycles/mm)
Figure 5.) 6. Spatial frequency bandwidth of an optical signal.
tinuing this analogy, the system used to transfer either of these signals must be capable of transferring all of the frequencies present in the signal, or some degradation (low-pass filtering, for instance) will occur. In an optical image, this manifests itself as a loss of resolution. Since spatial frequency is the rate of change of image intensity with spatial position, the maximum SBW of an image refers to those features ofthe image which are varying the most rapidly in space, i.e. the smallest re solvable features.
The minimum spot size provides the "structure" of the space parameter of the optical system. It defines the granularity of the possible spatial measurements, and, with the field dimension, F, determines the maximum number of individuHlly addressable positions or channels in the system. This spatial channel capacity is referred to as the space-bandwidth product (SBWP) of an optical system and it is a measure of the total number of spatial degrees of freedom, or the "spatial information capacity" of the system. Numerically, it is the field area of the optical system divided by the area of a resolution element:
(5.2.29)
Free-Space Optical Hardware 273
As a simple example, consider a lens which is able to form I-Jlm-diameter spots over a I-mm field. With such a lens, we could theoretically access 106
individual information channels of "bits" all within a JT /4 mm2 area. In practice, however, aberration, transmission, polarization effects, and other system issues significantly decrease this capacity.
5.3. Polarization
Optical polarization manipulation is used in a wide variety of potential free-space digital optical system applications. In the application examples at the end of this chapter, polarization is used extensively to provide low-Ioss beam combination, separation, and interconnection. This section will briefly review linear, circular, and elliptical polarization states, and provide an overview of some polarization components commonly used in free-space digital optical systems. Useful combinations of these components will also be discussed. The intent of this section is to provide a practical review of polarization terms and components common in free-space digital optics, rather than a rigorous introduction to polarization and its wide variety of associated effects. (16.26 28)
The electric field portion of a light wave propagating in the z-direction may be represented as
E(z, t) = Eo cos [OJt - kz] (5.3.1)
where Eo is the field amplitude, OJ is the circular frequency (OJ = 2JT!), and k is the wave number (k = 2JT/A). This field can be decomposed into components along orthogonal polarization axes, Ex and Ey , such that
E=Ex+Ey
Ex = xEox COS [OJt - kz] (5.3.2)
Ey = yEoy COS [OJt - kz + 1']
where Eo< and Eoy are the x and y component amplitudes, and I' is the phase difference between the two components.
The values of Eo" Eov, and I' determine the state of polarization of the light. If I' = 0 or integer multiple of 2JT, both components are in phase and the light is linearly polarized. For the case where Eox = Eoy and Ex is oriented
274 Chapter 5
E (e = 0)
(a) (c)
E ( e = n)
(h) Cd)
Figure 5.17. Linear polarization: (a) E-fie1d at 45° (b) E-fie1d at 135°. Left or right circular polarization: (c) E-fie1d at time 1=0, (d) E-fie1d at 1= 81, 281, and 381.
horizontally, the light is linearly polarized at 45°, as shown in Figure 5.17a. If [; = ±n or odd integer multiples of n, both components are out of phase, aga in resulting in linear polarization, but E is rotated. For instance, if Eox = Eoy, E is linearly polarized at 135°, as in Figure 5.l7b, but when Eox #- Eoy, rotations other than 90° result. If t: = ±n/ 2 + 2mn (m an integer) and Eox = Eoy, we get right ([; = -n /2) or left ([; = n /2) circularly polarized light (RCP or LCP). Looking into the beam, the RCP polarization vector rotates clockwise, and LCP rotates counterclockwise. Reflection at a mirror reverses the direction of propagation, hence the circular polarization also is reversed (LCP to RCP, and vice versa). The vector E has constant magnitude but rotates as it pro pagates (Figure 5.17c, d). Combining equal amounts of right or left and circularly polarized light of the correct phase results in linearly polarized light. If the component amplitudes are not equal, or if [; has other values, the result is elliptically polarized light, in wh ich the vector E still rotates, but has variable amplitude, as in Figure 5.18. Examples of elliptical polarizations are shown in Figure 5.19 for the case in which Ex #- Ey
and Ex leads Ey • (16)
The most commonly used polarization components in free-space digital optical systems are polarization beam splitters (PBS), and fixed (quarterwave and half-wave) retarders. These components are used to define and
Free-Space Optical Hardware 275
Figure 5.18. Elliptical polarization: E-field at time 1 = 0, 01, 201, and 301.
manipulate the state of polarization of the beams of light in the systems. Cube, or prism-type PBSs are commonly used in these systems to separate or combine arrays of beams collinearly with low loss. In conjunction with ).,/4 retarders and ).,/2 retarders, they allow polarized light to be redirected about a system in a relatively compact manner, and with low loss.
5.3.1. Linear Polarizers and Polarizing Beam Splitters
Polarizing beam splitters are in the category oflinear or plane polarizers, since they ideally only transmit light polarized in one direction. Linearly polarized light of intensity 10 incident on a linear polarizer is transmitted according to Malus's law:
I( (}) = 10 cos2 () (5.3.3)
where () is the angle between the input linear polarization and the transmission axis of the polarizer, and I( (}) is the transmitted intensity. When () =
90°, the transmission is theoretically 0%. The actual ratio of I( (})min/ I( (})max
is ca lied the extinction ratio, a measure of polarizer performance. Extinction ratios of 100~1O00:1 are common, while precision polarizers may provide 1 O,OOO~ 1 00,000: 1 extinction.
In addition to the polarizer extinction ratio, other performance concerns are the absorbance of the polarizer, and its useful angular, spectral, and temperature bandwidths. The angular bandwidth is of concern since, in the
+IOO\:J\~OO/ €= o 1t/4 1tf2 31t/4 1t 51tf4 31tf2 71t/4 21t
Figure 5.19. Elliptical polarization: E, oft E,. and E, leads E,.
276 Chapter 5
examples discussed later, arrays of collimated beams propagating over a range of angles pass through PBSs. Because the beams are incident at different angles, each may experience a different transmittance, thus introducing nonuniformities in the signal intensities across the array of beams. Some PBSs exhibit this effect at angles as low as 10 • Variations in the transmittance as a function of wavelength can introduce similar effects in multiple wavelength systems.
Linear polarizers and PBSs may be made in a number of ways; dichroic materials (like Polaroid), birefringent prisms, thin-film-coated or Brewsterangle prisms, and even diffraction gratings may be used. A dichroie material, when referring to polarization properties, strongly absorbs light polarized in one direction and shows little absorption of orthogonally polarized light. Naturally occurring crystals such as tourmaline(16) exhibit this characteristic. The most familiar dichroic polarizers are the Polaroid type, in which stretched sheets of polyvinyl alcohol are treated with absorbing dyes. (26) These materials are very inexpensive, and may have excellent extinction ratios, but generally their maximum transmissions are less than 90(Yo. Higher transmittance (99%) together with high extinction ratio (and high price) is commercially available in a similar product (Polarcor™) in which submicroscopic silver particles are aligned along a common axis. Like wire-grid polarizers, these elements preferentially absorb light polarized parallel to the long axis of the partic1es. Gratings with very high spatial frequencies will also exhibit polarization-dependent transmittance.(29)
Birefringent prism polarizers rely on double refraction to discriminate between the orthogonal polarizations.(16) They are made by sandwiching two pieces of birefringent material together. The birefringent material exhibits one index of refraction (ne) for light polarized parallel to a specific direction and another index (no) for light polarized perpendicularly to that direction. This direction defines the optic axis ofthe material, and ne, ° are the extraordinary and ordinary indices, The optic axis is gene rally an axis of crystallographic symmetry. Calcite, the most common birefringent material used, has ne = 1.4864 and no = 1.6584. To transmit light of only a single polarization through these polarizers, two prism halves are cut and cemented (or simply placed) together such that one of the polarizations is totally internally reflected at the cemented interface. Total internal reflection occurs when light is incident from a high er-index material onto a lower-index material at an angle greater than the critical angle. The critical angle is the angle of incidence at which the transmitted ray angle is 90°, or from Snell's law:
(5.3.4)
where nt, j are the transmitted and incident indices, and nt < nj. F or a glass-air interface, Oe is about 42°. This effect can be used to make polarizers such as
Free-Space Optical Hardware 277
the Glan Foucault, Glan Thompson, and Nicol types, or to make PBSs such as the Foster, and beam-splitting Glan-Thompson.(26) In the Rochon, Senarmont, and Wollaston PBSs, the index difference at the interface between the prism halves causes the two polarizations to be refracted at different angles, and thus exit the PBS from the same prism face, but angularly separated. (26) Birefringent polarizers can provide extreme\y high extinction ratios. For example, Glan-Thompson polarizers are available with extinction ratios of 106 : 1. The spectral and angular performance of Glan-Thompson polarizers is also quite good; they can maintain high extinction ratios over a range of more than 20° in angle and from 0.4 to 2.3 flm. Unfortunately, because these polarizers use natural birefringent crystals, it can be very expensive to obtain large, high-quality beam splitters. Additional drawbacks may incIude moderate absorbance (up to 20(1.», relatively long length, be am deviation, and beam separation angles other than 90".
Brewster-angle PBSs are probably the most common laboratory PBS, due to their availability and high performance-to-cost ratio. They rely on the fact that light polarized parallel to the plane of incidence will not be reftected by a dielectric surface if it is incident at Brewster's angle (also called the polarization angle). The plane of incidence is defined as the plane containing the propagation direction vector and the normal to the surface, as in Figure 5.20, which also Iists several terms that are commonly used to describe the polarization state relative to the plane of incidence. At Brewster's angle, Oj + O( = 90", so from Snell's law we can derive Brewster's law:
Brewster's angle = Op = tan- 1 (nt/nd (5.3.5)
where nj, t are the indices of the incident and transmitted media. For an air-glass interface, 0r = 56°. This effect is appIied to make PBSs by fabricating a "stack" of thin films whose indices and angle nominally satisfy
nce
(a) (b)
Figure 5.20. Terms used to describe linear polarization states relative to a plane of incidence.
278 Chapter 5
Brewster's law. Interference effects between the many layers also playa major role in achieving the polarization extinction over a useful angular and spectral range. Thin-film PBSs may be formed in a cube by sandwiching a polarizing thin-film stack between two right-angle prisms. (16) Light polarized parallel to the plane of incidence is transmitted, while light perpendicular to the plane is reflected at 90°. These polarizers generally have extinction ratios from 200: I to 1000: 1, and transmittances of > 96%. The angular bandwidth of thin-film PBSs can be made as large as 10°, although this is generally over a spectral range of only about 15% of the central wavelength. The transmittance will gene rally change by only a few percent over these ranges. However, high-quality, compact thin-film PBSs can be relatively inexpensive, and can prove to be very useful in free-space digital optics applications.
5.3.2. Itetarders
Retarders change the polarization state of the incident wave by introducing a specific phase delay, &, between the Ex and Ey components. In this case the x and y directions are defined relative to a specific axis of the retarder (usually called thefast axis). For this discussion, we will define Ex to be parallel to the fast axis and Ey to be perpendicular to it. These retarders are birefringent; they exhibit different indices of refraction for waves polarized parallel versus perpendicular to the fast axis (nx < ny). Since the speed of light in a material is cvacuum/n, the light polarized parallel to the fast axis (Ex) travels through the thickness of the retarder more quickly than the perpendicularly polarized light (Ey). Thus, upon exiting the retarder, the two components will have a relative phase shift. Depending on the amplitudes of Ex and Ey and the amount of this phase shift, we can rotate a linear polarization, convert a linear to circular or elliptical polarization (or the reverse), or convert RCP to LCP (and the reverse). The elements used for these conversions are half-wave plates and quarter-wave plates, which introduce 1t/2 and 1t/4 shifts, respectively.
A 1t/2 retarder can be used to rotate linear polarization. If the linearly polarized incident wave's polarization is at an angle of () to the fast axis, the exiting wave's linear polarization will be rotated by 2(). Thus, a 1t/2 retarder with its fast axis at 45° will "flip" horizontally polarized light to vertically polarized (or the reverse). These 1t/2 retarders can also be used to flip RCP to LCP or to generate elliptical polarization from circular polarization. Similarly, 1t/4 retarders can convert between linear and circular or elliptical polarizations.
The amount of retardation induced by a retarder depends on the retarder thickness, d, and the amount of birefringence, An = nx - ny • The
Free-Space Optical Hardware 279
retardation is just the difference in optical path length:
AOPL = nA = ±(An)d (5.3.6)
Due to the extremely small thickness «40 ,um) necessary to provide exactly a half or a quarter of a wavelength of retardance, they generally provide kA + Al2 of retardance. These are referred to as kth-order, or multiple-order retarders. This eases the manufacture of the retarders, and lowers the cost. Multiple-order retarders have several disadvantages. Since a significant thickness of material is used, the effective thickness that the light "sees" changes significantly as its angle of incidence changes. For a retarder of thickness d, the effective thickness increases as
d deff >:::: ---~-----cos ({) In)
(5.3.7)
where n is the average index of refraction of the birefringent material, and {} is the sm all angle of incidence. For these sm all angles of incidence, the change in retardation (expressed in waves) is :(26)
{}2 (AN){} = ±dAn ~2
2n (5.3.8)
Temperature changes can also introduce significant retardation changes by causing the material to expand. For crystalline quartz, the change ofretardation iS(26)
(AN)degrees = -0.0365Ndegreesl C (5.3.9)
where N is measured in degrees of retardation, and C represents temperature change in degrees Celsius. If the material birefringence is not linearly dependent on wavelength, chromatic effects can also be present. All ofthese effects can cause problems in precision systems.
Zero-order retarders have much larger angular and temperature ranges since they provide only A/2, or AI4 (or AI x) retardance and no higher-order retardance. They are made by using an nth-order retarder with the desired retardance (A/2 or A14) sandwiched together with an nth-order retarder with zero retardance. The fast axis of the second retarder is aligned perpendicularly to that of the first, so that it effectively "removes" the extra norders of retardance from the first. Zero-order retarders ha ve much greater angular, spectral, and temperature bandwidth, but are also more expensive.
Retarders are commonly made of birefringent crystals, most frequently mica or polished quartz. They mayaIso be made from stretched sheets of
280 Chapter 5
plastic polymers (e.g., cellophane, Mylar). The polymer retarders, in which thin polymer sheets are stretched, and sandwiched between glass plates for support, are generally the least expensive. Mica zero-order retarders are also reasonably priced, but can exhibit up to 20°!<, absorbance, as weIl as nonuniformities across large apertures.
5.3.3. Polarization Component Combinations
Retarders and PBSs are often used in combination. Two especially useful combinations are polarization optical attenuators and polarization optical isolators. Polarization attenuators are formed by placing a 1../2 retarder before a PBS or other polarizer, as in Figure 5.21. Assuming linearly polarized light, as the A/2-plate is rotated by 0, the linear polarization will rotate by 20. From Malus's law, Eq. (5.3.3), we can see that the transmitted intensity will undergo four minima and maxima as the A/2-plate is rota ted through 360 0
•
Polarization isolators are a combination of a PBS and a Aj4 retarder, as in Figure 5.22. The retarder is aligned with its fast axis at 45° to the plane of incidence of the PBS. Thus, a beam transmitted by the PBS, which then passes through the A/4-plate, will be circularly polarized. 1fthis be am is then normally incident on a mirror, it will be reftected back through the Aj4-plate. The two passes through the retarder cause the polarization to be rotated by 90° relative to the input polarization. The reftected beam is thus reftected by the PBS, and the laser of Figure 5.22 is "isolated" from back reftections. Note that if the beam is reftected by a mirror with partial absorption, or at nonnormal incidence, the mirror may introduce additional retardan ce which must be compensated.
Polarization is also employed in spatial light modulators (SLMs)(30) which can individually rotate the polarization of light incident on each pixel of the SLM. The most common example of these polarization SLMs are the liquid-crystal displays (LCDs) found in watches, portable televisions, and computers. By sandwiching a spatially addressable, electronically controlled
1J2 PBS
* faslaxis
Figure 5.21. Polarization optical attenuator.
Free-Space Optical Hardware 281
output polarization: ++ fast axis
"\
I laser I ::s:. I ~
PBS IJ4 reflector
input polarization: + + Figure 5.22. Polarization optical isolator.
Aj2-plate between two orthogonal polarizers, the intensity of the light passing through eaeh pixel ean be adjusted. Some LCDs allow only binary modulations while others ean provide severallevels (gray seale) .
As diseussed in Chapter 2, another polarization-based SLM uses the magneto-optie or Faraday effeetY 6) These SLMs make use of the faet that materials sueh as yttrium iron gamet (YIG) or even ordinary table salt (NaCl) will rotate the polarization of light when they are properly oriented within a magnetie field. The amount of rotation is
81" = VBleos y (5.3.\0)
where V is the Verdet eonstant of the material (often expressed in are min gauss- I ern- I), B is the statie magnetie ftux density veetor (in gauss), I is the length of the material, and y is the angle between the magnetie ftux density veetor and light propagation direetions. The main praetieal differenee between this effeet and a Aj2 retarder is that, in this ease, the sense of rotation is sole\y dependent on the direetion of the magnetie fie\d; reversing the propagation direetion has no effeet on the sense of rotation. This quality make this effeet also quite useful for ereating optieal isolators. For magnetooptie SLMs, the magnetie fields are eleetrieally generated on a pixel-by-pixel basis, and the erystal is sandwiehed between two orthogonal polarizers.(31) This again transforms the polarization modulation into intensity modulation.
282 Chapter 5
5.4. Spot Array Generation
Spot array generation requires that a single input beam be shaped into an array of beams. For most free-space optical processing applications, this beam array is a 2-D array of equal power beams propagating in the same direction at different angles. Array generators have been developed previously for a variety of applications, inc1uding multiple imaging, (32) image processing,(33) and optical data storage.(34) Additionally, much recent work has been done on array generators specifically for optical computingjswitching applications. (35) In Ref. 35, Streibl provides an overview of the breadth of techniques proposed in this area, as well as providing a very complete reference list of past and recent work. In this section, we will discuss some of the requirements for the array generation system, review Streibl's array generation c1assifications, and examine the most widely used technique, binary phase gratings (BPGs). A brief review of Fourier optics is inc1uded in the appendix.
5.4.1. Requirements
Optical switching device characteristics determine most of the requirements for these array generators. Generally, 2-D arrays of identical devices are used. Thus, the operation of array generator should be isoplanatic(36); the spot power, size, and shape should remain unchanged across the array. For very small devices, shape and direction of incidence of the spot become important. In this case, the array generation system should be te1ecentric, (37) so that the chief rays of all of the spots are normal to the device array plane. High optical energy efficiency is of course a very important requirement. Re1ated to the efficiency is the amount of scattered light generated in addition to the desired spots. This can be especially damaging in these systems since coherent light is often used and small amounts of scattered energy may result in large intensity variations across the array. Higher signal-to-noise ratios are achievable in systems using incoherent illumination as the power supplies. However, due to the device requirements ofnarrow spectral bandwidth, high power, and homogeneity of the spot across the array, coherent illumination from narrow-band lasers may be the only solution.
5.4.2. Image-Plane, Fresnel-Plane, and Fourier-Plane Classifications
A number of optical techniques and phenomena have been employed to genera te spot arrays that meet the requirements listed above. Streibl has proposed a set of c1assifications of these techniques, based on the position of a special component within the optical system, relative to the device array.
Free-Space Optical Hardware 283
The many techniques can then be grouped into three categories: imageplane, Fresnel-plane, and Fourier-plane.
The special component in image-plane array generators is located in an image plane which is conjugate to the device plane. Lenslet arrays, phase contrast imaging, and "leaky" waveguide proposals all fit into this category. The simplest example of this classification is an array of lenslets, as in Figure 5.23a. Each lenslet focuses a portion of the illuminating beam to a spot. Spot arrays as large as 56 x 56 have been formed with this technique. (38)
Array generation has also been demonstrated using a phase contrast technique. (39) Phase contrast imaging(40) is commonly used in phase contrast microscopy, where a pure phase object (e.g., a living biological cell) is converted to an intensity image by the use of a spatial filtering step. Light passing through the phase object is diffracted, while light passing around the object remains undiffracted. In the spatial filter, the undiffracted light is focused through a special phase plate which shifts the phase of the undiffracted light so that it is 1800 out of phase with the diffracted light. When both the diffracted and undiffracted light are recombined, interference effects create an intensity pattern instead ofthe previously uniform intensity, and allow a visual examination of an otherwise "invisible" object. For array generation, a special phase mask is created, such that, after passing through
ColUma'ed Gaussian
Boom
(a)
ColUmated Gaus ian
Bum
device arraY
grating
Collim.ted Gausslan
Bum
(c)
Talbot plate
device array (b)
device array
Figure 5.23. Array generation. (a) Image plane; (b) Fresnel plane; (c) Fourier plane.
284 Chapter 5
the spatial filter, the intensity pattern that results is an array of bright spots on a dark background. This technique has been used to generate arrays as large as 32 x 32 spotsY5) Another technique uses waveguides to split and direct a light beam along many paths, and then uses grating couplers to "leak" light out of the waveguide at the desired spot locations. These have been made with splitting ratios as large as 16 x 16.(41)
This dass of techniques meets many of the requirements outlined above. Although these techniques have demonstrated the generation of sizable spot arrays, they gene rally suffer from inhomogeneity "inherited" from the illuminating beam profile, or in the waveguide case, due to the exponential optical power decay along the waveguide. These techniques require careful fabricati on of the special component, since any defects in the special component are directly imaged in the spot array. They have the potential for high efficiency since they can use phase-only elements, and can ensure that the illuminating energy is directed only to the desired spots. Proper construction of these image plane elements may also allow for mode-shaping of the spots to match device modes. These techniques may also be configured to produce incoherent spot arrays, and thus increase the system signal-to-noise ratio.
Fresnel-plane array generators form the spot array in the near field of the special component, as shown in Figure 5.23b. One example of this technique uses fractional Talbot imaging. (42) A periodic amplitude structure is illuminated and another periodic structure, the spot array, is formed after the light has propagated a relatively short distance ("near field"). (43) Talbot imaging is commonly demonstrated by illuminating a periodic amplitude structure. Identical images of the structure (Talbot images) will be formed at integer multiples of the Talbot distance, ZT = 2d2 / A, where dis the grating period and A is the wavelength of the illumination. At a distance of ZT/4, an image is also formed, but the light and dark regions are interchanged. At a distance of ZT/2, no amplitude image is present, but a pure phase "image" is created. To use this technique for array generation, the process is reversed. A specific phase structure is created and the amplitude pattern, the spot array, is generated a distance ZT/4 behind it. Array sizes as large as 100 x 100 have been generated using this technique. (35)
In Fresnel plane techniques, the partial interference between multiple beams provides some "averaging-out" of the inhomogeneity from the illuminating beam's intensity profile and any defects in the special component. Since pure phase gratings may again be used, the efficiency may be high, although it is more difficult to ensure that all of the illumination is directed only into the desired spots. The partial reliance of these techniques on interference causes increased difficulty with mode shaping, and tightens the co herence requirements of the illumination.
In Fourier-plane array generation techniques, the special component is Fourier-transformed, as in Figure 5.23c. A periodic special component will
Free-Space Optical Hardware 285
have a periodic Fourier transform, ideally an array of high-contrast spots. The Gaussian illumination profile is transformed to become the profile of the individual spots, and the envelope function across these spots is determined by the pattern in one period of the special component. The homogeneity is thus determined by the accuracy that we can compute and fabricate the periodic pattern. These patterns may be binary, multilevel, or even continuous, and we may still use phase structures to achieve high efficiency.
This type of array gencration technique has so far been the most widely used in free-space photonie switching experiments. In order to bett er understand this technique, we will examine the application and design of two types of Fourier plane array generators in more detail: binary phase, or Dammann(44) gratings (BPGs) and lenslet gratings, a type of continuous pattern grating.
5.4.2.1. Binary Phase Gralings
A BPG is a phase grating in which there are two possible phase values. An example of a BPG is shown in Figure 5.24, which represents a substrate, such as gl ass or quartz, that has been etched or a thin patterned film deposited (or embossed) to form two distinct thicknesses. Light passing through the thicker sections of the substrate will experience a phase delay relative to light passing through the thinner sections. The difference in the thickness (at normal incidence) of the substrate is related to the difference in phase by the relationship :
(5.4.1)
where dis the etch depth, Je is the wavelength of incident light in free space, n2 is the index of refraction of the substrate, and nl is the index of air.
A binary grating can be viewed as a phase-only transmittance function, t(xo, Yo), that will be multiplied by an impinging light source, p(xo, Yo), and then Fourier-transformed to create a uniform array of spots. Thus, the relationship between the light wave emerging from the BPG and the complex
Figure 5.24. Binary phase grating.
286 Chapter 5
field amplitude, UUx, !;,), found in the Fourier plane of the lens ean be approximated by
UUx,!;,) = F {t(xo, Yo)p(xo, Yo)}
= f 00 f 00 t(xo, Yo)p(xo, Yo) e - j21C(xfx + yfy) dx dy (5.4.2) -00 - 00
where fx = xfl Af and f y = Yfl Af. The parameters required for the design and understanding of BPGs are
illustrated in Figure 5.25, where eollimated light is impinging on the onedimensional BPG from the left. This eollimated beam has a Gaussian amplitude envelope represented by K gaus (xl A) where K is an arbitrary eonstant and A is the half-width at the 1 I e points of the Gaussian beam. Thus,
(5.4.3)
This ineident light is multiplied by the impulse response or the point spread funetion of the BPG. The BPG is the periodie repetition of a binary pattern as shown at the top of Figure 5.25. Its transmittanee t(x) ean be mode1ed as a periodie funetion h(x) * IITeomb (xln multiplied by the finite aperture of the lens, reet (xl R), where * represents the eonvolution operation. The funetion h(x) is a funetion of the following parameters: (I) the phase
ColJimal.d ___ -++ Gral in~g Gaussian -~am
/,,-1 .. 11 OD I
10 x. Xl X3 X4 1 5 x
I-T--Fourier Domaln
Fouritl'" Transfonn
11 olst:" Ordf:rs
lnlenslly
• Spall.l Domaln
Figure 5.25. One-dimensional spot array generation using Dammann binary phase gratings.
Free-Space Optical Hardware 287
delay, cjJ, whieh is itself a funetion of the eteh depth d, and (2) the loeations of the transitions, x b between the two grating levels. This will be illustrated with an example later. Thus, the transmittanee funetion ofthe BPG is given by
(5.4.4)
Therefore, the field emerging from the right of the BPG ean be represented by
U(X) = K[ hex) * ~ eomb (~) J reet (~) gaus (~) (5.4.5)
Assuming that all the rays entering the lens are in the paraxial region, the Fourier transform of u(x) will be loeated in the back focal plane of lens. Thus, the output field distributed in the Fourier plane is given by
U(j~) = F{u(x)}
= KRT[gaus (fiAf,) * sine (R/x) * comb (T/x)]H(f,) (5.4.6)
where H(f.) = F{h(x)}. In the Fourier plane the number and uniformity of the spots generated is determined by the funetion H(/x)' The intensity of these spots is given by the magnitude of U(/x). The spot size is determined by the eonvolution of the sine (Rf~), with gaus (fiA/x ). To maximize the use of the input laser power, the Gaussian should be almost fully contained within the lens aperture. In this ease, the Gaussian function dominates the convolution, giving a spot size larger than the central lobe of the Airy disk formed with uniform illumination. As diseussed in Section 5.2.3, the spot size, DA, in the Fourier plane is
4A / DA = ---
7r 2A (5.4.7)
where / is the focal length of the lens and DA is the full width of the spot size and is measured at the 1/e2 points of the Gaussian intensity profile. Notice that the spot width is inversely proportional to the half-width of the Gaussian input envelope. The center-to-center spacing, D e, between the spots is given by
(5.4.8)
288 Chapter 5
h(x)
ei(~o + ~/2)
X -Xl Xl
ei(~o - ~/2) - -
1-' --T--·I Figure 5.26. Symmetrical two-transition Dammann binary phase gratings.
Note that the spaeing between the spots is related to the period T of the grating funetion h(x).
To understand the effeet of the parameters T, cp, Xk in the ereation of a BPG, we present a simple example. Let us assume two symmetrie transitions as shown in Figure 5.26.(45) The binary grating funetion h(x) ean be written using step funetions, u(x), to be the following:
ej""'[e -j<f,/2 [u( - Tj2) - u( -XI)]
+ e14>/2 [U(-XI) - U(XI)] + e-14>/2[u(XI) - u(Tj2)]]
now finding the Fourier transform using the exponential Fourier series representation gives
f Xl fT/2 ] + e+j</J/2 e-j2nr!fox dx + e-j</J/2 e-j2nr!fox dx
-XI XI
(5.4.9)
where fo = 1 j T. Integrating and rearranging gives
H( .1:) _ e -14>/2 e _ 14>0 [ (t!2nnfoT/2 _ -j2nnfoT/2) nJO --- -e
1r:n/oT 2j
(5.4.10)
Free-Space Optical Hardware
Converting the exponentials to sin terms
e -j</>o H(n/o) = -- [-e-j</>/2 sin (nnj~T)
nn/oT
-e-j</>/2 sin (2nn/ox) + e-.i</>/2 sin (2nn/ox)]
289
(5.4.11)
/0 = I/T implies that the first term is zero. The seeond and third terms ean be combined to give
- j2 eNo H(n/o) = [sin (2n~xd sin (4)/2)]
nn/oT (5.4.12)
Replaeing the sin ( ) funetions with sine ( ) funetions gives
- j4x ej</>o H(n/o) = ) [sine (2n/oxd sin (4)/2)]
T (5.4.13)
The intensity of the light at integer multiples of the fundamental frequeney fo = I/T in the Fourier plane, IH(n/o), is given by the magnitude of this equation. Thus,
2 16xi . 2 . 2 IH(n/o) = IH(n/o)1 = -2 [sille (2n/oX) Sill (4)/2)]
T
For the ease when n = 0,
j</>o [ I -x, IX' I T/2 J H(O) = e T e-j </>/2 dx + ej<p/2 dx + e-j</>/2 dx -T/2 -x, x,
whieh ean be redueed to
eNo H(O) = - [-Tej</>/2 - j4x) sin (4)/2)]
T
(5.4.14)
(5.4.15)
(5.4.16)
Therefore, the magnitude of the field present in the Fourier plane for the zeroth-order eomponent is
IH(0)1 2 = I - sin2 (4)/2) [8TX) - l~~iJ (5.4.17)
290 Chapter 5
The values of Xk and cjJ ean now be chosen to ereate a spot array generator. F or example, if cjJ = -7! and T = 1, then a value of x I ean be chosen to equally divide the energy from an input Gaussian beam into three equalintensity output beams. Setting Eq. (5.4.14) equal to (5.4.17) where n = 1 will give a result of XI = ±0.368.
Two main types of BPGs are used for array generation: symmetrie gratings and asymmetrie gratings. Symmetrie gratings are eharaeterized by symmetrie transitions (an even number of transitions), Xk = X-k, and phase values of ±7!. There are 2m + 1 equal-intensity spots ereated in the Fourier plane where m = max (k).(45,46) BPGs ofthis type are frequently ealled Dammann gratings. (45) Several examples of the spot array patterns from different Oammann grating funetions are illustrated in Figure 5.27. Computer optimization teehniques were used to find these solutions. Asymmetrie gratings are eharaeterized by an odd number of transitions and phase values not equal to 7!, cjJ # 7!.(47) This type of grating ean divide the ineident Gaussian be am into 2m + 1 equal-intensity spots.
To ereate a 2-0 array of spots 1-0 gratings that have been previously deseribed may be oriented orthogonally to eaeh other ("erossed"), as shown in Figure 5.28. If two 1-0 BPGs with cjJ = 7! are erossed, three phase levels result (cjJ = 0, 7!, and 27!). Sinee cjJ = 27! is equivalent to cjJ = 0, a single 2-0 BPG ean be fabrieated instead of two erossed 1-0 gratings. BPG spot array generators have been designed and fabrieated to sizes up to 201 x 201.(48)
I+---T'-----+I
(a) Grating Function
! 1II11111111111111111
III! 11111111111111111111111
,11"'1111111111111111111 1 11,
(b) Spot Array Pattern
Figure 5.27. Dammann grating functions and their associated spot array patterns.
Free-Space Optical Hardware
Collimated Gaussian
Beam
Cro ed Graüng Pair
f
291
"Noise" Orders .. (\ , : .: -· 0· . · -. 0 ° 0 • ' •• 0° 0 .:
• ~ 0 •• -: :: . .
Figure 5.28. Two-dimensional spot array generator using crossed binary phase gratings.
To create larger arrays, multiple imaging techniques have been proposed and demonstrated. (49)
From Figure 5.27, we can see that, in addition to the uniform orders that we desire, the BPGs also produce higher, unwanted orders. These "noise" orders are an artifact of the binary structure of the BPGs. The use of multiple phase levels can direct more of the illuminating energy into the desired orders, by effectively creating a pattern function h(x) that has a transform that suppresses the noise orders. Continuous patterns can theoretically completely suppress the noise orders. The next section describes one type of continuous pattern that has been used in an array generation demonstration.
5.4.2.2. Lenslet Arrays
Another approach to spot array generation is based on the use of lenslet arrays and is shown in Figure 5.29.(50) For this approach, a collimated source
~ Laser
ColUmating Lens
Lenstet pots
1-.E •
•
Lenstet I Array -
Input Plane
Output pot Array
~l/ -,
r-I- r-Fourier Plane
Figure 5.29. Spot array generation using lenstet arrays.
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illuminates a lenslet array. The output plane of the lenslet arrayean then be viewed as a eomb funetion of spots to be Fourier-transformed into the output plane by a lens. The analysis of this lenslet grating is identieal to that for the BPG, exeept that now the pattern funetion, h(x}, deseribes the profile of the spots formed by eaeh lenslet. In one dimension, this profile ean be approximated as the transform of the lenslet pupil. The I-D pupil is simply a reet (ul D) funetion, where D is the diameter of the lenslet. Eaeh spot formed by the lenslets is the transform of this pupil and thus has the form D sine (Dx). The lenslet array is illuminated by a Gaussian beam, so the array "input spots" formed ean thus be deseribed by
u(x} = KD[sine (Dx) * ~eomb (~)J reet (~) gaus (~) (5.4.18)
This input pattern is then transformed, yielding
U(lx) = F{u(x}}
= KRT[gaus (fiAlx) * sine (Rlx) * eomb (~/x)] reet (~) (5.4.19)
The "envelope" funetion H(lx} in this ease is a reet ( ) funetion, so that the higher noise orders are eompletely suppressed. The number of spots produeed depends on the width of HUx} in the transform plane, which is inversely proportional to the size of the sine ( ) funetion spot pattern in the input plane. The size of the spots ean be shown to be proportional to Anstell D, or the II # of the lenslets. Thus, "faster" lenslets (lower II #) produce larger arrays of uniform spots.
These Fourier plane array generation teehniques meet most of the "ideal" generator requirements. The spot uniformity is determined by the fabrication aeeuraey of the grating pattern. Although pure phase gratings are used, the generation of noise orders limits the effieieney to about 70% for BPGs. Multilevel and eontinuous gratings (such as the lenslet arrays) ean theoretieally have efficiencies of nearly 100%. Since these Fourier-based techniques rely on interference, the coherence requirements of the illumination are more strict than for other techniques, especially the temporal coherence, or spectral bandwidth requirements. Since the spacing of the spots is proportional to fAlT, where T is the period of the grating pattern, each different wavelength will produce spots on a slightly different spacing. Illumination with a broadband source will thus cause the spots to become blurred. The spectral stability of the illumination is also an issue, since the spacing of the spots must match the spacing of the devices. If the operating wavelength shifts slightly, the spot spacing will also change by a small amount.
Free-Space Optical Hardware 293
This sm all amount will accumulate over the array of spots, however, and may cause the outermost spots to completely miss their respective devices.
5.5. Beam Array Combination and Interconnection
A critical issue in free-space photonic switching is illustrated by Figure 5.30. Signal arrays from the previous stage must be combined with the power supply beams, and the reflected power beams must be routed to the next stage. Since the implementation of this beam combination can account for much of the complexity of the systems, we will discuss the constraints and limitations involved.
Free-space optical 2-D interconnection systems are constrained by the characteristics of available devices, optical elements (lenses, dichroic mirrors, beam splitters, etc.), and the signal light beams themselves. These optical systems may be analyzed using the concepts of image information content, and SBWP. The total number of free parameters, or degrees 01 freedom available for describing the total number of input and output beams, is fixed by these constraints. This allows us to estimate the number of beams (spots) wh ich may be losslessly combined.
These concepts have been discussed by various authors(51 56) as early as 1914. Techniques involving trading an excess of one parameter against another to increase the usable information content of an image have been
Output ignal
Input Signal! OpticaJ Power
Renective Device Array
Figure 5.30. Beam combination task.
294 Chapter 5
proposed. (57,58) The relatively new field of free-space digital optics has presented the system designer with a number of problems concerning the combination and separation of very high resolution (l ~ 10 .um) images with moderate field sizes (0.5~5 mm). This section summarizes the concepts mentioned above, and discusses their usefulness in designing and analyzing some beam combination and interconnection schemes currently proposed for freespace digital optics.
In general, an opticallogic gate or switching node can be characterized as having the following inputs and outputs:
• At least two signal inputs (device considerations may actually limit us to only two)
• Apower or bias input, wh ich mayaiso perform a clocking function • A signal output (which may later be split to give fan-out)
Thus, for a 2-D array of logic devices, we must manipulate at least four spot-array images. The operations to be performed on these images include combination of the signal and power inputs into a single image, and separation of the output image be am to be fanned out to the next stage of devices. This be am combination and separation is ideally performed without loss of power and without any aberration of the spots. The requirement for lossless beam combinationjseparation is due both to the relatively large switching energies and low contrast ratios of current optical logic elements (see Chapter 4),(59,60) and to the low efficiencies of lasers, the optical power supplies for our systems. For example, switching energies for S-SEEDs(61) and GaAs nonlinear Fabry~Perot etalons (NLFPs)(62) are on the order of 1 pJ. For the 10,000 to 100,000 elements that may be required for a viable optical processor with a cycle time of 1O~100 ns, 10 W of average optical power (l pJ j 10 ns per device) is required. While laser diode arrays for providing these levels of power are approaching feasibility, high-power operation at 100 MHz to 1 GHz modulation rates has not been demonstrated.(63) With limited laser power available, and sm all Fresnel reflection losses inevitable, losses must be minimized.
The techniques available for implementing various beam combination and interconnection schemes are limited by the degrees of freedom in the light beams forming the signals and power, the devices which modulate these light beams, and the optical components wh ich implement the schemes themselves. After a review and discussion of these degrees of freedom, we can examine several proposed and experimentally implemented schemes for beam combination.
5.5.1. Degrees of Freedom of Light
The characteristics with wh ich we describe light are generally determined by what we can measure or manipulate. Theoretically, we can take
Free-Space Optical Hardware 295
advantage of any and all characteristics of light to find a solution to the problem of combining and separating arrays ofbeams. The potentially useful characteristics include:
• Wavelength (A) or frequency: the rate of oscillation ofthe electromag-netic field.
• Polarization: the direction of oscillation of the electromagnetic field. • Direction: the angle of propagation of the light beams. • The spatial position of the light beams: refers to the spatial amplitude
modulation, usually in the image planes. • Amplitude: of the electromagnetic oscillations. • Phase: of the electromagnetic oscillations. • Time: although not specifically a characteristic, the ability to modul
ate the other characteristics in time is a significant degree of freedom.
As we will see, the problem is not only limited by these characteristics of light, but also by those of the devices and optical components.
5.5.2. Relevant Device Characteristics
The particular characteristics of the devices can ultimately determine the usable be am combination/interconnection techniques. The constraints imposed by the devices will limit the number of modes available for multiplexing beams or spots together. The relevant characteristics include:
• Device array compression ratio. This is the ratio of the device spacing within the array to the diameter of the device's input windows. For a fixed number of devices, this number is proportional to the ratio of the field to the resolution; thus, the array compression ratio can determine the required complexity of the optical imaging system. The device's input window size also can determine the device's sensitivity to coherent artifact noise, while the device spacings can affect the array's cross talk sensitivity.
• Response time. This will affect the feasibility of time multiplexing of the input and output signals. It will also affect the devices' sensitivities to coherent artifacts when wavelength multiplexing.
• Saturation effects. These can set a lower limit on the speed of the input and output signals.
• Spectral sensitivity. The spectral bandwidth will of course determine the feasibility of wavelength multiplexing.
• Polarization sensitivity. Device birefringence or devices which utilize a polarization-based nonlinearity will have additional constraints on the use of this degree of freedom for beam combination/separation.
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• Coherent noise sensitivity. As will be discussed below, certain devices may be less sensitive to the formation of interference fringes within their optically active areas.
• Optical phase sensitivity. Devices which rely on coherent interference effects will be sensitive to the relative phases of the (coherent) inputs and outputs.
• Propagation direction sensitivity. As will be discussed, the device size can determine the feasibility of angular multiplexing. Additionally, the fabrication andjor mounting of the device may allow operation only in reflection (refleetion mode) or only in transmission (transmission mode).
• Spot position sensitivity. If the devices are further sensitive to the position of the input spots within an input window, the optical system's resolution requirement will be impacted. This effect has been noticed in devices which rely on the creation of photoelectrons where recombination of the photoelectrons and holes can limit the device performance. (64)
Some of these constraints can be interdependent and thus are not entirely orthogonal degrees of freedom. The following discussion should help illustrate these points.
Since one means of lowering the device switching energies is by miniaturization, the device size may eventually decrease into the micron, or even submicron region.(65) Small devices may function as waveguides, supporting only a single transverse mode. To efficiently couple into these small devices, the signal and power beams must be combined so that they are essentially collinear, and are incident normal to the device array. This results in the need for telecentric imaging. The output beam may be transmitted through the other side of the devices (transmission operation), or it may be reflected back along the input path (refleetion operation). These two directions may be the only ones available for very small devices, since all of the numerical aperture available from the optical system may be required just to form the small spots. This does not leave any spatial bandwidth with which to angularly multiplex inputs. Thus, the switching energy trade-offs mentioned above can eliminate all but two of the directions theoretically available for multiplexing inputs. Operation in a reflection-only mode requires optical access to only one side of the device array. This allows the other side to be used for mounting and cooling and usually results in simpler fabrication.
Ifwe combine two or more mutually coherent (even partially coherent) beams, interference fringes will result. The periodicity of these fringes is determined by the beam angles, and the wavelengths involved. If a fringe "valley" from destructive interference rests directly on and covers all of a device, the presence ofthe input signals will go undetected. Note that inputs
Free-Space Optical Hardware 297
from opposite sides of the device (i.e., "transmission mode" devices) can also form interference fringes, except possibly in devices based on strongly absorptive nonlinearities. At least two solutions to this problem exist. First, we could engineer the formation of the fringes such that only fringe "peaks" would fall on devices. This could be rather complicated to set up in the first place, and would require interferometric system stability to continue working (although with very small devices, this high stability may already be necessary). A second solution is to make the devices large enough that any combination of inputs results in multiple interference fringes across the device input area. If the device integrates across all of its input area, it will average out the fringes. This solution is somewhat limited, since the need to miniaturize to decrease switching energies has al ready been stated. A similar argument can be made for combining inputs of differing frequencies (wavelengths), where the fringe pattern will move with the difference frequency. Some devices can operate with inputs separated in wavelength, and if the device response time is too long to resolve the fringe movement, the device will average over the fringes and correctly detect the input. For example, the nonlinearity upon which the S-SEED operates has a bandwidth of ::::::2 nm and a response time in the nanosecond range. Since a 2 nm wavelength difference at 850 nm leads to a cycle time of :::::: I psec for the fringe oscillations, the S-SEEDs would be able to operate on these inputs. We can avoid forming fringes altogether by separating the inputs in space (but still on the same device), which requires larger devices, or by separating the inputs in time, which requires a device response time longer than the signal pulse lengths. If the device is polarization insensitive, two inputs of opposite polarizations can be incident upon the same device, at the same time and wavelength, without generating interference fringes.
If we refer to a particular combination of these parameters (spatial position, wavelength, time or temporal position, and polarization) as a mode ofthe device, then to avoid problems with either spatial or temporal interference, the inputs to each device should be in mutually incoherent, or orthogonal modes. Assuming orthogonal inputs, the number of accessible modes of a device iS(51)
A dev 2 dACT dev number of orthogonal modes ~ 8 --2- (N.A.)
A Tpulse
(5.5.1)
for wavelength division of inputs, and
Adev 2 Tdev number of orthogonal modes ~ 8 ~2 (N.A.) ~-
A Tpulse
(5.5.2)
for time division of inputs, where Adev is the device area, N.A. is the numerical aperture ofthe optical system, dA is the bandwidth of device nonlinearity,
298 Chapter 5
r dev is the response time of the device, and r pulse is the length of the signal pulse. The device constraints place an upper limit on the number of usable modes, and hence determine the maximum fan-in that a device can tolerate. Due to the ever-present power constraints, this beam combination must be essentially lossless, and this will generally reduce the realizable fan-in to less than that predicted by device constraints.
5.5.3. Optical Component Characteristics
The main requirement of the optical components and techniques used for beam combination and separation is the ability to multiplex or demultiplex signals and operations, preferably in a space-variant manner. However, the availability and performance of optical components can limit the number of beam combination/interconnection options. Fortunately, this also appears to be an area where very rapid progress is being made. Newelements and elements with increased performance are being introduced at a steady rate. Large SLMs, binary optical elements, and novel volume holographie materials are some examples of this trend. The main attribute desired of the optical elements is the ability to select one of the optical characteristics mentioned above. Better yet is the capability to further modify one or more characteristics. Of course, it is highly desirable to have control over which characteristic or set of characteristics are modified, so that, for example, a change of polarization is not accompanied by an unwanted change in amplitude (power loss). Some common optical elements can allow us to manipulate:
• Wavelength. While many dichroie elements exist, it may be difficult to losslessly separate two wavelengths if they are too elose together « 10 nm). Also, polarization effects from these dichroie filters must be taken into account during the system design. Modifying or shifting signal wavelengths is possible with techniques such as second harmonie generation, but the high power levels generally required, and the relatively low efficiencies of current techniques may limit the feasibility of this technique.
• Amplitude. Switching devices may act as amplitude selectors, changing their absorption or birefringence in response to the input signal amplitudes.
• Spot position. Image-plane filters can be used to perform space-variant selection based on the positions of the spots. Examples of these filters inelude patterned mirror refiectors (PMR) used for space-multiplexed beam combination and retrorefiector arrays (RRA) used in the crossover interconnection scheme discussed later in this seetion.
Free-Space Optical Hardware 299
• Angle of propagation. This mode can be selected and modified by Fourier plane filters such as volume holograms, faceted prism arrays, and image-plane filters such as the RRAs mentioned above or micromirror arrays like the Texas Instruments's deformable mirror device (DMD) SLM .
• Polarization. PBSs and retardation plates allow relatively simple selection and modification of various polarization states in a space-invariant mann er. Several SLMs using magneto-optics(31) or ferroelectric liquid crystals(30) can also provide space-variant selection and modification of an individual spot's polarizations.
• Phase. Phase modulation is possible via the electro-optic effect, but selecting particular phases usually requires the use of interferometric techniques. These techniques can require very precise optomechanical design and environmental compensation.
While the SBWP represents the number of spatial degrees of freedom of an optical system, we must incorporate the other relevant parameters to obtain a "generalized" bandwidth product (GBWP), or total number of degrees of freedom available to be manipulated to perform the be am combination/ separation task. This GBWP is a fixed, finite quantity, within which various parameters may be traded against one another, such that the total remains constant. Certain novel system designs may be able to utilize all of the available modes, but the following examples will concentrate on systems which have demonstrated beam combination and interconnection using spatial position (SBWP), polarization (PBWP), wavelength (WBWP), and direction (DBWP):
Total No. of degrees of freedom = GBWP
= (SBWP) x (PBWP)
x (WBWP) x (DBWP) (5.5.3)
Thus, we can imagine many spot array images of differing polarizations and wavelengths simultaneously incident at multiple angles on the same device array. Because each ofthese images possesses at least one parameter or mode wh ich is substantially orthogonal to the others, we should theoretically be able to combine and separate the images without loss. Alternately, we may view the total GBWP defined above as a five-dimensional space which may be subdivided across any axes for wh ich we have appropriate selector components.
5.5.4. Beam Combination Examples
The theoretical solution space for the problem of combining and separating input and output beams to 2-D arrays of optical switching devices is
300 Chapter 5
severely limited by the practical aspects of available device and component characteristics. Since new devices and components are being developed, the preceding discussion provides a useful framework in which the beam combination "impact" of these new devices can be evaluated. To provide an overview of how device and optical component characteristics can be manipulated, we will discuss several examples, using devices that have been demonstrated in systems. In these examples, we will assume that the beam combination problem is that of combining two signal inputs and one power supply input ("clock" or "bias") and then separating the modulated output beam. This represents perhaps the simplest configuration necessary for operation of an optical device. Even this simple device requires these four "ports." Each port is implemented as a separate orthogonal mode of the device. The examples in the following sections will illustrate how these four ports may be provided by multiplexing polarizations with access to both sides of the device array, the use of multiple wavelengths, multiple angular directions of incidence, or multiple spatial positions on each device.
In the following examples, one-dimensional descriptions and examples will be used, although these ideas can be easily extended to two dimensions. In the figures used in this chapter, the lines indicating light propagation are meant only to highlight the ideas presented in the text. They are not ray traces. In these setups, infinite conjugate imaging is used, and the relevant lenses are included to help identify the image planes. The lenses thus transform the spot arrays in the image planes to collimated beam arrays wh ich travel between the image planes. For the purpose of this discussion, "spots" and "beams" will be used interchangeably.
We can evaluate these schemes by examining the number of components required, the number of image planes formed, and the loss of optical power and/or SBWP. The number of components will affect the total system cost. Each image plane will generally require alignment, so minimizing their number can simplify system assembly and improve system stability. AdditionaIly, each imaging step contributes some aberration, so the number of image planes also indicates the level of aberration control required per lens. Excessive power loss will limit the system speed, and loss of resolution can also affect the system speed, as weIl as signal cross talk and system cascadability.
5.5.4.1. Transmission-Mode S-SEEDs
The first S-SEEDs fabricated operated in transmission mode,(66) in that the power supply beams were modulated as they were transmitted through the devices, with the device absorption determined by the input signals incident on either side of the devices. Other optical switching elements, such as NLFPs(62) and bistable etalons with absorbed transmission (BEATs),<67) share this two-sided access characteristic. The beam combination issues in
Free-Space Optical Hardware 301
this example are similarly applicable to other two-sided access devices. This two-sided access is one extreme of the direction degree of freedom, where counter propagating directions are available for multiplexing. When used in transmission mode, S-SEEDs possess the following relevant characteristics:
• Essentially single-wavelength operation (c::::::2-nm range)-no available selectors can combine/ separate (i.e., transmit one wavelength while reflecting the other) two wavelengths this elose together without significant (> 15'Y<,) loss, and/ or unacceptable angular performance .
• Polarization insensitive and nonbirefringent-so we may use two polarizations and the polarizations will not change significantiy upon transmission or reflection from the devices.
• Relatively small size- currently about 5-j1m-diameter input/ output window sizes. Thus, to couple 99% of an incoming signal beam, we must use approximately 1/ 1.7 or less optics.
Due to these constraints, we are left with space, polarization, and direction as the parameters to manipulate.
One beam combination solution is shown in Figure 5.3Ia, where the signals are incident on opposite sides of the device array. They are combined
PBS )J4
signal input 1
SEEDs )J4
(a)
SEEDs )J4
PBS
signal input 2
output
PBS ~ PBS
signal -1[AjM:===tG\~M 4t==f1EbJ~· output input 2 T '0 I T
signal input 1
(b)
power
Figure 5.31. Lossless beam combinationj separation via polarization.
302 Chapter 5
with the transmitted power supply via polarization and are incident at the same spatial position on the array. Since both signals have the same polarization, A/ 4 retarders are necessary to convert the signals to orthogonal circular polarizations. Signal 1 is thus right circularly polarized, while signal 2 is left circularly polarized, and there are no interference fringes formed.
An equivalent arrangement is shown in Figure 5.31b, where both sides of the device array are available, but the devices are not transmissive. In this case, the signals are both incident on the same side, and the power supply is reftected from the other side.
Both of these arrangements are theoretically "lossless" (except for Fresnel reftection, PBS, and device losses). The two image planes require two lenses, retarders, and PBSs.
5.5.4.2. Reflection-Mode Optical Logic Etalons
The beam combination problem changes when only one side of the device arrays is optically accessible. Nonlinear Fabry- Perot interferometers and optic logic etalons (OLEs)(62) may be operated in this reftection mode. They share with S-SEEDs the characteristics of small size and polarization insensitivity, but they also allow dual wavelength operation. Figure 5.32 shows how the dual wavelength operation and polarization insensitivity of opticallogic etalons allow us to use polarization and dichroie beam splitters to losslessly combine two signal inputs (A2 perpendicular. A2 parallel) and one power supply input (AI parallel), and separate the reftected output (AI perpendicular).
'AJ4
J..l " mjrr~r PBS 1.'\
power: AZ / / lt:---.. OLEs
11 ,
11 r
signal.: Al
AZ"mjrror ... output: Az
" ..L
~ ..L
signalz: Al
Figure 5.32. Lossless beam combinationjseparation via wavelength division.
Free-Space Optical Hardware 303
The two signals are combined via polarization onto the devices, and the power input and reflected output are separated by a polarization optical isolator. The signals are combined with the power beams via the two dichroie mirrors, with one mirror transmitting the power wavelength and the other reflecting it. Since the signals are orthogonally polarized (RCP and LCP) in the device plane, they do not interfere.
This arrangement is also "lossless" and has only a single image plane. This single image plane requires only one high-resolution lens, one PBS, and one retarder. The loss of the direction degree of freedom does require the additional dichroie elements, however.
5.5.4.3. Ref/ection-Mode Nonlinear Interference Filters
Certain devices allow neither access to both sides of the device array nor operation at multiple wavelengths. One solution to the be am combination problem in this case is pupil-division or aperture-division be am combination. This technique has been proposed and demonstrated for nonlinear interference filters (NLIFs).(67.67a) These are single-wavelength devices which are polarization insensitive. In system demonstrations, the sizes of these devices have been larger than S-SEEDs or aLEs, about 20 ~m in diameter. Recall that for infinite conjugate imaging, an input beam at angle () is ideally focused to a unique position x = ftan (). The position of the focused spot remains unchanged regardless ofthe position ofthe beam on the aperture ofthe lens. As shown in Figure 5.33, however, the angle ofthe chief, or central ray ofthe beam does change. All three input beams in Figure 5.33 focus at the same position, but the three "cones of rays" are incident at different angles. lust as beam angles are mapped to spot positions by the lens, so are beam positions mapped to spot "cone-angles." Since all beams with an angle of () are still
power
signals 1&2
beams devices output
Figure 5.33. Lossless beam combinationjseparation via pupil division.
304 Chapter 5
focused to the same position on the device array, we can combine several be am arrays by dividing the lens pupil, and providing aseparate aperture for each beam array to be combined. The reflected power beam also exits via a separate aperture within the larger pupil of the lens.
This method can provide simple and efficient be am combination if the required spot size is relatively large (15-20 .um) and the beams to be combined are mutually incoherent. If the beams are coherent, interference fringes can result. If the device size is large enough to "integrate" across all of the fringes, this effect will not cause apower loss, although it may affect the alignment tolerances ofthe system. Ifthe device size is smalI, the interference fringes can introduce signal-level nonuniformities. Additionally, if the spot size is smalI, a very fast lens (low 1/ #) will be necessary, because the total aperture of the lens has been subdivided. Thus, if the four beam arrays of Figure 5.33 are multiplexed into an//I lens, each array will actually be using the lens at speeds of about//3. The discussion of Section 5.2.3 showed that, for 5-.um spots, an 1/1.7 lens is needed. If four beam arrays are to be multiplexed together to form a single array of 5-.um spots, the lens must have anj! # ab out 1/0.6. The expense and complexity of such a lens make this approach undesirable for sm aller device sizes. System alignment is also more difficult for pupil-division systems, since they are inherently non-telecentric. Small changes of focus may thus move the spots' positions laterally, in addition to defocusing the spots.
Despite some disadvantages, pupil division requires the least hardware to implement the necessary be am combination. Only a single lens is required, and only one image plane is formed. The simplicity of this "Iossless" beam combination technique makes it attractive for certain applications.
5.5.4.4. Reflection-Mode S-SEEDs
Another beam combination method for single-wavelength, polarizationinsensitive devices is image-division, or space-multiplexing. This technique has been demonstrated in several S-SEED-based systems. (2-4,68,69) The input "windows" of the S-SEEDs are rectangular and large enough to accommodate two spots so that the signal and power spots may be incident adjacent to one another within the same device input window. For a 2-D array of devices, both the signal and power spot array images are combined onto the same polarization by interlacing, or space-multiplexing, the two spot array images. This space-multiplexing is achieved with a double optical isolator arrangement and patterned mirror reflectors (PMRs) as in Figure 5.34a. To form thc signal arrays, the output of the previous device array is sent through interconnection optics (Section 5.5.5) which provide a fan-out of two and spatially overlap the two signal arrays. These two signal beam arrays are polarized perpendicularly so that one signal array is transmitted by the PBS
Free-Space Optical Hardware
Reflected Signal Spot
Mirror
Signal.
ignal2
PBS
(11)
(1)
(b)
<
/
:> ')J4 0 PMR.
~')J4f)
/: f\
v PMR
')J4 0
S-SEEDs
(a)
Power/Outpu
2
305
Output
diode windows
(c)
diode mesas
Figure 5.34. Space multiplexed beam combination . (a) Schematic ; (b) patterned mirror image; (c) S-SEED image.
and the other is refleeted. Signah passes through a A/ 4 plate with its "fast" axis oriented at 45° to the plane of ineidenee of the PBS. This A/4 plate retards the eomponent of the light perpendieular to this "fast" axis by 1/ 4 waveiength, making the beams eireularly polarized (eire-pol). As they pass through the Jens, they are foeused onto PMR. as shown in Figure 5.34b. The PMR is an array of small mirrors deposited on a transparent substrate. The size of these mirrors matches the spot size and they are positioned such that the mirror (and the spot refleeting from it) will be imaged onto one side of eaeh S-SEED window. This imaging is da ne by the teleseope formed by the PMR lens and the S-SEED Jens. Signab follows a similar path, refleeting from PMR2 . Sinee both signal arrays are imaged to the same Joeation on the S-SEED array as in Figure 5.34e, both PMRs must be identieally aligned.
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After the spots reflect off the PMR, they are recollimated by the lens and pass through the 1../4 plate a second time. This second pass converts the circpol back to linear polarization, and the signal beam arrays are recombined by the PBS. The signal arrays are then imaged onto the S-SEED array to set the device states.
To read out these states in the next c10ck cyc1e, the power beam array is parallel-polarized. As before, the 1../4 plate retards the polarization component perpendicular to the fast axis by 1/4 wavelength and converts the beams to eire-pol, but the lens in this case focuses the beams to spots on the transparent portions of the PMR adjacent to the mirrors. These spots are positioned such that each spot will be imaged onto an S-SEED window adjacent to a signal spot. These power spots pass through the PMR and are recollimated by the second lens. They pass through a second 1../4 plate aligned at 90° to the first 1../4 plate, which retards the other polarization component (the one not retarded by the first 1../4 plate) by 1/4 wave, and returns the be am array to its original parallel-polarization. The power beams then pass through the PBS, and at the output we have combined the power beam array and the signall beam array into the same aperture and onto the same polarization. These two be am arrays pass through the PBS and another A/4 plate (again configured as an optical isolator). The signal and power beams are imaged adjacent to each other in the rectangular S-SEED windows. The power beams are reflected, recollimated, and, after passing through the 1../4 plate again, are reflected by the PBS and imaged onto the PMR2. Since this PMR is aligned identically to PMRl, the output beam array passes through the transparent portions of the PMR, and proceeds to the interconnection optics of the next stage.
Since we are telecentrically imaging the spots through a glass plate, only spherical aberration will accumulate. If the plate is thin (~1 mm) and the lenses are used at speeds slower than about f /8, the spherical aberration is not significant. An additional benefit of the use of slower optics is that the depth of focus of the spot array image at the PMR is larger than for the image at the S-SEED array. This significantly eases the alignment tolerances for the PMR.
Thc loss of two-sided access, and the direction and wave1ength dcgrees of freedom require added complexity in the hardware. The space-multiplcxing solution requires five lenses, though only one of these lenses need have high resolution. Only one PBS is needed, but three A/4 plates are necessary. The power beam array passes through three image planes (PMR, S-SEED, and PMR) and the signal beam arrays pass through two image planes (PMR and S-SEED). The increased hardware complexity requires more sophisticated aberration control and increases the accumulation of the small Frcsnel losses. For small deviccs having single-sided, single-wavelength operation, however, space-multiplexing is the only viable "lossless" solution.
Free-Space Optical Hardware 307
5.5.5. Signal Interconnection Issues
Interconnection of 2-D device arrays gene rally requires fan-out of the device outputs, redirection or permutation of the optical signals, and fan-in of multiple signals onto each device of the destination array. A general case is shown in Figure 5.35, where each device output may have a different fan-out, and require a different interconnection operation. This section will discuss so me of the optical hardware issues associated with implementing optical interconnection schemes. These issues are c10sely related to the beam combination constraints presented in the previous section; hence, interconnection techniques may be analyzed in terms of the parameters described earlier: the light, device, and optical element characteristics. A more detailed overview of various interconnection schemes and their associated architectural issues will be presented in Chapter 6.
The primary concerns for this discussion are fan-out, fan-in, and interconnect space-variance. Fan-out splits the device output power. This lowers the system speed if the device fan-out is greater than the device fan-in. The fan-in will be limited by the beam combination issues of the previous section, however, and if the fan-in is greater than 2, low-Ioss schemes may not be available. In terms of signal interconnection, space-variance is a measure of the complexity of the interconnections. If all device outputs undergo the same interconnection operations, the system is said to be space-invariant. If different device outputs undergo separate interconnection operations, the system is said to be space-variant. The use of space-variant interconnections can reduce the number of devices required to implement a specific function and thus help reduce the total hardware complexity and optical energy consumption. Space-variant interconnections can be created by combining space-invariant interconnections. The number ofthese invariant interconnection operations necessary is a measure of the degree of space-variance. For example, the I-D Banyan interconnection of Figure 5.36 has Iimited spacevariance. Each link stage requires three interconnection operations: all of
le 01 lE'J --- 02 .\ .\
Input Output
ode 5
Todes
Figure 5.35. A generic space-variant interconnection.
308
Input
Nndc~
Output
Node
I ~--------~~~--~--~D-~~----~g
2~~--~~~~~~~~~~~~~2
3 3 ~ 4
:~z::t=:::s;::::::;~~~~:::~~S~::! 7 ~~--~~~~~~~~~~-e7 N 8
Figure 5.36. Banyan interconnection network.
Chapter 5
the devices require a straight connection, half also require a shift up, and half require a shift down. A highly space-variant interconnection pattern can thus be broken into a collection of "interconnection operations" which are space-invariant over a subset ofthe original device outputs. These subsets might be very sm all (one or two device outputs) for a highly space-variant interconnect, or relatively large, as in the Banyan interconnection.
Space-variant interconnection schemes which provide multiple, different interconnection operations require multiple, different optical systems, i.e., each different device group must "see" aseparate optical path. This collection of optical paths can be implemented either by providing aseparate and complete optical system for each path, or by multiplexing the paths together within one optical system. Aseparate optical system of limited SBWP can be provided for each device output in a manner similar to the microiens system of Figure 5.37. In Figure 5.37a, individual spot images are simply relayed using microienses, but by adding holograms, microbeam splitters, microprisms, or other elements to each beam path, the individual beams may be split and redirected in a space-variant manner, as in Figure 5.37b.(9.IO•12•13)
The collimating and focusing power of the microlens can also be
(a) (b)
Figure 5.37. Interconnections using microlens arrays. (a) Space-invariant interconnection; (b) space-variant interconnection using faceted holograms.
Free-Space Optical Hardware 309
incorporated into the hologram, so that a single hologram might split, redireet, and reimage the output signal SpOt.(8,IJ,14) Alternatively, bulk optics may be used, and the system's interconnection operations may be multiplexed together by subdividing the signal amplitude, using multiple polarizations, directions, wavelengths, or spatial positions, This multiplexing may take place in an image plane, in a pupil plane, or in both planes, To provide a certain degree of space-variance, systems may employ combinations of different types of multiplexing, The availability of components which can modify or select a particular characteristic or combination of characteristics of the light beams (polarization, spatial position, direction, etc,) is again the primary limiting factor. Thc placement of these components in either a pupil plane or an image plane of the system introduces additional trade-offs which are discusscd in the following sections,
5,5,5.1. Pupil-Plane Issues
In the infinite conjugate imaging system of Figure 5,38, the devices are spatially separated in the image plane and thus the signal spots from these devices are also spatially separated, In the pupil plane, the signals pro pagate as spatially overlapped beams, which are distinguishable only by angle of propagation, Using specific elements in the pupil to implement interconnections has advantages and limitations, No additional imaging is required, which lessens the number of components needed and the alignment required, lt can also result in a very compact and rugged system, To implement lossless space-invariant interconnections, we may use prisms to redirect all of the beams by an identical amount. Similarly, diffraction gratings can redirect
image plane pupil plane image plane
Figure 5.38. Image and pupil planes in a telecentric infinite conjugate imaging system,
310 Chapter 5
the beams space-invariantly, and also provide fan-out. To implement lossless space-variant interconnections, however, we must perform different interconnection operations based on the beam propagation angles. The only element which can, in principle, select and redirect beams based on small differences in their angle of propagation is a volume hologram, as in Figure 5.39. Computer-designed planar holograms which show angular replay selectivity have recently been proposed,(70) but the large replay angle difference required limits their application. Volume holograms have been suggested for use in space-variant interconnection schemes, (71, 72) but issues of cross talk, efficiency, and hologram production have kept most of these systems from reaching fruition.
Other methods for implementing pupil-plane space-variant interconnections generally suffer a loss of signal power or image resolution (SBWP). For example, the highly space-variant perfect shuffie interconnection may be implemented through the combination oftwo space-invariant operations in the pupil plane.(72.) A beam splitter may be used to produce two copies of the signal beam array, each with half of the original amplitude. These copies are then recombined such that the focused spot images partially overlap, as in Figure 5.40. Only the "interlaced" region is used, thus one-half of the optical power is lost. In this example, there is also amismatch between the input and output spot spacings. Other schemes address this problem,(73-75) but still suffer loss of power (from masking of the signals), increase in spot size (from an anamorphic magnification step), or require the use of 2-D lenslet arrays. Another pu pi I-plane technique for generating two signal array co pies and shifting them with respect to each other is by spatially dividing the pupil and performing a space-invariant redirection of the portions of the beams within each subaperture, as in Figure 5.41.(76-78) Like the beam splitter
image plane volume hologram image plane
Figure 5.39. Space-variant interconnections using a volume hologram.
Free-Space Optical Hardware 311
Input 1 '1'\.' 7 8
1 2 3 4152637485 i I !i 1 , 8
output 15263748 (a)
mJrror
In ul \ (drcular poIarb.allon) m1rror
Figure 5.40. Perfeet shuffie interconnec-tion using amplitude division and Output interlacing. (b)
technique of Figure 5.40, this can also be used to implement space-variant interconnections, again by sacrificing the spots which are imaged outside of the array boundaries. The redirection of the portions of the beams in the pupil can be done with faceted prisms, holograms, lenses, or mirrors. Thus, the required interconnection operations are spatially multiplexed within the pupiI. This pupil division also results in an increase in the spot size (loss of resolution), causing amismatch between the input and output spot sizes. A lower f-number lens may be used to reimage the spots with the correct size, but this will also decrease the spot array pitch.
image plane Facetted hologram image plane
Figure 5.41. Space-variant interconnections via pupil division using a faceted hologram.
312 Chapter 5
5.5.5.2. Image-Plane Issues
At the image planes of Figure 5.38, the arrays of spatially overlapped signal beams are focused to arrays of spatially separated spots. This spatial separation provides a major advantage for implementing space-variant interconnections, since we can multiplex the required interconnection operations in space. This spatial multiplexing is similar to the pupil division scheme discussed earlier, but, since the beams are not spatially overlapped, spacevariant interconnections can, in principle, be implemented without loss of power or resolution. However, other limiting factors are present. Most spacemultiplexing schemes require the addition of"interconnection image planes" to the system, and these extra image planes introduce several practical constraints. Each image plane within the system contributes:
1. Aberration: each imaging operation contributes some geometric aberration which can blur and misplace the spot images. Ifthe optical path taken by the signal beams encounters many image planes, it can accumulate enough aberration to cause power loss, alignment problems, or signal-level nonuniformities. This becomes increasingly significant as the signal array size increases.
2. Alignment: generally, each image plane requires the spot array to be aligned with another spot array, a mask, or other optical element. This alignment takes time during the initial system construction, it requires positioners to perform the alignment to the required accuracy, and it places some additional tolerances on the overall system stability.
3. Defects and dust: small defects or contamination in a pupil plane will only block a very small fraction of the collimated beams' energies, but in an image plane, aspeck of dust may completely block a focused spot, thus eliminating one signal path. This places tight requirements on the fabrication and maintenance of the optical elements placed in the image planes.
4. Physical volume: the total size and weight of the system is often a concern. Telecentric imaging as in Figure 5.8 requires a linear distance of twice the lens's focal length for each lens used at an image plane; thus, systems with many image planes will tend to be large.
Despite these limitations, the spatially separate nature of the signals at image planes makes image planes very attractive for implementing space-variant interconnections. The following examples will illustrate how relatively simple optical elements may be used in image planes to implement space-variant interconnections with theoretically no loss of power or resolution.
To select and separate the elements of each interconnection operation subgroup, a partitioned or pixellated component may be placed in the image
Free-Space Optical Hardware 313
INPUT
maskZ
OUTPUT
Figure 5.42. Branch and mask: a lossy space-variant interconnection implementation.
plane. Perhaps the simplest component for separating these groups is a partitioned absorptive mask. One way in which these masks may be used is shown in Figure 5.42. This "branch and mask" scheme can implement arbitrary space-variant interconnections by creating aseparate copy of the input for each interconnection operation (like the perfect shufHe example above), and then masking the unwanted signals in each branch with a space-variant absorptive mask. However, this scheme contributes loss due to the masking, and can suffer be am combination problems in recombining the various branches.
A theoretically lossless version of this branch and mask technique may be implemented with space-variant patterned mirrors, rather than the masks.(79) Figure 5.43 shows the use of space-variant mirrors to implement two shifting operations. The pixels to be routed to each operation are selected by the presence (or absence) of sm all mirrors at each spot's location in the array. The shift-operations are provided by the tilted mirrors. When the input array is imaged onto this mirror array, so me of the spots are reflected back through PBS 1 to one tilted mirror, while the others proceed through the mirror array to another tilted mirror. They are recombined onto the same polarization by PBS2 , using the same scheme in reverse. This recombination of the two interconnection operations is identical to one "leg" of the beam combination scheme of Figure 5.34. Space-variant patterned mirrors
314
1J4-Plate\
INPUT
mirror array
mirror array
/V V
OUTPUT
Chapter 5
1J4-plate
PBS 2
Figure 5.43. Space-variant interconnection implementation using space-variant mirror arrays.
may be easily fabricated by patterned metallization of transparent substrates (glass, quartz) and they are thermally and mechanically stable and rugged. This technique may be applied to arbitrarily space-variant interconnections. (79)
Space-variant mirrors mayaIso be implemented by a combination of partitioned wave-plates (retarders) and PBSs, as in Figure 5.44. Several "lossless" space-variant interconnection schemes based on space-variant polarization components have been proposed. (80- 82) These implementations use partitioned (space-variant) wave-plates to selectively polarize the signal
INPUT
partitioned mirror - IJ waveplate
PBS
"'I~ 4-plate
I\~ ,
mirror
K \ I
P artitioned waveplate
OUTPUT
Figure 5.44. Space-variant interconnection implementation using partitioned wave-plates.
Free-Space Optical Hardware 315
pixels and PBSs to separate and recombine them. In Figure 5.44, the input array is imaged onto the partitioned wave-plate. The input spots are selectively polarized and may be routed to one (or possibly both) of the two shifting operations. The partitioned wave-plate at the output reestablishes a uniform polarization across the array. One problem with this scheme is the lack of partitioned polarization components with performance equaling that of the nonpartitioned polarization components. A particulariy attractive aspect of this technique is the capability of dynamically changing the interconnection pattern by using electrically controllable partitioned waveplates.(81)
A high degree of symmetry in the interconnection pattern may allow for a very simple optical implementation. The crossover interconnection of Figure 5.45 is highly space-variant, but also very symmetric. (83) It has the added benefit of being topologically equivalent to the perfect shufHe interconnection. As shown in Figure 5.45, the size of the "cross" varies from stage to stage, and in a 3-D network implement at ion , the direction of the "cross" will also vary.
Figure 5.46 shows one implementation of an optical crossover stage interconnection. The input image is circulariy polarized and thus is equally split into two copies by the PBS. The copy passing through the PBS is parallel-polarized until it passes through the quarter-wave plate (QWP) and becomes circularly polarized. The lens then focuses it to a spot array on the plane mirror. Reflecting off the plane mirror, the image returns through the QWP. After this second pass through the QWP, the image is perpendicularpolarized and is reflected by the PBS. The other image copy is initially reflected by the PBS and is thus perpendicular-polarized. It follows a path similar to that described above, except that it is imaged onto a 1-0 retroreflector (RR). A right-angle prism will implement this 1-0 retroreflection. The RR reverses the image about the axis of its corner, as weil as reflecting
Input
odes
Output
ode.\
~----~~~~~~=S~~~ 1 2 2 3 3 4 4 5 5 6 6 7 7
8 R
Figure 5.45. Crossover interconnection network.
316
Input Image
Input Image
(Circularly Polariud)
Mirror
Mirror
Output Image
Chapter 5
(a)
(b)
Prism Grating
Output Image
Ce)
Figure 5.46. Crossover interconnection. (a) Link stage interconnections ; (b) beam propagation; (c) optical hardware.
Free-Space Optical Hardware 317
the image back toward the lens. This reversed and refiected image is collected by the lens and passes again through a QWP. After this second pass through the QWP, the polarization of the refiected image is rotated. Since it started with perpendicular-polarization, it is rotated to parallel-polarization and passes through the PBS on its return trip. At the output the two image copies are recombined into a single, overIapped image. Thus, the connection of Figure 5.46a is formed, where the reversed image forms the crossed connections, and the other, the straight connections. The use of polarization and highly reflective components can allow this interconnection to be implemented with very little loss.
As mentioned before, the width of the "cross" must be varied from stage to stage within a fully interconnected crossover network. One means ofrealizing this is by replacing the RR with an RRA, or prism grating. In this case, each "prism facet" reverses or "crosses" a portion of the image. Thus, to vary the "width" ofthe cross, we simply vary the width ofthe facets. In a fully interconnected 3-D network, half of the stages of the system will also require crossovers which are perpendicular to those used in the previous stages. For instance, the first half of the switching system may interconnect devices horizontally across each device array, while the last half will perform vertical crossovers between devices. This is easily accomplished by simply rotating the second-half RRs by 90°, so that the spot array images are reversed about horizontal, rather than vertical, axes.
This interconnection technique is theoretically lossless in both power and resolution, but in practice, it is also Iimited by practical constraints. (84)
If the RR is made by ruling the v-grooves in a metal, the different phase delays for the perpendicular and parallel components of the circularly polarized spot array image cause the reflected image to be elliptically polarized. This image will not be converted back to linear polarization by the second pass through the QWP, and significant power will be lost. This problem can be solved by replacing the QWP with another wave-plate with the specific retardance and fast-axis orientation required for the metaIon which the RRA is fabricated. This problem mayaIso be avoided by using an appropriately designed dielectric mirror coating on the RRA. Another optical constraint is due to vignetting of the focusing beams by the tops of the RR grooves. Because of this c1ipping, a magnification step is usually required between the device array plane, where low j:number beams are needed for the sm all devices, and the RR plane, where higher f-number beams are required to avoid c1ipping. This magnification step in the interconnection optics can be the limiting factor in the overall system size.
5.6. Summary
While a coverage of all of the optical effects relevant to free-space digital optics is beyond the scope of this chapter, it is hoped that the definition of
318 Chapter 5
many of the basic concepts, and illustration of practical "tricks" and useful intuitive analogies will equip the interested reader for further study in this area. The references include a variety of both text and reference books that can provide more detail on many of the topics addressed in this chapter, especially the broader areas ofbasic optics, aberrations theory, and polarization effects and components.
5.7. Appendix: Basic Fourier Optics
When an object in the object plane is set at a distance equal to the focal length of a converging lens and the distance to the image plane from the lens is also equal to the focallength ofthe lens, the lens will provide a Fourier transformation of the object in the image plane.(85,86) This is illustrated in Figure 5.A.l, The field distribution, 'l'i(Xi, Yi), in the image plane is equal to
'l'i(Xi, Yi) = fW fW T(xo, Yo) e-j2"U;xo+fyYo) dxo dyo -00 -00
(5.A.I)
where T(xo, Yo) is the transmittance function ofthe object in the object plane, (xo, Yo) are the coordinates of a point in the object plane, and (Xi, Yi) are the coordinates of a point in the image plane. It is important to remember that this equation is conditional on the paraxial assumption which assumes that xo, Yo, Xi, Yi «f
Lens
Object ......---- -----
I -----~--I-, -~--+ Figure 5.A.l. Fourier transformation using a Jens.
Free-Space Optical Hardware 319
The intensity distribution In the image plane I/xj, Yj) ean be found to be
5.7. t. Spatial Frequency
The plane wave equation represents planes of eonstant phase whieh pro pagate through space in the direction of the propagation number k. This equation ean be rewritten using direction eosines, and the ang\es shown in Figure 5.A.2, to give
lfI(X, y, z, t) = lfIo /k(x cos a + y cos ß + = cas y ± (01) (5.A.3)
This equation ean be rewritten to
(5.A.4)
where the spatial jrequencies jx. j~, j, are given by
J, = eos a x ?. (5.A.5)
j . = cos ß y ?. (5.A.6)
r = eos y Jz ?. (5.A.7)
k
Figure 5.A.2. A plane wave in the xy= coordinate system. ~------~------------------ z
320 Chapter 5
They represent the reciprocal of the spatial wave periods in the x, y, and z directions. The unit of spatial frequency is cycles per millimeter. These spatial frequencies are represented by the incident angle with respect to the axis of interest as shown in Figure 5.A.3. Thus, each incident angle represents a different spatial frequency. Thus, when a, ß, or y is smalI, the spatial frequencies will be large. By setting ()I = 90° - a , ()2 = 90° - ß, and ()3 =
90° - y, the spatial frequencies can be represented by
j . = sin ()I x A (5.A.8)
r = sin ()2 jy A (5.A.9)
r = sin ()~ jz A (5.A.IO)
In this case, a large () corresponds to a large spatial frequency. The spatial frequencies are not independent but are related through the
equation
I = cos2 a + cos2 ß + cos2 Y = f~A2 + f~A2 + f~A2
which can be rewritten to yield
( ) -i27C(f,x + f,y) -ikz(1 - 11.)..' - ]2)..2)1 / 2 ± t '!' x,y,z,t = ,!,oe 'Y e 'Y e m
y
k
= _A. __
(5.A.ll)
(5.A.12)
Figure 5.A.3 . The relationship between a plane wave in the xyz coordinate system and their spatial frequencies.
Free-Space Optical Hardware 321
This equation states that the value of the complex amplitude of a plane wave at a distance z is given by the product of the complex amplitude at z = 0 times a z-dependent exponential.
5.7.2. Useful Theorems
The re\ationship between these spatial frequencies, 'P(fx,/r), and a spatial image, If/(x, y), is given by the Fourier transfonn
F{If/} = 'P(fx,/r) = fXl f'" If/(x,y) e- i21C(fxX +fYy) dxdy (5.A.13) -00 -00
and the inverse Fourier transform
F-1 {'P} = If/(X,y,z,t) = foo foo 'P(/x,/r) e- i21C(!xx+!yy) d/xd/r (5.A.14) -00 -00
For these equations the bold variables denote that they represent complex functions.
Some of the more often used theorems include:
Linearity Theorem
F{ag + ßh} = aF{g} + ßF{h} (5.A.l5)
The transform of a sum of two functions is the sum of their individual transforms.
Similarity Theorem
F{g(ax,ßy)} =_l_G(f,f~_) laßI \a ß
(5.A.16)
A stretching of the space domain coordinates (x, y) results in a contraction of the frequency-domain coordinates (fx, /y), in addition to a change in the amplitude of the spectrum.
Shift Theorem
F{g(x - a, y - ß)} = G(/x,/r)e-j21C(afx+P!y) (5.A.l7)
A translation of a function in the space domain introduces a linear phase shift in the frequency domain.
322 Chapter 5
Parsevar s Theorem
The energy in the space domain is equal to the energy in the spatial frequency domain (conservation of energy).
Convolution Theorem
F{f" f" g(~, 1])h(x - ~,y - 1]) d~ d1]} -00 -00
= G(fx,/y)H(fx,fy) f 00 fXJ IG(fx,/Y)12 dfx d/y (5.A.l9) -00 -00
The convolution of two space-domain functions is equivalent to multiplying their individual transforms.
Autocorrelation Theorem
F{fOO fCXJ g(~,1])g*(X-~,y-1])d~d1]}=IG(fx,/Y)12 (5.A.20) -00 -r:o
also,
F{lg(~,1]12}= fXl foo G(~,1])G*(~-fx, 1]-fy)d~d1] (5.A.2l) -00 -00
A special case of convolution.
Fourier Integral Theorem
Frl {g(x, y)} = rlF {g(x, y)} = g(x, y) (5.A.22)
The successive transformation and inverse transformation of a function yields the function again, except at points of discontinuity.
Free-Space Optical Hardware 323
5.7.3. Common Function/Transform Pairs
Some eommonly used funetions are shown in Figure 5.A.4, and listed below:
Rectangle function
Sinc function
Sign function
Triangle function
-1/2
rect(x) 1
comb(x)
+112
-4 -3 -2 -I 0 1 2 3 4
reet (x) = {~ lxi ~ 1/2 otherwise
. sm nx sme(x) =--
nx
{Ix> 0
sgn (x) = 0 x = 0 -1 x< 0
A(x) = {~ - lxi
sinc(x) 1
lxi ~ 1
otherwise
-3 -2 -I 0 1 2 3
sgn(x)
+11----
----I-I
Figure 5.A.4. Commonly used functions.
-J
A(x) 1
324 Chapter 5
Comb function
00
comb (X) = I ö(x - n) n =-00
Circle function
circ (Jx2 + l) = {~ Jx2 +l otherwise
With these functions as a basis, Tables 5.A.l and 5.A.2 list so me common transform pairs for several functions that are separable in rectangular coordinates.
Table 5.A.1. Frequently Used Functions and Their Fourier Transforms
Funetion Definition Transform
Reetangle reet(x) = {~ Ixl:( 1/2
otherwise
sinc (/,)
Sine . sin nx
sme(x) =--rect (/,)
nx
Triangle A(x) = {~ - lxi Ixl:( I
otherwise
CI x>O Sign sgn (x) = 0 x=O -I x<O jnj,
Comb ( x)x. eomb T = ITI n~L:lf 8(x - nT) ITI comb (Tjxl = ):. ~ .. 8~; -~)
Dirae delta 8(x) = \im Ne - N'~x2
Phase <Il(x) = Cf",
Circle . P+7 {I P+l Clrc ( x + y ) = 0 otherwise
Gaussian gaus (x) = e .x' e --1fj~
Free-Space Optical Hardware
Table 5.A.2. Two-Dimensional Transform Pairs for Some Common Functions85
Function
reet (x) reet (y)
i\(x) i\(y)
6(X,y)
sgn (x) sgn (y)
comb (x) comb (y)
5.7.4. Sampling Theory
Transform
(' RU~ f Ir-)
si nc ((x) sinc U~)
sinc2 u;) sinc' U~)
325
Sampling is a process whereby a function g (x, y) can be represented by an array of sampled values taken at discrete points in the x, y plane. A rectangular lattice of sampIes of thc function g can be represented by
(5.A.23)
where gs (x, y) represents the sampled values of the function g (x, y). The sampIes are spaced at intervals of width X in the x-direction and Y in the y-direction. This is illustrated in Figure 5.A.5.
The transform of gx (x, y) is found by convolving the transform of the comb functions with the transform of g(x, y), wh ich gives
(5.A.24)
where the asterisk indicates convolution. This can be manipulated to give
(5.A.25)
which is the spectrum of the sampled function. The transform of this sampling function is shown in Figure 5.A.6. This spectrum incIudes multiple reproductions of the original spectrum separated by the distance I/X in the
326 Chapter 5
______ ~--~L---~---L--~--~~-x
L // x
Figure 5.A.5. A sampled function.
fx direction and 1/ Y in the fy direction. Assuming a bandwidth Bx in the xdirection and By in the y-direction, if the sampie spacings X and Yare less than
I X:(- and
2Bx
1 Y:(-
2By
(5.A.26)
then no spectral overlap will occur. To recover the original spectrum G(x,y) from Gs(x,y) will require a filter that will transmit the center term [n = 0, m = 0 from Eq. (5.A.25)] without distortion and block the other terms .
• x
(a) (b)
Figure 5.A.6. The spectra of (a) the original function and (b) the sampled function.
Free-Space Optical Hardware 327
5.8. Exercises
I. From Figure 5.3 and the paraxial assumption, derive Eg. (5.2.5).
2. By applying Eg. (5.2.5) seguentially to the two surfaces of a biconvex lens, and treating it as a thin lens [e.g., use Eg. (5.2.8) for the focal length], derive the Gaussian lens eguation, Eg. (5.2.6).
3. A telescope is made using a 50-mm thin lens followed by a 100-mm thin lens, separated by 150 mm. If the aperture stop is located 50 mm before the first lens, where is the entrance pupil of the system? Where is the exit pupil of the system?
4. Repeat the previous problem for a 350-mm thin lens followed by a 75-mm thin Jens.
5. Using Eg. (5.2.22), calculate the unaberrated spot size (at the e-2
diameter) for anf/1.5 lens with a 10-mm clear aperture when the incident beam has an e -2 diameter of 9 mm and a wavelength of 850 nm.
6. Repeat the previous problem, using Eg. (5.2.24) instead.
7. Repeat the previous problem, using Eg. (5.2.25) instead.
8. A Gaussian beam clipped at diameter D, contains 99% ofthe total be am energy, and a Gaussian beam of diameter 2wo contains 86.5% of the beam's energy. What is the numerical value of D,/2wo?
9. What is the Strehl ratio of a wave front with Wnns = 0.05?
10. Calculate the critical angle for light at 850 nm in gallium phosphide (n =
3.24), diamond (n = 2.42), and water (n = 1.33). Assurne the materials are in air (n ~ I).
11. Calculate Brewster's angle for light at 850 nm in gallium phosphide (n =
3.24), diamond (n = 2.42), and water (n = 1.33). Assurne the materials are in air (n ~ 1).
12. If the guarter-wave retarder in Figure 5.22 is misaligned by 5° from its ideal 45° angle, what is the fractional drop in power ofthe beam reflected by the PBS?
13. F or the BPG spot generation of a 64 x 64 spot array, calculate the effect of a 1 nm shift in the illuminating laser wavelength on the position of the outermost spot, ifthe spot separation is 20 pm. Assurne a wavelength of 850 nm.
14. Assuming a perfectly Gaussian spot shape with a 99%-energy diameter of 5 pm, coupling into a round 5 pm detector, what is the fractional energy loss caused by the effect of the previous problem?
328 Chapter 5
References
I. F. B. MeCormiek, F. A. P. Tooley, J. M. Sasian, J. L. Brubaker, A. L. Lentine, T. J. Cloonan, R. L. Morrison, S. L. Walker, and R. J. Crisei, Paral1el intereonneetion of two 64 x 32 symmetrie self eleetro-optie elfeet deviee arrays, Electron. Let!. 27, 1869- 1871 (1991 ).
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Photo nie Switehing Arehiteetures Based on Logie Deviees (Free-Spaee Digital Opties)
6.1. Introduction
6
Photonic switching architectures that are based on logic devices have been under study since the early 1980s. Logic-based systems can be subdivided into two broad categories: (I) guided wave systems based on logic devices and (2) free-space systems based on logic devices.
There has recently been quite a bit of work on guided wave (fiber) systems with logic devices as the active switching elements (such as systems based on soliton logic gates),(!) but these systems have not yet matured to prototype stages. Most of the advanced work on logic-based photonic switching systems has been based on free-space interconnections, so this chapter will concentrate on these types of systems. AIthough the field of research surrounding free-space photonic switching architectures may not be as mature as the research being carried out on architectures that employ relational devices, there has still been a large amount of activity in this area in recent years.
The free-space class of photonic switching architectures can be differentiated from other classes of photonic switching architectures because it uses free space (air or a vacuum or glass) as the medium over which the optical signals are propagated. The signals are typically directed (through free space) to their desired destinations using bulk optical components, such as lenses, mirrors, be am splitters, and retardation plates. While propagating through free space, the optical signals typically take the form of beams of light. Since the free-space photonic switching architectures that will be covered in this
333
334 Chapter 6
text are primarily digital architectures, a means of encoding the digital information into the optical signals must be specified. For example, a common digital coding technique encodes logic "1 's" as the presence of optical power in a collimated signal beam, while logic "O's" are encoded as the absence of optical power in a collimated signal beam. The sources of the signal beams are typically spatially separated, self-illuminating pixels (such as lasers diodes and LEDs) or spatially separated, passive pixels that must be illuminated by an external source (such as reflective or transmissive spatial light modulators). In either case, the pixels can oftentimes be approximated as point sources of light on a planar substrate. It is very common to use a lens to convert the spherical waves of light emanating from these point sources into collimated beams of light (plane waves with finite spatial extent) that are propagating at different angles. These collimated beams of light can be manipulated (redirected) by the optical components in the path of the light, and they can then be re-imaged onto detector pixels wh ich are on a different planar substrate, as shown in Figure 6.1. The optical components could be active components that can dynamically redirect the light beams, but most of the systems that will be discussed in this chapter will use passive components that provide a fixed interconnect. As a result, the dynamic nature of the switching network must be provided by the state of the pixels that detect and modulate the beams of light.
There are many potential benefits that may be derived from the use of free-space photonics within switching system designs, and many of these
source substrate with one aclive pixel
Figure 6.1. Free-space photonie interconnections.
Free-Space Digital Optics 335
benefits mayaiso be applicable to the design of computer systems. These benefits offer possible solutions to the problems that system designers may face in the future as more demands are placed on the electronic implementations of these systems. In particular, future switching and computing systems will be called on to provide higher-speed connections along their data paths, and they will also be called on to provide a larger number of connections between functional units (such as chips and circuit boards). This is a direct result of the higher speeds and increased packing densities within current chips and circuit boards. As more functionality is added to these functional units, more high-bandwidth connections will be required between chips and between circuit boards, and this increase in connections may require trace densities within circuit boards (connecting chips) and trace densities within backplanes (connecting circuit boards) that exceed the capabilities of the multilayered technologies that are being used today.
Free-space photonics may be helpful in providing the necessary bandwidth and density (parallelism) for future switching and computing systems, because it is not plagued by many of the problems that plague electronic interconnections. For example, several studies have shown that optical interconnections may require less driver power than electronic interconnections, because the energy required to charge up the capacitance of the bonding pads and electronic traces is effectively eliminated in the optical domain. (2.3)
In addition, optical signals propagating through free space are not subjected to the parasitic (capacitive and inductive) effects that can corrupt a highfrequency electronic signal propagating through a wire. Thus, optical signals in free space can be densely packed and can even be routed through one another without incurring the capacitive and inductive effects that can lead to ground loops and cross talk between densely packed, high-frequency electronic signals. Dispersion (the variation in signal velocity as a function of frequency) is another effect that can distort high-frequency electronic signals, but these dispersive effects (although present) are much less apparent in optical signals propagating through free space. In addition, the signal skew problem (i.e., loss of bit alignment) that is already apparent in many of today's electronic system designs can be effectively eliminated in a welldesigned free space photonic system, because all of the signal propagation lengths can be easily controlled using the imaging properties of lenses. The ringing effects that distort many high-frequency electronic signals are a direct resuIt of incorrect transmission line terminations and transmission line mismatches, and although these problems can be addressed in the electronic domain, the electronic solutions often carry serious side effects. For example, the addition of resistive terminations to transmission lines can greatly increase the power dissipation in the system and oftentimes lead to thermal management problems. Another solution pI aces a quarter wavelength section of transmission line with a carefully tuned characteristic impedance
336 Chapter 6
(Zo = JZ,/ZZ) to suppress undesired reflections, but this filter has a limited bandwidth defined by the fractional variation of the signal's wavelength from the length of the filter. These transmission line mismatch problems are more easily addressed in the optical domain, because the quarter wavelength filter (calIed an antireflection coating for optical components) can be used quite effectively since even signals with large frequency bandwidths will still have sm all fractional wavelength variations at optical carrier frequencies. The signals in free-space photonic systems are routed as beams of light orthogonal to the plane of the device substrates, so wires do not use up much ofthe substrate area. As a result, the devices (modulators and detectors) that are contained within the substrate can typically be packed more densely than they could be in an electronic implementation, so more integration of complicated functions is possible on a single device substrate.
The goal of most research within the fields of photonic switching and optical computing has been to find ways to capitalize on the potential benefits of free space optics which are described above. Although the fields are in their infancy and much work is still required, the advances that have been made in recent years are as encouraging as they are exciting.
This chapter will concentrate on the current state of free space photonic switching architectures. The primary benefits of these systems (bandwidth and parallelism) will be explored by describing several example architectures. The chapter will begin with abrief overview of general switching architectures.
6.2. Overview of Switching Architectures
Before getting into a detailed discussion of photonic switching networks, it would probably be beneficial to give abrief overview of general switching architectures, covering the fundamental parameters with which most system designers must work. This overview will study the applications of switching architectures and the three basic subsystems within switching architectures.
6.2.1. Applications of a Switching Architecture
The fundamental goal in any switching architecture (electronic or photonic) is to provide connectivity between input ports and output ports in a controlled fashion. Although this may seem like a relatively simple function, the plethora of research surrounding switching architectures indicates the complexity underlying this simple function. The original research on switching architectures focused primarily on the requirements ofvoice trafik being carried over telephone networks (telecommunications). However, the
Free-Space Digital Optics 337
switching architecture field has grown to include video trafIic generated in television broadcasting, and the data trafIic genera ted by computers (data communications). In fact, switching architectures have become such an integral part of computer systems that the switching field and the computer field have actually spawned an entirely new field of research, called computer network theory. Computer networks are key components for both distributed computer applications and local computer applications. An example of a distributed application is the common ca se in which many different computers which are located at remote geographical locations from one another need to share information in a distributed processing environment (such as an airline reservation system). These distributed arrangements may require transmission facilities to transport the information between the computers and the computer network hardware, because the computer network hardware may itself be distributed over a large geographical area or it may be concentrated and housed in a single building that is located a long distance from the communicating computers. An example of a localized application that requires a computer network is the parallel processing environment that is becoming common in many oftoday's computer systems. General-purpose computers that have coprocessors and memory management units to supplement the operations of the arithmetic logic unit (ALU) may require computer networks to transport data between the various processors. Specialpurpose computers with general ALUs and hardware coprocessors (for specialized applications such as FFT calculations, data sorting, and digital logic simulations) also require computer networks. High-performance parallel computers based on pipelined architectures (such as the Cray)(4) and parallel processors based on SIMD or MIMD design techniques (such as the ILLIAC-Iv)(5 7) require a high degree of high-bandwidth connectivity between the multiple processing elements and the memory units within the parallel processor, so they also need computer networks within their hardware systems. Each of these emerging application areas (voice, video, distributed computing, and localized computing) has its own set of constraints and requirements(8,9) (see Figure 6.2a--c) which can lead to many different network designs. As a result, there has been a large amount of interest in switching network theory for many years now.
6.2.2. Subsystems in a Switching Architecture
The various applications for switching architectures can have very different operational characteristics, because voice trafIic, video trafIic, and data trafIic have very different requirements. Nevertheless, all switching architectures share certain similarities regardless of the application. All switching architectures typically consist of three functional subsystems: the
338 Chapter 6
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switch/transmission line interface, the control unit, and the switching fabric, as shown in Figure 6.3a. These functional units may be segmented and distributed differently than the system shown in Figure 6.3a, but they will always be present in one form or another.
Free-Space Digital Optics
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340 Chapter 6
6.2.2.1. Switch/Transmission Line Interface
A switch/transmission line interface is typically placed at the input to the switching fabric, and another one is placed at the output ofthe switching fabric. The input switch/transmission line interface provides terminations for the N input lines that are directed at the switching system, and it provides all of the signal conditioning required between the transmission lines and the switching fabric. The output switch/transmission line interface provides sources for the M output lines that leave the switching system, and it provides all of the signal conditioning required between the switching fabric and the transmission lines. (Note: The number of input lines N is often equal to the number of output lines M.) Signal conditioning can include synchronization of the incoming trafiic to the switching fabric's internal clock (requiring clock extraction and elastic storage), extraction or insertion of control information, multiplexing or demultiplexing ofmultiple trafik streams, and wavelength conversions (assuming the incoming trafik arrived on an optical fiber). The switch/transmission line interface mayaIso contain a time-slot interchanger (TSI) which can temporally reorder the time-slots on a multiplexed input channel (Figure 6.3b). This reordering of the incoming timeslots can help decrease the blocking probability within the switching fabric. (Note: Many authors place the TSI within its own functional unit, locating the TSI unit between the switch/transmission line interface and the switching fabric.) The amount of signal conditioning required in a given switching system is very closely related to the hardware in the switching fabric.
6.2.2.2. Switching Fabric
Research in the area of network theory has led to a wide range of switching fabrics with many different characteristics. The switching fabric is the subsystem that actually routes the trafik from the input port to the desired output port. Many different types of switching fabrics have been designed and analyzed by researchers, (10) and abrief tutorial on switching fabrics was presented in the chapter on relational devices. A small subset of these switching fabrics will be described below to give the reader a flavor for the different types of networks that exist. This small subset of switching fabrics should also show that each fabric carries its own unique advantages and disadvantages. Many operation al characteristics are used to compare different switching fabrics. These characteristics include (but are not limited to) the fabric's size (which is defined by the number of input ports N and the number of output ports M), the overall hardware cost (which is directly related to the number of links and nodes), the permissible trafik types (circuit-switched data or packet-switched data, point-to-point data or broadcast data), the permissible call load (which indicates the volume of trafik that
Free-Space Digital Optics 341
can be handled), the fabric's latency (which is defined as the delay incurred by the information as it ftows from an input to an output of the network), the blocking probability (which is related to the number of paths between input lines and output lines), the complexity and speed of the path hunt operations (which is directly related to the network's control strategy), the fault tolerance and the switch reliability javailability (which are determined by the failure rates ofthe fabric's components), and the amount ofhardware redundancy that is built into the system.
In general, a switching fabric is comprised of switching nodes and connecting links between those switching nodes. The actual routing of the data occurs in the switching nodes, and the routed trafik is then passed to another switching node via the connecting links.
a. Network Topologies. In order to provide a path between any input port and any output port, the designer must specify a sensible arrangement of hardware (nodes and links) to create a useful switching fabric. Many types of arrangements (called network topologies) have been proposed, and each of these topologies carries its own advantages and disadvantages. The characteristics of a switching fabric are determined by the network topology that describes the connections within a particular switching fabric. The network topology for a general switching fabric is defined by three parameters: (I) the functionality of the switching nodes, (2) the number of switching nodes, and (3) the connecting links that are provided between those nodes. Network topologies are often shown in graphical form, with vertices representing nodes and edges or lines between those vertices representing the connecting links, as shown in Figure 6.4. Oftentimes, directed lines (vectors) are used to indicate the direction of data ftow along the connecting links. A network topology is not at all related to or concerned with the physical location of the switching nodes. Thus, a network theorist typically treats the connections between the nodes as mathematical abstractions, such as lines between vertices, and the hardware designer is usually left to solve the problems that are associated with propagation delays, signal skew, and signal attenuation that can occur in widely distributed systems. This is an important point that will be addressed in the section on 2-D and 3-D implementations of particular network topologies.
In a large system, there may actually be many levels of topologies arranged in a hierarchical fashion. For example, the long-distance telephone system can be represented by a töpological graph with links representing long-distance transmission lines and nodes representing large switching offices. If we look more closely at any large switching office, we might find an electronic switching network which can also be represented by a topological graph, where links now represent conductive cables between circuit boards and nodes are chips on the circuit boards. If we look more closely at any of these node chips, we might find a small switch matrix which
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Figure 6.4. Graphical representation of a network topology.
can also be represented by a topological graph, where links now represent traces on the chip and nodes are logic gates on the chip. Because of this hierarchical structure, the term "network" is somewhat ambiguous, because it could be used to define the set of nodes and links at any of these levels. However, within this chapter, the "networks" to be discussed will normally be optical implementations of the large switching offices, where optical signals will replace the conductive cables and optical logic devices will replace the chips on the circuit boards.
In many contemporary switching fabrics, the switching nodes are arranged in stages with links provided only between consecutive stages. These types of switching fabrics are known as multis tage networks. The network topology for a multistage network can be defined by four parameters: (1) the functionality of the switching nodes, (2) the number of switching nodes within a stage of the network, (3) the number of stages in the network, and (4) the connecting links that are provided between adjacent stages of nodes.
There are many ways to describe the functionality of a switching node. The most complete descriptions are given by drawing the permissible path configurations within the node or by giving the logical schematic required to implement the node. However, these descriptions are not very manageable
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or convenicnt (particularly for complex switching nodes). A convenient scheme for classifying the functionality ofmany (but not all) switching nodes was proposed in the literature. (11) This classification scheme requires each node in a topology to be described by a triplet (a, ß, y), where a designates the number of input links that the node can receive, ß designates the number of output links that anode can drive, and y designates the capacity of the node. Capacity is defined as the maximum number of unique, disjoint paths that can be simultaneously routed from the input side of the node to the output side of the node. For example, the most commonly used node is probably the 2-by-2 crosspoint, whose four permissible path configurations are shown in Figure 6.5a. The logical schematic required to implement a simple 2-by-2 crosspoint is shown in Figure 6.5b. This 2-by-2 switching element is implemented with digitallogic gates, so it cannot pass analog data like the relational devices can. (Note: The source of the control bits in Figure 6.5 is unspecified, so the 2-by-2 crosspoint of Figure 6.5 is compatible with all of the control schemes that will be described in the next section.) According to the triplet classification scheme, the 2-by-2 crosspoint has a = 2 inputs, b = 2 outputs, and a maximum capacity of c = 2 unique, disjoint paths. Thus, the 2-by-2 crosspoint would be designated as a (2, 2, 2) node. As
controlOO controlOl control 00 control 01 control 00 control 01 control 00 control 01
control 10 controllI control 10 controllI control 10 control 11 control 10 controllI
(a)
controlOO
output 0
input 0
input 1 output 1
(b)
Figure 6.5. 2-by-2 crosspoint or (2,2.2) node. (a) Four permissible path configurations; (b) logical schematic.
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output
control 0 control 1 control 0 control 1
(a)
controlO
controll
input 0 ---4---'l
input 1 ------'1 )--- output
(b)
Figure 6.6. (2, I, I) node. (a) Two perrnissible path configurations; (b) logical schematic.
another example, the node whose two permissible path configurations are shown in Figure 6.6a and whose logical schematic is shown in Figure 6.6b would be designated as a (2,1,1) node. Some measure of a node's "power" can often be assessed from this triplet notation. For example, one might assume that a (2,2,2) node is "more powerful" than a (2, 1, 1) node. In fact, the schematic in Figure 6.6b shows that a complicated interconnection and at least two (2, 1, 1) nodes are required to implement the functionality of the single (2, 2, 2) node shown in Figure 6.5b. It will be shown that power of the nodes in a network can also help determine the network's operational characteristics. For example, the blocking probability of a particular network can often be decreased if more powerful nodes are used in the network.
The connecting links between the nodes in a network topology can be described in a variety of ways. As previously mentioned, a graphical description uses the edges or lines of a graph to designate the connecting links, and this is probably the most general method of describing the links. In many multis tage networks, mathematical mappings (or permutations) have also been used to describe the connecting links between stages of nodes. Most of these mapping techniques require the nodes andjor links to be labeled (based on physical location) before the mapping can be defined. Unfortunately, different network topologies have used different labeling techniques and
Free-Space Digital Optics 345
different mapping techniques to describe the connecting links, and this may lead to confusion when one tries to compare different network topologies.
As an example, consider the multis tage network shown in Figure 6.7a. This particular network is the perfeet shuffie network topology(12) (also known as the omega network, the shuffie network, or the 2-shuffie network) with N = 16 input lines, M = N = 16 output lines, and (2,2,2) nodes. In
(a) Link- Node-Stage Stage
o I
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Nod .. Stage
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oooo---f-=~~~---'MM~~lAMT----·-i~-=:l~~----~~~~---OOOO 0001 0001
0010 _---1--L..:.:..:..:...
0011 ---, __ r---..
0100 0101 ---, __ .---.
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0100 ~---,'--__ ,-_.- 0101
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1000 ----1----,
.----'---- 0110
0111 MEI6 outputs
r--'---__ 1000
(b)
1001 ----.'--_.----
1010 1011 ----.. __ ---.Jr--
1100 1101 ---, __ r--
~---,'__.__- 1001
1010 v---"'--__ ~- 1011
1100 y---...... _.r--- 1101
1110 1110 1111 --t.......:::..:.-.I_'_'-'-'------="-'l.......::~-=~----...:..:_'_'{.......:::.:..JI_'_'.:..:....------=..:_'_'{.......:::.:..Jt_- 1111
Link· Node· Stage Stage
o I
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0000--1-::1~=-----~~::l7.~-----~~r::l~~----~~~~---OOOO 0001 0010
0010 ----1-----,
0011
0100 __ ---1--<..::.:=_
0101 ----.. ____ r----.
0110
'1>-=:r--"1-- 0100
0110
r--,--_ 1000
,.----.'--_.---1010
.---'---- 1100
N=16 0111 -----.._---1--" 1110 M=16 outputs
r--,--_ 0001 Inputs
1000 - ...... ---,
1001 ---.. ____ r--
1010 1011 ---, __ r--
1100 1101 ---, __ r--
~--L-__ "-- 0011
'---'--- 010t
V---""1..._.r--- 0111
1001
y---...... _.r--- 1011
1110 --""""1. ___ 1101
1111 --t......:.:..:.-.I_'_'=------="-'l.......::~Fc:....---....:..:"_'i......:.:.:..JI_'_'.:..:..------=..:"_'i......:.:.:..Jt_- 1111
Figure 6.7. (a) Perfeet shuffie network topology (N = M = 16) and (b) its graphicallink mapping. (e) q-shuffie network topology (N = M = 16, q = 4). (d) Inverse shuffie network topology (N=M=16).
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(c)
0000
0001
0010
0011
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0101
0110
N=16 0111 inputs
1000
1001
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1100
1101
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1111
(d) Link- Node-Stage Stage
0 I
0000
0001
0010
0011
0100
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1000
1001
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Link-Stage
I
NodeStage
I
00
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I 0000 0000
LinkStage
2
NodeStage
3
Figure 6.7. Continued.
NodeStage
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3
Chapter 6
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2
0000
0001
0010
0011
0100
0101
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0111 M=16 outputs
1000
1001
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0111 M=16 output<;
1000
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1101
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1111
Figure 6.7a, each of the (2,2,2) no des is represented by a small rectangle. The perfect shuffie network derives its name from the fact that a deck of cards wh ich is shuffied (split into two halves and interlaced) will mix the cards the same way that the shuffie network mixes its links. Since (2,2,2) nodes are used in Figure 6.7a, each of these nodes must be able to receive da ta from two input links and transmit data to two output links. The network topology in Figure 6.7a is constructed with four stages of switching nodes (node-stages), and each node-stage has NI2 = 8 nodes. Each pair of adjacent node-stages is separated by a single stage of links (a link-stage),
Free-Space Digital Optics 347
and eaeh link-stage has N = 16 links. Oftentimes, the set of input lines and the set of output lines are also treated as link-stages. Thus, there are four node-stages and five link-stages within the network of Figure 6.7a. Fully eonneeted shuffle networks (whieh permit any input line to be eonneeted to any output line if the network is idle) with N inputs, N outputs, and 2-input, 2-output switehing nodes require log2 (N) node-stages, where eaeh nodestage eontains N /2 switehing elements. As a result, the network in Figure 6.7a is a fully eonneeted network with log2 (16) = 4 node-stages eontaining 16/2 = 8 nodes per stage.
Sinee data are assumed to f10w from left to right within Figure 6.7a, the first (leftmost) node-stage eneountered by the data will be labeled nodestage 1, and eaeh of the node-stages to the right of the first will be labeled in sequenee with an inereasing integer from 1 to log2 (N). The link-stage that is direetly to the right of node-stage i will be labeled link-stage i, and the first link-stage (the set of input lines) will be labeled link-stage O.
All of the nodes within a partieular node-stage are assigned a unique physieal address with address bits (PI, PI-I, ... , PI), where 1= (lOg2 (N) - 1). The physical address is a binary address that identifies the node's relative loeation within the node-stage, with the top node labeled as o and the bottom node labeled as (N /2) - 1. To identify a speeifie switehing element within node-stage i, the physieal address (PI, PI-I, ... , PI); of the switehing element is subseripted with the node-stage number, i. All of the output links in link-stage i, whieh emanate from the right side of the nodes in node-stage i, are also assigned a unique link-stage address (PI, PI-I, ... , PI, Po), where I = (lOg2 (N) - 1), and all of the input links in link-stage i that are direeted at the left side of the nodes in node-stage i + 1 are also assigned a unique address (PI, PI-I, ... , PI ,Po). These (l + 1) bit addresses identify the link's relative loeation within the link-stage. For link-stages 1 to log2 (N)' the first 1 (leftmost) bits of the link address on an output link, (PI, PI-I, ... , PI), are the same as the the physieal address of the node from whieh the link originated, and the first 1 (leftmost) bits of the link address on an input link, (PI, PI-I, ... , PI), are the same as the physieal address of the node to whieh the link is destined. For link-stage 0, the first I (leftmost) bits of the link address, (PI, PI-I, ... , PI), are the same as the physieal address of the switehing element to which the link is destined. For all linkstages, the rightmost bit of the link-address, Po, is equal to 0 if the link is eonnected to the upper terminals of switehing elements and is equal to 1 if the link is eonneeted to the lower terminals of switehing elements. To identify a speeifie output link emanating from node-stage i, we will use the address of the link subseripted with the node-stage number: (PI, PI-I, ... , PI, Po);. To identify a speeifie input link directed at node-stage i + I, we will use the address of the link subseripted with the node-stage number: (PI, PI-I, ... ,
PI, Po);+ I·
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The mapping functions that describe a network topology actually describe the connections provided by the links between the nodes. As a result, the mapping function for a particular link-stage of a multistage network is directly related to the labeling of distinct nodes and links in the network. To acquaint the reader with the various types of labeling techniques and mapping descriptions that have been used in the literature, three different (but equivalent) mapping functions will be defined for the shufHe network of Figure 6.7a. The first will be called node mapping, the second link mapping, and the third graphical link mapping.
Node mapping. The first type of mapping function that will be used to describe the connections in Figure 6.7a is the node mapping function. Using anode mapping, the interconnections provided by the links within link-stage i can be described by a pair of mappings, ß? and ß). ß? and ß) map anode (PI, PI-', ... , P')i in node-stage i to two nodes in node-stage i + 1. These two nodes in node-stage i+ 1 are described by (PI-', PI-2, ... , PI, O)i+' and (PI-', PI-2, ... , p" l)i+'. Link (PI, PI-', ... , p" O)i in link-stage i provides the connection from node (PI, PI-', ... , PI); to node (PI-', PI-2, ... , p" O)i+' so it is said to provide the node mapping:
Link (PI, PI-', ... ,p" l)i in link-stage i provides the connection from node (PI, PI-' , ... , P')i to node (PI-' ,PI-2, ... , P" 1 )i-t-' so it is said to provide the node mapping:
(N ote: In general, ß? and ß) can be different for every value of i or for every node-stage in the network.)
This first mapping function maps each node in node-stage i to two nodes in node-stage i + 1. For the shufHe network of Figure 6.7a, the mappings can be written as:
ß?[(OOO)o] = (000),
ß?[(OOI)o] = (010),
ß?[(OIO)o] = (000),
ß?[(Oll)o] = (010),
ßl[(OOO)o] = (001),
ßl[(OOl)o] = (Oll),
ßl[(OlO)o] = (001),
ßl[(OII)o] = (Oll),
Link mapping. The second type of mapping function that will be used to describe the connections in Figure 6.7a is the link mapping function. Using a link mapping function for Figure 6.7a, the interconnections provided by the links within link-stage i can be described by a single one-to-one and
Free-Space Digital Optics 349
onto mapping, a;. a; maps an output link (PI, PI-I, ... ,PI, Po); from anode in node-stage i to a unique input link (PI-I, PI- 2, ••• ,Po, PI)i+ I on anode in node-stage i + 1. As a result, it is said to provide the node mapping:
(Note: In general, a; can be different for every value of i or for every linkstage in the network.)
This second mapping function maps each output link from the nodes in node-stage i to a unique input link on the nodes in node-stage i + 1. For the shuffie network of Figure 6.7a, the mappings can be written as:
al[(OOOO)o] = (0000)1 al[(OOOI)o] = (0010)1
al[(OOlO)o] = (0100)1 al[(OOIl)o] = (0110)1
al[(OIOO)o] = (1000)1 al[(0101)o] = (1010)1
al[(0110)o] = (1100)1 al[(OIlI)o] = (1110)1
al[(lOOO)o] = (0001)1 al[(lOOI)o] = (001l)1
al[(lOlO)o] = (0101)1 al[(lOIl)o] = (01l1)1
al [(1100)0] = (100 1)1 al[(l101)0] = (1011)1
al[(IIIO)o] = (1101)1 al [(Illi )0] = (1111) I
Graphical link mapping. The mapping functions described above provide a mathematical description of the link interconnections. Another technique that has been used to describe the link connections in a network is based on a graphical approach, and is called graphical link mapping. This approach is shown in Figure 6.7b for the shuffie network. There, each link entering the first node-stage of the network is assigned a label based on its physical location. The labels on links ente ring the second node-stage are determined by assuming that each of the switching nodes in the first stage is set in the "straight" state, so the labels from the links in the first stage are passed straight through to the links in the second stage and are routed via the interconnections to the inputs in the second node-stage. This same construction technique is then applied iteratively to determine the labels on the links entering the nodes in successive node-stages. The resulting labels can then be used to provide the link connectivity information for the network even if the links are removed from the network drawings.
Comments on mapping functions. It should be noted that an three of the preceding mapping functions (node mapping, link mapping, and graphical link mapping) defined for the shuffie network of Figure 6.7 are equivalent.
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In other words, the three mapping functions provide the same information about the network's topology-they just present the information in slightly different formats.
The reader should not be misled by the above examples. Mapping functions can be used to describe many different types of networks in addition to the two-dimensional networks with 2-input, 2-output nodes that were described above. For example, mapping functions can also be used to describe the interconnections in networks with general q-input, q-output nodes (where q is any positive integer). A very common example ofthis type of network is the q-shufHe network (also called the delta network and the generalized perfect shufHe network).(13) The q-shufHe is a permutation of qr output links from one node-stage to qr input links in the following nodestage (where q and rare specified as positive integers). Thus, the interconnections provided by the links within link-stage i ofthe q-shufHe can be described by a single one-to-one and onto link mapping, Si. Assume that the output links from node-stage i are labeled with physical addresses (an integer between 0 and qr - 1, inc1usive) describing their distance from the topmost output link, and assume that the input links into node-stage i + 1 are labeled with physical addresses (an integer between 0 and qr - 1, inclusive) describing their distance from the topmost input link. Si maps the output link labeled with the physical address x(O ~ x ~ qr - 1) from anode in nodestage i to a unique input link labeled with the physical address (qx + lxlr J) modulo (qr) on anode in node-stage i + 1. As a result, the q-shufHe is said to provide the link mapping:
Si[X] = (qx + lxlrJ) modulo (qr)
where lAj represents the largest integer less than A, and (B modulo C) represents the integer remainder of the quotient Ble. The q-shufHe of qr links is a common mapping that can be used to provide network connectivity between r (q, q, q) nodes in one node-stage and r (q, q, q) nodes in the following node-stage. As an example, Figure 6.7c illustrates a q-shufHe network with N = 16 inputs and M = 16 outputs which is constructed from (4,4,4) nodes. Since q = 4 and qr = 16, it follows that r = 4, so the 4-shufHe of 16 links can be used to interconnect r = 4 (4,4,4) nodes in one stage to r = 4 (4,4,4) nodes in the next stage. The 4-shufHe network in Figure 6.7c requires only two node-stages to provide full connectivity, so comparisons between Figure 6.7c and Figure 6.7a, b should indicate that the 4-shufHe requires less node-stages than the standard shufHe network of Figure 6.7a, b. In fact, a general q-shufHe network with N inputs, N outputs, and (q, q, q) switching nodes requires logq (N) node-stages for full connectivity, and each node-stage will require r = NI q switching elements. (Note: The perfect
Free-Space Digital Optics 351
shuffie network of Figure 6.7a, b is actually a q-shuffie network with q = 2, so the perfect shuffie network is a subset of the q-shuffie network.)
Mapping functions are also useful for defining the inverse of a particular interconnection pattern. If mapping function f maps a set of data points (nodes or links in stage i) defined by (al, a2, aJ onto another set of data points (nodes or links in stage i + I) defined by (bI, b2 , bJ such thatf(ay ) = by , then the inverse functionf- I is defined as the function that maps the set of data points defined by (bI, b2 , bx ) onto another set of data points defined by (al, a2, a<) such thatf- I(by) = ay. In other words, the inverse mapping function has the ability to "undo" the results of the original mapping function. As an example, the inverse shuffie network is shown in Figure 6.7d, and the interconnections provided by the links within link-stage i can be described by the link mapping, ai l • ai l maps an output link (PI, PI-I, ... , PI, PO)i from anode in node-stage i to a unique input link (Po, PI, PI-I, ... , PI )i+ I on anode in node-stage i + I. As a result, it is said to provide the link mapping:
(Note: In general, ai l can be different for every value of i or for every linkstage in the network.) Below, topological equivalence of networks will be defined, and it can be shown that the inverse shuffie network is topologically equivalent to the shuffie network.
Mapping functions can also be used to describe the interconnections in 3-D implementations of networks. In 3-D networks (which will be discussed in upcoming sections), the three types ofmapping functions described above will need to be redefined to incorporate the 2-D (planar) nature ofthe nodes in the network. In particular, anode (link) within a stage will probably be described by an ordered pair (a, b) identifying the row and the column in which the node (link) is located. As a result, a typical mapping between node (a, b) in stage i and node (e, d) in stage i + I will be written as ßi(a, b) =
(e, d). b. Topologieal Equivalenee. A discussion of network topologies would
be incomplete without abrief description of topologieal equivalenee. Two networks (A and B) are said to be topologically equivalent (or isomorphic) when the links and nodes in network A can be relabeled with logical addresses so that the resuIting topological connections in network Aare identical to the topological connections described by the mathematical mappings defining network B. In fact, after the physical addresses in network A have been appropriately relabeled by logical addresses, it is possible to reposition its links and nodes so that the resuIting network is identical in structure to network B. In other words, ifnetworks A and Bare topologically equivalent, then the available connections between any input line and output
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line in network Aare identical to the connections available in network B, so data propagating through network A "see" the same number of paths between the input line and the output line as they would have seen had they been routed in network B. As a result, all of the operational characteristics (blocking probability, network latency, etc.) of the two networks are identical.
Thus, if it is possible to determine a mapping function ri which will map each physical address of the links and nodes in network A to a new logical address and if the resulting connectivity between the logical addresses in network A is identical to the connectivity between the physical addresses in network B, then network A and network Bare topologically equivalent.
Wu and Feng formalized this concept with a pair of equivalence relationships.(14) They showed that if {a?, a) I 0::;; i::;; log2 (N) - 2} and {ß?, ßI I 0::;; i::;; log2 (N) - 2} are two sets of topology-describing rules for two multistage interconnection networks NI and N2, respectively, then network NI is topologically equivalent to network N2 if there exists a one-to-one and onto mapping rule ri such that:
ß?[ri[(PI, PI-I, ... ,PI);]] = rH l[a?[(PI, PI-I, ... , PI)i]]
ß)[ri[(PI, PI-I, ... ,PI);]] = rH l[a)[(PI, PI-I. ... , PI);]]
(Note: In general, ri can be different for every value of i or for every nodestage in the network.) Typically, the selection of the mapping rule ri is the difficult part of this proof.
As an example, (15) consider the crossover network(16, 17) shown in Figure 6.8a and the data manipulator network(18) shown in Figure 6.8b. For convenience, the node-stages in Figure 6.8a and 6.8b have been relabeled, with the leftmost node-stage labeled as node-stage 0 and the rightmost node-stage labeled as node-stage 10g2 (N) - 1. The link-stages are also relabeled from -1 to 10g2 (N) - 1. The nodes in the data manipulator network (Figure
6.8b) are labeled with their physical addresses, but the nodes in the crossover network (Figure 6.8a) have been relabeled with a set of logical addresses. The mapping rule ri operates on the physical addresses (PI, PI-I, ... ,PI) of the switching elements in the crossover network to produce the new logical addresses (bi, bi-I. . .. , bl ). A suitable mapping rule ri for this proof is found to be the Gray Code transformation:
(bi, bi_I, ... , bl = r;[(PI, PI-I, ... ,PI)]
= Gray Code[(PI, PI-I, .. . ,PI)]
= (PI, PI XOR PI-I, . .. , P3 XOR P2, P2 XOR PI)
Free-Space Digital Optics 353
(a) Link- Node- Link- Node- Link· Node- Link· Node· Link-Stage Stage Stage Stage Stage Stage Stage Stage Stage
·1 0 0 I I 2 2 J J
0000
0001
0010
0011
0110 0110
0111 0111
0100
N=16 0101 M=16 inputs outputs
1100
1101
1110
1111
1010
1011
1000
1001
(b) Link- Node- Link- Node- Link- Node- Link- Node- Link-Stage Stage Stage Stage Stage Stage Stage Stage Stage
·1 0 0 I I 2 2 J J 0000
0000 ~oooo 0001 0001
0010 0010
~::~ 0011
0100 0100 ~0100 0101 0101
0110
N=16 0111 =iiliG= 0110
0111 011 0111 M=16
Inpub
~:: output-.
1000
1001
1010 =iliG== :::~ 1011
1100 ~::~ 1101
1110
1111 ~IIIO
1111 111 1111
Figure 6.8. Crossover network topology with logical addresses (N = M = 16). (b) Data manip-ulator network topology with physical addresses (N = M = 16).
for all values of i between 0 and log2 (N) - 1. XOR in the above equation is the exclusive OR function. Since y; is the same for all values of i, the physical-to-Iogical mapping is the same Gray Code transformation for all node-stages in the crossover network.
In the modified data manipulator network, the interconnections provided by the links within link-stage i can be described by a pair ofmappings, ß? and ß! . ß? and ß! map a switching element (PI, PI-I, ... , PI); in nodestage i to two switching elements in node-stage i + I. These two switching
354 Chapter 6
elements in node-stage i+ I are described by (PI,PI-I, ... ,PI)i+1 and (PI, PI-I,··· ,PI-i+1 ,PI-i,PI-i-I, ... ,PI)i+I. Link (PI,PI-I, ... ,PI, O)iin link-stage i provides the connection from switching element (PI, PI-I, ... , PI)i to switching element (PI, PI-I, ... , PI)i+ I so it is said to provide the node mapping:
Link (PI, PI-I, ... , PI, l)i in link-stage i provides the connection from switching element (PI, PI-), ... , PI)i to switching element (PI, PI-I, ... , PI-i-I, PI-i, PI-i-I,··., PI)i+1 so it is said to provide the node mapping:
I -ßi [(PI, PI-I, ... , PI)d = (PI, PI-I, ... , PI--i+ I, PI-i, PI-i-I, ... , PI)i+ I
In the crossover network,(17) the interconnections provided by the links within link-stage i can also be described by a pair of mappings, a? and aJ . a? and aJ map a switching element (PI, PI-I, ... ,PI)i in node-stage i to two switching elements in node-stage i + I. These two switching elements in node-stage i + I are described by (PI, PI-I, ... , PI)i+ I and (PI, PI-I, ... , PI-i+ I, PI-i, PI-i-I, ... , PI)i+ I· Link (PI, PI-I, ... , PI, O)i in link-stage i provides the connection from switching element (PI,PI-I, ... ,PI)i to switching element (PI, PI-I, ... ,PI)i+ I so it is said to provide the node mapping:
Link (PI, PI-I, ... , PI, l)i in link-stage i provides the connection from switching element (PI, PI-I, ... , PI)i to switching element (PI, PI-I, ... , PI-i+ I, PI-i, PI- i-I, ... , PI)i+ I so it is said to provide the node mapping:
aJ[(PI, PI-I, ... , PI)il = (PI, PI-I, ... , PI-i+ I, PI-i, PI-i-I, ... , PI)i+ I
The proof involves two parts, because both of the equivalence equations must be shown to be true before topological equivalence can be assumed. First, the equivalence equation involving ß? and a? can be shown to be true when ß? for the modified data manipulator network is used and a? for the crossover network is used. In addition, ri for the crossover network is defined by the Gray Code transformation for all valid values of i:
ß?[ri[(PI, PI-I, ... , PI)i]] = ht-I[a?[(PI, PI-I, ... , PI)dl
ß?[(PI,PIXORpl-h ... ,P2 XORpl)d = ri+I[(PI,PI-I, ... ,Plhd (PI,PIXORpI_I, ... ,P2XORpl)i+1 = (PI,PIXORpl-h ... ,P2 X OR p.)i+1
Free-Space Digital Optics 355
The second equivalence equation involving ßi and ai can be shown to be true when ßi for the modified data manipulator network is used and ai for the crossover network is used. In addition, Yi for the crossover network is again defined by the Gray Code transformation for all valid values of i.
ß)[Y;[(PI' PI-I, ... , PI);}] = Yi+l[a![(PI, PI-I, ... , PI);]]
ß)[(PI, PI XOR PI-I, ... ,P2 XORpd;}
= Yi+I[(PI, .. ·PI-i+I,~,P;=~,PI)i+d
PI, PIXORpl-I, .. ·PI-i+2 XORPI-i+1 ,PI-i+1 XORPI_I,
PI-i XORPI-i-I, .. ·P2 XORpI)i+d
= (PI, PI XOR PI-I, ... , PI-i+2 XOR PI-i+ I, PI-i+ I XOR PI-i,
(Pl-i XORPI-i-I, ... ,P2 XORpI)i+1
But since A XOR B = A XOR B,
(PI, PIXORpl-I, ... , PI-i+2 XORPI-i+l, PI-i+1 XORPI-i,
PI-i XORpl-i-I, . .. ,P2 XORpI)i+1
= (PI, PIXORpt-I, ... , PI-i+2 XORPI-i+l, PI-i+1 XORPI_I,
PI-I XORPI-i-I, ... , P2 XORpt)i+1
But since A XOR B = A XOR B,
(PI, PIXORpl_I, ... , Pt-i+2 XORPI-i+l, PI-i+1 XORPI-i,
PI-i XOR PI-i-I, ... ,P2 XOR PI)i+ I
= (PI, PI XOR PI-I, ... , PI-i+2 XOR PI-i+ I, PI-i+ I XOR PI-I,
PI- i XOR PI- i- I , .•. , P2 XOR PI)i+ I
The relatively simple meaning of topological equivalence should not be lost in the mathematics described above. In general, one can get an intuitive feel for topological equivalence if the nodes in a network are visualized as a set of wooden blocks and the links connecting the nodes are visualized as elastic bands. If the wooden blocks (nodes) can be moved around so that the resulting connections provided by the stretched elastic bands look exactly like the connections in another network, then the two networks are topologicallY equivalent. As an example, it was shown above that the crossover network in Figure 6.8a is topologically equivalent to the data manipulator network in Figure 6.8b. The nodes in Figure 6.8a have been relabeled, and
356 Chapter 6
analysis of the two networks should indicate that any two nodes that are connected in the data manipulator network are also connected in the relabeled crossover network. Other common networks that have been found to be topologically equivalent to the data manipulator network include the shufHe (omega) network, the flip network, the indirect binary n-cube network, and the regular SW banyan network. (14)
c. Relationships between Blocking Probahility, Fault-Tolerance, Latency, Hardware Cost, and Path Hunt Complexity. One of the most important parameters that a network architect must consider during the design of a network topology is the overall network blocking probability. This parameter gives an average measure of the percentage of calls that will be blocked when they try to request a path through the network. Blocking is often a result of existing calls in the network that are already using the resources (nodes and links) in the network that the requesting calls could have used. As an example, the N = 16 shufHe network based on (2,2,2) nodes that is illustrated in Figure 6.9 has a single path (dark black lines) connecting input port 1000 to output port 0110. Ifthe control unit attempts to set up a second path through the network connecting input port 0000 to output port 0100, the second path (dark gray lines) requires the use of a link in link-stage 2 that is already being used by the first path (dark black lines). As a result, even though input port 0000 and output port 0100 are idle ports, the call between the idle ports will be blocked as a result of the first call using required resources within the network. (Note: Blocking within a network should not be confused with output contention problems. Every network, even a nonblocking network such as a crossbar, will be unable to route a call to an output port if that particular output port is currently busy.)
Link-Stage
0
0000
0001
0010
0011
0100
0101
0110
N=16 0111 inputs
1000
1001
1010
1011
1100
1101
1110
1111
Node-StaRe
I
LinkStage
I
NodeStage
2
LinkStage
2
NodeStage
3
LinkStage
3
Node-Stage
4
Unk-Stage
4
0000
0001
0010
0011
0100
0101
0110
0111 M=16 outputs
1000
1001
1010
1011
1100
1101
1110
1111
Figure 6.9. Network with N = 16 inputs, (2, 2, 2) nodes, shufHe connections, and 4 node-stages.
Free-Space Digital Optics
Table 6.1. Types of Point-to-Point Networks
Nonblocking Strictly nonblocking
Splitter ~com biner CI os Cantor Delta Dilated Delta Replicated Multistage Dilated
Wide-sense nonblocking Benes (extra hardware) Crossbar
Rearrangeably nonblocking Clos (slightly reduced hardware) Extra-stage Delta
Benes Lee Waksman Feng and Wu Varma and Raghavendra
Stone Sorter Bateher Sorter Bitonic Sorter Delta Replicated (slightly reduced hardware)
Blocking Multiple path
Clos (moderately reduced hardware) Extra-stage Delta (extra-stage Omega, Banyan, Baseline, N-Cube, Crossover) Delta Dilated (reduced hardware) Delta Replicated (moderately reduced hardware)
Single path CI os (greatly reduced hardware) Delta (Omega, Banyan, Baseline, N-Cube, Crossover)
357
Many different types of networks with different types of blocking characteristics have been reported in the literature, and Table 6.l1ists several of these networks along with their respective blocking categories.(19) Table 6.1 shows that different network topologies can have very different blocking probabilities. Although researchers have not yet found a closed form expression defining the blocking probability as a function of the general network topological parameters, comparisons between most of the existing networks seem to indicate the existence of a fundamental trade-off between network blocking probability and hardware cost, Le., low blocking probabilities in a network offixed size N imply that the network's hardware costs will be high. For example, strictly nonblocking networks (e.g., Clos(20») and wide-sense nonblocking networks (e.g., single-stage crossbars) will require on the order of O(N log2 (N)) to O(N2) switching nodes, and these networks have blocking probabilities of zero, but also have relatively simple path hunt requirements. Rearrangeably nonblocking networks (e.g., Benes(21) and extra stage
358 Chapter 6
shuffies(22» will require on the order of O(Nlog2 (N» to O(Nlog (N» nodes; however, the re arrangement of existing calls can lead to a more complicated path hunt scheme in an attempt to maintain a zero blocking probability. Most of the network topologies that have been described in the literature are blocking networks. Many of these networks tend to have hardware costs on the order of O(N log (N» nodes. These networks inelude the crossover,(16.17) the data manipulator,(I8) the shuffie (or omega),(I2, 14, 23) the banyan,(24) the flip,(25) the cube,(26) the indirect binary n-cube,(27) and the ADM and IADM.(28) Another type of blocking network with a very low cost is the single-stage bus. This network has a hardware cost of only O(N) nodes, but it also has a very high blocking probability. In fact, if data signals are not time-multiplexed through the single-stage bus, then only one signal can be routed through the bus at any point in time. As a result, for a bus with N input ports and N output ports, the blocking probability is given by (N - 1) j N, which is very elose to 1.0. (Note: The blocking probability of any blocking network can always be decreased using some form of speedup within the network links. For example, temporal speedup allows multiple calls to be time-multiplexed on a single link, and spatial speedup requires a physical replication of the link to permit multiple calls to be transmitted across the network simultaneously. Both of these techniques will always increase the network's overall hardware costs.)
A network with a nonzero blocking probability may seem undesirable, but many of the networks that have been implemented in real systems have actually been blocking networks. The reason for this can be attributed to the relatively high cost of the nonblocking networks. In addition, the low blocking probabilities provided by some of the blocking networks may be more than satisfactory for many switching applications. A broad spectrum of blocking networks exists, and each one has unique characteristics that may satisfy the requirements of various system applications. The blocking prob ability of blocking networks can normally be decreased if slight modifications are added to the network. For example, if the data rate through the core of the blocking network is increased and the data signals are timemultiplexed through the network, then the network will be operating as a time-multiplexed switch (TMS) and the blocking prob ability will typically be decreased. In fact, if the co re data rate is increased high enough, any blocking network can be converted into a nonblocking network (even the single-stage bus). The blocking probability of a blocking network can also be decreased by increasing one or more of the following parameters: (1) the number of nodes, (2) the number of links, andjor (3) the "power" in each node. However, if more nodes, more links, or more powerful nodes are added to the network, then the hardware cost will typically begin to rise and the path hunt processing can become more difficult. In addition, if the increase in nodes is accomplished by adding extra stages to the network (as
Free-Space Digital Optics 359
in the extra-stage cube network(29», then the resulting drop in blocking probability is achieved at the expense of the network's latency (the delay of the signals as they pass through the network).
As an example, the N = 16 shuffle network shown in Figure 6.9 has a blocking probability (conditioned on the fact that the selected output port is idle) of 3.8 x 10- 1 when the system is fully loaded. If another stage is added to the network (as shown in Figure 6.1 Oa), then the blocking probability is found to be 2.9 x 10- 1• In the network of Figure 6. lOb, the nodes in Figure 6.lOa have been replaced by more powerful (4,4,4) nodes and the standard shuffle interconnections have been replaced by q-shuffle interconnections. The resulting blocking probability is then 1.9 x 10-3. (Note: All ofthe blocking probabilities were determined from simulations, and the simulations assumed that each of the networks was fully loaded.) In each of the cases above, all of the potential paths between input port # I and output port # 3 are shown, and it can be seen that if more nodes, more links, or more powerful nodes are added to the system, the number of potential paths between an input port and an output port increases. The network in Figure 6.9 provides I path between every input and output, the network in Figure 6.IOa provides 2 paths between every input and output, and the network in Figure 6.1 Ob provides 64 paths between every input and output. Thus, there are extra paths through which a call can be routed if it is blocked, and the simulation results showed that the blocking probability was decreased. As an example, the call from input port 0000 to output port 0 I 00 (dark gray lines) that was blocked by the first call (dark black lines) in Figure 6.9 can be easily routed around the first call on one of the two paths that are available between input port 0000 and output port 0100 in Figure 6.lOa. If the network needs to set up a third call connecting input port llll to output port 1100, then this third call can be provided on either of the two paths shown as light gray lines in Figure 6.lOa. Because of this fact, there seems to be a fundamental link between the number of potential paths between input ports and output ports and the network's blocking probability, but researchers are still searching for a mathematicallink between the two. One of the useful tools that can be used to characterize the connectivity between input ports and output ports is the p-graph, which shows all of the connections between an input port and an output port in a particular network. Links are drawn as lines and nodes are drawn as circles in a p-graph. As an example, the network in Figure 6.10a would have the p-graph shown in Figure 6.lOc.( 19) This p-graph is valid, because the two paths (shown as light gray lines) between input port llll and output port 1100 in Figure 6.lOa could be pulled out of the network and rearranged like the p-graph in Figure 6.10c.
Since the addition of nodes, links, or more powerful nodes in a particular network typically produces additional paths between input and output
360 Chapter 6
(a) Llnk- NodeSial" Slage
o I
Unk· Slaae
I
NodeSIag<
1
Link· SIag<
1
Node· Slage
3
Llnk.Stage
3
Nod .. Stage
4
UnkSlage
4
Node- Unk-Sial" Sial"
5 5
oooo--~~~~--~~:J~r---~~:J~~--~~:~~~~~~~---OOOO 0001 0001
0010 _..r-""L=
0011 --..._~--.
0100 0101 --..._..r-----. 0110
r---'--0010
0011
'---'--0100
~'""'_..r-0101
N=16 Olll--",_~"""
ft!!!Wl.r--'L-_ 0110
~--.._ .... ~--- 0111 M-16 inputs
(b)
1000 __ -r-;L~mV'VL~r--~~1IV
1001---..._ .... -
1010 1011 --..._..r--1100 1101-...... _ .. -
outputs 1000
Ir-L........Ir-- 1001
1010
"--"L-_'-- 1011
1100
~-...... _r-- 1101
1110 UUJ>r---...._ 1110
1111 --l":':':J-w.Ji-_"':':':.:t...:::~~-_.I.Iolol.l..":':':.r~--.;.;.:.:..t...:.:.:..J-!!!.~-..w.l...l":':.:J--- 1111
Llnk- NocIe-Stage Stage
o I
LinkSial"
I
NodeStage
1
LinkSIag<
1
NodeStage
3
LlnkStage
3
NodeStage
4
LlnkStage
4
Node- Llnk-Stage Stage
5 5
oooo--r-~~~-~~-~~~-~~-~~--~~-~~--~~-l---OOOO 0001 0001
00
0010
0011 ----.._..r-" 0100-.....-----..=:J\\
0101 01
00
0010
1,-0._ .... - 0011
II,-=:r--,-_ 0100
0101 01
mlO mlO N=16 0111 ----.._..r-, I\\lll,-----.._..r--.I\\l,"r-'-----'r-, j~llJ'r____,L------'r-, I\\lll ,-----.._..r- 0111 M .. 16 Inputs outputs
1000 1000
1001 1001 10
tOl0
IOII-.. _..r-v
1100
1101 11
10
1010
V--.._..r- 1011
11
1100
110t
1110 1110 1111 --L_J-='---...!..!.'-'L_J-='----='-'L_J-'=---'-""L_J-'=--='L_J--- 1111
Figure 6.10. (a) Network with N = 16 inputs, (2,2, 2) nodes, shuffie connections, and 5 nodestages. (b) Network with N = 16 inputs, (4,4,4) nodes, 4-shuffie connections, and 5 nodestages. (c) p-graph for network shown in panel a.
ports, the resulting networks are also more tolerant offaults than the original network. This is a direct result of the fact that additional paths provide an inherent form of redundancy, so if a particular path is unusable due to a faulty component within the length of the path, then the call can oftentimes
Free-Space Digital Optics 361
be routed through one of the redundant paths. As an example, assume that faults are randomly inserted into 2% of the links in the networks described. The network in Figure 6.9 (with 2% faulty links) produces a blocking probability of 4.1 x 10-1, the network in Figure 6.10a (with 2% faulty links) produces a blocking probability of 3.2 x 10-1, and the network in Figure 6.10b (with 2% faulty links) produces a blocking probability of 6.9 x 10-2•
In all three cases, the resulting blocking probability is higher in the faulty network than it was in the fault-free network, but the networks with more potential paths still had lower blocking probabilities than the network with only one path. (Note: In photonic switching systems, relatively new device and packaging technologies will be used. As a result, the probability of having a faulty link within the system may be higher than it is within a system based on more mature technologies such as electronics. Thus, the fault-tolerance of a particular network topology is an extremely important characteristic that must be analyzed when designing a photonic switching system.)
6.2.2.3. Control Uni!
The control unit receives control information (also called signaling information or addressing information) from a source (such as the switch/ transmission interface or directly from another switching system), and it determines an idle path on which the trafik can be routed through the switching fabric to its desired output. The amount of processing power and the amount of time required to locate an idle path is also closely related to the arrangement of the hardware in the switching fabric. Path hunt can be divided into two operations. The first operation determines a potential path between the desired input port and output port. For many networks, this operation is fairly straightforward. For example, in the shufHe network of Figure 6.9, the 4-bit binary representation of the output port number (P3' P2, PI, Po) can used as a routing tag to set up a path. The most-significant bit P3 is used to control the first node-stage, P2 issued to control the second node-stage, PI is used to control the first node-stage, and the least-significant bit Po is used to control the last node-stage. If the control bit associated with anode-stage is a logic "0," then the path should be routed through the top output port on the node, and if the control bit is a logic "I," then the path should be routed through the bottom output port on the node. If this technique is applied from the first node-stage to the last node-stage (in that order), then a potential path from the input to the output can be found. The second operation in path hunt determines whether the potential path is idle (usually via table lookup within a memory storing the busy /idle status of all ofthe links and nodes in the network). These two operations are typically repeated over all potential paths between an input and output port until an
362 Chapter 6
idle path is found. The requirements placed on the control unit by the path hunt operations are determined to a large extent by the type of switching being performed. Two basic types of switching have evolved over the years: circuit switching and packet switching.
In circuit-switched systems, the path between the input port and output port is typically held fixed du ring the entire duration of the cal1. (Note: In a time-multiplexed circuit switch, or TMS, the input port carries timemultiplexed trafiic from many different sources. If there are S sources, then a segment of the trafik from each source is packed into a short interval of time called a time-slot, and S time-slots are concatenated to form a longer interval known as a frame. Within a frame period, the switch must be reconfigured to set up S different paths from a particular input port to potentially S different output ports, as shown in Figure 6.11. The same S paths are then set up every frame until the calls are terminated.) Since a circuit switch (and a TMS) offers the customer a fixed and constant amount of usable bandwidth, these types of switching systems are well suited for the constantbandwidth transmission needed for voice and video trafiic. (Note: Some researchers argue that a circuit switch is also sufficient for the bursty nature of data traffic if a very fast processor is performing the path hunt calculations and buffering is provided at the inputs andj or outputs of the network.) The control of a circuit switch is often derived from a centralized controller which must perform all of the required path hunt operations. The centralized controller receives requests for connections, calculates an appropriate path through the switching fabric, and sends necessary commands to the hardware in the switching fabric to physically set up the path. As a result, the control unit in a circuit switch is often a single centralized entity, as shown in Figure 6.12. (Note: Parallel processing techniques can be used in the centralized control unit.)
Guard bands indicating when nelwork is reconngured
/1"'-.
TMS
I p I IGI G '" Guard band interval
P = Packet or lime-slot interval
Figure 6.11. Operation of a time-multiplexed switch (TMS).
Free-Space Digital Optics
inpul pon\
conlrol information
control unit
switching rabric
Figure 6.12. Centralized control unit in circuit-switched switching system.
363
output ports
Packet-switched systems, originally pursued in the computing community with increasing interest in the telecommunications community, have evolved to a level of sophistication and complexity in the last two decades. In packet-switched systems, the path between the input port and output port is provided only when the bandwidth is required. As a result, during the length of an entire "caII," paths will be set up and tom down between the input port and output port many times to allow small packets ofinformation to be transmitted through the switch . The packets for a single call may not even take the same physical path through the network, but all of the packets from a particular call should still end up at the same output port. The primary advantage of the packet switch is that it permits the internal switch hardware to be shared by multiple users. If the users' trafik is bursty trafik, then this time-sharing of network hardware can lead to a decrease in overall system cost without producing perceptible changes in the service provided to each customer. For this reason, packet switches seem to be well suited for the variable bandwidth requirements of data trafiic.
As previously stated, it is possible to use centralized control techniques in a packet-switched environment. However, a packet-switched system places more demanding requirements on the controlling hardware which ca\culates the paths and sets up the physical connections through the network, because paths must be set up and tom down very rapidly. As a result of these requirements, any packet-switched designs that are based on a centralized controller would probably require the use of parallel processing to execute the path hunts in ample time. Many packet-switched designs have opted for a
364 Chapter 6
distributed control scheme instead of the aforementioned centralized control scheme. In a distributed control scheme, the processing power required to set up a path is distributed over many small processing elements, and each switching node in the switching fabric has a unique processing element logically and physically attached to it. A direct result of this approach is an increase in the hardware complexity (and cost) of a single node, because each node requires logic to process the packet headers. In a packet switch based on distributed control, the regular switching fabric is used to route the control information (or signaling information) between processing elements as weIl as to route the actual trafiic through the network. As a result, the control unit is no longer a single centralized entity, but is physically distributed over the entire switching fabric, as shown in the simple packet switch example of Figure 6.13. The processor attached to a particular node in the switching fabric must have enough processing power to correctly route the packet to the appropriate node in the next stage, but it need not have any knowledge of the global path being taken by the packet.
In order to facilitate the implementation of a distributed processing packet switch, the routing information for a packet can be prepended to the packet in a header field (Figure 6.14), so the processor or control unit within anode has the routing information available to it whenever a new packet arrives in an input buffer within Figure 6.13. Since each packet carries its own routing information, this type of arrangement is typically called a selfrouting network. The localized control unit within anode of a self-routing
Input ports
5wltchf
transmlsslon
Line
Inter1.<e
wllChlng fabrle
Figure 6.13. Distributed control in packet-switched switching system.
output ports
Free-Space Digital Optics 365
payload header
~ r3w data I routing infonnation I
packet
Figure 6.14. Convenient packet format with header prepended to raw data.
network must analyze the routing information in the header whenever a new packet arrives at an input buffer. It must then perform a path hunt operation to determine the output link to which the packet will be routed. Once the path hunt operation is complete, the localized control unit must determine whether the link is busy or idle, and it must also determine whether the input buffer on that link in the next node-stage is full or empty. Thus, the busy jidle memory in the localized control unit must be continuously updated by the nodes in the next node-stage, so a feedback path must be provided in the network's link-stages. If the desired link is idle and the input buffer in the next node-stage is empty, then the packet can be routed from the input buffer, through the switch logic, and on to the output link where it is passed to an input buffer in anode of the next node-stage. The localized control unit must then send a message back to anode in the previous node-stage indicating that its input buffer is now empty. This message is used to update the busy jidle table of the node in the previous node-stage.
A fundamental problem that must be solved by packet switch designers is related to the contention between two or more packets for the shared resources in a packet switch. For example, contention resolution must be provided whenever two packets try to pass through the same switching link simuItaneously. In addition, contention resolution must also be provided whenever two packets try to pass through the same output port simuItaneously. These problems are often solved by buffering one ofthe two packets until the shared resource becomes available, but this can lead to increased system costs, because each node must provide a memory for buffering. (Note: There are self-routing packet switches that circumvent this problem and avoid the need for physical buffers, such as the Starlite switch. However, the Starlite switch requires recirculation paths for blocked packets, and these recirculation paths provide the same functionality that would normally be provided by a buffer. (30»
366
6.3. Architectural Building Blocks in Free-Space Photonic Switching Systems
Chapter 6
In Chapter I, some of the fundamental hardware components that can be used in free-space photonic switching systems were presented. These components (such as optical logic devices, lasers, spot array generators, spatial light modulators, and beam-combination optics) can be thought of as the hardware building blocks for free-space architectures. If we combine several of these hardware building blocks to create functional subunits, then these subunits can be thought of as the architectural building blocks for freespace photonic switching systems.
Two architectural building blocks should be considered separately and should be studied in more detail: (I) the switching nodes that are implemented within the node-stages and (2) the interconnections provided by the links within the link-stages.
6.3.1. Switching Nodes and Node-Stages in Free-Space Photonic Switching Systems
Most of the published research on photonic switching has concentrated on the optical interconnections that are provided by the link-stages, and relatively little attention has been given to the switching nodes that actually perform the active function of routing the data to their appropriate output port. Since switching nodes are an essential component within any switching network, the following section will describe possible switching nodes for a photonic switch.
6.3.1. 1. Classification 0/ Nodes in Free-Space Photonie Switching Systems
The functionality of the nodes in one network can be quite different from the functionality of the nodes in another network. As a result, the most fundamental classification of anode must define its functionality. The triplet notation provides a convenient technique for classifying many types of nodes. The simplest node is a single logic gate (such as an AND gate or an OR gate). This type of node is so simple that it cannot even be defined using the previously discussed triplet terminology. Nevertheless, it will be shown that single logic gates can be used in very powerful (but very expensive) switching networks. Typically, the hardware required for a switching node is more complicated than the hardware in the single logic gate node, because most nodes are constructed from a group of logic gates that are connected to implement a particular logical function. For example, the (2,2,2) node shown in Figure 6.5 is a much more common node in switching networks, and it can require up to six logic gates. Although the implementation of the
Free-Space Digital Optics 367
(2, 2, 2) node uses more hardware than the single logic gate node, the (2, 2, 2) node is much more powerful than the single logic gate node. As a result, a typical network of size N with a particular blocking probability will require less (2, 2, 2) nodes than a comparable network constructed with single logic gate nodes. Other nodes that might be used in photonic switching systems include the (2, I, I) node shown in Figure 6.6, the (2, 2, I) node shown in Figure 6.15, the (3, I, I) node shown in Figure 6.16, the (4, I, I) node shown in Figure 6.17, and the (4,4,4) node (for nonbroadcasting, point-to-point communications) shown in Figure 6.18. The permissible path configurations for point-to-point connections within each of these nodes are shown in their associated figures. In general, an (n, n, n) node will have n2 AND gates within the node, and it will support n!(n factorial) path configurations for pointto-point connectivity or nn path configurations for multicast connectivity. Since control bits must be routed to the node to drive the n2 AND gates and set up each of these path configurations, IOg2 (nn) control bits are required to drive each of the nodes in a multicast environment. However, if log2 (nn) control bits are used, then a IOg2 (nn)_to_n2 decoder is required within each ofthe (n, n, n) nodes. 1fthis additional hardware is undesirable (as is usually the case in systems based on free-space optics), then n2 control bits can be routed directly into the node to drive the n2 AND gates. (Note: An infinite
control 0 control 1 control 0 control 1
(a)
controlO
controll
input 0 ----+---\ r--- output 0
input 1 ------~ )---- output 1
(b)
Figure 6.15. (2,2, I) node. (a) Two permissible path configurations; (b) logical schematic.
368 Chapter 6
controll controll controll
(a) controlO
controll
contro12 input 0
input 1 )---- output
input 2
(b)
Figure 6.16. (3,1,1) node. (a) Three permissible path configurations; (b) logical schematic.
number of different node types can be defined. The few examples that are presented here were chosen to give the reader a sampie of the rich spectrum of node-types that can be used in switching systems.)
Each of the switching nodes within a digital photo nie switching system must be constructed from one or more logic gates. The number of logic gates required to implement anode provides useful information for classifying the node. In addition, the type of logic gate that is used to construct the node provides another convenient manner with which to classify the nodes. Two types of logic gates have been proposed for use in photonie switching systems. The first type of gate is the opticallogic gate, such as the opticallogic etalon and the S-SEED. The second type of gate is the digital electronic gate, such as CMOS or TTL logic. This second type of node has also come to be known as a "smart pixel,"(31) and optical detectors and modulators are required to receive and transmit the optical signals between the electronic nodes constructed as smart pixels. In a smart pixel, the received data signal must be converted from optics to electronics (with adetector), passed through the electronic logic gate, and then converted back to optics at the output (with a modulator or a laser). If a set of nodes are implemented as smart pixels on a planar base (such as a single substrate or a circuit board),
Free-Space Digital Optics
controt2
output
control3 conlrol2 conlrot3
controt 0
controt) input 0 ----->.,--~
input J -------"1
input 2 - -----71
input 3 ----?'-- -j
control2
conlrol3
369
control 0 control t controt 0 control J
outpul inpUI2
InpUIJ
controt2 control3 control2 conlrol3 (a)
}---- oulpul
(b)
Figure 6.17. (4, I, I) node. (a) Four permissible path configurations; (b) logical schematic.
Figure 6.18. Twenty-four permissible path configurations for point-to-point connections in a (4,4,4) node.
370 Chapter 6
then the node-stage can be further classified according to the manner in which the three basic elements (detectors, electronics, and modulators) are organized on the planar base. Ifthe detector, the electronics, and the modulator for a single node are aB positioned close to one another (meaning that detectors, electronics, and modulators are mixed together across the entire planar base), then the resulting node-stage hardware is said to be "mixed hardware" (Figure 6.19a). Within this text, the elements will be classified as mixed if they can aB be imaged by a single objective lens. If the detectors for aB of the nodes are placed on one part of the planar base and the electronics for all of the nodes are placed on another part of the planar base and the modulators for aB of the nodes are placed on another part of the planar base, then the resulting node-stage hardware is said to be "separated hardware" (Figure 6.19b). Within this text, the elements will be classified as separated if they cannot be imaged by a single objective lens. (Note: Most of the implementations that use optical logic gates instead of smart pixels
~~ df1. eJed. mod.
1"1."< node
(a)
(h)
Figure 6.19. Nodes based on electronic logic gates. (a) Mixed hardware; (b) separated hardware.
Free-Space Digital Optics 371
are "mixed hardware" systems by nature, because most optical logic gates have their detectors and modulators contained within a very localized area.)
All nodes in photonic switching systems must be designed with at least one optical input signal for data, at least one optical output signal for data, and at least one input signal for control. An optical input data signal is passed through the node to an optical output whenever that input is enabled by the control signal. Thus, the control signals can enable or disable the flow of any data signal. Control signals can be derived from several different sources, but each of the sources must be capable of performing path hunt and routing using the signaling information that is associated with the data. In Figure 6.20a, the control signal is derived from an electronic source (such as a computer that performs routing operations), so this implies that the node is usually constructed using a smart pixel implementation. This type of node requires 0 jE conversions on the incoming optical data signal, processes it in the electronics domain, and performs EjO conversions on the outgoing data signal. In Figure 6.20b, the control signal is again derived from an electronic source, but that control signal is converted into an optical signal using a spatial light modulator (SLM), so the node itself can be implemented using an opticallogic device. In Figure 6.20c, the control signal is derived from an optical source, so the node can again be implemented using an optical logic device. The fact that the source of the control signal is optical implies that the logic for path hunt processing is also implemented using optical logic devices, so this technique is probably best suited for selfrouting packet switches with the processing power for routing placed within the nodes. The node shown in Figure 6.20c has the control information and the input data spatially separated, because each of the signals arrives on a different and distinct detector. A slightly different implementation would permit a single detector to receive both the control information and the input data, but the two signals would then have to be separated temporally. The three sources of node control that are shown in Figure 6.20a-c can be useful in classifying the many types of optical switching nodes. As a result, nodes can be classified as having "electronic control" (Figure 6.20a), "SLM control" (Figure 6.20b), or "optical control" (Figure 6.20c). Although all of the nodes shown in Figure 6.20a-c are constructed using mixed hardware, it should be noted that each of these three sources of control can also be used with nodes that are constructed using separated hardware.
Another parameter re la ted to the control of anode is the location of the hardware that calculates the appropriate state for the control signal. As previously mentioned, this hardware can be located in a centralized control unit located external to the node, or it can be located within the node itself and can perform the calculations locally. This second approach is best suited for self-routing applications.
372
path hunt processor
path hunt processor
Chapter 6
(a)
(b)
(c)
Figure 6.20. Sources of node contro!. (a) Electronic ; (b) SLM; (c) optica!.
Regardless of the node-type that is chosen and regardless of the control scheme that is used to control the node, most photonic switching architectures place the logic devices on plan ar bases (ranging from single substrates to circuit boards). The manner in which anode is partitioned across these planar bases can be used to classify the nodes in yet another way. Many photonic switching implementations place all of the hardware for the nodes in a particular node-stage onto a single plan ar base. Nodes of this type will be called "single-plane nodes." As an example, the (2, I, I) node implementation (with electronic control) shown in Figure 6.21 has all ofthe electronics
Free-Space Digital Optics 373
Figure 6.21. Single-plane (2, I, I) node with electronic control.
for the node on a single plane, so it is a single-plane node. Other photo nie switching implementations divide each node-stage up into several substages of logic devices with each substage placed on a planar base and optical interconnections between the consecutive substages. Nodes of this type will be called "multiple-plane nodes." Each of the substages for a multiple-plane node is constructed either from optical logic devices (for optical or SLM control) or from integrated detector /electronics/ modulator blocks (for electronic control) that are mounted on the single planar base. This technique of dividing up the node-stage is best suited for nodes that are implementing logic functions with more than one level of logic gates. For example, the (2, 1, 1) node implementation (with SLM control) shown in Figure 6.22 has two levels of logic gates, so its AND gates are placed in one plane, its OR gates are placed in a second plane, and the connections between the two bases are implemented with optics. Thus, the (2, 1, 1) node implementation of Figure 6.22 would be called a "multiple-plane node," or more precisely a "2-plane node."
plane '1
Lnlra·node oplicaJ
interconnec:llons
pll.lX n
Figure 6.22. Multiple-plane (2, I, I) node with e1ectronic control.
374 Chapter 6
The planar base (for either of the above cases) is usually a single substrate, but it can also be as big as a circuit board carrying multiple devices (such as detectors, electronic chips, and modulators). In either case, the optical signals are typically routed onto and off of the plane so that they are propagating roughly orthogonal to the plane of the node logic gates. Since the planar bases for the node hardware can be implemented in many different ways, the system designer is free to specify many different techniques for directing the input optical signals onto the plan ar base and routing the output optical signals off of the planar base. Thus, it may be helpful to define a classification scheme for the manner in wh ich signals are routed onto and off of the planes of logic gates. As an example, some optical logic devices (such as the optical logic etalons) can be implemented on a transmissive substrate (Figure 6.23). Thus, optical input signals, optical control signals, and optical probe signals can all be beams of light that are routed roughly orthogonal to the plane of the substrate from the left, and optical output signals (modulated versions of the transmitted probe beams) are beams of light that emerge from the right side of the substrate. This type of signal routing (with inputs on one side and outputs on the other side) will be termed "transmissive." Another arrangement that is quite similar to the first is an arrangement of smart pixels on a circuit board with detectors on one side ofthe circuit board and lasers on the other side ofthe circuit board. For all practical purposes, this type of arrangement appears to be a transmissive
optical output signal
------~~~------~----+ optical control signal
Figure 6.23. Transmissive signal routing.
Free-Space Digital Optics 375
arrangement, so the signal routing will also be classified as "transmissive." Other types of logic devices (such as S-SEEDs) reftect the signals that are routed onto them. Thus, if data and clock are directed onto an S-SEED array from the left, then the output signal (which is a modulated version of the clock) will actually be directed away from the S-SEED array to the left. As a result, beam-combination and beam-separation techniques similar to those described in an earlier chapter must be used to separate the input signals from the output signals (Figure 6.24). This type of signal routing (with inputs and outputs on the same side) will be termed "reftective." I f smart pixels in a single substrate have their detectors and modulators on the same side of the substrate, then this type of signal routing would also be classified as "reftective." It is possible that a particular photonic switching architecture may try to capitalize on the access to both sides of the plan ar base by routing optical inputs in from both sides of the plane and sending optical outputs out from both sides of the plane, so the two classifications Iisted above would be insufficient to describe this arrangement. Thus, a third
1 1 clock & control ignal
lens c::: >
pallemed nurror
retleclor . --. Jens =:::=======::;2> quarter
wave-pJaleS
S~~~~~~-~I I Jen len
patltmed nurror
retlector
Figure 6.24. Reflective signal routing.
376 Chapter 6
classification will be added to describe this hybrid arrangement, and this type of signal routing will be called "bidirectional."
Typically, multiple nodes will be placed on a single plan ar base (or substrate). The multiple nodes that are placed on a base (or substrate) can be arranged in many different fashions, but there are two common ways of arranging the nodes. The first technique places the nodes along a I-D li ne on the base, and this type of node arrangement will be called a "1-D vector arrangement." The second technique places the nodes in a 2-D matrix on the base, and this type of node arrangement will be called a "2-D matrix arrangement."
In summary, classification of nodes for photonie switching networks will often use several orthogonal classification criteria. These various criteria are outlined in Table 6.2. Most nodes can be easily classified according to the different criteria shown, and the resulting classification should help the system designer understand the strengths and the limitations of the photonie switching architectures that can be constructed using those particular nodes. (N ote: Depending on the structure of the network, only some of these
Table 6.2. Classification of Switching Nodes
I. Node functionality • Number of inputs • Number of outputs • Capacity
2. Node cost (number of logic gates) 3. Type of logic gate
• Optical logic gates • Electronic logic gates (smart pixels) • Type of electronic hardware • Mixed hardware • Separated hardware
4. Source of control • Optical • SLM • Electronic
5. Location of hardware calculating control • Extemally calculated control (centralized control) • Locally calculated control (seJf-routed control)
6. Node partitioning • Single-plane nodes • Multiple-plane nodes
7. Signal routing • Transmissive • Reflective • Bidirectional
8. Arrangement of nodes in anode-stage • 1-0 vector • 2-D matrix
Free-Space Digital Optics 377
classification categories may be applicable. They will be applied whenever possible within this text.)
6.3.1.2. Examples of Nodes in Free-Space Photonie Switching Systems
In order to give the reader a better feel for the many different ways to implement the nodes in free-space photonic switching systems, several examples will be described within this section, and each of the nodes will be classified according to the classification scheme that was defined in the previous section.
A few important points must be made regarding these examples, though. First, each example shows only one way to implement the node. There are probably many other ways to implement each of these nodes, so the reader should not feel that the implementations shown here are the only ways (or even the best ways) to implement each ofthese nodes. In addition, the reader is advised not to associate any particular characteristic of one example with other characteristics in that example. For example, if an example shows transmissive elements that happen to be used with holographie interconnections, the reader should not assume that all transmissive elements require the use of holographic interconnections.
Finally, since the photonic switching systems tend to be three-dimensional in nature, illustrations describing the actual optical hardware can be fairly confusing. In addition, it was shown in a previous chapter that systems containing reflective elements usually require a great deal of hardware to implement the necessary beam-combination operations (Figure 6.24), so illustrations of these systems tend to be even more confusing. As an example, the multiple-plane (2, 1, 1) node of Figure 6.22 requires the optical hardware shown in Figure 6.25a if it is constructed using reflective opticallogic gates. Oue to the general complexity of the optical hardware in Figure 6.25a, tracing the system interconnections as beams of light within Figure 6.25a would be extremely difficult and impractical for rapid system evaluation. As a result, it is often advantageous to use simplified illustrations that show only the beam-steering operations and the resulting connectivity within the system. These simplified illustrations usually portray the photonic switching systems as ifthey were implemented using transmissive elements (even ifthey were really implemented with reflective elements). The simplified illustrations also leave out most of the optical components that are required to provide the optical interconnections. In addition, the simplified illustrations only show connections of interest, leaving out connections that do not playa role in the desired functionality. The resulting simplified illustrations allow the reader to concentrate on the interconnections between opticallogic elements instead of concentrating on the somewhat complicated optical arrangement that is required to route signals onto and off of the reflective elements. If
378
(a)
pa"cmcd
re"?t:c?~r ' • • • • ~2
(b) A 0
l [>l ~~~m c:=::::> ~ grating
I clock + signals
~
p ".me<! re'Wm:.r · • • • • ~13
OR
• • unuse<! OR gote
Chapter 6
Figure 6.25. (a) Optical hardware required for array of (2, I, 1) nodes. (b) Optical connections required for array of (2, 1, 1) nodes.
Free-Space Digital Optics 379
simplified illustrations are used within this text, the particular type of optical logic gate (transmissive or reflective) will be clearly specified. If they are reflective elements, the reader should then be able to visualize the additional beam-combination optics that would ordinarily be required to get the signals onto and off of the reflective devices. As an example, Figure 6.25b shows the simplified illustration of the (2, I, 1) node interconnections provided by the optics in Figure 6.25a. System designers must be careful to use simplified illustrations only if they are certain that the indicated interconnections can indeed be provided by some set of optical components, so the difficuIt task of analyzing the connectivity provided by the actual hardware must still be performed.
In the following sections, various node-types will be described and actual optical implementations of the node-types will be studied. These examples will serve as illustrations of the many different types of switching nodes that can be implemented using free-space optics. As a result, these sections will prove to be very useful to network designers who must specify node-types for their photonic networks. However, the examples described below have been selected with a more general goal in mind, because the design of switching nodes (whose functionality can be described by Boolean equations) is identical to the design of general-purpose digital logic for processing and computing applications. Thus, the ex am pies will also serve as brief tutorials describing several of the different design techniques from the field of opticallogic design, and designers of optical computers will also benefit from the many examples below.
a. Example J: Optical Implemenlation ()(a 2-Module Node. Probably the simplest type of node that can be used in a switching network is the 2-module. (J2) The simplest form of an electronic implementation of a 2-module is shown in Figure 6.26a. This implementation wire-OR's two inputs together, and then has a switch which is either open to disable the input signals from f10wing through to the two output ports, or it is closed to enable the input signals to f10w through to the two output ports. If the switch is opened, then both of the output ports will be disabled and they will be placed in the high-impedance state. Correct operation of a 2-module within a network environment requires that only one of the two input signals be active at any point in time-the other signal must be in the inactive (highimpedance) state. If both of the signals entering a 2-module are active, then the two input streams will corrupt one another. As a result, the path taken by a single active call within a network will typically place restrictions on the permissible states of other 2-modules within the network, because some of the other 2-modules will be required to be in the high-impedance state to permit appropriate passage of the active cal\. The functionality of the 2-module in Figure 6.26a can be provided in the optical domain using several different approaches.(33, 34) One optical approach uses a single S-SEED that
380
InpulO Control
2 ----, Input 1
Dual-rail input 0
Bia or
dock beam
Eleclronic control
(a)
(b)
Optical S-R latch
(S-SEED)
Chapter 6
Output I
OulpulO
OUlput)
Figure 6.26. 2-module nodes. (a) Electronic implementation; (b) optical implementation.
it operated as an S-R latch (Figure 6.26b). Iftwo dual-rail inputs are directed at the inputs of the S-R latch and if at most only one of the two inputs is ever active at any given time, then the S-R latch can store the active signal that is directed at it. If the dock signal that reads the stored data out of the S-R latch is passed through an SLM, then the window of the SLM can be made transmissive if the 2-module output is to be enabled, and it can be made absorptive to stop the dock signal from reaching the S-R latch if the 2-module output is to be disabled. If the output is disabled, the S-SEED will not receive a dock and the data stored in the S-SEED will not be routed to the next node-stage of the network, so the S-SEED output is effectively an "optical high-impedance."
Because of their simplicity, many 2-modules are typically required to yield a network with low blocking probabilities. Nevertheless, each 2-module requires only one S-SEED, so the hardware requirements for a single 2-module are minimal.
The 2-module shown in Figure 6.26b can be dassified using the criteria that were defined in the previous section. In particular, it is constructed from reflective, optical logic gates using externally calculated SLM control. One logic gate is required for each node. The nodes in anode-stage are partitioned over a single plane, and they would typically be organized in 2-D matrix fashion.
Free-Space Digital Optics 381
b. Example 2: Opticallmplementation 0/ a (2, 1, 1) Node. Recall that a (2, 1, 1) node has two inputs, one output, and a capacity of one, and it supports the node configurations shown in Figure 6.6. The (2,1,1) node shown in Figure 6.27 is constructed using two consecutive opticallogic gate substrates that are interconnected by simple imaging optics (shown in Figure 6.25a). The node is assumed to belong to node-stage i, so it is shown receiving data signals from link-stage i-I and transmitting signals into link-stage i. In Figure 6.27, the (2, I, 1) node is drawn as if it were constructed from transmissive elements, but this is a simplified drawing, and the actual optics shown in Figure 6.25a indicate that the opticallogic gates are actually reftective elements. The two devices on the first substrate of Figure 6.27 must operate as optical ANO gates, and the single device on the second substrate must operate as an optical OR gate, so this particular Boolean implementation of the (2, 1, I) node is said to use ANO~OR logic. (Note: Another implementation using NANO-NANO logic would permit all three of the logic gates to opera te as NANO gates, wh ich could be an advantage when using some of the opticallogic gate technologies.) The optical hardware in Figure 6.27 assurnes that two spots can be spatially imaged onto two different areas of a single logic gate: one of these spots is reserved for data signals, while the other spot is reserved for dock and control signals. The function of each of the components in the optical hardware of Figure 6.25a was described in detail within the literature. (35)
Input beams from node-stage i-I are directed through the polarizing be am splitter ( # 1), and are then reftected off of the patterned mirror reftectors (# 2 and # 3) back through beam splitter # 1 and imaged onto the
A D gate array
OR
/' = unused connection
e = unused OR gate
Figure 6.27. Optical connections required for a single (2, 1, 1) node.
382 Chapter 6
optical AND gates (#4). At the same time, the beams from the control laser j gratingjSLM combination (# 5) are routed through the 50: 50 beam splitter (# 6), through patterned mirror reflector # 2, and through beam splitter # 1 onto the AND gates (#4). As a result, only the data signals that arrive at AND gates along with enabled control signals will be passed through to the OR gates ( # 7). The beams generated by the dock laser and grating ( # 8) are then routed through beam splitter # 6, through patterned mirror reflector # 2, and through beam splitter # 1 onto the AND gates. The dock beams are then modulated by and reflected from the AND gates, and the reflected beams are then reflected by beam splitter # 1 through patterned mirror reflector # 3 and propagate toward the polarizing beam splitter (# 9). Upon hitting beam splitter # 9, the modulated beams from the AND gates (which are then circularly polarized) are split so that half of the power from each beam is routed to the left mirror (# 10) and half of the power is routed to the top prismatic mirror array (# 11). Mirror # 10 and its associated lens act as a retroreflector that reflects each of the beams directly back along the path from which it came, so the spots created by imaging ofthese beams do not encounter any displacement. Prismatic mirror array # 11 reflects each beam so that the reflected beam is tilted at a different angle from the incoming beam. The spots created by imaging of these "tilted" beams will encounter a slight displacement. Both sets of beams are recombined by beam splitter # 9 and routed to the next polarizing beam splitter (# 12). Beams from prismatic mirror array # 11 are then routed to and reflected from the top patterned mirror reflector (# 13), while beams from mirror # 10 are then routed to and reflected from the right patterned mirror reflector (# 14). Both sets of beams are then imaged as spots on the OR gates ( # 7). The beams generated by the second dock laser and grating ( # 15) are then routed through patterned mirror reflector # 13 and through beam splitter # 12 onto the OR gates. The modulated dock is then reflected from the OR gates, reflected from beam splitter # 13, and routed out to node-stage i + I through patterned mirror reflector # 14.
The unused logic gate on the second device substrate in Figure 6.27 is essentially wasted. It is used as a spacer element, so dock signals and control signals do not need to be routed to it. (Note: This can lead to slight savings in overall laser power.) Although the spacer element is a wasted logic gate, it still plays an important role in the (2, 1, 1) node, because its placement simplifies the optical hardware requirements by providing a location at which the undesired light beams in the system can be absorbed (shown as dashed lines in Figure 6.27). [Note: (2,2, 1) nodes and (2,2,2) nodes can be constructed using techniques and optical hardware components that are very similar to those described for the (2, 1, I) node in this section-see Problems land 2.]
The cost of the optical hardware in Figure 6.25a may seem to be excessive, especially when it is only providing the hardware for a single (2, I, I)
Free-Space Digital Optics 383
node. Fortunately, the cost of the hardware can be amortized over a large array of (2, I, I) nodes if the designer takes advantage of the bandwidth and parallelism offered by free-space optics. Typically, all of the (2, 1, 1) nodes for a particular node-stage would be implemented together on a single pair of device substrates, and the beams from all of those nodes would share the same set of imaging optics. For example, Figure 6.25b shows four (2, I, I) nodes arranged in a 2-by-2 array of nodes. These nodes are implemented on a pair of substrates, and it can be seen that a 4-by-2 array of optical logic devices is required on each of the substrates. The first substrate requires eight AND gates, and the second substrate requires eight OR gates (even though only four of the eight OR gates are active). The importance of the four spacer elements in the OR gate array becomes even more apparent within Figure 6.25b.
The (2, I, I) nodes shown in Figures 6.25 and 6.27 can be c1assified using the criteria that were defined in the previous section. In particular, they are (2, 1, 1) nodes constructed from reflective, opticallogic gates using externally ca1culated SLM contro!. Three logic gates are required for each node. The nodes in anode-stage are partitioned over two planes, and they are organized in 2-D matrix fashion in Figure 6.25a. (Note: Any switching node of type (a, b, c) in wh ich a< > b is called an asymmetrie node, and a network that is constructed from (a, h, e) nodes could just as easily be constructed from (h, a, c) nodes. Interestingly, the network's hardware cost will vary only slightly if the node-types are reversed. As a result, a network that is constructed from the (2, 1, I) nodes in Figure 6.27 could also have been constructed from (1, 2, 1) nodes, which are shown in Figure 6.28. The primary difference between the two node-types is whether the control is asserted
/' = unused conneclion .. e = unu ed OR gate
Figure 6.28. Optical connections required tor a single (1,2, I) node.
384 Chapter 6
on the inputs of the node ras in the (2, 1, 1) nodel or on the outputs of the node ras in the (1,2, 1) nodel.)
c. Example 3: Opticallmplementation 0/ a (3, 1, 1) Node. Recall that a (3, 1, 1) node has three inputs, one output, and a capacity of one, and it supports the node configurations shown in Figure 6.16. The (3,1,1) node shown in Figure 6.29a is also constructed using two consecutive opticallogic gate substrates that are interconnected by simple imaging optics (shown in Figure 6.29b). The node is assumed to belong to node-stage i, so it is shown receiving data signals from link-stage i-I and transmitting signals into linkstage i. The (3, I, 1) node in Figure 6.29 is constructed from transmissive opticallogic gates. In particular, the gates in the first substrate are optical AND gates, and the gates in the second substrate are optical OR gates. The optical hardware in Figure 6.29a assumes that two spots of different polarization can be imaged into the same area of a single logic gate: one of these spots is reserved for data signals, while the other spot is reserved for dock signals. Control of this particular system is achieved by direct modulation of the dock beams as they are passed through an SLM. The function of each of the components in the optical hardware of Figure 6.29b is described in detail below.
P-polarized input beams of light from node-stage i-I are directed through the polarizing beam splitter (# I), and are then imaged onto the optical AND gates (#2). S-polarized beams from the dock laser/grating/SLM combination (# 3) are then refiected by the beam splitter # 1 and imaged onto the AND gates. As a result, only the data signals which arrive at AND gates that will receive a dock signal will be passed through to the OR gates (#4). The dock beams are then modulated by and transmitted through the AND gates, and the modulated beams are routed through a half wave-plate (# 5) which converts the s-polarized light into p-polarized light. This light is then passed through a holographic interconnect ( # 6) that combines all three ofthe beams from the three AND gates at a single location on the OR gate (#4) (after they have passed through polarizing beam splitter # 7). Each of the beams from the AND gate array is actually operated on by a space-invariant, one-to-three split operation, so multiple imaging techniques can be used to project each AND gate output onto three spots in the OR gate array. The three spots from the three AND gates will all overlap at only one of the OR gates in the second array. (Note: Only one of the three AND gates in anode should ever be enabled with a dock, because otherwise destructive interference could result at the coincident spot on the OR gate array.) One technique that can perform the one-to-three split is a multiple imaging operation that uses computer-generated binary phase gratings similar to those described in Refs. 36-38. The phase grating must have a recording of the Fourier transform of three spots of light. If this phase grating is illuminated using the Fourier transform of the three
(a)
(b) 11>1 ~~~3
c:::::::=::::> &",tin&~
1 dock Slgnws
SLM •••••
(e)
AND gote Imy
OR glte "my
/' z unused conn""Uon
• = unused OR &'~
11>1 ~~~.8 c:::::::=::::>
grating ~
OUI]>\II data Ignws
10 stag~ i -
AND gl~
omy
/' e unused conn""Uon
• • unused OR &.~
Figure 6.29. (a, c) Optical connections required for a single (3, I, I) node. (b) Optical hardware required for array of (3, I, I) nodes.
386 Chapter 6
AND gate spots, and if the inverse Fourier transform of the resulting wave front is then imaged onto the OR gate array, then the resulting image on the OR gate array is the spatial convolution of three spots with three spots. This provides the desired connections shown in Figure 6.29a, implementing three different beam-steering operations in parallel. (Note: A lens can produce the Fourier transform or inverse Fourier transform of an image at its focal plane.) The s-polarized beams generated by the second dock laser/ grating combination (# 8) are then reflected from be am splitter # 7 onto the OR gates (#4). The modulated dock is then transmitted through the OR gates and passed through halfwave-plate # 9, which converts the s-polarized light into p-polarized light. This p-polarized light is then routed out to nodestage i + l.
The unused logic gates on the second device substrate in Figure 6.29a are used as spacer elements, because they provide a location at which most ofthe undesired light beams in the system can be absorbed (shown as dashed lines in Figure 6.29a) . Unfortunately, undesired light will also go to some of the active OR gates in the second array due to imperfections in the phase gratings. The overall operation of this system will probably be limited by the efficiency of the phase grating, as weIl as the amplitude of the noise orders that will route light to undesirable pixels in the OR gate array.
In Figure 6.30, two (3, I, 1) nodes are arranged in I-D vector fashion, and it can be seen that a 6-by-l array of opticallogic devices is required on
AND OR
/' = unused conneclion
• = unused OR gale
Figure 6.30. Optical connections required for two (3, I, I) nodes.
Free-Space Digital Optics 387
each of the substrates. The first substrate requires six AND gates, and the second substrate requires six OR gates (even though only two of the six OR gates are active). Four of the OR gates are used as spacer elements.
The (3, I, 1) nodes shown in Figures 6.29 and 6.30 can be classified as (3, I, I) nodes constructed from transmissive, optical logic gates using externally calculated SLM contro\. Each node costs four logic gates. The nodes in anode-stage are partitioned over two planes, and they are organized in I-D vector fashion in Figure 6.30. [Note: Since the (3, 1, I) node is an asymmetric node like the (2, I, 1) node, anode of comparable power can be created by moving the control from the node's inputs to the node's outputs. The resulting node is a (1,3, I) node, and is shown in Figure 6.29c.]
d. Example 4: Oplical I mplemenlalion ql a (4, 4, 4) node. Recall that a (4,4,4) node has four inputs, four outputs, and a capacity of four, and for point-to-point (nonbroadcasting) communications, it supports the 24 node configurations shown in Figure 6.18. The hardware required to support all of these different node configurations tends to be more complicated and costly than the simple hardware shown in the previous sections for the (2, I, I) node and the (3, I, 1) node. As a result, the (4,4,4) node is more likely to be implemented using the smart pixel approach as opposed to the discrete opticallogic gate approach. This smart pixel approach can capitalize on the complexity of electronics to perform the (4,4,4) switching functions while still capitalizing on the bandwidth and parallelism of free-space optics to provide the interconnections between smart pixels. The (4, 4, 4) smart pixel implementation shown in Figure 6.31 has six (4,4,4) nodes arranged in 2-D fashion, and each node has a detector array and a modulator array closely associated with it. The switching nodes, the detector arrays, and the modulator arrays are all fabricated on the same substrate in the theoretical model of Figure 6.31 . Each of these detector arrays must be capable of
~~~ ~~~ ~~
Figure 6.31. 2-D matrix of (4, 4, 4) nodes.
388 Chapter 6
receiving four input signals [which are then routed via electronic lines to the (4,4,4) node] and each of the modulator arrays must be capable of transmitting four output signals [which are received via electronic lines from the (4, 4, 4) node]. Since the detectors and modulators are shown on the same side of the substrate in Figure 6.31, this is a reflective system. The control signals for the six (4,4,4) nodes in Figure 6.31 are calculated based on routing information that is contained within the optical data stream (selfrouting control).
In Figure 6.31, the six (4, 4, 4) no des are arranged in 2-D matrix fashion, and it can be seen that a 2-by-3 array of nodes, detectors, and modulators are required on the substrate. Thus, the (4,4,4) nodes shown in Figure 6.31 can be classified as (4, 4, 4) nodes constructed from smart pixels using mixed hardware. They have locally calculated optical control, and the data signals are routed onto and off of the substrate in a reflective manner. The nodes in anode-stage are not partitioned (i.e., they are implemented in a single plane), and they are organized in 2-D matrix fashion.
e. Example 5: Nodes Based on Optical Symbolic Substitution. In theory, any Boolean function can be implemented using symbolic substitution, so the Boolean functions required for any desired node should be implementable using optical symbolic substitution.
Symbolic substitution is a parallel technique for pattern replacement in 2-D binary array.(39-42) A pattern replacement operation is defined by a rule which maps a left-hand side (LHS) pattern into a new right-hand side (RHS) pattern. A typical LHS-to-RHS rule is illustrated in Figure 6.32.
The replacement of a pattern involves two distinct phases: the matching phase and the scribing phase. In the matching phase, a parallel search for all occurrences of the LHS pattern takes place in the input array. In the scribing phase, bits indicating a match in the matching phase are used to write the RHS pattern into the output array. LHS-to-RHS rules can implement very useful operations. For example, the implementation of the four LHS-to-RHS rules shown in Figure 6.33 allows a system to perform the binary addition of two numbers. (40)
Most implementations of symbolic substitution require multiple arrays of logic elements along with some mechanism for storing the information. The storage mechanism for this example is assumed to be provided by arrays of S-SEEDs. (43) The logic elements will be implemented by the SEED(44)
~ ~l 1 1 •
1 1 1
LHS RHS
Figure 6.32. Typical LHS-to-RHS rule.
Free-Space Digital Optics 389
LHS RHS LHS RHS (a) (b)
LHS RHS LHS RHS (c) (d)
Figure 6.33. Four LHS-to-RHS rules for execution of binary addition via symbolic substitution. (a) Rule I; (b) rule 2; (c) rule 3; (d) rule 4.
operating as a NOR gate. Thus, data values will be stored and transported throughout the symbolic substitution system as modulated beams of light, and optical intensity will be used for coding of the binary values. This example system will use split-shift-mask-combine hardware to provide the variable displacement of image pixels as required by the interconnections in the systems. Split-shift-mask-combine hardware splits the input array into several copies of itself. Each of these co pies is offset or shifted by a different amount and is then passed through a mask, which allows only desired pixels to pass through to the combining block. The combining block recombines the images into one output image.
The S-SEED (Figure 6.34) can be operated as a clocked S-·R latch. The inputs (labeled Sand R) can be used to either set the device (output Q = I, a high-power output) or reset the device (output Q = 0, a low-power output). Assume Ps (PR) is the total optical power incident on the S (R) input. Also
s
MQW Q Q modulator
R
MQW Q Q modulator
Figure 6.34. S-SEED device and its inputs and outputs.
390
C1k
Clk
S, MQW modulator
R , MQW modulator
Figure 6.35. Crossed data transfer.
MQW
modulator
MQW Qz modulator
Chapter 6
assume that beams are combined so that coherent effects are negligible. The device will be set whenever the ratio Psi PR exceeds a predetermined threshold value K, and the device will be reset whenever the ratio PR/PS exceeds the threshold value K. The S-SEED has an inherent dual-rail nature, because it always produces two outputs-the stored bit Q and its complement Q, which are both modulated versions of the bias dock. Thus, recognition of patterns containing both "1's" and "O's" is possible using a dual-rail coding scheme described in the references. (40)
Data can be transferred from a device in one array to a device in a second array by directing the Ql and Ql outputs of the first device to the inputs ofthe second device. Ifthe Ql and Ql bits are crossed in their propagation path, then data bits arrive at the second array uninverted (Figure 6.35). If the Ql and Ql bits are uncrossed, then the resulting data stored in the second device is an inverted version of the data that was initially stored in the first device (Figure 6.36). These two types of data transfers will be
Clk
C1k
S, MQW modulator
R, MQW modulator
Q,I--------... S Z MQW modulator
Q,I--------... R z MQW modulator
Figure 6.36. Uncrossed data transfer.
Free-Space Digital Optics 391
Clk MQW Q,i---------"S, MQW Q, modulator modulator
Clk R, MQW Q,i---------" MQW modulator
E R
Figure 6.37. Recognition of Q, = 0: if Q, is initially 1, then Q2 remains 1 only if Q, = O.
referred to as crossed data transfers and uncrossed da ta transfers, respectively.
Recognition of either a "0" or a "I" in the first array requires that the device in the second array be initially set with Q2 = 1 by an enable beam. It also requires that an enable beam (synchronized to the cIocked output of the first device) be directed at the R input of the second device. Recognition of a "0" is accomplished by directing the uncrossed outputs of the first device to the inputs of the second device (Figure 6.37). [Note: The power of the enable beam, P"R' must be controlled so that (PQ, + PER)/(PQ,) > K when Q, = I, and so that (I/K) < (PQ, + PER)/(PijJ < K when QI = 0.] After this "0" matching process, the second device will still be set only if the first device contains a "0." Recognition of a "1" in the first array requires a similar arrangement (Figure 6.38), but the crossed outputs of the first device are directed to the inputs ofthe second device. After this "1" matching process, the second device will still be set only if the first device contains a ~~1."
Clk
Clk
MQW modulator
R, MQW modulator
Q,
Figure 6.38. Recognitioll of Q, = 1 : if Q, is initially 1, thell Q, remains 1 only if Q, = 1.
392
Clk
Clk
S2 MQW modulator
R 2 MQW modulator
S, MQW Q, modulator
R, MQW Q, modulator
Figure 6.39. Scribing of Q3 = I: Q3 is set to 1 only if Q2 = I.
Chapter 6
Q,
Q,
Data pattern scribing into a third array can be accomplished using the devices in the second array that remain set with Q2 = 1 after the matching phase. Scribing of a "I" into the third array can be accomplished by directing the crossed outputs of the second device to the inputs of the third device and asserting an enable be am on the S input of the third device (Figure 6.39). After the "I" scribing process, the third device will be set only if the second device contains a "1." Scribing of a "0" into the third array can be accomplished by directing the uncrossed outputs of the second device to the inputs of the third device and asserting an enable beam on the R input of the third device (Figure 6.40). After the "0" -scribing process, the third device will be reset only if the second device contains a "1."
There are many architectural ways to implement a Boolean function using symbolic substitution, but only one of these architectures will be described in this example. This particular architecture is called the timesequential architecture. The time-sequential architecture is implemented as
Clk
Clk
S2 MQW Q2~------------~S3 MQW modulator modulator
MQW modulator
Q2~------------~
E R
MQW
Figure 6.40. Scribing of Q3 = 0: Q3 is reset to 1 only if Q2 = I.
Free-Space Digital Optics 393
crossed
Q
~~ uncrossed
~ = beam splitler/combiner D =shutler
~ = split-shift-mask-combine hardware ~ = S-SEED array
Figure 6.41. Time-sequential implementation of symbolic substitution.
shown in Figure 6.41. This implementation is very similar to the primitive implementation initially proposed by Huang.(39) The instructions are executed as a result of the sequence of shifts and exposes implemented by the extern al control unit controlling the shutters and the enables.
The implementation consists of an input, an output, and a processing loop. The processing loop consists of a routing block, a shifting block, and a set of storage arrays (S-SEED arrays A, B, C, and 0). The outputs of the S-SEED arrays are combined into one image and looped back to the system input, where the image is directed to the routing block. In the routing block, the image is split into two images, which are directed at a subblock that provides crossed data transfers (for uninverted data) and at a subblock that provides uncrossed data transfers (for inverted data). The output images from these two subblocks are then recombined and directed to the shifting block. In the shifting block, the optical image containing the data patterns is split into five images, which are directed to one of five subblocks, labeled straight, north, south, east, and west. In these five subblocks, data can be passed straight through or can be shifted north, south, east, or west by one device spacing prior to being stored in an S-SEED array. In a typical application, an input data pattern would be routed through the straight shifting block to be stored in S-SEED array A. Then all of the devices in the matching phase's receiving array (S-SEED array C) can be initialized with Q = 1 by asserting an enable beam. The output data from S-SEED array A can then be looped back to the system input and back through the
394 Chapter 6
routing and shifting blocks. Repetitive passing of the data through the routing and shifting blocks from array A to array Band back to array A will permit shifts of any displacement in any direction. On ce the data have been shifted the appropriate amount, matching on a "}" or a "0" is accomplished by exposing the shifted data onto S-SEED array C (as in Figures 6.37 and 6.38). Additional shifting and matching allows any LHS pattern to be identified within the input array. After matching, the devices in S-SEED array C with Q = } identify the locations where the LHS pattern was identified. Scribing of the RHS pattern takes place via shifting of the bits that are left set in S-SEED array C. This can be accomplished by repeatedly passing the data through the routing and shifting blocks between array C and array B. Once appropriate shifting is achieved, the shifted "}'s" in array C can be exposed onto S-SEED array D to scribe the RHS pattern bits (as in Figures 6.39 and 6.40). Additional shifting and scribing allows any RHS pattern to be written within array D. Once the scribing phase is complete, matching on another LHS pattern can begin by using the initial data pattern which is still stored in S-SEED array A. The final results can then be directed to the output port.
Two fundamental problems plague the above implementation of symbolic substitution. First, the implementation requires extremely long processing times to implement even a simple Boolean function (or simple logic node). Second, the hardware costs can be quite high.(45) Other implementations of symbolic substitution have been described in the literature to solve some of these problems. (46,47) Many of them convert the slower time-sequential architecture described above into a parallel architecture that operates on multiple LHS patterns simultaneously. Although the parallel implementations are faster, they still require a fair amount of hardware to implement very simple Boolean functions. As a result, optical symbolic substitution seems to be better suited for parallel computing (SIMD computing) than it is for the implementation of nodes in photonic switching.
f Example 6: Nodes Based on Optical Programmable Logic Arrays (PLAs). PLAs have become a standard building block within many digital logic systems that are based on electronic technologies. They can be programmed to implement many different Boolean logic functions, so they should be capable of implementing the logic for a network switching node. Recent research efforts that evolved from work on symbolic substitution have produced design techniques for all-optical PLAs that can be implemented using opticallogic gates. (48,49) The optical PLA is an interesting system, because it contains multiple stages of opticallogic gate arrays that are interconnected via free-space optical interconnections. As a result, a switching node constructed from an optical PLA is always a multiple-plane node based on optical logic gates. The optical hardware between successive stages will usually implement one or more of the interconnection patterns that will be
Free-Space Digital Optics 395
described in the next section. In fact, if the optical logic gates (NOR gates and OR gates) used for an optical PLA implement at ion are treated as very simple nodes, the PLA itself can be viewed as a type of network consisting of simple nodes (Iogic gates) and interconnecting links. One difference between the PLA design and areal switching network design is that the PLA is designed to have two active signals directed at a single spatiallocation on each of its nodes (Iogic gates), while areal switching network would never permit two active signals to be directed at a single spatial location on any of its nodes since the two signals arriving at the node would corrupt one another.
Electronic PLAs typically implement the sum of minterms form of a Boolean function to produce a desired output, and optical PLAs are very similar to their electronic counterparts. However, a few minor modifications to this strategy are required in the design of optical PLAs. Rather than describing the general design techniques for optical PLAs, the techniques will be illustrated in the simple example below of a sorting node constructed using an optical PLA.
One of the most useful applications for optical PLAs is in the implementation of finite state machines. The classical model of the finite state machine contains a small amount of combinationallogic (as shown in Figure 6.42), and its operation is a function of the "current state" stored in the machine. The current state of the machine is stored in a local memory (or delay elements) located within a feedback path in the machine. The finite state machine's outputs are a function of the current state of the machine and the current inputs. The "next state" of the finite state machine is also calculated
inputs
les~k tale
slate variab for current
V I-
----4
,..
,/
combinational logic
r--
-local
memory
r--r-
""',,-----
outpul
~ ta fo
te variable r next laIe
Figure 6.42. Classical model of a finite state machine.
396 Chapter 6
in the combinationallogic based on the current state of the machine and the current inputs, and this next state is then stored in the memory within the feedback path. As a result, the next state is stored and becomes the new current state of the machine. In many ways, a finite state machine is merely a small computational processor. It has been shown that a finite state machine based on an optical PLA can be very useful in implementing the logic required for a self-routing switching node.(50) For example, the sorting node shown in Figure 6.43 is a simple but powerful self-routing switching node that can be used in the Starlite switching network. (30) If two packets entering the sorting node are tempo rally lined up with respect to one another, then the packet that will be routed to the "max" output is the packet that has the largest destination address in its packet header. This packet can be found by comparing the header bits of both packets in sequential fashion, starting with the most-significant bit first. In the first bit position where the two packet headers differ, the packet with a logic "l" in that bit position is routed to the "max" output, while the other packet, wh ich has a logic "0" in that bit position, will be routed to the "min" output. The finite state machine in Figure 6.43 has three possible states (initial, input A routed to
'0'0 • I Si mlo mlo max ;;:;;;
Figure 6.43. Sorting node based on optical PLAs.
D=oR
. =NOR
Free-Space Digital Optics 397
max output, and input B routed to max output), so two state variables (so and SI) are required. These state variables are routed back to the input of the PLA. The Boolean logic functions required for the two outputs and the two state variables are given below in the sum of minterms form:
max = S].xy + soxy + xy
min = xy + SIY + sox
Since the implementation in Figure 6.43 employs only NOR gates and OR gates, the minterms within the four equations above can be rewritten using Oe Morgan's theorem to produce:
max = SI + X + Y + So + X + Y + x + y
min = x + y + SI + Y + So + X
So = SI + X + Y + So
SI = So + X + Y + .\.~
As a result of the application of Oe Morgan's theorem, the minterms are actually implemented as the inverted sum of Boolean variables (which can be implemented using NOR gates). The optical logic gates within Figure 6.43 are arranged in a predefined fashion according to the optical PLA design techniques. In particular, the first four stages of logic gates create all of the necessary minterms, and the last four stages of logic gates combine the minterms to create the required output functions. The interconnections between successive stages of logic gates provide the crossover interconnection pattern, which was described in a previous section. Some of the connections (shown as gray lines in Figure 6.43) within the crossover pattern are purposely left out. These connections are undesirable connections for the particular PLA function being implemented, so masks must be placed in an image plane within the optical hardware to effectively block these paths. A convenient location for these masks is often in the plane of the patterned mirror reflectors that are used to combine dock signals and data signals.
Once the logic for a single switching node has been implemented using an optical PLA design, multiple nodes can be constructed by replicating this PLA design. Two of these PLA-based sorting nodes are shown side-by-side
398 Chapter 6
in Figure 6.44. The sorting nodes shown in Figure 6.44 can be classified as (2,2,2) nodes constructed from optical logic gates. They have locally calculated optical control, and the data signals are routed onto and off of the substrates in a transmissive manner. The cost for each node is 128 logic gates. The nodes in the node-stage are partitioned over eight planes, and they are organized in I-D vector fashion within Figure 6.44. The interconnections between switching nodes in consecutive stages of the network are similar to the interconnections between consecutive logic gate arrays within the node, but the node-to-node interconnections have a larger granularity than the gate-to-gate interconnections. This fact will be discussed in more detail in the section on the Starlite switching network.
6.3.1.3. Macroscopic versus Microscopic Views of Nodes
All of the nodes discussed above were described using a macroscopic point of view. In other words, each of the devices was modeled as if it were a single window on a substrate. This type of model provides a "macroscopic view," or somewhat distant view of the nodes in which the detailed structure of the logic gates may not be fully apparent. The actual implementation of the nodes may not exact1y match this model. In order to fully describe the exact functionality of the logic gates within the nodes, a "microscopic view" of the nodes may be required.
As an example, assurne one ofthe nodes described above was implemented using S-SEEDs. Due to the dual-rail nature of the S-SEED, the microscopic view of the node must be considered when designing the optical hardware for the node. The dual-rail nature of the S-SEED results from the fact that a single S-SEED actually has two optical windows, so every input signal and every output signal from the S-SEED consists of two logically coupled beams of light. The two modulated output beams emerging from the two windows of an S-SEED are complementary signals, i.e., one of the beams is at a high-power level while the other beam is at a low-power level. Depending on which of the two beams is at a high-power level, both binary values (logic "I" or logic "0") can be encoded within the dual-rail optical signal. In its most fundamental form, the S-SEED has been shown to operate as an S-R latch. For this reason, one of the two rails driving a single SSEED is typically labeled the S (set) input rail, while the other rail is labeled the R (reset) input rail. The output rail from the window receiving the S input is typically labeled the Q output rail, and the output rail from the window receiving the R input is typically labeled the Q output rail. For this reason, the optical window associated with the S input rail and the Q output rail will be called the S-Q window, while the optical window associated with the R input rail and the Q output rail will be called the R-Q window. Figure 6.45a shows the logical schematic of a simple R-S latch constructed from
Free-Space Digital Optics 399
1--
I" ..
I.., ..,
I ..
,.,,-.,,-
, .,<'
.,c
\ :i ....... . ~ 1..~. \~
W l~· · · ~ .. \~. "\ . ~(
CI! CI! 0 o Z
11
Oll
vi -< ..J ~
öl .~ P-o s:: 0
"0 <IJ
'" '" .n ,.,,-'" <IJ
"0 .,,- 0 s:: , .. 0
OJ)
.s c 1:: .. ~
0 ~ f-
~ ..0
<IJ ... ::l OJ)
~
,.,-.,-
1 .. 0
c ..
400 Chapter 6
s -ff
R
(a) (b) (c)
Figure 6.45. R-S lateh. (a) NOR gate implementation; (b) S-SEED implementation; (e) simplilied S-SEED implementation.
NOR gates, and Figure 6.45b shows a single S-SEED performing the same logical function. Figure 6.45c shows a simplified drawing of the S-SEED that will be used to illustrate the S-SEED in microscopic considerations of systems. In Figure 6.45c, the S-Q window of the S-SEED is shown as a square window, while the R-Q window of the S-SEED is shown as a round window. The reader should not confuse this illustration with the actual implementation of the S-SEED, because both windows in an S-SEED are typically the same size and shape. The square figures (for S-Q windows) and round figures (for R-Q windows) are merely symbolic representations of the windows that will simplify the microscopic discussions of systems based on S-SEEDs. If S-SEEDs are used to implement a particular switching node, then care must be taken to analyze the microscopic view of the system.
For example, Figure 6.46a shows the macroscopic connections required to provide a NAND-NAND implementation of the (2, 1, 1) node of Figure 6.27. It can be assumed (without any loss of generality) that the connections in Figure 6.46a are essentially horizontal. As a result, NAND gates A and Bare physically located along a horizontalline. If the S-SEEDs implementing the NAND gates are oriented vertically, as shown in the microscopic view of Figure 6.46b, then the desired connections are obtained using the simple hardware of Figure 6.25a. However, if the S-SEEDs implementing the NAND gates are oriented horizontally, as shown in Figure 6.46c, then one set of dual-rail beams is crossed within the node (square windows are connected to round windows and vice versa) while the other set of dual-rail beams is routed without being crossed (square windows are connected to square windows and round windows are connected to round windows). Since crossing of the data rails in a dual-rail system is identical to inversion of the data, one of the inputs in Figure 6.46c is inverted while the other input is
Free-Space Digital Optics
ANO Ro'e arny
(c)
NA 0 ga'"
arr2y
COnl A
401
A. 0 NANO gOle go,< Imy arMlY
Figure 6.46. NAND-NAND implementation of (2, I, I) node. (a) Macroscopic view; (b) microscopic view with vertical S-SEEDs; (c) microscopic view with horizontal S-SEEDs; (d) macroscopic view of resulting connections with horizontal S-SEEDs.
not inverted, so the resulting logic that is implemented is shown in Figure 6.46d. The logic shown in Figure 6.46d and implemented by the S-SEEO hardware in Figure 6.46c will not function as a (2, I, I) switching node, because if NANO gate A is disabled (control input = logic "0"), then the inverted output from NAND gate A will force the output of NANO gate C to be a logic "I." As a result, signals from NANO gate B (which is enabled) cannot be routed to the output port of the (2, 1, 1) node. As a result, this microscopic view of the (2, I, I) node indicates that the orientation of the S-SEEDs is cJosely related to the functionality of the switching node that is being implemented. In particular, (2, I, I) nodes require the S-SEEDs to be oriented perpendicular to the line connecting the two input gates. However, if the system designer is constrained to have the S-SEEOs oriented parallel with the line connecting the two input gates of a (2, I, I) node, the microscopic view of the node can also be used to design a slightly modified version of the hardware in Figure 6.25a that can correct the problem of having one input inverted and having the other input noninverted. The modified optical hardware is shown in Figure 6.47a, the resulting logic for the (2, I, I) node is shown in Figure 6.47b and the logic is simplified in Figure 6.47c. As seen in Figure 6.47b, the input to each of the NANO gates in the (2, 1, 1) node is inverted when it arrives at the output gate, which has been converted into
402
gr.llng
1 dock & conlrol 'Ignal ...
pauemed rrurror •••••
retlettor #2 ~
~
mput dat. [ZJ ~::;,I M.ge,-)
- PB #1
AND gatt array
(a)
'OR gatt array
Chapter 6
O UI
Figure 6.47. (a) Modified optical hardware required for array of (2, I, I) nodes ; (b) microseopie view with horizontal S-SEEDs; (c) AND-OR implementation (2, I, I) node.
Free-Space Digital Optics 403
a NOR gate. As a result, both ofthe inputs are inverted as they pass through this modified (2, I, I) node.
6.3.2. Interconnections and Link-Stages in Free-Space Photonic Switching Systems
As previously mentioned, most of the published research on photonic switching has concentrated on the optical interconnections that are provided by the link-stages. The interconnections have received the most attention, because they define the primary operational differences between electronic switching systems and photonic switching systems. In fact, most of the research on photonic switching is being carried out in an attempt to capitalize on the bandwidth and parallelism (or signal density) that can theoretically be achieved using free-space optical interconnections between the stages of switching nodes. In addition, free-space optical interconnections also hold the promise of solving the signal skew problems and noise problems that may be associated with the capacitive and inductive interconnections in electronic implementations of high-speed switching networks. As a result, a brief discussion describing possible interconnections that can be used in photonic switching networks would be helpful.
6.3.2.1. Classification oi Interconnections in Free-Space Photonie Switching Systems
In previous sections, several parameters related to switching nodes were defined, and a formal classification scheme for photonic switching nodes was outlined. A general c1assification scheme for the interconnecting links in photonic switching networks would prove to be equally useful. Unfortunately, it is more difficult to develop a general c1assification scheme for the interconnections, because the interconnections in different networks are very different. In addition, the parameters that are important for one interconnection scheme are not always important for another interconnection scheme, because the parameters are often c10sely tied to the optical hardware and device technology that is used to implement the scheme. There are, however, several parameters of interest related to the interconnecting links that can normally be identified, and there are also some "rules of thumb" emerging from lab prototypes that have helped define some desirable ways to implement the links within an optical network. These parameters and the corresponding rules ofthumb are described below. (Note: Since the interconnections between logic gates within anode are oftentimes very similar to the interconnections between nodes, some of these rules of thumb are also applicable to the design and analysis of the internal portions of a switching node.)
404 Chapter 6
The most important aspect of any interconnection scheme is the node connectivity provided by the interconnecting links. This connectivity can be described using several different techniques. One common technique is to provide a drawing showing all of the connections provided by the links. However, for large networks, this technique is not practical. Another technique that is better suited for large networks describes the link connectivity using mapping functions. Node mapping functions and link mapping functions were outlined in detail in a previous section. In 2-D networks, the mapping functions will have the form ßi(a) = b, which describes a connection between node a in stage i and node b in stage i + I. In 3-D networks, these mapping functions must incorporate the 2-D nature of the nodes in the network. Thus, a typical mapping function for the connection between node (a, b) in stage i and node (e, d) in stage i + 1 will be written as ßi(a, b) = (e, d).
Another important parameter related to any optical interconnection scheme is the cost ofthe optical hardware required to implement the scheme. The cost of an optical system is generally proportional to the number of optical components required to provide the interconnection. Typically, this cost must be compared with the cost of a comparable interconnection scheme implemented in electronics. Oftentimes, a better measure of the system cost is the amortized cost of the interconnections, which can be defined as the total cost of the interconnection hardware divided by the number of desired interconnections that are provided by the hardware.
The amortized cost is very closely related to another important parameter, which is the number of possible connections provided by the hardware. This parameter can also be described in terms of the available space-bandwidth product of the optical imaging elements within the system. As described in an earlier section, the space-bandwidth product of an optical imaging system describes the number of noninterfering connections that the imaging system can provide between devices on an input plane and devices on an output plane. The number of noninterfering connections is limited by the field of view of the imaging system and the resolution of the imaging system. A large field ofview and high resolution (i.e., a high space-bandwidth product) are both required to yield an optical imaging system that can provide a large number of noninterfering connections. Unfortunately, it is difficult (and expensive) to construct an optical imaging system that has both of these qualities (large field of view and high resolution).
Another pair of parameters related to the interconnection scheme are the amount of fan-out required from a logic gate and the amount of power lost in the interconnection hardware. Different interconnection schemes require different amounts of fan-out and suffer from different amounts of power loss. In most systems, there is a minimum amount of power required at the receiving end of an interconnection to switch the detecting logic gates
Free-Space Digital Optics 405
at a desired speed. Since each fan-out results in a division of the signal power that is sourced by the transmitting logic gate, there is a fan-out limit placed on the interconnection scheme. In addition, since the optical signals will typically pass through several optical components within the interconnection scheme, and since each component will introduce a small amount of loss, there is also a total power loss limit placed on the interconnection scheme (wh ich can be translated into a limit on the number of components within the optical hardware). Although the fan-out limit for a particular switching network is a function of the device technologies and the interconnection hardware being used, a rule of thumb states that it is typically easier to construct a working system if the fan-out is held to a lower value (e.g., 2).
Another interconnection parameter (which is often related to the fanout) is the logic gate fan-in requirements of the interconnection scheme. For ex am pIe, assurne an OR gate is receiving a single active input signal along with a large number of inactive signals (which are logic "O's") that are being fanned into the same gate. Although logic ''I's'' are typically encoded as high-power signals and logic "O's" are typically encoded as low-power signals, most of the existing logic gates have finite contrast ratios which permit a small amount of optical power to "Ieak" into the logic "0" signals. As a result of this sm all amount of optical power, it may become difficult for the OR gate to detect the logicallevel of the active input signal if it is combined (via fan-in) with a large number of logic "0" signals, because the combination of the power from each of the logic "0" signals may add to produce a noise signal with a level that is comparable to the logic "I" level of the input signal. As a result, there is typically a fan-in limit placed on the interconnection links within a photonic switching network. Although the fan-in limit is a function of the device technologies and the interconnection hardware being used, a rule of thumb states that it is typically easier to construct a working system if the fan-in is held to a lower value (Iike 2). [N ote: The reader should be aware that there is a difference between the fan-out or fan-in of a switching node and the fan-out or fan-in of a logic gate. The fan-out and fan-in limits described above are related to the fanout and fan-in of a logic gate. They are not related to the so-called fan-out and fan-in of a switching node. For example, a (4,4,4) switching node is sometimes said to have a fan-in of 4 and a fan-out of 4. However, if the (4,4,4) node is implemented appropriately, each of the logic gates in the node may require at most a fan-out and fan-in of 2.]
Another useful parameter that helps describe the complexity of an interconnection scheme is a measure of the number of different beam-steering operations required by the interconnections. A single beam-steering operation is defined as the imaging of spot arrays from the input image plane to the output image plane with a particular x-y displacement. Imaging opera-
406 Chapter 6
tions that require different x-y displacements of the input plane onto the output plane are defined as different beam-steering operations. If different beam-steering operations are provided using split-shift-combine techniques (where the optical beam is split by be am splitters, routed down different optical hardware branches with different shifting operations, and then recombined using be am splitters), then the total number of optical hardware branches that are required is equal to the number of different beam-steering operations that are required. As an example, the split-shift-combine hardware shown in Figure 6.48 can provide for three different beam-steering operations in the three branches of the hardware. [Note: The hardware shown in Figure 6.48 assumes the use of 50: 50 beam splitters, so the optical power losses in the system would be quite large.] To help describe the number of beam-steering operations required for a particular interconnection scheme, a Cartesian coordinate system will be superimposed over the logic gates in the source array and the target array, as shown in Figure 6.49. [Note: The example system illustrated in Figure 6.49 has the output stage of an 8 x 4 array of (2, 1, 1) nodes being connected to the input stage of an 8 x 4 array of (2, 1, 1) nodes.] A ray traveling parallel to the optical axis from the origin of the source array will intersect the target array at its origin. This ray defines the z-axis. The co ordinate system associated with the source array will be labeled as the x-y plane, while the coordinate system associated with the target array will be labeled as the x'-y' plane. As a result, every logic gate in the source array is located at a particular co ordinate defined by a co ordinate pair (x, y), and every logic gate in the target array is located
PI.~m;~/ branch #3 ~,m;=,
beam-splitter t 1 beam-splitter
[2J branch #2 LSJ beam-splitter t 1 beam-splitter
[2J branch #1 LSJ input • • output
Figure 6.48. Split-shift-combine hardware.
Free-Space Digital Optics 407
Output A rray Co or
ORgates in node-stage i
CI C7
C 2 C I> C x
C, C 9 CI,
A O Input Array
or B o AND iates
AI in node-s age i+ 1 BI
B 7 A 7
Y B2
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10 '14 ~4 BI6
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12 B ~X A IX B 22
~Q A 11 19 B 21 x'
A;. 11 o A
20 B 26 26
Link-stage i
Figure 6.49. Cartesian coordinate systems for specification of beam-steering operations between outputs of (2, I, I) nodes and inputs of (2, I, I) nodes.
at a particular coordinate defined by a coordinate pair (x', y'), Every connection provided by a particular interconnection scheme will have a specific difference (8x, 8y) = (x', y')-(x, y) associated with it. Different connections are based on the same beam-steering operation if and only if the difference (8x, 8y) is the same for each of the connections, so this difference actually defines the beam-steering operation. It should be apparent that the number of different beam-steering operations will typically grow with the fan-out requirements of the interconnection scheme, Typically (but not always), interconnections that have a large number of beam-steering operations will require more optical hardware and will therefore be more expensive.
Another parameter of interest in defining the complexity of an optical interconnection scheme is the space-variance of the optical interconnections, Assurne that the light propagating from a particular device in the source array is routed to D devices in the target array, Each of these D connections (from the single device in the source array to the D devices in the target array) is described by a particular beam-steering operation, If the light propagating from every other device in the source array is also routed to D devices in the target array such that the beam-steering operations are identical to those for the first device, then the interconnections are said to be
408 Chapter 6
space-invariant. If the light propagating from other devices in the source array are routed according to different beam-steering operations, then the interconnections are said to be space-variant. As an example, the connections shown in Figure 6.50a are space-invariant connections, because every light be am from the source array is routed to two devices in the target array, and the two beam-steering operations from any device in the source array are the same regardless of the location of the device in the source array. In particular, the two beam-steering operations are defined to be (ox, oy) =
(0,0) and (ox, oy) = (I, 1), so output e5 is connected to input B5 and to input A 2 • The connections shown in Figure 6.50b are space-variant connections, because a different beam-steering opera1ion is required for each of the different device locations in the source array. As a general rule of thumb, space-invariant beam-steering operations are usually simpler to implement. Normally, a space-variant beam-steering operation can be performed only if complicated optical hardware with space varying masks is used. However, an exception to this rule occurs if the optical interconnections tend to be symmetrical about a point or symmetrical ab out an axis, because relatively simple components such as lenses or prisms can often provide these types of interconnections (as shown in Figure 6.51a, b). As a result, it is often beneficial to consider whether a space-variant interconnection is nonsymmetric, symmetric about a point, or symmetric about an axis when classifying a particular interconnection scheme.
Another aspect that helps distinguish one interconnection scheme from another is whether the interconnecting links are being used to connect nodes in consecutive stages or logic gates in consecutive stages. The difference between these two different applications may not be apparent at first. However, the difference can be important, because it can affect the implementations of the various interconnections. As an example, consider the single stage of a shuffie network shown connecting (2, 2, 2) nodes in Figure 6.52a. Since nodes are being interconnected, the interconnecting links are probably being used to provide stage-to-stage connections for a switching network application. Switching applications typically require that the links within a link-stage all be terminated at disjoint spatial locations on the receiving nodes. If this requirement were not satisfied, then the optical data signals from two separate links would be superimposed at the receiving node and corrupt one another. The shuffie interconnections shown in Figure 6.52a are the standard interconnections that were described in earlier sections, and they satisfy this link termination requirement. Now assume that the two signals directed at each of the nodes in Figure 6.52a are merged together and terminate at a single point on the input of the node, and assume that the two signals exiting from each of the nodes in Figure 6.52a are merged together and pro pagate from a single point on the output of the node. The resulting interconnections are shown in Figure 6.52b. The interconnection
Free-Space Digital Optics
Output Array of
ORgates in nOlre-stage i
y
(a)
Output Array of
OR gates in node-stage i
'j
(b)
Link-stage i
Link- tage i
Input Array of
A D gates in 'node- tage i+1
y'
Input Array of
A D gates in node-stage i+ I
409
x'
x'
Figure 6.50. Space-invariant (a) and space-variant (b) interconnections between outputs of (2, 1, 1) nodes and inputs of (2, I, 1) nodes.
410
Output Army of
ORgates in noae-stage j
y
(a)
Output Army of
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y
Input Army of
AND gates in node- tage 1+ I
Link-stage i
Link-stage i
y'
Input Army oC
AND gates In node-stage i+ 1
y'
Chapter 6
Figure 6.51. (a) Spaee-variant intereonnections provided by a lens are symmetrie about a point on the optieal axis of the lens. (b) Spaee-variant intereonneetions provided by a prism are symmetrie about a line at the apex of the prism.
Free-Space Digital Optics 411
(a) Nude- Link- Nud .. - (b) Nude- Link- Nnde-
StaKe StaKe Stage Sla~t' Stage Stal(l! i i i+1 i i i+1
OINHI IHMM' ===G IMM) OIMMI
01101 (KMU INIOI
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0101 0101 0101
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1001 ICKH 1001
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1100 IIIHI 1100
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i i i+1 i i i+1
INIOO 000 0110 OUtMt 0000
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00111 IHIIO 0010
0011 0011 0011
0100 0100 0100
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1000 IOIMI IIMIO 1000
1001 1001 HMH 1001
1010 uno \010 1010
1011 \Oll 1011 1011
1100 1100
1101 1101
IIIO~~IIIO 1110 1111 111 111 111 111 1111 1111
Figure 6.52. Shuffle interconnections (a) and merged shuffle interconnections (b) within a single link-stage. (c) Original shuffle interconnections. (d) Permuted shuffle interconnections.
pattern in Figure 6.52b is still called the shuffle interconnection within most of the literature, but it is obviously not the same as the shuffle interconnection pattern shown in Figure 6.52a. As a result, to differentiate the interconnection in Figure 6.52b, it will be called the merged shuffle within this text. Since the connections in the merged shuffle do not satisfy the link termination requirement described above, these types of connections are not normally used to connect nodes in switching networks. As a result, one may wonder what applications would use the connections in Figure 6.52b. The most common application is probably in the connection of optical logic gates
412 Chapter 6
(such as AND, OR, NAND, and NOR gates) that have fan-ins of two and fan-outs of two. As an example, the optical PLA designs described in a previous section used the crossover interconnections (instead of the shuffie interconnections) to connect successive stages of opticallogic gates within a PLA-based sorting node. The connections in the merged shuffie can also be useful for switching networks that employ 2-modules as nodes, because a single 2-module permits (and requires) two signals to be terminated at the same spatiallocation within the node (see Figure 6.26b). One ofthe interesting features of the interconnections in Figure 6.52b is the fact that the connections can be viewed as the superposition of anormal shuffie defined by the link mapping a(Pt, PI-I, ... ,Po) = (PI-I, PI-2, ... ,Po, PI) and iIlustrated in Figure 6.52c, and a permuted shuffie defined by the link mapping a(PI,PI-I, ... ,Po) = (PI-I ,PI-2, .. . ,Po,!it) and illustrated in Figure 6.52d. As a result, when viewed this way, the normal shuffie can be seen to be a sub set of the merged shuffie.
In the study of optical interconnections, it has become useful to define two types ofinterconnections based on the dimensionality ofthe interconnections. Interconnections can be c1assified as being either two-dimensional or three-dimensional. All of the links within a 2-D interconnection scheme lie within a plane, while the links in a 3-D interconnection scheme are not constrained to lie within a single plane. Another type of interconnection will be defined within this text, and it will be called a parallel two-dimensional interconnection. Associated links within a parallel 2-D interconnection scheme lie within a plane, but there are many parallel 2-D interconnection planes sharing the same hardware. A common way to produce a parallel 2-D interconnection from a 2-D interconnection requires one to implement a 2-D interconnection from row I in node-stage x to row I in node-stage y, and then replicate the interconnections between row 2 in node-stage x and row 2 in node-stage y, etc. Thus, the links in a parallel 2-D interconnection only provide connectivity between nodes in row i of one node-stage x and nodes in row i of node-stage y for all values of i. As a result, the parallel sets of 2-D interconnections permit connectivity between nodes that are arranged in planes, even though the connectivity is only between corresponding rows.
There are quite a few similarities between a parallel 2-D interconnection and a 3-D interconnection, because both provide connections between planar arrays of nodes in consecutive node-stages. However, the primary difference between a parallel 2-D interconnection and a 3-D interconnection is that the parallel 2-D interconnection provides a large number of identical planar interconnections between rows (or columns) of node-stages, while the 3-D interconnection provides connections that are not restricted to lie in a plane or provides plan ar interconnections that are not identical from one plane to the next. A more detailed discussion of 2-D interconnections, parallel 2-D
Free-Space Digital Optics 413
Table 6.3. Classification of Optical Interconnections
I. Node connectivity provided by links 2. Interconnection scheme cost (number of optical components) 3. Number of possible connections (space-bandwidth product) 4. Fan-out rcquirements 5. Power loss 6. Fan-in requirements 7. Number of distinct beam-steering operations 8. Space-variance of interconnections
• Space-invariant • Space-variant • Nonsymmetrie • Symmetrie about a point • Symmetrie about an axis
9. Interconnections between nodes or between logic gates 10. Dimensionality of interconnections
• 2-D • Parallel 2-D
• 3-D
interconnections, and 3-D interconnections will be glven In the following section.
In summary, classification of the interconnecting links within photonic switching networks will use several classification criteria. These various criteria are outlined in Table 6.3. (Note: Depending on the structure of the network, only some of these classification categories may be applicable. It will be seen that the categories are most useful when applied to multistage interconnection networks.)
6.3.2.2. Comparis(Jns between 2-D and 3-D Interconnections in Free-Space Photonie Switching Systems
As mentioned in the previous section, interconnections can be c1assified as being either 2-D or 3-D. The links within a 2-D interconnection scheme lie within a plane, while the links in a 3-D interconnection scheme are not constrained to lie within a single plane. The arrangement of the nodes within anode-stage is closely coupled to the arrangement of the links within a linkstage. If the links are arranged in 2-D fashion, then the nodes in a nodestage will be arranged in linear (1-0 vector) fashion (Figure 6.53a). If the links are arranged in 3-D fashion, then the nodes in anode-stage will be arranged in planar (2-D array) fashion (Figure 6.53b), wh ich allows the interconnections between node-stages to take advantage of 3-D space. Oftentimes, identical2-D interconnections will be implemented in parallel to interconnect nodes that are arranged in planar fashion (Figure 6.53c). These
414 Chapter 6
(a) (b)
(c) (d )
Figure 6.53. Classification of free-space interconnections. (a) 2-D intereonneetions; (b) 3-D intereonneetions; (e) parallel 2-D interconneetions; (d) 3-D intereonneetions with 2-D slices.
types ofinterconnections are still 2-D interconnections, because the interconnections form partitionably slices, and a single slice of interconnections will always lie in a plane and will connect a vector of nodes in one node-stage to a vector of nodes in the next node-stage. However, the parallelism of these interconnection schemes makes it very tempting to call these interconnections 3-D interconnections. As a resuIt, to distinguish these types of connections from other types of connections, they will be called parallel 2-D interconnections. Parallel 2-D interconnections should not be confused with interconnections that have parallel slices of 2-D connections that vary from slice to slice (Figure 6.53d). If the connections within the slices are different, then the interconnection must still be c1assified as a 3-D interconnection. (Note: The reason for differentiating between parallel 2-D interconnections and 3-D interconnections should become apparent when some example networks are presented. In general, parallel 2-D interconnections can use the same optical hardware that is used for a similar 2-D interconnection, except the hardware is shared by all of the slices. 3-D interconnections will typically require more complicated hardware than 2-D interconnections and parallel 2-D interconnections.)
Network implementations that are constructed using 2-D interconnecti on schemes will be called "2-D implementations of the network topology" or "2-D networks," while networks that are constructed using 3-D interconnection schemes will be called "3-D implementations of the network topology" or "3-D networks." Within this text, network implementations that
Free-Space Digital Optics 415
are constructed using parallel 2-D interconnection schemes will be called "parallel 2-D implementations of the network topology" or "parallel 2-D networks." There is, however, so me disagreement over this terminology within the literature, because some authors have described networks with 2-D interconnection arrangements (and I-D node arrangements) as I-D networks, while networks with 3-D interconnection arrangements (and 2-D node arrangements) have sometimes been called 2-D networks. Although this can lead to some ambiguous terminology, the meaning of the terms should become apparent from the network descriptions within the literature. In this text, the former terminology will be used.
In the mathematical study of network theory, the spatial arrangement of the nodes is relatively unimportant, because the primary focus is on the set of nodes required by the network, the associated connections between the nodes, and the functionality of the nodes. Thus, depending on the spatial arrangement of the nodes, a given network topology can be implemented as either a 2-D network or a 3-D network provided that the node connectivity is maintained. The reader can visualize that this is indeed the case by imagining the nodes in a 2-D network to be wooden blocks arranged on a table with elastic bands stretched between them defining the interconnections. The wo oden blocks in a particular stage can easily be stacked to form a 2-D network, and the elastic bands would merely stretch to provide the same connectivity between the blocks. Since the network connectivity is not altered, the second network is topologically equivalent to the first. Hence, the terms "2-D network" and "3-D network" are probably misnomers-a more accurate description would be provided by the terms "2-D implementation of a network topology" and "3-D implementation of a network topology." Nevertheless, for the sake of brevity, the terms "2-D network" and "3-D network" will be used within this text. From the wooden block analogy above, it should be clear that all 2-D implement at ions of networks can be transformed into 3-D implementations of networks by rearranging the spatial location of the nodes. A similar argument can be used to show that all 3-D implementations of networks can be transformed into 2-D implementations.
Active research is rapidly defining many new 3-D networks that are fairly weIl suited for optics. There are two general approach es that researchers can use to develop 3-D networks. The first approach requires the researcher to modify the 2-D implementations of known network topologies using a folding or stacking technique similar to the stacking of wo oden blocks described above. This technique has been used on many networks (such as the omega(51, 52) network and the q-shuffie(53) network) to produce many very interesting optical implementations that may prove to be very powerful in future systems. (54 59) The second approach that researchers can use to create a 3-D network is to define an entirely new network topology
416 Chapter 6
whose interconnections are developed with the constraints of optics in mind. The resulting topology may produce very irregular interconnections if it is transformed into a 2-D implementation, and it may not even be topologically equivalent to any of the common topologies defined for 2-D network im plementations. However, the resulting 3-D implementation will be guaranteed to have interconnections that are suited for optics.
Not all ofthe 3-D optical implementations that have been proposed can be easily and efficiently implemented in optics. For example, the inefficient utilization of gates and optical power due to masking and the inefficient utilization of the available space-bandwidth product are two common problems that can result when the resulting interconnections are not well suited for optical implementation. In the work on holographic interconnections by Jenkins et al.,(60) the first problem (inefficient utilization of gates and power) was found predominantly in systems using space-invariant interconnections, while the second problem (inefficient utilization of space-bandwidth product) was found predominantly in systems using space-variant interconnections. A detailed analysis of most of the 3-D networks that have been proposed will show that they all suffer from these problems to some degree. Some of these problems will be analyzed in the example networks presented in the following section.
Although a 3-D interconnection scheme may often be more difficult (and more expensive) to implement than a comparable 2-D interconnection scheme, there are several benefits associated with 3-D interconnections that may justify the additional cost that is often associated with 3-D interconnecti on schemes. For example, many free-space photonic switching designs use sphericallenses to image the outputs of nodes in one stage onto the inputs of nodes in the following stage. Since the c1ear field of a spherical lens is normallya spherical region on the object (image) plane, the available spacebandwidth product of the spherical lens is utilized most efficiently if the nodes are arranged throughout the spherical region on the object (image) plane. Thus, the linear arrangement ofnodes required for a 2-D interconnection scheme will was te most of the space-bandwidth product of the spherical lens, while the planar arrangement of nodes required for a 3-D interconnection scheme will use most of the space-bandwidth product of the spherical lens. Researchers working on photonic switching systems have also found that the use of 3-D interconnection schemes is justified by the fact that most optical logic gates are currently implemented in matrix fashion on planar substrates. As a result, the planar arrangement of nodes that is required for 3-D interconnections is ideally matched to the arrangement of the optical logic gates. Another factor that has led to the use of 3-D interconnections in photonic switching systems is the fact that many 3-D networks offer more dense1y packed link interconnections between consecutive node-stages, so they can also offer more connectivity between node-stages. As previously
Free-Space Digital Optics 417
mentioned, the addition of more links to a network can help decrease the network's blocking probability and can increase the network's tolerance to faults. In addition, the increased connectivity that is found in many 3-D networks can also decrease the amount ofhardware (number ofnode-stages) required for full connectivity.
As an example, the 3-D network shown using a graphicallink mapping in Figure 6.54a has N = 64 inputs and M = 64 outputs. The nodes within the 3-D network are 4-input, 4-output nodes, so there are a total of 64/4 =
16 nodes required in each node-stage. The N = 64 input links to the network are arranged in a square array of size ./N by ./N, which forms an 8-by-8 array in Figure 6.54a. The four input links attached to each node form a two-by-two array of input ports on the input side of the node, and the four output links attached to each node form a two-by-two array of output ports on the output side of the node (which is not shown in Figure 6.54a). As a result, the 16 nodes in each node-stage can be arranged in a square 4-by-4 array of nodes. Each of the links in the 8-by-8 array of links that leave any node-stage of this 3-D network can be represented by an ordered pair of binary addresses [(r2, rl, ro), (C2, CI. co)], where the row number of the link is identified by the binary number (r2, rl, ro) and the column number of the link is identified by the binary number (C2, CI, co). The link mapping a for this network can then be written as
The link mapping described by the equation above is actually a shufHe permutation that has been simultaneously im~emented on the row numbers and the column numbers. Since there are .j N links in any row (column), the network requires log2(.jN) = 3 node-stages to provide full connectivity. This could have been predicted, because the 3-D network in Figure 6.54a is actually a q-shufHe network. This can be seen by transforming the 3-D implementation in Figure 6.54a into the topologically equivalent 2-D implementation shown in Figure 6.54b. (Note: Mathematical descriptions of these 3-0-to-2-0 transformations are found in the references.(61») The q-shufHe network in Figure 6.54b is very similar to the network that was described in Figure 6.7c; however, the q-shufHe network in Figure 6.54b has N = 64, q = 4, and r = N / q = 16. In addition, the q-shufHe network in Figure 6.54b has its links relabe1ed using a set of logical addresses (instead of the physical addresses that are normally associated with the links). For convenience, the link addresses for the graphicallink mapping shown in Figure 6.54b have been placed inside the switching nodes that receive the links instead of being placed on the links themse1ves, and the addresses of the nodes have been eliminated.
(b)
o 2 I' 18
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Figure 6.54. (a) Graphical link mapping of 3-D network with N = 64 inputs and M = 64 outputs. (b) Graphicallink mapping of 2-D q-shuffle network with N = 64 inputs and M = 64 outputs (q = 4).
Free-Space Digital Optics 419
It was shown that a fully connected q-shuffie network requires logq (N) node-stages with r nodes in each node-stage. For the network in Figure 6.54b, log4 (N) = log2 (N)/log2 (4) = log2 (N)/2 = log2 (jN) = 4 nodestages are required for full connectivity (which is the same number of nodestages needed for full connectivity in the 3-D network of Figure 6.54a). Given that the two networks in Figure 6.54 are topologically equivalent, the reader should have expected this result.
The next section will investigate several 2-D and 3-D interconnection schemes that have been described in the literature. Most of the 3-D interconnection schemes can be converted from the 3-D domain into the 2-D domain in a fashion very similar to the above example. Oftentimes, this can simplify the analysis of the interconnection scheme. As a result, this technique will be used quite extensively within the next section.
Rather than describe several examples of free-space photonic interconnection schemes, the interconnection schemes will be described in the next section within the context of their associated switching networks. This will be more instructive, since the interconnection scheme and the topology used for a particular switching network are very closely related.
6.4. Examples of Free-Space Photonic Switching System Architectures
The nodes and the links within a free-space photonie switching system are the fundamental building blocks of the system. Now that some of the nodes and some ofthe link-stage interconnections that are used in free-space photonic switching systems have been discussed, these two basic building blocks will be joined together to form some example photonie switching systems. Many different photonic switching systems have been proposed in the literature, and a few experimental prototypes have begun to appear in laboratories. Only a small sub set of these systems will be described in this text.
Although photonic switching systems are still in their infancy, it is becoming apparent that the design techniques used for free-space photonic switching systems tend to be very different from those used for electronic switching systems. In electronic systems, a designer will typically determine which logic gates to use and then route appropriate interconnections between those logic gates to provide the desired functionality. However, in photonic systems, a designer will typically determine which interconnection scheme (optical hardware) to use and then try to place appropriate logic gates between the interconnections to provide the desired functionality. (Note:
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These design techniques may change in time, but they have been used quite extensively in early photonic switch designs.) As a result, the design constraints and design goals for photonic switching networks are often very different from those in conventional e1ectronic network designs. For example, free-space optical implementations cannot provide arbitrary interconnections as easily as the wires routed in electronic implementations. Thus, optical implementations are often constrained to use more space-invariant interconnections between nodes, and they are also constrained to use more space-invariant interconnections between the logic gates within anode. Although the types of interconnections offered by free-space optics are somewhat limited, the density and the bandwidth of interconnections offered by free-space optics will undoubtedly exceed the capabilities of conventional electronics (which is limited by the number ofpin-outs on a chip, the number of circuit board connector pins, the density of connections permitted on conventional backplanes, and the relatively low bandwidth of standard interconnections in circuit boards and backplanes). As a result of these differences, the network topologies that have been proposed for electronic networks must often be modified to capitalize on the unique characteristics of photonics. If appropriate modifications can be made to the electronic designs, the resulting optical designs may yield switching networks with many advantages that are not found in electronic implementations. Many of these modified network topologies that can be implemented in the optical domain will be detailed below.
It is not possible to describe within the confines of this text all of the free-space photonic switching architectures that have been proposed, because the photonic switching research field has been very active in recent years. Nevertheless, a small sampie of the wide range of networks will be discussed to illustrate the many different types of interconnection schemes and network topologies that have been studied. The sampling of free-space photonic networks that will be discussed inc1udes:
I. Time-shared bus networks • Space time-slot interchanger (STSI) network
2. Crossbar networks • Splitter / combiner single-stage crossbar (matrix multiplier) • Self-routing single-stage cross bar • Feedforward multistage crossbar
3. q-Shuffie networks • 2-D implementation of 2-shuffie network • Parallel 2-D implementation of 2-shuffie network • 3-D implementation of 4-shuffie network • 3-D implementation of folded 2-shuffie network
Free-Space Digital Optics 421
4. Crossover networks • 2-D implementation and parallel 2-D implementation of crossover
network for 2-modules • 2-D implementation and parallel 2-D implementation of crossover
network for (2, I, I) nodes • 2-D implementation and parallel 2-D implementation of crossover
network for (2, 2, 2) nodes 5. Other networks
• 3-D implementation of trimmed inverse augmented data manipulator (TIADM)
• Parallel 2-D implementation of Batcher~Banyan sorting network
Some of the networks in the above list have been described in great detail in the literature (covering even the node-types to be used in the network), while other networks have only had a few of their architectural parameters specified (such as their link connectivity). As a result, the amount of coverage devoted to each of these networks will vary.
The reader should keep in mind that each of the networks that will be studied has its own set of advantages and disadvantages. As a result, it is not possible to make general statements such as "network A is better than network B." The relative value of each network is entirely dependent on the particular application in which the network is to be used.
6.4. t. Time-Shared Bus Networks
The simplest type of network is probably the time-shared bus dass of networks. These types of networks have a single shared resource (the bus) over which all data must be passed if any input port needs to be connected to an output port. Thus, every input port must have access to the bus, and every output port must also have access to the bus. In the electronic domain, a tristate buffer gate (whose output is equal to its input when enabled, and whose output is an electrical high impedance when disabled) can be used to control each of the input ports, and a simple AND gate can be used to regenerate the signals on the bus at each of the output ports when the output is enabled (Figure 6.55). As a result, a time-shared bus network with N input ports and N output ports requires only 2N logic gates, so it is said to have O(N) complexity. Typically, each dient on the bus is assigned one input port and one output port, as shown in Figure 6.55.
Since two items of data cannot be transmitted across the shared bus simultaneously, the multiple input ports must take turns when attempting to use the bus, i.e., the input ports must "time-share" the bus. If da ta are passed through the time-shared bus without any form of data speedup, then the effective blocking probability of the time-shared bus is very high. In fact,
422
enable Input -
bu
enable input -
• • • Figure 6.55. Time-shared bus.
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in a bus network with N input ports, where nearly 100% of the input ports are attempting to transmit data, the blocking probability will be given by (N - l) j N, which is very elose to 1 for large values of N. Thus, although it requires very low hardware complexity, the time-shared bus network has very high blocking probabilities.
Nevertheless, many ways have been found to implement a time-shared bus and circumvent the high blocking probabilities. One approach proposed for photonic switching applications will be described below. This approach employs an effective speedup of the data transmission over the bus using the spatial parallelism offered by free-space photonics.
Space Time-Slot Interchanger (STSI) Network
The STSI is a bus structure that exploits the parallelism of optics to convert a simple time-shared bus network into a nonblocking architecture. (62)
The conversion from a blocking network to a nonblocking network is accomplished by speeding up the rate at which the data flow across the bus. The speedup is not achieved using temporal multiplexing; instead, it uses a technique known as spatial multiplexing, in wh ich a large group of bits are routed through the network in parallel. The STSI can perform both spatial switching and temporal switching of input data streams; however, only the spatial switching application will be described in this section.
Figure 6.56a illustrates the fundamental hardware components within the STSI: the input shift register, the input storage array, the encoder array, the distributor optics, the decoder array, the output storage array, and the output shift register. The da ta to be routed through the network are assumed to be packet data of length L bits, and all of the packets are assumed to be bit and frame synchronized as they enter the switch. (Note: Synchronization can be achieved using elastic stores that operate on the data before it arrives
Free-Space Digital Optics 423
at the STSI.) N input fibers carry the incoming data to the input shift register. The input shift register can be implemented as an array of S-SEEDs with each row of the S-SEED array associated with one of the N input fibers. As a result, there are N rows required in the input shift register's S-SEED array. Each row of the input shift register must store an entire packet of data (L bits), but due to the master- slave flip-flop arrangement found in the shift register, the length of each row must be equal to 2L S-SEEDs. The optical power emitted from the end of each input fiber is imaged onto the first SSEED within the input shift register row associated with that fiber. Once the data bit is stored in the S-SEED, a dock laser is asserted which illuminates the first column and all other odd-numbered columns within the input shift register S-SEED array. This directs the bits stored in the odd-numbered columns of the S-SEED array toward the reflection hologram between the shift register and the input storage array. The reflection hologram redirects some of the optical power from the odd-numbered rows to the even-numbered rows, where the data from the first S-SEED is then latched by the second S-SEED. (Note: the first S-SEED acts as a master flip-flop and the second S-SEED acts as a slave flip-flop in a master-slave pair.) After the data bit is stored in the second S-SEED, a dock laser is asserted which
global I ... , <lock
·SEED
elKlronlc
~~VV.~lribYV~ inpul ,hin register
Inpul IO~R'
.rny
rncoder optics decoder output output array IIrny storage shln
.~y re&ister
~ .... m •• '"'
Figure 6.56. (a) STSI network.
424
inpUI usen. (robors)
input plane
Fourier plano
/
erd , "' i ~~;,~ ~ b)'
Chapter 6
'ote: erd = oleetrie neid distribution
Figure 6.56. (b) Subsystems in optical ALOHA hardware.
illuminates the second column and all other even-numbered columns within the input shift register S-SEED array. This directs the bits stored in the evennumbered columns of the S-SEED array toward the reflection hologram, which redirects so me of the optical power from the even-numbered rows to the odd-numbered rows, where the data from the second S-SEED is then latched by the third S-SEED. At the same time, the second bit from the input fiber can be latched in the first S-SEED within the row. Thus, all L of the bits in the data packet of a particular fiber can be shifted across their respective row. As a result, a serial-to-parallel conversion of the fiber's data occurs within the input shift register. The instant that all L data bits from the packets on each of the N fibers have been stored in their row, aglobai laser clock is directed at the entire input shift register S-SEED array, directing all of the bits toward the reflection hologram in parallel. However, if the efficiency of the reflection hologram is less than 100°/." then some of the optical power will pass through the hologram and arrive at the input storage array, loading all of the N packets into the input storage array (another S-SEED array). The input shift register can then immediately begin loading the next set of packets, while the set of packets in the input storage
Free-Space Digital Optics 425
array is being transmitted across the STSI distributor, which is actually a time-shared bus. The packets stored in the input storage array are enabled onto the bus (the distributor) in time-sequential fashion, with the first row's packet going first, followed by the second row's packet, etc. Since an entire row of bits is routed through the distributor in parallel, an effective speedup of the data is achieved using space multiplexing. Control of the packet f10w is achieved using the encoder array, which is an SLM that permits one row of bits through at a time. The electronically controlled tristate optical device(61) (wh ich is based on the S-SEED design) can be used for this SLM function. The free-space optical components in the distributor are a set of cylindricallenses that produce a magnified version of the Fourier transform of the encoder array in the vertical dimension, while performing I-to-I imaging ofthe encoder array in the horizontal dimension. The distributor consists of three subsystems: the Fourier transformation subsystem, the vertical magnification subsystem, and the horizontal refocusing subsystem (as seen in Figure 6.56b). The Fourier transformation subsystem is a single positive cylindricallens LI. It produces the Fourier transform of the input image in its focal plane. The Fourier transform image is centered at the optical axis and is stretched in the vertical direction. The vertical magnification subsystem consists of a lens L 2 wh ich provides additional vertical magnification to the Fourier transform image created by the Fourier transformation lens. The horizontal refocusing subsystem employs a positive cylindrical lens L, which is rotated 90" from the orientation of the other two lenses. This lens controls divergence and maintains the horizontal size of beams in the switch. The distributor distributes the optical power passing through one pixel of the encoder array into an output electric field pattern at the decoder array that illuminates an entire column of pixels in the decoder array. The decoder array must be controlled by a centralized controller wh ich has access to the routing information for the packets. The decoder array (which is an SLM identical to the one used for the encoder array) is enabled to permit the distributed light to pass through to the output storage array (an S-SEED array) in only the rows to which that particular packet was destined. As a result, a packet from any row in the input storage array can be switched through the distributor to any row in the output storage array. Broadcasting is also possible in the STSI, because a single packet can be switched to multiple rows in the output storage array by enabling more than one row in the decoder array. Once all of the packets have been passed across the bus (the distributor) to the output storage array, they can be transferred in parallel to the output shift register by applying a global dock to the output storage array. The data is then shifted out of the output shift register into a fiber (one bit at a time) in a fashion very similar to the approach used for loading the input shift register.
If the bit period of the da ta on the input fiber and output fiber is given
426 Chapter 6
by Tbit , then the amount of time required to shift an entire set of L-bit packets into the input shift register is given by LTbit. All N of the packets in the input storage array must be transferred across the bus (the distributor) to the output storage array within this time interval, or some of the packets in the input storage array will be lost. Thus, if the transfer of a single packet from the input storage array to the output storage array can be accomplished in a time given by Ttrans. then it follows that
LTbit > NTtrans
and it also follows that
Unfortunately, Ttrans is typically much longer than Tbit. This is a direct result of the fan-out in the distributor. Assuming all of the S-SEEDs in the STSI are driven by the same amount of dock power and assuming no loss of optical power in the system, then it can be shown that the switching time of an S-SEED at the receiving end is directly proportional to the fan-out F from the transmitting S-SEED. In other words, Tswitch = Fk, where k is the constant of proportionality. The fan-out from the S-SEEDs in the input shift register is effectively 2 (driving both the next bit in the shift register and a pixel in the input storage array), while the fan-out from the S-SEEDs in the encoder is N (driving a pixel in each of the N rows of the decoder). Thus, Tbit = 2k, while Ttrans = Nk, so Tbit/Ttrans = 2/ N. Substituting this into the equation above yields
As a result, it becomes apparent that the effective speedup in the distributor that was accomplished using space multiplexing techniques was not achieved without paying a price. The price is found in the increased hardware required to support rows of length greater than N 2/2. Since there are N rows of length greater than N 2/2, the resulting STSI network is said to have O(N 3 )
complexity. Thus, the conversion of the blocking bus network [which had O(N) complexity] into a nonblocking network required that the network complexity be increased to O(N3 ). This increase should have been expected, given the fundamental trade-off between blocking probability and hardware that was described in an earlier section.
The calculations performed above indicate one of the disadvantages found in the STSI network, and for that matter, in all networks that use large amounts of fan-out. Typically, the switching time of the detecting
Free-Space Digital Optics 427
device is greatly increased whenever large amounts of fan-out are used, because only a limited amount of optical power will ultimately be directed at the detecting device. As a result, large fan-outs should typically be avoided in a network design if at all possible.
Classification of the STSI network using the node and link classification schemes is somewhat difficult, because the STSI is a single-stage network. An input node can be defined as the group of S-SEEDs across any row consisting ofthe input shift register, the input storage array, and the encoder. An output node can be defined as the group of S-SEEDs across any row consisting of the decoder, the output storage array, and the output shift register. Thus, each node accepts a single input and produces a single output, although serial-to-parallel and parallel-to-serial conversions are performed within the nodes. The cost of a single node is 3(N2)j2 S-SEEDs that are operating as optical logic gates (S-R latches). The source of the control is an SLM, and the hardware calculating the control is external to the node. Nodes are partitioned over three planes, and they are arranged in a I-D vector. Although the signals appear to be routed in transmissive fashion within Figure 6.56, this is a simplified illustration. The signal routing in SSEEDs is actually performed using reflective devices. The links within the STSI network can be described as a simple fan-out interconnection between logic gates. The connections are space-variant, and since the connections between a pixel on the encoder array and a column in the decoder array will lie in a plane, the connections can be classified as 2-D interconnections. However, a large number of these 2-D interconnections are passed through the distributor in parallel, so the connections would actually be classified as parallel 2-D interconnections.
6.4.2. Crossbar Networks
The time-shared bus described in the previous sections is an interesting network topology, because its high blocking probability and low cost place it at one end of the topological spectrum. At the other end of the topological spectrum is the crossbar network, which has a blocking probability of zero and very high system costs. The cross bar network is an interesting interconnection network that is often used as a benchmark for comparison, because it is a nonblocking network with a very simple and straightforward routing algorithm. However, as a result of the aforementioned blocking probability jhardware trade-off, the cross bar network requires a relatively large number of logic gates for switching elements and also requires a relatively large number of links to interconnect those switching elements. The resulting hardware costs in a crossbar network are fairly high, which precludes its use in many system applications.
However, two developments in the field of free-space digital optics may
428 Chapter 6
permit a cost-effective implementation of a crossbar network in spite of the necessary hardware requirements. First, current research on optical logic gates (such as S-SEEDs and OLE devices) indicates that the density of devices on a single substrate may be very high. As a result, the cross bar network's requirement for many logic gates may not be as problematic as first suspected. Second, research in the field of imaging for digital optics has shown that large space-bandwidth products are achievable with relatively simple imaging systems, so researchers mayaIso be able to satisfy the crossbar network's requirement for many connections between logic gates.
The basic crossbar network topology is shown in Figure 6.57 as it might have been implemented in electronics. The particular example of Figure 6.57 illustrates a crossbar network with N = 4 inputs (along the left edge) and N = 4 outputs (along the top edge). The network itself is comprised of a grid of links with N = 4 rows and N = 4 columns, and at the intersection of each row link and column link there is a switch-point which can be opened (isolating the row link from the column link) or closed (connecting the input associated with that row link to the output associated with that column link).(64) As a result, there are N 2 = 16 switch-points required in the crossbar network, so the network is said to have O(N2) complexity. Broadcasting from one input to several outputs is possible in the cross bar network, because more than one switch-point can be closed in the row associated with the broadcasted input. However, it is not possible to simultaneously route more than one input to a given output. As a result, the network controller must guarantee that no more than one switch-point in a column is ever closed. In Figure 6.57, a path is shown (in bold) connecting input 2 to output 3.
N=4 inputs
2
M=4 outputs
3
Figure 6.57 Basic crossbar network topology.
4
Free-Space Digital Optics
=4 inputs
2
3
4
2
M=4 outputs
3
Figure 6.58. Alternative crossbar network topology.
429
4
Another version of the crossbar network is shown in Figure 6.58.(6567) This version is structurally very similar to the network in Figure 6.57, and as a result it has many of the operational properties found in the network of Figure 6.57. For example, the version in Figure 6.58 is a nonblocking network with broadcasting capabilities. In addition, an N-input, N-output network still requires N 2 switching elements. However, the switching elements in the network of Figure 6.58 can be implemented using (2, 2, 2) nodes. The upper broadcast state and lower broadcast state are used only for broadcast connections. For point-to-point connections, all ofthe (2,2,2) nodes in the row associated with the input and in the column associated with the output are set to the cross state except for the cross-point at the intersection of that row and column. The node at that intersection must be set to the straight state. As an example, a path connecting input 2 to output 3 is shown in bold in Figure 6.58. Researchers in the field of photonic switching have already made several proposals for optical implementations of crossbar networks that resemble both of these arrangements.
6.4.2.1. Splitter / Combiner Single-Stage Crossbar (Matrix Multiplier)
Several optical implementations of the crossbar network in Figure 6.57 have been described using SLMs or optical logic gates operating as AND gates in pi ace of the switch-points.(68 70) However, in order to accommodate the unique capabilities of optics, the network in Figure 6.57 had to be slightly modified. The modifications convert each of the horizontal signal traces in Figure 6.57 into a diverging beam of light that effectively splits the signal.
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Each ofthe vertical signal traces in Figure 6.57 is converted into a converging beam of light that effectively combines a group of signals. These modifications take advantage of the beam expansion and beam combination techniques used in optical matrix-vector multipliers to provide the large degree of connectivity required for a crossbar network, and they rely on the density of the SLMs or the AND gate arrays to provide the large number of switchpoints required for a crossbar network.
A typical optical setup used to implement the splitter-combiner singlestage crossbar network of Figure 6.57 is shown in Figure 6.59, where a set of N = 4 input fibers are arranged in a horizontal li ne and a set of N = 4 output fibers are arranged in a vertical line. The output from each input fiber is fanned out to each of the N pixels in a column of the SLM (or AND gate array), and then the outputs from the N pixels in a row of the SLM (or AND gate array) are fanned in to a single output fiber. Thus, if a single pixel in the SLM is made transparent (or if a single AND gate in the AND gate array is sent a logic "1" control signal), then the light signal (representing a binary data stream) from a single input fiber will be routed through that pixel to a single output fiber. As a result, a path has been established between the input fiber and the output fiber.
Unfortunately, the optical implementation of the splitter--combiner crossbar would encounter some fundamental problems if an attempt were made to construct a very large crossbar network. First, the network is fairly costly, requiring an N x N array of pixels in the SLM array to switch between N input ports and N output ports. It also has the inherent problem that signal power is fanned out to N pixels in the SLM or AND gate
4 _ _ _ oM
3 () 2
2 () 3
() 4
~ M~ input fibers output fibers
patial light modulator or
A D gate array
Figure 6.59. Splitter-combiner single-stage crossbar network topology.
Free-Space Digital Optics 431
array, but it is only passed through one of those pixels (for a point-to-point connection). (Note: This is similar to the fan-out problems that plagued the STSI design.) As a result, the power arriving at the active SLM pixel, ignoring any loss in the optics, is at best 1/ N times the power emanating from the input fiber. The power arriving at the output fiber will most likely be attenuated even more by the beam-combination hardware, and more attenuation will occur as a result of coupling losses in the output fiber. This division of power leads to a decrease in signal-to-noise ratio, which can lead to increased bit error rates in a large crossbar network. In addition, finite contrast ratios on SLMs or opticallogic gates can make the task of detecting a single active signal in the noise of many inactive signals at a unitary output fiber fairly difficult. These sources of power loss will also decrease the power that ultimately arrives at the output detectors. As a result, the data rates that can be passed through the system may be somewhat limited.
Nevertheless, the splitter-combiner crossbar network has the advantage that it is a nonblocking network with very simple routing algorithms. It can be classified as having simple I-input, I-output enabled gates as nodes, and each enable gate either passes the input or blocks the input. The source of the control is an SLM (whether it is used between the fibers or used to control the enable beams that must be directed at the logic AND gates). The hardware calculating the control is external to the nodes. The nodes are single plane nodes arranged in a 2-D matrix, and they are shown as transmissive elements in Figure 6.59. The links within the crossbar network can be described as a simple fan-out interconnection between logic gates. The connections between the input fibers and the SLM modulator are spaceinvariant, but those between the SLM and the output fibers are space variant. The connections can be classified as parallel 2-D interconnections.
6.4.2.2. Self-Routing Single-Stage Crossbar
Several free-space optical implementations of the crossbar network in Figure 6.58 have been proposed. These proposals include the self-routing single-stage crossbar network (wh ich will be described in this section) and the free-space multistage crossbar network (which will be described in the next section).
One of the potential applications for free-space optics is in providing chip-to-chip interconnections on an electronic circuit board.(?!) A system of this type might have gallium arsenide (GaAs) modulators placed on a silicon (Si) substrate (the source chip) with standard logic implemented in the Si. The receiver chip has Si or GaAs detectors placed on a Si substrate, and the Si substrate again has standard logic implemented on it. Simple one-to-one imaging optics can be used between the source chip and the receiver chip, so the system could capitalize on both the bandwidth and the parallelism of
432 Chapter 6
free-space optics for the chip-to-chip interconnections. One of the potential barriers to a system of this type is the fact that current proposals only permit the optical hardware to provide point-to-point connectivity between adjacent chips on the circuit board. As a result, the outputs from a source chip must all be routed to receiver chips that are adjacent to the source chip, and they cannot be routed to other receiver chips elsewhere on the circuit board. This constraint may be a severe limitation for many network topologies, but the self-routing crossbar network is a network topology that can be implemented in spite of this interconnection constraint.(72)
The self-routing crossbar network is a self-routing packet switch constructed with high-speed electronic logic on chips that are interconnected to their nearest neighbors by simple free-space optics performing one-to-one imaging. It can be derived very easily from a standard circuit-switched crossbar network that employs centralized contro!. In fact, most ofthe effort involved in converting the standard crossbar into a self-routing packet switch is related to the creation of a format for the packet he ader. In a self-routing packet switch, every packet must have a header prepended to its data before the data is injected into the switching fabric. The he ader is typically a short string of bits that identifies the output port to wh ich the packet is destined. The header mayaIso contain synchronization information to identify the boundaries of the packet. Since the header is passed through the switching fabric before the data that is stored in the packet, the switching elements can store the header information and set themselves up in the appropriate configurations to route the data to its correct output before the data even enters the switching fabric. The raw data (also known as the payload) carries the user data through the network. This payload can carry encoded voice trafik, encoded video trafiic, or binary data being passed between computers.
A convenient format for the packet header in the self-routing crossbar packet switch is shown within the single packet of Figure 6.60. Assuming the self-routing crossbar packet switch has N input ports and M output ports, the packet header would require a total of M + 3 bits. The first M bits in the header are called the routing bits, and they will be described in more detail in the next paragraph. The last three bits in the header are called the frame synchronization bits. The frame synchronization bits are required in the self-routing crossbar, because the latency through the network can be different for each of the packets (depending on the path that is taken), and the hardware at each of the output ports needs information indicating where the boundaries of the packets are tempo rally located. The frame synchronization bits uniquely identify the start of the raw data within the packet by using a unique bit pattern. If we assurne that aglobai reset pulse is sent into the network whenever packet transmission begins at the edges of the network, then one pattern that can provide frame synchronization is a sequence of three bits, where the first bit is a logic "0" and the remaining two bits are
Free-Space Digital Optics
M routing bits
3 frame sync bits
N+M- I c\earance bits
time
Figure 6.60. Convenient packet format for self-routing crossbar.
433
logic "I 's." Since only one bit will be set to a logic "1" in the preceding M routing bits of the header, the first time that the hardware sees a logic "0" followed by two logic "I 's" after the reset pulse, it will be able to identify these three bits as the frame synchronization bits. After these frame synchronization bits, the hardware can expect to receive the packet's raw data.
The first M bits in the packet header are the routing bits which identify the output port to wh ich the packet is destined. The routing bits within the header are labeled H 1 through HM . The ith bit in the sequence of M routing bits is labeled H M - 1- i, so the first bit in the sequence of M routing bits is H M , and the last bit in the sequence of M routing bits is H 1• If a particular packet is destined for output port y (which is located in column y), then bit Hy within the packet header must be set to a logic "1," while aB of the other bits within the packet header must be set to logic "O's." (Note: Only pointto-point connections are permitted within the switching fabric, so no more than a single bit within the packet header will ever need to be set to a logic "1. ") This particular format for the packet header is convenient, because it requires only a few logic gates within each of the switching elements to examine the header bits and set up the state of the two-by-two switches in the self-routing crossbar packet network. The logic required within each of the switching elements is shown in Figure 6.61. The data are routed from node to node in shift-register fashion, being clocked into the flip-flop in the node i + 1 at the same time that it is being clocked out of the flip-flop in node i. As a result, high-speed operation may require the clock lines to be carefully routed to account for any problems that might be caused by clock skew. This problem mayaiso be solved using optics to distribute the clock to all of the switching elements.
The operation ofthe logic in Figure 6.61 assurnes that all ofthe packets entering the switching fabric have been bit-aligned and frame-aligned by the
434
Load Reset Clock
Figure 6.61. Logic within anode of self-routing cross bar.
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top o Q output
bottom output
interfacing hardware at the input of the network. As a result, all of the packets must be buffered by the interfacing hardware, and they are all simultaneously sourced into the network with their first bits synchronized with respect to one another. The period during which a single set of packets are injected into the network will be called a packet time-slot, or a "packetslot." During the first bit period within a packet-slot, the global reset signal is enabled on all of the switching elements so that all of the switching elements are initially set to the cross state, i.e., the status register is loaded with a Iogic "0." If the clock signal that is routed to all of the switching elements has aperiod equal to the bit period, and if the clock signal is synchronized to the data streams, then the routing bits within each of the data packets are serially transmitted across a row of the cross bar in shiftregister fashion. After Mbit periods, all M of the routing bits within the packet from input port x are stored in the shift-register flip-flops across row x. At that point, the global load signal can be pulsed, forcing each of the M header bits to be stored in a status register. Due to the format of the he ader and the Ioading operation, routing bit Hy from input port x is always stored in the status register in row x, column y. As a result, if Hy is a Iogic "0," then it will force the two-by-two switching element in row x and column y to be set to the cross state (permitting data from the Ieft to flow horizontally to the right across the row and permitting data from above to flow vertically down the column). If H y is a Iogic "1," then it will force the two-by-two switching element in row x and column y to be set to the straight state
Free-Space Digital Optics 435
(forcing data from the left to be redirected to flow vertically down the column, and forcing data from above to be redirected to flow horizontally to the left across the row). Once the status registers have been loaded with the routing bits, the routing bits remain stored in the status register during the entire packet-slot. As a result, the frame synchronization bits (wh ich follow the routing bits) and the raw data from each of the packets will traverse the network to their required output port based on the routing bits that are stored in the status registers. The entire process can begin again with agIobaI reset for the next group of packets in the following packet-slot after all of the bits from the previous packet-slot have been passed through and cleared from the network. The clearing of the network may require a total of N + M - I bit periods for a packet that is routed from the topmost input port to the rightmost output port. As a result, a sequence of N + M - I bits (called the clearance bits) are typically added to the end of the packet after the raw data, as shown in Figure 6.60.
As an example of this routing operation, assurne we have constructed an N = 3 input, M = 4 output network as described above. This particular network is shown in Figure 6.62 with the boxes representing the two-by-two switching element logic contained in Figure 6.61. Assurne that in a particular packet-slot, three input packets have entered the network. The packet from input port # I is destined for output port # I, the packet from input port # 2 is destined for output port # 4, and the packet from input port # 3 is destined for output port # 2. The required M routing bits for each of these input ports are shown in Figure 6.62. After each of these M routing bits has been shifted across its row of the network and the routing bits have been loaded into the status registers, the network switch-points will be set up as shown in Figure 6.62, and the three desired paths will be automatically set
1IIII111
It I I I I I 1
I1II J 1I1
time
data 1I 10111010101
data 1 J J 0 101010111
data 1110 101 110101
N=3
2
M=4 outputs
Figure 6.62. Packet routing in self-routing crossbar.
3 4
436 Chapter 6
up for the frame synchronization bits, the raw data, and the clearance bits wh ich follow the routing bits receive inputs from the building block above itself.
If the set of nodes in a large self-routing cross bar network are partitioned into smaller subsets of nodes (calIed "building blocks"), then larger networks can be constructed by interconnecting these building blocks. Each building block would have to transmit outputs to the building block to the right, and it would also have to transmit outputs to the building block below itself. A simple building block containing a 4 x 4 array of nodes is shown in Figure 6.63.
The amount of logic shown for a single node in Figure 6.61 would consume a relatively small amount of surface area on a substrate, so many nodes would typically be integrated on a single substrate and packaged into a single chip to create a building block. However, the total amount of integration that is possible within a single chip is entirely dependent on the technology chosen for implementing the switching node. For example, we will assurne that a 32 x 32 array of nodes can be implemented on a single substrate (a fairly conservative estimate based on current technologies). As a result, each chip contains enough hardware to sink 64 inputs (32 from the left, and 32 from above), and each chip must also source 64 outputs (32 to the right, and 32 to the bottom).
Since all of the connections in the crossbar network occur between adjacent building blocks, the architecture can capitalize on the chip-to-chip
from building
block 10
the left
from building
block above
10 building
block below
10 building
block 10
the righl
Figure 6.63. Fundamental 4 x 4 building block in self-routing crossbar.
Free-Space Digital Optics 437
interconnection capabilities described earlier. In a free-space chip-to-chip implementation, each building block must have two 2-D detector arrays (each capable of receiving 32 inputs) and two 2-D modulator arrays (each capable of transmitting 32 outputs) associated with it. Thus, for the 32 x 32 building block, the 2-D detector arrays and the 2-D modulator arrays are probably best organized as 4 x 8 arrays of windows. Figure 6.64 illustrates the hardware that might be required for a single 32 x 32 building block if the crossbar network were implemented using free-space optical interconnections between adjacent building blocks. The building block, which might be packaged on a hybrid integrated circuit (HIC), would contain a single chip. One detector array receives data from the chip directly to the \eft of the chip of interest, and the other detector array receives data from the chip directly above the chip of interest. One of the modulator arrays transmits data to the chip directly to the right of the chip of interest, and the other modulator array transmits data to the chip directly below the chip of interest. As a result, it probably makes sense to physically locate these detectors and
J I
from building
block tO
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sign als
deteCtOT J I
32 elect
from building
block "r-: above 32 optical signals
1
detector
,. ~ 32 elect signals
32x32 J self-routing I modulator
crossbar 32 elect
signals ignals ,. ~ 32 elect
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modulator
to building
block below
1'32 optical signals
Figure 6.64. 32 x 32 switch/modulator/detector HIC.
J I
32 Ioptical ignals
to building
block to
the I1gbt
438 Chapter 6
modulators on the side of the chip to which they must communicate. Oue to the size of the optical hardware that is required to image between the modulators and detectors, it may not be possible to place all of these detectors and modulators on the same substrate as the switching elements. In order to spatially separate the modulators and detectors from the switch chip, they will probably need to be placed on separate substrates, but all five of the substrates can be connected by embedding them within an HIC. Use of an HIC may help guarantee high-bandwidth connections between the switch substrate and the modulator or detector substrates. As a result, optical hardware that connects a modulator to a detector is shown in Figure 6.65. A self-routing crossbar packet network that supports 64 input ports and 64 output ports would require a total of four of these HICs organized in a 2 x 2 array of HICs, as shown in Figure 6.66.
The resulting self-routing crossbar network still suffers from the in herent crossbar problem ofhigh cost. However, the advent ofhigh-density logic chips and the connectivity capabilities of free-space optics may be helpful in lowering the actual hardware costs associated with the network.
This network can be classified as having (2, 2, 2) switching nodes that are constructed as smart pixels with separated hardware. The source of the control is an externally located electronic processor that prepends the header information to each packet. The nodes are single plane nodes constructed using reflective optics, and the nodes are arranged in a 2-D matrix. The interconnection scheme requires simple one-to-one imaging, so it is a spaceinvariant interconnection between nodes. The connections can be classified as parallel 2-D interconnections.
L.c::::::t::tJ~quaner gnuing waveplate
c:=:t:4:=> lens c::t:===> len
modulator detector
HlC#l HlC#2
Figure 6.65. Optical hardware for modulator-to-detector connections.
Free-Space Digital Optics
=64 inputs
~ =deteetor
Dm = modulator
-
N=64 outputs
= 32x32 witch-chip
C===:::::JI = opticaJ interconnection hardware
Figure 6.66. 64 x 64 crossbar constructed from four 32 x 32 HICs.
6.4.2.3. Feeciforward Multistage Crossbar
439
All of the networks described so far have been single-stage interconnection networks. The feedforward crossbar network is a crossbar implementation that can be implemented using multiple stages of nodes in which only adjacent stages are connected. As a result, the feedforward crossbar is classified as a multistage interconnection network.(73)
The feedforward crossbar network is derived from the network illustrated in Figure 6.58. However, it differs from the network in Figure 6.58 in that it is a feedforward multistage network that can be implemented with free-space optics using only two beam-steering operations between any two stages in the network.
The stages in the crossbar network of Figure 6.58 must be carefully defined to obtain a feedforward multistage interconnection network . If the columns of the network in Figure 6.58 are defined as the stages in the network, then the resulting cross bar network implementation is not a feedforward multistage interconnection network, because one of the two output signals from a given cross-point is always routed back to a cross-point in
440
=4 inpuls
o
2
3
o
=4 outputs
2
Figure 6.67. Cross bar network with diagonal stages.
Chapter 6
3
the stage from which it originated. Similar results are observed if the rows in Figure 6.58 are defined as the stages in the network. However, if the diagonal slices of cross-points (shown as light gray lines in Figure 6.67) are defined as the stages in the network, then a feedforward multistage interconnection network is obtained which is topologically identical to the crossbar network of Figure 6.58. If additional cross-points are added to the left and top edges of the feedforward network (shown as bold cross-points in Figure 6.68), then every stage is the same size and every signal propagating
3
o
Figure 6.68. Crossbar network with diagonal stages and additional cross-points.
Free-Space Digital Optics 441
through the network will experience the same latency. The configuration of these additional cross-points must be fixed in the cross state to ensure proper routing of the signals to the central part of the network, where the crossbar function is provided. As an example, the path connecting input 2 to output 3 is still shown with bold links in Figure 6.68. Finally, if all of the diagonal stages in Figure 6.68 are lined up, the N = 4 input, N = 4 output feedforward crossbar network of Figure 6.69 is obtained. The network interconnections are symmetrie about the central stage of the network, and all of the interconnections to the left (right) of the central stage are identical to one another. The path from input 2 to output 3 is shown (via bold links) propagating through the feedforward crossbar network.
Since it is still a crossbar network, the feedforward crossbar is a nonblocking network with broadcasting capabilities and a very simple routing algorithm. However, instead of requiring N 2 switching elements, the feedforward crossbar network requires 2 N 2 - N switching elements, which are arranged in 2N - I stages with N switching elements per stage. The switching elements are constructed from (2, 2, 2) nodes. The control signals that determine the configuration of anode can be derived from an SLM that is controlled by a centralized controller. As a result, the state of the SLM need only be altered when a path is set up or disconnected, so the signal bit-rate is limited only by the speed of the optical logic devices that are used to implement the (2,2,2) nodes. If the (2,2,2) nodes of Figure 6.69 are replaced by the logic required to implement them, then the feedforward cross bar network of Figure 6.70 results. Every (2, 2, 2) node requires three stages of logic gates and consumes four logic gates in each stage (if we include the inactive, unclocked gates that are used as spacers in the buffer gate stage and the OR gate stage). So the total network actually requires 6N - 3 stages of logic gates, and each stage must have 4N logic gates. As
:4 inpulS
o
2
3
Figure 6.69. Feedforward crossbar network topology.
:4 output
o
2
3
442 Chapter 6
o
2 2
3 3
Figure 6.70. Logic for feedforward crossbar network topology.
seen in Figure 6.70, it is oftentimes very difficult to tell the difference between anode-stage and a link-stage, because both of them have planes of optical logic gates separated by optieal interconnections.
The interconnections between all of the logic gate stages in Figures 6.69 and 6.70 are space-invariant. This is possible because the interconnections take advantage of the inactive spacer gates between active logic gates. As a result, exactly two beam-steering operations are required between the logic gates in stage i and the logic gates in stage i + I.
Since only two beam-steering operations are required, polarization opties can be used to split each optical signal beam into two paths. The two paths can then be displaced with respect to one another, and the displaced paths can then be recombined and imaged onto the next stage of logic gates. A common technique for implementing these interconnections would use the powerful split-shift-mask-combine arrangement, as shown in Figure 6.7Ia. In this arrangement, the signals are split by a beam splitter, and half of the optical power is routed down one branch while the other half of the optical power is routed down the other branch. The mirrors in each branch impart a different beam-steering (shifting) operation on each of the signals. Masks can also be used to block any undesired signals. The signals from each of the branches are then recombined by the second beam splitter. Another more compact technique for imp\ementing this function would use a Michelson interferometer arrangement as shown in Figure 6.7Ib. (Note: This is similar to the optical setup required for the crossover interconneetion.)(74) Infinite conjugate imaging is used between the input image plane and the output image plane, so the light from a single device in the input image plane is
Free-Space Digital Optics 443
(a)
PBS
len --'...,.+--I-H_r--Ieos
(b)
mirror
input image plane
miTTor
114 0..;-__ -+--+---1 waveplate
DD
OUlpU! image plane
-=++--~=r~, .......... t~I ·······~X
X ·· ·~~:::::· T ·· I ··_ · _·_·· tl ·~-~~~-+--~~~D
' ''~'::::::'-'I --t ''-'''-' 1t ';:T'-'+~~~~--~F=~D
PBS
len
input o D 0 D image
plane
lens
X X
Figure 6.71. Optical hardware for beam-steering operations.
OUlpUl image plane
collimated by a lens and propagates as a collimated be am through the polarizing beam splitter. The polarizing beam splitter is used for both splitting and combining the two data paths. If the input image is assumed to be circularly polarized, then half of the input optical power will be passed as p-polarized light to the mirror in the top branch, and half of the input optical
444 Chapter 6
power will be passed as s-polarized light to the mirror in the left branch. The quarter wave-plates are rotated so that their fast axes are oriented 45° with respect to the plane of polarization of the linearly polarized light in each of these branches, so after two passes through the quarter wave-plate, the p-polarized light reflecting from the top mirror will be converted into spolarized light, and the s-polarized light reflecting from the left mirror will be converted into p-polarized light. As a result, the beams reflecting from the mirrors will be routed by the polarizing be am splitter to the output with very Iittle loss of optical power (except for the power that is lost when the light is absorbed at the inactive spacer gates). Different tilts on the mirrors can yield the required beam-steering operations for each of the stages in the feedforward crossbar network. (Note : Additional optical hardware can be added to permit dock beams and control beams to be combined with the data beams. One method of combining these signals requires the use of patterned mirror reflectors in intermediate image planes, where space multiplexing of the signal spots is possible. (75)
The optical implementation of the feedforward cross bar network is plagued by a few problems. First, it has O(N 2) complexity, which may result in high system costs. Second, it does not take full advantage of the inherent parallelism offered by free-space optics, because the linear arrangement of (2, 2, 2) nodes in a stage does not fully utilize the space-bandwidth product of imaging optics. As a result, a desirable modification to the feedforward crossbar network would permit the cross-points to be arranged in 2-D fashion. A first step toward this goal requires the logic gates of Figure 6.70 to be arranged in 2-D fashion, as shown in Figure 6.72. As a result, every cross-point requires three arrays of logic gates, and a two-by-two arrangement of logic gates is consumed on each array (if we indude the inactive
Figure 6.72. Two-dimensional arrangement of a two-by-two cross-point.
Free-Space Digital Optics 445
spacer gates which are shown in Figure 6.72). Using these 2-D cross-point structures, one technique that converts the 2-D network into a parallel 2-D network places the cross-points of a particular stage in a single horizontal row of a 2-D device array, but it requires that different stages of the feedforward crossbar network be implemented in different rows of the same device array. In other words, the outputs from stage I emanate from row I of the device array, and they are routed back to the inputs of stage 2, which are in row 2 of the device array. The continual routing of row i to row i + I provides all of the necessary connections for the feedforward crossover, and it permits the network to better utilize 2-D device arrays and imaging optics. In an actual implementation, a designer would not want to provide the connections preceding buffer gates, the connections preceding AND gates, and the connections preceding OR gates all in one stage, because then five different beam-steering operations would be required. To split these connections up, three device arrays would actually be used: one for the buffer gates, one for the AND gates, and one for the OR gates. The outputs from row i of the buffer gates are routed to row i of the AND gates, and the outputs from row i of the AND gates are routed to row i of the OR gates. However, the outputs from row i of the OR gates are routed back and down to row i + I of the first array, which is the array of buffer gates. As a result, the feedforward crossbar network can be implemented using a simple wraparound loop similar to previous arrangements described in the literature. (76.m Since the OR gate-to-buffer gate connections in the first half of the feedforward cross bar network are different from those in the second half, this technique may require two different sets of wraparound loops: one for the first half of the network and one for the second half. The output from the last row of OR gates in the first set must therefore be routed to the first row of buffer gates in the second set, as shown in Figure 6.73. Thus, the entire network requires six device arrays.
With this improvement to the feedforward crossbar design, the resulting optical implementation may be a useful system for many applications. The nonblocking nature of the network and the relative simplicity of the spaceinvariant optical beam-steering operations are two of the desirable characteristics of this network. The feedforward crossbar network can be classified as having (2, 2, 2) switching nodes that are constructed using opticallogic gates. The source of the control is an SLM that is driven by an externally located processor. The nodes are partitioned across three planes and are constructed using reflective optics. The nodes in anode-stage are arranged in a l-D vector, although wraparound techniques can be used to permit several nodestages to be stacked. The interconnection sc he me requires 2N connections between every node-stagc. Because of the spacer gates that are used, the fanout from each logic gate is two while the fan-in to each logic gate is either one or two. There are two distinct beam-steering operations required
446 Chapter 6
= optical interconneclion hardware
Figure 6.73. Wraparound implementation of feedforward cross bar.
between any consecutive pair of logic gate arrays, and these connections are space-invariant. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections within the wraparound design are parallel 2-D interconnections.
6.4.3. q-ShufHe Networks
Most ofthe network research in photonic switching has concentrated on optical implementations of q-shufHe networks, which were first introduced in the section on network topo!ogies. When q is set equa! to 2, these networks are also referred to as perfect shufHe networks or omega networks. The interest in the q-shufHe network is fueled by the fact that the network can be used for many applications, including photonic switching, optical computing, sorting, and FFT calculations.(51) In addition, many implementations of the q-shufHe have the unique characteristic that the network interconnections are identical from link-stage to link-stage. As a result, the q-shufHe is ideal for the wraparound techniques that are commonly used in photonic switching applications, because it uses the same interconnection hardware for each of the stages in the network. While the q-shufHe network offers moderate blocking probabilities, it only has O(N log (N») complexity, which can greatly reduce the overall system hardware costs.
A topological illustration of the 2-shufHe network was shown in Figure 6.7a, and it is redrawn in Figure 6.74 for convenience. A fully connected 2-shufHe network with N inputs requires IOg2 (N) node-stages and N / 2 2-input, 2-output nodes per node-stage. A topological illustration of the 4-shufHe
Free-Space Digital Optics
Link-Stage
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I
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Figure 6.74. 2-shuffle network topology (N = 16).
447
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network was shown in Figure 6.7c, and it is redrawn in Figure 6.75 for convenience. A fully connected 4-shuffie network with N inputs requires log4 (N) node-stages and Nj4 4-input, 4-output nodes per node-stage. Several different types of optical implementations have been proposed as qshuffie interconnections. Each ofthese different types can be categorized into one of the following four categories: (1) 2-D implementations of 2-shuffie networks, (2) parallel 2-D implementations of 2-shuffie networks, (3) 3-D
Link· Node- Link- Node- Link-Stage Stage Stage Stage Stage
0 I I 2 2 0000
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1000 1000
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1010 1010
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1100 1100 1101 1101
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Figure 6.75. 4-shuffle network topology (N = 16).
448 Chapter 6
implementations of 4-shufHe networks, and (4) 3-D implementations of folded 2-shufHe networks. Although each of these different implementations will appear to be physically different from the others, the reader must bear in mind that categories (I), (2), and (4) are all topologically equivalent to the perfeet shufHe network that is shown in Figure 6.74. Thus, from a network theorist's point of view, all three of these different network implementations produce the same fundamental network topology: aperfect shufHe network. In a similar manner, the network implementation of the third category still produces a 4-shufHe network that is topologically equivalent to the network in Figure 6.75.
A detailed comparison of the four categorized implementations is presented in the literature.(78) Within that work, the physical location of a link leaving a 2-D node-stage in a general 3-D system was defined by an ordered pair (x, y) identifying its row and column number, where o ~ x ~ L - land 0 ~ y ~ M - I. Thus, it is defined for a network with L rows of links and M columns of links. After passing through a link-stage, the physical location of the link as it enters the next 2-D node-stage was defined by another ordered pair (7rp (x), 7r r(y)), identifying its row and co 1-umn number. It was shown that any of the four q-shufHe mappings categorized above can be described using a pair oflink mapping functions: 7r p and 7r r• 7rp is the q-shufHe permutation (with q = p) that is performed on the row number of the link as it passes through the link -stage, and 7r r is the q-shufHe permutation (with q = r) that is performed on the column number of the link as it passes through the link-stage. Thus, substituting in the general expression for the q-shufHe yields the general 3-D link mapping function:
7rpr(x,y) = (7rp (x), 7r r(Y)) = «px + lpxjLJmod L, (ry + lryjMJ) mod M)
Manipulation of the four parameters p, r, L, and M permits this link mapping function to be used to describe any of the four categories listed above.
Within the literature, very little attention has been given to the node types that are used in the q-shufHe networks that are implemented using freespace optics. Thus, the network interconnections that are described below could be used with many different types of switching nodes.
6.4.3.1. 2-D Implementation of 2-Shuffle Network.
The first category of photo nie q-shufHe networks that will be analyzed is the 2-D implementation of the 2-shufHe network (q = 2). This type of network is obtained by setting the four parameters to the following values: p = 2, r = I, L = N, and M = I. This results in aperfect shufHe network (p = 2) with N inputs that are arranged in a linear vector down a single column (M = I). (Note: Similar results can be obtained for a linear vector
Free-Space Digital Optics 449
across a single row if p = I, r = 2, L = I, and M = M.) As a result, the general 3-D link mapping function described above can be reduced to
Jrpr(X, 0) = (Jrp(x), Jrr(O)) = «px + lpxjNj) mod N,O)
Since the second term in the ordered pair is a constant, it can be removed to produce the 2-D link mapping:
Jrpr(X) = Jrp(x) = (px + lpxjNj) mod N
Since p = 2, this can be rewritten as
The resulting network interconnections are shown in Figure 6.76a for a network with N = 16 inputs, and a graphical link mapping is shown in Figure 6.76b. Several researchers have proposed various optical implementations that can provide the 2-D interconnections shown in Figure 6.76a.(79-83) Very little was mentioned about the node implementation within these papers, but it can be assumed that the networks would probably be constructed using (2, 2, 2) nodes.
For the purposes of illustration, only one of these implementations will be presented. Brenner and Huang suggested several implementations that basically made two copies of the original input image (a set of spots), magnified the two copies by a factor of 2, recombined and interlaced the two copies, and then spatially filtered out the spots at the edges of the interlaced version (Figure 6.77a). One method of efficiently implementing these functions uses a Michelson interferometer with two tilted mirrors (Figure 6. 77b). One of the problems associated with this approach (and most of the other approaches) is the fact that some of the optical power is wasted in the spatial filtering step. In addition, the size ofthe output image is not matched to the size of the input image due to the magnification step. If the spots are made the same size in the input and output image, then they will be packed more densely in the output image than they are in the input image. If the spot spacings are made the same in the input and output image, then the spots will be larger in the output image than they are in the input image. This can become a problem in a cascaded system that uses similar device arrays in every stage or in a feedback system that wraps the outputs back around to the inputs.
The 2-D implementation ofthe perfect shuffie provides a powerful interconnection for use in the optical domain. However, one of the disadvantages of this arrangement is the fact that the nodes are arranged in linear fashion and do not capitalize on the parallelism of optics. This approach can take
450
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Chapter 6
---f-~~~~---..wf-=~~~--~~-=~~~--~~~~--OOOO r---, r--- 0010
"'----'-__ Jr-----" 0100
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v------1L----'r---- 1011
\ --·-r----, 1101
----L....:.:.:J..!.'-!-'----.-:~L.:~~:.:.:..----..:..:..:.:t..~j..:c:..:..:---....:::..:t....:.:J- 1111
Figure 6.76. (a) 2-D implementation of2-shuffie interconnections (N = 16) and (b) its graphical link mapping.
advantage of the parallelism of optics if the output data are recirculated back through the same hardware in a different row. The outputs from row i can be routed back and down to row i + 1. As a result, the 2-D perfect shufHe network can be implemented using a simple wraparound loop similar to previous arrangements described for the feedforward crossbar network. The resulting network is a parallel 2-D interconnection network.
In general, the 2-D implementation of the 2-shufHe network can be classified as having (2, 2, 2) switching nodes. The interconnection scheme
Free-Space Digital Optics
(a)
11
input imaj!e
(b)
tilted mirror
two copies
input image
interleaved imag
spatial filter
tilted mirror
palial filter
output image
451
Figure 6.77. Image interleaving (a) and hardware (b) required für 2-shuffie implementatiün.
452 Chapter 6
requires N space-variant connections between every node-stage. Due to the power loss in the interferometric arrangement, the fan-out from each logic gate is two while the fan-in to each logic gate is one. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections in the normal.design are 2-D interconnections, while the wraparound design has parallel 2-D interconnections.
6.4.3.2. Parallel 2-D Implementation of 2-Shuffle Network
The second category of photonic q-shuffle network that will be analyzed is the parallel 2-D implementation of the 2-shufHe network (q = 2). This network is very similar to the implementation described in the previous section, but it permits full connectivity between any of the nodes in a 2-D array containing L x M links per link-stage (without requiring a wraparound technique to produce the parallel 2-D connections). As a result, this network is better suited for use with planar device arrays, and it does not require the use of wraparound techniques (like the previous network) to accommodate the plan ar arrays.
Assuming (2, 2, 2) nodes are used in the network and that they are arranged horizontally across rows within the first node-stage, then full connectivity is achieved by performing horizontal 2-shuffles across all of the rows in the first log2 (L) - 1 link-stages, and then by performing vertical 2-shuffles down all of the columns in the last log2 (M) link-stages. As a result, the fully connected network will have a total of log2 (L) + log2 (M) - 1 link-stages and a total of log2 (L) + log2 (M) = log2 (L x M) node-stages, as expected for full connectivity. The vertical shuffle interconnections are obtained by setting the four parameters in the general 3-D link mapping function to the same values as in the previous section: p = 2, r = 1, L = L, and M = 1. The horizontal shuffle interconnections are obtained by setting the four parameters to the following values: p = 1, r = 2, L = 1, and M = M. Any of the shuffle implementations described in the previous section can be used to provide the required connectivity, but this particular type of arrangement (performing horizontal shuffles in some link-stages and vertical shuffles in other link-stages) was initially proposed by Kumagai and Ikegaya(84) and Lohmann(80) in independent research efforts. Byappropriate labeling of the links, it can be shown that the parallel 2-D implementation of the 2-shufHe network is topologically equivalent to the standard 2-shuffle.
The resulting network interconnections are shown via a graphical link mapping in Figure 6.78 for a network with N = 16 inputs. Unfortunately, this network has several undesirable traits. One of the unique (and undesirable) characteristics of this implementation is that the orientation of the (2, 2, 2) nodes varies from node-stage to node-stage within the network. This variation is necessary to produce the connections required for topological
Free-Space Digital Optics
Node-stage I
Link-stage I
(horizontal shuffie aeross all rows)
Link-stage 2
(vertieal shuffie aeross aO eolumns)
Link-stage 3
(vertieal shuffie aeross all eolumns)
Figure 6.78. Parallel 2-D implcmcntation of 2-shuffie.
453
equivalence with the 2-shuffie network in Figure 6.76b. Another undesirable characteristic of the parallel 2-D implementation of the 2-shuffie is the fact that the connections are not identical from link-stage to link-stage (some are implemented in rows while others are implemented in columns). As a result, this implementation cannot be used for wraparound techniques. Finally, since the network uses the same interconnections that were used for the 2-D implementation of the 2-shuffie, this approach still suffers from the problems associated with the requircd magnification step (wh ich were outlined in the previous section).
In general, the parallel 2-D implementation of the 2-shuffie network is classif1ed in the same categories as the network in the previous section. It can be operated with (2,2,2) switching nodes, and the intcrconnection scheme requires N space-variant connections between every node-stage. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections in the normal design are parallel 2-D interconnections.
6.4.3.3. 3-D Implementation of 4-Shuffie Network
The third category ofphotonic q-shuffie network is the 3-D implementation of the 4-shuffie network (q = 4). This network has al ready been briefly described in the section on comparisons between 2-D and 3-D interconnections. Recall that the network shown in Figure 6.54a is a 3-D implementation of a 4-shuffie network with N = 64 input links that are arranged in an 8-by-8 array. As described in that section, the 3-D implementation of the 4-shuffie
454 Chapter 6
interconnection is actually a shuffie permutation that has been simultaneously applied to the links in both the horizontal direction and the vertical direction. As a result, it permits full connectivity between any of the nodes in a 2-D array containing jN x jN links per link-stage (without requiring a wraparound technique to produce the parallel 2-D connections).
Assuming (4,4,4) nodes are used in the network and that they are arranged with a 2-by-2 array of input links entering the node and with a 2-by-2 array of output links leaving the node, and assuming the network has N input links that are arranged in an array with jN rows and jN columns, then full connectivity is achieved by interconnecting log4 (N) node-stages with lo~ (N) - 1 link-stages of 4-shuffies. The 3-D implementation of the 4-shuffie interconnection is obtained by setting the four parameters in the general 3-D link mapping function to the values: p = 2, r = 2, L = jN, and M = jN. Thus, substituting in the general expression for the q-shuffie yields the general 3-D link mapping function:
7r22(X, y) = ( 7r2(X), 7riY))
= «2x + l2x/sqrt NJ) mod jN,(2y + l2y/jNJ) mod jN)
The resulting network interconnections for one link-stage are shown in Figure 6.79a for a network with N = 64 inputs, and a graphicallink mapping of the entire three-stage network is shown in Figure 6.79b. Many authors have proposed different optical techniques for implementing the connections described in Figure 6.79.08,80,84-87)
Although each of these optical implementations is interesting, only the implementation proposed by Sawchuk and Glaser(78) will be discussed in any detail. In theory, their implementation permits any q-shuffie network to be implemented using a fairly simple optical arrangement. A 3-D implementation of a 4-shuffie requires the input image to be scaled (magnified) by a factor of 2 and then split into four copies of itself. Each of these co pies must then be shifted by an appropriate amount and superimposed on top of one another in the output plane (resulting in an interlacing of the input pixels). The superfluous pixels must then be discarded using a masking function. It can be shown that all of the above operations can be provided if an array of four spherical lenses with the same focal length f are used to image the input image plane to the output image plane and if the output image plane is passed through a rectangular mask centered on the output image. The four sphericallenses must all be placed in an intermediate plane between the input image plane and the output image plane. The location of the intermediate lens plane must be set to produce a magnification of 2 between the input image plane and output image plane. If SI is the distance between the input image plane and the lens plane, and if S2 is the distance between the lens plane and the output image plane, then SI and S2 must satisfy the following
Free-Space Digital Optics 455
Figure 6.79. (a) Connections in 3-D implementation of 4-shuffie. (b) 3-D implementation of 4-shuffie network.
456 Chapter 6
two equations:
and
If an imaginary line is drawn connecting the center of the input image to the center of the output image, then this line will intersect the lens plane at a point which defines the (0, 0) origin of an xy-coordinate ~stem. If there are N links entering a link-stage that are arranged in an .J N-by-jN array and if each of the links at the input plane is spaced by a distance D, then the optical axes of the four lenses within the lens plane must be positioned at the following coordinates within this xy-coordinate system:
x = ±1/6(y!N - I)D
y = ±1/6(JN - I)D
The relative displacements between the four lenses produce the required shifting of the four image co pies within the output plane.
The resulting optical setup required for a single link-stage is shown in Figure 6.80. An input image to this link-stage is illustrated in Figure 6.8Ia, and its associated output image (prior to masking) is shown in Figure 6.81 b. The usable area is boxed in Figure 6.81 b, and after masking, the image shown in Figure 6.81c is obtained.
Analysis of the 3-D 4-shuffie indicates that it suffers from problems that
input image
lens plane
(-IN -1)0/6
S, '" 2
output image
Figure 6.80. Optical setup for 3-D implementation of 4-shuffle network (N = 16 links).
Free-Space Digital Optics 457
(a) (h)
0 ® © ® 0 ® ® @ ® <9 0 ® <9 0® @) ®
(e)
o Figure 6.81. 3-D implementation of 4-shutße network. (a) Input image; (b) unmasked output image; (c) masked output image.
are very similar to those described for the 2-shuffie implementations. In particular, the masking step wastes optical power, and the magnification step (which yields larger spots in the output image than in the input image) can result in difficulties when attempting to cascade many stages in a large network. The required fan-out (of 4) and the loss of optical power due to vignetting at the lens plane can result in relatively low power levels at the output image plane. Another problem can result from the fact that pupil division is used in the lens plane, so in a diffraction-limited system, spot sizes in the output image will be increased. Nevertheless, the 3-D implementation of the 4-shuffie yields a very powerful optical interconnection scheme that can be used with (4, 4, 4) switching nodes.
In general, the 3-D implementation of the 4-shuffie network can be classified as having (4,4,4) switching nodes. The interconnection scheme requires N space-variant connections between every node-stage. Due to the effective splitting in the lens array arrangement, the fan-out from each logic gate is four while the fan-in to each logic gate is one. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections are 3-D interconnections.
6.4.3.4. 3-D Implementation 0/ Fo/ded 2-Shujjle Network.
The fourth and final category of photonic q-shuffie network that will be analyzed is the 3-D implementation of the folded 2-shuffie network
458 Chapter 6
(q = 2), which was proposed by Stirk et al.(88) This implementation is unique, because it can perform the 2-shuffie over a planar array of nodes (as was done in the section on the parallel 2-D implementation of the 2-shuffie), but it does not have the undesirable characteristic of requiring the nodes to be reoriented from node-stage to node-stage. In addition, the 3-D implementation of the folded 2-shuffie does not require the interconnections to vary from link-stage to link-stage (as was required in the section on the parallel 2-D implementation of the 2-shuffie). Interestingly, the link interconneetions used to eonneet the (2, 2, 2) nodes within the folded 2-shuffle are very similar to the links used for the 3-D implementation of the 4-shuffle in the previous seetion.
Figure 6.82a portrays a logical deseription of the funetions performed by a single link-stage in a folded 2-shuffie network with N = 16 input links. The node-stage preeeding the link-stage has (2,2,2) nodes that are oriented horizontally aeross the rows of the node-stage. The links emerging from these (2, 2, 2) nodes form the input image for the folded 2-shuffie, and these links are arranged in an JN-by-JN array. Ifthese links are logieally mapped into a single linear eolumn veetor, then they ean be used as the input links into a standard 2-shuffie intereonneetion. The logieal mapping of the plan ar array of links into a eolumn veetor requires the links to be read out of the planar array by raster-seanning aeross the rows of the planar array. Thus, the (x, y) position of any link in the plan ar array (where 0:::::; x :::::; fo - I and 0:::::; y:::::; jN - I) ean be mapped into a physieal position z (where o :::::; z :::::; N - I) within the eolumn veetor aeeording to the mapping:
z= JNy+x
Onee the eolumn veetor of links has been ereated, the standard 2-shuffie is applied to the eolumn vector to produee an output eolumn veetor. [Note: Reeall that the standard 2-shuffie is deseribed by the link mapping z' =
n(z) = (2z + [z/NJ) mod N.] Then the output eolumn veetor of links is logieally mapped into an output planar array of links by seanning down the N-link eolumn veetor and raster-seanning the links into the output plane to ereate an jN-by-jN array. If the physieal position of the links in the output eolumn veetor is deseribed by z' and the physieal position ofthe links in the output array is deseribed by (x', y'), then the veetor-to-array mapping ean be deseribed by
x' = z'mod jN
and
y' = (z' - z' mod jN)/jN
Igltal Optics Free-Space D" "
(b)
( . x,y)->z
mapping
z
80 (0
00 00
Z' ( ~ -> x',y') mapplng o
•• •• (0
00 Figure 6.82 (" . . . a) Loglcal m' . Image of folded 2-sh ffi appmgs for a folded ?- h . u e network. - s uffie mterconne t'
ClOn (N = 16).
3 x
(b) Output
460 Chapter 6
The resulting location of the links is shown in the planar array of output links in Figure 6.82a.
The 3-D implementation of the folded 2-shufHe provides 3-D link connections directly between the input link array and the output link array in Figure 6.82a without going through the logical mappings that required the use of the linear column vectors. Careful analysis of the required connections between the input link array and the output link array in Figure 6.82a indicates that the connections are similar to those that are used in the 3-D implementation of the 4-shufHe. Thus, hardware similar to the setup in Figure 6.80 can still be used. However, the reader should not be led to believe that the 3-D implementation of the 4-shufHe network and the 3-D implementation of the folded 2-shufHe are identical networks. The interconnections for the 4-shufHe were used to interconnect (4,4,4) nodes, while the interconnections for the folded 2-shufHe are used to connect (2, 2, 2) nodes, so it should be apparent that the two implementations do not at all yield the same network topologies. In order to provide the connections required for the folded 2-shufHe, the four lenses in the lens plane must be located with their centers at
(x, y) = (D(l - JiJ)/6, D(1 - .jN)/6)
(x, y) = (Dfo - 1)/6, D(fo - 1)/6)
(x, y) = (D( - fo - 1)/6, D(fo + 1)/6)
(x,y) = (D(fo+ 1)/6, D(-fo-1)/6)
where N is the number of links that are arranged in an fo-bY-fo array, D is the distance between the links at the input plane, and (0,0) marks the origin of a Cartesian co ordinate system centered on the optical axis and containing the lens plane.(78) As a result ofthe placement ofthese four lenses, the four images in the output plane are positioned different1y than they were for the 3-D implementation of the 4-shufHe. The actual interleaving pattern is shown in Figure 6.82b, and the usable area is shown inside the box.
Since the 3-D implementation of the folded 2-shufHe uses the same hardware as the 3-D implementation ofthe 4-shufHe, it shou1d not be surprising that it also suffers from similar problems. For example, the masking step wastes optical power, the magnification step can result in difficulties when attempting to cascade many stages in a 1arge network, and the required fanout (of 4) can result in relatively low power levels at the output image plane. Neverthe1ess, the 3-D imp1ementation of the folded 2-shufHe may still be a very useful network.
The link-stage interconnections for a fully connected 3-D implementation of a folded 2-shufHe network with N = 16 input links are shown using
Free-Space Digital Optics 461
(b)
Figure 6.83. (a) Graphicallink mappings far a folded 2-shuffle network (N = 16). (b) 2-Shuffle netwark topology (N = 64). (c) 3-D implementation of 2-shuffle network with N = 64 inputs and M = 64 outputs.
graphical link mapping in Figure 6.83a, and careful analysis should indicate that this network is topologically equivalent to the network in Figure 6.76b. The fully connected network will have a total of IOg2 (N) node-stages and a total of IOg2 (N) - I link-stages.
462 Chapter 6
Figure 6.83. Continued
In general, the 3-D implementation of the folded 2-shufHe network can be c1assified as having (2,2,2) switching nodes. Since the interconnection scheme is identical to the one used for the 3-D implementation of the 4-shufHe, it requires N space-variant connections between every node-stage. Due to the effective splitting in the lens array arrangement, the fan-out from each logic gate is four while the fan-in to each logic gate is one. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections are 3-D interconnections.
Another slightly modified version of the folded 2-shufHe can be implemented using the 3-D interconnections of Figure 6.79b (which were initially defined for the 3-D implementation of the 4-shufHe). As an example, the graphicallink mapping of a 2-shufHe network topology with N = 64 is shown in Figure 6.83b, and the links that are combined in every node-stage are shown as labels within the nodes. Full connectivity of all 64 inputs in a 2-shufHe network will require logz (N) = 6 node-stages, as shown in Figure 6.83b. If we ex amine a second network and we find that for every node in that second network, the link-stage connections combine the same two links as those shown in Figure 6.83b, then we know that the second network is topologically equivalent to the network in Figure 6.83b. The particular network that we would like to examine is the 3-D network shown in Figure 6.83c. The 3-D link-stage connections in Figure 6.83c are identical to the
Free-Space Digital Optics 463
3-D link-stage connections in Figure 6.79b. However, the nodes in Figure 6.83c are partitioned as 2-input, 2-output switching nodes (instead of the 4-input, 4-output nodes that were used in Figure 6. 79b). If these 2-input, 2-output switching nodes are appropriately rotated from node-stage to nodestage, the node connectivity provided in the 2-shufHe network of Figure 6.83b can be duplicated by the link-stage connections in the 3-D network of Figure 6.83c. Thus, the 3-D network in Figure 6.83c must also be implementing an N = 64 2-shufHe network.
6.4.4. Crossover Networks
Crossover networks(74, 89) are an interesting dass of networks that have been shown to be topologically equivalent to 2-shufHe networks. (90) Like the 2-shufHe networks, the crossover network has moderate blocking probabilities, but it only has O(N log (N» complexity.
Crossover networks have already been briefly described in the section on topological equivalence. Within that section, the crossover interconnections provided by the links within link-stage i were described by a pair of mappings, a? and ai. a? and ai map a switching element (PI, PH, ... ,pdi in node-stage i to two switching elements in node-stage i + I. The two switch-ing elements in node-stage i + I are described by (PI, PI-I, ... , PI)i+ land (PI, PI-I, ... , PI-i+ I, PI-i, PI-i~' ... , PI)i+ I· Link (PI, PI-I, ... , PI, O)i in link-stage i provides the connection from switching element (PI,PI_I, ... ,
PI)i to switching element (PI, PI-I , ... , PI)i+ I so it is said to provide the node mapping:
a?[(PI, PI-I, ... , pd;] = (PI, PI-I, ... , PI)i+1-
Link (PI, PI-I, ... , PI, I)i in link stage i provides the connection from switching element (PI, PI-I, ... , PI)i to switching element (PI, PI-I, ... ,PI-i+ I, PI-i, Pt-i-I, ... , PI)i+ I so it is said to provide the node mapping:
a?[(PI, PI-I, ... , pd;] = (PI, PI-I, ... ,PI-i+ I, PI-i, PI-i-I, ... ,P~)i+ I
The resulting 2-D implementation of a fully connected crossover network with N = 32 inputs and M = 32 outputs is shown in Figure 6.84. The 2-input, 2-output nodes within the network can be operated as 2-input, 2-output switching elements or as 2-input logic gates. Crossover networks with 2-input, 2-output nodes require that N = 2m , where m is a positive integer. In addition, fully connected crossover networks have IOg2 (N) node-stages with N/2 nodes per node-stage, and they have IOg2 (N) -I link-stages with
464 Chapter 6
node-stage node-stage node- tage link-stage I link-stage 2
==~[.p-~O -j rl---'I'----j_ J--....!:....-....,r.;;;;;;;] :J::~~,.F-;:;(::t=
fold line
fold line
fold line
Figure 6.84. 2-D crossover network with N = 32 inputs and M = 32 outputs.
N links per link-stage. In Figure 6.84, the network has IOg2 (N) = 5 nodestages (numbered from 0 to 4 from left to right), and it has IOg2 (N) - I =
4 link-stages (numbered from 0 to 3 from left to right) that provide the required connectivity between adjacent node-stages. Each node-stage contains N /2 = 16 2-input, 2-output nodes (logically numbered from 0 to 15 from top to bottom), and each link-stage has N = 32 links connecting adjacent node-stages. Thus, all of the switching elements must be able to receive data from two input links and transmit data to two output links.
Since it has been shown that 2-D crossover networks are topologically equivalent to a large dass of networks known as baseline networks,(90) and since the 2-D omega (perfeet shuffle) network is a member of the baseline dass of networks, the 2-D crossover network is said to be isomorphie to the 2-D omega network. It has been shown that 2-D omega networks can be very useful for many processing and switching applications.(91.92)
As a result, there has already been a fair amount of interest in implementing optical omega networks for applications within optical computing and photonie switching systems. Due to the isomorphism between the 2-D shuffle and the 2-D crossover network, 2-D shuffle applications may use
Free-Space Digital Optics 465
the 2-D crossover network. Since the optical crossover does not require a magnification step (like the optical shuffle) and since it oftentimes does not require a masking step (like the optical shuffle), this leads to more efficient use of the space-bandwidth product, and in some cases can save system power since masking is not required.
The 2-D crossover network is a relatively easy and inexpensive network to implement in optics, and its ability to provide space-variant interconnections with very little loss of optical power and image resolution has made it a popular network among many optical system designers. The 2-D crossover network requires two types of connections from a single node: one "straight path" and one "cross path." Optical hardware to implement these connections is shown in the left half of Figure 6.85.(74) The hardware shown in the right half of Figure 6.85 was proposed(93.94) as a means of combining the data signals from the crossover hardware with the clock signals that are needed to bias reflective device arrays. The hardware on the right also routes the output that is reflected from the device arrays toward the right (the next stage of crossover connections).
The operation of the hardware in Figure 6.85 is briefly described below. First, a circularly polarized input image (presumably from a stage of nodes) is routed into the system's input port. The left polarizing beam splitter separates the input image into two image copies and routes one copy to a plane mirror and the other copy to a prismatic mirror array. The image routed to the plane mirror is reflected back to the be am splitter, yielding the straight connections for the 2-D crossover network. The image routed to the prismatic mirror is also reflected back to the be am splitter, but each small
.. ".. pri~m.atic nu"". amoys
wlothe. periods
/\ I\. A A pri~matic /VVV\muror
array
I input dJlta signals
bi os & <001101 signals
lens c:: :=.
pa~~~ •• ••• refleClor
lens c::...::::====:::,
I logi< gates I Figure 6.85. Hardware required for optical implementation of crossover network.
466 Chapter 6
prism contained within the prismatic mirror array acts to reverse the image section that was encompassed by that particular prism. The combined action of all of the small prisms within the prismatic mirror array yields the desired crossed connections for the 2-D crossover network. The outputs from the crossover interconnection hardware are then routed to the right polarizing beam splitter and are imaged onto the patterned mirror reflectors, wh ich reflect the light back to the beam splitter. The beam splitter then directs the signals onto the device array. Clock signals (or bias beams) can then be imaged through the top patterned mirror reflector and through the beam splitter onto the device arrays to read the data, and the reflected dock signals are then routed by the beam splitter toward the right, passing through the rightmost patterned mirror reflector onto the next stage of interconnections. The action of the quarter wave-plates guarantees that the signals will pro pagate through the system with very little loss of optical power.
Each link-stage in the crossover network is different, so it is not weIl suited for the wraparound techniques that were used with many of the qshuffie networks. However, all of the link-stages share two things in co mmon: they all have "straight paths" and they all have "cross paths." The optical hardware for the crossover interconnection tends to be simple and compact, because it takes advantage ofthe fact that the cross paths (although space-variant) are symmetric about an axis. Each stage of the 2-D crossover network in Figure 6.84 requires a different granularity for its crossed connections. Fortunately, the granularity of the crossed connection can be varied by chan ging the period of the prismatic mirror array. Thus, each stage of the 2-D crossover network would use the same hardware components (shown in Figure 6.85), but the period of the prismatic mirror array would be different in each stage to provide the different cross granularities (as shown above the active prismatic mirror array in Figure 6.85). Prismatic mirror arrays with different periods can be fabricated by ruling an appropriate substrate.
One of the fundamental problems in the 2-D implementation of the crossover network is the difficulties that are encountered when a designer tries to use it to connect planar arrays of nodes. The parallel 2-D implementation of the crossover interconnection can circumvent this problem by provi ding horizontally oriented crossover connections in so me link-stages and vertically oriented crossover connections in other link-stages. Because of this, the parallel 2-D implementation ofthe crossover network is very similar to the parallel 2-D implementation of the 2-shuffie network.
The parallel 2-D implementation of the crossover network permits full connectivity between any of the nodes in a 2-D array containing L x M links per link-stage (without requiring a wraparound technique to produce the parallel 2-D connections). As a result, this network is better suited for use with planar device arrays than the 2-D implementation described in the previous section. To map the 2-D crossover network of Figure 6.84 into a
Free-Space Digital Optics 467
parallel 2-D crossover network, a technique similar to the one proposed by Stirk et al.(88) can be employed.(95) This technique defines parallel 2-D interconnections between planar nodes such that the resulting interconnections are topologically equivalent to the connections that are provided between the linear arrangement of nodes in the 2-D crossover network. A technique called fan-folding will be used to convert the 2-D crossover network into a topologically equivalent parallel 2-D crossover network. The three horizontal fold lines shown in Figure 6.84 mark the locations where fan-folding should take place. Fan-folding about these lines (while maintaining the link connectivity) converts the linear arrangement of nodes into a serpentine arrangement of nodes, as shown in Figure 6.86. The resulting arrangement of nodes within each node-stage is a 2-D planar array with J =
4 nodes per row and K = 4 nodes per column. By definition, the resulting network is a parallel 2-D crossover network. Since a link in the 2-D crossover network remains connected to the same pair of nodes during the 2-D-toparallel 2-D transformation, the resulting parallel 2-D crossover network is topologically equivalent to the 2-D crossover network.
Mathematically, the mapping of nodes from the 2-D domain into the parallel 2-D domain can be described by the transformation
column number
C
o
rOw number
R
2
J
ß2-D~par2-D(P) ---+ (R, C) = (lNT(Pj J), PMODJ )
,·ertical ero over
connections
verlical horizontal cro sover crossoyer
connections connections
horizontal cro over
connection
Figurc 6.86. 3-D crossovcr network with N = 32 inputs and M = 32 outputs.
468 Chapter 6
if INT(PI1) is an even number, it can be described by the transformation
ß2-D ~ par2-D(P) -t (R, C) = (lNT(P I ]), ] - 1 - PMOD J)
if INT( PI 1) is an odd numbeL In the expressions above, P represents the physical address ofthe node in the 2-D crossover network, (R, C) represents the row number and column number, respectively, of the same node in the parallel 2-D crossover network, ] represents the number of columns of nodes in the resulting plan ar node-stage, INT(P 11) represents the integer part of the quotient PI], and PMOD J represents the integer remainder of the quotient PI]. System designers can customize the resulting dimensionality of the node-stage array by using more or less fold lines, i.e., by varying the number of columns (1) in the resulting planar node-stage. In general, any 2-D crossover network with 1= 2i nodes per node-stage (i = positive integer) can be converted into a parallel 2-D crossover network with rectangular node-stages containing K = 2k rows and ] = 2! columns (k,j = positive integers). These dimensionality constraints on the rectangular node-stage result from the manner in which the nodes in the network are partitioned by the crossover connections. The only requirements that must be satisfied for an N-input parallel 2-D crossover network based on 2-input, 2-output nodes are 1= NI2 and I=]K.
In a given link-stage ofthe parallel 2-D crossover network, the resulting link-stage connections form parallel planes of 2-D crossover connections. For example, the parallel 2-D crossover network in Figure 6.86 has four sets of parallel, 2-D crossover connections in each of the link-stages. The 2-D crossover connections in link-stage I and link-stage 2 are oriented within vertical planes, while the 2-D crossover connections in link-stage 3 and linkstage 4 are oriented within horizontal planes. This gives rise to the concept of horizontal crossover connections and vertical crossover connections within the parallel 2-D crossover network. Both of these connections (horizontal and vertical) can still use the hardware shown in Figure 6.85, but the prismatic mirror array must be rotated 90° about the optical axis to provide the vertical crossover connections. To indicate the orientation and the granularity of the prismatic mirror arrays within the illustrations, the conventions shown in Figure 6.87 will be adopted. In particular, an outline of the prismatic mirror array and the mirror will typically be placed to the left of the crossover interconnections that are produced by that prismatic mirror array and that mirror. Figure 6.87a schematically displays the prismatic mirror array (placed in one branch of the crossover hardware in Figure 6.85) and the mirror (placed in the other branch of the crossover hardware in Figure 6.85) which are required for a horizontal crossover connection, while Figure 6.87b schematically displays the prismatic mirror array (placed in one branch ofthe crossover hardware in Figure 6.85) and the mirror (placed in the other
Free-Space Digital Optics 469
(a) (b)
Figure 6.87. Required orientation ofprismatic mirror arrays. (a) Horizontal crossover connections; (b) vertical crossover connections.
branch of the crossover hardware in Figure 6.85) which are required for a vertical crossover connection.
The optical implementations of crossover networks based on three different node-types will be discussed in this chapter: 2-module nodes, (2, I, I) nodes, and (2, 2, 2) nodes. It will be shown that each of these nodetypes can be used in a 2-D crossover network or in a parallel 2-D crossover network; however, minor modifications in the link -stage interconnections of Figures 6.84 and 6.86 are required for each of these different node-types. These modifications are needed, because the crossover networks in Figures 6.84 and 6.86 show a macroscopic view of the nodes in which the nodes are merely undefined boxes. Depending on the functionality of the nodes, a microscopic view of the crossover networks will often uncover asymmetrie structures within the nodes that require the opticallink-stage connections to be slightly modified. These modifications will not change the macroscopic connectivity of the network, so the resulting topology will still be a crossover network, but the connections at the microscopic level will rarely be as simple as those shown in Figures 6.84 and 6.86. The modifications required for the different node-types will be explored in detail below for (1) the 2-D implement at ion and the parallel 2-D implementation of the crossover network based on 2-module nodes, (2) the 2-D implementation and the parallel 2-D implementation of the crossover network based on (2, 1, 1) nodes, and (3) the 2-D implementation and the parallel 2-D implementation of the crossover network based on (2, 2, 2) nodes.
470 Chapter 6
6.4.4.1. 2-D lmplementation and Parallel 2-D lmplementation 0/ Crossover Network Based on 2-Module Nodes
The simplest type of node that can be used in a switching network is probably the 2-module node.(96) The 2-module node, or 2-module, is so simple that it cannot even be accurately classified using the triplet notation described above. An electronic implementation of a 2-module is shown in Figure 6.88a. This implementation wire-OR's two inputs together, and then has a switch which is either open (which disables the input signals from ftowing through to the two output ports) or closed (which enables the input signals to ftow through to the two output ports). If the switch is opened, then both of the output ports will be disabled and they will be placed in the high-impedance state. If both of the signals entering a 2-module are active, then the two input streams will corrupt one another. As a result, the path taken by a single active call within a network will typically place restrictions on the permissible states of other 2-modules within the network. The functionality of the 2-module in Figure 6.88a can be provided in the optical domain using several different approaches. One approach uses quantum weil optical tristate devices, (97) which can be controlled either electrically or optically. Another optical approach uses a single optical logic gate that it
bias or
clock beam
input I
input 0
electronic control
output I
(a)
output 0
output I
(bI
Figure 6.88. 2-module nodes. (a) Electronic implementation; (b) optical implementation.
Free-Space Digital Optics 471
operated as an OR gate (Figure 6.88b). If two inputs are directed at the inputs of the OR gate and if at most only one of the two inputs is ever active at any given time, then the OR gate can route the active signal that is directed at it to the output. Since most optical logic gates require a bias beam or dock beam for correct operation, the bias beam that is directed at the OR gate can be passed through an SLM to provide control over the OR gate 2-module. The window of the SLM can be made transmissive if the 2-module output is to be enabled, and it can be made absorptive to stop the bias signal from reaching the OR gate if the 2-module output is to be disabled. If the output is disabled, the OR gate will not receive a bias and the input data will not be routed to the next node-stage of the network.
The interconnections shown in Figures 6.84 and 6.86 can be used to connect the 2-moduJes in a parallel 2-D crossover network and a 2-D crossover network without the need for any modifications to the hardware in Figure 6.85. Thus, the initial description of the crossover network proposed by lahns and Murdocca(74) is ideally suited for a network based on 2-modules. Since the 2-module can be implemented as an optical OR gate, it should not be surprising that the 2-D crossover network interconnections and the 3-D crossover network interconnections described for the 2-module in Figures 6.84 and 6.86 can also be used for interconnecting optical logic gates (for use in digitallogic designs within optical computers).(98,99) This is possible only because the 2-module, like a standard optical logic gate, requires both of its optical inputs to be imaged onto a single spatial location. The other switching elements that will be described below do not have this property, because the inputs to (2, I, I) nodes and (2,2,2) nodes must be spat ially separated to permit different control signals to be applied to each of the two inputs, As a result, the crossover interconnections described for the (2, 1, 1) node and the (2,2,2) node cannot be used with opticallogic gates.
6.4.4.2. 2-D Implementation and Parallel 2-D Implementation of Crossover Network Based on (2,1,1) Nodes
By definition, a (2, 1, 1) node has two inputs, one output, and a capacity of one, so it supports the node configurations shown in Figure 6.89a, When control 0 is asserted, the data from input 0 is routed to the output, and when controllis asserted, the data from input 1 is routed to the output. The optical implementation of a (2, 1, 1) node is shown in Figure 6,89b, and it is constructed using two consecutive opticallogic gate substrates, The optics shown for the crossover interconnections in Figure 6,85 can also be used to provide the intranode connections for the (2, 1, 1) node of Figure 6.89b. The prismatic mirror array of Figure 6.85 must have a relatively small period to provide the required horizontal crossover connections, as indicated by the prismatic mirror array outline to the left of the connections in Figure 6,89b.
472 Chapter 6
i~nutO i~nutO output output
Input I Input I
control 0 control I control 0 control I
(a) (b)
(c)
Figure 6.89. (2, I, I) nodes. (a) Possible node configurations; (b) optical implementation; (c) planar array.
In Figure 6.89b, the (2, I, I) node is drawn as if it were constructed from transmissive elements, but this is a simplified drawing, and the actual optics shown in Figure 6.85 indicate that the optical logic gates can actually be reflective elements.
The two logic gates on the first substrate of Figure 6.89b must operate as optical AND gates, and the single logic gate on the second substrate must operate as an optical OR gate, so this particular Boolean implementation of the (2, I, I) node is said to use AND--OR logic. (Note: Another implementation using NAND-NAND logic would permit all three of the logic gates to operate as NAND gates, which could be an advantage when using some of the available optical logic gate technologies.) The unused logic gate (dark circ1e) on the second device substrate in Figure 6.89b is used only as a spacer element. Since no bias (c1ock) or control signals are routed to it, a slight savings in overall laser power can be achieved. AIthough the spacer element is an unused logic gate, it still plays an important role in the (2, I, I) node, because its placement simplifies the optical hardware requirements by providing a location at which the undesired light beams (shown as dotted lines in Figure 6.89b) can be absorbed.
The optical implementation of the intranode connections assumes that two spots can be spatially imaged onto two different areas of a single logic
Free-Space Digital Optics 473
gate: one of these spots is reserved for data signals, while the other spot is reserved for bias (dock) and control signals. Whenever a control signal is present at one of the AND gates in the (2, I, I) node, the data arriving at that AND gate will be passed through to the OR gate and on through to the output of the (2, I, I) node. During operation, only one of the two AND gates in a single (2, I, I) node should receive an active control signal, because activation of both control signals will result in corrupted data at the input of the OR gate. The control signals for the (2, I, I) node can be derived from the optical output of an SLM, which is in turn controlled by an electronic processor that calculates paths through the network.(IOO)
2-D crossover networks based on (2, I, I) nodes can be implemented very easily using the hardware of Figure 6.85. The interconnections shown in Figure 6.84 can be used to connect the (2, 1, 1) nodes in adjacent nodestages of a 2-D crossover network without the need for any modifications to the hardware in Figure 6.85. Figure 6.90 shows how crossover interconnections can be used for both the node-stages and the link-stages in a 2-D crossover network based on (2, 1, 1) nodes [a single (2,1,1) node is shown at the bottom left corner of the network].
Unfortunately, parallel 2-D crossover networks based on (2, I, 1) nodes cannot be implemented as easily as 2-D crossover networks based on (2, 1, 1) nodes. A plan ar array of (2, I, 1) nodes that can be used in a parallel 2-D crossover network is shown in Figure 6.89c, and all of the (2, 1, I) nodes
(2,1,1 ) node
link.slage o
node·Slage I link·slage
1
node·stage 2
Figure 6.90. 2-D implement at ion of crossover network with (2, I, I) nodes.
474 Chapter 6
are oriented horizontally, i.e., the two AND gates associated with a single node are joined by a horizontalline. Because the (2, I, I) nodes have an asymmetrie structure (when viewed microscopically), the horizontal crossover connections and the vertical crossover connections for the parallel 2-D crossover network must be treated separately. The horizontal crossover connections are very similar to the connections used in the 2-D crossover network, except the connections are implemented in parallel across all of the rows of (2, I, I) nodes. Figure 6.91a illustrates the required connections and a schematic of the required prismatic mirror array and mirror for the cross connection, where the data paths from the unused spacer elements have been eliminated to simplify the illustrations. Only one prismatic mirror array (labeled horizontal cross) and one mirror (labeled straight) are required. The vertical crossover connections must guarantee that each AND gate in a (2, I, I) node receives data from one and only one (2, I, I) node in the previous node-stage. To satisfy this requirement, the straight connections (shown as dotted lines in Figure 6.9Ib) must be slightly "shifted" by operating on them with the small prismatic mirror array (labeled "tilted" straight) which is placed in one of the branches of the crossover hardware. The large vertical crossing connection is also implemented with a prismatic mirror array (labeled vertical cross), and this second prismatic mirror array is placed in the other branch of the crossover hardware. Thus, the resulting crossover hardware has a prismatic mirror array (with a horizontal vertex) providing the vertical crossing connections, and it has a prismatic mirror array (with a vertical vertex) providing the "shifted" straight connections. Although the connections in Figure 6.9b may appear to be different from the standard crossover connections, analysis will show that the connectivity between required nodes has been maintained, so the connections still can be used in a crossover interconnection.
(a) (b )
Input or node-sla&<, 1+ I
Figure 6.91. 2-D paraBel crossover interconnections with (2, I, I) nodes. (a) Horizontal; (b) vertical.
Free-Space Digital Optics 475
6.4.4.3. 2-D Implementation and Parallel 2-D Implementation 0/ Crossover Network Based on (2,2,2) Nodes
The most commonly used node-type in network design is probably the two-by-two crosspoint, whose four permissible path configurations are shown in Figure 6.92a. When the signallabeled "control xy" is asserted, the data from input x are routed to output y. In the triplet classification scheme, the two-by-two crosspoint would be designated as a (2, 2, 2) node, because it has two inputs, two outputs, and a capacity of two. One optical implementation ofthe (2, 2, 2) node is shown in Figure 6.92b, and this implementation is weIl suited for use in a 2-D crossover network. Since three logic gate substrates are connected by two sets of interconnections, two sets of optical hardware similar to the hardware in Figure 6.85 would be required. The connections between the first OR gate array and the AND gate array would eliminate the lenses in the crossover hardware and use two mirrors (one tilted and one oriented perpendicular to the optical axis) in place of the mirror and the prismatic mirror array (see Figure 6.94). The connections between the AND gate array and the second OR gate array would use the standard crossover hardware shown in Figure 6.85.
l"HD I rll! 1"1 l 'untrl,IOI l'uotrulOO ':unlrulOl
nUlpul U
uutpUI I
c,"unlrul 10 "·,,nlrul 11 ,"'lIntrul 10 l'Hnlr1l1 11 .. "unlrll' IU "," .. tlnernl 11 cuntrol 10 eonlrol 11
(a)
.. :untrulOO ,'unlrul W
OUlput 0
(b )
Figure 6.92. (2,2,2) nodes. (a) Possible node configurations; (b) optical implementation for a 2-D crossover network.
476 Chapter 6
output 0
output I
runtrnllli
{·"ntr,,1 11
Figure 6.93. (2,2, 2) nodes for a parallel 2-D crossover network.
Although the implementation shown in Figure 6.92b could be used as anode within a 3-D crossover network, another optical implementation of the (2,2,2) is shown in Figure 6.93. It is also constructed using three consecutive optical logic gate substrates that can be interconnected by simple imaging optics. Two sets of the optical hardware shown in Figure 6.85 would be required to provide the in tran ode connections for the (2, 2, 2) node of Figure 6.93. The two logic gates on the first substrate of Figures 6.92b and
lihcd plane
mlrrOr
bia.< & control <isnal,
len:'i c: :=>
p~\~n~;d ••• •• refleClOr
1ens c::: :=:> quaner quaner
~ W"""'"ILSJ .r""m.~,1!" ~~.~n,·t=Jl W~""i ~ ~;~~:,~ plane quaner len, lens mirror \Va'·c·pl".e I I p;;,~:;.~;d
1 '"PUl da." !'Iignal ...
len:-. G: ::> refleclor
I IOgiC gales I
Figure 6.94. Hardware required for optical implementation of (2, 2, 2) node of Figure 6.97b.
Free-Space Digital Optics 477
6.93 must operate as optical OR gates, the four logic gates on the second substrate must operate as optical AND gates, and the two logic gates on the third substrate must operate as optical OR gates. Spacer elements again provide a location at which the undesired light beams can be absorbed.
The optical implementation of the intranode connections again assurnes that two spots can be spatial\y imaged onto two different areas of a single logic gate: one of these spots is reserved for data signals, whi\e the other spot is reserved for bias (c1ock) and control signals. Whenever a control signal is present at one of the AND gates in the (2, 2, 2) node, the data arriving at that AND gate wil\ be passed through to the OR gate and on through to the output of the (2, 2, 2) node. It is again assumed that the control bits are derived from the optical output of an electronical\y control\ed SLM.
The link-stage interconnections for 2-D crossover networks based on (2, 2, 2) nodes do not require any modifications to the hardware in Figure 6.85. This can be observed in Figure 6.95, where the output stage of one node-stage and the input stage of the fol\owing node-stage are shown connected by a 2-D crossover link-stage. The placement of the unused spacer elements permits al\ of the undesired light beams to be routed to unused locations. They also guarantee that each OR gate input to a (2, 2, 2) node wil\ receive one and only one signal from a (2, 2, 2) node in the previous node-stage.
output or node- tage i
input ur node.,taj(c i+ 1
Figure 6.95. Link-stage interconnections for 2-D crossover network based on (2,2, 2) nodes.
478 Chapter 6
Figure 6.96. Planar array of (2, 2, 2) nodes for a parallel 2-D crossover network.
A planar array of (2, 2, 2) nodes that can be used in a parallel 2-D crossover network is shown in Figure 6,96. The inputs to the nodes are oriented horizontally while the outputs from the nodes are oriented vertically. As a result of this asymmetrie structure, the horizontal crossover connections and the vertical crossover connections for the parallel 2-D crossover network must be treated separately. Both the horizontal crossover connections and the vertical crossover connections will require similar modifications of the hardware in Figure 6.85, as shown in Figure 6.97. The dotted lines in Figure 6.97 are the "shifted straight" connections.
output of nodt-staKe i
(a)
input or nodt-stage i+ I
output or nodt- taKe i
(b)
input of nodt-stage i+ I
Figure 6.97. Parallel 2-D crossover interconnections between (2,2,2) nodes. (a) Horizontal crossover connections ; (b) vertical crossover connections.
Free-Space Digital Optics 479
6.4.4.4. Comments on Crossover Networks
It has been shown that a 2-D crossover network can be converted into a topologically equivalent parallel 2-D crossover network using a very simple transformation rule defined by a fan-folding operation. In addition, three different node-types that can be used in crossover switching networks were described, and the optical implementation of each of these node-types was also discussed. These node-types include the 2-module, the (2, I, I) node, and the (2,2,2) node. Each of these different node-types can be used in 2-D crossover networks or parallel 2-D crossover networks if minor modifications are added to the initial 2-D crossover network design, and each of these modifications was described in detail.
The 2-D implementation of the crossover network offers many benefits. For example, the network can be implemented with very compact hardware that has very low optical loss and no magnification step. In addition, the network has the ability to interconnect logic gates, (2, 2, 2) nodes, and (2, I, I) nodes. However, the crossover network does have its problems. For example, the patterned absorbers required for the (2, 2, 2) nodes waste half of the optical power. In addition, the 2-D implementation can only be used to interconnect linear vectors of switching nodes (or logic gates), so it does not fully utilize the space-bandwidth product of spherical lenses and does not fully utilize the gates in plan ar device arrays. Since each stage of the crossover requires a different granularity within the cross path, the wraparound techniques that were described in the section on 2-D 2-shuffie networks cannot be applied very easily. The only way that the wraparound technique can be applied is if the network designer increases the number of node-stages beyond the standard IOg2 (N) node-stages that are typically required. (Note: This might be done to decrease the blocking probability or increase the fauIttolerance in the network.) If more than IOg2 (N) node-stages are used, then the link-stage connections start to repeat themselves, as shown in Figure 6.98a. The wraparound design ofFigure 6.98b can then be applied. However, a more desirable technique that provides connectivity between planar arrays ofnodes uses the parallel 2-D crossover interconnections ofFigure 6.86. The parallel 2-D crossover network shares most of the benefits (e.g., compact hardware) and pitfalls (e.g., patterned absorbers may be required) that are found in the 2-D crossover network.
In the discussion of the various implementations of the 2-D crossover network and the paraBel 2-D crossover network, aB of the logic gates were assumed to be single-raiI logic gates. If, however, dual-raiI logic gates (such as S-SEEDs) are used, additional effort is required to guarantee that desired connections are produced in each stage of the network. In particular, the system designer must guarantee that the microscopic view of the interconnections is identical to the macroscopic view of the interconnections. (Note:
480 Chapter 6
node.stage node.stage node·stage node·stage node·stalle node·~tage I link.stage 2 link.stage 3 Iink.stage 4 link.stage 5 link.st'lle 6
I 2 3 4 5
(a)
Figure 6.98. Crossover network Ca) and wraparound design of crossover network (b) with more than log2 (N) node·stages.
This is true for any network-not just the crossover network. However, we have chosen the crossover network to illustrate the importance of microscopic views within photonic switching designs.) As an example, consider the paraBel 2-D crossover connection based on 2-modules, as shown in Figure 6.99a, where a horizontal crossover link-stage and a vertical crossover link-stage are illustrated. When single-rail logic is used, the connections shown in Figure 6.99a produce the desired network connectivity. However, Figure 6.99b illustrates the connections that result from the same crossover
Free-Space Digital Optics 481
Figure 6.99. Crossover connections for (a) single-raillogic and (b) dual-raillogic.
hardware when dual-rail logic gates are used (assuming the dual-rail logic gates are oriented with the two rails along a vertical axis). The horizontal crossover within the first link-stage of Figure 6.99b produces the desired connectivity. However, since the crossing of two associated rails within a dual-rail system resuIts in an effective complementing of the binary data signal, it should be apparent that the vertical crossover within the second link-stage complements the binary da ta that pro pagate along the cross path while leaving the binary data in the straight path unaffected. From a system architecture point of view, this situation is probably unacceptable, because the binary sense of the da ta will be a function of the path through which the data flowed. One solution to this dual-rail complementing problem requires the data that propagate along the straight path to be complemented
482 Chapter 6
in all of the link-stages containing vertical crossover connections. As a result, the sense ofthe data at the output is no longer a function ofthe path through which the data propagated. (Note: If the network has an odd number of link-stages with vertical crossover connections, then the data will arrive at the output with their sense complemented--regardless of the path that they followed. Thus, a single inverter can be used at each output port to restore the data to the required sense.) Similar corrections are required when dualrail logic gates are used within parallel 2-D crossover networks that are based on (2, I, I) nodes and (2, 2, 2) nodes.
In general, the 2-D implementation or the 2-D parallel implementation of the crossover network can be c1assified as operating with logic gates, 2-modules, (2, I, I) switching nodes, or (2, 2, 2) switching nodes. For networks based on any of these switching nodes, the interconnection scheme requires space-variant connections between every node-stage, but they are symmetric ab out an axis. The fan-out from each logic gate never exceeds two, and the fan-in to each logic gate also never exceeds two. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections in the design are 2-D interconnections or parallel 2-D interconnections.
6.4.5. Other Networks
Many other network topologies have been proposed for free-space photonic switching applications. Two others will be briefly discussed within this section: (1) the 3-D implementation of trimmed inverse augmented data manipulator and (2) the parallel 2-D implementation of Batcher-Banyan sorting network. These two networks were inc1uded in this section because the former illustrates the architectural benefits that can often be derived when the connectivity limits found in electronics are removed from the list of design constraints, and the latter illustrates the power that can be provided by a system that capitalizes on free-space optics to implement computational logic.
6.4.5.1. 3-D Implementation of Trimmed Inverse Augmented Data Manipulator (TIADM)
The TIADM network(lOl) is derived from a c1ass of O(N log2 N) multistage interconnection networks known as IADM networks(102, 103) (Figure 6.100) which are based on Plus-Minus-i connection patterns, The large number of connections required between consecutive stages in the standard IADM network suggests that it may be able to capitalize on the parallelism provided by photonic interconnections,
Free-Space Digital Optics
NODE- n TAGE 2
j NODETAGE 3
Figure 6.100. Inverse augmented da ta manipulator network (N = 8).
483
The modified IADM network requires that some of these interconnections be trimmed from the edges of the network to simplify the optical components required in a photonie design. As a result, the modified network is called the 2-D TIADM network (Figure 6.l01a). It is interesting to note that the connections in the Banyan network (Figure 6.101b) are a sub set of the connections in the 2-D TIADM network, so the 2-D TIADM pro vi des even more connectivity than the Banyan network (which is topologically equivalent to the popular 2-shufHe network). Both 2-D TIADM (Figure 6.1OIa) and 3-D TIADM (Figure 6.102) networks have been defined in the literature.(!(l') However, only the 3-D TIADM network will be described in this section.
The 3-D TIADM network is a novel network that extends the 2-D TIADM connections into three dimensions while still using regular interconnects. Although it is based on the 2-D TIADM, the 3-D TIADM is not isomorphie to the 2-D TIADM. The 3-D TIADM network is illustrated in
484 Chapter 6
(a) LINK- LINK- LINK-STAGE STAGE STAGE
0 I 1
0 0
1
2 2
3 3
4 4
5 5
6 6
7 7
NODE- NODE- NODE- NODE-TAGE STAGE TAGE STAGE
0 I 2 3
(b) LlNK- LI K- U K-STAGE STAGE STAGE
0 1 2
0 0
2 2
3 3
4 4
5 5
6 6
7 7
Figure 6.101. (a) 2-D trimmed inverse augmented data manipulator network (N = 8). (b) 2-D Banyan network (N = 8).
Figure 6.102 for a system with N = 64 input ports and N = 64 output ports. For a system with N input ports and N output ports, the 3-D TIADM network requires (1/2) IOg2 (N) + 1 node-stages [compared with the log2 (N) + 1 node-stages required by the 2-D TIADM]. These node-stages are
Free-Space Digital Optics
olumn
um\ LlNKSTAGE
o
l Row umber
LI KTA E 1
LlNKSTAGE
2
Figure 6. \02. 3-D trimmed inverse augmented data manipulator network (N = 64).
485
numbered from 0 to (l/2) IOg2 (N) from left to right. There are also (l/2) IOg2 (N) link-stages, wh ich are numbered from 0 to (1/2) IOg2 (N) - I from left to right. Each node-stage has N nodes arranged in linear fashion, wh ich are numbered with ordered pairs (r, c) indicati% each node's respective row number and column number [from (0, 0) to CJ N - I, jN - I)]. Each node is merely a 9-to-l multiplexer with se1ect signals gating the nine inputs (Figure 6.103), so the nodes can be c1assified as (9, I, I) nodes. The control of
Figure 6.103. 9-to-1 multiplexer node for 3-D TIADM network.
486 Chapter 6
the select signals can again be provided hy address decoding logic for a packet-switched system, or hy a centralized controller for a circuit-switched system. In a circuit-switched system, the centralized controIler must guarantee that no more than one active path will ever use a particular node. Thus, contention resolution must be provided during caIl setup.
Each link-stage of the 3-D TIADM network provides 9N - 6}"N(i+ I) + 22i+ 2 links between adjacent node-stages, because the single output from each node is fanned out to form nine output links (but some of them are trimmed). From node (r, c) in link-stage i, three PlusMinus-2 i connections are provided along row r, three Plus-Minus-i connections are provided along column c, and four diagonal connections are also provided. Thus, node (r, c) in node-stage (i) is directed to node (r - i, c - i), to node (r - 2i , c), to node (r - i, c + 2i ), to node (r, c - i), to node (r, c) to node (r , c + n, to node (r + 2i , c - 2i ), to node (r + 2i , c), and to node (r + i, c + 2) in node-stage (i + 1). These nine connections wilI be calIed the 3-D Plus-Minus-2 i connections. Since the resulting node numbe(s row and column in node-stage (i + 1) must be a value between 0 and j!v - 1, any connections to nodes outside of this range are connections that are trimmed from the edges of the switch. The permissible connect:ons defined for each stage can also be described using the techniques described in the section on beam-steering operations. In particular, the connections in link-stage i can be described by an ordered pair of differences (8x, 8y), where 8x = -2 i or 0 or i, and where 8y = -i or 0 or i.
The entire 3-D TIADM network can be implemented with free-space optics by appropriately connecting optical AND gate arrays and optical OR gate arrays. In Figure 6.104, each beam from the OR gate array is an output from a particular node, and each beam experiences a one-to-nine split to
OR Gille AlTay Hologram
AND Gate AlTay
Beam di placement = 2
Figure 6.104. Required beam displacement for 3-D TIADM connections.
Free-Space Digital Optics
D Gate Array
Hologmm
(a)
OR Gate Amy
A D Gate Array
Holognun
(b)
OR Gate Array
487
Figure 6.105. Requircd beam displacement for node connections. (a) Connections from one AND gate; (b) resulting connections from all AND gates.
provide the link-stage interconnections. Different be am displacements are used to provide the connections in different link-stages. Due to the unused gates in the OR gate array, a similar one-to-nine split operation (Figure 6.105) can be performed on all of the beams from the AND gate array to yield the required node-stage connections shown in Figure 6.103. Every beam from every array in Figures 6.104 and 6.105 is operated on by a spaceinvariant, one-to-nine split operation, so multiple imaging techniques can be used to project each source array onto each destination array. One technique that can perform the multiple imaging operations uses computer-generated binary phase gratings similar to those described in Refs. 60, 104-106. The network can be controlled by a conventional electronic processor if the processor is able to write the pixels in a 2-D SLM array. The select signals that are directed at the AND gates in Figure 6.103 can be passed through the pixels of the SLM, providing an interface between the electronic processor that performs path hunt operations and the optical network.
The electronic processor must locate an available path in the network when routing a new cal\. There is always at least one path through an idle 3-D TIADM network that allows da ta to be routed from any input source S to any output destination D. B10cking can occur within an active switch, though, so the 3-D TIADM network must be categorized as a blocking switch. One method of determining a path through the 3-D TIADM from input source (rs, cs) to output destination (rl), CI)) requires the use of vertical natural routing tags and horizontal natural routing tags. The vertical natural routing tag is the signed difference (rl) - rs) between the destination row number rD and the source row number rs, represented as a signed magnitude binary number. The horizontal natural routing tag is the signed difference (CI) - es) between the destination column number CD and the source column number cs, represented as a signed magnitude binary number. In
488 Cbapter 6
signed-magnitude representation, the most-significant bit is the sign bit (0 = positive, 1 = negative), and the 10g2 (N) least-significant bits represent the magnitude ofthe difference. Symbolically, the signed magnitude number can be represented as (SM1og2(N)-1 ••• M 2M 1M o), where S is the sign bit and M j is the ith magnitude bit. To use the vertical (horizontal) natural routing tag to set up a network path, the S bit and the Mi bit are used to determine the setting ofa node in node-stage (i + 1) for the path in link-stage i. Routing requires the path to be set up in serial fashion beginning in node-stage 0 and ending in node-stage (1/2) log2 (N). If Mi = 0, then data are routed from node j in node-stage i to node j in node-stage (i + 1). If Mi = 1 and S = 1, then data are routed from node j in node-stage i to node (j - i) in nodestage (i + 1). If Mi = 1 and S = 0, then data are routed from nodej in nodestage i to node (j + i) in node-stage (i + 1).
The vertical natural routing tag defines displacements in the vertical dimension, and the horizontal natural routing tag defines displacements in the horizontal dimension. Superposition ofthese two orthogonal paths yields the resultant 3-D path, which is more easily viewed with a top view and side view ofthe network. For example, Figure 6.106 shows the 3-D path connecting (with dark lines) input source (2,6) to output destination (5,0). This path was calculated using the vertical and horizontal natural routing tags. The use of natural routing tags guarantees that the resulting natural path will never use the wraparound connections (which are not available).
The 3-D TIADM network is a blocking network, because it may not be capable of setting up a new path if active paths are already using some ofthe nodes required by the new path. In addition, the 3-D TIADM provides no fault tolerance for many connections, because paths connecting input source S to output destination D do not have any alternate paths if S = D. If the photonic network design requires decreased blocking probability and increased fault tolerance, then topological modifications must be proposed that provide alternate paths through the network when natural paths are blocked by busy or faulty nodes. Ideally, the alternate paths should be disjoint from the natural path and from one another. In other words, the paths should not share common nodes or links. In addition, every input source Sand output destination D should have the same number of disjoint paths between them, so that fairly uniform blocking probabilities are obtained for all values of Sand D. These requirements should provide an improvement in fault tolerance, and they should also help improve blocking probability. The multiple paths that are inherent within the 3-D TIADM do not satisfy these requirements, so these extra paths will not be considered.
Pairs of extra node-stages can also be added to the 3-D TIADM network to satisfy these requirements. In Figure 6.107, one of the two nodestages in the pair is added before node-stage 0, and it is called offset node-stage O. The link-stage that follows offset node-stage 0 is called offset
Free-Space Digital Optics
0 0 I
2 2
OLUMN 3 3 NUMBER 4 4
S S 6 6 7 7
TOP VIEW (HORIZO TAL COMPONE T)
ROW UMBERS
o
2
3
4
S
6
7
SIDE VIEW (VERTI AL COMPO E T)
489
Figure 6.106. Top and side views of path from (2, 6) to (5, 0) in 3-D TIADM with N = 64.
link-stage 0, and it provides the 3-D Plus-Minus-2° connections between offset node-stage 0 and node-stage O. The other node-stage in the pair is added after node-stage (1/2) log2 (N), and it is called offset correction nodestage O. The link-stage that precedes offset correction node-stage 0 is called offset correction link-stage 0, and it also provides the 3-D Plus-Minus-2° connections between node-stage (1/2) log2 (N) and offset correction nodestage O. If extra nodes are added to the top edge, bottom edge, left edge, and right edge of each node-stage, then every input source Sand output destination D have nine disjoint paths between them. These extra nodes are shown shaded in Figure 6.107.
To use the offset node-stage and the offset correction node-stage for routing through the network, the controller would first attempt to use the natural path through the network. Access to the natural path is provided by the straight link in offset link-stage 0 and the straight link in offset correction link-stage O. If any of the nodes used in the natural path are busy or faulty, then the controller can attempt to use one of the eight disjoint alternate
490
COLUM UMBER
ROW UMBER
Chapter 6
ort: et node- node- node- ort: et corr_ node-stg stg stg tg node-stg
0 0 I 2 0
0 0
2 2
3 3
4 4
5 5
6 6
7 7
TOP VIEW (H RIZO TAL COMPO ENT)
ort: et node- tg
o
0
I
2
3 4
5
6 7
nodetg o
nodetg I
nodetg 2
node- offset COff. tg node-stg 3 0
IDE VIEW (V RTICAL COMPONE T)
Figure 6.107. 3-D TIADM with N = 64 and 2k = 2 extra node-stages.
paths. All nine of these paths [shown as bold links connecting input source (2,6) to output destination (5,0) in Figure 6.107] have the same shape between node-stage 0 and node-stage (1 / 2) log2 (N); however, each one is offset from the others by the offset link-stage and the offset correction linkstage. The task of cakulating the node numbers used in a path needs to be carried out only for the natural path, because the nodes used in the eight alternate paths are determined by simple addition of an offset to the node numbers used in the natural path. As a result, by varying the settings in offset link-stage 0 and offset correction link-stage 0, nine paths that use ni ne entirely different sets of nodes can be quickly found using a very simple routing algorithm.
Free-Space Digital Optics 491
Multiple sets of offset stages and offset correction stages can be added to the 3-D TIADM network to furt her increase the number of available paths. In general, if k offset node-stages are added at the input end of the network, and if k offset correction node-stages are added at the output end of the network, and if 2k - 1 extra nodes are added to the top edge, bottom edge, left edge, and right edge of the network, then there will exist (2k + 1 - I? paths between every input source and output destination. The number of offset stages and offset correction stages that are added to the 3-D TIADM network have a measurable impact on the operating characteristics of the network. This can be observed in the simulation results shown in Figure 6.108, where the network blocking probability is plotted as a function of offered calJ load. [Note: The offered calJ load equals the product of the average calJ hold time and the average call arrival rate, where the average calJ arrival rate = l/(the average calJ interarrival time). The offered calJ load describes the average number of calJs that would be active in a network if no blocking had occurred, so the maximum offered calJ load is equal to the number of input ports N.] Figure 6.108 displays these plots for the different types of TIADM networks with size N = 64. Figure 6.108 also contains a plot of blocking probability versus calJ load for the omega (perfect shufHe ) network with size N = 64. The plots in Figure 6.108 show that blocking probability does increase as offered calJ load is increased; however, the amount of increase is dependent on the network type. In general, the
I.
0.8
o. Probgrilily
BJocking
o.
0.2
o.
o
3D TlADM (2k = 2)
\
20 40 60 80 100
Percenlage of Maximum Offered CaJl Load
Figure 6.108. B10cking probability in 3-D TIADM with N = 64 and 2k extra node-stages.
492 Chapter 6
blocking probability in the 3-D TIADM networks is lower than the blocking probability in comparable 2-D TIADM networks and omega networks. In addition, the blocking probability decreases as more offset stages are added to the network, although the decreases are more pronounced in the 3-D TIADM networks than they are in the 2-D TIADM networks. As a result, the extra stage 3-D TIADM networks have lower blocking probabilities over a broader range of offered call loads. This result illustrates the potential system benefits that can often be derived when the pin-out limitations found in electronics are removed by a free-space optical implementation.
In general, the 3-D implementation of the TIADM network can be classified as operating with (9, I, 1) switching nodes. The interconnection scheme requires space-invariant connections between every node-stage. The fan-out from each logic gate never exceeds nine, and the fan-in to each logic gate also never exceeds nine. In the macroscopic sense, the link-stage interconnections take place between nodes, and the interconnections in the design are 3-D interconnections.
6.4.5.2. Parallel 2-D Implementation of Batcher- Banyan Sorting Network
The Batcher-banyan sorting network (also known as the Starlite network) is an interesting packet-switched network that requires 0([log2 N]2) switching nodes to produce a fully nonblocking switching architecture. (91,107- 110) The Batcher- banyan sorting network is a packet switch based on a distributed control scheme. Each packet has a header containing control bits and the destination address for that particular packet (Figure 6.109). The packets that enter the network are bit-aligned and framealigned, so the header information for two packets entering anode can be
activity bit (O=active,
LSB
~J~;;':r~.~J ,....-----data -----'Ir--r-II Ir--r-II I~I I
------~ payload destination control address
time Figure 6.109. Fonnat of packet.
Free-Space Digital Optics 493
compared by a processor attached to that node. As a result, the processing power required to set up a path through the network is comprised of many small processors that are physically associated with the switching nodes in the network. The processor attached to any switching node in the network performs relatively simple Boolean functions and only requires a sm all amount ofmemory, so it can be implemented as a small finite state machine. Each of the finite state machines required by the Batcher-banyan sorting network can be implemented using the PLA techniques described in an earlier section.
The Batcher-banyan sorting network is comprised of several different sections, and each section is responsible for providing a unique function in the routing of data. The basic Batcher-banyan sorting network can be divided into three functional sections: the sorting network, the trap network, and the expander network. The trap network can be further subdivided into two subsections: the mark subsection and the sorting subsection. As a result, the entire Batcher- banyan sorting network architecture is displayed in Figure 6.110 for a network with N = 8 inputs. Figure 6.110 also show a typical set of packets entering the network, and it shows how the packets are routed from stage to stage within the network. In the sorting network, the fixed length packets are sorted into an absolute ordering based on the destination addresses in the headers of the packets. This sorting function operates on the trap flag, the activity bit, and the destination address that is shown in Figure 6.109. The packets that are routed out of the sorting network are routed to the mark subsection (within the trap section). In the mark sub section, adjacent packets are compared to identify any packets with identical destination addresses. These packets are in conflict with one another, so one of the two is marked by resetting the trap flag in the header to logical "0." The outputs from the mark subsection are then routed to the sorting subsections, where a second sorting operation is performed. The second sorting operation forces all of the trapped packets to the left of the network, where they can be recirculated to the input ports for reinjection into the network during a later packet period. Packets that were not trapped are routed in sorted order to the right side of the network, and they are passed on to the expander section. In the expander section of the Batcher-banyan sorting network, the packets are routed to their absolute destinations. Since they enter the expander in sorted order and since identical destination addresses have been removed by the trap section, these remaining packets can be routed to their output ports without contention for any of the links within the expander section.
The two sorting sections within Figure 6.110 can be implemented using Batcher's bitonic sorting network. To sort N items, the bitonic sorting network requires (lOg2 N)2 sorting stages, and each stage must be connected to the next stage using an interconnection that is topologically equivalent to
494
'ource 0
dala ~ destination address 6
activity hit 0 trap flag I
de. tination 0
Chapter 6
2 3 4 5 6 7
Figure 6.110. Routing of packets.
the perfeet shuffie interconnection.(l))l In addition, each stage ofthe bi tonic sorting network contains N / 2 two-input, two-output switching nodes. Three types of switching nodes are required within the bitonic sorting network : bypass nodes, max-sort nodes, and min-sort nodes. The functionality of these three node-types is shown in Figure 6.111, along with abitonic sorting network for N = 16 inputs.
The mark subsection of Figure 6.110 contains a single stage of N nodes. The nodes within the mark subsection perform a relatively simple function,
Free-Space Digital Optics 495
x y
# x y
x y
max(x,y) min(x,y)
x y
* min(x,y) max(x,y)
Figurc 6.111. Batcher's bitonic sorting network (N = 16).
because each node merely compares the destination addresses ol' the two packets that are directed at it. Il' the addresses are the same, then the node inserts a logical "0" into the trap ftag of the rightmost packet.
The expander section of Figure 6.110 contains IOg2 (N) stages with N /2 switching nodes in each stage, and consecutive stages are interconnected via connections that are topologically equivalent to the perl'ect shuffie. The nodes in the expander section are (2, 2, 2) switching nodes that must actively route the data packets based on the status of the trap ftag and the destination address contained within each packet header. If two packets enter anode and both are untrapped, then it is guaranteed that they can be routed without
496 Chapter 6
contention for the node's output port, so the node only needs to read one of the two packet headers to determine how to route the two packets. If two packets enter anode and one of them is trapped, then the node only needs to read the packet he ader on the untrapped packet to determine how to route the two packets.
The PLA logic required to implement the sorting node's finite state machine was shown in Figure 6.43. Crossover interconnections are used between consecutive stages of Figure 6.43, and since granularity of the interconnections is repeated after the first four stages, the wraparound techniques described in an earlier section can again be applied. Thus, the single node shown in Figure 6.43 would require only two rows of 16 logic gates within four device arrays. Similar implementations are possible for all of the other node-types used within the optical implementation of the Batcher-banyan sorting network. The connections between nodes in consecutive stages can typically be provided by crossover interconnections with gran ulari ti es larger than those shown in Figure 6.43.
6.4.5.3. Extended Generalized ShujJle (EGS) Networks
The EGS class of networks is a large set of networks that are weH suited for photonic switching applications. EGS networks offer many flexibilities that permit the system designer to modify the network characteristics to fully capitalize on the strengths of photonics while circumventing the limitations of photonics. If the network characteristics are chosen appropriately, an EGS network will display most of the features that are desirable in all networks. These features include low hardware costs, low blocking probabilities with the potential for nonblocking operation, high degrees of faulttolerance, the ability to transport point-to-point or broadcast trafik, and relatively simple, fast path hunt operations. In addition to these general features, EGS networks also display several specific characteristics that are helpful for photonic applications. For example, the interconnection patterns used between the node-stages can be easily modified as photonic technologies develop and new interconnection patterns become possible. This allows the EGS network designs to use many of the interconnect implementations that were described in previous sections. In addition, EGS networks can use many different types of nodes which permits them to evolve as photonic technologies permit more powerful node designs. Finally, EGS networks permit designers to take advantage 0fthe ever-increasing size ofthe photonic device arrays, because networks with similar operating characteristics can be designed with a large number of smaH device arrays or with a small number of large device arrays. These built-in flexibilities within EGS networks make them a very solid foundation on which to design photonic switching systems.
Free-Space Digital Optics 497
In general, an EGS network is a multistage interconnection network (MIN) that pro vi des interconnections between stages of switching nodes, where a single stage is a set of identical switching nodes. Let Si, i = 1, ... , s, denote the ith stage of an s-stage MIN, where Si contains ri nodes, each having ni inputs and mi outputs. The N = rl x nl inlets of the switching nodes of SI are the N inlets of the MIN, and the M = rs x ms outlets of the switching nodes of Ss are the M outlets of the MIN. For i = 2, ... , s, the inlets of the switching nodes of Si are connected by links only to outlets of the switching nodes of Si-" and for i = 1, ... ,s - I, the outlets ofthe switching nodes of Si are connected by links only to inlets of the switching nodes of Si+ I. Since all stage i outlets must be connected on a one-to-one basis with all stage i + 1 inlets, it is required that ri x mi = ri+ I x ni+" for 1 ~ i ~ s - 1. Thus, N-input, N-output MINs contain multiple stages of nodes (nodestages), and each consecutive pair of node-stages is connected by the links within a link-stage. Nodes actively route the data, while links passively transport da ta from one node-stage to the next. Any type of switching node can be used in the stages of an EGS network, and the type can be changed from stage to stage, but a single node-type must be used within a single stage. If the triplet notation is used to describe the switching node type within an EGS network, then the nodes used in stage Si are described by the following: (ni, mi, cJ, where Ci is the capacity of the node. This parameter indicates the number of channels that can be actively passed through the node at a given time. For example, the (2, 2, 2) node has two inputs and two outputs with the capability ofhaving both inputs and outputs simultaneously active at any time, so Ci = 2. The (2, 2, 1) node has two inputs and two outputs, although both outputs contain the same information. Hence, the node has Ci = 1. Note the input AND gates select wh ich input channel can pass its contents to the outputs. The 2-module is also a 2-input, 2-output node which requires that only one input be active at any time, but it is more restrictive than the (2, 2, 1) node. Since the 2-module cannot block signals entering on the inputs, it requires that no signal be present on the unused input line.
An EGS network is aMIN with a particular specified sequential interconnection pattern. AMIN G is defined to be an EGS network if either of the following two conditions holds. Condition 1: For every Si of G there exists a one-to-one mapping j; from anode in stage Si, where the node is contained in the integer set {O, 1, ... , ri - I}, onto the integer set {O, 1, ... , ri - I} such that, for i = 1, 2, ... , s - 1, switching node a in stage Si is connected to switching node b in stage Si+ I if and only if/;+ I (b) is an element of the set {[f,(a)mi + od mod ri+ I}, where 0i is a constant contained in the set {O, 1, ... , mi- d and mi is the number of outputs from any node in stage Si. Condition 2: For every Si of G there exists a one-to-one mapping Yi from anode in stage Si, where the node is contained in the integer set
498 Chapter 6
{O, I, ... , ri-d, onto the integer set {O, I, ... , ri-.} such that, for i = 2, 3, ... , s, switching node a in stage Si is connected to switching node g in stage Si-I if and only if Yi-I(g) is an element of the set {[y;(a)ni + iJ mod ri- d, where ii is a constant contained in the set {O, 1, ... , ni- d and ni is the number of inputs to any node in stage Si. These two conditions may be equivalent in some cases, but in general they are not. The two conditions assert interconnection properties for G from two different perspectives. For two stages i and i + 1, Condition 1 defines an interconnection pattern from the perspective of the switching nodes in stage i, whereas Condition 2 does the same from the perspective of stage i + 1. Condition 1 essentially says that aMIN G is an EGS network if one can label the switching nodes in each stage i from 0 through ri - \, such that switching node 0 in stage i is connected to switching nodes 0 through mi-I in stage i + 1, switching node 1 in stage i is connected to switching nodes mi through 2mi-1 in stage i + 1, and so on where each succeeding switch node in stage i is connected to the next mi switching nodes in stage i + 1 in a cydic fashion; i.e., when the last switching node (ri+ 1 - 1) in stage i + 1 is reached, the next switching node to be connected starts over again at O. Similarly, Condition 2 essentially says that aMIN G is an EGS network if one can label the switching nodes in each stage i from 0 through ri-I, such that switching node 0 in stage i is connected to switching nodes 0 through ni-I in stage i-I, switching node 1 in stage i is connected to switching nodes ni through 2ni-1 in stage i-I, and so on, where each succeeding switch node in stage i is connected to the next ni switching nodes in stage i-I in a cyclic fashion; i.e., when the last switching node (ri-I - 1) in stage i-I is reached, the next switching node to be connected starts over again at O. (112)
EGS networks, then, are a broad dass of MINs that do not place any restrictions on the number of nodes within the node-stages or on the number of node-stages within the MIN. In addition, EGS networks do not require the nodes in the network to have any particular functionality. Thus, acceptable EGS networks can be designed using (n, m, c) nodes containing n inputs, m outputs, and a capacity of c, where n and m can be any positive integer, and c can be any positive integer less than or equal to the sm aller of the two values n and m. They can also be designed using n-module nodes, which are so simple that they cannot even be described using the triplet terminology. For convenience, a new parameter will be defined which describes the functionality of the most common types of nodes used in EGS networks. This parameter, known as the alpha (a) of the node, is defined to be a = 2 for full capacity nodes where c = the minimum of n and m, a = I for capacity I nodes where c = I, and a = 0 for n-module nodes.
By definition, EGS networks have link-stage connections that are sequentially interconnected (such as the shuffie interconnect), or they have link-stage connections that are isomorphie to the shuffie network. Such a
Free-Space Digital Optics 499
topologieally equivalent network ean be made with the erossover intereonneet, the banyan intereonneet, the n-eube intereonneet, the modified data manipulator intereonneet, or the flip intereonneet, so all of these networks are subsets of the EGS c1ass of networks. The designer of a photonie network ean seleet any of these intereonneets, and the deeision will undoubtedly be based on the simplieity and effieieney of the resulting optieal intereonneetions.
The EGS networks deseribed in this ehapter will be limited to a small subset of the general EGS c1ass of networks. For positive integers n, k, F, and s this sub set will have N = nk inputs, a fan-out seetion eomposed of 1 x F nodes, a switehing seetion eomposed of s stages eontaining n-input noutput nodes with parameter a, a fan-in seetion eomposed of F x I nodes, and N = nk outputs as shown in Figure 6.112. As a result, every node-stage in the switehing seetion eontains NFj n n-input n-output switehing nodes. An important parameter required in the design of EGS networks is the probability of bloeking of the network, P(B). For EGS networks, the variables N, F, s, n, and a ean be used to approximate P(B), and one ean then represent the entire EGS with the sextuplet [N, F, s, P(B), n, a]. This approximation ean be shown to be given by (see Appendix):
P(B) = [I - [I - (n - l) j (FnU-I)y - a+lyn'/N
A 3-D view ofthe P(B) given by this equation is illustrated in Figure 6.113. Note that there is a preeipitous drop in P(B) at various values of sand F, suggesting the possibility of boundary eonditions for striet1y nonbloeking (SNB) operation. This equation ean be manipulated to give:
x = In ( - Fns In [I - (I - (n - 1 ) j (Fna -I))' ac '])
Fanout Switching Fanln 1 x4 Section Section Section
nodes
N=4 N=4
Figure 6.112. EGS network.
500 Chapter 6
-10
-20
-30
-40
15
F
30
Figure 6.113. 3-D plot of P(B) versus sand F for an EGS network with N = 256 and 2-modules.
where X is
X = In (N) + In [In (ljP(B)]
From this equation, we can plot the relations hip between s, F, and X. This is illustrated in Figure 6.114, from which it can be observed that a network with a given N, P(B), n, and a can have a range of shapes varying from short and wide (s = smalI, F= large) to long and thin (s = large, F= smalI).
An EGS network using n-input n-output nodes with parameter a can be shown to be strictly nonblocking if
FnSjN + (n - 1)2
x lns - 2(a - I) j(FN) j ?: rn(s- a)/2(2nS2/2 + (n - 1)(1 - S2») 1
+2l[(n-l)(s-k+ 1- a)-I](ns + l - a)j Nj+ 1
Free-Space Digital Optics
F
20
10 4
\ 6
SOl
K ... _---1"---__.
\\\\16 1,\\ IOI~
s 10 20
Figure 6.114. F versus s for various values of I( in an EGS network with N = 256 and 2-modules.
where 0 ~ S ~ 2k - 2, S2 denotes the remainder when dividing s + a by 2, and N = nk • Ifthe fan-out/fan-in seetions are implemented using 2-D OEICs aeting as binary splitters/eombiners respeetively, the total number of nodestages (n required in an EGS network is T = s + 2 log2 F. The number of nodes PJ stage is NF/n, thus the size of the 2-D OEIC node arrays is JNF' x NF/n. The SNB regions of an EGS network as a funetion of F and s are illustrated in Figure 6.115 for a network with N = 256 inputs and outputs eonstrueted from (2, 2, 0) nodes, or 2-modules. The eorresponding node array size is shown below eaeh F value. This F versus s plot indieates that for SNB operation, larger values of F will typieally require smaller values of s, and smaller values of F will typieally require larger values of s. The optimum operating point using eurrent deviees (which tend to have smaller sizes) is indieated by the eircle in Figure 6.115, and it illustrates that an SNB EGS network with N = 256 inputs will require 19 deviee arrays of size 128 by 64. The optimum operating points have been ealculated for SNB EGS networks of various sizes (N), and the results are shown in Table 6.4. Not all switehing applieations require SNB operation. Many applieations ean tolerate small amounts of bl oe king within the network. The hardware eosts of EGS networks ean be deereased if the applieation will allow nonzero bloeking probabilities, beeause Fand s ean be redueed from the SNB values shown in Table 6.4. Simulations were used to determine the bloeking probability as a funetion of s with fixed N and F. The results for a network with N = 256 and F = 16 (shown by the gray li ne in the bloeking region of Figure 6.116) are plotted on the dark line in Figure 6.117. In this figure the bloeking probabilities drop rapidly as s is inereased, as was evident in the 3-D view of Figure 6.113. If a P(B) of 10 - 8 is aeeeptable, then a [256, 16, 9, 10-8, 2, 0] EGS network ean be used. This eorresponds to a network with T = 17 nodestages of size 64 by 32, thus providing a savings in hardware eost over the
502 Chapter 6
fanoul f ( array size)
1024 (256x512)
256 ( l28x256)
64 (6-' 128)
16 Blocking (32x641
4 (l6x32)
1 (8xI6)
0 2 3 4 5 6 7 8 9 10 II 12 13 14 15
umber or swilching seclion lages ( )
Figure 6.115. Required values of Fand s for nonblocking EGS networks with N = 256 and 2-modules.
SNB network shown in Figure 6.116. The P(B) simulations were also used to study the effects of faulty nodes on the operation of an EGS network. The gray line plots in Figure 6.117 show that the blocking probability will increase as faulty nodes are added to the MIN section of the EGS network, but the increases are relatively small. As a result, a few extra stages can be
Table 6.4. Hardware Costs (Minimizing the Device Array Size) for StrictIy Nonblocking EGS Networks
with 2-Modules and Various Values of N
NO. of NO. of network logic gates NO.of
inputs (N) per device arra y device arrays
16 8 x 16 10 32 16 x 32 13 64 32 x 64 15
128 32 x 64 18 256 64 x 128 19 512 64 x 128 23
1024 128 x 256 24 2048 256 x 512 26 4096 256 x 512 28
Free-Space Digital Optics
F=16
1 024x2048 +-+--+--+4I--4-4~--1i---~ 512xl024 +--+--+--+--lJr--+--+---1~i---1--
256x512 +--+--+-+--++-I--I--+--+--+
l28x256 +-+--+--+-+--\I--4~--1fil:e 64xJ28
of device +-+-+-t--I--1\-+~t-+-4I array 32x64+-~~-+~~~~+-~~~"-4~~~+-~
16x32+-+--+-+-4~~L-~4-~~-+-4~~~+-~
8x16+-+--+--+-+-4-4~--1i---~~+-+-+-4-~~
4x8+-~-r-+-4--1~r-+-+-~-r-+-4--1~r-+-~
2x4+-~-+-4-t-+-+-+-+-4~~+-~+-+_t-+ Ix2+-+--+-+-4--1~r-+-4-+-+-+-4~~~+-~
10 11 12 13 14 15 16 17 18 1920 21 22 23 24 25 26
Number or device arrays (T)
503
Figure 6.116. Required values of T and device array size for nonblocking EGS networks with N = 256 and 2-modules.
added to the network during the design phase to permit the network to tolerate these faults and still maintain acceptable blocking probabilities. Catastrophic faults can still occur within the network, and the only solution to this problem is to add redundancy. For a photonie free-space system, the
Probabilily of
blocking peR)
1 -I
10 -2
10 -3
10 -4
10 -5
10 -6
10 -7
10 -8
10
0% faully nodes in witchlng section
1 % faully nodes in swllching section
3% faully nodes in swilching seclion
8 9 10 I1 12 13 14 15 16 17 18 19 20 21 22
umber or device array ( T )
Figure 6.117. P(B) versus number of device arrays far an EGS network with N = 256, F = 16, and 2-modules.
504 Chapter 6
amount of required redundancy is related to the MTBF of the lasers. For a [256, 16,9, 10-8,2,0] EGS network, the system down time was calculated as a function of the MTBF of the lasers. Figure 6.118 shows that triple- or quad-redundancy may be required to yield acceptable system downtimes ( < 2 hours in 40 years) for telecommunication applications.
In most practical EGS network designs, there are many paths between any input and any output in the network. In fact, in an EGS network with N inputs, N outputs, a fan-out of F, s stages in the switching section, and n-input n-output nodes with parameter a, it can be shown that there are Fns / N paths between any input and any output. To control the network, there needs to be a method of choosing one path through the network from any inlet x to any outlet y, where x = {Xk . . . x2xd and y = {Yk ... Y2Yd respectively represent the binary input address and the binary output address for the path. A path p of the Fns / N possible paths through the network will pass through node i of the ith stage, where
nodei(X'P,Y) = l(FnSx + Np + y) / ns + 1 - iJmod(NF/2)
For the case where n = 2 this equation reduces to
nodei(X'P,Y) = l(F2'x + Np + y)/2s + 1- iJmod(NF/2)
Observe, in this special case, the numerator can be represented by the binary pattern
5y lern downtirne
(hrs in 40 yrs) D sys
o 2 3 MTBF of lasers (years)
Figure 6.118. System down time versus MTBF of lasers in redundant EGS networks.
4
Free-Space Digital Optics 565
where the term n s shifts the binary location of the inlet address IOg2 F + s bit positions to the left and the term N shifts the binary representation of the path number, p, IOg2 N positions to the left . The denominator and the modulo function in the equation create a shifting window of length IOg2 N + IOg2 F - I, which identifies the binary address of the traversed node, node;, in stage i. For any stage i within the EGS network, the right edge of this window is placed s + I-i bits from the right end of the numerator's binary pattern. Methods have been devised that determine the disjoint paths throughout the network allowing simple and fast path hunting algorithms and hardware. A simple example is shown in Figure 6.119; there is a path set up between inlet x = 101 and outlet y = 100. Note how the window shifts for each stage and how the location of the node is found in the window. Also, note how the bit to the left of the window identifies which input will receive the signal (0 = upper input, I = lower input) and the bit to the right of the window teils wh ich output will send the signal to the next stage (0 =
upper output, I = lower output) . In conc1usion, EGS networks offer several advantages for photonie
switching applications. First, they offer reduced network complexity (N [log2 N]2 instead of N 2) and very low blocking probabilities that can be forced to be zero with sufficient hardware. Thus, EGS networks can be designed for any given blocking probability. They permit nodes of various types, and they also permit any interconnect topology that is topologically
x x X 3 1 I
000
00 I
010
o I I
100
101
I 10
111
XlzX P, Y3YIY,
1011100
1 1 I 00
Xl IP1"3 YI Y,
1011100
Ä3Xl P1'3' Y,
1011100
X l2 IPt'3"1"1 I 0 I I 1 0 0
Figure 6.119. Path hunt algorithm for EGS networks.
000
001
010
Oll
100
101
I 10
I I I
506 Chapter 6
equivalent to the shuffie. Thus, the network stages can be fabricated from similar modules. Additionally, EGS networks permit an important trade-off to be made between the number of stages and the required fan-out (wide versus thin). It has been shown that fault-tolerant networks are possible within the EGS dass of networks. It has also been shown that path hunts within EGS networks are simple, and it can be shown that the networks can be based on centralized control or can be self-routing. Finally, simulations indicate that EGS networks can provide efficient point-to-point connections as weIl as broadcast (one-to-many) connections. Thus, they may find applications in many different types of systems in the future.
6.4.6. Thoughts on the Future of Free-Space Photonie Switching
Although it is practically impossible to predict the future in a field that is growing and changing as rapidly as the field of free-space photonic switching, some possible trends can be predicted. One of the obvious trends is the improved speed and density of optical logic devices that will be used in systems in the future. In addition, optical logic devices will undoubtedly be coupled with varying degrees of electronics to produce smart pixels. This will permit free-space photonic switching systems to carry data with higher bit-rates and will also permit very large networks to be constructed. The development of high-powered surface emitting lasers will also play a large role in the networks of the future. Micro-optics (such as lenslet arrays) will undoubtedly become more important as systems require larger and larger fields of view in the optical imaging systems. In addition, dynamic interconnections based on four-wave mixing or based on electrically controlled components (such as deformable mirrors) mayaiso find a place in future switching networks. The use of holograms for interconnections within the switching networks mayaiso become common as more efficient holographic techniques are developed. In general, the fie1d of free-space photonic switching is still in its infancy, but it is a rapidly growing field that will continue to improve over time.
6.5. Appendix: P(B) Approximations for EGS Networks
In order to calculate an approximate expression for the blocking probability P(B) within an EGS network, several assumptions about the network must be made. However, the assumptions that must be made will typically differ depending on the node-type that is used in the network. Thus, the approximations will be developed in three different derivations : one for (n, n, n) nodes where a = 2, one for (n, n, 1) nodes where a = 1, and one for
Free-Space Digital Optics 507
n-module nodes where a = O. Then, a comparison of these three approximations will prove to yield a single approximation formula for the blocking probability within an EGS network.
6.5.1. Derivation 1: EGS Networks with (n, n, n) Nodes
Assume we are trying to set up a connection from an idle inlet to an idle outlet. There are Fns/ N potential paths between this inlet and this outlet. Assume the probability that the connection is blocked within each of these potential paths is independent. (Note: This is a weak assumption, because some of these paths share links.) Given these assumptions, we can write
where Pp(B) is the prob ability that a given single path between the inlet and the outlet is blocked.
Now, a formula for Pp(B) must be developed. We know that Pp(B) =
I - Pp(I), where Pp(I) is the probability that a given single path between the inlet and the outlet is idle. It becomes apparent that there are s - I linkstages where our connection can be blocked, and each of these link-stages has (NF) links within it. (Note: The connection cannot be blocked in the fan-out or fan-in sections.) If we are trying to set up our connection when the network is fully loaded (except for the connection between our idle inlet and our idle outlet), then there are N - Iother connections already using links within the network. Thus, each link-stage has N - I busy links, and the probability offinding a busy link is given by (N - I)/(NF) ~ N/(NF) =
I/F. To set up our connection, we must go from link-stage to link-stage and
find a set of s - I idle links that make up a path between our chosen inlet and outlet. In any link-stage, we assume that we have already found an idle set of links leading from our inlet to one of the n inputs on the node in the preceding node-stage. Since we have a particular path in mind, we also assume that we want to go to a particular output from that node. We must then determine the probability that we are blocked by the connections that might be passing through the n - Iother inputs on that node. We are blocked at the output of the node if and only if both of the following are true: (I) one of the other n - I inputs to the node is busy and (2) that particular busy input is already being routed to our desired output port on that node. Fortunately, we can develop expressions for the probabilities that each of these events will occur. P(another input is busy) = P(an incoming link is busy) = 1/ F. P(a busy input to the node is routed to our desired output link) = I/n. Thus, the probability that a particular one of the other n - I input links to the node will block our desired output link is given by
508 Chapter 6
Ij(Fn). Since there are n - 1 potential input links that can block our desired output link, and since each of these input links must be connected to a different output link on the node (the selected output links are mutually exclusive), the probability that any of the n - I input links will block our desired output link is given by:
P(any input link blocks desired output link) (n-I)
= I P( one input link blocks desired output link)
(n-I)
P(any input link blocks desired output link) = I (lj(Fn)) i~ I
P(any input link blocks desired output link) = (n - l)j(Fn)
Thus, the probability that the n - Iother input links do not block our desired output link is given by 1 - (n - l)j(Fn), which is also the probability that our desired output link is idle.
This same analysis is carried out for each link-stage starting at the input of the network and working through all (s - I) link-stages where a block can possibly occur. Assuming the probability of being blocked in one stage is entirely independent of the probability of being blocked in another stage, we can state that the probability of the entire path being successfully routed is given by the probability that the path passes through idle nodes in all of the s - 1 link-stages. In other words,
p p(1) = [I - (n - l)j(Fn)y-1
Thus, the probability that the particular path is blocked is given by
Pp(B) = 1 - [I - (n - l)j(Fn)y-1
The desired connection between the inlet and the outlet is blocked only if all Fns j N potential paths are blocked, so from the first equation in this derivation,
P(B) = (I - [I - (n - l)j(Fn)J'-I(n'IN
6.5.2. Derivation 2: EGS Networks with (n, n, I) Nodes
Assume we are trying to set up a connection from an idle inlet to an idle outlet. There are Fns j N potential paths between this inlet and this outlet. Assume the probability that the connection is blocked within each of these potential paths is independent. (Note: This is a weak assumption, because
Free-Space Digital Optics S09
some of these paths share links.) Given these assumptions, we can write
where P p(B) is the probability that a given single path between the inlet and the outlet is blocked.
Now, a formula for Pp(B) must be developed. We know that Pp(B) = I - Pp(I), where Pp(l) is the probability that a given single path between the inlet and the outlet is idle. It becomes apparent that there are s nodestages where our connection can be blocked. (Note: The connection cannot be blocked in the fan-out or fan-in sections.) If we are trying to set up our connection when the network is fully loaded (except for the connection between our idle inlet and our idle outlet), then there are N - lother connections already using links within the network. Each ofthe link-stages has (NF) links within it, and each link-stage has N - 1 busy links, so the probability of finding a busy link is given by (N - 1)/(NF) ~ N/(NF) = I/F.
To set up our connection, we must go from node-stage to node-stage and find a set of s idle nodes that make up a path between our chosen inlet and outlet. In any node-stage, we assume that we have already found an idle set of links leading from our inlet to one of the n inputs on the node. Since we have a particular path in mind, we also assume that we want to go to a particular output from that node. We must then determine the probability that we are blocked by the connections that might be passing through the n - 10ther inputs on that node. We are blocked at the output of the node if and only if both of the following are true: (1) one of the other n - 1 inputs to the node is busy and (2) that particular busy input will block the path to our desired output port on that node. Fortunately, we can develop expressions for the probabilities that each of these events will occur. P(another input is busy) = P(an incoming link is busy) = I/F. P(a busy input to the node blocks our desired output link) = 1, because the node has a capacity of 1. Thus, the prob ability that a particular one of the other n - 1 input links to the node will block our desired output link is given by 1/(F). Since there are n - I potential input links that can block our desired output link, the probability that any of the n - 1 input links will block our desired output link is given by
P (any input link blocks desired output link); (n-I)
= L P (one input link blocks desired output link)
(n-I)
P (any input link blocks desired output link) = L (l/(F)) ;=1
P (any input link blocks desired output link) = (n - 1)/(F)
510 Chapter 6
Thus, the probability that the n - Iother input links do not block our desired output link is given by I - (n - I)/(F), which is also the probability that our desired output link is idle.
This same analysis is carried out for each node-stage starting at the input of the network and working through all (s) node-stages where a block can possibly occur. Assuming the prob ability of being blocked in one stage is entirely independent of the prob ability of being blocked in another stage, we can state that the probability of the entire path being successfully routed is given by the probability that the path passes through idle nodes in all of the s node-stages. In other words,
pp (!) = [1 - (n - l)/(F»)'
Thus, the probability that the particular path is blocked is given by
Pp(B) = I - [I - (n - I)/(F)]'
The desired connection between the inlet and the outlet is blocked only if all Fn"/ N potential paths are blocked, so from the first equation in this derivation,
P(B) = (I - [I - (n - 1)/(F)Y)Fnl/N
6.5.3. Derivation 3: EGS Networks with N-module modes
Assurne we are trying to set up a connection from an idle inlet to an idle outlet. There are Fns / N potential paths between this inlet and this outlet. Assurne the probability that the connection is blocked within each of these potential paths is independent. (Note: This is a weak assumption, because some of these paths share links.) Given these assumptions, we can write
where Pp(B) is the probability that a given single path between the inlet and the outlet is blocked.
Now, a formula for Pp(B) must be developed. We know that Pp(B) =
I - Pp(I), where Pp(I) is the probability that a given single path between the inlet and the outlet is idle. It becomes apparent that there are s nodestages in the switching section where our connection can be blocked. In addition, the last node-stage in the fan-out section must have control on it to prevent data from corrupting undesired n-modules in the first node-stage of the switching section, so the connection can be blocked in the last nodestage of the fan-out section. (Note: The connection cannot be blocked in
Free-Space Digital Optics 511
the other node-stages of the fan-out section or in any of the node-stages in the fan-in sections.) Thus, there are a total of s + I node-stages where our connection can be blocked. If we are trying to set up oUf connection when the network is fully loaded (except for the connection between oUf idle inlet and oUf idle outlet), then there are N - Iother connections already using links within the network. Each of the link-stages has (NF) links within it, and each of these N - I active connections uses a single link in each linkstage for the routing of data and also corrupts n - I links in the stage (due to the simple operation of an n-module). Thus, the probability of finding a busy link within a link-stage is given by n(N - l)j(NF)::::; Nnj(NF) = njF.
To set up oUf connection, we must go from node-stage to node-stage and find a set of s idle nodes that make up a path between OUf chosen inlet and outlet. In any node-stage, we ass urne that we have al ready found an idle set of links leading from OUf in let to one of the n inputs on the node. Since we have a particular path in mind, we also assurne that we want to go to a particular output from that node. We must then determine the probability that we are blocked by the connections that might be passing through the n - Iother inputs on that node. We are blocked at the output of the node if and only if both of the following are true: (I) one of the other n - I inputs to the node is busy and (2) that particular busy input will block the path to our desired output port on that node. Fortunately, we can develop expressions for the probabilities that each of these events will occur. P(another input is busy) = P(an incoming link is busy) = nj F. P(a busy input to the node blocks OUf desired output link) = I, because the n-module node routes all of its n inputs to all of its n outputs. Thus, the prob ability that a particular one of the other n - I input links to the node will block our desired output link is given by nj(F). Since there are n - I potential input links that can block our desired output link, the probability that any of the n - I input links will block OUf desired output link is given by
P (any input link blocks desired output link) (tl-I)
= I P (one input link blocks desired output link) ;= I
(tl-I)
P (any input link blocks desired output link) = I (nj(F» i=l
P (any input link blocks desired output link) = n(n - l)j(F)
Thus, the probability that the n - Iother input links do not block OUf desired output link is given by 1 - n(n - l)j(F), which is also the probability that OUf desired output link is idle.
This same analysis is carried out for each node-stage starting at the input of the network and working through all (s + 1) node-stages where a
512 Chapter 6
block can possibly occur. Assuming the probability of being blocked in one stage is entirely independent of the probability of being blocked in another stage, we can state that the probability of the entire path being successfully routed is given by the probability that the path passes through idle nodes in all of the s + 1 node-stages. In other words,
Pp(I) = [1 - n(n - 1)/(F)y+ I
Thus, the probability that the particular path is blocked is given by
Pp(B) = 1 - [1 - n(n - l)/(F)],+I
The desired connection between the inlet and the outlet is blocked only if all Fns / N potential paths are blocked, so from the first equation in this derivation,
P(B) = (1 - [1 - n(n - 1)/(F)y+I(",/N
6.5.4. Comparison of the Three Derivations
A comparison of the three derivations above permits one to write a general approximation formula describing the blocking probability P(B) for any EGS network with N inputs, N outputs, a fan-out of F, and s nodestages in the switching section containing n-input n-output switching nodes with parameter a. The general approximation formula for the blocking probability is given by
It is interesting to note the important role played by the node parameter a within this general formula, indicating that the power of the node has a very large impact on the operational characteristics of an EGS network.
6.6. Problems
I. 00 a simulation to calculate the blocking probability for a fully-Ioaded shuffie network with N = 8 inputs and N = 8 outputs.
2. Oraw the combinationallogic for a (3, 2, 2) node.
3. Oraw an N = 16 input TIAOM network and then outline in a dark color all of the links that need to be eliminated to produce an N = 16 input Banyan network. This shows that the interconnections within the Banyan network are a subset ofthe interconnections within the TIAOM network.
Free-Space Digital Optics 513
4. Draw an N = 16 input shuffie and an N = 16 input Banyan network with the physical address of the nodes labeled inside the node box in sequential order from top to bottom (starting with zero). Then redraw the same Banyan network with a logical address for each of the nodes, so that the connections between the logical addresses in the redrawn Banyan network are identical to the connections between the physical addresses in the shuffie network. This shows that the two networks are topologically equivalent.
5. Using steps similar to those shown in the section on topological equivalence, prove that the shuffie network is topologically equivalent with the inverse shuffie network.
6. For the strange (probably nonusable) network shown in Figure 6.P.l, describe the node mappings using a table, describe the link mappings using a table, and redraw the network using graphical link mapping techniques.
7. Redraw the two networks shown in the Figure 6.P.2 (note that one network has more stages than the other network) and outline in a dark color all of the paths between input port 0 and output port 3 in both of the networks. Then indicate which network would probably have (a)
Figure 6.P.1.
514 Chapter 6
I 'nk· lIo(h·· Lml!.· ,o<l,.. Unk· Il(flr o l .. nL- ud,· I.mk-~U.f~ "il_lt' Sl..lll~t' SltII;!:1' StaEII! :\tagl!' Stil •• '·_111: Slal,C"
U , , 1 I J J • • ....... 0000 0<", 000'
0010 00'0 0011 0011
N.~ 1"_8 InVUh UIUU
0'00 OLIlpUb
0101 0'0'
UIIO 0110 Oll' 0111
nelwork 1
110"- 1\.1(111'- tmk- "" .. I.Ink· Nud,· ' .Ink· ,"."Ir Sl.~ SlqlP SLalIf;Ir .sIM,1l' 'tal:C' SOlI" u , , 2 2 J J
10 .... 0000 0001 000'
001" 00'0 0011 0011
' .. 111 -"-./I Inpul\ "'00 0100 UUlpUb
0101 0'01
tlIIU Oll. 0111 0111
network 2
Figure 6.P.2.
higher eosts, (b) higher bloeking probabilities, (e) higher degrees of fault-toleranee, and (d) longer lateney. Give a short justifieation for eaeh of your answers.
8. Classify eaeh of the following network implementations in Figure 6.P.3 under one of these three classifieations: (a) 2-D implementation, (b) 2-D parallel implementation, or (e) 3-D implementation.
9. List and diseuss three of the potential benefits that free-spaee photonies may offer when eompared to eomparable eleetronie implementations.
10. Given the N = 16 shuffie network shown in Figure 6.PA, deseribe a mathematieal routing algorithm that ean be used by a path hunt proeessor to identify whieh link a path should use to eonneet a speeified input port with a speeified output port. (This algorithm should be eorreet for any stage within the network, and it should only require knowledge of the binary representation of the speeified output port number.)
11. The ehannel graph for network 1 is shown in Figure 6.P.5. Draw the ehannel graph for network 2 in Figure 6.P.5.
12. List four advantages that EGS networks provide to the designer of a photonie switeh.
Free-Space Digital Optics 515
network I network 2
network 3
Figure 6.P.3.
Link· Nudt- Lin"- Nodt· Unk- urdr" Unk- Noolt o I.Ink-S ... ge SUIII! St.la;t S bl&~ S" .. t: Sr..ge Suite Sl.,1' .!<ILalt:'
0 I I 2 I J J 4 • 0000 0000
0001 0001
0010 0010
0011 0011
0100 0100
0101 0101
0110 0110
N=16 0111 0111 N~ 16
Inpub I~Ulpuh
1000 1000
1001 1001
1010 1010
1011 1011
1100 1100
1101 1101
1110 IIIU
1111 1111
Figure 6.P.4.
516 Chapter 6
network 1
network 2
Figure 6.P.5.
13. Assume we have a [512,4,8, P(B), 4, 1] EGS network. (a) Using the strictly nonblocking equation for EGS networks, determine if this EGS network is blocking or nonblocking. Ifit is blocking, use the approximation formulas to approximate the network's blocking probability. (b) How many paths exist between any input and any output in this network? (c) What is the total number of node-stages used in this network if binary splits and combines are used for the fan-out and fan-in? (d) How many nodes are there in each stage of this network? (e) What size device array (in terms ofnumber ofnodes per row and number ofnodes per column) might be used for a free-space photonie implementation of this network? (f) Assume a connection is provided between input 5 and output 14 on path 2. List the address for each of the nodes that this connection passes through in each stage of the EGS network.
14. Repeat Problem 13 for an [8,4,2, P(B), 2, 2] EGS network.
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Free-Space Digital Optics 517
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518 Chapter 6
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Index
Aberrations, 247, 25R-265 Active switching transistor devices, 228-233 Architectural building blocks. 366-419 Architectures, 15, 96-112, 336-365, 333,
366-4IR. 419-512 Architectures based on logic devices, 333
Backward gain. 75 Balanced-bridge switch, 60 Beam array combination, 293-294 Beam combination, 282-292
retleetion-mode nonlinear interferenee filters, 303-304
retlection-mode optieal logic etalons, 302-303
retlection-mode S-SEEDs, 304-307 transmission-mode S-SEEDs, 300-302
Bit- and bloek-switehing, 116-119 Bit- vs. block-multiplexing, 114 Blocking probability. 95, 356, 496-512
CDMA switching. 119-121 Combined time- and space-division switching,
121-123 Combined WDMA and subearrier multiplexed
systems, 148 Communication energy, 7-13 Complexity, 356, 496-512 Control unit, 361-365 Coupler count, 110 Cross talk, 110, 112 Crossbar networks, 99-107, 427-446
directional coupler switehes, 99-107 feedforward multistage crossbar, 439-446
Crossbar networks (Cont.)
self-routing single-stage crossbar, 431-439 splitter/combiner single-stage crossbar, 429-
431
Degrees of freedom, 294 Diffraetion limit, 269-271 Digital electro-optic switches, 63-65 Directional couplers, 16-18. 47-60, 99-112
bar state design, 53 bends in waveguides, 55 eoupling between waveguides, 48 cross state design, 51 current system design constraints, 5R polarizaiton, 56
Dynamic Moss-Burstein shift, 172
Electro-optic phase modulators, 45-46 Exeiton saturation nonlinearity, 173
Fabry-Perot amplifiers, 69-72 Fabry-Perot etalon, 179-191 Fast eoherent resonant nonlinearities, 209 Fast nonlinearities, 204-2\0 Fault-tolerance, 356-361 First-order optics, 249-258
523
Free-space digital opties, 333-521 Free-space optical hardware, 245-331 Frequeney-division multiple aeeess, 125 Fully connected networks, 86-87
Geometrie aberrations, 258-265
Hardware cost, 356-361
524
Imaging, 247-273 Index ellipsoid, 40-43 Induced transition nonlinearity, 207-208 Interconnecton, 403-419
classification of interconnections, 403-413 2-D and 3-D interconnections, 413-419 image-plane, 312-317 issues, 307-317 link -stages, 403 pupil-plane, 309-311
Intrinsic bistability, 179-204
Kerr effect in inorganic solids, 206-207
Latency, 356-361 Linear electro-optic effect, 43-45 Linear polarizers, 275-278 Logic devices, 29-33, 163-233 Loss, 110-112
Material gain, 66-68 Modulators, 45-47 Multi-stage interconnection networks, 83, 340-
361,403-419 Batcher-Banyan sorting network, 492-496 Benes architecture, 107-110 crossover networks, 463-482 extended generalized shuffte, 496-512 folded 2-shuffte network, 456-463 q-shuffte networks, 446-463 2-shuffte network, 448-453, 456-463 4-shuffte network, 453-456 three-dimensional interconnection networks,
31-32 Multidivisional fabrics, 27-29 Multihop lightwave networks, 145-148 Multiple-access networks, 113-114
Near traveling wave amplifiers, 72-74 Network topologies, 341-351 New architectures, 15-16 Node-stages, 366-403 Nodes, 377-398
classification of nodes, 366-377 electronic nodes, 32-33 macroscopic vs. microscopic views of, 398-
403 2-module node, 379-381 (2,1,1) node, 381-384 (3,1,1) node, 384-387 (4,4,4) node, 387-388 switching nodes, 30-31, 366-403
Index
Nonlinear interference filters, 192-195 Nonresonant optical nonlinearities, 167-169
Optical amplifiers, linear, 65-76 Optical FDMA FSK coherent detection, 140-
142 Optical FDMA FSK direct detection, 135-140 Optical logic devices, 163-244 Optical multiple access networks, 128-145 Optical nonlinearities, 166-179 Optical stark shift in semiconductors, 207 Optically transparent devices, 39-82, 96-113 Optically transparent systems, 83-162
cross talk limitations, 112 design parameters, 112-113 guided-wave switches, 99 spacial light modulators, 97-99, 76-82
Output concurrency, 95-96
Packet switching, 124 Partially connected networks, 85-86 Path hunt, 356-361 Pockels effect, 43-45 Polarization, 56, 273-282 Polarization component combinations, 280-282 Polarizing beam splitters, 275-278 Power dissipation, 7-13 Programmable logic arrays, 394-398
Quantum enhanced interband nonlinearities, 208-209
Quantum enhanced intraband nonlinearity, 209 Quantum weil optoelectronic devices, 210-228
Rearrangeably nonblocking networks, 87-90 Redundancy in networks, 94-95 Refractive bistability, 192-197 Resolution, 265-269 Resonant optical nonlinearities, 169-174 Retarders, 278-280 Routerlselector architecture, 104-107
Self-electro-optic effect devices (SEEDs), 174-179, 210-224, 225-226
bistable (two-terminal) SEEDs, 210-212 electroabsorption, 174-179 energy requirements in SEEDs, 222-224 symmetric SEEDs, 212-219 three-terminal SEEDs, 212 transistor-biased SEEDs, 219-222
Skew, 13 Smart pixels, 224-225
Index
Space channels, 16-20 fabrics based on directional couplers, 16-18 fabrics based on optical amplifiers, 18-19 fabrics based on spatial light modulators,
19-20 Space-bandwidth product, 271-273 Space-division switching, 96-97 Space-division switching networks, 83-96 Spatial bandwidth, 14-15 Spatial light modulators, 76-82 Spectral-division multiple access networks,
124-149 Spot array generation, 282-293
binary phase gratings, 285-291 Fourier-plane, 284-285 Fresnel-plane, 284 image-plane, 283 lenslet arrays, 291-293 requirements, 282
Spot size, 265-269 Steady-state non linear etalons, 186-192 Strictly nonblocking networks, 91-94 Subcarrier multiple access systems, 125-128 Switching architectures, 333-512
applications, 336-337 subsystems, 337-340 switch/transmission line interface, 340 switching fabric, 340-361
Switching network characterization, 84-85 Switching systems, 1-4 Symbolic substitution, 388-394 Systems considerations, 75-76
Temporal bandwidth, 4-7 TIADM, 482-492 Time channels, 20-24
525
active reconfigurable fabrics, 20-22 passive shared media fabrics, 22-25
Time-division multiple access networks, 114-124
Time-shared bus network, 421-427 Topological equivalence, 351-356 Transient behavior of nonlinear etalons, 197-
204 Traveling wave amplifers, 68-69
Wavelength channels, 25-27 passive shared media fabrics, 26-27 wavelength interchanger, 25-26
Wavelength-division multiple access network, 142-145
Wide-sense nonblocking networks, 90-91
X-switches, 61-63
Y-branch intensity modulator, 47