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1 EE 435 Lecture 7: High-Gain Single-Stage Op Amps

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Page 1: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

1

EE 435

Lecture 7:

High-Gain Single-Stage Op Amps

Page 2: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

2

Signal SwingHow do the transfer characteristics relate to the signal swing ?

iNV

For this circuit, high gain and large output signal swing for small VEB1

Review

from last lecture:

Page 3: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

3

Signal Swing of Single-Stage Op AmpVDD

VSS

VOUT

V1 V2M1

M2

M3 M4

M5VXX

For high-gain amplifiers, Vd

is inherently very small so are only concerned about output signal swing vs

ViC

iCV

OUTVCC

VCC

VSS

VSS

Generally large swings come at expense of other desirable characteristics

Review

from last lecture:

Page 4: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

4

Signal Swing of Single-Stage Op Amp

iCV

VOUTVCC

VCC

VSS

VSS

iCV

iCV

Wide ViC

and VOUT

range Narrow ViC

and wide VOUT

range

What type of signal swing is needed ?

iCV

Narrow VOUT and wide ViC

range Narrow ViC

and VOUT

range

Expected for catalog parts and overall I/O in many applications

Acceptable when ViC

is fixed

Acceptable when followed by high-gain stage

Acceptable when ViC

fixed and followed by high-gain stage

Review

from last lecture:

Page 5: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

5

Signal Swing of Single-Stage Op Amp

SS

SS DD

DD

OUT

11

T2V

T1 EB1 EB5V V V+ +

EB4V

EB3 T3 T1V V V+ −

iCV

L1

L2

L3L4

Review

from last lecture:

Page 6: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

6

Design space for single-stage op amp

⎟⎟⎠

⎞⎜⎜⎝

⎛⎥⎦

⎤⎢⎣

⎡+

=EB131

0 V2

λλ1A

331 EBTTDDiC VVVVV −−+<

⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD V2

CVPGB

Performance Parameters in Practical Parameter Domain { VEB1

VEB2

VEB5 P}:

EB3DDOUT VVV −<

T2icOUT VVV −>

SSEB5EB1T1ic VVVVV +++>Simple Expressions in Practical Parameter Domain

( )DD SS L

PSRV V C

=−

Review

from last lecture:

Page 7: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

7

Design space for single-stage op amp

1n OX 1

V01 3 T

W4μ C L

Aλ λ I

⎛ ⎞⎜ ⎟⎡ ⎤ ⎜ ⎟= ⎢ ⎥ ⎜ ⎟+⎢ ⎥⎣ ⎦ ⎜ ⎟⎝ ⎠

TiC DD T1 T3

3p OX

3

IV < V +V - V -

Wμ CL

Performance Parameters in Natural Parameter Domain { W1

/L1 W3

/L3 W5

/L5

IT

}:

TOUT DD

3p OX

3

IV V

Wμ CL

< −

T2icOUT VVV −>T T

ic T1 SS1 5

n OX n OX1 5

I IV V + V

W Wμ C μ CL L

> + +

Complicated Expressions in Practical Parameter Domain

n OX 1T

L 1

μ C WGB IC L

⎡ ⎤= ⎢ ⎥⎢ ⎥⎣ ⎦

TL

ISRC

=

Review

from last lecture:

Page 8: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

8

Measurement and Simulation of Op Amps•

Measurement of AV

is challenging–

Because it is so large–

Even harder as AV0

becomes larger–

Offset voltage causes a problem–

Embed in Feedback Network to Stabilize Operating Point•

Stability must be managed•

Use time varying input to distinguish signal information from offset•

Must be well below first pole frequency–

Measurement challenges often parallel simulation challenges•

Measurement of GB is easy

Measurement of R0

is challenging

Page 9: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

9

Single-stage op amps

⎟⎟⎠

⎞⎜⎜⎝

⎛⎥⎦

⎤⎢⎣

⎡+

=EB131

V0 V1

λλ1A

Question –

is the gain achievable with the single-stage op amps considered so far adequate?

If λ1

=λ3

=.01V-1

and VEB1

=.15V, then

( ) 3331501

01011

0 =+

≈...VA

or, in db, AV0db

=20log10

333=50db

This is inadequate for many applications !

What can be done about it ?

Page 10: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

10

Basic Op Amp Design

Fundamental Amplifier Design Issues

Single-Stage Low Gain Op Amps

Single-Stage High Gain Op Amps

Other Basic Gain Enhancement Approaches

Two-Stage Op Amp

Page 11: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

11

Determination of op amp characteristics from quarter circuit characteristics

VDD

F

P

F

P

VSS

2dv

2dv

VBB VBB

VO+ VO

-

IBB

VDD

F

P

F

P

F

P

F

P

VSS

2dv

2dv

VBB VBB

VO+ VO

-

IBB

2Vd

21L

M1

d

OV GGsC

2G

VVA

++

−==

+ ( )

L

M1

L

21

21

M1VO

2CGGB

CGGBW

GG2GA

=

+=

+−

=

Small signal differential half-circuit

Page 12: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

12

Single-Stage High Gain Op AmpsHow can the gain of the op amp be increased?

21

M1VO GG

GA+

−=

21

Recall from Quarter-Circuit Concept

A possible strategy :Increase GM1

or Decrease G1 (and G2

) in Quarter Circuit or Both

Page 13: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

13

Single-Stage High-Gain Op Amps

If the output conductance can be decreased without changing the transconductance, the gain can be enhanced

Will concentrate on quarter-circuits and extend to op amps

Page 14: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

14

Determination of 2-port parameters

Background

Method 1 Open-Short Termination Approach

Determination of {go1

, go2

,gM1

,gM2

}

Method 2 Load Termination Approach

Page 15: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

15

Determination of 2-port parameters

TST

TSTM2 V

Ig −=

Background

Method 1 Open-Short Termination Approach

Determination of {go1

, go2

,gM1

,gM2

}

TST

TSTo2 V

Ig =

By structural symmetry, repeat to obtain gm1

and go1

Page 16: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

16

Determination of 2-port parameters

( )

( ) ( )( ) O2L

M2

TST

2

TSTM2LO22

gsCg

sVsVsA

0VgsCgV

+−==

=++

( )0L

0

bsCasA+

=

Background

Determination of {go1

, go2

,gM1

,gM2

}

Method 2 Load Termination Approach

express the gain A(s) as in form

observe

Page 17: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

17

M1

VIN

M2

VOUT

CL

Analysis Cascode Amplifier

( )( )

⎪⎪⎭

⎪⎪⎬

=−=

=−++

=++

IN1

X2

o2OUT2m21m1o2o1X

o2X2m2Lo2OUT

VVVV

gVVgVgggVgVVgsCgV

VX

,V1

and V2

can be eliminated from these 4 equations

Background

Page 18: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

18

( )( ) ⎭

⎬⎫

=+++

=−+

o2OUTXm2INm1o2o1X

o2XXm2Lo2OUT

gVVgVgggVgVVgsCgV

( )( )

⎪⎪⎭

⎪⎪⎬

=−=

=−++

=++

IN1

X2

o2OUT2m21m1o2o1X

o2X2m2Lo2OUT

VVVV

gVVgVgggVgVVgsCgV

Analysis of Cascode AmplifierBackground

( )( )

m1 o2 m2OUT m1 m2

IN L o1 o2 m2 o1 o2 L m2 o1 o2

g g gV g gV sC g g g g g sC g g g

− + −= ≈

+ + + +

⎟⎟⎠

⎞⎜⎜⎝

⎛+

−≈

m2

o2o1L

m1

IN

OUT

gggsC

gV

Vfor A large: gMEQ

gOEQ

Page 19: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

19

High output impedance quarter-circuits

m1mEQ

m3

o3o1oEQ

gggggg

⎥⎦

⎤⎢⎣

⎡≅

VSS

CLM3

M1

IDB

VDD

VBB

VOUT

VIN

Cascode Amplifier

Output conductance appears to have been decreased !

L

m

o

o

o

mV

m

ooL

mv

CgGB

gg

ggA

gggsC

g)s(A

1

2

3

1

10

3

31

1

⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛≅

⎥⎦

⎤⎢⎣

⎡+

−≅

But must verify in the practical parameter domain to be sure!

Page 20: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

20

High output impedance quarter-circuits

⎟⎟⎠

⎞⎜⎜⎝

⎛•⎟⎟⎠

⎞⎜⎜⎝

⎛=

⎥⎦

⎤⎢⎣

⎡•⎥

⎤⎢⎣

⎡=

EB1LDD

EB33EB11V0

V1

CV2PGB

Vλ2

Vλ2A

⎥⎦

⎤⎢⎣

⎡=

EBV0 λV

2A

Cascode Amplifier Substantial increase in dc gain

No improvement in GB but also no deterioration in GB !

How does this compare with previous amplifier?

⎟⎟⎠

⎞⎜⎜⎝

⎛•⎟⎟⎠

⎞⎜⎜⎝

⎛=

• EBLDD V1

CV2PGB

o3m1V0

o1 o2

ggAg g

⎛ ⎞ ⎡ ⎤≅ ⎜ ⎟ ⎢ ⎥⎝ ⎠ ⎣ ⎦

m1

L

gGBC

Page 21: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

21

High output impedance quarter-circuits

Cascode Amplifier(small-signal equiv)

Quarter Circuit

3

1

OUT

IN

Page 22: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

22

High output impedance quarter-circuits

Cascode Amplifier

Quarter CircuitCounterpart Circuit

Page 23: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

23

Telescopic Cascode Op Amp

Needs CMFB Circuit for VB1 or VB5Either single-ended or differential outputsCan connect counterpart as current mirror to eliminate CMFB

Page 24: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

24

Determination of op amp characteristics from quarter circuit characteristics

Note: Factor of 4 reduction of gain

( )

L

M1

L

21

21

M1VO

2CGGB

CGGBW

GG2GA

=

+=

+−

=GGA M

VOQC −=

L

M

CGGB =

LCGBW =

Small signal Quarter Circuit Small signal differential amplifier

Recall:

Page 25: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

25

Telescopic Cascode Op Amp

Single-ended operation

gOQC

=

gOCC

=

gmQC

=

Page 26: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

26

Telescopic Cascode Op Amp

L

m

CgGB2

1=

Single-ended operation

m1

oo3 o7

o1 o5m3 m7

g-2A = g gg + g

g g

Page 27: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

27

Telescopic Cascode Op Amp

L

m

CgGB2

1=

Single-ended operation

m1

oo3 o7

o1 o5m3 m7

g-2A = g gg + g

g g

This circuit is widely used !!(CMFB circuit not shown)

Page 28: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

28

Telescopic Cascode Op Amp

(CMFB circuit not shown)

• Tail bias current generator shown• I

T

often one of many outputs for current mirror• I

B

and M12

often common to many blocks

Page 29: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

29

Telescopic Cascode Op Amp

Current-Mirror p-channel Bias to Eliminate CMFB•

Only single-ended output available

V SS

VB5

VIN VINM1 M2

M3 M4

M5

M7

M6

M8

VB3

VOUT

CL

M11M12

IB

IT

VDD

Current Mirror Bias

VDD

V SS

VB5

VIN VINM1 M2

M3 M4

M5

M7

M6

M8

VB3

VOUT

CL

M11M12

IB

IT

VDD

Current Mirror Bias

VDD

Standard p-channel Cascode Mirror Wide-Swing p-channel Cascode Mirror

Page 30: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

30

Telescopic Cascode Op Amp

Differential Output•

CMFB to establish VB1

or VB5

needed•

Tail current generally generated with current mirror

VB1

IT

VIN VIN

M1 M2

M3 M4

M5

M7

M6

M8

VB2

VB3

CLCL

+OUTV

-OUTV

VDD

VB5

VSS

M11

Page 31: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

31

End of Lecture 7

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32

Telescopic Cascode Op AmpSignal Swing and Power Supply Limitations

Thus, there are a minimum of 5 VDSAT

drops between VDD

and VSS

This establishes a lower bound on VDD

-

VSS

and it will be reduced by the p-p

signal swing on the output

There are a minimum of 2 VDSAT

drops between VOUT

and VDD

and a minimum of 3 VDSAT

drops between VOUT

and VSS

Page 33: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

33

Telescopic Cascode Op Amp

+OUTV

-OUTV

+OUTV

-OUTV

n-channel inputs p-channel inputs

Page 34: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

34

Are there other high output impedance circuits that can be

used as quarter circuits?

Page 35: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

35

Are there other high output impedance circuits that can be usedas quarter circuits ?

I recall the regulated cascode circuits have this

property

Page 36: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

36

High output impedance quarter-circuits

Regulated Cascode Amplifieror “Gain Boosted Cascode”

Quarter Circuit

(A is usually a simple amplifier, often the reference op amp with + terminal connected to the desired quiescent voltage)

Page 37: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

37

Analysis of Regulated Cascode Amplifier

( )( )

⎪⎪⎭

⎪⎪⎬

=−−=

=−++

=++

IN1

XX2

o2OUT2m21m1o2o1X

o2X2m2Lo2OUT

VVVAVV

gVVgVgggVgVVgsCgV

VX

,V1

and V2

can be eliminated from these 4 equations

Background

Page 38: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

38

( ) ( )( ) ( ) ⎭

⎬⎫

=++++

=+−+

o2OUTXm2INm1o2o1X

o2XXm2Lo2OUT

gVA1VgVgggVgVA1VgsCgV

( )( )

⎪⎪⎭

⎪⎪⎬

=−−=

=−++

=++

IN1

XX2

o2OUT2m21m1o2o1X

o2X2m2Lo2OUT

VVVAVV

gVVgVgggVgVVgsCgV

Analysis of Regulated Cascode AmplifierBackground

[ ]( )[ ]( )

[ ][ ]

[ ]

m1 o2 m2 m1 m2OUT m1

o1 o2IN L m2 o1 o2L o1 o2 m2 o1 o2L

m2

g g g 1 A g g 1 AV gg gV sC g 1 A g gsC g g g 1 A g g sC

g 1 A

− + + − + −= ≈ =

+ ++ + + + ++

⎟⎠⎞

⎜⎝⎛⎟⎟⎠

⎞⎜⎜⎝

⎛+

−≈

A1

gggsC

gV

V

m2

o2o1L

m1

IN

OUTfor A large: gMEQ

gOEQ

Page 39: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

39

High output impedance quarter-circuits

Regulated Cascode Amplifieror “Gain Boosted Cascode”

Output conductance has been decreased even more!

Same GB as for previous two circuits

( )⎥⎦⎤

⎢⎣

⎡+

≈A1g

gggm3

O3O1OEQ

1mmEQ gg ≈

[ ]⎟⎟⎠

⎞⎜⎜⎝

⎛ ++

−≈

m3

O3O1L

m1V

gA1ggsC

g(s)A

( )⎥⎦

⎤⎢⎣

⎡ +•⎟⎟⎠

⎞⎜⎜⎝

⎛≈

O3

m3

O1

m10 g

A1gggA

L

m

CgGB 1≈

Page 40: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

40

Gain-Boosted Telescopic Cascode Op Amp

Needs CMFB Circuit for Vb1Either single-ended or differential outputsCan connect counterpart as current mirror to eliminate CMFBUse differential op amp to facilitate biasing of cascode device

VDD

V OUT

CL

VB2

VB3

V SS

VB5 M 11

VB1

A1 A2

A3 A4

IT

VINVINM1 M2

M3 M4

M5

M7

M6

M8

Page 41: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

41

Gain-Boosted Telescopic Cascode Op Amp

Single-ended operation

gOQC

=

gOCC

=

gmQC

=

Page 42: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

42

Gain-Boosted Telescopic Cascode Op Amp

L

m

CgGB2

1=

m1

o1 o3 3 o7

o1 o5m3 m7

g-2A = A g A gg + g

g g

This is modestly less efficient at generating GB because now power is consumed in both the cascode devices and the boosting amplifier

VDD

V OUT

CL

VB2

VB3

V SS

VB5 M 11

VB1

A1 A2

A3 A4

IT

VINVINM1 M2

M3 M4

M5

M7

M6

M8

Page 43: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

43

Gain-Boosted Telescopic Cascode Op Amp

m1

L

gGB = C

m1o

1 o3 3 o7o1 o5

m3 m7

-gA = A g A gg + gg g

This is modestly less efficient at generating GB because now power is consumed in both the cascode devices and the boosting amplifier

VDD

V OUT

CL

VB2

VB3

V SS

VB5 M 11

A1 A2

A3 A4

IT

VINVINM1 M2

M3 M4

M5

M7

M6

M8

Elimination of need for CMFB Circuit

Page 44: Analog and Mixed-Signal Design for SOC in Emerging Digital …class.ece.iastate.edu/ee435/lectures/EE 435 Lect 7 Spring... · 2010-02-05 · Can connect counterpart as current mirror

44

Gain-Boosted Telescopic Cascode Op Amp

VDD

CL

VB2VB3

V SS

VB5 M 11

A1 A2

A3 A4

IT

VINVINM1 M2

M3 M4

M5

M7

M6

M8

VDSAT

VOUT

VDSAT

VDSAT

VDSAT

VDSAT

A minimum of 5 VDSAT

dropsbetween VDD

and VSS

Signal Swing and Power Supply Limitations

This establishes a lower boundon VDD

-VSS

and it will be reduced by the p-p

signal swing on the output

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45

Gain-Boosted Telescopic Cascode Op Amp

VDD

V OUT

CL

VB2

VB3

V SS

VB5 M 11

A1 A2

A3 A4

IT

VINVINM1 M2

M3 M4

M5

M7

M6

M8

Advantages:

Significant increase in dc gain

Limitations::

Signal swing (4VDSAT

+VT

between VDD

and VSS

)•

Reduction in GB power efficiency-

some current required to bias “A”

amplifiers•

-additional pole in “A”

amplifier -may add requirements for some compensation

Area Overhead for 4 transistors and 4 amplifiers-actually minor concern since performance will usually

justify these resources

(with or w/o current mirror counterpart circuits)

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46

End of Lecture 7

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47

Are there other useful high output impedance circuits that can be used for the quarter circuit?

2Vd

( )

L

M1

L

21

21

M1VO

2CGGB

CGGBW

GG2GA

=

+=

+−

=

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48

What circuit is this?

Cascode Amplifier

Cascode AmplifierOften termed a “Folded Cascode Amplifier”Same small-signal performance as otherBut a biasing problem !!

IB1

M1

M3

VOUT

VBB

VIN

VSS

CL

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49

What circuit is this?

B1

1

3

OUT

BB

IN

SS

Folded Cascode Amplifier

VDD

VIN M1

M3VB1IB1

IB2 VOUT

VSS

Biased Folded Cascode

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50

What circuit is this?

Biased Folded CascodeImplementation of Biased Folded Cascode

DD

IN1

3B1 B1

B2OUT

SS

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51

Biased Folded Cascode Quarter Circuit

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛++

−≈

m3

o3o5o1L

m1

IN

OUT

ggggsC

gV

V

( ) o3

m3

o5o1

m1V0 g

ggg

gA+

=

L

m1

CgGB =

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52

Basic Amplifier Structure Comparisons

L

m1

CgGB =

o3

m3

O1

m1VO g

gggA =

Common Source

Cascode

Regulated CascodeFolded Cascode

O

mVO g

gA =L

m

CgGB =

Small Signal Parameter Domain

Agg

ggA

o3

m3

O1

m1VO ≈

L

m1

CgGB =

( ) o3

m3

O5O1

m1VO g

ggg

gA+

=L

m1

CgGB =

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53

Basic Amplifier Structure Comparisons

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB3EB131VO VV

1λλ4A

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+

≈EB3EB1351

VO VVλλθλ4θA

Common Source

Cascode

Regulated Cascode

Folded Cascode

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎠⎞

⎜⎝⎛=

EBVO V

1λ2A ⎟⎟

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EBLDD V1

CV2PGB

Practical Parameter Domain

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD V1

CV2PGB

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛≈

EB3EB131VO VV

Aλλ4A ( )

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD Vθ-1

CV2PGB

Θ=pct power in A

⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD Vθ

CV2PGBΘ=fraction of current

of M5

that is in M1

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54

Biased Cascode Amplifier

Quarter Circuit

2

4

6 B4

B2

SS

Counterpart Circuit

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55

QUARTER CIRCUIT

Folded Cascode Amplifier

Op Amp

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56

Folded Cascode Amplifier (redrawn)

These transistors pair-wise form a current source and one in each pair can be removed

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57

Folded Cascode Op Amp

Needs CMFB Circuit for VB4Either single-ended or differential outputsCan connect counterpart as current mirror to eliminate CMFBFolding caused modest deterioration of AV0 and GB energy efficiencyModest improvement in output swing

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58

Folded Cascode Op Amp (Single-ended Output)

1mmEQ gg =

( )OEQL

mEQV gsC

gsA+

−≈

( ) ( )m9

O9O7

m3

O3O5O1OEQ g

ggggggg ++≈

L

m

CgGB 1=

L

mEQ

CgGB ≈

OEQ

mEQV g

gA ≈0

( ) ( )m9

O9O7

m3

O3O5O1

mV0

ggg

gggg

gA++

≈ 1

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59

Operational Amplifier Structure Comparison

Reference Op Amp

Telescopic Cascode

Regulated Cascode

Folded Cascode

31

1

21

OO

mVO gg

gA+

=L

m

CgGB2

1=

Small Signal Parameter Domain

L

T

CISR

2=

L

T

CISR

2=

m5

o5o7

m3

o3o1

m1

o

ggg

ggg

2g

A+

=L

m

CgGB2

1=

3m9

o9o7

1m3

o3o1

m1

o

Aggg

Aggg

2g

A+

≈L

m

CgGB2

1=L

T

CISR

2=

( )m9

o9o7

m3

o3o5o1

m1

o

ggg

gggg2

g

A++

=L

m

CgGB2

1=L

T

CISR

2=

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60

Operational Amplifier Structure Comparison

⎟⎟⎠

⎞⎜⎜⎝

⎛+

3

EB775

1

EB331EB1

V0

AVλλ

AVλλV

2A ( )⎥⎦

⎤⎢⎣

⎡•⎟⎟

⎞⎜⎜⎝

⎛=

EB1LDD V1

C2Vθ-1PGB

( )LDDC2Vθ-1PSR =

Reference Op Amp

Telescopic Cascode

Regulated Cascode

Folded Cascode

Practical Parameter Domain

⎟⎟⎠

⎞⎜⎜⎝

⎛⎥⎦

⎤⎢⎣

⎡+

=EB131

V0 V1

λλ1A ⎥

⎤⎢⎣

⎡•⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD V1

C2VPGB

LDDC2VPSR =

LDDC2VPSR =

( )EB575EB331EB1V0 VλλVλλV

2A+

=⎥⎦

⎤⎢⎣

⎡•⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD V1

C2VPGB

Θ=pct power in A

( ) ( )( )EB979EB3351EB1V0 Vλλθ1VλλθλV

2θA−++

=⎥⎦

⎤⎢⎣

⎡•⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD Vθ

C2VPGB

LDDC2VPθSR =

Θ=fraction of current of M5

that is in M1

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61

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62

Folded Cascode Op Amp (Single-ended Output)

L

m

CgGB 1=

( ) ( )m9

O9O7

m3

O3O5O1

mV0

ggg

gggg

gA++

≈ 1

What is a practical design parameter set?

How many degrees of freedom are there?

DOF ? {IT

,W1

/L1

,W5

/L5

,W3

/L3

,W9

/L9

,W7

/L7

,VB1

,VB2

,VB3

}9 DOF

Practical Design Parameters{P,θ,VEB1

,VEB3

,VEB5

,VEB7

,VEB9

,VB2

,VB3

}where θ=IT

/(IT

+IT2

)

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63

Folded Gain-boosted Cascode Amplifier

with ideal current source bias

modest improvement in output swing

L

m1

2CgGB =

( )m3

o3o1

m1o

gAgg

gA −≈

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64

Folded Gain-boosted Cascode Amplifier

( )Ag

gggsC

gV

V

m3

o3o5o1L

m1

IN

OUT

++

−≈

modest improvement in output swingL

m1

CgGB =

( ) o3o5o1

m3m10 ggg

AggA+

−≈

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65

Basic Amplifier Structure Comparisons

L

m1

CgGB =

o3

m3

O1

m1VO g

gggA =

Common Source

Cascode

Regulated CascodeFolded Cascode

Folded Regulated Cascode

O

mVO g

gA =L

m

CgGB =

Small Signal Parameter Domain

Agg

ggA

o3

m3

O1

m1VO ≈

L

m1

CgGB =

( ) o3

m3

O5O1

m1VO g

ggg

gA+

=L

m1

CgGB =

( ) Agg

gggA

o3

m3

O5O1

m1VO +

=L

m1

CgGB =

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66

Basic Amplifier Structure Comparisons

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB3EB131VO VV

1λλ4A

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+

≈EB3EB1351

VO VVλλθλ4θA

⎥⎦

⎤⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD Vθ

CV2PGB

Common Source

Cascode

Regulated Cascode

Folded Cascode

Folded Regulated Cascode

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎠⎞

⎜⎝⎛=

EBVO V

1λ2A ⎟⎟

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EBLDD V1

CV2PGB

Practical Parameter Domain

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD V1

CV2PGB

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛≈

EB3EB131VO VV

Aλλ4A ( )

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1LDD Vθ-1

CV2PGB

Θ=pct power in A

Θ=fraction of current of M5

that is in M1

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+

≈EB3EB13512

2VO VVλλλθ

A4θA( )

⎟⎟⎠

⎞⎜⎜⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛=

EB1

12

LDD Vθ-1θ

CV2PGB

Θ1

=pct of total power in A

Θ2

=fraction of current of M5

that is in M1

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67

Folded Gain-boosted Telescopic Cascode Op Amp

Needs CMFB Circuit for VB4Either single-ended or differential outputsCan connect counterpart as current mirror to eliminate CMFBFolding caused modest deterioration in GB efficiency and gainModest improvement in output swing

L

m1

2CgGB =

( )m91

o9o7

m33

o3O5O1

m1

o

gAgg

gAggg

2g

A++

−≈

V IN

V IN

VDD

V SS

IT

VB4

M1 M2

M7

M9 M 10

M5 M6

M3 M4

V OUT

CL

VIN

VB2

VB3

V SS

IT2

M8

VB1

A1 A2

A3 A4

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68

Operational Amplifier Structure Comparison

Reference Op Amp

Telescopic Cascode

Regulated Cascode

Folded Cascode

Folded Regulated Cascode

31

1

21

OO

mVO gg

gA+

=L

m

CgGB2

1=

Small Signal Parameter Domain

L

T

CISR

2=

L

T

CISR

2=

m5

o5o7

m3

o3o1

m1

o

ggg

ggg

2g

A+

=L

m

CgGB2

1=

3m9

o9o7

1m3

o3o1

m1

o

Aggg

Aggg

2g

A+

≈L

m

CgGB2

1=L

T

CISR

2=

( )m9

o9o7

m3

o3o5o1

m1

o

ggg

gggg2

g

A++

=L

m

CgGB2

1=L

T

CISR

2=

( )9m9

o9o7

3m3

o3o5o1

m1

o

Aggg

Agggg

2g

A++

=L

m

CgGB2

1=L

T

CISR

2=

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69

Summary of Folded Amplifier Performance

+

Modest improvement in output signal swing (from 5 VDS SAT

to 4VDS SAT

)

- Deterioration in AV0 (maybe 30% or more)

- Deterioration in GB power efficiency (can be significant)

- Minor increase in circuit size

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70

Other Methods of Gain Enhancement

OCCOQC

QCM

V ggg

A+

−=0

L

mQC

CgGB =

Two Strategies:

1.

Decrease denominator of AV0

2.

Increase numerator of AV0

Previous approaches focused on decreasing denominator

Consider now increasing numerator

Recall:

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71

gmEQ

Gain Enhancement Strategy

Use this as a quarter circuit

use the quarter circuit itself to form the op amp

gm

is increased by the mirror gain !

Mgg m1MQC =

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72

gmEQ

Gain Enhancement Strategy

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73

Current Mirror Op Amps

OEQ

mEQV g

gA −=0

21m

mEQ

gMg =Premise: Transconductance gain increased by mirror gain M

Premise: If output conductance is small, gain can be very high

Premise:

GB very good as well

L

mEQ

CgGB =

Very Simple Structure!

Still need to generate the bias current IB

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74

Current Mirror Op Amps

Need CMFB tp

establish VB2

Can use higher output impedance current mirrors

Can use current mirror bias to eliminate CMFB but loose one output

Basic Current Mirror Op Amp

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75

Is this a real clever solution?

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76

Basic Current Mirror Op Amp

86 OOOEQ ggg +=2

1mmEQ

gMg =

86

1

2OO

m

VO gg

gMA

+

•−=

L

m

CgMGB2

1=

CMFB not shown

L

T

CIMSR

2•

=