Analog-Fronted for Incremental Encoder Signals With Sine and Cosine Outputs Sponsored by BAYTP

eyADC-DG2 is an analog front end for the evaluation of incremental en-

coder with sine/cosine outputs. The chip includes two sign comparators

which control an internal up-down counter. Additionally, the sine/cosine

signals are converted and filtered by continuous time Delta-Sigma ADCs.

The exact angle information obtained by arctan calculation, the raw as

well as filtered modulator output data can be accessed via SPI interface.

Additionally, an integrated sample rate converter allows the access of

the raw data when using an application clock lower then 32MHz.

An LDO, an internal reference voltage generator, and an internal clock

generator provide all important functionalities for implementation of the

ayADC-DG2 into application.

eyADC-DG2

F O R M O R E I N F O R M A T I O N

eesy-ic GmbHSuedwestpark 10-1290449 Nuremberg, Germany

+49 (0)911 810 211 0info@eesy-ic.comwww.eesy-ic.com

eyADC-DG2 overcomes the disadvantages of

capacitive signal sampling by using continuous

time Delta Sigma modulators. This avoids the

need for further external analog signal process-

ing like input low-pass filtering or common mode

voltage control. The reliability and performance

of the complete system is increased while mini-

mizing complexity and production costs.

The chip’s sinusoidal input signals are directly

fed to resistors, which facilitate a very high input

common mode voltage range. Additionally, resis-

tors allow high linearity due to their low voltage

coefficients.

Continuous time Delta Sigma modulators also

provide the advantage of inherent suppression

of high frequencies: The input signal is oversam-

pled and a low-pass filter is applied afterwards

in digital domain. This provides further immunity

against high frequency distortions.

From Design to Production

The core competencies of eesy-ic GmbH are

IC-design & layout with focus on analog, digital,

mixed-signal and RF integrated circuits; IC-verifi-

cation and characterization as well as IC-produc-

tion test solutions.

Our company prevails in an atmosphere of

innovation and we are constantly seeking new

challenges. We do everything possible to get the

best result and promote our ideas. We constant-

ly strive to redefine our boundaries and set new

standards in our work and in the industry.

The two Delta Sigma modulators are able to reach an SNR of 81dB with an input signal amplitude of 500mV and bandwidth of 500kHz. For a bandwidth of 128kHz the SNR is 92dB. This is of importance as the fi-nal angle can be further low-pass filtered, even if a 500kHz bandwidth is initially required. This additional filtering improves the performance significantly. The input common mode voltage can be varied from -7V to +7V. The maximum supply voltage is 1.98V. The THD is below -104dB and the integral non-linearity is at maximum 6ppm, based on a 1V full-scale input signal. The ADCs provide a 13bit resolution of the input signal. Including the additional coarse resolution obtained by counting of encoder disk slits, the overall resolution can be > 23bit.

A Comprehensive Solution for Phase Measurement in Encoder Applications

Features

2 Delta-Sigma ADCs

2 Sign Comparators

Up-Down Counter

up to 500kHz Signal Frequency

16bit NMC

90dB SNR

> 13bit ADC resolution

high common mode range of +/- 7V

integrated arctan calculation

integrated digital sinc filter