analysis and selection criteria of bsim4 flicker noise simulation models

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONSInt. J. Circ. Theor. Appl. 2008; 36:813–823Published online 6 November 2007 in Wiley InterScience (www.interscience.wiley.com). DOI: 10.1002/cta.461

Analysis and selection criteria of BSIM4 flicker noisesimulation models

T. Noulis1,∗,†, S. Siskos1 and G. Sarrabayrouse2

1Electronics Laboratory of Physics Department, Aristotle University of Thessaloniki, Aristotle University Campus,54124 Thessaloniki, Greece

2Laboratoire d’Analyse et d’Architecture des Systemes LAAS—CNRS, 7 Avenue du colonel Roche,31077 Toulouse Cedex 4, France

SUMMARY

CMOS transistors’ noise performance is mainly dominated by flicker (1/ f ) noise. BSIM4.X MOSFETsimulation model develops two distinct models, SPICE-Flicker and BSIM-Flicker, to calculate flicker noise.In this paper, these two models are analytically examined and compared to noise measurements, using anNMOS and a PMOS device fabricated in 0.6�m process by Austria Mikro Systeme (AMS). MOSFET1/ f noise measurements and the respective simulations were obtained under various bias conditions, as tostudy which flicker noise model is the optimum in each operating region. Measurement temperature wasconstant at 295K. Comparisons suggest that in an NMOS transistor operating in the triode or saturationregion, BSIM-Flicker model is accurate and therefore preferable. In a PMOS transistor, the most suitablemodel to describe its 1/ f noise performance in the linear regime is also BSIM-Flicker, whereas SPICE-Flicker is more preferable in saturation. In NMOS transistors, the selected model provides a great accuratedescription of flicker noise, contrary to PMOS transistors, where simulation models appear to be quiteunreliable and need further improvement. Copyright q 2007 John Wiley & Sons, Ltd.

Received 21 October 2006; Revised 22 August 2007; Accepted 3 September 2007

KEY WORDS: BSIM4 MOSFET model; flicker noise exponent; SPICE-Flicker and BSIM-Flicker noisemodels

1. INTRODUCTION

Noise performance is a crucial part of microelectronics’ systems reliability and becomes extremelyimportant in readout amplification stages. The noise behavior of CMOS devices is primarily domi-nated by two sources, thermal and flicker noise. MOS transistor thermal noise is generated mainlyby the channel resistance. Flicker noise phenomenon appears through both quality-dependent and

∗Correspondence to: T. Noulis, Electronics Laboratory of Physics Department, Aristotle University of Thessaloniki,Aristotle University Campus, 54124 Thessaloniki, Greece.

†E-mail: [email protected]

Copyright q 2007 John Wiley & Sons, Ltd.

814 T. NOULIS, S. SISKOS AND G. SARRABAYROUSE

fundamental noise processes. It seems to be large in MOSFETs and therefore sets the lower limitto the level of the signal that can be processed by VLSI devices and circuits. It is also commonlycalled 1/ f noise because the noise spectrum varies as 1/ f �, where the exponent is very close tounity (�=1±0.2).

In contrast to the channel thermal noise which is quite understood, flicker noise is not yet fullyknown, although its presence is surprisingly universal in all types of semiconductor devices [1].A lot of studies have been done so far in order to explain and describe the flicker noise phenomenon[2–19]. However, controversy still exists in the modeling of 1/ f noise in CMOS transistors.

The number and mobility fluctuation models are the two models that explain 1/ f noise origin.The number fluctuation theory states that 1/ f noise is generated by fluctuations in the carriernumber [2–7]. On the other hand, the mobility fluctuation suggests that flicker noise is essentiallya bulk phenomenon. In particular, the fluctuations in the conductivity are due to fluctuations inthe mobility of charge carriers [8–13]. Other researches have combined these two theories into asingle model and proposed that charges, when trapped, cause correlated mobility fluctuations [14].This model was further developed and used in circuit simulators such as SPICE [15, 16].

In integrated circuits design, noise simulation is a key point of the process. To evaluate circuitnoise performance, the designer uses one of the noise models available in the simulator. Whileconclusions and design criteria concerning noise are extracted using simulations in different typesof typical analog integrated circuits [20–23] and while other issues like the MOS transient responsewere studied with respect to the simulation model and level [24, 25], no extended research hasbeen performed on the validity of the available used 1/ f noise simulation models in relation tothe MOS transistor model that is developed in the simulator. In particular, BSIM4 model, whichis one of the most commonly used Spice MOS transistor simulation models, develops two distinctmodels, SPICE-Flicker and BSIM-Flicker, to calculate flicker noise.

The selection of the noise model is very important in flicker noise evaluation depending uponthe type of MOSFET (n or p) and the operating mode. Hence, any information or rule about themodel to select is very essential and useful to the designer.

Only two previous works that examine which flicker noise simulation model is more appropriatehave been published so far [26, 27]. They concern NMOS devices operating from subthreshold tostrong inversion and PMOS transistors only in the saturation region. In addition, noise comparisonsrefer to old versions of the BSIM MOSFET model. 1/ f noise performance is examined in relationto the gate–source bias, the transconductance and its linearity, and the MOSFET channel length.Different 1/ f noise models are considered suitable for different MOS-operating regions and theaccuracy of each 1/ f model is examined at only two particular frequencies (1Hz and 1 kHz). Onlyfragmentary results are obtained, which cannot be directly addressed to the entire flicker noisefrequency bandwidth.

In this paper, as a complementary work, flicker noise performance of both n- and p-typetransistors is examined in all operating regions. Flicker noise measurements were obtained forvarious drain currents, from threshold to saturation and in a frequency bandwidth from 10Hz to10 kHz where 1/ f noise dominates. In order to study the accuracy of the simulation noise models,1/ f noise measurements are directly compared to the respective simulations. Suggestions aboutwhich model is the more suitable to describe MOSFET flicker noise behavior in each operatingregion are given and flicker noise model selection criteria are proposed in relation to the type(n or p) of the MOS transistor. In addition, the dependence of the MOSFET flicker noise perfor-mance in relation to frequency and drain current variation was also studied in order to achieve adetailed analysis of the models’ accuracy in describing the 1/ f noise phenomenon.

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. 2008; 36:813–823DOI: 10.1002/cta

ANALYSIS AND SELECTION CRITERIA OF BSIM4 FLICKER NOISE SIMULATION MODELS 815

2. BSIM4.X 1/ f NOISE SIMULATION MODELS

BSIM4 MOSFET model uses two different flicker noise models, SPICE-Flicker and BSIM-Flicker.The SPICE-Flicker noise model states the average value of the square of the flicker noise draincurrent at a particular frequency and is given by

i21/ f� f

=KF|IDS|AF

Cox,eL2eff f

EF(1)

where IDS is the input MOS drain current, KF is the flicker noise coefficient, which is theproportional factor and depends critically on processing, AF (flicker exponent) and EF (flicker

frequency exponent) characterize the power dependence of the measured i2d on IDS and frequency,respectively, Leff is the effective channel length and Cox,e is the gate capacitance per unit area.This model is identical to the respective BSIM3 flicker noise model, except for the difference inuse of Cox in BSIM3 and Cox,e in BSIM4 [28–30].

BSIM-Flicker noise model appears to be quite complicated. It also follows the basic frameworkof BSIM3, but with the improvements of using smoothing functions and considering the bulkcharge effect. It is given in a simplified form by

i21/ f� f

≈h(NOIA,NOIB,NOIC)

[IDS

Cox,eL2eff f

EF+ g(EM)IDS

WeffL2eff f

EF

](2)

where h is a function of the Spice parameters NOIA, NOIB and NOIC, and g is a function ofthe Spice parameter EM. NOIA, NOIB and NOIC can be treated as fitting parameters, such asKF in SPICE-Flicker noise model. EM represents the field at which the carrier velocity saturatesand Weff is the effective channel width. SPICE-Flicker noise model is simple with one primaryparameter (KF), which can vary the noise magnitude, contrary to BSIM-Flicker model, which isquite complicated.

The exact model used for calculating MOS transistor flicker noise performance depends on thevalue of BSIM4 model parameter fnoimod (Flicker Noise Models). The selector parameter fnoimodis the ‘flag’ to choose among the BSIM4 noise models and takes on values 0 or 1. In particular,when fnoimod is 0, SPICE-Flicker noise model is used and when fnoimod is 1, BSIM-Flickermodel is selected [28–30].

3. LOW-FREQUENCY NOISE MEASUREMENT SETUP

The schematic of the noise measurement system is shown in Figure 1. The dc bias used aretwo noiseless homemade power supplies. Variable biasing is available at the gate, drain andsubstrate terminals of the device. The drain of the device under test (DUT) is biased through animpedance network. The amplification of the DUT output signal was performed using the 5182model current-sensitive preamplifier of low noise and low impedance, commercially available bysignal recovery. This preamplifier is designed to amplify extremely low currents encountered inareas such as photometry and semiconductor research. It has four standard conversion factorsbut in addition includes a special low noise mode on the highest gain position for even betterlow-current measurement capability. The preamplifier has an equivalent noise current of the order



Figure 1. Schematic of the low-frequency noise measurement system using a MOS transistor as DUT.

of 10 pA/√Hz (at 1 kHz). The respective maximum dc input current is 9mA and sensitivity is

10−5. The unit features two outputs allowing both the ac and dc components of the input signalto be independently monitored [31, 32].

With this experimental implementation, the gate and drain voltages were independentlycontrolled and varied in order to examine the noise performance of DUT under different biasingconditions. The amplified noise power was measured by the Agilent 89410A spectrum analyzer.

4. SIMULATION, MEASUREMENT RESULTS AND COMPARISONS

The n- and p-type MOS transistors were fabricated in 0.6�m CMOS process by Austria MikroSysteme (AMS) and their dimensions were (400�m/1.2�m) for the NMOS and (1000�m/1.2�m)

for the PMOS transistors. The specific technology is based on thermal oxide gate insulator, whichin comparison with a nitrided oxide provides better 1/ f noise performance [33, 34]. Bias conditionsvaried so as to measure MOS flicker noise performance from the threshold of the linear operatingregion to saturation. The measurements were obtained for a frequency range of 10Hz–10 kHz andthe temperature was constant at 295K.

In order to find out the exact flicker noise dependence on frequency variations and compare itto the respective simulation parameter (EF), which is common to both models, these measure-ments were exponentially fitted. Tables I and II list the experimental values of 1/ f noiseexponent for a range of NMOS and PMOS transistor measurements, respectively. The flicker noisemeasurements of an NMOS and a PMOS FET in the linear and saturation regions are shown inFigures 2 and 3.

As it can be seen in Table I, regarding the description of an NMOS transistor noise behavior inlinear and saturation regions, the experimental results for the flicker noise exponent, which variesfrom 0.91 to 0.98, are quite close to the given value of the simulation parameter EF, which isunity. Therefore, both models can describe with accuracy the noise spectral density dependenceon frequency. The flicker noise exponent of an N-MOSFET at the threshold of a linear region, fora drain current of 17�A, is an exception, since it was found to be 0.85 due to harmonics in thekHz range.

On the contrary, P-MOSFET 1/ f noise measurements (Table II) show a different dependenceon frequency. Particularly, in the saturation region, the noise parameter EF ranges from 0.63 to0.79, whereas in the linear region it ranges from 0.53 to 0.58. These values, in all operating regions



Table I. Flicker noise exponent of an NMOS transistor.

Drain current 1/ f noise exponent Error %

Saturation region460 �A 0.93 0.32470 �A 0.93 0.33480 �A 0.93 0.311.50 mA 0.98 0.341.55 mA 0.97 0.33

Linear region17 �A 0.85 0.74220 �A 0.91 0.41590 �A 0.95 0.341.05 mA 0.92 0.36

Table II. Flicker noise exponent of a PMOS transistor.

Drain current 1/ f noise exponent Error %

Saturation region300 �A 0.65 0.71320 �A 0.64 0.75350 �A 0.63 0.681.1 mA 0.77 0.621.2 mA 0.79 0.72

Linear region217 �A 0.53 0.77740 �A 0.58 0.72

Figure 2. NMOS transistor noise performance in: (a) linear and (b) saturation regionfor various values of drain current.



Figure 3. PMOS transistor noise performance in: (a) linear and (b) saturation regionfor various values of drain current.

Figure 4. Noise measurements and simulations of an NMOS transistor operating in saturation region fora drain current of: (a) 1.55mA and (b) 460 �A.

and especially in the triode region, appear to be quite lower than unity. The respective error on theflicker noise exponent in the PMOS transistor is much higher than that on the NMOS. This implieseven more difficulty in the PMOS 1/ f noise estimation using the above simulation models.

In addition, as Figures 2 and 3 show, the noise behavior of both n- and p-type MOSFETs dependsmainly on the drain current. Equations (1) and (2) indicate that as the drain current decreases, sodoes the MOSFET 1/ f noise.

In order to examine the accuracy of the two flicker noise models, respective simulationswere performed using HSPICE simulator and the BSIM4 MOSFET model. Comparison betweenmeasurement and simulation concerns the same MOSFET drain current and the same bias condi-tions.

Figure 4 shows the noise current spectrum of an n-channel transistor biased in the saturationregion. In Figure 4(a) the comparison between the two 1/ f noise models refers to a drain currentof 1.55mA and in Figure 4(b) to 460�A. As can be seen, for a high drain current, SPICE-Flickernoise model overestimates noise, whereas BSIM-Flicker estimates it with good accuracy and is



Figure 5. Noise measurement and simulations of an NMOS transistor operating in linear region fora drain current of: (a) 220 �A and (b) 1.05mA.

Figure 6. Noise measurement and simulations of an NMOS transistor atthreshold for a drain current of 17�A.

therefore the optimum model. For a lower current (Figure 4(b)), SPICE-Flicker also overestimatesflicker noise and BSIM-Flicker provides a more accurate description. As a result, BSIM-Flickeris the optimum noise model to describe N-MOSFET flicker noise performance in the saturationregion.

Figures 5(a) and (b) show the noise current spectral density of an NMOS transistor in the linearregion for a drain current of 220�A and 1.05mA, respectively. In both curves, SPICE-Flicker modeloverestimates flicker noise, whereas BSIM-Flicker underestimates it. However, BSIM-Flicker ismore accurate and is therefore selected to estimate an NMOS transistor 1/ f noise performancein the triode region. Figure 6 shows the noise current spectrum of an NMOS transistor operatingnear threshold and the drain current is 17�A. BSIM-Flicker model is preferred, since it describes1/ f noise more accurately, despite underestimating it. SPICE-Flicker considers noise to be muchhigher in comparison to measurements.



Figure 7. Noise measurement and simulations of a PMOS transistor operating in saturation region for adrain current of: (a) 1.2mA and (b) 300�A.

Figure 8. Noise measurement and simulations of a PMOS transistor operating in linear region for a draincurrent of: (a) 217�A and (b) 740�A.

Figure 9. Noise measurement and simulations of a PMOS transistor atthreshold for a drain current of 6�A.



A PMOS transistor was also examined regarding the two 1/ f noise models. Figures 7(a) and (b)show the noise current spectrum of a PMOS transistor operating in the saturation region for adrain current of 1.2mA and 300�A, respectively. In both cases, the models overestimate flickernoise and SPICE-Flicker model, which is closer to the measurements, is the optimum.

In Figure 8, the two flicker noise models are compared to the measurement results of a p-typeMOSFET operating in the linear region. Noise comparison in Figure 8(a) refers to a drain currentof 217�A and in Figure 8(b) to 740�A. Both noise models overestimate flicker noise; however,BSIM-Flicker is preferred as the most accurate in both cases. Figure 9 also shows a PMOStransistor operating at threshold for a drain current of 6�A. Although BSIM-Flicker model appearsto be close to the measurement, such a comparison cannot lead to safe conclusions, since plentyof harmonics appear in the range of 100Hz–10 kHz and is therefore considered to be unreliable.

5. CONCLUSION

In this work, BSIM4.X MOSFET flicker noise models have been analytically described andexamined. Direct comparison was performed between CMOS transistors’ output 1/ f noise spectraldensity and respective simulations, in all operating regions and in the entire 1/ f noise dominancefrequency bandwidth. Safe conclusions about the above flicker noise models’ accuracy are extractedand model selection criteria in order to achieve a correct description of flicker noise phenomenonin MOS transistors are suggested.

In particular, flicker noise exponent was calculated using several NMOS and PMOS transistornoise measurements and was compared with the respective simulation parameter EF. Specificallyfor the NMOS transistor, flicker noise exponent was calculated to be close to unity, which is thegiven value, while in p-channel devices, this exponent was unexpectedly much lower. In addition,it was shown that NMOS and PMOS flicker noise depends on the variation of the drain currentand lower drain current implies flicker noise reduction.

Moreover, BSIM-Flicker and SPICE-Flicker MOSFET noise models have been described andanalytically compared using simulations with 1/ f noise measurements. In particular, for an NMOStransistor operating in the linear or saturation region, BSIM-Flicker is the best simulation model,since it appears to be closer to the experimental results. In both operating regions, and especiallyin saturation, the selected model provides an accurate description of the NMOS flicker noisebehavior.

Additionally, for a p-type MOS transistor, SPICE-Flicker noise model is more preferable in thesaturation region and BSIM-Flicker in the triode region. In both operating regions, the selectedmodels overestimate flicker noise. However, the best noise model for a PMOS transistor is not asaccurate as it is for an NMOS transistor.

The above study implies that NMOS transistor flicker noise performance can be simulatedwith reliability using the BSIM-flicker noise model of BSIM4.X instead of SPICE-flicker 1/ fmodel. However, both noise models appear to be quite problematic for a PMOS transistor. Thissuggests the necessity to develop a new model to calculate PMOS flicker noise performance andto implement it in the simulator.

Finally, the results about the reliability of the specific 1/ f noise simulation models can beconsidered as valid for other typical analog CMOS-scaled processes, since relatively long channelMOSFETs in analog circuit applications are used. However, the accuracy of the noise magnitudethat each model provides is process dependent, since the majority of the model parameters depend



critically on processing. Therefore, the models’ reliability is also conditioned by an effective noisecharacterization of the used CMOS process.

REFERENCES

1. Halford D. A general model for f a spectral density random noise with special reference to flicker noise 1/ f .IEEE Proceedings 1968; 56(3):251–258.

2. McWhorter AL. 1/ f noise and germanium surface properties. In Semiconductor Surface Physics, Kingston RH(ed.). University of Pennsylvania Press: Philadelphia, PA, 1957; 207–228.

3. Christensson S, Lundstrom I, Svensson C. Low frequency noise in MOS transistors—I. Theory. Solid-StateElectronics 1968; 11(9):797–812.

4. Christensson S, Lundstrom I. Low frequency noise in MOS transistors—II. Experiments. Solid-State Electronics1968; 11(9):813–820.

5. Das Makunda B, Moore JM. Measurements and interpretation of low-frequency noise in FETs. IEEE Transactionson Electron Devices 1974; 21(4):247–257.

6. Reimbold G. Modified 1/ f trapping noise theory and experiments in MOS transistors biased from weak to stronginversion—influence of interface states. IEEE Transactions on Electron Devices 1984; 31(9):1190–1198.

7. Ghibaudo G. A simple derivation of Reimbold’s drain current spectrum formula for flicker noise in MOSFETs.Solid-State Electronics 1987; 30(10):1037–1038.

8. Hooge FN. 1/ f noise is no surface effect. Physics Letters 1969; 29(3):139–140.9. Hooge FN. Discussion of recent experiments on 1/ f noise. Physica 1972; 60(1):130–144.10. Hooge FN, Vandamme LKJ. Lattice scattering causes 1/ f noise. Physics Letters 1978; 66(4):315–316.11. Hooge FN. 1/ f noise. Physica B 1976; 83(1):14–23.12. Jindal RP, Van Der Ziel A. Phonon fluctuation model for flicker noise in elemental semiconductors. Journal of

Applied Physics 1981; 52(4):2884–2888.13. Vandamme LKJ, de Werd HMM. 1/ f noise model for MOSTs biased in the nonohmic region. Solid-State

Electronics 1980; 23(4):325–329.14. Jayaraman R, Sodini CG. A 1/ f noise technique to extract the oxide trap density near the conduction band edge

of silicon. IEEE Transactions on Electron Devices 1989; 36(9):1773–1782.15. Hung KK, Ko PK, Hu C, Cheng YC. A unified model for the flicker noise in metal–oxide–semiconductor

field-effect transistors. IEEE Transactions on Electron Devices 1990; 37(3):654–665.16. Hung KK, Ko PK, Hu C, Cheng YC. A physics-based MOSFET noise model for circuit simulators. IEEE

Transactions on Electron Devices 1990; 37(5):1323–1333.17. Hooge FN. 1/ f noise sources. IEEE Transactions on Electron Devices 1994; 41(11):1926–1935.18. Vandamme LKJ, Xiaosong Li, Rigaud D. 1/ f noise in MOS devices, mobility or number fluctuations? IEEE

Transactions on Electron Devices 1994; 41(11):1936–1945.19. Chang J, Abidi AA, Viswanathan CR. Flicker noise in CMOS transistors from subthreshold to strong inversion

at various temperatures. IEEE Transactions on Electron Devices 1994; 41(11):1965–1971.20. Koziel S, Ramachandran A, Szczepanski S, Sanchez-Sinencio E. A general framework for evaluating nonlinearity,

noise and dynamic range in continuous-time OTA-C filters for computer-aided design and optimization.International Journal of Circuit Theory and Applications 2006; DOI: 10.1002/cta.391.

21. Demir A. Fully nonlinear oscillator noise analysis: an oscillator with no asymptotic phase. International Journalof Circuit Theory and Applications 2007; 35(2):175–203.

22. Savov VN, Georgiev ZhD, Todorov TG. Analysis and synthesis of perturbed Duffing oscillators. InternationalJournal of Circuit Theory and Applications 2006; 34(3):281–306.

23. Souliotis G, Psychalinos C. Harmonic oscillators realized using current amplifiers and grounded capacitors.International Journal of Circuit Theory and Applications 2007; 35(2):165–173.

24. Carbone A, Palma F. Discontinuity correction in piecewise-linear models of oscillators for phase noisecharacterization. International Journal of Circuit Theory and Applications 2007; 35(1):93–104.

25. Kayssi A. Analytical transient response of MOS current mirrors. International Journal of Circuit Theory andApplications 2003; 31(5):453–464.

26. Xie D, Cheng M, Forbes L. SPICE models for flicker noise in n-MOSFETs from subthreshold to strong inversion.IEEE Transactions on Computer-Aided Design 2000; 19(11):1293–1303.

27. Zhou J, Cheng M, Forbes L. SPICE models for flicker noise in p-MOSFETs in the saturation region. IEEETransactions on Computer-Aided Design 2001; 20(6):763–767.



28. Liu W. MOSFET Models for SPICE Simulation Including BSIM3V3 and BSIM4. Wiley-Interscience: New York,2001.

29. BSIM4.3.0 MOSFET—User’s Manual. The Regents of the University of California, Berkeley, 2003.30. BSIM3v.2.2 Manual. UC Berkeley, Berkeley, 1999.31. Model 5182 Low-noise Current Preamplifier, Instruction Manual. Ametek Advanced Measurement Technology

Inc., 2002.32. Model Current Sensitive Preamplifier. Available from: www.signalrecovery.com/5182page.htm (accessed 26 July

2006).33. Bigang M, Devireddy SP, Butler ZC, Shanware A, Green K, Chambers JJ, Visokay MV, Colombo L, Rotondaro

AL. Flicker noise in nitrided high-k dielectric NMOS transistors. In Noise in Devices and Circuits III, BalandinAA, Danneville F, Deen MJ, Fleetwood DM (eds). Proceedings of the SPIE, vol. 5844, 2005; 31–40.

34. Celik-Butler Z. Different noise mechanisms in high-k dielectric gate stacks (Invited Paper). In Noise in Devicesand Circuits III, Balandin AA, Danneville F, Deen MJ, Fleetwood DM (eds). Proceedings of the SPIE, vol.5844, 2005; 177–184.


analysis and selection criteria of bsim4 flicker noise simulation models

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