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Link¨ oping Studies in Science and Technology. Dissertations No. 811 Analysis, Estimation and Compensation of Mismatch Effects in A/D Converters Jonas Elbornsson Department of Electrical Engineering Link¨ opings universitet, SE–581 83 Link¨ oping, Sweden Link¨ oping 2003

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Page 1: Analysis, Estimation and Compensation of …...Link oping Studies in Science and Technology. Dissertations No. 811 Analysis, Estimation and Compensation of Mismatch E ects in A/D Converters

Linkoping Studies in Science and Technology. DissertationsNo. 811

Analysis, Estimation andCompensation of Mismatch Effects

in A/D Converters

Jonas Elbornsson

Department of Electrical EngineeringLinkopings universitet, SE–581 83 Linkoping, Sweden

Linkoping 2003

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Analysis, Estimation and Compensation of Mismatch Effects in A/DConverters

c© 2003 Jonas Elbornsson

[email protected]

http://www.control.isy.liu.se

Division of Control & Communication,Department of Electrical Engineering,

Linkopings universitet,SE–581 83 Linkoping,

Sweden.

ISBN 91-7373-621-X ISSN 0345-7524

Printed by Bokakademin AB, Linkoping, Sweden 2003

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Abstract

The trend in modern communication systems is to replace as much analog circuitsas possible with digital ones, to decrease size, energy consumption and cost. Ananalog to digital converter (ADC) is the interface between the analog and digitalparts. Replacing analog parts, such as mixers, with digital ones requires highersampling rates. The bottleneck in a digital communication system is often theADC. Requirements on low power consumption, small chip area and high samplerates are often contradictory to requirements on high accuracy in the manufacturingprocess.

The traditional way to improve the accuracy is to calibrate the ADC beforeuse. However, calibration is time consuming and costly. Furthermore, the errorsusually change during the lifetime of the ADC due to, for instance, temperaturevariation and aging. This means that the ADC must be recalibrated at regularintervals.

In this thesis, we investigate how the errors in an ADC can be estimated andcompensated for while the ADC is used. The estimation must then be done withoutany special calibration signal.

Two different types of errors are discussed in this thesis. The first type oferror is static errors in the reference levels, caused by resistor mismatch. Twomethods are proposed for estimation and correction of these errors. The mostgeneral method requires only that the amplitude distribution is smooth, while theother one requires knowledge of the amplitude distribution of the input signal butgives a little better performance.

The second type of error occurs in time interleaved ADCs, where several ADCsare used in parallel. Due to component mismatch, three different static errorsappear: Time errors (static jitter), amplitude offset errors and gain errors. Amethod for estimation and compensation of these errors is proposed. The methodrequires basically only that the input signal is band limited to the Nyquist frequencyfor the system.

Another way to decrease the impact of the mismatch errors in a time interleavedADC is to randomize the selection of which order the ADCs should be used. Thisrandomization spreads the distortion to a more noise like shape. How the mismatcherrors affect the spectrum of a randomly interleaved ADC is also analyzed in thisthesis.

To confirm that the analysis and estimation methods work in practise the meth-ods are evaluated on both simulated data and data from real ADCs.

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Acknowledgments

Several persons have contributed to this thesis. First of all, I would like to thankmy supervisor, Professor Fredrik Gustafsson, for guidance and support in the workthat has lead to the thesis. I am also grateful to Professor Lennart Ljung fordrafting me to the Control & Communication group in Linkoping.

All the people in the Control & Communication group are gratefully acknowl-edged. Especially I want to thank M.Sc. Thomas Schon and Lic.Eng. RickardKarlsson who have proofread various parts of the thesis and given valuable com-ments and suggestions for improvement.

During my graduate studies, I have had the opportunity to share ideas anddiscussions with the people at Infineon Technologies Wireless Solutions SwedenAB and the Electronic Devices group at Linkoping University. Especially I wantto thank Dr. Jan-Erik Eklund, Prof. Christer Svensson, Lic.Eng. Darius Jakonisand M.Sc. Kalle Folkesson for helping me understand how the A/D converterswork and helping me with the measurements. I also want to thank M.Sc. MartinAnderson from Lund University for providing measurement data.

This work was financially supported by ECSEL (Excellence Center in Com-puter Science and Systems Engineering in Linkoping) graduate school in Linkoping,which is gratefully acknowledged.

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Contents

I 1

1 Introduction 31.1 Outline of Part I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.2 Outline of Part II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.3 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.4 Published Papers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Background 92.1 Sample-and-hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.2 A/D Converter Structures . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.1 Flash ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.2.2 Pipelined ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.2.3 Successive Approximation ADC . . . . . . . . . . . . . . . . . . 152.2.4 Sigma-Delta ADC . . . . . . . . . . . . . . . . . . . . . . . . . 172.2.5 Integrating A/D Converters . . . . . . . . . . . . . . . . . . . . 182.2.6 Interleaved ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . 192.2.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.3 Specifications of A/D Converters . . . . . . . . . . . . . . . . . . . . 222.3.1 Quantization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222.3.2 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 222.3.3 Amplitude Offset . . . . . . . . . . . . . . . . . . . . . . . . . . 242.3.4 Time Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.3.5 Jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.3.6 Gain Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252.3.7 Dynamic Specifications . . . . . . . . . . . . . . . . . . . . . . . 25

2.4 ADC Applications in Communication Systems . . . . . . . . . . . . . 262.4.1 Digital Subscriber Line Technology . . . . . . . . . . . . . . . . 272.4.2 Software Radio . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2.5 Blind Equalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352.6 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2.6.1 Reference level errors . . . . . . . . . . . . . . . . . . . . . . . . 362.6.2 Mismatch errors in time interleaved ADCs . . . . . . . . . . . . 36

A Sample-and-hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

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vi Contents

A.1 Nonlinearities in sample-and-hold . . . . . . . . . . . . . . . . . 37A.2 Dynamic error correction methods . . . . . . . . . . . . . . . . 39

3 Mismatch Compensation of Static Nonlinearities in SA-ADC 413.1 A/D Converter Description . . . . . . . . . . . . . . . . . . . . . . . 42

3.1.1 SA-ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423.1.2 Binary Search Algorithm . . . . . . . . . . . . . . . . . . . . . . 433.1.3 Subranging Technique . . . . . . . . . . . . . . . . . . . . . . . 44

3.2 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 443.2.1 Resistance Errors . . . . . . . . . . . . . . . . . . . . . . . . . . 443.2.2 Subranging Mismatch . . . . . . . . . . . . . . . . . . . . . . . 47

3.3 Equalization with known Input Distribution . . . . . . . . . . . . . . 493.3.1 Assumptions and Notation . . . . . . . . . . . . . . . . . . . . . 493.3.2 Estimation Method . . . . . . . . . . . . . . . . . . . . . . . . . 503.3.3 Criterion Functions . . . . . . . . . . . . . . . . . . . . . . . . . 513.3.4 Amount of Data . . . . . . . . . . . . . . . . . . . . . . . . . . 543.3.5 Parameter Update . . . . . . . . . . . . . . . . . . . . . . . . . 563.3.6 Initial Value Estimation . . . . . . . . . . . . . . . . . . . . . . 583.3.7 Reference Level Estimation Algorithm . . . . . . . . . . . . . . 59

3.4 Equalization with Unknown Input Distribution . . . . . . . . . . . . 613.4.1 Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 613.4.2 Estimation Overview . . . . . . . . . . . . . . . . . . . . . . . . 613.4.3 Amplitude Distribution Estimation . . . . . . . . . . . . . . . . 613.4.4 Parameter Estimation . . . . . . . . . . . . . . . . . . . . . . . 633.4.5 Estimation Algorithm . . . . . . . . . . . . . . . . . . . . . . . 64

3.5 Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 653.5.1 Known Amplitude Distribution . . . . . . . . . . . . . . . . . . 653.5.2 Unknown Amplitude Distribution . . . . . . . . . . . . . . . . . 733.5.3 Subranging ADC . . . . . . . . . . . . . . . . . . . . . . . . . . 85

3.6 Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 853.6.1 ADC Description . . . . . . . . . . . . . . . . . . . . . . . . . . 853.6.2 Algorithm Modification . . . . . . . . . . . . . . . . . . . . . . 853.6.3 Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . 883.6.4 Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 893.6.5 Implementation Aspects . . . . . . . . . . . . . . . . . . . . . . 90

3.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

4 Time Interleaved A/D Converters 954.1 Notation and Assumptions . . . . . . . . . . . . . . . . . . . . . . . . 974.2 Offset Error Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . 99

4.2.1 Sinusoidal input . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004.3 Gain Error Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

4.3.1 Sinusoidal input . . . . . . . . . . . . . . . . . . . . . . . . . . . 1044.4 Time Error Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . 104

4.4.1 Sinusoidal signal . . . . . . . . . . . . . . . . . . . . . . . . . . 106

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Contents vii

4.5 Mismatch Error Distortion . . . . . . . . . . . . . . . . . . . . . . . . 1084.5.1 Sinusoidal input . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

4.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

5 Conclusions 111

Bibliography 115

II 125

A Equalization of Time Errors in a Time Interleaved ADC System– Part I: Theory 1271 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1292 Notation and Definitions . . . . . . . . . . . . . . . . . . . . . . . . . 1323 Signal Reconstruction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1354 Time Error Estimation . . . . . . . . . . . . . . . . . . . . . . . . . . 137

4.1 Dual ADC system . . . . . . . . . . . . . . . . . . . . . . . . . 1384.2 Extension of time error loss function . . . . . . . . . . . . . . . 1404.3 General M ≥ 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1434.4 Time Error Estimation Algorithm . . . . . . . . . . . . . . . . 143

5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148A Dual ADC system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149B General interleaved ADC system . . . . . . . . . . . . . . . . . . . . 153References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155

B Equalization of Time Errors in Time Interleaved ADC System –Part II: Analysis and Examples 1571 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1592 Notation and Definitions . . . . . . . . . . . . . . . . . . . . . . . . . 1613 Time Error Estimation . . . . . . . . . . . . . . . . . . . . . . . . . . 1624 Cramer-Rao Bound . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

4.1 CRB for additive noise . . . . . . . . . . . . . . . . . . . . . . . 1644.2 CRB for noise and jitter . . . . . . . . . . . . . . . . . . . . . . 168

5 Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1716 Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1737 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179

C Blind Adaptive Equalization of Mismatch Errors in Time Inter-leaved A/D Converter System 1811 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1832 Notation and Definitions . . . . . . . . . . . . . . . . . . . . . . . . . 1863 Signal Reconstruction . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

3.1 Amplitude offset errors . . . . . . . . . . . . . . . . . . . . . . . 1893.2 Gain errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

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3.3 Time errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1904 Mismatch Error Estimation . . . . . . . . . . . . . . . . . . . . . . . 191

4.1 Amplitude Offset Error Estimation . . . . . . . . . . . . . . . . 1914.2 Gain Error Estimation . . . . . . . . . . . . . . . . . . . . . . . 1924.3 Time Error Estimation . . . . . . . . . . . . . . . . . . . . . . . 1944.4 Mismatch Error Estimation algorithm . . . . . . . . . . . . . . 198

5 Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2016 Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2047 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210

D Analysis of Mismatch Effects in Randomly Interleaved A/D Con-verter System 2131 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215

1.1 Fixed interleaving . . . . . . . . . . . . . . . . . . . . . . . . . . 2151.2 Random interleaving . . . . . . . . . . . . . . . . . . . . . . . . 216

2 Notations and Definitions . . . . . . . . . . . . . . . . . . . . . . . . 2173 Main results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2204 Mismatch noise spectrum . . . . . . . . . . . . . . . . . . . . . . . . . 225

4.1 Probabilistic model . . . . . . . . . . . . . . . . . . . . . . . . . 2274.2 Covariance functions . . . . . . . . . . . . . . . . . . . . . . . . 2304.3 Spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2324.4 Asymptotic properties . . . . . . . . . . . . . . . . . . . . . . . 235

5 Sinusoidal input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2365.1 Fixed interleaving . . . . . . . . . . . . . . . . . . . . . . . . . . 2365.2 SNDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238

6 Mismatch error estimation . . . . . . . . . . . . . . . . . . . . . . . . 2407 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247

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Notation

Symbols

Symbol Explanationu(t) Analog input signaly[k] Output digital signalyi[k] Output digital signal from ith channelz[k] Output from equalizere[k] White noisew[k] Colored noiseλ, σ2

e Noise variance∆0ti True time error in ith channel

∆ti Time error parameter in ith channel∆ti Estimated time error in ith channel∆0gi True gain error in ith channel

∆gi Gain error parameter in ith channel∆gi Estimated gain error in ith channel∆0oi True offset error in ith channel

∆oi Offset error parameter in ith channel∆oi Estimated offset error in ith channelθ∗i True error between reference levels i− 1 and iΘ∗ True error vector Θ∗ = [θ∗1 · · · θ∗n]T

θi Estimated error between reference levels i− 1 and iΘ Estimated error vector Θ = [θ1 · · · θn]T

fX(x) True amplitude distribution for signal x(t)fX(x,Θ) Estimated amplitude distribution for signal x(t)N Number of samples from one ADCM Number of interleaved ADCs∆M Number of additional ADCs in randomly interleaved ADC.V (·) Criterion function, goodness measureTs Sampling intervalfs Sampling frequency

ix

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x Notation

Symbol Explanationωs Angular sampling frequencyfc Cut-off frequency or signal bandwidthfo input signal frequencyω0 input signal angular frequencyT TransposeE ExpectationE limN→∞

1N

∑Nk=1E

Abbreviations

Abbreviation ExplanationA/D Analog to DigitalADC Analog to Digital ConverterADSL Asynchronous DSLAMPS Advanced Mobile Phone SystemCMOS Complementary MOSD-AMPS Digital AMPSdB decibeldBm decibel below 1mWDC Direct CurrentDFT Discrete Fourier TransformDMT Discrete Multi ToneDNL Differential Non-LinearityDSL Digital Subscriber LineDSP Digital Signal ProcessorENOB Effective Number of BitsFFT Fast Fourier TransformFSK Frequency Shift KeyingGSM Global System for Mobile CommunicationHDSL High bit rate DSLIF Intermediate FrequencyINL Integral Non-LinearityISDN Integrated Services Digital NetworkLNA Low Noise AmplifierLSB Least Significant BitMOS Metal Oxide SemiconductorMOSFET Metal Oxide Semiconductor Field Emitter TransistorMSB Most Significant BitNMOS Negative doped MOSOFDM Orthogonal Frequency Division MultiplexPAM Pulse Amplitude Modulation

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Notation xi

Abbreviation ExplanationPMOS Positive doped MOSPOTS Plain Old Telephone ServicesPSK Phase Shift KeyingPSTN Public Switched Telephone NetworkQAM Quadrature Amplitude ModulationRADSL Rate Adaptive DSLRF Radio FrequencyRMSE Root Mean Square ErrorSA Successive ApproximationSFDR Spurious Free Dynamic RangeSH Sample and HoldSINAD Signal to Noise and DistortionSNR Signal to Noise RatioSNDR Signal to Noise plus Distortion RatioTHD Total Harmonic DistortionVDSL Very high bit rate DSLxDSL HDSL, ADSL, VDSL,...

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xii Notation

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Part I

1

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1

Introduction

In many modern communication systems, the A/D converter (ADC) is a criticalpart. It is difficult to combine a high sample rate with high precision. A/D convert-ers can be implemented in many different ways, the most common implementationsare discussed in Chapter 2. However, common to most implementations is that thedigital signal is generated by comparing the input signal to various reference levels.Due to the manufacturing process, the components are not perfectly matched. Thismeans that errors will occur in the reference levels.

To significantly increase the sampling rate several ADCs can be used in paral-lel, interleaved in time. However, the problem is that, due to the manufacturingprocess, the ADCs in the interleaved array are not exactly identical. This meansthat mismatch errors in offset, gain and time will occur in the interleaved ADCsystem.

The impact of all these errors can be reduced by calibration. However, calibra-tion is costly and time consuming. Further, the components may change slowlywith for instance temperature variations and aging. This means that the ADCswould need recalibration at regular intervals.

The objective of this thesis is to present methods for blind (i.e., no calibrationsignal is needed) estimation of the ADC errors. This means that the errors canbe estimated while the ADC is used, without any special calibration signal. Thisthesis consists of two parts, which are outlined in the following two sections.

3

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4 Chapter 1 Introduction

1.1 Outline of Part I

Part I of this thesis consists of four chapters.In Chapter 1 a short introduction and outline of the thesis is given. The con-

tributions and published papers included in the thesis are also listed.Chapter 2 begins with a description of different implementations of A/D con-

verters and some typical applications for the different ADC implementations. Per-formance measures of ADCs are also given in this chapter. The chapter ends witha problem formulation for the thesis.

Chapter 3 begins with a description of static reference level errors, in particularfor one implementation of ADCs (SA-ADC). Two methods for estimation andcorrection of these errors are presented. The first method requires knowledge of theamplitude distribution of the input signal, while the second method only requiresthat the amplitude distribution is smooth. Both methods have been validatedwith simulations and the second method has also been validated on data from areal ADC. Parts of these results have previously been presented in [31], [36]. Thischapter was also published in a licentiate thesis [32].

In Chapter 4, mismatch errors in time interleaved ADCs are described. Howthe mismatch errors affect the spectrum of the output signal is also analyzed inthis chapter.

1.2 Outline of Part II

Part II of this thesis consists of four papers. A short summary of each paper isgiven below.

Paper A: Equalization of Time Errors in Time Interleaved ADC System– Part I: TheoryIn this paper we present a method for blind estimation and compensation of timeerrors in a time interleaved ADC system. The method basically only requires thatthe input signal is band limited to the Nyquist frequency of the complete ADCsystem. The estimation method is also adaptive to slow variations in the timeerror parameters. The method gives asymptotically unbiased estimates.

Paper B: Equalization of Time Errors in Time Interleaved ADC System– Part II: Analysis and ExamplesIn this paper the time error estimation method presented in Paper A is analyzed.The Cramer-Rao bound is calculated with respect to additive noise and with re-spect to random clock jitter. The estimation method is also validated on simulationdata and data from a real time interleaved ADC system in this paper.

Paper C: Blind Adaptive Equalization of Mismatch Errors in Time In-terleaved A/D Converter SystemIn this paper the time error estimation method presented in Paper A is combined

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1.3 Contributions 5

with estimation and compensation methods for offset and gain errors, for simulta-neous estimation of all three mismatch error types. The mismatch error estimationmethod is validated on simulation data and data from a real time interleaved ADCsystem.

Paper D: Analysis of Mismatch Effects in Randomly Interleaved A/DConverter SystemTo decrease the impact of mismatch errors in a time interleaved ADC system,the selection of which order the ADCs should be used in can be randomized. Inthis paper, we analyze how the mismatch errors affect the output spectrum of arandomly interleaved ADC system. The results are also validated on simulationdata and data from a real randomly interleaved ADC system.

1.3 Contributions

The main contributions of this thesis are:

• The blind estimation method of static reference level errors in ADCs, inChapter 3.

• The time error estimation method for time interleaved ADCs, in Paper A.

• The Cramer-Rao bound calculation for the time error estimates in Paper B.

• The simultaneous estimation of offset, gain and time errors for time inter-leaved ADCs, in Paper C.

• The statistical analysis of the mismatch effects in randomly interleaved ADCs,in Paper D.

1.4 Published Papers

Parts of the material in this thesis has been, or will be, published elsewhere. Partsof Chapter 2, and Chapter 3 are taken from the licentiate thesis.

Jonas Elbornsson. Equalization of Distortion in A/D Converters. Licentiate the-sis 883, Department of Electrical Engineering, Linkopings universitet, Linkoping,Sweden, May 2001 [32].

Parts of Chapter 3 have also been published in

Jonas Elbornsson. Blind Estimation and Error Correction in a CMOS ADC. InProc. of the Thirteenth Annual IEEE International ASIC/SOC Conference, pages124-128. Arlington, USA, September 2000 [31].

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6 Chapter 1 Introduction

Jonas Elbornsson and Jan-Erik Eklund. Histogram Based Correction of Match-ing Errors in Subranged ADC. In Proc. of the 27th European Solid-State CircuitsConference, pages 552-555, Villach, Austria, September 2001 [36].

Part II of the thesis consists of four papers

Jonas Elbornsson, Fredrik Gustafsson and Jan-Erik Eklund. Equalization of TimeErrors in Time Interleaved ADC System – Part I: Theory. Submitted to IEEETransactions on Signal Processing, 2003 [41].

Jonas Elbornsson, Fredrik Gustafsson and Jan-Erik Eklund. Equalization of TimeErrors in Time Interleaved ADC System – Part II: Analysis and Examples. Sub-mitted to IEEE Transactions on Signal Processing, 2003 [42].

Jonas Elbornsson, Fredrik Gustafsson and Jan-Erik Eklund. Blind Adaptive Equal-ization of Mismatch Errors in Time Interleaved A/D Converter System. Submittedto IEEE Transactions on Circuits and Systems – I: Fundamental Theory and Ap-plications, 2003 [40].

Jonas Elbornsson, Fredrik Gustafsson and Jan-Erik Eklund. Analysis of MismatchEffects in Randomly Interleaved A/D Converter System. Submitted to TBD , 2003[38].

Other related publications, but not included in this thesis are

Jonas Elbornsson and Jan-Erik Eklund. Blind Estimation of Timing Errors in In-terleaved AD Converters, In Proc. of IEEE International Conference on Acoustics,Speech and Signal Processing, pages 3913-3916, Salt Lake City, USA, May 2001 [35].

Jonas Elbornsson, Fredrik Gustafsson and Jan-Erik Eklund. Amplitude and GainError Influence on Time Error Estimation Algorithm for Time Interleaved A/DConverter System, In Proc. of IEEE International Conference on Acoustics, Speechand Signal Processing, pages 1281-1284, Orlando, USA, May 2002 [44].

Jonas Elbornsson, Kalle Folkesson and Jan-Erik Eklund. Measurement verificationof estimation method for time errors in a time-interleaved A/D converter system,In Proc. of IEEE International Symposium on Circuits and Systems, vol. 3, pages129-132, Phoenix, USA, May 2002 [43].

Jonas Elbornsson, Jan-Erik Eklund and Fredrik Gustafsson. Estimation Error inBlind Time Error Estimation Algorithm for Time Interleaved A/D Converter Sys-tem, In Radiovetenskap och Kommunikation, Stockholm, Sweden, June 2002 [37].

Jonas Elbornsson, Jan-Erik Eklund and Fredrik Gustafsson. Analysis of MismatchNoise in Randomly Interleaved A/D Converter System, In Proc. of IEEE Interna-

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1.4 Published Papers 7

tional Conference on Acoustics, Speech and Signal Processing, Hong Kong, April2003 [39].

The work of this thesis has also resulted in two patent applications

Jonas Elbornsson. Identification of timing error in interleaved AD converter.Swedish patent application nr 0004059-2 [33].

Jonas Elbornsson. Method and device for estimation time errors in time interleavedA/D converter system. Swedish patent application nr 0300093-2 [34]

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8 Chapter 1 Introduction

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2

Background

Until around fifteen years ago most communication systems, such as mobile phones,radio and television, were analog. This may seem natural since the information thatwe want to transmit usually is continuous in time and amplitude. However, thetrend in recent years has been to replace as much analog circuits as possible withdigital ones. One might ask why the sender should convert the analog signal to adigital one, when the receiver eventually must convert it back to an analog signal.However, there are many reasons for this change of technology:

• A digital signal can be compressed which means that a digital system cansend much more information over a certain frequency interval than an analogsystem.

• A digital system can be made more robust to a noisy environment sinceredundant information can be added in a systematic way.

• Complicated signal processing is much easier and cheaper to implement indigital circuits than in analog ones. Also, the power consumption is lower indigital circuits.

• The security against unwanted listeners is much better in digital systems,since cryptography can be used.

However, the information that is transmitted is still usually analog. Further, thetransmission link itself is analog. This means that the signals must be converted be-

9

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10 Chapter 2 Background

tween the analog and digital domains. The conversion is done by analog-to-digitalconverters (ADCs) and digital-to-analog converters (DACs). The DAC usually hasbetter performance than the ADC. Therefore, when high frequency analog circuitsare replaced by digital ones, the ADC becomes a bottleneck that limits how muchanalog circuitry that can be removed. Requirements on high speed, high accuracy,low cost and low power consumptions in ADCs are all contradictory and to achievehigh enough sample rate at a reasonable cost the accuracy usually becomes too low.Calibration can be used to improve the accuracy, but calibration is time consumingand costly. Also, the components might change during their lifetime due to, forinstance, temperature changes and aging. This means that a lot of time and moneycould be saved if the errors in an ADC could be estimated and compensated forwithout calibration.

The aim of this thesis is to present methods to eliminate the errors in the outputsignal from the A/D converters without any calibration.

This chapter begins with a description of the time quantization in the sample-and-hold circuit in Section 2.1. In Section 2.2 the most common implementationsof A/D conversion are described. A description of different specifications of perfor-mance measurements and error sources for A/D converters follows in Section 2.3. InSection 2.4 some applications for A/D converters are described. Blind equalizationis briefly described in Section 2.5. The chapter ends with a problem formulationin Section 2.6.

2.1 Sample-and-hold

In general, the conversion from analog signal to digital signal is done in two stepsas shown in Figure 2.1. First a quantization in time is done in a sample-and-hold circuit. After that, a quantization in amplitude is done. The quantizationcan be implemented in many different ways, the most common implementationsare described in the next section. The sample-and-hold circuit holds the signalat a constant level while the amplitude quantization is done. The sample-and-hold circuit is required in most A/D converter configurations to keep the analoginput signal at a constant level during the conversion. This is especially importantin A/D converters where the conversion is distributed in time, for instance, thesuccessive approximation ADC, which is described in Section 2.2. In this sectionthe behavior of the sample-and-hold circuit is briefly described, a more detaileddescription and a discussion of how some of the errors could be corrected is givenin [32]. A discussion of nonidealities in the sample-and-hold circuit is also givenin [69].

An ideal sample-and-hold circuit should track the signal until the samplinginstance and then keep it constant until the conversion is finished, see Figure 2.2.

y(t) ={u(t) during track modeu(kT ) during hold mode (2.1)

Here u(t) denotes the input signal to the sample-and-hold circuit and y(t) denotes

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2.2 A/D Converter Structures 11

Time

quantizationquantization

sample-

and-

hold

Amplitude

architecture

dependent

quantizer

Figure 2.1 Two step conversion from analog to digital signal. First, theanalog signal is quantized in time by the sample-and-hold circuit. Next,the time quantized signal is quantized in amplitude and converted to digitalzeros and ones.

the output, that still is an analog signal. The behavior of a real sample-and-holdcircuit is further discussed in Appendix A.

2.2 A/D Converter Structures

A/D converters can be implemented in many different ways. Different implementa-tions are suitable for different tasks, regarding for instance sampling rate and accu-racy. In this section some different A/D converter structures are briefly described.Typical applications for different A/D converter structures are also exemplified.The A/D converter structures that are treated in this thesis are described in moredetail in the following chapters. More information about A/D converter structurescan be found in e.g. [113], [65, 66, 63] or [17]. This section overviews the mostfrequently used technologies.

2.2.1 Flash ADC

Common for several A/D converter implementations is that a resistance ladderis used to generate voltage reference levels, see Figure 2.3. A constant voltage

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12 Chapter 2 Background

0 100 200 300 400 500 600 700−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

Time [ns]

Vol

tage

Track Hold

Figure 2.2 Ideal behavior of the sample-and-hold circuit. Dashed linerepresents the input signal u(t) and the solid line is the output signal y(t).

is then applied to the whole resistance ladder, and the voltage levels between theresistances are used as reference levels. If all the resistances are equal, and the inputresistance to the comparator is infinite, the voltage steps between the resistanceswill be equal. The analog input signal, or usually the output from the sample-and-

0

V

R

R

R

R

r1

r2

r3

Figure 2.3 A resistance ladder is used to generate reference levels, by whichthe analog signal is compared. An n-bit ADC requires 2n resistances.

hold circuit, is then compared to the reference levels from the resistance ladder todetermine which level is closest. This means that to get a precision of n bits in the

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2.2 A/D Converter Structures 13

ADC, 2n resistances are required.In a flash ADC [94], one comparator is used for each reference level, see Fig-

ure 2.4. This means that the input signal is compared to all levels simultaneously,

SH

decoderarray

comparatorresistanceladder

Figure 2.4 Flash ADC. Reference levels are generated by a resistance lad-der. The conversion speed is here very high since one comparator is usedfor each reference level.

and a thermometer code is generated. The thermometer code is then transformedto a binary representation. Since all reference levels are compared to the analogsignal simultaneously, the conversion time is constant, independent of the numberof bits. This also means that a flash ADC is very fast. However, the drawbackwith the flash ADC is that the hardware grows exponentially with the number ofbits since an n-bit flash ADC requires 2n comparators. The power consumptionalso grows exponentially, since all 2n comparators are used at every sample.

Flash A/D converters are used in systems which require very high samplingrate. However, the requirements on high precision cannot be too high since a FlashA/D converter with many bits requires a lot of hardware. The flash A/D convertertechnique is usually limited to 6− 10 bits. Typical applications [92], [18] include

• Digital oscilloscopes. Here high sampling rates are important, but since thesignal should just be visualized, high precision is not very important.

• Point-to-point radio link. Here a high bandwidth is often used, but the signalis usually strong, so the requirements on dynamic range are not very high.

• Direct RF downconversion. This is further discussed in Section 2.4.

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14 Chapter 2 Background

Some examples of high performance flash ADCs are

• An 8-bit ADC with a sampling rate of 1.5 GHz [92] from Maxim.

• A 10-bit ADC with a sampling rate of 210 MHz [18] from Analog Devices.

• A 5-bit ADC with a sampling rate of 3.6 GHz [59] from Fraunhofer Institut.

2.2.2 Pipelined ADC

A pipelined ADC [96, 93] is based on a pipeline of several flash ADCs, each witha resolution of a few bits (often two or three bits), see Figure 2.5. The inputsignal is first sampled with a sample-and-hold circuit. The sampled signal is thenquantized to a few bits (the most significant bits) in a flash ADC. The output fromthe first flash ADC is then converted back to an analog signal by a D/A converterand subtracted from the input signal. This means that we have the quantizationerror from the first ADC. This quantization error is then sampled and quantizedin a new flash ADC, which determines a few more bits. The number of stagestimes the precision of each stage determines the total precision of the ADC. Since

S/H

S/H

Flash

ADC

ADC DAC

Σ+ −

stage 1 stage 2 stage 3Flash

Time alignment register

Figure 2.5 Pipelined ADC. Several flash ADCs with a few bits each areused in a pipeline. This decreases the amount of hardware compared to aflash ADC.

a sample-and-hold circuit is used before each conversion stage, a new sample canbe converted in each stage as soon as the conversion is completed in this stage.This means that several samples can be converted simultaneously, which allows a

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2.2 A/D Converter Structures 15

relatively high sampling rate. However, a latency longer than the sampling intervalis introduced since the conversion is done in several stages. This is not critical formost applications. However, in feedback systems such a long latency can usuallynot be allowed, and therefore pipelined ADCs cannot be used in control systems.In a pipelined ADC, the amount of hardware grows linearly with the number ofbits, as does the power consumption. This is better than the flash ADC, whichgrows exponentially. However, the conversion time also grows linearly in a pipelinedADC, which is worse than a flash ADC which has constant conversion time.

Pipelined ADCs are used in systems which require both high sampling ratesand high precision. The sampling rate is not as fast as for flash ADCs, but theprecision can be much higher. Pipelined ADCs typically have a precision of 8− 16bits and a sampling rate of 1 − 100 MHz. Pipelined ADCs are commonly used inmany systems, some examples are, [96]:

• Radio base stations.

• xDSL modems.

• Digital video.

• CCD imaging.

• Cable modems.

• Ethernet.

Some examples of high performance pipelined ADCs are:

• A 10-bit ADC with a sampling rate of 105 MHz from Maxim [99].

• A 14-bit ADC with a sampling rate of 80 MHz from Analog devices [20].

• A 14-bit ADC with a sampling rate of 62 MHz from Texas Instruments [62].

2.2.3 Successive Approximation ADC

The Successive Approximation ADC (SA-ADC) [97] basically consists of a resis-tance ladder and a comparator, see Figure 2.6. A voltage is applied over the resis-tance ladder and the digital value is found by comparing the analog voltage, uSH ,to the voltages, ri, between the resistances in the resistance ladder. The search forthe correct digital value is done by the binary search algorithm. The search startsin the middle of the ladder, if the analog voltage is larger than the reference thesearch continues in the upper half of the ladder, otherwise in the lower half. Thiscontinues until the correct level is found. In this search algorithm, one bit of preci-sion is found in every comparison so that a n-bit SA-ADC requires n comparisons.This A/D converter structure is further described in the next chapter.

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16 Chapter 2 Background

SH

comparator

resistance ladder0

r1

r2

r3

r4

r5

r6

r7

u(t) uSH

Figure 2.6 Successive Approximation ADC. The digital value is found bycomparing the analog signal, uSH , to the reference levels ri. Only onecomparator is used and the binary search algorithm is used to successivelyfind more bits.

Subranging SA-ADC

A high precision SA-ADC would require a very long resistance ladder, since ann-bit SA-ADC requires 2n resistances. The length of the ladder can be reduced byintroducing subranging stages. In a subranging SA-ADC, the conversion is dividedinto two or more steps, see Figure 2.7. In a two stage subranging ADC, with

SH

resistance ladder 1 resistance ladder 2

electrical connection

comparator

Figure 2.7 Subranging SA-ADC. The conversion is done in two or severalsteps, with two or several resistance ladders.

n = n1 + n2 bits, the n1 most significant bits are first found by a resistance ladderof length 2n1 . Then the n2 least significant bits are found by comparing the residueof the analog signal to the reference levels in the second resistance ladder of length

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2.2 A/D Converter Structures 17

2n2 .One advantage with successive approximation ADCs is that the amount of hard-

ware is very small, since only one comparator is used. The amount of hardwarealso grows slowly with increasing number of bits, since only the number of resis-tances, and not the comparators, grows with increasing number of bits. The powerconsumption is also very low for SA-ADCs. However, since the conversion is donein several steps, the conversion time becomes longer and the SA-ADC cannot bemade as fast as pipelined or flash ADCs. SA-ADCs typically have a precision of8 − 18 bits and a sample rate up to 5 MHz [97]. This means that SA-ADCs areuseful for applications where low power and low cost is important, but high speedis not necessary. SA-ADCs are also useful in applications where short latency isimportant. Some applications where SA-ADCs are often used are, [100, 97]:

• Battery powered applications.

• Data acquisition.

• Control systems.

• I/O boards.

A few examples of SA-ADCs are:

• A 16-bit ADC with a sample rate of 165 kHz from Maxim [100].

• A 18-bit ADC with a sample rate of 800 kHz from Analog Devices [21].

• A 16-bit ADC with a sample rate of 500 kHz from Texas Instruments [60].

2.2.4 Sigma-Delta ADC

In a sigma-delta ADC [91, 102, 103], oversampling is used to increase the precision.The sigma-delta A/D conversion principle is shown in Figure 2.8. The conversion

+1−bitA/D

clock

1−bitD/A

DigitalLow−Pass/Decimator

SH K(z)

Figure 2.8 Sigma-delta ADC. A feedback loop and high oversampling ishere used to achieve good performance.

is done by a 1-bit A/D converter. A feedback loop with a 1-bit D/A converter isused to produce a serial output, where the mean over a finite interval gives the

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18 Chapter 2 Background

digital word. The sigma-delta ADC has extremely high linearity since the A/Dconverter only consists of a switch. High linearity here refers to low DNL andlow INL (defined in Section 2.3), which basically means that the distance betweenadjacent digital levels is constant over the full range of the ADC. A noise shapingfilter K(z) is used in the feedback loop to move the noise to higher frequencies andto improve the stability margins.

Because of the high oversampling the sigma-delta ADCs have relatively lowsampling rates, up to around 100 kHz. But the precision can be very high, sigma-delta ADCs are available with precision from 12 to 24 bits. Because of the simplestructure, sigma-delta ADCs are cheap to produce and the power consumption islow. Sigma-delta ADCs are used in applications with high demands on linearity,but with relatively low bandwidth demands. Some typical applications are:

• Mobile phones.

• Sound cards.

• Digital sound mixers.

• Hi-Fi systems.

• Display instruments.

Some examples of state-of-the-art sigma-delta ADCs are:

• A 24-bit ADC with a sampling rate of 96 kHz from Analog Devices [19].

• A 24-bit ADC with a sampling rate of 41 kHz from Texas Instruments [61].

2.2.5 Integrating A/D Converters

An integrating A/D converter [95, 64] basically consists of an integrator and acounter. In this type of ADC no sample-and-hold is used, instead the output is anaverage of the input signal over a certain time period. First, the signal is integratedin a capacitor over a constant time period. Next, the capacitor is discharged ata constant rate and the counter measures the time it takes for the capacitor todischarge. The measured time is proportional to the signal amplitude if the signalis constant. For a time varying signal the measured time is proportional to themean value of the signal during the measuring time. This kind of A/D convertercan be made with high accuracy, but is quite slow. The integrating ADCs have avery simple structure which means that they are cheap, and the power consumptionis low. Another advantage with the integrating ADC is that the integration timecan be matched to reject for instance 50 Hz disturbances by integrating over aninteger multiple of the disturbance period.

Integrating A/D converters are used to measure slowly varying signals and DCsignals. An integrating ADC typically has an integration time of around 1 ms upto 10 s, and the precision varies between 5 and 30 bits. Typical applications aredigital multimeters and other applications where the information is presented on adisplay. Some examples of integrating ADCs are:

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2.2 A/D Converter Structures 19

constant time measured time

constant slope

Figure 2.9 Integrating A/D converter. First, a capacitance is chargedby the input signal over a constant time period. Next, the capacitance isdischarged with a constant rate and the discharge time is measured, whichgives the signal level.

• A 4 12 Digit ADC from Maxim [98].

• A 7 to 18-bit ADC with integration time from 1 to 350 ms from AnalogDevices [16].

2.2.6 Interleaved ADCs

To increase the bandwidth of the A/D conversion, several A/D converters can beused in parallel [7, 28], see Figure 2.10. Here the A/D converters are interleavedin time so that the effective sampling frequency is M times higher if M ADCsare used. This reduces the demands of conversion speed compared to a singleADC. The sample-and-hold circuit must, however, still be fast enough to track thesignal that should be converted. This type of A/D converter is further discussedin Chapter 4.

Interleaving of A/D converters improves the sampling rate a lot. In [1] a systemwith four interleaved ADC, each with a sampling rate of 125 MHz and a precisionof 12 bits has been built giving a total sample rate of 500 MHz. This systemcan also be expanded to 16 ADC, which would give a sample rate of 2 GHz.Time interleaving can also be used to increase the sampling rate of SA-ADCs.Even though the amount of hardware is increased by time interleaving, a timeinterleaved SA-ADC is smaller than a pipeline or flash ADC. This means that a

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20 Chapter 2 Background

delay, Ts

sampling

ADC0

ADC1

ADC2

ADCM−1

uclock

y0

y1

y2

yM−1

y

MUX

Figure 2.10 A time interleaved ADC system. M parallel ADCs are usedwith the same master clock. The clock is delayed by the nominal samplinginterval between adjacent ADCs. The outputs are then multiplexed togetherto form a signal sampled M times faster than the output from each ADC.

time interleaved SA-ADC could reach the sampling rates of pipelined ADC butwith a smaller chip. Time interleaved A/D converters can be used in systems withvery high speed requirements, for example radio base stations and VDSL modems.

2.2.7 Summary

To summarize this section, Figure 2.11 [94] shows how conversion time, componentmatching and complexity change with the number of bits for the different ADCtypes. In Table 2.1 the sampling speed for today’s fastest commercial ADCs arelisted for different number of bits. As we can see in this table the sampling speedincreases a lot when the number of bits is reduced. If the errors in the ADC can becorrected, the same dynamic range is achieved with fewer bits, which means thatthe sampling speed could be significantly increased.

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2.2 A/D Converter Structures 21

Figure 2.11 ADC architecture tradeoffs [94].

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22 Chapter 2 Background

Number of Sampling speed ADC Manufacturerbits [MSamples/s] type

5 3600 flash Fraunhofer Institut [59]8 1500 flash Maxim [92]10 210 flash Analog Devices [18]12 210 pipeline Analog Devices [22]14 80 pipeline Analog Devices [20]18 0.8 SA-ADC Analog Devices [21]24 0.096 sigma-delta Analog Devices [19]

Table 2.1 State-of-the-art performance for ADC speed.

2.3 Specifications of A/D Converters

In this section we will discuss different measures of performance for A/D converters.These performance measures are more thoroughly described in [113, 58].

2.3.1 Quantization

The quantization in time and amplitude in an A/D converter gives a theoreticallimit of how well a signal can be reconstructed. The sampling interval gives a limitof the maximum input frequency that can be represented accurately. According tothe Nyquist theorem, the highest signal frequency cannot be higher than half thesampling frequency.

Because of the amplitude quantization there will always be an error between theanalog signal value and the digital signal value. These errors cause quantizationnoise on the output signal. The quantization noise limits the performance of theA/D converter. For most signals the quantization noise can be treated as white,uniformly distributed noise, uncorrelated with the input signal [115].

2.3.2 DC Specifications

Here specifications for DC performance of an ADC are described. These are mea-sures of the actual deviations from an ideal A/D converter, but do not say anythingabout the dynamic properties.

Integral Non Linearity and Monotonicity

The Integral Non Linearity (INL) is a measure of the average deviation from theideal A/D converter curve. Let ∆k be the deviation of the k’th bit from a straightline through zero and full scale. Adding all these errors results in zero since thestraight line goes through the actual full scale, see Figure 2.12. The Integral Non

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2.3 Specifications of A/D Converters 23

Digital output

Analog input

000001

010011

100101

110

111

∆1

∆2

∆3

Figure 2.12 The Integral NonLinearity (INL) of an A/D converter, hereexemplified for a 3-bit ADC. The solid line is the A/D converter levels. Thedashed line is the ideal, infinite precision, conversion line from analog todigital.

Linearity is defined as the sum of all positive or all negative errors:

INL =∑

k:∆k>0

∆k = −∑

k:∆k<0

∆k =12

∑k

|∆k| (2.2)

An A/D converter is monotonic if the digital output is guaranteed to be non-decreasing when the analog input is increasing. It can be shown that a converteris monotonic if INL < 1

2 LSB (Least Significant Bit).

Differential Non Linearity

The Differential Non Linearity (DNL) describes the error between two adjacentlevels. The difference in analog signal between two adjacent levels should in theideal case correspond to 1 LSB. The deviation from this value is the DNL. AnA/D converter therefore has one DNL value for each digital level, see Figure 2.13.

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24 Chapter 2 Background

Analog input

Digital output

0 10

1

2

3

4

2 3 4

Exampleof DNL

Figure 2.13 DNL curve for 2-bit ADC. The solid line is the ideal A/Dconverter curve and the dashed line is the A/D converter with errors.

2.3.3 Amplitude Offset

Amplitude offset in an A/D converter causes a non-zero output when the input iszero. The amplitude offset is very important to keep small in DC systems, e.g.,voltmeters, and in interleaved A/D converter structures where different offsets indifferent ADCs cause distortion of the output signal. In other ADC types theamplitude offset is of no significance.

2.3.4 Time Errors

The time error is a deviation from the nominal sampling instance. This error is notimportant (or even not defined) when a single A/D converter is used (as long asit is constant). But in interleaved A/D converters, these errors will cause irregularsampling intervals, which lead to distortion of the signal. Time errors in interleavedADCs are also referred to as static jitter. The time errors are further discussed inChapter 4.

2.3.5 Jitter

The jitter is a random deviation from the nominal sampling instances. The jitteris caused by noise on the clock signal. On the sampled signal, the jitter causesadditional noise. There is also a signal dependent jitter. The input signal can

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2.3 Specifications of A/D Converters 25

cause a disturbance on the clock and cause a deviation from the nominal samplinginstance.

2.3.6 Gain Errors

The scaling of an A/D converter causes gain errors. If u(t) is the analog input andy(t) is the digital output we have, disregarding other errors, that

y(t) = σu(t) (2.3)

The scaling errors are important in DC systems where it is important that themeasured level is correct. It is also important in interleaved A/D converters, wheredifferent scaling in different A/D converters cause distortion.

2.3.7 Dynamic Specifications

The dynamic specifications describe how much a signal is distorted by quantizationand other errors. We assume here a signal model

y(t) = s(t) + e(t) + d(t) (2.4)

where s(t) is the analog input signal and y(t) is the digital output. The quan-tization noise is described by e(t) and d(t) is the distortion, i.e., errors causedby nonlinearities in the ADC and dynamic nonlinearities in the sample-and-holdcircuit.

Signal-to-Noise Ratio

The Signal-to-Noise Ratio (SNR) of an ADC depends mainly on the amplitudequantization. SNR is usually measured in decibel (dB) and is defined as

SNR = 10 logE(s2)E(e2)

(2.5)

where s(t) is the signal and e(t) is the noise. Here E(·) denotes the expected value.With a quantization step of qs, the mean squared error due to quantization will be

E(e2) =1qs

∫ qs/2

−qs/2e2de =

112q2s (2.6)

since the quantization error for most signals can be assumed to be uniformly dis-tributed. The assumption of uniform distribution is true if the amplitude distri-bution of the input signal is approximately constant between two reference levels,which it usually is. A full scale sinusoid converted in a n-bit ADC will have apeak-to-peak amplitude of App = 2nqs. The RMS (Root mean square) value ofthis signal is Arms = 2nqs

2√

2. From the power of the signal and the power of the

noise, we can calculate the theoretical SNR

SNR = 10 logA2rms

E(e2)= 10 log 2n

√1.5 = 6.02n+ 1.76 (2.7)

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26 Chapter 2 Background

Signal-to-Noise plus Distortion Ratio

The Signal-to-Noise plus Distortion Ratio (SNDR or SINAD) is defined as

SNDR = 10 logE(s2)

E((d+ e)2)(2.8)

where s(t) is a sinusoidal signal. That is, the SNDR is a measure of the power ofeverything that does not come from the signal itself, i.e., both noise and distortion.

Effective number of bits

The Effective number of bits (ENOB) is proportional to the SNDR and expresseshow many bits, assuming only quantization noise, a certain SNDR corresponds to

ENOB =SNDR− 1.76

6.02(2.9)

Total Harmonic Distortion

Total Harmonic Distortion (THD) is defined as the signal power compared to thesum of the power of all harmonic distortion components.

THD = 10 logE(s2)E(d2)

(2.10)

Spurious Free Dynamic Range

The Spurious Free Dynamic Range (SFDR) is measured with a single sinusoidalinput signal. The SFDR is the difference between the signal power and the powerof the largest harmonic, measured in dB. Figure 2.14 shows how the SFDR ismeasured.

Dynamic Range

The concept of dynamic range is used to describe the performance of an A/Dconverter. It should describe the range where different signals can be separated.The notation here is a little sloppy. Dynamic range is often used both for SFDRand SNDR and it should therefore be used with care. If a precise performancemeasure is wanted, SFDR or SNDR should be used.

2.4 ADC Applications in Communication Systems

In this thesis, only wide band ADCs are discussed. We will in this section de-scribe two applications that require wide band A/D converters with high dynamicrange: DSL modems and Software Radio. Applications that use narrow band A/Dconverters, such as mobile phones, are not discussed here.

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2.4 ADC Applications in Communication Systems 27

0 0.2 0.4 0.6 0.8 1−50

−40

−30

−20

−10

0

10

Normalized frequency

Sig

nal e

nerg

y [d

B]

SFDR=30dB

Figure 2.14 Definition of SFDR. The highest peak stems from the signal,the SFDR is the distance from this peak to the highest distortion peak.

2.4.1 Digital Subscriber Line Technology

The telephone network is designed for voice communication. Therefore the band-width, chosen to be suitable for the human voice, is 300-3400 Hz. During thelast decades, the demands on data communication have increased. Data commu-nication over telephone lines is very cost effective since the infrastructure alreadycovers almost every home. The most common way of communicating over tele-phone lines is with voice band modems. The bandwidth of 3kHz is however rathernarrow and the bit rate limit of voice band data communication (56kb/s) has al-ready been reached. Another drawback with voice band data communication isthat the telephone communication is blocked while the modem is used. DigitalSubscriber Line (DSL) technology provides fast digital communication over thePSTN (Public Switched Telephone Network) [111, 45, 84]. It also allows telephonecommunication and data communication simultaneously. However, this technologyrequires receivers with very high dynamic range. The first DSL standard was theISDN (Integrated Services Digital Network) at 144kb/s. This bit rate was until afew years ago assumed to be the fastest rate possible over PSTN (Public SwitchedTelephone Network). Today we have HDSL (High bit rate DSL) at 1.5Mb/s, ADSL(Asymmetric DSL) at 6Mb/s and striving towards VDSL (Very high bit rate DSL)at 52Mb/s.

In ADSL and VDSL a frequency band above the voice band is used for thedata communication, see Figure 2.15. This allows data communication and voicecommunications simultaneously over the same telephone line. In ISDN and HDSL,however, the voice band and data communications band overlaps. The data com-

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28 Chapter 2 Background

Telephone band

Guard bandUpstream band

Downstream band

Frequency

Figure 2.15 Frequency allocation for DSL.

munication band is divided into one band for upstream transmission and one bandfor downstream transmission. By allocating different bandwidths for upstreamand downstream transmission, asymmetric communication can be achieved, i.e.,higher downstream bit rate than upstream, since usually more data is downloadedthan uploaded by an end user. To avoid crosstalk, i.e., interference between up-stream and downstream signal, two methods can be used. The first method isto separate the upstream and downstream band as in Figure 2.15, this is knownas Frequency Division Multiplexing (FDM). The other method is to separate up-stream and downstream signals in time, i.e., one timeslot is used for downstreamcommunication and the next for upstream communication, this is known as TimeDivision Multiplexing (TDM). Both these methods are used in DSL. Between thevoice band and the DSL band a guard band is allocated to avoid interference be-tween voice and data. Table 2.2 shows the limits of the communication frequencybands for the different DSL technologies [81], standardized by ANSI [2, 3]. Sincethe PSTN is designed for voice communication, the data communication band ishighly attenuated. Therefore the high speed DSL technology only works if thereceiver has high dynamic range. A critical part here is the A/D converter.

Modulation

Telephone lines can only transmit analog signals. Therefore the DSL signalsmust be modulated before transmission. Modulation means that the digital signalchanges some property of a sinusoidal carrier signal depending on the value of thedigital signal. The carrier can be modulated by changing for instance the phase(PSK), the frequency (FSK), or the amplitude (PAM) [55]. In for example PulseAmplitude Modulation (PAM), each symbol in the digital signal, mk, determines

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2.4 ADC Applications in Communication Systems 29

DSL type ISDN HDSL ADSL VDSLVoice bandstart [kHz] 0.3 0.3 0.3 0.3Voice bandend [kHz] 3.4 3.4 3.4 3.4Guard bandstart [kHz] – – 3.4 3.4Guard bandend [kHz] – – 25 300Upstream bandstart [kHz] 0.3 0.3 25 300Upstream bandend [kHz] 4 196 160 700Downstream bandstart [kHz] 0.3 0.3 240 1000Downstream bandend [kHz] 4 196 1100 Variable

Table 2.2 The DSL frequency bands.

the amplitude of a pulse that modulates the carrier during a time Tb.

x(t) = mkφ(t) sin(ωt), kTb ≤ t < (k + 1)Tb (2.11)

A symbol can consist of one or several bits. A two-dimensional carrier can also beused. This means that two orthogonal signals are used as carrier

s(t) = cos(ωt) + i sin(ωt) (2.12)

The components of the carrier are referred to as the inphase (I) and the quadrature(Q) part of the signal. The inphase and quadrature parts can then be modulatedindependently by for example PAM. The two dimensional PAM is called QAM(Quadrature Amplitude Modulation). In Figure 2.16, QAM diagrams of differentsizes are shown. The QAM modulation is used for xDSL transmission [111].

DMT

To avoid too much interference between adjacent symbols, the channel must havegood characteristics. This means that the gain should be constant over all fre-quencies and the phase should be linear. The telephone line is far from this idealsituation in the frequency band used for DSL transmission. The telephone linetypically has a low pass characteristic as exemplified in Figure 2.17. The modula-tion techniques assume a channel with flat frequency characteristics, otherwise alot of intersymbol interference will occur, i.e., adjacent symbols interfere with each

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30 Chapter 2 Background

I

Q

4−QAM

I

Q

16−QAM

I

Q

64−QAM

Figure 2.16 QAM modulation diagrams

Frequency

1

4kHz

Figure 2.17 Example of a telephone line frequency characteristics.

other. This means that this low pass channel is not suitable for communication.Therefore the frequency band is divided into several frequency separated channels,and a carrier is modulated with digital data in each channel. This type of signal iscalled a DMT-signal (Discrete MultiTone).

In ADSL, 256 channels are used for the downstream transmission and 32 chan-nels for the upstream transmission. Each channel has a bandwidth of 4.3125 kHz.In each channel, the carrier is modulated with QAM. The size of the QAM-diagramis adaptively decided by the current SNR in each channel. The altering QAM sizechanges the transmission capacity. Therefore, the bit rate in DSL systems changeswith the channel quality.

The amplitude distribution for each channel is basically a sinusoidal amplitudedistribution. The amplitude distribution of a sinusoidal signal is quite constant

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2.4 ADC Applications in Communication Systems 31

except near the maximum and minimum signal values where the amplitude dis-tribution is very high. This means that the amplitude distribution is shaped likea bathtub, see Figure 2.18. With 256 channels the amplitude distribution for the

−1 −0.5 0 0.5 10

0.5

1

1.5

2

2.5

3

3.5

amplitude

prob

abili

ty d

ensi

ty

Figure 2.18 Amplitude distribution of a sinusoidal signal.

total signal will be close to a Gaussian distribution according to the central limittheorem.

A DSL modem requires an A/D converter with high bandwidth (in ADSL thetotal bandwidth for downstream transmission is 4.3125 kHz·256 = 1.1 MHz) andhigh dynamic range to separate the weak tones at high frequencies from harmonicsof strong tones at lower frequencies.

2.4.2 Software Radio

A traditional (superheterodyne) radio receiver requires a lot of analog components,see Figure 2.19. First the radio signal is received by the antenna. The signal is thenamplified by the LNA (Low Noise Amplifier). These parts are the only ones thatare shared by all radio channels [10, 11]. After these components one receiver isrequired for each channel. The RF (Radio Frequency) signal is first downconvertedby a mixer and a local oscillator with variable frequency to an IF (IntermediateFrequency) signal. The IF frequency is the same for all channels. The IF signal isthen downconverted to the baseband. Between the mixers, analog filters are used todiscriminate frequencies outside the signal band. The last step before digitizationis to decompose the signal into inphase and quadrature components. These signalsare then converted in a narrow band ADC. In e.g., GSM900 the total bandwidthis about 25 MHz while the channel bandwidth is about 200 kHz [105]. A GSMbase station can therefore handle more than 100 channels and with the traditional

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32 Chapter 2 Background

LNA

Antenna

Filter Filter

Mixer Mixer

I

Q

Variable Fixed

ADC

Shared One receiver per channel

Figure 2.19 A traditional radio receiver architecture.

technique one receiver is required for each channel.If the ADC is moved closer to the antenna, more components can be shared

for all channels and more of the signal processing can be done in software. Thismeans that the hardware cost can be substantially reduced. An ideal softwareradio would consist of an antenna, one ADC that samples directly on the antennasignal, one DAC that generates the outgoing antenna signal in the tranceiver anda DSP (Digital Signal Processor). All the signal processing should then be donein software in the DSP [101], see Figure 2.20. This ideal situation is, however, not

LNA

Antenna

FilterWideband

FastADC

DSP

Shared One DSP per channel

Figure 2.20 The ideal software radio architecture.

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2.4 ADC Applications in Communication Systems 33

realizable today. One step towards the ideal software radio is reachable though,see Figure 2.21 [10, 83]. Here a wide band mixer and a fixed local oscillator is used

LNA

Antenna

Filter

Wideband

WidebandFast

ADC

Mixer

DSP

Shared One DSP per channel

Fixed

Figure 2.21 A software radio receiver architecture.

to downconvert the whole signal band to IF. The IF signal is usually a band passsignal above the base band. After that a wideband ADC converts the analog IFsignal to a digital signal which is separated into different channels in software. Therest of the signal processing is then done in software in a DSP.

There are other advantages with a software radio architecture, besides the hard-ware reduction. A software radio base station could be reconfigured without re-placing any hardware [110]. The same hardware could also be used for differentsystems, e.g., GSM and D-AMPS, since all the signal processing is performed insoftware. The software radio can in the future also be useful in handheld termi-nals [112]. Instead of implementing several radio receivers for multiband mobilephones, one receiver could be used for all systems and different software pack-ages could be used to switch between systems. In handheld terminals the powerconsumption is however still limiting the use of this technique.

The requirements on the ADC in a software radio architecture are very high.When the signal is received in the antenna in for instance a radio base station,some of the carriers are strong and some of the carriers are much weaker. Whenthis wide band signal is converted in the ADC the SFDR must be high enough sothat a weak carrier can be separated from harmonics from the strong carriers [117],see Figure 2.22. The SNDR must also be high so that weak carriers can be seenabove the noise floor.

The IF maximum frequency is still usually rather high. According to theNyquist sampling theorem the signal must be sampled with at least twice that fre-quency. The fact that the IF signal is a bandpass signal can however be used to re-duce the sampling frequency by using undersampling [114]. If we know that the sig-

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34 Chapter 2 Background

Frequency

Carrierpower

Noise floor

Strongcarrier

Harmonic WeakCarrier

Figure 2.22 Weak carrier close to harmonics from strong carrier.

Frequency

OriginalIF signal

AliasedIF signal

f1 f2fs

fc

Figure 2.23 The principle of undersampling. The signal lies in a frequencyband between f1 and f2. The sampling frequency, fs, is smaller than 2f2

and the signal is therefore aliased to the base band. fc is an integer multipleof fs.

nal is confined to the frequency interval [f1, f2], a sampling frequency fs ≥ f2−f1,where fc = f1+f2

2 is a multiple of fs, is enough, see Figure 2.23. The undersamplingtechnique reduces the speed requirements on the amplitude quantization part ofthe ADC. However, undersampling results in a higher noise floor in comparison tothe Nyquist sampling. Also, the sample-and-hold circuit must still have the samebandwidth as with Nyquist sampling to track the fast varying signal. Despite theundersampling technique, the ADC is still the critical part in software radio [83].

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2.5 Blind Equalization 35

2.5 Blind Equalization

In many communications systems, the signal is distorted by the channel betweensender and receiver. In wire transmission, there are echoes that distort the sig-nal. In radio communication, there is distortion caused by multipath fading, i.e.,the signal arrives as a sum of different timedelays. There is also linear dynamicaldistortion in all communication channels. The typical situation is that we onlyhave access to the received signal. An A/D converter is a similar system in thesense that only the output is measurable. The analog input signal is distorted bythe A/D converter and the digital output is therefore not correct. In communi-cation systems the channel is normally approximately inverted by a linear filter.To invert the channel the channel must be known. The classical way of identify-ing the channel is to send a known training signal with regular intervals and thenmeasure the output, yt. The training signal can however be eliminated and thechannel can be identified from only the received signal. This is known as blindequalization [5, 6], see Figure 2.24. The blind equalization can however not be

ut yt ut

channel equalizer

Figure 2.24 The equalization problem

done without any knowledge of the signal. In communication channels for examplethe input alphabet is known [51, 57]. The problem in A/D converters is similar,we have an A/D converter with unknown characteristics and we can only measurethe output, see Figure 2.25. The prior information about the input signal that

compensation

ut yt ut

ADCmismatch

Figure 2.25 The equalization problem in an ADC

is used in the equalization of an A/D converter is different for different types oferrors. For equalization of static nonlinear amplitude errors, a spatial smoothnessassumption is used. This means that the amplitude distribution of the input sig-nal, fU (u), should be smooth. This is further described in Chapter 3. For timingerror equalization, a temporal smoothness assumption is used. This means thatthe input signal should be bandlimited. The timing error equalization is furtherdescribed in Chapter 4.

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36 Chapter 2 Background

2.6 Problem Formulation

Real A/D converters are far from ideal. There are many different kinds of errorsthat deteriorate the performance of ADCs. In this thesis, we will discuss staticerrors in the reference levels in a single ADC. We will also discuss mismatch errorsin time interleaved ADCs.

The sample-and-hold circuit introduces nonlinear dynamic errors depending oninput amplitude and input slope as was discussed in Section 2.1, these errors arenot further discussed here.

2.6.1 Reference level errors

In flash ADCs, pipelined ADCs and successive approximation ADCs, a resistanceladder is used to generate the digital reference levels. The resistances are often im-plemented with CMOS transistors, which allows high integration and small featuresizes. The problem is that the manufacturing process for these small dimensions isnot very accurate. The resistances can therefore vary quite a lot, which means thatthe reference levels will be irregularly spaced. Further, in pipelined and successiveapproximation ADCs, several stages are used for the conversion. If the resistancesare different, the different stages will not be well matched, i.e., the length of theresistance ladder will not fit into one interval in the previous stage. These errorscan be taken care of with calibration of the component. But there are a lot ofcomponents to match, so calibration is very time consuming and costly. Further,the components may change with for instance temperature and aging. This meansthat the ADC must be recalibrated every now and then. To avoid this the errorsshould be adaptively estimated while the ADC is used. This means that the in-put signal is unknown, and only the output signal is available, i.e., the estimationmethod must be blind.

2.6.2 Mismatch errors in time interleaved ADCs

In a time interleaved ADC system, several ADCs are used in parallel. Due tothe manufacturing process, these ADCs are not exactly identical. Three kinds ofmismatch errors are introduced because of the time interleaved structure:

• Time errorsThe delay times of the clock between the different ADCs are not equal. Thismeans that the signal will be periodically but non-uniformly sampled. Theseerrors are also reffered to as clock skew or static jitter.

• Amplitude offset errorsThe ground level differs between the different ADCs. This means that thereis a constant amplitude offset in each ADC.

• Gain errorsThe gain, from analog input to digital output, differs between the differentADCs.

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A Sample-and-hold 37

These errors can be taken care of with calibration, but for the same reasons as men-tioned above it is better to estimate the errors adaptively while the ADC is used.Again, only the output signal is available for measurement, and the estimationmust therefore be blind.

A Sample-and-hold

A.1 Nonlinearities in sample-and-hold

An ideal sample-and-hold circuit is not possible to implement in reality. Especiallyfor high frequency signals, the sample-and-hold circuit has limitations in trackingthe signal and it also introduces nonlinear distortion.

The sample-and-hold circuit in CMOS technology is implemented with MOS-FET transistors and capacitances. NMOS transistors are often used due to higherelectron mobility in comparison with PMOS transistors. An ideal transistor shouldact as a switch. This means that the transistor is conducting when the gate voltageis larger than a threshold voltage and non conducting otherwise, see Figure 2.26.In this ideal case, the resistance in the transistor is zero when it is conducting,i.e., the voltage drop over the transistor is zero. This simple model is however notenough to describe the properties in a real transistor. The nonlinear characteris-tics of the NMOS transistor can be found in for instance [106]. Another transistormodel that is based on real measurements and used in SPICE simulations is givenin [12]. A transistor, in its conducting mode, can be modeled as a nonlinear, signal

VS VD

VG < VTH

Figure 2.26 A simple model of the transistor as a switch. The transistoris conducting when VG > VTH where VTH is a threshold voltage.

dependent, resistance

RON =1

µnCoxWL (VG − VS − VTH)

(2.13)

where W and L are the length and width of the transistor, µn and Cox are processparameters, and VG, VS and VTH are gate, source and threshold voltages respec-tively.

An implementation of the sample-and-hold circuit, the bottom plate sampler,consists of three NMOS transistors and a capacitance [23, 26], see Figure 2.27. Theinput signal, u0(t), is biased with a constant signal ubias so that the input to thesample-and-hold circuit u(t) = u0(t) + ubias. The bias is applied to guarantee thatthe voltage on the input node always is positive. The three transistors are denoted

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38 Chapter 2 Background

VCu(t)

y(t)

M1

M2

M3

CH

Figure 2.27 The bottom plate sampler. Three transistors, M1,M2 andM3 and a capacitance CH are used. u(t) is the analog input signal, y(t) isthe output from the sample and hold, which should follow u(t) during trackmode and be kept constant during hold mode.

M1, M2 and M3. The capacitance is denoted CH and the voltage over CH whichis the output signal is denoted y(t).

During the track mode, or acquisition phase, the transistors M1 and M3 areclosed and M2 is closed. In track mode the transistor M2 does not affect the circuit,since it is short-circuited. The capacitance CH is charged by u(t). The sample-and-hold circuit can then be modeled as a capacitance in series with two nonlinearresistances according to (2.13), see Figure 2.28.

In the transition from track to hold mode the switching transistors should beopened so that the capacitance is isolated from the input signal and the ground.Therefore the transistor M1 is opened first and M3 is opened next. During thistransition some disturbances occur, that limit the performance of the sample-and-hold circuit.

• Thermal noise from the switches contributes with a noise charge

Qn =√kBTC (2.14)

• Clock-Feedthrough (CFT): The clock-signal contributes to the charge due tothe overlap capacitance between the clock signal and the switch [108]. Thiscan be reduced by a differential circuit [56].

• Charge injection: When the transistors are closing, charge from the channelin the transistor will move to the capacitance. If the clock signal switches fast

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A Sample-and-hold 39

u(t)

y(t)

CH

RON1

RON3

Figure 2.28 A model of the bottom plate sampler in track mode.

enough this disturbance is however quite small [109]. Some of the injectedcharge is also cancelled by the dummy transistor M2.

When the transition from track to hold mode is completed, the capacitance shouldhold a constant voltage during the conversion. Because of leakage currents thevoltage slowly decreases. Therefore the conversion should not take too long time.

A.2 Dynamic error correction methods

The performance of the ADCs are deteriorated by the nonlinearities in the sample-and-hold circuit. The performance could be increased a lot if these errors couldbe compensated for. A lot of work on compensation methods for dynamic, sig-nal dependent errors has been done. In this section some published methods forcompensation of dynamic errors are briefly discussed. In [107] a correction tablebased on current and previous sample is proposed for correction. The table has oneentry for each combination of current and previous sample, uk = f(yk, yk−1). Thismeans that a 2n×2n table is required for an n-bit ADC. This method works for lowprecision A/D converters, but for high precision A/D converters the table wouldbe too large. To improve the accuracy the table could be based on the slope ofthe input signal instead of the previous sample. The slope can either be measuredwith extra hardware [104] or estimated from the output by a digital filter [67, 46].This improves the accuracy, since the derivative is measured more accurately, butthe size of the table is still too large to be used in high precision A/D converters.In [68] the table size is reduced by approximating the table with triangular basisfunctions and in [4] a neural network is used to reduce the memory requirements.In [86, 88, 89, 87, 90] look-up tables for several time-lags back in time are used.The size of the tables are here reduced by only selecting the table entries thatcontribute most to the performance increase. This method gives a significant re-duction of the table size. In [82] a method based on sinusoid histograms is used

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40 Chapter 2 Background

for estimation of dynamic errors. Two histograms are used, one for negative slopesand one for positive slopes. The amplitude distribution of the input signal mustbe known in this approach, and a slope detector must be used to find out if theslope is positive or negative. In [32] a model based correction method with lookuptables is suggested.

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3

Mismatch Compensation ofStatic Nonlinearities in

SA-ADC

This chapter treats the problem of estimating the true transfer function of an A/Dconverter. The A/D converter is here seen as a static function that maps the analoginput signal to a digital output signal. Due to imperfections in the manufacturingprocess the conversion is not ideal. The traditional way to overcome these imper-fections is to calibrate the A/D converter when it is manufactured. Calibration istime-consuming and costs a lot of money. The A/D converter characteristics mayalso change when it is used, e.g., due to temperature change or aging. This meansthat the A/D converter has to be recalibrated at regular intervals to keep its per-formance. A lot of time and money could be saved if the errors could be estimatedand corrected online, when the A/D converter is used. The analog input signal isof course unknown (otherwise we would not need the A/D converter). A knowntraining signal would require a signal generator, or a memory and a D/A converter,on the A/D converter chip. These solutions are costly and complex to implement.Therefore only the digital output signal can be used for the error estimation. Thischapter deals exactly with this problem: how to estimate and correct static errorsusing only the output signal.

The outline of the chapter is as follows. Section 3.1 describes how the A/Dconverter works in the ideal case. In Section 3.2, a description of what causes theerrors in the A/D converter and how the errors affect the output signal follows.Section 3.3 describes the equalization method with known input signal amplitudedistribution. In Section 3.4, this method is extended so that it also works with

41

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42 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

unknown input signal amplitude distribution. In Section 3.5, an A/D converteris simulated and the equalization methods are applied to the output signal. Thechapter ends with Section 3.6 where the algorithm is tested on a real A/D converter.

3.1 A/D Converter Description

In this section, the structure of the ADC is described. More detailed informationabout different A/D conversion methods can be found in for instance [113].

3.1.1 SA-ADC

The type of A/D converter that is discussed in this chapter is called Successive Ap-proximation A/D converter (SA-ADC). This A/D converter was briefly describedin Chapter 2.2.3, but is again described here in more detail. The SA-ADC consistsbasically of a sample-and-hold circuit, a resistance ladder and a comparator. Thesample-and-hold circuit is required to keep the analog input signal at a constantlevel during each sampling interval.

uSH(t) = u(kTs), kTs ≤ t < (k + 1)Ts (3.1)

Here u(t) and uSH(t) are the input and output signals from the sample-and-holdcircuit. The sample-and-hold circuit is discussed in more detail in chapter 2. Theresistance ladder, see Figure 3.1, defines the possible digital values. A constant

r0

r1

r2

r3

0

A

R

R

R

R

Figure 3.1 Resistance ladder for a 2-bit SA-ADC.

voltage, A, is applied over the whole resistance ladder. The available digital valuesare the voltages between the resistances. This means that for an n-bit ADC, theresistance ladder must have 2n resistors. With all resistances equal, the kth level,rk, will have the value Ak2−n. The comparator, see Figure 3.2, is used to comparethe analog signal with a reference value. The comparator is an amplifier withinfinite gain that is used to decide if the input signal is larger than a reference level

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3.1 A/D Converter Description 43

or not.

cout ={C if uSH(t) > rk−C if uSH(t) < rk

(3.2)

3.1.2 Binary Search Algorithm

To find the correct digital level, the analog signal is first compared to the level inthe middle of the resistance ladder. If the analog signal is larger than this referencevalue, the most significant bit (MSB) is set to zero, and the search is continuedin the lower half of the ladder. Otherwise the MSB is set to one and the searchcontinues at the upper half. This process continues until the correct level is found,see Figure 3.3. The correct level is the nearest reference level smaller than theanalog signal. This method of finding the digital values is called the binary searchalgorithm. The precision is increased with one bit for every comparison.

uSH

rk

±C

Figure 3.2 Comparator for SA-ADC. rk is a reference level from the resis-tance ladder and uSH is the signal from the sample-and-hold circuit. Theoutput of the comparator is a positive or negative constant depending onwhich of the inputs that is largest.

0

1

2

3

4

u=1.5

0

1

2

3

4

u=1.5

1.5

2

−C

y=**

1.5

1

C

y=0* y=01

Figure 3.3 The binary search algorithm in a 2-bit ADC. The referencelevels are: 0, 1, 2, 3. The analog signal, u, is 1.5. u is first compared to level2 and the MSB is set to 0. In the next step u is compared to 1 and the LSBis set to 1.

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44 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

1

2

0

1

2

3

4

5

6

7

Figure 3.4 Subranging SA-ADC. The most significant bits are found in thefirst ladder, the least significant bits are then found in the second ladder.

3.1.3 Subranging Technique

In a high precision SA-ADC the resistance ladder would be very long. A 16-bitADC requires 216 = 65536 resistances. To avoid this the subranging technique canbe used [28, 78]. In a subranging SA-ADC two or more shorter resistance laddersare used in series. In an m + n subranging ADC the m most significant bits arefound from the first resistance ladder and the n least significant bits are foundfrom the second resistance ladder. Usually, the full range of the second resistanceladder is longer than one step in the first ladder, see Figure 3.4. This overlap isused to correct dynamic errors in the ADC. The result of a dynamic error is thatan incorrect decision is made in the first ladder. With the overlap of the secondladder, this error can be corrected since the signal still lies in the range of thesecond ladder. This means that the output of the ADC is redundant and it is notpossible, from the digital output, to find the values from each subranging step. Thisis shown by the following example: Suppose the ADC consists of two subrangingsteps, each with three bits. Denote the values from these steps a, b ∈ 0, · · · , 7. Thedigital output is formed as y = 3 · a+ b. In this case a = 0, b = 4 gives the same yas a = 1, b = 1.

3.2 Problem Formulation

The previous section described how the A/D converter should work if all the com-ponents were perfect. In a real A/D converter, there are errors in many of thecomponents. In this section, a description of how errors in the resistances affectthe performance follows.

3.2.1 Resistance Errors

Assume first that all resistances in the resistance ladder are equal. The transferfunction (here a static mapping) from the analog input signal, u(t), to the digitaloutput signal, y(t), will then become a step function with equal length of all steps,

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3.2 Problem Formulation 45

see Figure 3.5. By applying an input signal with known amplitude distribution,

0 1 2 3 4 5 6 7 80

1

2

3

4

5

6

7

8Transfer function for ideal ADC

u(t)

y(t)

(a) Mapping from analog input to digitaloutput. Dashed line indicates the ideal,non quantized, mapping.

0 1 2 3 4 5 6 70

0.02

0.04

0.06

0.08

0.1

0.12

0.14Amplitude distribution of y(t)

digital value

(b) Amplitude distribution for the outputsignal when the input signal is uniformlydistributed over the full range.

Figure 3.5 Characteristics for an ideal A/D converter.

the amplitude distribution of y(t) can be studied. Figure 3.5 shows the amplitudedistribution of y(t) when u(t) has a uniform amplitude distribution over the fullrange of the ADC. In this case y(t) has the same amplitude distribution as u(t). Ifthere are errors in the resistances, there will also be errors in the digital referencelevels. Figure 3.6 shows the transfer function of an A/D converter with a differentialnonlinearity (reference level error) of up to 50%. If there is a long distance betweenreference levels rk and rk+1, there will be many samples with the value k. Thereforethe amplitude distribution of y(t) is not the same as the amplitude distribution ofu(t) in this case as shown in Figure 3.6. If the errors are known an equalizer can beconstructed that maps y(t) to the correct reference values, see Figure 3.7. With thetransfer function of the ADC and the equalizer in series, the amplitude distributionof the corrected output, z(t), is the same as the amplitude distribution of u(t), seeFigure 3.8. The amplitude distribution of z(t) is here normalized with the widthof each interval. This is the natural discretization of the amplitude distribution ofu(t) when we have known reference levels. By amplitude distribution of z(t) wethen mean

fZ(k) =number of samples at level k

rk+1 − rk, k = 0, . . . , 2n − 1 (3.3)

Note:

• The actual reference levels cannot be changed.

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46 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 1 2 3 4 5 6 7 80

1

2

3

4

5

6

7

8Transfer function for ADC with errors

u(t)

y(t)

(a) Mapping from analog input to digitaloutput. Dashed line indicates the ideal,non quantized, mapping.

0 1 2 3 4 5 6 70

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2Amplitude distribution of y(t)

digital value

(b) Amplitude distribution for the outputsignal when the input signal is uniformlydistributed.

Figure 3.6 Characteristics for an A/D converter with static errors in theresistance ladder.

ADC equalizeru(t) y(t) z(t)

Figure 3.7 A/D converter and equalizer.

• We can only adjust the digital levels to the reference levels that we actuallyhave, so that we get a linear A/D converter.

The errors in the resistances are however usually unknown. Instead of looking atthe errors in the resistances, the errors in the reference levels can be studied. Thisis equivalent since the reference levels can be calculated from the resistance values.If the voltage over the whole resistance ladder is Vladder = 2nV , the k’th referencelevel is

rk =∑ki=1Ri∑2n

i=1Ri2nV (3.4)

where Ri is the ith resistance. It is more natural to look at the errors in thereference levels since these levels give the digital signal values. The first level,r0 = 0, is assumed to be correct since it is connected to ground. In an n-bit ADCthere is therefore 2n−1 unknown levels. Assume that the nominal distance between

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3.2 Problem Formulation 47

0 1 2 3 4 5 6 7 80

1

2

3

4

5

6

7

8Transfer function for ADC and equalizer in series

u(t)

z(t)

(a) Mapping from analog input to com-pensated digital output. Dashed line in-dicates the ideal, non quantized, mapping.

−1 0 1 2 3 4 5 6 7 80

0.02

0.04

0.06

0.08

0.1

0.12

0.14Amplitude distribution of z(t)

digital value

(b) Amplitude distribution for the com-pensated output signal when the inputsignal is uniformly distributed.

Figure 3.8 Characteristics for an A/D converter followed by an equalizer.

adjacent reference levels is 1. This is no restriction since any other distance can berescaled to this distance. The error in the distance between reference levels rk−1

and rk is denoted θk, i.e., θk = rk − rk−1 − 1. The error parameters are collectedin the error vector Θ = [θ1 θ2 . . . θ2n−1]T . The ADC maps the analog signal onto adigital value according to

y(t) = k if rk ≤ u(t) < rk+1, k = 0, . . . , 2n − 1 (3.5)

Here u(t) is assumed to be limited to the range of the ADC before the conversion,so that in an n-bit ADC 0 ≤ u(t) < 2n.

3.2.2 Subranging Mismatch

In a subranging ADC another kind of error is introduced besides the resistanceerrors described in the previous section. If a ladder in the subranging structure islonger or shorter than the expected length there will be matching errors betweenthe subranging stages. Figure 3.9(a),(b) shows how errors in the resistance valuesinfluence the amplitude distribution of the output. In Figure 3.9(c), two subrangingstages are shown where the length of the second stage fits the length of one intervalin the first stage. In Figure 3.9(d) we can see the amplitude distribution of theoutput when the input is uniformly distributed, here it is correct since we have noresistance errors and no matching errors. In Figure 3.9(e), the interval in the firstsubranging stage is too long. Therefore peaks occur in the amplitude distribution

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48 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

110101100011010001

111

000

011

010

Stage 1 Stage 2

y z

z

z

110101100011010001

111

000 110111

010001000

Code density,HM

Decimal CodeD

3⋅6+1=19:y=011,z=001

3⋅6+2=20:y=011,z=010

2⋅6+6=18:y=010,z=110

2⋅6+5=17:y=010,z=101

2⋅6+4=16:y=010,z=100

2⋅6+3=15:y=010,z=011

2⋅6+2=14:y=010,z=010

2⋅6+1=13:y=010,z=001

1⋅6+6=12:y=010,z=110

011

010

Stage 1 Stage 2

yz

z

z

110101100011010001

111

000110111

010001000

Err

or

Code density,HM

Decimal CodeD

2⋅6+7=19:y=010,z=1113⋅6+1=19:y=011,z=001

2⋅6+6=18:y=010,z=110

2⋅6+5=17:y=010,z=101

2⋅6+4=16:y=010,z=100

2⋅6+3=15:y=010,z=011

2⋅6+2=14:y=010,z=010

2⋅6+1=13:y=010,z=0011⋅6+7=13:y=010,z=111

3⋅6+2=20:y=011,z=010

1⋅6+6=12:y=010,z=110

011

010

Stage 1 Stage 2

yz

z

z

110101100011010001

111

000

011010001000E

rror

Code density,HM

Decimal CodeD

3⋅6+2=20:y=011,z=010

3⋅6+3=21:y=011,z=011

2⋅6+6=18:y=010,z=1102⋅6+5=17:y=010,z=1012⋅6+4=16:y=010,z=100

2⋅6+3=15:y=010,z=011

2⋅6+2=14:y=010,z=010

2⋅6+1=13:y=010,z=0011⋅6+6=12:y=010,z=110110

101

111

3⋅6+1=19:y=011,z=001

1⋅6+5=11:y=010,z=101

(c) (d)

(f)(e)

(g) (h)

Single stage

D (binary code)

Code density,HM

Decimal CodeD

(a) (b)

654321

7

0

Figure 3.9 Mismatch in a subranging ADC. Resistance errors (a) causeserrors in the amplitude distribution (b). Subranging with perfect matching(c) gives a correct amplitude distribution (d). Mismatch between subrangingstages (e) and (g) gives peaks and dips in the amplitude distribution (f) and(h).

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3.3 Equalization with known Input Distribution 49

around the transition between levels in the first stage, see Figure 3.9(f). Thesepeaks are caused by the redundancy, since {a = 011, b = 001} and {a = 010, b =111} give the same output value. In Figure 3.9(g) the interval in the first stage istoo short, causing dips in the amplitude distribution, Figure 3.9(h).

Implementation independent parameterization

Here the subranging structure is not taken into account. The ADC is seen asone ladder where the distance between some of the levels might be zero or verylong, corresponding to the mismatch errors in the subranging structure. With thisparameterization, the levels in the second stage will have many error parameters,one for each level in the first ladder. These parameters can also take on differentvalues despite that they have the same value by the physical implementation. Theparameterization will be the same as in the previous section except that there willnot necessarily be 2n levels, since there is some overlap between the first and thesecond ladder. We have then the parameter vector Θ = [θ1 . . . θm]T , where m + 1is the total number of nominal levels.

3.3 Equalization with known Input Distribution

In this section a method for estimating and correcting errors in the reference levelsis described. Parts of these results have been presented previously in [30]. Esti-mation methods based on histograms of the output signal and known amplitudedistribution of the input signal have been used earlier. In for example [48, 15] aknown training signal is used. In [49, 14] an additional A/D converter with veryhigh accuracy is used to estimate the true amplitude distribution.

3.3.1 Assumptions and Notation

The analog input signal is denoted u(t) and the digital output signal is denotedy(t). The corrected digital signal is denoted z(t). The amplitude distribution ofu(t) is denoted fU (u) and the amplitude distribution of y(t) is denoted fY (y). Themeasured amplitude distribution is an estimate of fY (y) and is denoted fY (y).The amplitude distribution of the corrected signal, z(t), depends on the parametervector Θ = [θ1, . . . , θ2n−1] and is denoted fZ(z,Θ). θk denotes the deviation fromthe nominal distance between adjacent levels, i.e., θk = rk − rk−1 − 1. Θ∗ denotesthe true error parameters. We assume that the reference level errors are the onlyerrors in the A/D converter. We also assume that these errors change much moreslowly than the sample time. This is a reasonable assumption since the samplerate usually is in the order of MHz and the temperature, for example, is quiteconstant during at least some seconds. The normal input signal should be usedfor the identification, i.e., no special calibration signal is available. y(t) is the onlymeasurable signal. This means that the estimation method must be blind. We makeno temporal assumption about u(t), i.e., its spectral content can be anything. The

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50 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

only assumption that we make on u(t) is that its amplitude distribution, fU (u), isknown.

3.3.2 Estimation Method

The basic idea is to find a parameter vector Θ that gives the same theoretical am-plitude distribution as the measured amplitude distribution, i.e., to find a mappingy → z = g(y, Θ) such that fZ(z, Θ) = fY (y).

The measured amplitude distribution, fY (y), is found by counting the number ofsamples at each reference level, rk, i.e., by making a histogram of y(t). This meansthat in an n-bit ADC, fY (y) can be calculated in 2n points, y = 0, . . . , 2n − 1.Since fY (y) should be interpreted as a distribution function it is normalized sothat

2n−1∑y=0

fY (y) = 1 (3.6)

fU (u) is a continuous function that is defined in the range 0 ≤ u(t) < 2n. fZ(z, Θ) iscalculated in 2n discrete, but in general non-uniformly distributed, points. fZ(rk, Θ)is the expected normalized number of samples in the range [rk, rk+1)

fZ(rk, Θ) =∫ rk+1

rk

fU (u)du, k = 0, . . . , 2n − 1 (3.7)

To find the correct error parameters we should find a loss function, V (Θ), thathas its global minimum at Θ = Θ∗ when the number of data tends to infinity.It is usually not possible to find the minimizing argument analytically. Insteada numerical minimization method should be applied. The most commonly usedminimization method is the steepest-descent method (sd) [9, 13].

Θ0 = 0Θk+1 = Θk − µ∇V (Θ) (3.8)

∇V (Θ) is the gradient of V (Θ) and it can be calculated either analytically or, if itis more convenient, as a finite difference approximation.

(∇V (Θ))i ≈V (Θ + εei)− V (Θ)

ε(3.9)

(∇V (Θ))i is here the ith component of the gradient and ei denotes a basis vector,which is zero except in the ith position where it is one. µ is the step length of thesteepest descent algorithm. Since Θ is updated in the negative gradient direction,the loss function is guaranteed to decrease if µ is small enough. If µ is chosen toosmall, the convergence will be very slow. If instead µ is chosen too large, the lossfunction may not converge. To avoid this trade-off, a variable µ can be choseninstead [13]. µ is initiated with a large enough value, µ0, then µ is decreased

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3.3 Equalization with known Input Distribution 51

until V (Θ) decreases. With this modification the stability of a small µ can becombined with the fast convergence of a large µ. Another problem is how to choseµ0. We do not know anything about the magnitude of ∇V (Θ), but we know thatno component of Θ should ever be changed more than 1 since that is the nominaldistance to the next reference level. If the gradient is normalized with its largestvalue and µ0 = 1 is used we know that the largest change in Θ is at most 1 [13].

Θ0 = 0

Θk+1 = Θk − µ∇V (Θk)

max∇V (Θk)(3.10)

The step size, µ, is in each iteration decreased until the loss function decreases,i.e., until V (Θk+1) < V (Θk). There are other minimization methods that convergein fewer iterations, e.g., Newtons method or the Gauss-Newton method. Thesemethods are not used in this application for two reasons:

• The estimation algorithm should be implemented in hardware. The Newtonmethod and the Gauss-Newton method involves a Hessian or a Hessian ap-proximation that should be inverted. Matrix inversions are very difficult toimplement in hardware.

• A lot of memory would be required to store the Hessian. In, for example, a14-bit ADC the Hessian is a 16384× 16384 matrix.

3.3.3 Criterion Functions

Four different loss functions are evaluated here: the mean squared error, the nor-malized mean squared error, the mean absolute error and the normalized meanabsolute error. The estimation algorithm is simulated in Section 3.5 with thesefour loss functions to find out which one that works best.

Mean squared error

The mean squared error is here denoted VMSE(Θ)

VMSE(Θ) =2n−1∑k=0

(fY (k)− fZ(rk,Θ))2 (3.11)

Some advantages of this loss function are:

• It is easy to differentiate.

• Larger weight is given to the parts of the distribution function that are large.These parts are used more often and are therefore more important to correct.Also the values in these parts are more reliable since more samples are takenin these parts.

Some disadvantages are:

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52 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

• Errors in the parts of the distribution function that has relatively low exci-tation will not give much contribution to the loss function even if the errorsare quite large.

Normalized mean squared error

The normalized mean squared error loss function is denoted VNMSE(Θ).

VNMSE(Θ) =2n−1∑k=0

(Qk − 1)2 (3.12)

Qk =

{1 if fY (k) = 0fY (k)

fZ(rk,Θ) otherwise(3.13)

If there are no samples at some level rk, the corresponding term in VNMSE shouldnot contribute to the error. Therefore Qk = 1 when fY (k) = 0. Otherwise theminimization would drive the intervals that are not excited to zero. One advantagewith this loss function compared to VMSE is that errors in the parts of the ADCthat do not have high excitation also contribute significantly to the loss function.A disadvantage with this is however that these parts of fY (k) are less reliable dueto poor excitation.

Mean absolute error

The mean absolute error loss function is denoted VMAE(Θ).

VMAE(Θ) =2n−1∑k=0

|fY (k)− fZ(rk,Θ)| (3.14)

The advantage of this loss function compared to VMSE and VNMSE is that evensmall errors give relatively large contribution to the loss function.

Normalized mean absolute error

The normalized mean absolute error loss function is denoted VNMAE .

VNMAE(Θ) =2n−1∑k=0

|Qk − 1| (3.15)

where

Qk =

{1 if fY (k) = 0fY (k)

fZ(rk,Θ) otherwise(3.16)

This normalization is done for the same reason as the normalization of VMSE(Θ).

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3.3 Equalization with known Input Distribution 53

Convergence

All these loss functions have the global minimum, V (Θ) = 0, at Θ = Θ∗ whenthe data length tends to infinity. The difference lies in the convergence rate ofthe numerical algorithm and if there are local minima in the loss functions. Theminimization algorithm is not guaranteed to converge to the global minimum ifthere are local minima. Figure 3.10 shows contour plots of the four different lossfunctions listed above with Gaussian input distribution. In these plots we have

−1 −0.5 0 0.5 1−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

θ1

θ 2

(a) VMSE(Θ)

−1 −0.5 0 0.5 1−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

θ1

θ 2

(b) VNMSE(Θ)

−1 −0.5 0 0.5 1−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

θ1

θ 2

(c) VMAE(Θ)

−1 −0.5 0 0.5 1−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

0.6

0.8

1

θ1

θ 2

(d) VNMAE(Θ)

Figure 3.10 Contour plots of different loss functions, generated with aGaussian input signal. The global minimum is in the origin and is markedwith *.

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54 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

an A/D converter with two unknown reference levels. With more reference levelsit would be hard to visualize the result. The global minimum in these plots is inthe origin. The loss functions are plotted for θ1, θ2 varying from −1 to 1. This isthe interesting range since values outside this range are impossible by the physicalimplementation. A θi < −1 would imply that rk < rk−1, which is impossible sincethat would require a negative resistance in the resistance ladder. In these plots thereare no local minima for any of the loss functions. Outside the range of these plotsthere are however local minima. The risk of getting stuck at a local minimum is,however, quite small if the search is initiated close enough to the global minimum.This does not say that there are no local minima closer to the global minimumif there are more reference levels than three or if the amplitude distribution isdifferent, but hopefully the structure is quite similar. The simulations in Section 3.5also show that the algorithm usually converges to the global minimum.

3.3.4 Amount of Data

Even if the numerical algorithm converges to the global minimum it is not neces-sarily the correct error vector, Θ = Θ∗, since we only have finite number of data.We will in this section investigate how much data that is required to get a goodenough estimate of the amplitude distribution.

Deviation from expected amplitude distribution

In an n-bit ADC, y(t) can take on 2n different values, y(t) ∈ [0, 1, . . . , 2n − 1].With known error parameters, Θ∗, and known input distribution, fU (u), we cancalculate the probability, pk(Θ∗), of each digital value, k.

pk(Θ∗) =∫ k+1+

∑k+1i=1 θ

∗i

k+∑ki=1 θ

∗i

fU (u)du, k = 0, . . . , 2n − 1 (3.17)

Assume that we collect N samples of y(t). The prior distribution is the same foreach sample we take. This means that we pick samples with replacement from thedistribution fY (k). Denote with Xk the number of samples that have the valuek. The stochastic vector, fX(X0, . . . ,X2n−1), obeys the multinomial distribution,that is a multivariable extension of the binomial distribution [8, 53].

fX(x) =N !

x0! · · ·x2n−1!px0

0 · · · px2n−12n−1 (3.18)

2n−1∑k=0

xk = N

Here we have omitted the argument Θ∗ in pk(Θ∗) for simplicity. With this dis-tribution function we can calculate the expected deviation of measured amplitudedistribution from the theoretical amplitude distribution. The marginal distribu-tions of the multinomial distribution are binomial distributions. To understand

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3.3 Equalization with known Input Distribution 55

this we can study the case where we are only interested in the number of samplesat level k. Then we have two possible outcomes of a sample, either it is at level kor not at level k, and pk is the probability that it is at level k. This is a binomialdistribution, Xk ∈ Bi(N, pk). The expected number of samples at each level canbe calculated from the binomial distribution

E(Xk) = Npk, k = 0, . . . , 2n − 1 (3.19)

Define the mean square relative deviation from the expected value as

D = 2−n2n−1∑k=0

(Xk −Npk)2

(Npk)2(3.20)

This is a stochastic variable, and the expected value of D is a measure of how goodthe approximation of the amplitude distribution is. To calculate E(D), we needthe variance of Xk [8].

V ar(Xk) = Npk(1− pk), k = 0, . . . , 2n − 1 (3.21)

From this variance we can calculate the expected mean square deviation

E(D) = E(2−n2n−1∑k=0

(Xk −Npk)2

(Npk)2) = 2−n

2n−1∑k=0

E[(Xk −Npk)2](Npk)2

= 2−n2n−1∑k=0

V ar(Xk)(Npk)2

= 2−n2n−1∑k=0

1− pkNpk

(3.22)

E(D) is a measure of how how close the measured histogram is to the true amplitudedistribution. What we are interested in is how close the minimizing error vector Θ0

is to the true error vector Θ∗ on average, i.e., we want to know E(2−n∑2n−1k=0 (θ0

k−θ∗k)2). E(D) is however a good measure of this error, that is E(2−n

∑2n−1k=0 (θ0

k −θ∗k)2) ≈ E(D) if the amplitude distribution is approximately locally constant. If theinput signal is uniformly distributed we have from (3.17) that pk = 2−n(1 + θ∗k+1).If θk is small this gives that

E(2−n2n−1∑k=0

(θ0k − θ∗k)2) = E(2−n

2n−1∑k=0

(2nXk/N − 2npk)2) = E(D) (3.23)

This is approximately true even if the amplitude distribution is not uniform as longas it does not change abruptly. Figure 3.11 shows a plot of

√E(D) for different

values of N and different number of bits in the ADC. In this plot we have assumedan input signal with Gaussian amplitude distribution with the mean, µ, in thecenter of the ADC and the standard deviation, σ, chosen such that ±5σ coincideswith the edges of the ADC. Here it seems like the error is quite large even withvery much data. This large mean error is caused by large errors near the edges of

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56 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

101

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106

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109

1010

10−5

10−4

10−3

10−2

10−1

100

101

102

103

104

Expected deviation from theoretical amplitude distribution

Number of samples

Exp

ecte

d de

viat

ion

n=2 n=4 n=8 n=14

Figure 3.11 Relative mean square error of the measured amplitude distri-bution, with Gaussian input distribution. n is here the number of bits inthe A/D converter.

the ADC where the excitation is low. If we look at the mean square error for thelevels in the middle of the ADC, which are the most important ones, the situationis much better, see Figure 3.12. If u(t) has a uniform or sinusoidal distribution, theerror is smaller since there are no levels with such low excitation, see Figures 3.13and 3.14 respectively. From these plots we can see that a lot of data are needed toachieve good precision, especially for A/D converters with many reference levels.The accuracy increases also quite slowly with the amount of data. To increase theaccuracy a factor of 10 we need about 100 times more data. This is quite constant,independent of the distribution. These A/D converters are, however, supposedto be used for very high sample rates (some MHz) so some million samples arecollected in a few seconds.

3.3.5 Parameter Update

The estimation algorithm should update the parameters continuously when theA/D converter is used, to adapt to changes in the parameters due to for instancetemperature changes. The most obvious way to update the parameters would beto collect a batch of data, make an estimation based on this data and replace theprevious estimate with the estimate from the latest batch of data.

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3.3 Equalization with known Input Distribution 57

101

102

103

104

105

106

107

108

109

1010

10−6

10−5

10−4

10−3

10−2

10−1

100

101

Expected deviation from theoretical amplitude distribution

Number of samples

Exp

ecte

d de

viat

ion

n=2 n=4 n=8 n=14

Figure 3.12 Relative mean square error of the measured amplitude distri-bution, with Gaussian input distribution. The mean value for the centermostlevels, corresponding to 1.25σ, are shown here. n is the number of bits inthe A/D converter.

As we saw in the previous section, a lot of data is required to get a good estimateof the amplitude distribution. Usually, we cannot collect enough data to get goodexcitation near the edges of the ADC. Therefore, there is a risk that Θ will adjustto the actual dataset instead of the correct amplitude distribution, i.e., there mightbe an overfit to data. To avoid this, Θ can be updated recursively with a forgettingfactor, λ [50, 116]. If we have an estimate Θk after estimation from k batches ofdata and we make an estimate Θ0

k+1 from batch number k + 1, the estimate afterk + 1 data sets is

Θk+1 = λΘk + (1− λ)Θ0k+1 (3.24)

0 < λ ≤ 1

This means that Θ will be a weighted mean of the estimates from several batchesof data. λ should usually be chosen close to, but not equal to, 1. This means thatolder estimates are slowly “forgotten” and the algorithm can adapt to changes inthe reference levels. With this recursion we also avoid the case where a batch ofdata deviating from the assumed amplitude distribution could destroy the estimate.

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58 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

101

102

103

104

105

106

107

108

109

1010

10−5

10−4

10−3

10−2

10−1

100

101

102

Expected deviation from theoretical amplitude distribution

Number of samples

Exp

ecte

d de

viat

ion

n=2 n=4 n=8 n=14

Figure 3.13 Relative mean square error of the measured amplitude distri-bution, with uniform input distribution. n is the number of bits in the A/Dconverter.

3.3.6 Initial Value Estimation

If the input signal is uniformly distributed, the probability of getting a sample withvalue k is:

P (y = k) =∫ rk+1

rk

2−ndu = 2−n(rk+1 − rk) = 2−n(1 + θk) (3.25)

This means that Θ in this case can be calculated analytically from the measuredamplitude distribution, fY (y).

θk ={fY (k)2n − 1 if fY (k) 6= 00 if fY (k) = 0 (3.26)

This only holds if the input signal is uniformly distributed, but with a smooth inputsignal distribution the amplitude distribution can be assumed to be approximatelyconstant locally. This means that we can calculated P (y = k) approximately

P (y = k) =∫ rk+1

rk

fU (u)du ≈ fU (k)(rk+1 − rk) = fU (k)(1 + θk) (3.27)

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3.3 Equalization with known Input Distribution 59

101

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1010

10−5

10−4

10−3

10−2

10−1

100

101

102

Expected deviation from theoretical amplitude distribution

Number of samples

Exp

ecte

d de

viat

ion

n=2 n=4 n=8 n=14

Figure 3.14 Relative mean square error of the measured amplitude distri-bution, with sinusoid input distribution. n is the number of bits in the A/Dconverter.

From this we can get a good initial guess

θk ={fY (k)/fU (k)− 1 if fY (k) 6= 00 if fY (k) = 0 (3.28)

and by that reduce the number of iterations.

3.3.7 Reference Level Estimation Algorithm

The reference level estimation method is summarized in Algorithm 3.1. Note thattwo different iteration indices are used in this algorithm:

• k denotes the iteration number of the minimization algorithm.

• l denotes the number of the batch of data.

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60 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

Algorithm 3.1 (Reference level estimation with known amplitude distri-bution)

Initialization

•Choose the number of data, N , for each amplitude distribution estimate.

•Choose a stopping criterion for the minimization algorithm.

•Choose the forgetting factor, λ, for the recursive update.

•The amplitude distribution, fU (u), of u(t) is assumed known.

•Calculate the initial theoretical amplitude distribution, fZ(z, 0).

•Calculate the initial loss function, V (0).

•Initialize the steepest descent update step, µ = 1.

Data collection and amplitude distribution estimate

•Collect N samples from the A/D converter.

•Calculate fYl(y) by counting the number of samples at each level.

•Normalize fYl(y), f0Yl

(y) = fYl (y)∑2n−1y=0 fYl (y)

= fY (y)N

•Initialize the error vector: θk ={fY (k)/fU (k)− 1 if fY (k) 6= 00 if fY (k) = 0

Update parameter estimate

1.Calculate the gradient, ∇V (Θk), either analytically or by finite differences.

2.Normalize the gradient, ∇0V (Θk) = ∇V (Θk)

max |∇V (Θk)|

3.Update the parameter estimate, Θk+1 = Θk − µ∇0V (Θk).

4.Calculate new loss function, V (Θk+1).

5.If V (Θk+1) > V (Θk) decrease step size, µ = µ/2, and repeat from step 3,otherwise continue.

6.Increase the iteration index, k, by one and repeat steps 1−6 until the stoppingcriterion is reached. In an on-chip implementation with real-time demands thenatural choice here is a fixed number of iterations.

7.Denote the final value of Θ by Θ0l

8.Update Θ with new estimate, Θl = λΘl−1 + (1− λ)Θ0l

New data are collected continuously while the A/D converter is used, and theestimation steps restart with a new batch of data every time a new estimate isfinished.

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3.4 Equalization with Unknown Input Distribution 61

3.4 Equalization with Unknown Input Distribu-tion

Usually we have no exact knowledge of the amplitude distribution of the inputsignal. If the amplitude distribution of the input signal is smooth, the estimationalgorithm can however be used. This section is based on [31].

3.4.1 Assumptions

Since the amplitude distribution of the input signal is unknown, we have to estimateit first from output data. For this estimation we have to assume that the amplitudedistribution of the input signal is smooth. Note:

• We make no temporal assumption on the input signal. That is, its spectralcontent can be anything.

• We only use a smoothness assumption on the signal’s amplitude distributionfU (u).

3.4.2 Estimation Overview

The parameter estimation is divided into two steps:

• The amplitude distribution of the measured signal, fY (y), is computed as anapproximation of the real amplitude distribution, fY (y), of y(t). From thesmoothness assumption of the amplitude distribution, we can approximatefU (u) by a smoothed version of fY (y), fY (y)→ fU (u).

• Next: find a mapping y → z = g(y,Θ) such that fZ(z,Θ) ≈ fY (y), wherefZ(z, 0) = fU (u).

3.4.3 Amplitude Distribution Estimation

The errors in the reference levels are assumed to be random. This means that wecan use the model

fY (k) = fU (k) + e(k) (3.29)

where e(k) is a random signal. With the assumption that fU (u) is smooth we canconclude that fU (u) is bandlimited to a low pass band. In Figure 3.15 the DFT of atrue Gaussian histogram and a histogram measured by an nonideal A/D converterare shown. Note that these are the DFTs of the amplitude distribution curvesand do not have anything to do with the spectral content of the signals, u(t) andy(t). We can see that the DFT of the ideal Gaussian histogram is confined to anarrow low pass band while the DFT of the measured histogram is spread over thewhole frequency range. This means that we can estimate fU (u) from the measuredamplitude distribution fY (y) by low pass filtering fY (y). A zero phase filter must

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62 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 0.2 0.4 0.6 0.8 110

−7

10−6

10−5

10−4

10−3

10−2

10−1

100

Normalized frequency

Figure 3.15 DFT of an ideal Gaussian histogram (dashed) and DFT of aGaussian histogram measured by a non ideal A/D converter (solid).

be used to avoid phase errors in the estimated amplitude distribution, i.e., thatthe estimated amplitude distribution is moved towards higher levels. This can beachieved by forward-backward filtering of an ordinary low pass filter, H(q) [50].

fU (k) = H(q)H(q−1)fY (k) (3.30)

The estimate fU (k) can only be calculated for 2n discrete levels and should be anestimate of the mean value of fU (u) between two reference levels, normalized withthe distance between the levels, rk+1 − rk.

fU (k) ≈∫ rk+1

rkfU (x)dx

rk+1 − rk(3.31)

Since some of the useful parts of fY (y) are also attenuated by the low pass filter,fU (u) will not converge exactly to the true amplitude distribution even with infiniteamount of data. How large this bias is depends on the properties of the amplitudedistribution. The bias will be smaller the more confined the amplitude distributionis to a low pass band. The cut-off frequency, fc, of the low pass filter is a tuningparameter and it must be chosen for each application. This gives the estimate

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3.4 Equalization with Unknown Input Distribution 63

of fZ(rk, 0) = fU (k). fZ(rk,Θ) can be approximately calculated by interpolationbetween adjacent values of fU (k).

fZ(rk,Θ) ≈ fU (k) +fU (k + 1) + fU (k)

2

k∑i=1

θi

− fU (k) + fU (k − 1)2

k−1∑i=1

θi (3.32)

3.4.4 Parameter Estimation

The parameters are estimated by minimization of a function that has its globalminimum at the true parameter value Θ∗. The minimization is in principle thesame as for the case with known histogram, but a few remarks should be made:

• The estimated amplitude distribution, fU (u), has rather low accuracy wherethe excitation is low, that does not improve much with more data. There-fore we do not want the errors in these parts to contribute too much to theloss function. This means that the normalized loss functions, VNMSE(Θ)and VNMAE(Θ), are probably not very useful, since all levels give the samecontribution to the loss function here.

• We cannot guarantee that the loss function has its global minimum at thetrue parameter vector, since the amplitude estimate is biased.

The derivatives of fZ(rk,Θ) can in this case be calculated analytically for a generalsignal distribution, since parameter dependence in fZ(rk,Θ) is explicit.

∂fZ(rk,Θ)∂θm

=

fU (k+1)−fU (k−1)

2 if m < kfU (k+1)+fU (k)

2 if m = k0 if m > k

(3.33)

If the mean square error loss function is used, its gradient is linear in the parameters.

(∇VMSE(Θ))m = −22n∑k=1

(fY (k)− fZ(rk,Θ))∂fZ(rk,Θ)

∂θm(3.34)

This means that the parameter estimate could be calculated analytically. Forimplementation reasons this is, however, not a good way to solve the problem.

• An exact solution requires a matrix inversion, which is difficult to implementin hardware.

• Even if a signal processor is available, storing the matrix would require toomuch memory. Already a 10-bit ADC would give a 1024× 1024 matrix.

Because of this the steepest descent method is used for minimization as for thecase with known amplitude distribution.

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64 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

3.4.5 Estimation Algorithm

The reference level estimation method for signals with unknown amplitude distri-bution is summarized in Algorithm 3.2. Note that two different iteration indicesare used in this algorithm:

• k denotes the iteration number of the minimization algorithm.

• l denotes the number of the batch of data.

Algorithm 3.2 (Reference level estimation with unknown input signalamplitude distribution)

Initialization

•Choose the number of data, N , for each amplitude distribution estimate.

•Choose a stopping criterion for the minimization algorithm.

•Choose the forgetting factor, λ, for the recursive update.

•Initialize the steepest descent update step, µ = 1.

•Choose the cut-off frequency, fc, for the low pass filter.

•Choose the type of low pass filter and the filter order.

Data collection and amplitude distribution estimate

•Collect N samples from the A/D converter.

•Calculate fYl(k) by counting the number of samples at each level.

•Normalize fYl(k), f0Yl

(k) = fYl (k)∑2n−1y=0 fYl (k)

= fY (k)N

•Estimate the amplitude distribution of the input signal by low pass filteringfYl(k):fUl(k) = H(q)H(q−1)fYl(k)fZl(rk, 0) = fUl(k)

•Calculate the initial loss function:VMSE(0) =

∑2n−1k=0 (fYl(k)− fZ(rk, 0))2

•Initialize error vector, θk = fY /fU (k)− 1, k = 0, . . . , 2n − 1.

Update parameter estimate

1.Calculate the gradient, ∇VMSE(Θk):(∇VMSE(Θ))m = −2

∑2n

k=1(fY (k)− fZ(rk,Θ)) δfZ(rk,Θ)δθm

δfZ(rk,Θ)δθm

=

fU (k+1)−fU (k−1)

2 if m < kfU (k+1)+fU (k)

2 if m = k0 if m > k

2.Normalize the gradient, ∇0VMSE(Θk) = ∇VMSE(Θk)

max |∇VMSE(Θk)|

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3.5 Simulations 65

3.Update the parameter estimate, Θk+1 = Θk − µ∇0VMSE(Θk).4.Calculate new loss function, VMSE(Θk+1).5.If VMSE(Θk+1) > VMSE(Θk) decrease step size, µ = µ/2, and repeat from

step 3, otherwise continue.

6.Increase the iteration index, k, by one and repeat steps 1− 6 until a stoppingcriterion reached. When we have real time demands, the most natural choicehere is a fixed number of iterations.

7.Denote the final value of Θ by Θ0l

8.Update Θ with new estimate, Θl = λΘl−1 + (1− λ)Θ0l

New data are collected continuously while the A/D converter is used, and theestimation steps restarts with a new batch of data every time the previous estimateis finished.

3.5 Simulations

In this section an A/D converter is simulated to show the performance of thecorrection algorithm. Only the static reference level errors are considered in thesimulations. Other errors may influence the performance in a real A/D converter.Measurements from a real A/D converter are studied in Section 3.6.

3.5.1 Known Amplitude Distribution

The algorithm for estimation with known input amplitude distribution is here eval-uated on simulated data. Here the A/D converter is simulated with three differentinput signals:

• Gaussian input u(t) ∈ N(µ, σ). The mean value, µ, is chosen to the meanvalue full range of the A/D converter. The standard deviation, σ, is chosensuch that ±5σ coincides with the full range of the ADC.

• Sinusoidal input u(t) = A sin(ωt) + C. The offset, C, is chosen to the meanvalue of the A/D converter range. The amplitude, A, is chosen such that thesinusoid fits into the A/D converter full range.

• Uniform input u(t) ∈ U(0, 2n). The input is uniformly distributed over thefull range of the A/D converter.

Two cases will be studied:

• ADC without subranging where the parameter errors are randomly generatedfrom a uniform distribution, θi ∈ U(−0.1, 0.1), i.e., the errors are at most 10%of the nominal interval.

• Subranging ADC: A three-stage subranging ADC with 4, 4, 5 bits in the re-spective stages is simulated. Mismatch errors are introduced in both stages.

Some simulations concerning convergence and choice of criterion function are shownonly for the Gaussian case, the results are quite similar for the other signal types.

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66 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

Amount of data and convergence

Here a Gaussian input signal is used in all the simulations.The A/D converter is first simulated without errors for different amount of

data and different number of levels in the A/D converter. From these simulationsthe amplitude distribution, fY (y), is calculated and compared to the theoreticaldistribution fY (y). The root mean square error,

√D =

√√√√2−n2n−1∑y=0

(fY (y)− fY (y)

fY (y))2 (3.35)

is shown in Figure 3.16. The dashed line shows the mean square error in the 2n/8most centered levels, which is the most important part of the amplitude distributionfunction since the excitation is very low near the edges in this case. This plot should

101

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108

10−4

10−3

10−2

10−1

100

101

Number of data

Mea

n er

ror

Figure 3.16 Relative mean squared error of the measured amplitude dis-tribution. Solid line shows the error for the whole ADC, dashed line showsthe error for the levels in the center of the resistance ladder.

be compared to the theoretical expected mean square errors in Section 3.3.4. Wecan see that the plot in Figure 3.16 shows rather good resemblance with Figure 3.11and Figure 3.12. 10 Monte-Carlo simulations of an 8-bit ADC have been done togenerate these plots.

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3.5 Simulations 67

In Figure 3.17 the RMSE of the parameter estimate is shown for differentamount of data. The four different loss functions are compared for a fixed numberof iterations (1000). This is relevant for the implementation aspect since there is alimited amount of time available for the calculations if the algorithm should work inreal-time. An 8-bit ADC without subranging has been used in these simulations.Figure 3.17(a) shows the RMSE for all levels in the ADC while Figure 3.17(b)shows the RMSE for the 2n/8 centermost levels. These plots show, as expected,that a lot of data is needed to get a good result with the normalized criterion func-tions, VNMSE and VNMAE . The other two criterion functions, VMSE and VMAE ,show quite similar performance. With the mean square error criterion function it iseasier to calculate the gradient analytically. Since the performance is quite similarwe hereinafter use VMSE for minimization.

Figure 3.18 shows the convergence of the minimization algorithm. An 8-bitADC without subranging has been simulated. In this plot we can see that thecriterion function decreases with approximately a factor of 10 when the number ofiterations is increased 100 times.

Performance with Gaussian input signal

The histogram is here calculated from 108 samples from a Gaussian distribution.The estimate has been calculated by initialization and 100 iterations. The er-rors has been randomly generated in the interval [−0.1, 0.1]. Figure 3.19(a) showsthe theoretical Gaussian distribution. In Figure 3.19(b) the measured amplitudedistribution is shown and in Figure 3.19(c) the measured amplitude distributioncompensated with the estimated parameters is shown. We can see from these plotsthat the compensation works well, at least in the parts of the ADC where theexcitation is high. In Figure 3.20(a) the original errors, Θ0, are shown and Fig-ure 3.20(b) shows the estimation errors, Θ0−Θ. These plots show that there is stilltoo little data to get a good estimate near the edges of the ADC. In the middle ofthe ADC the improvement is however very good. The levels in the middle are alsothe most important ones to correct, since most of the samples are in that range.To avoid that the improvement in signal quality is destroyed by bad estimates inthe parts where the excitation is low, the parameters can be fixed to zero wherethe excitation is lower than some limit.

Two important measures of the signal quality in communication systems arethe Signal to Noise and Distortion Ratio (SNDR) and the Spurious Free DynamicRange (SFDR), see Chapter 2 for definitions. Sinusoidal signals with different am-plitudes have been generated and converted in a simulated A/D converter with theerror Θ∗. The SNDR and SFDR have been calculated before and after correctionboth with the true errors, Θ∗, and with the estimated errors, Θ. Correction withthe true errors gives the theoretical lower bound of how much the signal qualitycan be improved. Figure 3.21(a) shows the SNDR before and after correction withΘ∗ and Θ respectively. In Figure 3.21(b) the SFDR is shown. The peak improve-ment is about 4dB for SNDR and 18dB for SFDR. Near the edges of the ADC, thenumber of samples in each interval is quite low, between 1 and 10. This is hard

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68 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

101

102

103

104

105

106

107

10−2

10−1

100

101

Number of data

Mea

n er

ror

of e

stim

ate

(a) The whole range of levels

101

102

103

104

105

106

107

10−3

10−2

10−1

100

101

Number of data

Mea

n er

ror

of e

stim

ate

(b) The centermost levels

Figure 3.17 RMSE of parameter estimate for different criterion functions.VMSE (solid), VNMSE (dashed), VMAE (*), VNMAE (o).

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3.5 Simulations 69

100

101

102

103

104

10−11

10−10

10−9

10−8

10−7

10−6

10−5

10−4

Iteration number

Crit

erio

n fu

nctio

n

Figure 3.18 Convergence as a function of the number of iterations. Dashedline shows the criterion function with initialization Θ = 0. Solid line showsthe criterion function with initialization Θ = fY /fU − 1.

to see from the histogram in Figure 3.19(b), but can be seen if it is zoomed in.The deterioration in performance near the edges of the ADC is caused by the lowexcitation from the estimation data.

Performance with sinusoidal input

For a sinusoidal signal the amplitude distribution looks like a bathtub. Figure 3.22shows the theoretical, measured and compensated histogram. Because of the bath-tub shape with high peaks near the edges the histogram is very sensitive to am-plitude changes in the input signal. Therefore the accuracy near the edges mightnot be very good with real (not simulated) signals. In the middle of the ADC thehistogram is, however, quite constant, so these parameters should be possible tocalculate quite accurately. Figure 3.23 shows the errors before and after correctionwith sinusoidal input. The improvement after estimation is here very good, evennear the edges. This is also seen in the plots of SNDR and SFDR before and aftercorrection, Figure 3.24. The improvement is here close to the theoretical limit forboth SNDR and SFDR for the whole range of the ADC. The peak improvement is4dB for SNDR and 18dB for SFDR.

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70 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 50 100 150 200 250 3000

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0.004

0.006

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plitu

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(a) Theoretical Gaussian distribution.

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(c) Compensated measured amplitudedistribution.

0 50 100 150 200 250 3000

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plitu

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ty

(d) Theoretical (solid), measured (dash-

dotted) and compensated (dotted) am-plitude distribution.

Figure 3.19 Amplitude distribution functions, Gaussian input signal.

Performance with uniformly distributed input

A uniformly distributed input is in a way the perfect signal for estimation for tworeasons:

• The excitation is constant and high at all levels of the ADC.

• The estimate is easily calculated analytically with very few operations.

The good performance can be seen in the parameter error plots before and aftercorrection, Figure 3.25. Since this is an analytical solution the remaining errors are

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3.5 Simulations 71

0 50 100 150 200 250 300−0.1

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(a) Error before estimation, Θ∗.

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(b) Error after estimation, Θ−Θ∗.

Figure 3.20 Error vector before and after estimation with Gaussian input.

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72 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

−14 −12 −10 −8 −6 −4 −2 025

30

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50

55

Signal power [dBFS]

SN

DR

[dB

]

(a) SNDR

−14 −12 −10 −8 −6 −4 −2 035

40

45

50

55

60

65

70

Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.21 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with Gaussian input signal.

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3.5 Simulations 73

0 50 100 150 200 250 3000

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(a) Theoretical Sinusoidal distribution.

0 50 100 150 200 250 3000

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(b) Measured amplitude distribution.

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Level number

Am

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(c) Compensated measured amplitudedistribution.

0 50 100 150 200 250 3000

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Level number

Am

plitu

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ensi

ty

(d) Theoretical (solid), measured (dash-

dotted) and compensated (dotted) am-plitude distribution.

Figure 3.22 Amplitude distribution functions, sinusoidal input signal.

only caused by low excitation which we can see still exist despite the large amountof data. The amount of data is however good enough to get an indistinguishabledifference in signal quality from correction with the true errors, Figure 3.26. Thepeak improvement is here 5dB for SNDR and 19dB for SFDR.

3.5.2 Unknown Amplitude Distribution

The algorithm for estimation with unknown input amplitude distribution is hereevaluated on simulated data. The error parameters and the signal types are thesame as for the case with known input amplitude distribution in Section 3.5.1 to

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74 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 50 100 150 200 250 300−0.1

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0

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Err

or m

agni

tude

(a) Error before estimation, Θ∗.

0 50 100 150 200 250 300−0.1

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−0.06

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0

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Err

or m

agni

tude

(b) Error after estimation, Θ−Θ∗.

Figure 3.23 Error vector before and after estimation with sinusoidal input.

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3.5 Simulations 75

−14 −12 −10 −8 −6 −4 −2 025

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55

Signal power [dBFS]

SN

DR

[dB

]

(a) SNDR

−14 −12 −10 −8 −6 −4 −2 035

40

45

50

55

60

65

70

Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.24 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with sinusoidal input signal.

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76 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 50 100 150 200 250 300−0.1

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agni

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(a) Error before estimation, Θ∗.

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0

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Err

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tude

(b) Error after estimation, Θ−Θ∗.

Figure 3.25 Error vector before and after estimation with uniformly dis-tributed input.

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3.5 Simulations 77

−14 −12 −10 −8 −6 −4 −2 025

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SN

DR

[dB

]

(a) SNDR

−14 −12 −10 −8 −6 −4 −2 035

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50

55

60

65

70

Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.26 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with a uniformly distributed input signal.

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78 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

make the results from the two methods comparable.

Performance with Gaussian input distribution

Figure 3.27(a) shows the errors before compensation and Figure 3.27(b) shows theerrors after compensation with estimated parameters. The correction has beendone with data from a Gaussian distribution. These figures show that most of theerrors that change quickly between adjacent levels are eliminated, some of the slowvarying errors are however still left. This is caused by errors in the estimation of theamplitude distribution, slow variations in the errors can not be distinguished fromvariations in the true amplitude distribution since only smoothness is assumed.The errors near the edges of the ADC are not eliminated because of the poorexcitation in this region. Figure 3.28 shows the signal quality before and aftercorrection with estimated error parameters. Correction with the true errors arealso plotted for comparison. The signal quality is measured as SNDR and SFDR.The peak improvement is 3dB for SNDR and 8dB for SFDR. The improvement isnot as good as for the case with known input distribution since the estimation ofthe amplitude distribution is not perfect.

Sinusoidal distribution

The results for sinusoidal input signals are quite similar to the Gaussian case, theestimation most accurate in the middle of the ADC. The reason for the bad per-formance near the edges is however quite different in this case. Here the excitationis very high near the edges, but the amplitude distribution has an abrupt changenear the edges. Therefore the estimation of the amplitude distribution near theedges is not good enough. The errors before and after estimation are shown in Fig-ure 3.29. The signal quality is comparable to the Gaussian case, see Figure 3.30.The SFDR is even better with estimation from sinusoidal input than with Gaussianinput. This is however done with a full range sinusoid and the performance woulddecrease with a lower amplitude. The peak improvement is here 3dB for SNDRand 10dB for SFDR.

Uniform distribution

The uniformly distributed input is again the perfect signal for estimation, althoughit is more of an academical example used for comparison since real signals arenever uniformly distributed. Since the distribution is not known in the algorithmthe initialization does not give exactly the correct result here but the algorithmconverges in one or two iterations. The result is shown in Figure 3.31. Here wecan see that the estimation is quite good even close to the edges since we do nothave any of the problems with the edges which we had in the Gaussian and thesinusoidal case. The signal quality improvement is also much better in this case,see Figure 3.32. The peak improvement is here 4dB for SNDR and 15dB forSFDR. The performance is here almost as good as for the case with known inputdistribution.

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3.5 Simulations 79

0 50 100 150 200 250 300−0.1

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(a) Error before estimation, Θ∗.

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Err

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(b) Error after estimation, Θ−Θ∗.

Figure 3.27 Error vector before and after estimation with Gaussian dis-tributed input.

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80 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

−14 −12 −10 −8 −6 −4 −2 025

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Signal power [dBFS]

SN

DR

[dB

]

(a) SNDR

−14 −12 −10 −8 −6 −4 −2 035

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60

65

70

Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.28 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with a Gaussian input signal.

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3.5 Simulations 81

0 50 100 150 200 250 300−0.1

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(a) Error before estimation, Θ∗.

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agni

tude

(b) Error after estimation, Θ−Θ∗.

Figure 3.29 Error vector before and after estimation with a sinusoidalinput.

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82 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

−14 −12 −10 −8 −6 −4 −2 025

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SN

DR

[dB

]

(a) SNDR

−14 −12 −10 −8 −6 −4 −2 035

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70

Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.30 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with sinusoidal input signal.

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3.5 Simulations 83

0 50 100 150 200 250 300−0.1

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(a) Error before estimation, Θ∗.

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(b) Error after estimation, Θ−Θ∗.

Figure 3.31 Error vector before and after estimation with uniformly dis-tributed input.

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84 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

−14 −12 −10 −8 −6 −4 −2 025

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SN

DR

[dB

]

(a) SNDR

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Signal power [dBFS]

SF

DR

[dB

]

(b) SFDR

Figure 3.32 Solid line shows the signal quality before correction, dashedline after correction with Θ and dotted line after correction with Θ∗. Theestimation is here done with uniformly distributed input signal.

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3.6 Measurements 85

3.5.3 Subranging ADC

Here a subranging ADC with mismatch is simulated. The ADC has three sub-ranging stages with 4, 4, 5 bits respectively in the three stages. The A/D converteris simulated with only mismatch errors, i.e., each subranging stage is linear. TheADC has been simulated with a mismatch of about 1% between the first and sec-ond stage and 3% between the second and third stage. Figure 3.33(a) shows thesimulated histogram. 150 million samples have been collected to generate this his-togram. Figure 3.33(b) shows the estimated amplitude distribution of the inputsignal. We can see that the largest dips in the measured histogram are not entirelyeliminated. The improvement after estimation and compensation is evaluated witha sinusoidal input signal. The SNDR before and after compensation is shown inFigure 3.34(a). In Figure 3.34(b) the SFDR before and after correction is shown.We have here a great improvement over a wide range of input power (70dB). Thepeak improvement is 13dB for SFDR and 11dB for SNDR.

3.6 Measurements

The algorithm for blind equalization with unknown input signal distribution is hereevaluated on a real A/D converter.

3.6.1 ADC Description

The A/D converter that was used is a three stage subranging SA-ADC, [118, 27],see Figure 3.35. The three subranging stages have 4, 4, 5 bits precision respectively.If all these levels were used the digital output would be formed as

y = (a · 16 + b) · 32 + c (3.36)

where a ∈ {0, . . . , 15}, b ∈ {0, . . . , 15}, c ∈ {0, . . . , 31} are the output from stageone, two and three, respectively. Now, all levels are not used due to the redundancy.The digital output, y, is here formed as

y = (a · 12 + b) · 24 + c (3.37)

With this configuration, the output will have the possible values: y ∈ {0, . . . , 4711}.

3.6.2 Algorithm Modification

The number of levels in the A/D converter (4712) is very large. Because of thisthe error estimate takes very long time to calculate. It also takes very long timeto generate and measure data to get enough excitation for all the errors in theADC. The excitation is, however, enough for the mismatch errors which are muchlarger. A modification of the algorithm that only estimates large errors is there-fore suggested here. This modification also reduces the amount of computationssignificantly.

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86 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 1000 2000 3000 4000 50000

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e de

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(a) Output histogram.

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(b) Estimated amplitude distribution of input.

Figure 3.33 Histograms from simulated subranging ADC.

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3.6 Measurements 87

−80 −70 −60 −50 −40 −30 −20 −10 00

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Figure 3.34 Solid line shows the signal quality before correction anddashed line after correction with Θ. The estimation is here done with Gaus-sian input signal.

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88 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

+_

V1 ⋅ a

C1 C2 C3va

Sampling Comparator

Binarysearch

Switch

Test chip MATLAB

algorithm

Calculateparameters

,HE Θ

AccumulatehistogramHM

Equation (2)

D

CalculateAddress

A CLook-uptableLUT(A)

Generatecorrecteddata

a=0

a=15

Stage 1

V2 ⋅ bb=0

b=15

Stage 2

V3 ⋅ cc=0

c=31

Stage 3control

Figure 3.35 Structure of test setup.

Selection of large errors

The parameters corresponding to large errors can be found by comparing the mea-sured amplitude distribution, fY (k), with the estimated input amplitude distribu-tion, fZ(k, 0). The levels where the relative difference is larger than a threshold,h, is denoted

L = {k :|fY (k)− fZ(k, 0)|

fZ(k, 0)> h} (3.38)

The parameters corresponding to large errors, {θk : k ∈ L}, are free parameterssubject to minimization. The rest of the parameters in Θ are fixed to the relativemean deviation between the measured and the estimated amplitude distribution.

θk 6∈l =∑i6∈L

fY (i)− fZ(i)fY (i)

(3.39)

This is done to keep the sum of the parameters close to zero to avoid that theamplitude of the signal is changed.

Extrapolation

Since usually only the mismatch errors are handled in this algorithm, the errorscan be assumed to approximately have a repetitive structure. This can be used toestimate the errors by extrapolation near the edges where the excitation is too loweven to estimate the mismatch errors.

3.6.3 Data Acquisition

A sequence of Discrete Multi Tone (DMT) symbols, see Chapter 2.4, was usedas input signal to the ADC when calculating the histogram. In Figure 3.36, anexample with 5·106 samples is shown. The input signal was generated in MATLABand D/A converted before measuring it in the ADC. The D/A converter has much

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3.6 Measurements 89

2000 2200 2400 2600 2800 30000

2000

4000

6000

8000

10000

12000

code number

code

den

sity

Histogram of output signal

Figure 3.36 Measured histogram

higher accuracy than the A/D converter. This means that the analog input signalcan be assumed to be correct.

3.6.4 Evaluation

In Figure 3.37 the correction parameters are shown. The large correction values(close to −1) occur with an interval of 24 levels and come from mismatch betweenthe two last stages. The peaks occur with an interval of 288 = 24 ∗ 12 and comefrom the mismatch between the two first subranging stages. Here the true errorsare unknown. Therefore the performance is measured by signal quality before andafter correction only. The correction algorithm has been evaluated with sinusoidalsignals. The signal power has been varied and the Signal to Noise and DistortionRatio (SNDR) and Spurious Free Dynamic Range (SFDR) have been measuredbefore and after correction, see Figure 3.38. The subranging stages are clearlyseen as two dips in the signal quality before correction. These dips are almosteliminated after correction. The deterioration in signal quality improvement athigh signal powers is caused by the extrapolation that does not give perfect result,since the errors are not exactly periodical. The peak improvement is about 8dBfor SNDR and 14dB for SFDR.

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90 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

0 1000 2000 3000 4000 5000−1

−0.8

−0.6

−0.4

−0.2

0

0.2

0.4

Figure 3.37 Estimated error parameters.

3.6.5 Implementation Aspects

The algorithms was tested as post processing in MATLAB of measured data. Thecost of implementing them in hardware is of great importance for the usefulnessand is therefore investigated. Table 3.1 shows the number of operations and anestimate of required area and power, which is needed to do an implementation ina 0.25 µm CMOS process. Only the collection of the histograms and the look-up table access are done at the sampling frequency. The correction algorithmsare calculated batch wise and thus several millions of clock periods are available.This part can be implemented as a very small processor, which also can handlethe control. The processor needs only 0.5mm2 of the chip area and can easily beintegrated on the chip. The memory might however be too large to be suitable forintegration on the chip.

3.7 Conclusion

The simulations show that the estimation method works well. The performance issummarized in Table 3.2. This table shows that if the amplitude distribution ofthe input signal is known, the improvement is as good as with known error param-eters, Θ∗, independent of what distribution we have. With unknown amplitudedistribution the SNDR improvement is almost as good as with known amplitudedistribution while the SFDR improvement is slightly decreased. The two last rows,

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3.7 Conclusion 91

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Signal Power [dBFullScale]

SN

DR

(+),

SF

DR

(o)

[dB

]

Signal quality

compensated not compensated

Figure 3.38 Signal quality before and after correction. Solid line indicatescorrected and dashed line indicates not corrected. The theoretical limit forSNDR (quantization) is drawn as a solid line. + indicates the SNDR and oindicates the SFDR.

with subranging A/D converters, cannot be compared to the other simulationssince it is not the same A/D converter structure. But we can see that we have agood improvement, both in simulations and in measurements.

Since the estimation with known amplitude distribution gives such good results,some knowledge about the amplitude distribution could be utilized to improve theestimate, even if the amplitude distribution is not exactly known. If we know, forexample, that the input is a DMT signal, the amplitude distribution is close toGaussian according to the central limit theorem. A Gaussian distribution, param-eterized in mean and standard deviation, can then be adjusted to the measuredhistogram. This has not been evaluated yet but there is a potential improvement inusing more prior knowledge about the input signal. In the applications where theA/D converters are used, for example xDSL modems, the signal shapes are alwaysthe same and therefore we usually have some prior knowledge about the signal.

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92 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

Operation Implementation cost UnitsHistogram 64K bits of RAM

1 mm2

0.3 mW/(MSamples/s)Additions 1MMultiplications 1MDivisions 1kHW including 20k Gatescontrol 0.5 mm2

0.1 mW/(MSamples/s)Memory for 1M bits of RAMcalculations 15.6 mm2

0.3 mW/(MSamples/s)Look-up table 182K bits of RAM

2.9 mm2

0.3 mW/(MSamples/s)Total area 20 mm2

Total power 1 mW/(MSamples/s)

Table 3.1 Implementation cost for integration of the estimation algortihmon chip.

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3.7 Conclusion 93

Estimation Estimation SNDR SFDRmethod signal peak peak

type improvement improvementKnown Gaussian 4dB 18dBinput Sinusoidal 4dB 18dBdistribution Uniform 5dB 19dBUnknown Gaussian 3dB 8dBinput Sinusoidal 3dB 10dBdistribution Uniform 4dB 15dBCorrection withtrue Θ 5dB 19dBUnknowninput,subrangingADC Gaussian 11dB 13dBUnknowninput,measurements DMT 8dB 14dB

Table 3.2 Signal quality improvement for different estimation methods anddifferent A/D converter structures.

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94 Chapter 3 Mismatch Compensation of Static Nonlinearities in SA-ADC

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4

Time Interleaved A/DConverters

This chapter is an introduction to Part II of this thesis, where estimation andcompensation methods for mismatch errors in time interleaved ADCs are discussed.Table 4.1 shows which issues about time interleaved ADCs that are discussed inthis chapter and in the four articles in Part II.

With traditional A/D converter technologies, for instance pipelined ADCs, thestate of the art sampling speed is about 100− 200 MHz for 12− 14 bits resolution.The sampling speed in these kinds of ADCs is continuously increasing, but toachieve significantly higher sampling rates other technologies must be used. Sampleand hold circuits with much higher bandwidth are possible to construct with highaccuracy [70]. This means that the sampling can be made much faster, but thequantization takes too long time. One way to achieve a much higher sampling ratein an ADC system is to combine several ADCs interleaved in time, each with alower sampling rate [7, 73]. The principle of a time interleaved ADC system isshown in Figure 4.1. In a time interleaved ADC system, the conversion is dividedbetween M ADCs, which should be identical. The input signal, u, is connected toall the ADCs and the M different ADCs sequentially samples the input signal. Thismeans that each ADC has the time MTs to complete a conversion, while the overallsampling interval is Ts. The output signals from the ADCs are then multiplexedtogether to form one signal, which has a sampling interval of Ts. To achieve thesequential sampling, the clock signal is delayed with iTs to the ith ADC. However,the sample-and-hold circuit must still be fast enough to track the high frequency

95

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96 Chapter 4 Time Interleaved A/D Converters

Chapter Paper4 A B C D

Error analysis XAlgorithm analysis XEstimation alg. X X X

Fixed Derivation Xinterleaving Results X X

Offset errors X XGain errors X XTime errors X X X XAnalysis XEstimation alg. X

Random Derivation Xinterleaving Results X

Offset errors XGain errors XTime errors X

Table 4.1 Overview of time interleaved ADC issues discussed in this thesis.

input signal. This is one limit to the number of ADCs that can be used in the timeinterleaved ADC system.

The drawback with the interleaved structure is that, due to the manufacturingprocess, all the ADCs are not identical. This means that mismatch errors areintroduced into the system. Three kinds of mismatch errors are introduced:

• Time errors (static jitter)The delay times of the clock between the different ADCs are not equal. Thismeans that the signal will be periodically but non-uniformly sampled.

• Amplitude offset errorsThe ground level differs between the different ADCs. This means that thereis a constant amplitude offset in each ADC.

• Gain errorsThe gain, from analog input to digital output, differs between the differentADCs.

The mismatch errors cause distortion in the output signal. An example of anoutput spectrum from an interleaved ADC system with four ADCs with sinusoidalinput signal is shown in Figure 4.2. How the time errors affect the output spectrumis analyzed in for instance [72]. The effect of all mismatch errors is analyzed forsinusoidal input signals in [80]. In [79] channel linearity mismatch effects are alsostudied for time interleaved ADCs. We will in this chapter analyze how the time,

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4.1 Notation and Assumptions 97

delay, Ts

ADC0

ADC1

ADC2

ADCM−1

u

samplingclock

y0

y1

y2

yM−1

y

MUX

Figure 4.1 A time interleaved ADC system. M parallel ADCs are usedwith the same master clock. The clock is delayed by the nominal samplinginterval between adjacent ADCs. The outputs are then multiplexed togetherto form a signal sampled M times faster than the output from each ADC.

gain and offset mismatch errors affect the output signal spectrum for a generalquasi-stationary input signal, to explain the spurious peaks in Figure 4.2. PaperA-D all suggest methods to attenuate these peaks.

4.1 Notation and Assumptions

We will in this section introduce the notation that will be used in this chapter. Thenominal sampling interval, that we would have without time errors, is denoted Ts.The sampling frequency is denoted fs = 1/Ts and the angular sampling frequency,ωs = 2πfs. M denotes the number of ADCs in the time interleaved array, whichmeans that the sampling interval for each ADC is MTs. The time, offset, and gainerrors are denoted ∆0

ti ,∆0oi and ∆0

gi , i = 0, . . . ,M − 1 respectively. The vectornotation ∆0

t = [∆0t0 · · ·∆0

tM−1] is used to denote all the time errors. The offset

and gain errors are denoted similarly. We assume in this chapter that there are noerrors in the ADCs except the three types of mismatch errors.

We use the following notation for the signals involved:

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98 Chapter 4 Time Interleaved A/D Converters

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

Normalized angular frequency

Sig

nal p

ower

[dB

]

ADC output spectrum

signal componentoffset error distortiontime and gain error distortion

Figure 4.2 Output spectrum from interleaved ADC system with fourADCs. The input signal is a single sinusoid. The distortion tones are causedby time, offset and gain mismatch errors.

• u(t) is the analog input signal.

• u[k] denotes an artificial signal, sampled without mismatch errors.

• ui[k], i = 0, . . . ,M − 1 denotes the M subsequences of u[k].

• yi[k] i = 0, . . . ,M −1 are the output subsequences from the M A/D convert-ers, sampled with mismatch errors.

yi[k] =(1 + ∆0

gi

)u((kM + i)Ts + ∆0

ti

)+ ∆0

oi

• y[m] is the multiplexed output signal from all the ADCs,

y[m] = y(mmodM)

[⌊m

M

⌋],

where b·c denotes integer part.

We will in this chapter assume that the input signal is quasi-stationary andmodulo M quasi-stationary with respect to different functions. These concepts arenot defined here but can be found in, e.g., Paper A in Part II of this thesis.

We assume throughout this chapter that u(t) is band limited to the Nyquistfrequency of the complete ADC system. We have seen in Figure 4.2 that the

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4.2 Offset Error Distortion 99

mismatch errors cause distortion peaks in a sinusoidal spectrum. In the followingthree sections we will discuss each type of mismatch error separately and calculatehow the spectrum is affected by the mismatch distortion. In the last section wewill calculate the spectrum with all mismatch errors present.

4.2 Offset Error Distortion

Here we assume that the gain and time errors are zero, and study only the offseterrors. This means that the output from the ADCs are

yi[k] = u((kM + i)Ts

)+ ∆0

oi

i = 0, . . . ,M − 1.

Combining the subsequences we have

y[k] = u(kTs) + ∆0okmodM

.

To calculate the spectrum of y[k] we need the covariance function

Ry[n] = limN→∞

1N

N∑k=1

y[k + n]y[k]

= limN→∞

1N

N∑k=1

(u((k + n)Ts)u(kTs) + u((k + n)Ts)∆0okmodM

+ u(kTs)∆0ok+nmodM

+ ∆0ok+nmodM

∆0okmodM

) (4.1)

To simplify the expression for Ry[n], we assume that the input signal and theoffset errors are uncorrelated. This is true if u[k] is modulo M quasi-stationarywith respect to g(u) = ui. However, if the input signal for instance is periodicwhere the period is an integer multiple of the sampling interval it is not true andthe general expression (4.1) must be used. For the simplified expression we alsoassume that the input signal is zero mean. If the input is not zero mean we will justget an additional constant term in the covariance function. Since we only study thedynamic performance of the ADC, the DC part is not important. The simplifiedcovariance expression then becomes

Ry[n] = Ru(nTs) +R∆o[n] (4.2)

where,

R∆o[n] =

1M

M−1∑k=0

(∆0ok+nmodM

∆0ok

). (4.3)

From the covariance function (4.2) and the spectrum definition, the spectrum canbe calculated as

Φy(eiωTs) = Φu(iω) + Φ∆o(eiωTs), − π

Ts≤ ω < π

Ts.

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100 Chapter 4 Time Interleaved A/D Converters

Note that the offset mismatch part, R∆o[n], is periodic with period M . This means

that the spectrum of this part consists of a sum of Dirac-pulses, [85]

Φ∆o(eiωTs) =

2πM

dM/2e−1∑k=−bM/2c

Φp∆o(ei2πk/M )δ(ω − 2πk

MTs) (4.4)

where,

Φp∆o(eiω) =

M−1∑n=0

R∆o[n]e−iωn

From (4.4) we can see that the offset mismatch errors cause distortion peaks at thefrequencies

2πkMTs

, k = −bM/2c, . . . , dM/2e − 1

independent of the input signal shape. From (4.2) we can calculate the SNDR fora general input signal. We have the signal energy

σ2u = E(u2) = Ru(0)

and the distortion energy

σ2∆o

= R∆o[0] =

1M

M−1∑k=0

(∆0ok

)2.

This gives the SNDR

SNDR = 10 log10

(σ2u

σ2∆o

)dB

If the input signal is normalized so that σu = 1, we get

SNDR = −20 log10(σ∆o)dB

4.2.1 Sinusoidal input

If we consider the special case of a sinusoidal input

u(t) = A cos(ω0t)

the covariance function is [85]

Ru(τ) =A2

2cos(ω0τ).

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4.2 Offset Error Distortion 101

The spectrum of the output signal then becomes

Φy(eiωTs) = 2πA2

4(δ(ω − ω0) + δ(ω + ω0)) + Φ∆o

(eiωTs)

− π

Ts≤ ω < π

Ts

From this we can calculate the SFDR

SFDR = 10 log10

(A2/4

maxk Φp∆o(ei2πk/M )

)dB.

If the input signal is normalized to σu = 1, this can be simplified to

SFDR = 10 log10(2 maxk

Φp∆o(ei2πk/M ))dB.

An example of an output spectrum with sinusoidal input is shown in Figure 4.3.In this example there are four interleaved ADCs and the offset errors are randomlygenerated from a uniform distribution

∆0ok∈ U(−0.1σu, 0.1σu)

0 1 2 3 4 5 6−90

−80

−70

−60

−50

−40

−30

−20

−10

0

10

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

Signal componentOffset error distortion

Figure 4.3 Example of output spectrum from a time interleaved ADC withfour ADCs and offset mismatch errors. The input signal is a sinusoid withadditive noise.

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102 Chapter 4 Time Interleaved A/D Converters

4.3 Gain Error Distortion

In this section we study the gain errors, and assume that the offset and time errorsare zero. The output subsequences are then

yi[k] = (1 + ∆0gi)u

((kM + i)Ts

)i = 0, . . . ,M − 1.

Combining the subsequences we have

y[k] = (1 + ∆0gkmodM

)u(kTs)

From this we can calculate the covariance function

Ry[n] = limN→∞

1N

N∑k=1

y[k + n]y[k]

= limN→∞

1N

N∑k=1

(1 + ∆0gk+nmodM

)(1 + ∆0gkmodM

)u((k + n)Ts)u(kTs)

=1M

M−1∑j=0

(1 + ∆0gj+nmodM

)(1 + ∆0gj ) ·

limN→∞

M

N

N/M∑k=1

u((kM + j + n)Ts)u((kM + j)Ts) (4.5)

As for the offset error case we have to make an assumption about the input signalto simplify the covariance expression. Here we have to assume that u[k] is moduloM quasistationary with respect to

g(ui, uj) = ui[k]uj [k]i, j = 0, . . . ,M − 1.

This is true for most quasistationary signal with the exception of periodic signalswhere the period is an integer multiple of Ts. With the assumption of modulo Mquasi-stationarity the covariance function can be simplified to

Ry[n] = R∆g[n]Ru[n]

where,

R∆g[n] =

1M

M−1∑j=0

(1 + ∆0gj+nmodM

)(1 + ∆0gj )

Since the covariance function of the output signal consists of a product, the spec-trum can be calculated as a convolution

Φy(eiωTs) = Φ∆g∗ Φu(eiω)

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4.3 Gain Error Distortion 103

The gain error covariance function, R∆g[n], is periodic and the corresponding spec-

trum is calculated analogously to the offset error spectrum (4.4)

Φ∆g(eiωTs) =

2πM

dM/2e−1∑k=−bM/2c

Φp∆g(ei2πk/M )δ(ω − 2πk

MTs) (4.6)

where,

Φp∆g(eiω) =

M−1∑n=0

R∆g[n]e−iωn

The convolution between the gain error spectrum and the input signal spectrumgives

Φy(eiωTs) =1M

dM/2e−1∑k=−bM/2c

Φp∆g(ei2πk/M )Φu(ei(ω−

2πkMTs

)) (4.7)

− π

Ts≤ ω < π

Ts.

From this expression we can see that the input signal spectrum is repeated, withdifferent magnitude, around the frequencies

2πkMTs

, k = −bM/2c, . . . , dM/2e − 1.

From (4.7) we can calculate the energy of the signal part and the distortion part,and from that calculate the SNDR. The signal energy is the part of the inputspectrum, centered around zero

E(s2) =1M

Φp∆g(e0)E(u2) = (1 + E(∆g))2E(u2).

The distortion energy is the energy of the rest of the spectrum

E(d2) =1M

dM/2e−1∑k=−bM/2c,k 6=0

Φp∆g(ei2πk/M )E(u2) = Var(1 + ∆g)E(u2)

From this we can calculate the SNDR

SNDR = 10 log10

((1 + E(∆g))2E(u2)Var(1 + ∆g)E(u2)

)dB ≈ −20 log10(σ∆g

)dB (4.8)

From (4.8) we can see that the SNDR is independent on the input signal, and onlydepends on the magnitude of the gain errors.

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104 Chapter 4 Time Interleaved A/D Converters

4.3.1 Sinusoidal input

Here we again consider the special case of a sinusoidal input. With gain errors inthe ADC the spectrum of the output signal then becomes

Φy(eiωTs) =πA2

2M

M/2−1∑m=−M/2

Φp∆g(ei

2πmM ) ·

(ω −

(ω0 +

2πmM

)[−π,π]

)+ δ

(ω +

(ω0 +

2πmM

)[−π,π]

)], − π

Ts≤ ω < π

Ts

Here ω[−π,π] = ω + n · 2π where n is an integer such that ω[−π,π] ∈ [−π, π]. Fromthis we can calculate the SFDR

SFDR = 10 log10

( 1 + σ2∆g

maxk 6=0 Φp∆g(ei2πk/M )

)dB

≈ −10 log10(maxk 6=0

Φp∆g(ei2πk/M ))dB.

An example of an output spectrum with sinusoidal input is shown in Figure 4.4.In this example there are four interleaved ADCs and the gain errors are randomlygenerated from a uniform distribution

∆0gk∈ U(−0.1, 0.1)

4.4 Time Error Distortion

We will next study the time errors, and assume that the offset and gain errors arezero. The output subsequences are then

yi[k] = u((kM + i)Ts + ∆ti

)i = 0, . . . ,M − 1.

Combining the subsequences we have

y[k] = u(kTs + ∆tkmodM )

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4.4 Time Error Distortion 105

0 1 2 3 4 5 6−90

−80

−70

−60

−50

−40

−30

−20

−10

0

10

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

Signal componentGain error distortion

Figure 4.4 Example of output spectrum from a time interleaved ADC withfour ADCs and gain mismatch errors. The input signal is a sinusoid withadditive noise.

From this we can calculate the covariance function

Ry[n] = limN→∞

1N

N−1∑k=0

y[k + n]y[k]

= limN→∞

1N

N−1∑k=0

u((k + n)Ts + ∆tk+nmodM )u(kTs + ∆tkmodM )

=1M

M−1∑j=0

limN→∞

M

N

N/M−1∑k=0

u((kM + j + n)Ts + ∆tj+nmodM ) ·

u((kM + j)Ts + ∆tj ) (4.9)

Again we have to make an assumption about the input signal to simplify thecovariance expression. Assume that u[k] is modulo M quasi-stationary with respectto

g(ui, uj) = uiuj , i, j = 1, . . . ,M − 1.

Then the covariance function can be simplified to

Ry[n] =1M

M−1∑j=0

Ru(nTs + ∆tj+nmodM −∆tj ).

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106 Chapter 4 Time Interleaved A/D Converters

This can be rewritten as

Ry[Mn+m] =1M

M−1∑j=0

Ru((Mn+m)Ts + ∆tj+mmodM −∆tj ) (4.10)

m = 0, . . . ,M − 1.

The Fourier transform of a time delayed signal is [54]

F{u(t+ τ)} = eiωτF{u(t)}. (4.11)

We can also calculate the discrete time Fourier transform, U(eiωT ), from the con-tinuous time Fourier transform, U(iω), by the Poisson summation formula [54]

U(eiωT ) =∞∑

r=−∞U(i(ω + r

2πT

)), − πT≤ ω ≤ π

T. (4.12)

Putting (4.10) into (4.11) and (4.12) we can calculate the spectrum of the theoutput signal with time errors

Φy(eiω) =

1M

M−1∑m=0

M−1∑j=0

∞∑r=−∞

Φu(i(ω + r2πMTs

))ei(ω+r 2πMTs

)(∆tj+mmodM−∆tj)ei2π

rmM (4.13)

− π

Ts≤ ω ≤ π

Ts

We see that, as for the gain error distortion, the spectrum is repeated with differentmagnitude around the frequencies 2πr

MTs. Here it is hard to calculate the SNDR for

a general input signal, so the rest of the calculations are done for the sinusoidalcase.

4.4.1 Sinusoidal signal

With a sinusoidal input signal we get from (4.13)

Φy(eiω) =1M

M−1∑m=0

M−1∑j=0

∞∑r=−∞

(δ(ω + r2πMTs

+ ω0) + δ(ω + r2πMTs

− ω0))

ei(ω+r 2πMTs

)(∆tj+mmodM−∆tj)ei2π

rmM

=1M

M−1∑m=0

M−1∑j=0

∞∑r=−∞

(δ(ω + r2πMTs

+ ω0) + δ(ω + r2πMTs

− ω0))

cos(ω0(∆tj+mmodM −∆tj ))ei2π rmM (4.14)

− π

Ts≤ ω ≤ π

Ts

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4.4 Time Error Distortion 107

An example of an output spectrum with sinusoidal input and time error distortionis shown in Figure 4.5. In this examples there are four interleaved ADCs and thetime errors are randomly generated from a uniform distribution

∆ti ∈ U(−0.1Ts, 0.1Ts)

From (4.14) we can calculate the signal energy, from the term r = 0

0 1 2 3 4 5 6−90

−80

−70

−60

−50

−40

−30

−20

−10

0

10

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

Signal componentTime error distortion

Figure 4.5 Example of output spectrum from a time interleaved ADC withfour ADCs and time mismatch errors. The input signal is a sinusoid withadditive noise.

E{s2} =1M

M−1∑m=0

M−1∑j=0

cos(ω0(∆tj+mmodM −∆tj )) ≈M(1− ω20σ

2∆t

)

and the distortion energy from the rest of the terms in the interval ω ∈ [− πTs, πTs ]

E{d2} =1M

M−1∑m=0

M−1∑j=0

M−1∑r=1

cos(ω0(∆tj+mmodM −∆tj ))ei2π rmM

=1M

M−1∑m=0

M−1∑j=0

M−1∑r=0

cos(ω0(∆tj+mmodM −∆tj ))ei2π rmM

− 1M

M−1∑m=0

M−1∑j=0

cos(ω0(∆tj+mmodM −∆tj ))

≈Mω20σ

2∆t

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108 Chapter 4 Time Interleaved A/D Converters

From this we can calculate the SNDR

SNDR ≈ 10 log10

M(1− ω20σ

2∆t

)Mω2

0σ2∆t

≈ −20 log10(ω0σ∆t)

We can also calculate the SFDR

SFDR = 10 log10

1− ω20σ

2∆t

maxr 6=0

∑M−1m=0

∑M−1j=0 cos(ω0(∆tj+mmodM −∆tj ))ei2π

rmM

4.5 Mismatch Error Distortion

With all mismatch errors present, the output subsequences are

yi[k] = (1 + ∆gi)u((kM + i)Ts + ∆ti

)+ ∆oi

i = 0, . . . ,M − 1.

Combining the subsequences we have

y[k] = (1 + ∆gkmodM )u(kTs + ∆tkmodM ) + ∆okmodM

With the same modulo M quasi-stationarity assumptions as in the last three sec-tions, we get the covariance function

Ry[n] = R∆g[n]Ru,∆t

[n] +R∆o[n]

where

Ru,∆t[n] =

1M

M−1∑j=0

Ru(nTs + ∆tj+nmodM −∆tj ). (4.15)

From (4.15), (4.3), (4.6) and (4.13) we can calculate the spectrum with a convolu-tion

Φy(eiω) = Φ∆g∗ Φu,∆t

(eiω) + Φ∆o(eiω). (4.16)

Next, we will calculate this explicitly for a sinusoidal input signal.

4.5.1 Sinusoidal input

With a sinusoidal input signal with angular frequency ω0, we get the output spec-trum

Φy(eiω) =1M2

M/2−1∑m=−M/2

M/2−1∑k=−M/2

Φp∆g(ei

2πmM )Φpu,∆t

(ei2πkM ) ·

(ω −

(ω0 +

2π(k +m)M

)[−π,π]

)+ δ

(ω +

(ω0 +

2π(k +m)M

)[−π,π]

)]

+2πM

M/2−1∑k=−M/2

Φp∆o(ei2πk/M )δ(ω − 2πk/M)

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4.5 Mismatch Error Distortion 109

An example of an output spectrum is given in Figure 4.6. Here a time interleavedADC system with four ADCs is simulated with offset, gain and time mismatcherrors present. The mismatch error are, as in the previous sections, randomlygenerated from a uniform distribution.

∆oi ∈ U(−0.1σu, 0.1σu)∆gi ∈ U(−0.1, 0.1)∆ti ∈ U(−0.1Ts, 0.1Ts)

With similar calculations as in the previous sections we can calculate the SNDR

0 1 2 3 4 5 6−90

−80

−70

−60

−50

−40

−30

−20

−10

0

10

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

Signal componentTime and gain error distortionOffset error distortion

Figure 4.6 Example of output spectrum from a time interleaved ADC withfour ADCs and offset, gain and time mismatch errors. The input signal is asinusoid with additive noise.

SNDR =10 log10

2σ2u(1− ω2

0σ2∆t

)

2σ2u(σ2

∆g+ ω2

0σ2∆t

+σ2

∆oσ2u

)

≈− 10 log10(σ2

∆g+ ω2

0σ2∆t

+σ2

∆o

σ2u

).

and the SFDR

SFDR = 10 log10

(1

max(F∆o, F∆g,∆t

)

)where

F∆o= maxk=1,...,M−1

Φp∆o(ei

2πkM )

Mσ2u

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110 Chapter 4 Time Interleaved A/D Converters

and

F∆g,∆t= maxk=1,...,M−1

1M2

M/2−1∑m=−M/2

Φp∆g(ei

2πmM )Φp∆u,∆t

(ei2πM (k−m))

4.6 Summary

In this chapter we have analyzed how the offset, gain and time mismatch errorsaffect the output spectrum from a time interleaved ADC system. We have seenthat, for a sinusoidal input signal, a lot of spurious peaks occur in the spectrum.For instance in a soft radio application there are several carriers with very differentmagnitude. This means that a spurious peak from a strong carrier might be muchstronger than the actual signal from a weaker carrier, and the weak carrier mightbe drowned by the distortion. Therefore it is important to remove the mismatchdistortion.

In [52] a circuit design with an additional sample and hold circuit in the frontis suggested to remove time errors. A dual ADC system with one additional ADCfor calibration is suggested in [25]. Here the additional ADC is alternately used inparallel with one of the other ADCs as a reference. Both these solutions requireadditional hardware. In [76] and [77] the knowledge of multitone signals in DSLmodems is used to estimate offset and time errors respectively. In [29] and [47, 24]a pseudo random signal is used for background calibration of offset and gain errorsrespectively. Distortion in time interleaved ADCs, with an algorithm for estimationand interpolation of the time errors with a sinusoidal input signal is discussedin [72, 71, 73, 74]. In [75] a ramp signal is used for time error estimation, andan efficient interpolation algorithm is presented. In [35, 43, 32] a blind time errorestimation method was presented, assuming only that the input signal is bandlimited to the Nyquist frequency. However, this estimation method gives a signaldependent bias in the estimates. In Part II, Papers A and B, of this thesis animproved, unbiased, time error estimation method is presented and analyzed. Thetime error estimation method is also combined with estimation of offset and gainin Paper C, so that all three mismatch errors can be estimated simultaneously. InPaper D another method to decrease the impact of the mismatch errors is alsoanalyzed. The impact of the mismatch errors is here decreased by randomizationof the selection of the ADC order.

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5

Conclusions

The trend in recent years has been to increase the amount of digital circuits inmany communication systems. The interface between the analog parts and thedigital parts in such a system is an A/D converter (ADCs). This means that therequirements on fast, cheap and high precision ADCs have increased. The demandson cost, speed, precision and energy consumption are all contradictory. Thereforeit is interesting to study means of improving the signal quality by estimation andcompensation of errors in the ADC. This can serve both as a way to increasesampling speed, since the requirements on accuracy can be reduced, and as a wayto reduce cost by reducing the quality of the manufacturing process.

In this thesis, we study how errors can be estimated and compensated for with-out any special calibration signal. This means that the errors can be estimatedonline, while the ADC is used, thereby reducing the calibration cost. The estimatescan also adapt to slow variations in the errors, which means that the performancecan be sustained for a long time without any recalibration. In this thesis, we studytwo types of errors:

• Mismatch errors in the reference levels of an ADC. Mainly, the SA-ADC isstudied but the theory applies to pipelined and flash ADCs as well. Theseerrors are studied in Chapter 3 of this thesis. Two estimation algorithms arepresented here:

– The first algorithm assumes that the amplitude distribution of the input

111

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112 Chapter 5 Conclusions

signal is known, but except for that the input signal is unknown. Thisalgorithm gives good performance for any input signal.

– The second algorithm assumes only that the amplitude distribution ofthe input signal is smooth. The performance of this algorithm dependson how smooth the amplitude distribution of the input signal is. Sim-ulations with Gaussian input, sinusoidal input and multisine input allshow good results.

• Mismatch errors in time interleaved ADCs. Three types of mismatch errorsare studied:

– Offset errors.

– Gain errors.

– Time errors (static jitter).

The mismatch errors in interleaved ADCs are mainly discussed in Part IIof this thesis. However, in Chapter 4 an introduction is given, where wecalculate how the spectrum is affected by the mismatch errors. In Part IIvarious ways of reducing the impact of the mismatch errors are discussed.

– In Paper A a method for estimation of the time errors is derived.

– In Paper B, the estimation method from Paper A is analyzed, and sim-ulation and measurement results are presented.

– In Paper C, the time error estimation method is combined with estima-tion methods for offset and gain errors.

– In Paper D, a randomization method, that spreads the mismatch dis-tortion over the whole spectrum, is analyzed, as an alternative to thealgorithm in Paper A.

In these four papers, two different approaches of reducing the impact of the mis-match error distortion are discussed. In Papers A-C, the interleaved ADCs areused sequentially, which cause periodic errors in the output signal. These errorsgive spurious peaks in the output spectrum. To reduce the impact of the errors,the errors are here estimated and compensated for. The advantage of this methodis that no additional hardware is required and that the performance can be madearbitrarily good if enough data is used for estimation. The drawback is that theestimation and correction algorithms are quite computationally demanding. How-ever, only the correction must be done in real time, which somewhat reduces therequired computational speed.

In Paper D, one or more additional ADCs are used. This means that theselection of which ADC should be used at a certain sample can be randomized.This method avoids the periodic behavior of the errors and therefore the distortionspectrum is spread over the whole frequency band as an additional noise. Thissignificantly improves the SFDR, while the SNDR is the same as without random-ization. However, in for instance radio base stations, a high SFDR is often more

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113

important than a high SNDR. The gain and offset errors can also be estimated andcompensated for here, while it is harder to estimate the time errors. The advantageof this method is that much less compuations is needed compared to the methodin Papers A-C and that a certain estimation accuracy of offset and gain errorscan be guaranteed, independent of the input signal shape. The drawback is thatadditional hardware is required.

The estimation and compensation methods for reference level mismatch in in-dividual ADCs, from Chapter 3, can be combined with the estimation and com-pensation methods for mismatch errors in time interleaved ADCs, from Part II.This means that we can combine ADCs where each ADC has low accuracy andthe different ADCs are poorly matched, to an ADC system with much higher sam-pling rate and accuracy. The estimation accuracy can be made arbitrarily goodby increasing the amount of estimation data. The limiting factors to how goodperformance we can achieve are then mainly the bandwidth of the sample-and-hold circuit, the accuracy of the sample-and-hold circuit and the random jitter.The errors in the sample-and-hold circuit are deterministic, and therefore shouldbe possible to also estimate and compensate for. The random jitter is a randomtime error in the sampling instances, where the time error for a certain sample isindependent of all other sampling instances. This means that research on circuitdesign could focus on increasing the bandwidth of the sample-and-hold circuits andreducing the random jitter which is impossible to estimate.

Number of Sampling speed ADC Manufacturerbits [MSamples/s] type

5 3600 flash Fraunhofer Institut [59]8 1500 flash Maxim [92]10 210 flash Analog Devices [18]12 210 pipeline Analog Devices [22]14 80 pipeline Analog Devices [20]18 0.8 SA-ADC Analog Devices [21]24 0.096 sigma-delta Analog Devices [19]10 500 4 time interleaved ADCs [1]10 2000 16 time interleaved ADCs [1]12 132 2 time interleaved ADCs [43]12 30 16 time interleaved ADCs12 30 17 randomly interleaved ADCs

Table 5.1 State-of-the-art performance for ADC speed.

The state-of-the-art ADCs regarding sampling speed was summarized in Ta-ble 2.1. This table is repeated here for convenience, see Table 5.1. In this table,some non-commercial time interleaved ADCs are added to compare what can beachieved with time interleaving. Some of these ADCs do not give higher samplingrates than existing ADCs, but are used to show the principles of time interleaving

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114 Chapter 5 Conclusions

and to validate the estimation methods. The fastest sample-and-hold circuits todayhave a bandwidth of about 2 − 3 GHz. This means that we could have a samplerate of 4 − 6 GHz. This is approximately what is available for 5 bits, but usingtime interleaving we could reach this speed with maybe 8 − 10 bits. The limitingfactor for higher precision is here the jitter. The best ADCs of today have a jitterstandard deviation of about 0.25 ps. To get 9 effective bits, the sampling intervalshould be about 1500 times longer [1] which gives a sampling rate of 2.6 GHz. Asystem with 4 time interleaved ADC, each with a precision of 12 bits and a sam-pling rate of 125 MHz is constructed in [1]. This system gives a total sampling rateof 500 MHz, and could come close to 12 bits if the mismatch errors were removed.This system is also expandable to 16 ADCs which would give a sampling rate of 2GHz. However, for such high frequencies the random jitter starts to dominate.

Another advantage with time interleaving can be to reduce hardware complex-ity. As can be seen in Figure 2.11, the hardware complexity grows linearly withthe number of bits resolution for SA-ADCs, while for flash ADCs, the growth isexponential. With time interleaving, the growth in hardware complexity is stilllinear for SA-ADCs. This means that time interleaving of SA-ADCs can be usedas a means of achieving high speed and high resolution with a much lower hardwarecomplexity than a flash or pipeline ADC with the same performance. Even thoughthe hardware complexity is increased by time interleaving, the amount of hardwareis still lower for a time interleaved SA-ADC than for a flash or pipelined ADC.

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[96] Maxim. Understanding pipelined ADCs. http://www.maxim-ic.com/appnotes.cfm/appnote number/383/.

[97] Maxim. Understanding SAR ADCs. http://www.maxim-ic.com/appnotes.cfm/appnote number/387/ln/en/.

[98] Maxim. Maxim, 4-1/2 digit single-chip A/D converter with LCD driver.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94088,USA, 1994.

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[100] Maxim. Maxim, MAX1165, 16-bit, analog-to-digital converters with parallelinterface, data sheet. Maxim Integrated Products, 120 San Gabriel Drive,Sunnyvale, CA 94088, USA, 2002.

[101] J. Mitola. Software radios survey, critical evaluation and future directions.IEEE AES Systems Magazine, pages 25–36, April 1993.

[102] S.K. Mitra. Digital Signal Processing –A computer-based approach. McGraw-Hill, 1998.

[103] S.R. Norsworthy, R. Schreier, and G.C. Temes. Delta-Sigma Data Converters,Theory, Design and Simulation. IEEE Press, 1997.

[104] B.J. Penney. Analog to digital converter with second order error correction.US Patent nr. 4985702, Januari 1991.

[105] H. Posti, R Jarvela, and P.A. Leppanen. Receiver dimensioning in a hybridmulticarrier GSM base station. IEEE Personal Communications, pages 56–64, August 1999.

[106] J.M. Rabaey. Digital Integrated Circuits: A Design Perspective. Prentice-Hall, 1996.

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[107] T.A. Rebold and F.H. Irons. A phase-plane approach to the compensationof high-speed analog-to-digital converters. In Proc. of IEEE Int. Symposiumon Cicuits and Systems, pages 455–458. IEEE, 1987.

[108] B.J. Sheu and C. Hu. Switched-induced error voltage on a switched capacitor.IEEE J. Solid-State Circuits, 19:519–525, August 1984.

[109] J. Shieh, M. Patil, and B.L. Sheu. Measurement and analysis of chargeinjection in MOS analog switches. IEEE J. Solid-State Circuits, 22(2):277–281, April 1987.

[110] S. Srikanteswara, J.H. Reed, P. Athanas, and R. Boyle. A soft radio architec-ture for reconfigurable platforms. IEEE Communications Magazine, pages140–147, February 2000.

[111] T. Starr, J.M. Cioffi, and P.J. Silverman. Understanding Digital SubscriberLine Technology. Prentice-Hall, 1999.

[112] W.H.W. Tuttlebee. Software radio technology: A European perspective.IEEE Communications Magazine, pages 118–123, February 1999.

[113] R. van de Plassche. Integrated Analog-to-Digital and Digital-to-Analog Con-verters. Kluwer Academic Publishers, 1994.

[114] J.A. Wepman. Analog-to-digital converters and their applications in radioreceivers. IEEE Communications Magazine, pages 39–45, May 1995.

[115] B. Widrow, I. Kollar, and M.-C. Liu. Statistical theory of quantization.IEEE Transactions on Instrumentation and Measurement, 45(2):353–361,April 1996.

[116] B. Widrow and S.D. Stearns. Adaptive Signal Processing. Prentice-Hall,1985.

[117] M.G. Wong and M.L. Placer. Designing receiver front ends from systemspecifications. RF Design, pages 44–54, April 1998.

[118] J. Yuan and C. Svensson. A 10-bit 5MS/s successive approximation ADC cellused in a 70MS/s ADC array in 1.2µm CMOS. IEEE Journal of Solid-StateCircuits, 29(8):866–872, August 1994.

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124 Bibliography

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Part II

125

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A

Equalization of Time Errorsin a Time Interleaved ADC

System – Part I: Theory

Authors: Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund

Edited version of paper submitted to IEEE Transactions on Signal Processing.

Preliminary version published as Technical Report LiTH-ISY-R-2494, Departmentof Electrical Engineering, Linkopings universitet, Linkoping, Sweden.

127

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Equalization of Time Errors in TimeInterleaved ADC System – Part I: Theory

Jonas Elbornsson, Fredrik Gustafsson Jan-Erik Eklund

Department of Electrical Engineering, Infineon TechnologiesLinkopings universitet, Wireless Solutions Sweden AB.

SE-581 83 Linkoping, [email protected], [email protected] [email protected]

Abstract

To significantly increase the sampling rate of an A/D converter (ADC), atime interleaved ADC system is a good option. The drawback of a timeinterleaved ADC system is that the ADCs are not exactly identical dueto errors in the manufacturing process. This means that time, gain andoffset mismatch errors are introduced in the ADC system. These errorscause distortion in the sampled signal.In this paper we present a method for estimation and compensation ofthe time mismatch errors. The estimation method requires no knowl-edge about the input signal except that it should be band limited to theNyquist frequency for the complete ADC system. This means that theerrors can be estimated while the ADC is running. The method is alsoadaptive to slow changes in the time errors.

keywords: A/D conversion, nonuniform sampling, equalization, estima-tion

1 Introduction

There is an ever increasing need for faster A/D converters (ADCs) in moderncommunications technology, such as radio base stations and VDSL modems. Toachieve high enough sample rates, an array of M ADCs, interleaved in time, canbe used [1, 2], see Figure 1. The time interleaved ADC system works as follows:

• The input signal is connected to all the ADCs.

• Each ADC works with a sampling interval of MTs, where M is the numberof ADCs in the array and Ts is the desired sampling interval.

129

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130 Paper A Equalization of Time Errors in Time Interleaved ADC...

• The clock signal to the ith ADC is delayed with iTs. This gives an overallsampling interval of Ts.

The drawback with the interleaved structure is that, due to the manufacturingprocess, all the ADCs are not identical and mismatch errors will occur in thesystem. Three kinds of mismatch errors will occur:

• Time errors (static jitter)The delay times of the clock between the different ADCs are not equal. Thismeans that the signal will be periodically but non-uniformly sampled.

• Amplitude offset errorsThe ground level differs between the different ADCs. This means that thereis a constant amplitude offset in each ADC.

• Gain errorsThe gain, from analog input to digital output, differs between the differentADCs.

The errors listed above are static or slowly time varying. This means here that theerrors can be assumed to be constant for the same ADC from one cycle to the nextover an interval of some million samples.

With a sinusoidal input, the mismatch errors can be seen in the output spectrumas non harmonic distortion [3]. With input signal frequency ω0, the gain and time

delay, Ts

sampling

ADC0

ADC1

ADC2

ADCM−1

uclock

y0

y1

y2

yM−1

y

MUX

Figure 1 A time interleaved ADC system. M parallel ADCs are usedwith the same master clock. The clock is delayed by the nominal samplinginterval to each ADC. The outputs are then multiplexed together to form asignal sampled M times faster than the output from each ADC.

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1 Introduction 131

errors cause distortion at the frequencies

i

Mωs ± ω0, i = 1, . . . ,M − 1

where ωs is the sampling frequency. The offset errors cause distortion at the fre-quencies

i

Mωs, i = 1, . . . ,M − 1

An example of an output spectrum from an interleaved ADC system with fourADCs with sinusoidal input signal is shown in Figure 2. This distortion causes

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

Normalized angular frequency

Sig

nal p

ower

[dB

]

ADC output spectrum

signal componentoffset error distortiontime and gain error distortion

Figure 2 Simulated output spectrum from interleaved ADC system withfour ADCs. The input signal is a single sinusoid. The distortion is causedby mismatch errors.

problems for instance in a radio receiver where a weak carrier cannot be distin-guished from the mismatch distortion from a strong carrier. It is therefore impor-tant to remove the mismatch errors. However, calibration of an ADC system is timeconsuming and costly. Furthermore the mismatch errors may change slowly withfor instance temperature and aging. Therefore we want to estimate the mismatcherrors while the ADC is used. Methods for estimation of timing errors have beenpublished in for instance [4] and [5]. These methods require a known calibrationsignal, which means that the operation of the ADC must be stopped during cali-bration. A blind time error estimation method was presented in [6] and validatedon measurements in [7]. This method works well, but gives a bias error in the time

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132 Paper A Equalization of Time Errors in Time Interleaved ADC...

error estimates. A blind amplitude offset error estimation method was presentedin [8].

We will in this paper present a method for blind equalization of the time mis-match errors in a time interleaved ADC system. The estimation method requiresonly that the input signal is band limited to the Nyquist frequency, for the completeADC system. This method gives no bias in the estimates. The joint estimation ofall three mismatch error types is described in [9] where the time error estimationpresented in this paper is one part, described from a system perspective. In thispaper the time error estimation method is described in more detail. In [10], analy-sis, simulation results and validation on a real time interleaved ADC system of thetime error estimation method is given.

2 Notation and Definitions

We will in this section introduce the notation that will be used in this paper. Thenominal sampling interval, that we would have without time errors, is denoted Ts.M denotes the number of ADCs in the time interleaved array, which means thatthe sampling interval for each ADC is MTs. The time error parameters are denoted∆ti , i = 0, . . . ,M − 1. The estimates of these errors are denoted ∆ti , and the trueerrors are denoted ∆0

ti . The vector notation ∆t = [∆t0 · · ·∆tM−1 ] is used for allthe time error parameters.

We use the following notation for the signals involved:

• u(t) is the analog input signal.

• u[k] denotes the ideal signal, sampled without mismatch errors.

• ui[k], i = 0, . . . ,M − 1 denotes the M subsequences of u[k],

ui[k] = u[kM + i]. (1)

• yi[k] i = 0, . . . ,M − 1 denotes the output subsequences from the M A/Dconverters, sampled with time errors.

yi[k] = u((kM + i)Ts + ∆0

ti

)• y[k] is the multiplexed output signal from all the ADCs,

y[k] = y(kmodM)

[⌊k

M

⌋],

where b·c denotes rounding towards −∞.

• z(∆t)[k] denote the output signal, y[k], reconstructed with the error parame-ters, ∆t.

• z(∆t)i [k] are the subsequences of z(∆t)[k]

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2 Notation and Definitions 133

We assume throughout this paper that u(t) is band limited to the Nyquist fre-quency, π

Ts, of the complete ADC system.

We will next establish a few definitions which will be used later in the paper.A discrete time signal u[k] is said to be quasi-stationary [11] if

mu = limN→∞

1N

N∑k=1

E(u[k])

Ru[n] = limN→∞

1N

N∑n=1

E(u[k + n]u[k])

both exist, where the expectation is taken over possible stochastic parts of thesignal. Analogously, a continuous time signal u(t) is quasi-stationary if

mu = limT→∞

1T

∫ T

0

E(u(t))dt

Ru(τ) = limT→∞

1T

∫ T

0

E(u(t+ τ)u(t))dt

both exist. A stationary stochastic process is quasi-stationary, with mu and Ru[n]being the mean value and covariance function respectively.

Definition 1 (Modulo M quasi-stationary) Assume

gui1 ,ui2 ,··· = limN→∞

1N

N∑t=1

g(ui1 [t], ui2 [t], . . . ), i1, i2, · · · = 0, . . . ,M − 1

exists for a function g(·, ·, · · · ). Then u is modulo M quasi-stationary with respectto g if

gi1,i2,··· = g{(i1+l) modM,(i2+l) modM,··· }, ∀l ∈ {. . . ,−1, 0, 1, . . . }

The modulo M quasi-stationarity property guarantees that the input signal hasthe same statistical properties for all the ADCs in the time interleaved system.

Example 1 (Modulo M quasi-stationary) Consider first the function

g(ui[k]) = u2i [k].

The modulo M quasi-stationary property then means that the mean square valueshould be equal for all subsequences, i.e., if

σ2i = lim

N→∞

1N

N∑k=1

u2i [k]

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134 Paper A Equalization of Time Errors in Time Interleaved ADC...

then

σ2i = σ2

j , i, j = 0, . . . ,M − 1.

In this example this is true for most quasi-stationary signals, but some periodicsignals are not modulo M quasi-stationary. Consider the deterministic signal

u[k] = cos(π

2k)

and M = 2. Then we have

σ2 = limN→∞

1N

N∑k=1

cos2(1π

2k) =

12

so the signal is quasi-stationary, but

σ20 = lim

N→∞

1N

N∑k=1

cos2(2π

2k) = 1

and

σ21 = lim

N→∞

1N

N∑k=1

cos(2π

2k +

π

2) = 0

i.e., the signal is not modulo 2 quasi-stationary with respect to g(ui[k]) = u2i [k],

but it is with respect to g(ui[k]) = ui[k].

We use further the following notation for the mean square and mean squaredifference of a quasi-stationary signal

σ2u = lim

N→∞

1N

N∑k=1

E{u2[k]}

Rui,uj [l] = limN→∞

1N

N∑k=1

E

{(u(imodM)

[k +

⌊ iM

⌋+ l]

− u(jmodM)

[k +

⌊ jM

⌋])2}. (2)

The following notation is used to simplify the expressions involving the recon-structed signals.

(σ2zi)

(∆t) = σ2

z(∆ti )

i

R(∆t)zi,zj [l] = R

z(∆t)i ,z

(∆t)j

[l]

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3 Signal Reconstruction 135

3 Signal Reconstruction

If the time error parameters are known, and the input signal u(t) is band limited tothe Nyquist frequency, u(t) can be exactly reconstructed from the sampled signaly[k]. We will in this section describe the signal reconstruction.

The time errors can be compensated for by many different interpolation tech-niques, for instance splines [12], polynomial interpolation or filter bank interpola-tion [13]. We will here describe a method for exact interpolation by filtering thesignal with a non-causal IIR filter. If the input signal is band limited to the Nyquistfrequency, π

Ts, and the time error parameters are known, the input signal can be

perfectly reconstructed from the irregular samples [14]. In a real application, theinterpolation is of course approximate since we cannot use a filter of infinite length,but we can come arbitrarily close to the exact interpolation by choosing the lengthof the filter large enough. In [14] the interpolation is done at an arbitrary timeinstance according to the following:

Solve the equation system

M−1∑i=0

ej(−M−1

2 +i+∆ti)ωHi(ω, t) = 1

M−1∑i=0

ej(−M−1

2 +i+∆ti)(ω+ 2π

MTs)Hi(ω, t) = ej

2πMTs

t (3)

...M−1∑i=0

ej(−M−1

2 +i+∆ti)(ω+(M−1) 2π

MTs)Hi(ω, t) = ej(M−1) 2π

MTst

for Hi(ω, t). The input signal can then be calculated at any time instance as

u(t) =∞∑

k=−∞

M−1∑i=0

yi[k]hi(t− kMTs)

where

hi(t) =MTs2π

∫ −π/Ts+2π/(MTs)

−π/TsHi(ω, t)ejωtdω

The reconstruction described in [14] is done at an arbitrary time instance. Ifwe only need to reconstruct the signal at the nominal sampling instances

t = (kM + l)Ts, l = 0, . . . ,M − 1, k = . . . ,−1, 0, 1, . . . (4)

we can simplify the reconstruction. Here we introduce the notation αi = −M−12 +

i+ ∆ti , to simplify the the equation system (3). The right hand side of (3) is thenindependent of k in (4) and depends only on l. Further, the left hand side can be

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136 Paper A Equalization of Time Errors in Time Interleaved ADC...

factorized into one diagonal matrix which depends on ω, one matrix independentof ω and H(ω, t) which now also is independent of k

A(α)E(α, ω)H(l)(ω) = Bl

Here

A(α) =

1 · · · 1

ejα02πMTs · · · ejαM−1

2πMTs

.... . .

...ejα0(M−1) 2π

MTs · · · ejαM−1(M−1) 2πMTs

E(α, ω) =

ejα0ω 0 · · · 0

0 ejα1ω · · · 0...

.... . .

...0 0 · · · ejαM−1ω

and

Bl =[

1 ej2πl/M · · · ej2π(M−1)l/M]T

Since only E(α, ω) depends on ω and the time dependence in the right hand sideof (3) is removed, we can easily calculate the coefficients h(l)

i [k] = hi((kM + l)Ts)

h(l)[k] =MTs2π

∫ −π/Ts+2π/(MTs)

−π/TsE−1(α, ω)ejω(kM+l)TsdωA−1(α)Bl

From here on we assume M to be even, M odd gives similar calculations. Cal-culating the TDFT (time discrete fourier transform) of the subsequences h(l)[k]gives

H(l)(ejωMTs) = MTs

∞∑k=−∞

h(l)[k]

=(MTs)2

∫ −π/Ts+2π/(MTs)

−π/TsE−1(α, γ)ejγlTs

∞∑k=−∞

ejγkMTse−jωkMTsdγA−1(α)Bl

= MTs

∞∑r=−∞

∫ −π/Ts+2π/(MTs)

−π/TsE−1(α, γ)ejγlTsδ(γ − ω + r

2πMTs

)dγA−1(α)Bl

= MTsE−1(α, ω − π

Ts)ejωlTs(−1)lA−1(α)Bl, 0 ≤ ω < 2π

MTs

The subsequences Z(∆0t )

i (ejωMTs) can then be calculated as

Z(∆0

t )l (ejωMTs) = Y T (ejωMTs)MTsE

−1(α, ω − π

Ts)ejωl(−1)lA−1(α)Bl (5)

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4 Time Error Estimation 137

where

Y T (ejωMTs) =[Y0(ejωMTs) · · · YM−1(ejωMTs)

]The TDFT of the time error compensated signal, Z(∆0

t )(ejωTs), can then be calcu-lated from its subsequences [15]

Z(∆0t )(ejωTs) =

M−1∑l=0

Z(∆0

t )l (ej(ωMTs mod 2π))e−jlωTs (6)

With the inverse TDFT we get the time error reconstructed signal

z(∆0t )[k] = TDFT−1(Z(∆0

t )(ejωTs)) (7)

In practice (5), (6) and (7) are calculated on finite sequences using the DFT (dis-crete fourier transform) instead of the TDFT.

4 Time Error Estimation

We will in this section present a method to estimate the time errors in a timeinterleaved ADC system. The estimation is done without a special calibrationsignal and without knowledge of the input signal. The idea for the time errorestimation is to study the mean square difference between the outputs of adjacentADCs. Assuming that the input signal is band limited to the Nyquist frequency,the signal cannot change arbitrarily fast. If the time interval between two ADCs isshorter than Ts the signal will change less on average between the samples comparedto a time difference of Ts and vice versa if the time interval is longer than Ts. InFigure 3 this is illustrated for a dual ADC system.

The method that we will use to estimate the time error parameters is mini-mization of a loss function, which has its global minimum for ∆t = ∆0

t . From thediscussion above we can see that the function

V Nt (∆t) =M−1∑i=1

i−1∑j=0

(RN,(∆t)zi,zi−1

[0]−RN,(∆t)zj ,zj−1

[0])2 (8)

where

RN,(∆t)zi,zi−1

[0] =1N

N∑k=1

(z(∆t)i [k]− z(∆t)

i−1 [k + b i− 1Mc])2

might be a good candidate for a loss function. We can see that the functionlimN→∞R

N,(∆t)zi,zi−1 [0] should have the same value for i = 0, . . . ,M − 1 if the time

error parameters are correct. This means that V Nt (∆0t ) = 0. If the time error

paramters are not correct, the time difference between the samples are not equal

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138 Paper A Equalization of Time Errors in Time Interleaved ADC...

and limN→∞RN,(∆t)zi,zi−1 [0] then has different values for different values of i. This

means that V Nt (∆0t ) > 0.

We will in the following assume that the time error in the first ADC is zero, i.e.,∆0t0 = 0. This is no loss of generality since only the distance between the samples,

and not the absolute sampling instances, needs to be correct. We will in this sectionshow that the loss function (8) is minimized for ∆t = ∆0

t , when N tends to infinity.We will start with the case of a dual ADC system, i.e., M = 2, in which case we canalso show that the loss function is monotonously increasing around ∆t = ∆0

t . Thesignal reconstruction described in Section 3 is quite complicated and not linear inthe parameters. However, it can be considered locally linear in the paramters sinceit is a continuous mapping and the time errors normally are small. The proofs willtherefore be made for the case of a reconstruction that is linear in the parameters.

4.1 Dual ADC system

We will here consider the output signals from a dual ADC system. Since we hereassume that the reconstruction is linear in the time error parameters, we do notneed to involve the reconstruction at this stage. Instead we can study the outputsignals, yi[k], parameterized in the time error paramters, ∆ti . Since M = 2 and

0.5 1 1.5 2 2.5 3−1

−0.5

0

0.5

1

∆t=−0.3 ∆

t=0.3

∆t=0

∆ y1

∆ y1

∆ y1

Too early sampleToo late sampleIdeal sample

Figure 3 The idea for time error estimation, here an example with twoADCs. If the sample of the second ADC is taken before the nominal sam-pling instance, the signal changes less on average between the samples, andvice versa.

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4 Time Error Estimation 139

∆t0 = 0 we only have one parameter here, which we denote ∆t.

y0[k] = u(2kTs)y1[k] = u((2k + 1)Ts + ∆t)

From this we can calcualate the mean square difference functions, here dependingon ∆t

R(∆t)y1,y0

[0] = limN→∞

1N

N∑k=1

(y1[k]− y0[k])2

R(∆t)y0,y1

[0] = limN→∞

1N

N∑k=1

(y0[k]− y1[k − 1])2

We will start with a lemma that will be needed in the theorems later.

Lemma 2 Assume that u(t) is quasi-stationary, band limited to ωc and not con-stant. Then

Ru(Ts −∆t) > Ru(Ts + ∆t)

if Ts <π

ωcand 0 < ∆t < Ts.

Proof: see Appendix A.

Next we will prove that the time error loss function has its global minimum for∆t = 0.

Theorem 3 Assume that u(t) is quasi-stationary and bandlimited to ωc. Assumefurther that u[k] is modulo 2 quasi-stationary with respect to g1(ui, ui−1) = (ui[k]−ui−1 mod 2[k + b i−1

2 c])2, i = 0, 1 and g2(ui) = u2i [k], i = 0, 1. Then

V (∆t) = (R∆ty1,y0

[0]−R∆ty0,y1

[0])2 > 0 if

Ts <π

ωand 0 < |∆t| < Ts.

Further

V (0) = 0.

Proof:V (0) = 0 follows directly from the definition of a modulo 2 quasi-stationary signal.

V (∆t) ={

limN→∞

1N

N∑k=1

[u((2k + 1)Ts + ∆t)− u(2kTs)]2

− limN→∞

1N

N∑k=1

[u((2k + 2)Ts)− u((2k + 1)Ts + ∆t)]2}2

=(Ru(Ts −∆t)−Ru(Ts + ∆t)

)2> 0, if ∆t 6= 0

The last expression is strictly greater than zero according to Lemma 2.

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140 Paper A Equalization of Time Errors in Time Interleaved ADC...

Theorem 4 Assume that the requirements of Theorem 3 are fulfilled. Then

|∆(1)t | < |∆

(2)t | <

Ts2⇒ V (∆(1)

t ) < V (∆(2)t )

if Ts <π

ωc.

Proof: see Appendix A.

To summarize, we have in this section shown that V (∆t) has its global minimumfor ∆t = 0 and that it is monotonically increasing around ∆t = 0, for a dual ADCsystem.

4.2 Extension of time error loss function

So far we have only considered the function R(∆t)yi,yi−1 [0]. It can also be interesting to

extend this to include terms with a larger time difference, R(∆t)yi,yi−1 [l], l = 0, 1, . . . .

We can then extend the definition of the time error loss function to the partial timeerror loss functions

V (l)(∆t) = (R(∆t)y1,y0

[l]−R(∆t)y0,y1

[l])2 (9)

and the time error loss function

V (L)(∆t) =L∑l=0

βlV(l)(∆t). (10)

With the same calculations as for the case l = 0 we get

V (l)(∆t) =(Ru((2l + 1)Ts −∆t)−Ru((2l + 1)Ts + ∆t)

)2.

Here we can only guarantee that a partial loss function has a unique global min-imum if u(t) is band limited to π

(2l+1)Ts. But we still have the property that

V (l)(0) = 0, so these loss functions can still be used to improve the numericalproperties of the minimum when we have a noisy signal.

Intuitively, the partial loss functions should be weighted so that the contributionfrom noise is the same from each part. Since the noise is additive on the signal wefind, by studying the definition of the loss functions, that the noise gives the samecontribution to the partial loss funcitons, independent of l. This means that weshould have βl = 1, ∀l.

We will next study the partial loss functions V (l)(∆t) for three special inputsignals, sinusoidal input, multisine input and band limited white noise input.

• Sinusoidal input:With a sinusoidal input, u(t) = sin(ω0t), we have

Φu(ω) = δ(ω − ω0) + δ(ω + ω0)

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4 Time Error Estimation 141

From this, we can calculate Ru(τ) = 2 cos(ω0τ) and

V (l)(∆t) = 4 (sin((2l + 1)ω0Ts) sin(ω0∆t))2

This means that for a sinusoidal signal we still have the property that V (l)(∆t)is monotonically increasing around ∆t = 0 as long as (2l+ 1)ω0Ts 6= nπ, n =0, 1, . . . in which case V (l)(∆t) ≡ 0. For low frequencies V (l)(∆t) increasessteeper around ∆t = 0 for higher values of l. Thus, the loss function willbecome more “peaky” when more partial loss functions are added, whichmeans that the numerical properties are improved.

• Multisine input:With a multisine input signal with I tones we have the input spectrum

Φu(ω) =I∑i=0

{δ(ω − ωi) + δ(ω + ωi)}

which gives the partial loss functions

V (l)(∆t) = 4

(I∑i=0

sin((2l + 1)ωiTs) sin(ωi∆t)

)2

.

• Band limited white noise input:With a band limited white noise input we have the input spectrum

Φu(ω) ={

1 if ω < ωc0 otherwise .

From this we can calculate the loss functions

V (l)(∆t) =(

sin[((2l + 1)Ts −∆t)ωc]((2l + 1)Ts −∆t)ωc

− sin[((2l + 1)Ts + ∆t)ωc]((2l + 1)Ts + ∆t)ωc

)2

.

Infinite sum of partial loss functions

As we have seen in the previous examples, we do not, in general, have the propertythat the partial loss functions, V (l)(∆t), are monotonically increasing around ∆t =0. But if we study an infinite sum of partial loss functions we have this property,independent of the input signal spectrum. Here we have to distinguish two cases

1. Φu(ω) does not include δ-spikes

2. Φu(ω) includes δ-spikes

We start with the first case.

Theorem 5 Assume that u(t) is quasistationary, not constant and band limitedto ωc, and that u[k] is modulo 2 quasistationary with respect to g1(ui, ui−1) =(ui[k] − ui−1 mod 2[k + i − 1])2, i = 0, 1 and g2(ui) = u2

i [k], i = 0, 1. Assume also

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142 Paper A Equalization of Time Errors in Time Interleaved ADC...

that Φu(ω) does not include δ-spikes.Then V (∞)(∆t) =

∑∞l=0 V

(l)(∆t) has the following properties:

(i) : V (∞)(0) = 0

(ii) : V (∞)(∆t) > 0, if ∆t 6= 0

Proof: see Appendix A.

Theorem 6 Assume that the conditions of Theorem 5 are fulfilled.Then

|∆(1)t | < |∆

(2)t | <

Ts2⇒ V (∞)(∆(1)

t ) < V(∞)t (∆(2)

t )

Proof: see Appendix A.

For the case where Φu(ω) includes δ-spikes we have to redefine the loss functionin order to make it converge

V (∞)(∆t) = limL→∞

1L

L∑l=0

V (l)(∆t)

We will in the following split the spectrum into two parts, one part with δ-spikesand one part without them.

Φu(ω) =I∑i=1

αi(δ(ω − ωi) + δ(ω + ωi)) + Φu(ω)

αi > 0, 0 < ωi < ωc (11)

With this input spectrum we can show that V (∞)(∆t) is monotonically increasingaround ∆t = 0.

Theorem 7 Assume that we have an input signal spectrum of the form (11).Assume also that u(t) is band limited to ωc and that u[k] is modulo 2 quasis-tationary with respect to g1(ui, ui−1) = (ui[k] − ui−1 mod 2[k + i − 1])2, i = 0, 1and g2(ui) = u2

i [k], i = 0, 1. Then V (∞)(∆t) = limL→∞1L

∑Ll=0 V

(l)(∆t) has thefollowing properties:

(i) : V (∞)(0) = 0

(ii) : V (∞)(∆t) > 0, if ∆t 6= 0

Proof: see Appendix A.

Theorem 8 With the conditions of Theorem 7 fulfilled V (∞)(∆t) also has thefollowing property:

|∆(1)t | < |∆

(2)t | <

Ts2⇒ V (∞)(∆(1)

t ) < V (∞)(∆(2)t )

Proof: see Appendix A.

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4 Time Error Estimation 143

4.3 General M ≥ 2

In this section we generalize some of the results to M > 2. We will start with alemma that is needed to prove the theorems later.

Lemma 9 Assume that u(t) is quasi-stationary, band limited to ωc and not con-stant.Then Ru(τ) is monotonically decreasing if 0 < τ < π

ωc.

Proof: see Appendix B.

Theorem 10 Assume that u(t) is quasistationary, band limited to ωc and notconstant. Assume further that u[k] is modulo M quasistationary with respect tog1(ui, ui−1) = (ui[k] − ui−1 modM [k + b i−1

M c])2, i = 0, . . . ,M − 1 and g2(ui) =u2i [k], i = 0, . . . ,M − 1. Then

V (∆t) =M−1∑i=1

i−1∑j=0

(R(∆t)yi,yi−1

[0]−R(∆t)yj ,yj−1

[0]) > 0 (12)

if Ts <1

1 + β/2π

ωcand 0 < |∆ti | < βTs, i = 1, . . . ,M − 1

where

0 < β < 1.

Further

V (0) = 0.

Proof: see Appendix B.

Here we cannot guarantee the correct global minimum for an input signal arbitrarilyclose to the Nyquist frequency. Therefore we have introduced a paramter β, as atradeoff between the input signal bandwidth and the maximum time error size.From Theorem 10 we see that in order to guarantee that the loss function has itsglobal minimum for ∆t = 0 for any ∆t such that |∆ti | < Ts/2, i = 0, . . . ,M − 1,we have to assume that the input signal is band limited to 4/5 of the Nyquistfrequency. However, usually the time errors are much smaller and if for instance|∆ti | < 0.1Ts we can allow the input signal to be band limited to around 95% ofthe Nyquist frequency.

In this section we have only considered the loss function including Ryi,yi−1 [0].However, as for the case M = 2, this can be generalized to a loss function includingRyi,yi−1 [l], l > 0, to get higher resolution around ∆t = 0.

4.4 Time Error Estimation Algorithm

In this section we will discuss how the time errors can be estimated using the theoryfrom the previous sections, but with some modifications to make the estimation

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144 Paper A Equalization of Time Errors in Time Interleaved ADC...

more practical. With a finite amount of data, the general time error loss functionis calculated as

VN,(L)t,R (∆t) =

L∑l=0

M−1∑i=1

i−1∑j=0

(R(N),(∆t)zi,zi−1

[l]−R(N),(∆t)zj ,zj−1

[l])2

(13)

where

RN,(∆t)zi,zj [l] =

1N

N∑k=1

{(z

(∆t)(imodM)

[k +

⌊ iM

⌋+ l]

− z(∆t)(jmodM)

[k +

⌊ jM

⌋])2}(14)

and z(∆t)[k] is calculated according to (5), (6) and (7). As we have proved in theprevious section, this loss function would have its global minimum at ∆t = ∆0

t if theinterpolation was linear in the time error parameters. However, the interpolationmethod described in Section 3 is not linear in the parameters, so the loss functionevaluation (13) is exactly valid only for ∆t = ∆0

t and is only approximately truefor ∆t 6= ∆0

t . However, interpolation is a continuous mapping in ∆t so it canlocally be considered as linear. Simulations show that there are local minima inthe loss function V

(N)t,R (∆t). A contour plot of V (N)

t,R (∆t) is shown in Figure 4.Here M = 4, but ∆t0 and ∆t2 are fixed to their true values to generate a two-dimensional plot. The input signal is here sinusoidal. We can see that there arelocal minima along a line, ∆t1 − ∆t3 = constant, in this figure. However, when∆t 6= ∆0

t in the interpolation, simulations show that the gain of the subsequencesof the interpolated signals are changed. Consider instead the loss function

V(N)t,σ (∆t) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆ti)

i [k])2 − (z(∆tj

)

j [k])2)2

. (15)

If we plot the same contour plot for this function, see Figure 5, we see that againthere are local minima along a line. But this line, ∆t1 + ∆t3 = constant, is per-pendicular to the line in Figure 4. This means that adding the two loss functions(13) and (15)

V(N)t (∆t) = V

(N)t,R (∆t) + V

(N)t,σ (∆t) (16)

eliminates the local minima, see Figure 6. This is just an example with a sinusoidalinput, but simulations of many different input signals with different frequency rangeand different values of M indicate that this loss function works for a wide range ofsignals.

The minimizing arguments of the loss function (16) gives the time error esti-mates. Since the minimizing argument cannot be calculated analytically, a nu-merical minimization algorithm is used. Further, the mismatch errors may change

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4 Time Error Estimation 145

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt,R

(∆t)

Figure 4 A contour plot of the time error loss function, V(N)t,R (∆t), with

M = 4 and sinusoidal input. ∆t0 and ∆t2 are fixed to their true values.

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt,σ(∆

t)

Figure 5 A contour plot of the time error loss function, V(N)t,σ (∆t), with

M = 4 and sinusoidal input. ∆t0 and ∆t2 are fixed to their true values.

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146 Paper A Equalization of Time Errors in Time Interleaved ADC...

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt(∆

t)

Figure 6 A contour plot of the time error loss function, V(N)t (∆t) =

V(N)t,R (∆t) + V

(N)t,σ (∆t), with M = 4 and sinusoidal input. ∆t0 and ∆t2

are fixed to their true values.

ADC0

ADC1

ADCM−1

uclock

y0

y1

yM−1

z(∆t)0

z(∆t)1

z(∆t)M−1

z(∆t)MUX

Time error estimation algorithm

delay, Ts

∆t

C

o

o

rr

ecti

n

∆t

Figure 7 Time interleaved ADC system with time errors. The time errors,∆t, are estimated by a blind adaptive algorithm and the signal is correctedby a filter.

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4 Time Error Estimation 147

slowly with for instance temperature and aging. Therefore the parameter estimatesshould be adaptively updated with new data. There are many minimization algo-rithms available with fast convergence, for instance Newton’s method [16]. How-ever, the fast converging methods are usually computationally demanding. There-fore a stochastic gradient search method is chosen here, which has a somewhatslower convergence rate than other methods, but is computationally very efficient.In a stochastic gradient minimization algorithm, the parameters are updated by astep in the negative gradient direction

∆(i+1)t = ∆(i)

t − µ∇V (∆(i)t )

The magnitude of the function Vt(∆(i)t ), may be very different depending on the

input signal. Therefore it is hard to choose the step length µ. A normalized versionof the stochastic gradient method can be used to make the choice of µ easier, forinstance

∆(i+1)t = ∆(i)

t − µ∇V (∆(i)

t )

max∣∣∇V (∆(i)

t )∣∣

To avoid taking too long steps, we can check that the loss function decreases forevery iteration, and otherwise backtrack the step size until it does [16]. The nextiteration is then started with doubled step length, so that the step length doesnot get unnecessarily small. To summarize, the adaptive equalization algorithm isgiven by

Algorithm A.1 (Interleaved ADC equalization)

Initialization:•Choose a batch size, N , for each iteration.

•Initialize the step lengths of the stochastic gradient algorithm, µt. If the orderof magnitude of the mismatch errors are known, this information can be usedfor the initialization.

•Initialize the parameter estimates

∆(0)ti = 0, i = 0, . . . ,M − 1

Adaptation:1.Collect a batch of N data from each ADC, yi[k], i = 0, . . . ,M − 1.

2.Calculate the reconstructed signals

z(∆

(j)t )

i [k], i = 0, . . . ,M − 1

according to (5), (6) and (7)

3.Calculate the gradient of the loss function, ∇V (N)t (∆(j)

t ). The gradients canbe calculated numerically by a finite difference approximation from the lossfunctions, or by analytically differentiating the loss function. The loss functionis defined in (16).

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148 Paper A Equalization of Time Errors in Time Interleaved ADC...

4.Update the parameter estimates

∆(j+1)t = ∆(j)

t − µt∇V (N)

t (∆(j)t )

max |∇V (N)t (∆(j)

t )|

5.If the loss function has increased since the last iteration

V(N)t (∆(j+1)

t ) > V(N)t (∆(j)

t )

backtrack the step size µt := µt/2 and change the parameter estimates in step4) until the loss function decreases. Otherwise double the step lengths for thenext iteration: µt := 2µt.

6.Return to step 1).

Figure 7 illustrates the operation of the adaptive equalization algorithm.

5 Conclusion

A time interleaved ADC system is a good option to significantly increase the sam-pling rate of A/D conversion. However, due to errors in the manufacturing process,the ADCs in the time interleaved system are not exactly identical. This means thatmismatch errors in time, gain and offset are introduced. The mismatch errors causedistortion in the sampled signal. Calibration of ADCs is time consuming and costly.Further, the mismatch errors may change slowly, with for instance temperature andaging. Therefore it is preferable to continuously estimate the mismatch errors whilethe ADC is used.

In this paper, we have studied the time errors in a time interleaved ADC sys-tem. We have presented a method for estimation and compensation of the timemismatch errors. As opposed to other methods for estimation of time errors, thisestimation method is blind, so that it does not require any special calibration signalor measurement of the input signal. It only requires that the input signal is bandlimited to the Nyquist frequency of the complete ADC system. The method is alsoadaptive, so the estimates are updated if the mismatch errors change slowly. Thetime error estimates that the estimation method generates are unbiased, so thatthe estimation accuracy can be made arbitrarily good by increasing the amount ofestimation data.

This is the first paper in a series of two paper. In the accompanying paper[9], examples and simulations of the time error estimation algorithm are given.The simulation results are here also compared to the Cramer-Rao bound. Theestimation algorithm is also verified on measured data.

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A Dual ADC system 149

A Dual ADC system

Proof of Lemma 2:

Ru(Ts −∆t)−Ru(Ts + ∆t)

=1

∫ ∞−∞

Φu(ω)ejω(Ts−∆t)dω − 12π

∫ ∞−∞

Φu(ω)ejω(Ts+∆t)dω

=1

∫ ωc

−ωcΦu(ω)ejωTs(e−jω∆t − ejω∆t)dω

= − jπ

∫ ωc

−ωcΦu(ω) cos(ωTs) sin(ω∆t)dω +

∫ ωc

−ωcΦu(ω) sin(ωTs) sin(ω∆t)dω

• Consider the first term: Φu(ω) and cos(ωTs) are even functions with respectto ω, while sin(ω∆t) is odd ⇒∫ ωc

−ωcΦu(ω) cos(ωTs) sin(ω∆t)dω = 0

• Now consider the second term:

0 < Ts <π

ωcand 0 < ω < ωc ⇒ 0 < ωTs < π ⇒ sin(ωTs) > 0,

0 < ∆t < Ts ⇒ sin(ω∆t) > 0.

− π

ωc< Ts < 0 and 0 < ω < ωc ⇒ −π < ωTs < 0⇒ sin(ωTs) < 0,

0 < ∆t < Ts ⇒ sin(ω∆t) < 0.

These two statements and Φu(ω) > 0 give∫ ωc

−ωcΦu(ω) sin(ωTs) sin(ω∆t)dω > 0

⇒ Ru(Ts −∆t) > Ru(Ts + ∆t)

unless Φu(ω) = aδ(ω). But that would imply that u(t) must be constant.

Proof of Theorem 4: According to the proof of Theorem 3, we have

V (∆t) =(Ru(Ts −∆t)−Ru(Ts + ∆t)

)2Due to the symmetry in ∆t, it is sufficient to show that

V (∆(2)t ) > V (∆(1)

t ) forTs2> ∆(2)

t > ∆(1)t ≥ 0

Since Ru(Ts − ∆t) > Ru(Ts + ∆t) according to Lemma 2, we can instead provethat

Ru(Ts −∆(2)t )−Ru(Ts + ∆(2)

t ) > Ru(Ts −∆(1)t )−Ru(Ts + ∆(1)

t )

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150 Paper A Equalization of Time Errors in Time Interleaved ADC...

We have from the proof of Lemma 2 that

Ru(Ts −∆(2)t )−Ru(Ts + ∆(2)

t )− (Ru(Ts −∆(1)t )−Ru(Ts + ∆(1)

t ))

=1π

∫ ωc

−ωcΦu(ω) sin(ωTs)(sin(ω∆(2)

t )− sin(ω∆(1)t ))dω

• Ts2 > ∆(2)

t > ∆(1)t ≥ 0⇒ sin(ω∆(2)

t ) > sin(ω∆(1)t ) if 0 < ω < ωc

• The same motivation as in Lemma 2 gives that the above expression is positive,i.e.,

V (∆(2)t ) > V (∆(1)

t )

Proof of Theorem 5:(i):

V (l)(0) = 0, ∀l⇒ V (∞)(0) = 0

(ii):

V (0)(∆t) > 0 if ∆t 6= 0 (17)

together with

V (l)(∆t) ≥ 0∀l (18)

gives

V (∞)(∆t) > 0 if ∆t 6= 0 (19)

Proof of Theorem 6:

V (∞)(∆t) =∞∑l=0

{Ru((2l + 1)Ts −∆t) − Ru((2l + 1)Ts + ∆t)}2

= − 1π2

∞∑l=0

{∫ ωc

−ωcΦu(ω)ej(2l+1)ωTs sin(ω∆t)

}2

= − 1π2

∫ ωc

−ωc

∫ ωc

−ωcΦu(ω)Φu(γ) sin(ω∆t) sin(γ∆t)

∞∑l=0

{ej(2l+1)Tsωej(2l+1)Tsγ

}dωdγ

= − 1π2

∫ ωc

−ωc

∫ ωc

−ωcΦu(ω)Φu(γ) sin(ω∆t) sin(γ∆t) ·

∞∑n=−∞

{(−1)nδ(ω + γ + n

π

Ts)}dωdγ

=2π2

∫ ωc

0

{Φ2u(ω) sin2(ω∆t)

+ Φu(ω)Φu(π

Ts− ω) sin(ω∆t) sin((

π

Ts− ω)∆t)

}dω > 0

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A Dual ADC system 151

• First, note that V (∞)t (∆t) is symmetric around ∆t = 0 so we only have to

consider the case 0 < ∆(1)t < ∆(2)

t < Ts2 .

• Next, differentiate V (∞)(∆t) with respect to ∆t

dV (∞)(∆t)d∆t

=2π2

∫ ωc

0

{2Φ2

u(ω) sin(ω∆t) cos(ω∆t)ω

+ Φu(ω)Φu(π

Ts− ω) cos(ω∆t) sin((

π

Ts− ω)∆t)ω (20)

+ Φu(ω)Φu(π

Ts− ω) sin(ω∆t) cos((

π

Ts− ω)∆t)(

π

Ts− ω)

}dω

• Each term in (20) is strictly positive except for Φu(ω) = δ(ω)⇒ The derivativeis strictly positive for 0 < ∆t <

Ts2 , which concludes the proof.

Proof of Theorem 7:(i):

V (l)(0) = 0, ∀l⇒ V (∞)(0) = 0

(ii):

V (0)(∆t) > 0 if ∆t 6= 0 (21)

together with

V (l)(∆t) ≥ 0∀l (22)

gives

V (∞)(∆t) > 0 if ∆t 6= 0 (23)

Proof of Theorem 8:

V (∞)(∆t) =

limL→∞

1L

L∑l=0

{I∑i=1

αi sin((2l + 1)ωiTs) sin(ωi∆t)

+j∫ ωc

−ωcΦu(ω)ej(2l+1)ωTs sin(ω∆t)dω

}2

=I∑i=1

I∑k=1

αiαk sin(ωi∆t) sin(ωk∆t) limL→∞

1L

L∑l=0

sin((2l + 1)ωiTs) sin((2l + 1)ωkTs)

(24)

−∫ ωc

−ωc

∫ ωc

−ωcΦu(ω)Φu(γ) sin(ω∆t) sin(γ∆t)) lim

L→∞

1L

L∑l=0

ej(2l+1)ωTsej(2l+1)γTsdωdγ

(25)

+ 2jI∑i=1

∫ ωc

−ωcαiΦu(ω) sin(ωi∆t) sin(ω∆t) lim

L→∞

1L

L∑l=0

ej(2l+1)γTs sin((2l + 1)ωiTs)dω

(26)

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152 Paper A Equalization of Time Errors in Time Interleaved ADC...

Next, we will evaluate each of the three terms above separately:

Term (24):

limL→∞

1L

L∑l=0

sin((2l + 1)ωiTs) sin((2l + 1)ωkTs) =

12 if ωi = ωk12 if ωi + ωk = π

Ts0 otherwise

I∑i=1

I∑k=1

αiαk sin(ωi∆t) sin(ωk∆t) limL→∞

1L

L∑l=0

sin((2l + 1)ωiTs) sin((2l + 1)ωkTs)

=12

I∑i=1

α2i sin2(ωi∆t) +

12

∑{i,k:ωi+ωk= π

Ts}αiαk sin(ωi∆t) sin(ωk∆t)

Term (25):

limL→∞

1L

L∑l=0

ej(2l+1)ωTsej(2l+1)γTs =

1 if ω = γ−1 if ω + γ = ± π

Ts0 otherwise

∫ ωc

−ωc

∫ ωc

−ωcΦu(ω)Φu(γ) sin(ω∆t) sin(γ∆t) lim

L→∞

1L

L∑l=0

ej(2l+1)ωTsej(2l+1)γTsdωdγ = 0

Term (26):

limL→∞

1L

L∑l=0

ej(2l+1)γTs sin((2l + 1)ωiTs) =

12j if ωi + γ = 0− 1

2j if ωi + γ = πTs

− 12j if − ωi + γ = 0

12j if − ωi + γ = − π

Ts

0 otherwise

2jI∑i=1

∫ ωc

−ωcαiΦu(ω) sin(ωi∆t) sin(ω∆t) lim

L→∞

1L

L∑l=0

ej(2l+1)γTs sin((2l + 1)ωiTs)dω

= 0

That is, only the first term is non zero and we get

V (∞)(∆t) =12

I∑i=1

α2i sin2(ωi∆t)

+12

∑{i,k:ωi+ωk= π

Ts}αiαk sin(ωi∆t) sin(ωk∆t)

• First, note that V (∞)(∆t) is symmetric around ∆t = 0, so we only have toconsider the case 0 < ∆(1)

t < ∆(2)t < Ts

2

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B General interleaved ADC system 153

• Next, differentiate V (∞)(∆t)

dV (∞)(∆t)d∆t

=I∑i=1

α2i sin(ωi∆t) cos(ωi∆t)ωi

+∑

{i,k:ωi+ωk= πTs}αiαk sin(ωi∆t) cos(ωk∆t)ωk > 0

• The positive derivative together with the symmetry in ∆t concludes the proof.

B General interleaved ADC system

Proof of Lemma 9:

Ru(τ) =1

∫ ωc

−ωcΦu(ω)ejωτ ⇒

R′u(τ) =1

∫ ωc

−ωcjωΦu(ω)ejωτ = − 1

∫ ωc

−ωcΦu(ω)ω sin(ωτ) < 0

when

ωcτ < π.

Proof of Theorem 10: Similar calculations to the proof of Theorem 3 gives

V (∆t) =M−1∑i=1

i−1∑j=0

[Ru(Ts + ∆ti −∆ti−1)−Ru(Ts + ∆tj −∆tj−1 modM )]2

We can clearly see that V (0) = 0 from the modulo M quasi-stationary property.From here on in the proof, we introduce the notation γi = ∆ti − ∆ti−1 modM tosimplify notation. Since we have the constraint ∆t0 = 0, this is a one-to-onemapping. In order to get V (∆t) = 0 all terms in the sum (12) must be zero, whichrequires

Ru(Ts + γi) = Ru(Ts + γj), i, j = 0, . . . ,M − 1 (27)

We have that

M−1∑i=0

γi =M−1∑i=0

(∆ti −∆ti−1 modM ) = 0. (28)

which means that, if we want to find a solution other than

γi = 0, i = 0, . . . ,M − 1

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154 Paper A Equalization of Time Errors in Time Interleaved ADC...

at least one of the γi’s must be negative and we can assume

γi = −γ(1) < 0

for some i and a positive constant γ(1). From Lemma 9 we have that if γj < 0, j 6= ithen γj = γi if (27) should be fulfilled. Further, we have with a slight modificationof Lemma 2 that if γj > 0 and Ts < α π

ωcthen

γj > 2Ts(1α− 1) + γ(1) (29)

in order to fulfill (27). Equation (29) together with (28) gives that at least half ofthe γis must be smaller than zero. The ordering is here irrelevant so we can assumethat

γk = −γ(1) < 0, k = 0, . . . ,M

2+ 1 + n (30)

where

0 ≤ n ≤ M

2− 2

this means that the rest of the γks must be larger than zero and we have

γk > 2Ts(1α− 1) + γ(1), k =

M

2+ 2 + n, . . . ,M

The worst case, that gives the closest bounds on the sampling interval, is that allγk > 0 are equal so we can assume

γk = γ(2) > 2Ts(1α− 1) + γ(1), k =

M

2+ 2 + n, . . . ,M (31)

where γ(2) is a positive constant. To summarize these requirements we have from(28), (29), (30) and (31):

γ(2) =M/2 + 1 + n

M/2− 1− nγ(1) (32)

γ(2) > 2Ts(1α− 1) + γ(1) (33)

γ(1) < βTs, γ(2) < βTs (34)

Putting (32) into (33) gives

γ(1) >Ts(1/α− 1)(M/2− 1− n)

1 + n(35)

Putting (32) into (34) gives

M/2 + 1 + n

M/2− 1− nγ(1) < βTs (36)

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References 155

Combining (35) and (36) gives

β > (1α− 1)

M/2 + 1 + n

1 + n≥ (

1α− 1)

2M − 2M − 2

α >1

1 + β M−22M−2

This means that in order to guarantee that V (∆t) > 0, ∆t 6= 0 we have to require

α ≤ 11 + β M−2

2M−2

<1

1 + β/2

i.e.,

Ts <1

1 + β/2π

ωc

which concludes the proof.

References

[1] W. Black and D. Hodges, “Time interleaved converter arrays,” IEEE Journalof Solid-State Circuits, vol. SC-15, no. 6, pp. 1022–1029, December 1980.

[2] Y.-C. Jenq, “Digital spectra of nonuniformly sampled signals: A robust sam-pling time offset estimation algorithm for ultra high-speed waveform digitizersusing interleaving,” IEEE Transactions on Instrumentation and Measurement,vol. 39, no. 1, pp. 71–75, February 1990.

[3] N. Kurosawa, K. Maruyama, H. Kobayashi, H. Sugawara, and K. Kobayashi,“Explicit formula for channel mismatch effects in time-interleaved ADC sys-tems,” in Proc. IMTC, vol. 2, 2000, pp. 763–768.

[4] J. Corcoran, “Timing and amplitude error estimation for time-interleavedanalog-to-digital converters,” October 1992, US Patent nr. 5,294,926.

[5] H. Jin and E. Lee, “A digital-background calibration technique for minimizingtiming-error effects in time-interleaved ADC’s,” IEEE Transactions on Cicuitsand Systems, vol. 47, no. 7, pp. 603–613, July 2000.

[6] J. Elbornsson and J.-E. Eklund, “Blind estimation of timing errors in in-terleaved AD converters,” in Proc. ICASSP 2001, vol. 6. IEEE, 2001, pp.3913–3916.

[7] J. Elbornsson, K. Folkesson, and J.-E. Eklund, “Measurement verification ofestimation method for time errors in a time-interleaved A/D converter sys-tem,” in Proc. ISCAS 2002. IEEE, 2002.

[8] J.-E. Eklund and F. Gustafsson, “Digital offset compensation of time-interleaved ADC using random chopper sampling,” in IEEE InternationalSymposium on Circuits and Systems, vol. 3, 2000, pp. 447–450.

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156 References

[9] J. Elbornsson, F. Gustafsson, and J.-E. Eklund, “Blind adaptive equalizationof mismatch errors in time interleaved A/D converter system,” 2003, submittedto IEEE Transactions on Circuits and Systems.

[10] ——, “Equalization of time errors in time interleaved ADC system –Part II:Analysis and examples,” 2003, to be submitted to IEEE Transactions on SignalProcessing.

[11] L. Ljung, System Identification, Theory for the user, 2nd ed. Prentice-Hall,1999.

[12] M. Unser, “Splines –a perfect fit for signal and image processing,” IEEE SignalProcessing Magazine, pp. 22–38, November 1999.

[13] P. Lowenborg, “Asymmetric filter banks for mitigation of mismatch errorsin high-speed analog-to-digital converters,” Phd thesis 787, Department ofElectrical Engineering, Linkoping University, Linkoping, Sweden, December2002.

[14] A. Papoulis, Signal Analysis. McGraw-Hill, 1977.

[15] M. Hayes, Statistical digital signal processing and modeling. Wiley, 1996.

[16] J. Dennis and R. Schnabel, Numerical Methods for Unconstrained Optimiza-tion and Nonlinear Equations. Prentice-Hall, 1983.

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B

Equalization of Time Errorsin Time Interleaved ADC

System – Part II: Analysisand Examples

Authors: Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund

Edited version of paper submitted to IEEE Transactions on Signal Processing.

Preliminary version published as Technical Report LiTH-ISY-R-2495, Departmentof Electrical Engineering, Linkopings universitet, Linkoping, Sweden.

157

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Equalization of Time Errors in a TimeInterleaved ADC System – Part II:

Analysis and Examples

Jonas Elbornsson, Fredrik Gustafsson Jan-Erik Eklund

Department of Electrical Engineering, Infineon TechnologiesLinkopings universitet, Wireless Solutions Sweden AB.

SE-581 83 Linkoping, [email protected], [email protected] [email protected]

Abstract

In [1] a method for blind (i.e., no calibration needed) estimation and com-pensation of the time errors in a time interleaved ADC system was pre-sented. In this paper we evaluate this method. The Cramer-Rao bound iscalculated, both for additive noise and random clock jitter. Monte-Carlosimulations have also been done to compare to the CRB. Finally, the esti-mation method is validated on measurements from a real time interleavedADC system with 16 ADCs.

keywords: A/D conversion, nonuniform sampling, equalization, estima-tion

1 Introduction

This is the second part in a series of two articles describing a method to estimatetime errors in a time interleaved A/D converter (ADC) system. In this part we willcalculate the Cramer-Rao bound (CRB) for the time error estimates and compareit to simulations. We will also present some measurement results. But first wewill describe the time interleaved ADC system and briefly review the time errorestimation method presented in [1].

Time interleaved ADCs [2, 3] can be used to increase the sample rate, seeFigure 1. The time interleaved ADC system works as follows:• The input signal is connected to all the ADCs.• Each ADC works with a sampling interval of MTs, where M is the number of

ADCs in the array and Ts is the desired sampling interval.

159

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160 Paper B Equalization of Time Errors in Time Interleaved ADC...

• The clock signal to the ith ADC is delayed with iTs. This gives an overallsampling interval of Ts.

Due to the manufacturing process, all the ADCs in the time interleaved array arenot identical. This means that mismatch errors will occur in the system. Threekinds of mismatch errors will occur: time errors, amplitude offset errors and gainerrors. These errors are static or slowly time varying. This means here that theerrors can be assumed to be constant for the same ADC from one cycle to the nextover an interval of some million samples.

With a sinusoidal input, the mismatch errors can be seen in the output spectrumas non harmonic distortion. With input signal frequency ω0, the gain and timeerrors cause distortion at the frequencies i

M ωs ± ω0, i = 1, . . . ,M − 1, where ωsis the sampling frequency. The offset errors cause distortion at the frequenciesiM ωs, i = 1, . . . ,M − 1 An example of an output spectrum from an interleavedADC system with four ADCs with sinusoidal input signal is shown in Figure 2.This distortion causes problems for instance in a radio receiver where a weak carriercannot be distinguished from the mismatch distortion from a strong carrier. It istherefore important to remove the mismatch errors. A method for blind (i.e., nocalibration signal is needed) adaptive estimation of the time errors is presented in[1].

Apart from the static errors listed before, there are also random errors due to

delay, Ts

sampling

ADC0

ADC1

ADC2

ADCM−1

uclock

y0

y1

y2

yM−1

y

MUX

Figure 1 A time interleaved ADC system. M parallel ADCs are usedwith the same master clock. The clock is delayed by the nominal samplinginterval to each ADC. The outputs are then multiplexed together to form asignal sampled M times faster than the output from each ADC.

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2 Notation and Definitions 161

for instance thermal noise and quantization, which are different from one sample tothe next. These errors do not have anything to do with the parallel structure of theADC and are impossible to estimate because of their random behavior. However,the random errors are important to study for the robustness of the estimationalgorithm, and to calculate lower bounds on the estimation accuracy. The randomerrors in an A/D converter that are discussed in this paper are• Quantization noise

This is a deterministic error, if the input signal is known. However, for mostsignals it can be treated as additive white noise uncorrelated with the inputsignal and with uniform distribution [4].• Random jitter

Due to noise in the clock signal there is a random error on the sampling in-stances [5]. These errors can be treated as Gaussian white noise on the sam-pling instances.

2 Notation and Definitions

We will in this section introduce the notation that will be used in this paper. Thenominal sampling interval, that we would have without time errors, is denoted Ts.M denotes the number of ADCs in the time interleaved array, which means thatthe sampling interval for each ADC is MTs. The time error parameters are denoted∆ti , i = 0, . . . ,M − 1. The estimates of these errors are denoted ∆ti , and the trueerrors are denoted ∆0

ti . The vector notation ∆t = [∆t0 · · ·∆tM−1 ] is used for allthe time error parameters. We use the following notation for the signals involved:• u(t) is the analog input signal.• u[k] denotes an artificial signal, sampled without mismatch errors.• ui[k], i = 0, . . . ,M − 1 denotes the M subsequences of u[k],

ui[k] = u[kM + i]. (1)

• yi[k] i = 0, . . . ,M−1 are the output subsequences from the M A/D converters,sampled with time errors.

yi[k] = u((kM + i)Ts + ∆0

ti + ejitteri [k])

+ ei[k] (2)

Here ejitteri [k] is the random jitter and ei[k] is quantization noise.• y[k] is the multiplexed output signal from all the ADCs,

y[k] = y(kmodM)

[⌊k

M

⌋],

where b·c denotes integer part.• z(∆t)[k] denote the output signal, y[k], reconstructed with the error parameters,

∆t.

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162 Paper B Equalization of Time Errors in Time Interleaved ADC...

• z(∆t)i [k] are the subsequences of z(∆t)[k]

How the reconstructed signal z(∆t)[k] is calculated is described in [1]. We assumethroughout this paper that u(t) is band limited to the Nyquist frequency of thecomplete ADC system.

We will next define two concepts for measuring the performance of an ADC.Assume that the output y[k] of an ADC consists of a signal part s[k], a distortionpart d[k], and a noise part e[k]

y[k] = s[k] + d[k] + e[k]

Then the SNDR (Signal to Noise and Distortion Ratio) is defined as

SNDR = 10 log10

(E{s2[k]}

E{d2[k]}+ E{e2[k]}

)(3)

The SFDR (Spurious Free Dynamic Range) is defined for a sinusoidal input signalas the distance between the signal component in the spectrum and the strongestdistortion component, measured in dB, see Figure 2.

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

SFDR

Normalized frequency

dB

SFDR definition

Figure 2 Spectrum of output signal from a time interleaved ADC systemwith mismatch errors. The definition of the SFDR is also indicated.

3 Time Error Estimation

We will in this section briefly review the time error estimation method presentedin [1].

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3 Time Error Estimation 163

The time errors are estimated by minimization of the loss function

VN,(L)t (∆t) =

L∑l=0

M−1∑i=1

i−1∑j=0

(R(N),(∆t)zi,zi−1

[l]−R(N),(∆t)zj ,zj−1

[l])2

+M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆ti)

i [k])2 − (z(∆tj

)

j [k])2)2

(4)

where

RN,(∆t)zi,zj [l] =

1N

N∑k=1

{(z

(∆t)(imodM)

[k +

⌊ iM

⌋+ l]− z(∆t)

(jmodM)

[k +

⌊ jM

⌋])2}(5)

and z(∆t)[k] is the output signal reconstructed with the time error parameters ∆t.The estimation algorithm is summarized below. The algorithm is described in moredetail in [1].

Algorithm B.1 (Interleaved ADC equalization)

Initialization: Here various parameters are initialized.Adaptation:

1.Collect a batch of N data from each ADC, yi[k], i = 0, . . . ,M − 1.

2.Calculate the reconstructed signals:

z(∆

(j)t )

i [k], i = 0, . . . ,M − 1

3.Calculate the gradient of the loss function, ∇V (N)t (∆(j)

t ), as defined in (4).

4.Update the parameter estimates

∆(j+1)t = ∆(j)

t − µt∇V (N)

t (∆(j)t )

max |∇V (N)t (∆(j)

t )|

5.If the loss function has increased since the last iteration

V(N)t (∆(j+1)

t ) > V(N)t (∆(j)

t )

backtrack the step size µt := µt/2 and change the parameter estimates in step4) until the loss function decreases. Otherwise double the step size for the nextiteration: µt := 2µt.

6.Return to step 1).

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164 Paper B Equalization of Time Errors in Time Interleaved ADC...

4 Cramer-Rao Bound

The Cramer-Rao bound (CRB) is a lower bound on the variance of the estimatedparameters for a given amount of data [6], independent of the estimation algorithmused. Comparing simulations with the CRB gives a measure of how good theestimation algorithm is. The CRB is here calculated assuming known input, whichmeans that a blind estimation algorithm never can reach the CRB. But it still givesa good hint of the estimation performance. We will first calculate the CRB for ageneral input signal assuming only additive noise on the signal. With stochasticjitter we cannot calculate a general expression for the CRB, but we will calculatethe CRB for some special input signals.

4.1 CRB for additive noise

Assuming only additive noise, the output signal subsequences are

y0[k] = u(MkTs) + e0[k]

yi[k] = u((Mk + i)Ts + ∆0ti) + ei[k], i = 1, . . . ,M − 1

The noise is here assumed to be white Gaussian

ei[k] ∈ N(0, σe)

despite that uniformly distributed noise is a better model of the quantization noise.However, Gaussian noise simplifies the calculations of the CRB and simulationsshow that, with the same noise variance, the estimation accuracy is approximatelythe same for Gaussian and uniform noise. The parameterized signal model is

y0[k] = u(MkTs)yi[k] = u((Mk + i)Ts + ∆ti), i = 1, . . . ,M − 1

The negative log-likelihood function [6] is then calculated by taking the logarithmof the probability density function of the noise.

− limN→∞

log fe(∆t, yN ) = lim

N→∞

1N

12σ2

eM

M−1∑i=0

N∑k=1

{yi[k]− yi[k]

}2

=1

2σ2eM

M−1∑i=0

{(2σ2

u + σ2e)− 2Ru(∆0

ti −∆ti)}

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4 Cramer-Rao Bound 165

Differentiating the log-likelihood function twice with respect to the error parame-ters gives

d2

d∆2(− lim

N→∞log fe(∆t, y

N ))

=1

2σ2eM

−2

d2Ru(∆0t1−∆t1 )

(d∆t1 )2 · · · 0...

. . ....

0 · · · −2d2Ru(∆0

tM−1−∆tM−1 )

(d∆tM−1 )2

(6)

Evaluating (6) at ∆t = ∆0t gives the Fisher information matrix,

F = − 1Mσ2

e

R′′u(0)I(M−1)×(M−1) (7)

The Fisher information matrix gives a lower bound on the covariance of the pa-rameter estimates. If the parameters are estimated from N samples per ADC, theCramer-Rao bound is

Cov(∆t) ≥1

MNF−1 (8)

Putting (7) into (8) we get

Var(∆ti) ≥σ2e

NR′′u(0)(9)

We can see from (9) that the CRB for the time error depends on the input signal.We will next evaluate the CRB for a few signal examples.• Sinusoidal input: In radio applications a single modulated sinusoidal carrier

is often used. Here we discard the modulation and calculate the CRB for asinusoidal signal.

u(t) =√

2 sin(ωt)

The covariance function is here

Ru(τ) = cos(ωτ)

which gives the Cramer-Rao bound

Var(∆ti) ≥σ2e

Nω2

• Multisine input: In DSL modems and OFDM radio communications, a sumof several sinusoidal carriers are used. Here we calculate the CRB for a multi-sine input signal.

u(t) =L∑i=1

αi sin(ωit)

12

L∑i=1

α2i = 1

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166 Paper B Equalization of Time Errors in Time Interleaved ADC...

The covariance function is

Ru(τ) =L∑i=1

α2i

2cos(ωiτ)

which gives the Cramer-Rao bound

Var(∆ti) ≥2σ2

e

N∑Li=1 α

2iω

2i

• Band limited white noise input:Here the input is a stochastic process with spectrum

Φu(ω) ={ π

ωmax(1−α) αωmax ≤ |ω| ≤ ωmax0 otherwise

(10)

This gives the covariance function

Ru(τ) =sin(ωmaxτ)− sin(αωmaxτ)

(1− α)ωmaxτ

which gives the Cramer-Rao bound

Var(∆ti) ≥3σ2

e

N(α2 + α+ 1)ω2max

We can make a few remarks about the examples above.• When α→ 1 in (10) we get the same variance for the band limited white noise

input as for the sinusoidal input.• For low pass filtered white noise, i.e., α = 0 we get

Var(∆t) ≥3σ2

e

Nω2max

That is, the parameter variance is 3 times larger than with a sinusoidal inputsignal.• With equal spacing, over an interval, between the frequencies in the multisine

case,

ωi =i

Lωmax, i = L′, . . . , L

we get the Cramer-Rao bound

Var(∆t) ≥σ2e(L− L′ + 1)L2

Nω2maxf(L,L′)

f(L,L′) =13

((L+ 1)3 − L′3)− 12

((L+ 1)2 − L′2) +16

(L+ 1− L′)

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4 Cramer-Rao Bound 167

If we have

L′ = bαLc0 ≤ α ≤ 1

and let L→∞ we get the same result as for the band limited noise case

Var(∆t) ≥3σ2

e

N(α2 + α+ 1)ω2max

The convergence is quite fast, for instance with 16 tones, L = 16, L′ = 1, weget

Var(∆t) ≥2.75σ2

e

Nω2max

This means that the CRB for band limited white noise input is a good approx-imation for most multitone signals.

Optimal input signal

Usually we cannot choose the input signal since the estimation should work withouta special calibration signal. But it is still interesting to investigate what input signalgives the lowest CRB. For a general input signal we have the CRB for the timeerror parameter from (9) as

Var(∆t) ≥ −σ2e

NR′′u(0)

To find the optimal input signal from a time error estimation point, we shouldmaximize −R′′u(0) over all signals u(t), band limited to π

Ts. We have, for a band

limited signal u(t), that

Ru(τ) =1

∫ π/Ts

−π/TsΦu(ω)eiωτdω

This gives

R′′u(τ) = − 12π

∫ π/Ts

−π/Tsω2Φu(ω)eiωτdω

and to minimize the variance bound we should maximize

maxΦu(ω)

12π

∫ π/Ts

−π/Tsω2Φu(ω)dω

subject to1

∫ π/Ts

−π/TsΦu(ω)dω = 1

and Φu(ω) = 0, ω ≥ π

Ts

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168 Paper B Equalization of Time Errors in Time Interleaved ADC...

Since Φu(ω) = 0, ω ≥ πTs

we cannot allow the solution

Φu(ω) = π(δ(ω − π

Ts) + δ(ω +

π

Ts))

But as ω0 → πTs

, the spectrum

Φu(ω) = π(δ(ω − ω0) + δ(ω + ω0))

tends to the optimal solution. This means that the best input signal is a sinusoidclose to the Nyquist frequency.

4.2 CRB for noise and jitter

Here we will evaluate the CRB with both noise and stochastic jitter present. Theoutput signal subsequences are now

y0[k] = u(kMTs + ejitter0 [k]) + e0[k]

yi[k] = u((kM + i)Ts + ∆0ti + ejitteri [k]) + ei[k], i = 1, . . . ,M − 1 (11)

We assume that both the noise and the random jitter are Gaussian distributed

ei[k] ∈ N(0, σe)

ejitteri [k] ∈ N(0, σjitter)

Here we cannot, in general, assume that the output signal at a certain time instanceis Gaussian distributed. But if we take a sum over many samples we have, accordingto the central limit theorem [7], that

y =1

NM

N−1∑k=0

M−1∑i=0

yi[k] (12)

is Gaussian distributed. If we assume that y[k] is modulo M quasistationary withrespect to g(ui) = ui [1] the mean value of ε(∆t, y

N ) is zero, independent of theinput signal shape. However, the variance depends on what input signal we have.We will therefore in the following consider a few special cases.

Sinusoidal input

Again we assume that the input signal is normalized to have power equal to one.

u(t) =√

2 sin(ω0t)

Assuming that the random jitter and the quantization noise are independent, wehave the variance of the output signal as

Var(y) =2

NM

N−1∑k=0

M−1∑i=0

{Var[sin(ω0((Mk + i)Ts + ∆0

ti + ejitteri [k]))]

+ Var(ei[k])}

(13)

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4 Cramer-Rao Bound 169

The last term in (13) is known Var(ei[k]) = σ2e , but we have to calculate the first

term, i.e., we need to calculate the variance

Var[sin(x+ Z)

]where x is a constant and

Z ∈ N(0, σ)

First, we calculate the expectation

E[sin(x+ Z)

]=∫ ∞−∞

sin(x+ z)1

σ√

2πe−

z2

2σ2 dz = sin(x)e−σ22

From this we can calculate the variance

Var[sin(x+ Z)

]= E

[sin2(x+ Z)

]− sin2(x)e−σ

2

=12− 1

2E[cos(2(x+ Z))

]− sin2(x)e−σ

2

=12− 1

2cos(2x)e−2σ2 − sin2(x)e−σ

2

which gives that the mean output signal variance is

Var(y) =12

(1− e−ω0σ2jitter )

and the error signal

ε(∆t, yN ) =

N−1∑k=0

M−1∑i=0

(√

2 sin(ω0((Mk + i)Ts + ∆0ti + ejitteri [k]))

+ ei[k]−√

2 sin(ω0((Mk + i)Ts + ∆ti))e−σ2

jitter/2

is then Gaussian distributed under ∆t = ∆0t

ε(∆t, yN ) ∈ N(0,

√MN(1− e−ω2

0σ2jitter + σ2

e))

From this we can calculate the negative log-likelihood function

− log fε(∆t, yN ) =

1

2MN(1− e−ω20σ

2jitter + σ2

e)·

N−1∑k=0

M−1∑i=0

(√

2 sin(ω0((Mk + i)Ts + ∆0ti + ejitteri [k]))

+ ei[k]−√

2 sin(ω0((Mk + i)Ts + ∆ti))e−σ2

jitter/2

=1

2(1− e−ω20σ

2jitter + σ2

e)((1 + e−ω

20σ

2jitter/2) + σ2

e

− 1M

M−1∑i=0

2 cos(ω0(∆0i −∆i))e−ω

20σ

2jitter )

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170 Paper B Equalization of Time Errors in Time Interleaved ADC...

Differentiating the negative log-likelihood function twice with respect to the timeerror parameters gives

d2(− log fε(∆t, yN ))

d∆2t

=1

1− e−ω20σ

2jitter + σ2

e

(−ω20 cos(ω0(∆0

i −∆i))e−ω20σ

2jitter )

(14)

Evaluating (14) at ∆t = ∆0t gives the Fisher information matrix

Ft =e−ω

20σ

2jitterω2

0

M(1− e−ω20σ

2jitter + σ2

e)I(M−1)×(M−1) (15)

From this we can calculate a lower bound on the variance of the parameter estimates

Var(∆ti) ≥1− e−ω2

0σ2jitter + σ2

e

Ne−ω20σ

2jitterω2

0

(16)

With a first order Taylor expansion of (16) we get

Var(∆ti) &σ2jitter

N+

σ2e

Nω20

(17)

i.e., the jitter gives an additional term to the CRB depending only on the jitternoise variance and the number of estimation data.

Multisine input

With a multisine input signal

u(t) =L∑i=1

αi sin(ωit)

12

L∑i=1

α2i = 1

we get, with similar calculations as for the sinusoidal case that the error signal

ε(∆t, yN ) =

N−1∑k=0

M−1∑i=0

(L∑l=1

αl sin(ωl((Mk + i)Ts + ∆0ti + ejitteri [k]))

+ ei[k]−L∑l=1

sin(ωl((Mk + i)Ts + ∆ti))e−σ2

jitter/2

is Gaussian distributed under ∆t = ∆0t

ε(∆t, yN ) ∈ N

(0,

√√√√MN(12

L∑i=1

α2i (1− e−ω

2i σ

2jitter) + σ2

e))

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5 Simulations 171

From this we can calculate the negative log-likelihood function

− log fε(∆t, yN ) =

1

2( 12

∑Li=1 α

2i (1− e−ω

2i σ

2jitter) + σ2

e)·

(12

L∑i=1

α2i (1 + e−ω

2i σ

2jitter ) + σ2

e −1M

M−1∑i=0

L∑l=1

α2l cos(ωl(∆0

i −∆i))e−ω2l σ

2jitter)

Differentiating this function twice and evaluating at ∆t = ∆0t gives the Fisher

information matrix

Ft =∑Ll=1 α

2l e−ω2

l σ2jitterω2

l

2M( 12

∑Ll=1 α

2l (1− e

−ω2l σ

2jitter) + σ2

e)I(M−1)×(M−1) (18)

From (18) the CRB for a multisine input signal can be calculated

Var(∆ti) ≥12

∑Ll=1 α

2l (1− e−ω

2l σ

2jitter) + σ2

e

N 12

∑Ll=1 α

2l ω

2l e−ω2

l σ2jitter

≈σ2jitter

N+

2σ2e

N∑Ll=1 α

2l ω

2l

(19)

Again the jitter gives an additional term to the CRB. The contribution from thejitter to the CRB is independent of the number of tones and hence the same as forthe single sinusoidal case (17).

5 Simulations

To evaluate the performance of the time error estimation method, a time interleavedADC system has been simulated. In Figure 3 the spectrum of the output signalis shown before and after correction with estimated time errors. Here the inputsignal is a single sinusoid. We can see here that, after correction, the time errorscan not be seen above the noise floor. The convergence rate is different for differentinput signals and different number of ADCs, but usually the parameters convergein about 10 − 50 iterations. In Figure 4 an example of the convergence of thetime error estimates is shown. The simulation is here done with four ADCs andsinusoidal input. The amount of data is here 214 samples per batch. One iterationwas done on each batch. In this example the parameters converge in about 20iterations.

To compare the estimation accuracy with the CRB the minimization has beendone on one batch of data instead of updating with new data for each iteration.The estimation algorithm has been tested with different input signals and differentsignal parameters have been varied. One parameter at a time is changed accordingto the following list. The default value, used when other parameters are changed,is given inside parentheses.

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172 Paper B Equalization of Time Errors in Time Interleaved ADC...

0 1 2 3 4 5 6−100

−80

−60

−40

−20

0

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

Before equalization

0 1 2 3 4 5 6−100

−80

−60

−40

−20

0

Normalized angular frequency

Sig

nal e

nerg

y [d

B]

After equalization

Figure 3 Upper plot: The output spectrum of an interleaved ADC systemwith time errors. Lower plot: The same spectrum after compensation withestimated time error parameters. The parameters were estimated from 214

samples per ADC.

0 20 40 60 80 10010

−6

10−5

10−4

10−3

10−2

10−1

Iteration number

Est

imat

ion

erro

r

Time error estimation convergence

Figure 4 Convergence of time error parameter estimates for ADC systemwith four ADC (three parameters). The estimation error is here shown infractions of Ts.

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6 Measurements 173

• Sinusoidal input signal– Angular frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).– Number of data per ADC: N ∈ [23, 216] (N = 214).– Number of ADCs: M ∈ [2, 16] (M = 4).– Quantization noise, given as number of bits: n = [2, 16] (n = 10).– Jitter variance: σ2

jitter ∈ [0, 1] (σ2jitter = 0).

• Multisine input signal– Maximum angular frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).– Number of tones: L ∈ [2, 256] (L = 64).

• Low pass filtered white noise– Cut off frequency: ω0 ∈ [0.01, 3.1].

• Band pass filtered white noise, band width 10% of cut off frequency– Cut off frequency: ω0 ∈ [0.01, 3.1].

The true time error parameters have been generated randomly from a uniformdistribution

For i = 1, . . . ,M − 1

∆0ti ∈ U [−0.1Ts, 0.1Ts]

The standard deviation of the parameter estimation errors have been calculatedfrom 25 Monte-Carlo simulations for each case in the list above. Some of the resultsfrom these simulations are shown in the plots described below. The results fromsimulations with the other paramters listed above are similar.

In Figure 5 the root mean square of the estimation error of the time errorparameters is shown, as a function of the number of data, N . The input signal ishere sinusoidal with input frequency ω0 = 1. For large values of N the simulatedparameter standard deviation is about a factor of 10 above the CRB. In Figure 6the estimation error is shown with varying input signal frequency instead. We cansee here that the estimation works well even close to the Nyquist frequency. Forvery low frequencies the the input signal is very slowly varying. The output signalwill therefore be constant for several samples due to the quantization. This meansthat much fewer samples contribute to the loss function and the performance istherefore worse. Figure 7 shows the estimation error as a function of the randomjitter variance. We can see here that we get quite good estimates even when thejitter is in the same order of magnitude as the static time errors. In Figure 8 theestimation error is shown for a multisine input signal as a function of the maximumfrequency. Figure 9 shows the estimation error with band limited white noise input.The pass band is here between 0.9ωc and ωc and the result is shown for varyingωc.

6 Measurements

To validate the estimation method, the algorithm has also been tested on measureddata from a time interleaved A/D converter system. The following parameters were

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174 Paper B Equalization of Time Errors in Time Interleaved ADC...

100

101

102

103

104

105

10−6

10−5

10−4

10−3

10−2

10−1

Number of data, N

Tim

e es

timat

ion

erro

r st

anda

rd d

evia

tion

Time errors estimated with sinusoidal input

MC time errorCRB time errorw/o estimation

Figure 5 Time estimation error as a function of the number of estimationdata compared to the CRB. The input signal is here a single sinusoid withfrequency ω0 = 1. The simulated values are calculated from 25 Monte Carlosimulations.

10−2

10−1

100

101

10−6

10−5

10−4

10−3

10−2

10−1

Nyquist

Input signal angular frequency, ω0

Tim

e es

timat

ion

erro

r st

anda

rd d

evia

tion

Time errors estimated with sinusoidal input

MC time errorCRB time errorw/o estimation

Figure 6 Time estimation error as a function of input signal frequencycompared to the CRB. The input signal is here a single sinusoid. Thesimulated values are calculated from 25 Monte Carlo simulations.

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6 Measurements 175

10−5

10−4

10−3

10−2

10−1

100

10−7

10−6

10−5

10−4

10−3

10−2

10−1

Random jitter variance

Tim

e es

timat

ion

erro

r st

anda

rd d

evia

tion

Time errors estimated with sinusoidal input

MC time errorCRB time errorw/o estimation

Figure 7 Time estimation error as a function of the random jitter variancecompared to the CRB. The input signal is here a single sinusoid with fre-quency ω0 = 1. The simulated values are calculated from 25 Monte Carlosimulations.

10−2

10−1

100

101

10−6

10−5

10−4

10−3

10−2

10−1

Nyquist

Input signal max angular frequency, ωmax

Tim

e es

timat

ion

erro

r st

anda

rd d

evia

tion

Time errors estimated with multisine input

MC time errorCRB time errorw/o estimation

Figure 8 Time estimation error as a function of input signal maximumfrequency compared to the CRB. The input signal is here a multisine signalwith 64 tones. The simulated values are calculated from 25 Monte Carlosimulations.

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176 Paper B Equalization of Time Errors in Time Interleaved ADC...

10−2

10−1

100

101

10−6

10−5

10−4

10−3

10−2

10−1

Nyquist

Input signal max angular frequency, ωc

Tim

e es

timat

ion

erro

r st

anda

rd d

evia

tion

Time errors estimated with band limited white noise input

MC time errorCRB time errorw/o estimation

Figure 9 Time estimation error as a function of input signal maximumfrequency compared to the CRB. The input signal is here band limitedwhite noise with pass band between 0.9ωc and ωc. The simulated values arecalculated from 25 Monte Carlo simulations.

used in the measurements• 16 parallel ADCs with 12-bit precision.• Sampling frequency, fs = 5MHz.• Sinusoidal input signal with frequencies between 0.31MHz and 2.2MHz.• 8192 samples per ADC in each batch of data.

Here we have estimated the gain and offset errors also, as described in [8]. Thesignal generator is not perfect, which means that there is some harmonic distortionin the output spectrum. There are also other errors, besides the mismatch errors,that give distortion in the output signal. An example of an output spectrum isshown in Figure 10. Here we see that the mismatch distortion is small comparedto the harmonic distortion. Therefore SFDR or SNDR is not useful to measurethe improvement after compensation for mismatch errors. Instead we study theimprovement of the frequency components caused by the mismatch errors. InFigure 11 the same spectrum is shown after compensation with estimated mismatchparameters. The mismatch distortion is here no longer visible above the noise floor.To validate the mismatch error estimation algorithm a parameter estimate wascalculated for each input signal frequency and all signals were then compensatedwith each estimate. In Figure 12 the mean improvement of the gain and timeerror distortion components is shown. Since the sampling frequency is quite low,the time errors relative to the sampling interval are very small. This means thatthe time error distortion is very small, especially for low frequency signals, and

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6 Measurements 177

0 0.5 1 1.5 2 2.50

20

40

60

80

100

120

Frequency [MHz]

Sig

nal P

ower

[dB

]

Signal componentOffset error distortionTime and gain error distortionHarmonic distortion

Figure 10 Output spectrum from ADC measurement. The signal compo-nent is marked by ’o’, the offset error distortion is marked by ’x’ and thegain error distortion is marked by ’*’.

0 0.5 1 1.5 2 2.50

20

40

60

80

100

120

Frequency [MHz]

Sig

nal P

ower

[dB

]

Signal componentOffset error distortionTime and gain error distortionHarmonic distortion

Figure 11 Output spectrum from ADC measurement after compensationwith estimated mismatch errors. Here the mismatch distortion is no longervisible above the noise floor.

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178 Paper B Equalization of Time Errors in Time Interleaved ADC...

therefore cannot be improved much. But we still see some improvement after thetime error compensation.

0 0.5 1 1.5 2 2.50

5

10

15

20

25

30

35

40

45

50

Input signal frequency [MHz]

Impr

ovem

ent [

dB]

Estimated at 0.31MHzEstimated at 0.63MHzEstimated at 2.2MHz

Figure 12 Gain and time error distortion improvement. The improvementis shown for three sets of estimated parameters, estimated from sinusoidalsignals with frequencies 0.31MHz, 0.63MHz and 2.2MHz. The curvesmarked with ’x’ show the improvement after compensation with only thegain error parameters and the curves marked with ’o’ show the improvementafter compensation with both gain and time error parameters.

7 Conclusion

Time interleaving can be used to increase the sampling rate in A/D conversion.The problem is that, due to the manufacturing process, the ADC in the interleavedsystem are not exactly identical. Therefore, interleaving introduces mismatch errorsin time, offset and gain, that distort the sampled signal. The effect of the mismatcherrors can be reduced by calibration. However, calibration is time consuming andcostly which means that a lot of money can be saved if the calibration can beavoided.

This is the second paper in a series of two papers describing a method to es-timate and compensate for time errors in a time interleaved ADC system. Thismethod estimates the time errors without any special calibration signal and with-out measurement of the input signal. The method basically only requires thatthe input signal is band limited to the Nyquist frequency for the complete ADCsystem. In the accompanying paper [1] the theory for a method for this estima-tion and compensation method was derived. In this paper we have analyzed and

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References 179

exemplified the estimation method. We have calculated the Cramer-Rao boundfor the estimated parameters. The estimation accuracy from simulations does notreach the CRB, since the CRB is calculated assuming known input. However, thestandard deviation of the estimated time errors decay with the amount of data atthe same rate as the CRB, which is more important. We have also verified theestimation method on data from a real time interleaved ADC system.

In a real ADC there are other distortions, besides the mismatch error distortion.The measurement results show that the estimation method works well even if theADCs are not ideal.

References

[1] J. Elbornsson, F. Gustafsson, and J.-E. Eklund, “Equalization of time errors intime interleaved ADC system –Part I: Theory,” 2003, to be submitted to IEEETransactions on Signal Processing.

[2] W. Black and D. Hodges, “Time interleaved converter arrays,” IEEE Journalof Solid-State Circuits, vol. SC-15, no. 6, pp. 1022–1029, December 1980.

[3] Y.-C. Jenq, “Digital spectra of nonuniformly sampled signals: A robust sam-pling time offset estimation algorithm for ultra high-speed waveform digitizersusing interleaving,” IEEE Transactions on Instrumentation and Measurement,vol. 39, no. 1, pp. 71–75, February 1990.

[4] B. Widrow, I. Kollar, and M.-C. Liu, “Statistical theory of quantization,” IEEETransactions on Instrumentation and Measurement, vol. 45, no. 2, pp. 353–361,April 1996.

[5] R. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Convert-ers. Kluwer Academic Publishers, 1994.

[6] L. Ljung, System Identification, Theory for the user, 2nd ed. Prentice-Hall,1999.

[7] A. Gut, An Intermediate Course in Probability. Springer-Verlag, 1995.[8] J. Elbornsson, F. Gustafsson, and J.-E. Eklund, “Blind adaptive equalization

of mismatch errors in time interleaved A/D converter system,” 2003, submittedto IEEE Transactions on Circuits and Systems.

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180 References

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C

Blind Adaptive Equalizationof Mismatch Errors in TimeInterleaved A/D Converter

System

Authors: Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund

Edited version of paper submitted to IEEE Transactions on Circuits and Systems– I: Fundamental Theory and Applications.

Preliminary version published as Technical Report LiTH-ISY-R-2486, Departmentof Electrical Engineering, Linkopings universitet, Linkoping, Sweden.

181

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Blind Adaptive Equalization of MismatchErrors in Time Interleaved A/D

Converter System

Jonas Elbornsson, Fredrik Gustafsson Jan-Erik Eklund

Department of Electrical Engineering, Infineon TechnologiesLinkopings universitet, Wireless Solutions Sweden AB.

SE-581 83 Linkoping, [email protected], [email protected] [email protected]

Abstract

The requirements on sampling speed has increased a lot in recent years.Time interleaving is a solution that can substantially increase the samplingrate. The drawback with time interleaving is that the ADCs in the inter-leaved array are not exactly identical. This means that mismatch errors,that cause distortion on the output signal, are introduced into the system.

In this paper we present a method for estimation and compensation of themismatch errors. The estimation method requires no knowledge about theinput signal except that it should be band limited to the Nyquist frequencyfor the complete ADC system. This means that the errors can be estimatedwhile the ADC is running. The method is also adaptive to slow changesin the mismatch errors. The estimation method has been validated withsimulations and measurements from a time interleaved ADC system.

keywords: A/D conversion, nonuniform sampling, equalization, estima-tion

1 Introduction

There is an ever increasing need for faster A/D converters (ADCs) in moderncommunications technology, such as radio base stations or VDSL modems. Toachieve high enough sample rates, an array of M ADCs, interleaved in time, canbe used [1, 2], see Figure 1. The time interleaved ADC system works as follows:

• The input signal is connected to all the ADCs.

183

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184 Paper C Blind Adaptive Equalization of Mismatch Errors...

• Each ADC works with a sampling interval of MTs, where M is the number ofADCs in the array and Ts is the desired sampling interval.

• The clock signal to the ith ADC is delayed with iTs. This gives an overallsampling interval of Ts.

The drawback with the interleaved structure is that, due to the manufacturingprocess, all the ADCs are not identical and mismatch errors are introduced intothe system. Three kinds of mismatch errors are introduced:

• Time errors (static jitter)The delay times of the clock between the different ADCs are not equal. Thismeans that the signal will be periodically but non-uniformly sampled.

• Amplitude offset errorsThe ground level differs between the different ADCs. This means that there isa constant amplitude offset in each ADC.

• Gain errorsThe gain, from analog input to digital output, differs between the differentADCs.

delay, Ts

sampling

ADC0

ADC1

ADC2

ADCM−1

uclock

y0

y1

y2

yM−1

y

MUX

Figure 1 A time interleaved ADC system. M parallel ADCs are usedwith the same master clock. The clock is delayed by the nominal samplinginterval to each ADC. The outputs are then multiplexed together to form asignal sampled M times faster than the output from each ADC.

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1 Introduction 185

The errors listed above are static or slowly varying. This means here that the errorscan be assumed to be constant for the same ADC from one cycle to the next overan interval of some million samples.

With a sinusoidal input, the mismatch errors can be seen in the output spectrumas non harmonic distortion. With input signal frequency ω0, the gain and timeerrors cause distortion at the frequencies

i

Mωs ± ω0, i = 1, . . . ,M − 1

where ωs is the sampling frequency. The offset errors cause distortion at the fre-quencies

i

Mωs, i = 1, . . . ,M − 1

An example of an output spectrum from an interleaved ADC system with fourADCs with sinusoidal input signal is shown in Figure 2. This distortion causes

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

Normalized angular frequency

Sig

nal p

ower

[dB

]

ADC output spectrum

signal componentoffset error distortiontime and gain error distortion

Figure 2 Simulated output spectrum from interleaved ADC system withfour ADCs. The input signal is a single sinusoid. The distortion is causedby mismatch errors.

problems for instance in a radio receiver where a weak carrier cannot be distin-guished from the mismatch distortion from a strong carrier. It is therefore impor-tant to remove the mismatch errors. However, calibration of an ADC system is timeconsuming and costly. Furthermore the mismatch errors may change slowly withfor instance temperature and aging. Therefore we want to estimate the mismatch

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186 Paper C Blind Adaptive Equalization of Mismatch Errors...

errors while the ADC is used. Methods for estimation of timing errors have beenpublished in for instance [3] and [4]. These methods require a known calibrationsignal, which means that the operation of the ADC must be stopped during cali-bration. A blind time error estimation method was presented in [5] and validatedon measurements in [6]. This method works well, but gives a bias error in the timeerror estimates. A blind amplitude offset error estimation method was presentedin [7].

We will in this paper present a method for blind equalization of the time,gain and offset mismatch errors in a time interleaved ADC system. The estimationmethod requires only that the input signal is band limited to the Nyquist frequency,for the complete ADC system. This method gives no bias in the estimates. Thetime error estimation part is an improvement of the method in [5]. The timeerror estimation part is presented in more detail in [8] and [9], where a completederivation and analysis is given. The amplitude error estimation part is a variantof the method in [7].

Apart from the static errors listed before, there are also random errors due tofor instance thermal noise and quantization, which are different from one sample tothe next. These errors do not have anything to do with the parallel structure of theADC and are impossible to estimate because of their random behavior. However,the random errors are important to study for the robustness of the estimationalgorithm, and to calculate lower bounds on the estimation accuracy. The randomerrors in an A/D converter that are discussed in this paper are

• Quantization noiseThis is a deterministic error, if the input signal is known. But for most signalsit can be treated as additive white noise uncorrelated with the input signal andwith uniform distribution [10].

• Random jitterDue to noise in the clock signal there is a random error on the sampling in-stances [11]. These errors can be treated as Gaussian white noise on the sam-pling instances.

2 Notation and Definitions

We will in this section introduce the notation that will be used in this paper. Thenominal sampling interval, that we would have without time errors, is denotedTs. M denotes the number of ADCs in the time interleaved array, which meansthat the sampling interval for each ADC is MTs. The time, amplitude, and gainerror parameters are denoted ∆ti ,∆oi and ∆gi , i = 0, . . . ,M −1 respectively. Theestimates of these errors are denoted ∆ti , ∆oi and ∆gi respectively, and the trueerrors are denoted ∆0

ti ,∆0oi and ∆0

gi . The vector notation ∆t = [∆t0 · · ·∆tM−1 ] isused for all the time error parameters. The other parameters are denoted similarly.We use the following notation for the signals involved:

• u(t) is the analog input signal.

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2 Notation and Definitions 187

• u[k] denotes the ideal signal, sampled without mismatch errors.

• ui[k], i = 0, . . . ,M − 1 denotes the M subsequences of u[k],

ui[k] = u[kM + i]. (1)

• yi[k], i = 0, . . . ,M − 1, are the output subsequences from the M A/D convert-ers, sampled with time errors.

yi[k] =(1 + ∆0

gi

){u((kM + i)Ts + ∆0

ti + ejitteri [k])

+ ei[k]}

+ ∆0oi (2)

Here ejitteri [k] is the random jitter and ei[k] is quantization noise.

• y[k] is the multiplexed output signal from all the ADCs,

y[k] = y(kmodM)

[⌊k

M

⌋],

where b·c denotes integer part.

• z(∆t,∆o,∆g)[k] denotes the output signal, y[k], reconstructed with the error pa-rameters, ∆t,∆o and ∆g.

• z(∆t,∆o,∆g)i [k], i = 0, . . . ,M − 1, are the subsequences of z(∆t,∆o,∆g)[k]

We assume throughout this paper that u(t) is band limited to the Nyquist frequencyof the complete ADC system.

We will next establish a few definitions which will be used later in the paper.A discrete time signal u[k] is said to be quasi-stationary [12] if

mu = limN→∞

1N

N∑k=1

E(u[k])

Ru[n] = limN→∞

1N

N∑n=1

E(u[k + n]u[k])

exist, where the expectation is taken over possible stochastic parts of the signal.Analogously, a continuous time signal u(t) is quasi-stationary if

mu = limT→∞

1T

∫ T

0

E(u(t))dt

Ru(τ) = limT→∞

1T

∫ T

0

E(u(t+ τ)u(t))dt

exist. A stationary stochastic process is quasi-stationary, with mu and Ru[n] beingthe mean value and covariance function respectively.

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188 Paper C Blind Adaptive Equalization of Mismatch Errors...

Definition 2 (Modulo M quasi-stationary) Assume

gui1 ,ui2 ,··· = limN→∞

1N

N∑t=1

g(ui1 [t], ui2 [t], . . . )

i1, i2, · · · = 0, . . . ,M − 1

exists for a function g(·, ·, · · · ). Then u is modulo M quasi-stationary with respectto g if

gi1,i2,··· = g{(i1+l) modM,(i2+l) modM,··· }

∀l ∈ {. . . ,−1, 0, 1, . . . }

The modulo M quasi-stationarity property guarantees that the input signal hasthe same statistical properties for all the ADCs in the time interleaved system. Wewill next give an example to give some intuition to modulo M quasi-stationarity.Consider for instance the function g(ui[t]) = ui[t]. The modulo M quasi-stationaryproperty then means that the mean value should be equal for all subsequencies,i.e., if

mi = limN→∞

1N

N∑k=1

ui[k]

then

mi = mj , for i, j = 0, . . . ,M − 1.

In this example this is true for most quasi-stationary signals, but some periodicsignals are not modulo M quasi-stationary. Consider the function

u[k] = cos(πk)

and M = 2. Then

m0 = limN→∞

1N

N∑k=1

cos(2πk) = 1

and

m1 = limN→∞

1N

N∑k=1

cos(2πk + π) = −1

i.e., this signal is not modulo 2 quasi-stationary.We use further the following notation for the mean square and mean square

difference of a quasi-stationary signal

σ2u = lim

N→∞

1N

N∑k=1

E{u2[k]}

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3 Signal Reconstruction 189

Rui,uj [l] = limN→∞

1N

N∑k=1

E

{(u(imodM)

[k +

⌊ iM

⌋+ l]

− u(jmodM)

[k +

⌊ jM

⌋])2}. (3)

The following notation is used to simplify the expressions involving the recon-structed signals.

m(∆o,∆g,∆t)zi = m

z(∆o,∆g,∆t)i

(σ2zi)

(∆o,∆g,∆t) = σ2

z(∆Ai

,∆gi ,∆ti )

i

R(∆t,∆o,∆g)zi,zj [l] = R

z(∆t,∆o,∆g)i ,z

(∆t,∆o,∆g)j

[l]

3 Signal Reconstruction

If all the error parameters, ∆t,∆o,∆g, are known, and the input signal u(t) isband limited to the Nyquist frequency, u(t) can be exactly reconstructed from thesampled signal y[k]. We will in this section describe how the different errors canbe removed.

3.1 Amplitude offset errors

The amplitude offset errors are removed by subtracting the offset error parametersfrom the respective subsequences:

z(∆0

o)i [k] = yi[k]−∆0

oi = (1 + ∆0gi){u((kM + i)Ts + ∆0

ti + ejitteri [k]) + ei[k]}, (4)

i = 0, . . . ,M − 1

3.2 Gain errors

The gain errors can be removed, after the offset errors are removed, by dividingthe subsequences by the respective ADC gain.

z(∆0

A,∆0g)

i [k] =z

(∆0A)

i [k]1 + ∆0

gi

= u((kM + i)Ts + ∆0ti + ejitteri [k]) + ei[k], (5)

i = 0, . . . ,M − 1

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190 Paper C Blind Adaptive Equalization of Mismatch Errors...

3.3 Time errors

The time errors can be compensated for by many different interpolation tech-niques, for instance splines [13] or polynomial interpolation. We will here describea method for exact interpolation by filtering the signal with a non-causal IIR filter.If the input signal is band limited to the Nyquist frequency, π

Ts, and the time error

parameters are known, the input signal can be perfectly reconstructed from theirregular samples [14]. In a real application the interpolation is of course approx-imate since we cannot use a filter of infinite length, but we can come arbitrarilyclose to the exact interpolation by choosing the length of the filter large enough.In [14] the interpolation is done at an arbitrary time instant. If we only need toreconstruct the signal at the nominal sampling instances

t = (kM + l)Ts, l = 0, . . . ,M − 1, k = . . . ,−1, 0, 1, . . .

the reconstruction can be simplified. The simplified reconstruction will be describedhere. The time errors are here re-parameterized as

αi = −M − 12

+ i+ ∆ti , i = 0, . . . ,M − 1

α = [ α0 α1 · · · αM−1 ]

to simplify the notation.In the frequency domain the interpolation is done by [8]

Z(∆0

t )l (ejωMTs) = Y T (ejωMTs)H(l)(ejωMTs , α), l = 0, . . . ,M − 1 (6)

Here Y (ejωMTs) and H(l)(ejωMTs , α0) are M -dimensional vectors for each fre-quency ω. Y (ejωMTs) consists of the TDFT (time discrete fourier transform) ofthe output subsequences

Y T (ejωMTs) =[Y0(ejωMTs) · · · YM−1(ejωMTs)

]The filter is given by

H(l)(ejωMTs , α) = MTsE−1(ω − π

Ts, α)A−1(α)BlejωlTs(−1)l

where

A(α) =

1 · · · 1

ejα02πMTs · · · ejαM−1

2πMTs

.... . .

...ejα0(M−1) 2π

MTs · · · ejαM−1(M−1) 2πMTs

E(ω, α) =

ejα0ω 0 · · · 0

0 ejα1ω · · · 0...

.... . .

...0 0 · · · ejαM−1ω

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4 Mismatch Error Estimation 191

and

Bl =[

1 ej2πl/M · · · ej2π(M−1)l/M]T

The Fourier transform of the time error compensated signal, Z(∆0t )(ejωTs), can then

be calculated from its subsequences [15]

Z(∆0t )(ejωTs) =

M−1∑l=0

Z(∆0

t )l (ej(ωMTs mod 2π))e−jlωTs (7)

With the inverse TDFT we get the time error reconstructed signal

z(∆0t )[k] = ITDFT (Z(∆0

t )(ejωTs)) (8)

4 Mismatch Error Estimation

We will in this section discuss how the three different error types can be estimatedby minimization of different loss functions. A loss function is a function that canbe calculated from the measured data and depends on a set of parameters, here themismatch error parameters. The loss function should be strictly positive except forthe true parameters, where it should be zero. This means that by minimizing theloss function we can get an estimate of the parameters. It is also an advantage ifthe loss function is monotonically increasing around its minimum and even betterif it is convex, since it makes numerical minimization more robust.

We will first discuss the different errors separately and then put the three partstogether to estimate all errors simultaneously. We only study the dynamic perfor-mance of the ADC system. This means that it is not important that for instancethe amplitude offset is zero as long as it is the same for all the ADCs in the system.Therefore the reference level can be chosen arbitrarily and we will in the followingassume that all the errors are zero in the first ADC, ∆0

o0= ∆0

g0= ∆0

t0 = 0, i.e., allthe other errors are relative to the offset, gain and time errors in the first ADC.

4.1 Amplitude Offset Error Estimation

The idea for estimation of the offset errors is that the mean value of the outputfrom each ADC corresponds to the respective offset errors [7]. We assume first thatthe time and gain errors are zero, then the influence of time and gain errors willbe discussed. We have now the signal model

yi[k] = u((kM + i)Ts) + ∆0oi

Assume that u[k] is quasi-stationary and modulo M quasistationary with respectto g(ui) = ui. Then the mean value of the input is the same for all subsequencesand

myi = mu + ∆0oi

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192 Paper C Blind Adaptive Equalization of Mismatch Errors...

Introduce the amplitude offset loss function

V (N)o (∆o) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

z(∆oi

)

i [k]− z(∆oj)

j [k])2

. (9)

Letting N tend to infinity in (9) gives

V (∞)o (∆o) =

M−1∑i=1

i−1∑j=0

(∆0oi −∆oi + ∆0

oj −∆oj

)2

(10)

From (10), we can clearly see that

V (∞)o (∆0

o) = 0.

It can also be shown that ∆o = ∆0o is the only minimum and that V (∞)

o (∆o) isquadratic. This means that the minimizing argument of V (N)

o (∆o) will convergeto the true offset parameters. Since there are no local minima any minimizationalgorithm will converge to the global minimum.

Random chopper

With a random chopper [7] we can guarantee the the signal is modulo M quasi-stationary with respect to g(ui) = ui and zero mean. Random chopping meansthat the input signal is multiplied with a pseudo binary random sequence (PRBS)of +1 and −1 before A/D conversion. The digital output signal is then multipliedwith the same sequence, to reconstruct the signal, see Figure 3.

Influence of Gain and Time Errors

Using the full signal model (2) in the offset error loss function (9) and assumingthat mu = 0 gives

V (∞)o (∆o) =

M−1∑i=1

i−1∑j=0

(∆0oi −∆oi + ∆0

oj −∆oj

)2

whenN →∞, i.e., the same as (10) which means that the loss function is unaffectedby gain and time errors. This means that the offset error estimates converge to thecorrect values, even if there are gain or time errors, or noise present in the signal.

4.2 Gain Error Estimation

The idea for estimation of the gain errors is that the variance of the output fromeach ADC correspond to the respective gain of the ADC. We first assume that thetime and offset errors are zero, then the influence of time and offset errors will bediscussed. The signal model is now

yi[k] = (1 + ∆0gi)u((kM + i)Ts)

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4 Mismatch Error Estimation 193

PRBSgenerator

ADCsystem

clock

Figure 3 Random chopper: the input and output signals are multipliedwith the same pseudo random signal, thus giving an input signal to theADC that is guaranteed to be modulo M quasistationary with respect tog(ui) = ui.

Assume that u[k] is quasi-stationary and modulo M quasi-stationary with respectto g(ui) = u2

i . Then the mean square value of the input is the same for all subse-quences and

σ2yi = (1 + ∆0

gi)2σ2u

Introduce the gain error loss function

V (N)g (∆g) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆gi)

i [k])2 − (z(∆gj

)

j [k])2)2

. (11)

Letting N tend to infinity in (11) gives

V (∞)g (∆g) =

M−1∑i=1

i−1∑j=0

(limN→∞

1N

N∑k=1

{1 + ∆0

gi

1 + ∆gi

}2

u2((kM + i)Ts)

−{1 + ∆0

gj

1 + ∆gj

}2

u2((kM + i)Ts))2

=M−1∑i=1

i−1∑j=0

({1 + ∆0

gi

1 + ∆gi

}2

−{1 + ∆0

gj

1 + ∆gj

}2)2

E(u2)2 (12)

From (12), we can clearly see that

V (∞)g (∆0

g) = 0.

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194 Paper C Blind Adaptive Equalization of Mismatch Errors...

We can also show that V (∞)g (∆g) > 0 if ∆g 6= ∆0

g and |∆g| < 1, |∆0g| < 1. This can

be shown using the fact that ∆0g0

= 0 and studying the terms with j = 0 in (12).This means that the minimum at ∆g = ∆0

g is the global minimum. However, thegain error loss function is not convex (can be seen by studying the case M = 2),but simulations still show good performance.

Influence of Offset and Time Errors

Using the full signal model (2) in the gain error loss function (11) and assumingthat mu = 0 gives

V (∞)g (∆g) =

M−1∑i=1

i−1∑j=0

([{1 + ∆0

gi

1 + ∆gi

}2

−{1 + ∆0

gj

1 + ∆gj

}2](σ2u + σ2

e)

+(∆0

oi −∆oi)2

(1 + ∆gi)2−

(∆0oj −∆oj )

2

(1 + ∆gj )2

)2

when N → ∞. Here we can see that the gain error estimates will be biased untilthe offset error estimates have converged. However, since the offset error estimatesare unaffected by the gain errors, this is not a problem. The time errors and noisedo not influence the gain error estimates.

4.3 Time Error Estimation

The idea for the time error estimation is to study the mean square differencebetween the outputs of adjacent ADCs. Assuming that the input signal is bandlimited to the Nyquist frequency, the signal cannot change arbitrarily fast. If thetime interval between two ADCs is shorter than Ts the signal will change less onaverage between the samples compared to a time difference of Ts and vice versa ifthe time interval is longer than Ts. In Figure 4 this is illustrated for a dual ADCsystem. We assume first that the offset and gain errors are zero, then the influenceof offset and gain errors are discussed. The signal model is now

yi[k] = u((kM + i)Ts + ∆ti)

Assume that u[k] is quasi-stationary and modulo M quasi-stationary with respectto g(ui, ui−1) = (ui − ui−1)2. The mean squared difference between the output ofadjacent ADCs is now, when N tends to infinity

R(∞)yi,yi−1

[0] = limN→∞

1N

N∑k=1

(yi[k]− yi−1[k]

)2

= 2(σ2u −Ru(Ts + ∆0

ti −∆0ti−1

))

(13)

Consider the time error loss function

V(N)t,R (∆t) =

M−1∑i=1

i−1∑j=0

(R(N),(∆t)zi,zi−1

[0]−R(N),(∆t)zj ,zj−1

[0])2

(14)

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4 Mismatch Error Estimation 195

Here more terms, involving R(N),(∆t)zi,zi−1 [l], l > 0, can be added, but from simulations

we can see that the loss function above is usually enough. Letting N tend toinfinity, we get

V(∞)t,R (∆t) ≈ 4

M−1∑i=1

i−1∑j=0

(Ru(Ts + ∆0

ti −∆ti −∆0ti−1

+ ∆ti−1)

− Ru(Ts + ∆0tj −∆tj −∆0

tj−1+ ∆tj−1)

)2

(15)

for small values of ∆t. If the reconstruction was linear in the parameters ∆t the lossfunction evaluation (15) would hold with exact equality. However, the interpolationmethod described in Section 3 is not linear in the parameters, so the loss functionevaluation (15) is exactly valid only for ∆t = ∆0

t and is only approximately truefor ∆t 6= ∆0

t . However, interpolation is a continuous mapping in ∆t so it canlocally be considered as linear. Simulations show that there are local minima inthe loss function V (N)

t,R (∆t). A contour plot of V (N)t,R (∆t) is shown in Figure 5. Here

M = 4 but ∆t0 and ∆t2 are fixed to there true values to generate a two-dimensionalplot. The input signal is here sinusoidal. We can see that there are local minimaalong a line, ∆t1 −∆t3 = constant, in this figure. However, when ∆t 6= ∆0

t in theinterpolation, the gain of the subsequences of the interpolated signals are changed.

0.5 1 1.5 2 2.5 3−1

−0.5

0

0.5

1

∆t=−0.3 ∆

t=0.3

∆t=0

∆ y1

∆ y1

∆ y1

Too early sampleToo late sampleIdeal sample

Figure 4 The idea for time error estimation, here an example with twoADCs. If the sample of the second ADC is taken before the nominal sam-pling instance, the signal changes less on average between the samples, andvice versa.

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196 Paper C Blind Adaptive Equalization of Mismatch Errors...

Consider instead the loss function

V(N)t,σ (∆t) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆ti)

i [k])2 − (z(∆tj

)

j [k])2)2

. (16)

This is the same function as the gain error loss function (11), but here operatingon the signal reconstructed with the time error parameters. If we plot the samecontour plot for this function, see Figure 6, we see that again there are local minimaalong a line. But this line, ∆t1 + ∆t3 = constant, is perpendicular to the line inFigure 5. This means that adding the two loss functions

V(N)t (∆t) = V

(N)t,R (∆t) + V

(N)t,σ (∆t) (17)

eliminates the local minima, see Figure 7. This is just an example with a sinusoidalinput, but simulation of many different input signals with different frequency rangeand different values of M indicate that this loss function works for a wide range ofsignals.

Influence of Offset and Gain Errors

With the frequency domain interpolation method that we have used here it ishard to analytically calculate the corrected signal if the time error estimates arewrong. However, we can clearly see that the gain errors influence the time error

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt,R

(∆t)

Figure 5 A contour plot of the time error loss function, V(N)t,R (∆t), with

M = 4 and sinusoidal input. ∆t0 and ∆t2 are fixed to there true values.

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4 Mismatch Error Estimation 197

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt,σ(∆

t)

Figure 6 A contour plot of the time error loss function, V(N)t,σ (∆t), with

M = 4 and sinusoidal input. ∆t0 and ∆t2 are fixed to there true values.

−0.08 −0.06 −0.04 −0.02 0 0.02 0.04 0.06 0.08 0.1

−0.08

−0.06

−0.04

−0.02

0

0.02

0.04

0.06

0.08

0.1

∆t1

∆ t 3

Vt(∆

t)

Figure 7 A contour plot of the time error loss function, V(N)t (∆t) =

V(N)t,R (∆t) + V

(N)t,σ (∆t), with M = 4 and sinusoidal input. ∆t0 and ∆t2

are fixed to there true values.

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198 Paper C Blind Adaptive Equalization of Mismatch Errors...

loss function (17) since the second part of it compares the variance of the outputsignals. This means that the time error estimates will be biased until the gainerror estimates have converged. However, the gain error estimates are not biasedby time errors, which means that the time error estimates will eventually convergeto the correct values.

4.4 Mismatch Error Estimation algorithm

In this section we will present an adaptive algorithm for simultaneous estimationof offset, gain and time errors. We found in Section 4.3 that the the time errorinterpolation affects the gain of the output if the time error parameters are wrong.Further the gain and offset error loss functions are not influenced by time errors inthe input signal. Therefore it is better to calculate the offset and gain error lossfunctions from the signal reconstructed with only offset and gain error estimates,z(∆o,∆g)[k]

V (N)o (∆o, ∆g) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

z(∆o,∆g)i [k]− z(∆o,∆g)

j [k])2

(18)

and

V (N)g (∆g, ∆o) =

M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆o,∆g)i [k]

)2 − (z(∆o,∆g)j [k]

)2)2

(19)

The time error loss function is then calculated from the signal reconstructed withall parameters, z(∆o,∆g,∆t)[k].

V(N)t (∆t, ∆o, ∆g) =

M−1∑i=1

i−1∑j=0

(R(N),(∆o,∆g,∆t)zi,zi−1

[0]−R(N),(∆o,∆g,∆t)zj ,zj−1

[0])2

+M−1∑i=1

i−1∑j=0

(1N

N∑k=1

(z

(∆o,∆g,∆t)i [k]

)2 − (z(∆o,∆g,∆t)j [k]

)2)2

(20)

The minimizing arguments of these three loss functions give the mismatch er-ror estimates. Since the minimizing argument cannot be calculated analytically,a numerical minimization algorithm is used. Further, the mismatch errors maychange slowly with for instance temperature and aging. Therefore the parameterestimates should be adaptively updated with new data. There are many minimiza-tion algorithms available with fast convergence, for instance Newton’s method [16].However, the fast converging methods are usually computationally demanding.Therefore a stochastic gradient search method is chosen here, which has somewhatslower convergence rate than other methods but is computationally very efficient.In a stochastic gradient minimization algorithm, the parameters are updated by astep in the negative gradient direction

∆(i+1) = ∆(i) − µ∇V (∆(i))

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4 Mismatch Error Estimation 199

The magnitude of the functions Vt(∆(i)t ), Vg(∆

(i)g ) and Vo(∆

(i)o ) may be very dif-

ferent depending on the input signal. Therefore it is hard to choose the step lengthµ. A normalized version of the stochastic gradient method can be used to makethe choice of µ easier, for instance

∆(i+1) = ∆(i) − µ ∇V (∆(i))max

∣∣∇V (∆(i))∣∣

To avoid taking too long steps, we can check that the loss function decreases forevery iteration, and otherwise backtrack the step size until it does [16]. The nextiteration is then started with doubled step length, so that the step length doesnot get unnecessarily small. To avoid scaling problems between the time, gain andoffset error loss functions, a separate step length variable is used for each of theerror types. To summarize, the adaptive equalization algorithm is given by

Algorithm C.1 (Interleaved ADC equalization)

Initialization:

•Choose a batch size, N , for each iteration.

•Initialize the step lengths of the stochastic gradient algorithm, µt, µo, µg. If theorder of magnitude of the mismatch errors are known, this information can beused for the initialization.

•Initialize the parameter estimates

∆(0)ti = 0, ∆(0)

oi = 0, ∆(0)gi = 0, i = 0, . . . ,M − 1

Adaptation:

1.Collect a batch of N data from each ADC, yi[k], i = 0, . . . ,M − 1.

2.Calculate the reconstructed signals according to (4), (5), (6), (7) and (8)

z(∆(j)

o ,∆(j)g )

i [k]

and

z(∆(j)

o ,∆(j)g ,∆

(j)t )

i [k]

3.Calculate the gradients of the three loss functions,

∇V (N)t (∆(j)

t ), ∇V (N)o (∆(j)

o ), ∇V (N)g (∆(j)

g ). (21)

The gradients can be calculated numerically by a finite difference approximationfrom the loss functions, or by analytically differentiating the loss functions. Theloss functions are defined in (18), (19) and (20).

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200

Pap

er

CB

lind

Adapti

ve

Equalizati

on

of

Mis

matc

hE

rrors

...

ADC0

ADC1

ADCM−1

uclock

y0

y1

yM−1

z(∆t,∆o,∆g)0

z(∆t,∆o,∆g)1

z(∆t,∆o,∆g)M−1

z(∆t,∆o,∆g)

z(∆o,∆g)0

z(∆o,∆g)1

z(∆o,∆g)M−1

MUX

Error estimation algorithm

delay, Ts

∆t

C

o

o

rr

ecti

n

∆t

∆o0

∆o1

∆oM−1

1 + ∆g0

1 + ∆g1

1 + ∆gM−1

+

+

+ /

/

/+

+

+

Figure 8 Time interleaved ADC system with mismatch errors. The mis-match errors, ∆t, ∆o, ∆g, are estimated by a blind adaptive algorithm. Theestimated offset errors are first subtracted from the output subsequences.Next the offset compensated signals are divided by the estimated channelgains. Finally the offset and gain compensated signals are corrected withthe estimated time errors.

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5 Simulations 201

4.Update the parameter estimates

∆(j+1)t = ∆(j)

t − µt∇V (N)

t (∆(j)t )

max |∇V (N)t (∆(j)

t )|

∆(j+1)o = ∆(j)

o − µo∇V (N)

o (∆(j)o )

max |∇V (N)o (∆(j)

o )|

∆(j+1)g = ∆(j)

g − µg∇V (N)

g (∆(j)g )

max |∇V (N)g (∆(j)

g )|

5.If any of the loss functions have increased since last iteration

V(N)t (∆(j+1)

t ) > V(N)t (∆(j)

t )

V (N)o (∆(j+1)

o ) > V (N)o (∆(j)

o )or

V (N)g (∆(j+1)

g ) > V (N)g (∆(j)

g )

backtrack the corresponding step size µ := µ/2 and change the corresponding pa-rameter estimate in point 4) until the loss function decreases. Otherwise doublethe step lengths for the next iteration: µt := 2µt, µo := 2µo, µg := 2µg.

6.Return to point 1).

Figure 8 illustrates the operation of the adaptive equalization algorithm.

5 Simulations

To evaluate the performance of the mismatch error estimation method, a timeinterleaved ADC system has been simulated. An example of a spectrum of theoutput of an ADC with sinusoidal input before and after mismatch error estimationand correction is shown in Figure 9. After correction the mismatch distortioncannot be seen above the noise floor. In Figure 10 an example of the convergenceof the time error estimates is shown. We can see in this figure that the parametersconverge in about 20 iterations. The simulation is here done with four ADCs and214 samples per batch. One iteration was done on each batch. The offset and gainerrors show similar convergence.

The Cramer-Rao Bound (CRB) [12] is a lower bound, independent of the es-timation method, on how good the estimation accuracy can be, given an amountof data. In the following simulations the estimation accuracy is compared to theCRB. We can not reach the CRB since the CRB is calculated assuming knowninput, but it is still interesting to study how close we can get to the CRB. Tocompare the estimation accuracy with the CRB the minimization has been doneon one batch of data instead of updating with new data for each iteration. The

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202 Paper C Blind Adaptive Equalization of Mismatch Errors...

0 1 2 3 4 5 610

−3

10−2

10−1

100

101

102

103

104

Signal spectrum before correction

(a)

0 1 2 3 4 5 610

−3

10−2

10−1

100

101

102

103

104

Signal spectrum after correction

(b)

Figure 9 (a) The output spectrum of an interleaved ADC system with mis-match errors. (b) The same spectrum after compensation with estimatedmismatch error parameters. The parameters were estimated from 214 sam-ples per ADC.

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5 Simulations 203

0 20 40 60 80 10010

−6

10−5

10−4

10−3

10−2

10−1

Iteration number

Est

imat

ion

erro

r

Time error estimation convergence

Figure 10 Convergence of M − 1 = 3 time error parameter estimates forADC system with four ADC. The estimation error is here shown in fractionsof Ts.

estimation algorithm has been tested with different input signals and different sig-nal parameters have been varied. One parameter at a time is changed accordingto the following list. The default value, used when other parameters are changed,is given inside parentheses.

• Sinusoidal input signal

– Angular frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).

– Number of data per ADC: N ∈ [23, 216] (N = 214).

– Number of ADCs: M ∈ [2, 16] (M = 4).

– Quantization noise, given as number of bits: n = [2, 16] (n = 10).

– Jitter variance: σ2jitter ∈ [0, 1] (σ2

jitter = 0).

• Multisine input signal

– Maximum angular frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).

– Number of tones: L ∈ [2, 256] (L = 64).

• Low pass filtered white noise

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204 Paper C Blind Adaptive Equalization of Mismatch Errors...

– Cut off frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).

• Band pass filtered white noise, band width 10% of cut off frequency

– Cut off frequency: ω0 ∈ [0.01, 3.1] (ω0 = 1).

The true mismatch error parameters have been generated randomly from uniformdistributions

∆0oi ∈ U [−0.1σu, 0.1σu]

∆0gi ∈ U [−0.1, 0.1]

∆0ti ∈ U [−0.1Ts, 0.1Ts],

for i = 1, . . . ,M − 1. The standard deviation of the parameter estimation errorshave been calculated from 25 Monte-Carlo simulations for each case in the listabove. The results for some of the parameters are shown in the figures describednext. The principal behavior is similar for simulations with the other paramtervalues are, but how close we come to the CRB is different for different signal types.In Figure 11 the root mean square of the offset errors is shown, as a function of thenumber of data, N . The input signal is here sinusoidal with input frequency ω0 = 1.For large values of N the simulated parameter standard deviation is about a factorof 10 above the CRB. The Figures 12 and 13 shows the same simulations, but withthe results for gain and time errors respectively. In Figure 14 the estimation erroris shown with varying input signal frequency instead. We can see here that theestimation works well even close to the Nyquist frequency.

6 Measurements

To validate the estimation method, the algorithm has been tested on measureddata from a time interleaved A/D converter system. The following parameterswere used in the measurements

• 16 parallel 12-bit ADCs.

• Sampling frequency, fs = 5MHz.

• Sinusoidal input signal with frequencies between 0.31MHz and 2.2MHz.

• 213 samples per ADC in each batch of data.

The signal generator is not perfect, which means that there is some harmonic dis-tortion in the output spectrum. There are also other errors, besides the mismatcherrors, in the ADCs. An example of an output spectrum is shown in Figure 15.Here we see that the mismatch distortion is small compared to the other distortion.Therefore SFDR or SNDR is not useful to measure the improvement after com-pensation for mismatch errors. Instead we study the improvement of the frequency

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6 Measurements 205

100

101

102

103

104

105

10−6

10−5

10−4

10−3

10−2

10−1

Number of data, N

Offs

et e

stim

atio

n er

ror

MC offset errorCRB offset errorw/o estimation

Figure 11 Offset estimation error as a function of the number of estimationdata compared to the CRB. The simulated values are calculated from 25Monte Carlo simulations.

100

101

102

103

104

105

10−6

10−5

10−4

10−3

10−2

10−1

Number of data, N

Gai

n es

timat

ion

erro

r

MC gain errorCRB gain errorw/o estimation

Figure 12 Gain estimation error as a function of the number of estimationdata compared to the CRB. The simulated values are calculated from 25Monte Carlo simulations.

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206 Paper C Blind Adaptive Equalization of Mismatch Errors...

100

101

102

103

104

105

10−6

10−5

10−4

10−3

10−2

10−1

Number of data, N

Tim

e es

timat

ion

erro

r

MC time errorCRB time errorw/o estimation

Figure 13 Time estimation error as a function of the number of estimationdata compared to the CRB. The simulated values are calculated from 25Monte Carlo simulations.

10−2

10−1

100

101

10−6

10−5

10−4

10−3

10−2

10−1

Nyquist

Input signal angular frequency, ω0

Tim

e es

timat

ion

erro

r

MC time errorCRB time errorw/o estimation

Figure 14 Time estimation error as a function of input signal frequencycompared to the CRB. The simulated values are calculated from 25 MonteCarlo simulations.

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6 Measurements 207

0 0.5 1 1.5 2 2.50

20

40

60

80

100

120

Frequency [MHz]

Signal componentOffset error distortionTime and gain error distortion

Figure 15 Output spectrum from ADC measurement. The signal compo-nent is marked by ’o’, the offset error distortion is marked by ’x’ and thegain error distortion is marked by ’*’.

0 0.5 1 1.5 2 2.50

20

40

60

80

100

120

Frequency [MHz]

Signal componentOffset error distortionTime and gain error distortion

Figure 16 Output spectrum from ADC measurement after compensationwith estimated mismatch errors. Here the mismatch distortion is no longervisible above the noise floor.

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208 Paper C Blind Adaptive Equalization of Mismatch Errors...

0 0.5 1 1.5 2 2.50

5

10

15

20

25

30

35

40

Input signal frequency [MHz]

Impr

ovem

ent [

dB]

Estimated at 0.31MHzEstimated at 0.63MHzEstimated at 2.2MHz

Figure 17 Offset error distortion improvement. The improvement is shownfor three sets of estimated parameters, estimated from sinusoidal signals withfrequencies 0.31MHz, 0.63MHz and 2.2MHz.

components caused by the mismatch errors. In Figure 16 the same spectrum isshown after compensation with estimated mismatch parameters. The mismatchdistortion is here no longer visible above the noise floor. To validate the mis-match error estimation algorithm a parameter estimate was calculated for eachinput signal frequency and all signals were then compensated with each estimate.In Figure 17 the mean improvement of the offset error distortion components isshown for the estimates calculated from the signals at 0.31MHz, 0.63MHz and2.2MHz. The improvement is almost constant around 30dB for all frequencies,which indicates that the mismatch errors are constant independent of input signal.In Figure 18 the mean improvement of the gain and time error distortion compo-nents is shown. Since the sampling frequency is quite low, the time errors relativeto the sampling interval are very small. This means that the time error distortion isvery small, especially for low frequency signals, and therefore cannot be improvedmuch. But we still see some improvement after the time error compensation.

7 Conclusions

Time interleaving of ADCs can be used as a way to substantially increase thesampling rate of A/D conversion. The drawback with this solution is that allthe ADCs are not exactly identical, due to imperfections in the manufacturingprocess. Therefore, mismatch errors in time, gain and amplitude offset will occurin a time interleaved ADC system. The mismatch errors cause distortion in the

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7 Conclusions 209

0 0.5 1 1.5 2 2.50

5

10

15

20

25

30

35

40

45

50

Input signal frequency [MHz]

Impr

ovem

ent [

dB]

Estimated at 0.31MHzEstimated at 0.63MHzEstimated at 2.2MHz

Figure 18 Gain and time error distortion improvement. The improvementis shown for three sets of estimated parameters, estimated from sinusoidalsignals with frequencies 0.31MHz, 0.63MHz and 2.2MHz. The curvesmarked with ’x’ show the improvement after compensation with only thegain error parameters and the curves marked with ’o’ show the improvementafter compensation with both gain and time error parameters.

sampled signal. The traditional way to decrease the distortion is calibration of theADCs. However, calibration is time consuming and costly, therefore it is better tocontinuously estimate the mismatch errors while the ADC is used.

We have in this paper presented a method for estimation and compensation ofthe mismatch error in a time interleaved ADC system. The estimation method isblind, so that it does not require any information about the input signal, exceptthat it should be band limited to the Nyquist frequency of the complete ADCsystem. The method is also adaptive, so the estimates are updated if the mismatcherrors change slowly. The method gives unbiased estimates, so that the estimationaccuracy can be made arbitrarily good by increasing the amount of estimationdata.

A lower bound on how good the mismatch error parameters can be estimated,the Cramer-Rao bound (CRB), has also been calculated. Simulations show that theestimates come rather close to the CRB although the CRB is calculated assumingknown input. The estimation method has also been verified on measurements froma time interleaved ADC system with 16 ADCs.

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210 References

References

[1] W. Black and D. Hodges, “Time interleaved converter arrays,” IEEE Journalof Solid-State Circuits, vol. SC-15, no. 6, pp. 1022–1029, December 1980.

[2] Y.-C. Jenq, “Digital spectra of nonuniformly sampled signals: A robust sam-pling time offset estimation algorithm for ultra high-speed waveform digitizersusing interleaving,” IEEE Transactions on Instrumentation and Measurement,vol. 39, no. 1, pp. 71–75, February 1990.

[3] J. Corcoran, “Timing and amplitude error estimation for time-interleavedanalog-to-digital converters,” October 1992, US Patent nr. 5,294,926.

[4] H. Jin and E. Lee, “A digital-background calibration technique for minimizingtiming-error effects in time-interleaved ADC’s,” IEEE Transactions on Cicuitsand Systems, vol. 47, no. 7, pp. 603–613, July 2000.

[5] J. Elbornsson and J.-E. Eklund, “Blind estimation of timing errors in in-terleaved AD converters,” in Proc. ICASSP 2001, vol. 6. IEEE, 2001, pp.3913–3916.

[6] J. Elbornsson, K. Folkesson, and J.-E. Eklund, “Measurement verification ofestimation method for time errors in a time-interleaved A/D converter sys-tem,” in Proc. ISCAS 2002. IEEE, 2002.

[7] J.-E. Eklund and F. Gustafsson, “Digital offset compensation of time-interleaved ADC using random chopper sampling,” in IEEE InternationalSymposium on Circuits and Systems, vol. 3, 2000, pp. 447–450.

[8] J. Elbornsson, F. Gustafsson, and J.-E. Eklund, “Equalization of time errorsin time interleaved ADC system –Part I: Theory,” 2003, to be submitted toIEEE Transactions on Signal Processing.

[9] ——, “Equalization of time errors in time interleaved ADC system –Part II:Analysis and examples,” 2003, to be submitted to IEEE Transactions on SignalProcessing.

[10] B. Widrow, I. Kollar, and M.-C. Liu, “Statistical theory of quantization,”IEEE Transactions on Instrumentation and Measurement, vol. 45, no. 2, pp.353–361, April 1996.

[11] R. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Con-verters. Kluwer Academic Publishers, 1994.

[12] L. Ljung, System Identification, Theory for the user, 2nd ed. Prentice-Hall,1999.

[13] M. Unser, “Splines –a perfect fit for signal and image processing,” IEEE SignalProcessing Magazine, pp. 22–38, November 1999.

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References 211

[14] A. Papoulis, Signal Analysis. McGraw-Hill, 1977.

[15] F. Gustafsson, L. Ljung, and M. Millnert, Digital Signalbehandling. Stu-dentlitteratur, 2001, in Swedish.

[16] J. Dennis and R. Schnabel, Numerical Methods for Unconstrained Optimiza-tion and Nonlinear Equations. Prentice-Hall, 1983.

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212 References

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D

Analysis of Mismatch Effectsin Randomly Interleaved

A/D Converter System

Authors: Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund

Edited version of paper submitted to TBD.

Preliminary version published as Technical Report LiTH-ISY-R-2496, Departmentof Electrical Engineering, Linkopings universitet, Linkoping, Sweden.

213

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Analysis of Mismatch Effects inRandomly Interleaved A/D Converter

System

Jonas Elbornsson, Fredrik Gustafsson Jan-Erik Eklund

Department of Electrical Engineering, Infineon TechnologiesLinkopings universitet, Wireless Solutions Sweden AB.

SE-581 83 Linkoping, [email protected], [email protected] [email protected]

Abstract

Time interleaving can be used to significantly increase the sampling rate of anADC system. However, the problem with time interleaving is that the ADCsare not exactly identical. This means that time, gain and offset mismatcherrors are introduced in the ADC system, which cause non harmonic distortionin the sampled signal.

One way to decrease the impact of the mismatch errors is to spread the dis-tortion over a wider frequency range by randomizing the order in which theADCs are used in the interleaved structure. In this paper we analyze howthe spectrum is affected by mismatch errors in a randomly interleaved ADCsystem. We also discuss how the mismatch errors can be estimated.

keywords: A/D conversion, nonuniform sampling, random sampling

1 Introduction

1.1 Fixed interleaving

The requirements for higher sample rates in A/D converters (ADCs) are ever in-creasing. To achieve high enough sample rates, a time interleaved ADC system canbe used [1, 2], see Figure 2. A fixed interleaved ADC system is here achieved by∆M = 0. The time interleaved ADC system works as follows:

• The input signal, u, is connected to all the ADCs.

215

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216 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

• Each ADC works with a sampling interval of MTs, where M is the number ofADCs in the array and Ts is the desired sampling interval. The ith ADC gives anoutput signal yi. The output signals are multiplexed to form one output signaly.

• The clock signal to the ith ADC is delayed with iTs. This gives an overallsampling interval of Ts.

The drawback with this ADC system is that three kinds of mismatch errors areintroduced by the interleaved structure:

• Time errors (static jitter)The delay time of the clock to the different A/D converters is not equal. Thismeans that the signal will be periodically but non-uniformly sampled.

• Amplitude offset errorsThe ground level can be slightly different in the different A/D converters. Thismeans that there is a constant amplitude offset in each A/D converter.

• Gain errorThe gain, from analog input to digital output, can be different for the differentA/D converters.

All these errors distort the sampled signal. With a sinusoidal input, the mismatcherrors can be seen in the output spectrum as non harmonic distortion. With inputsignal frequency ω0, the gain and time errors cause distortion at the frequencies

i

Mωs ± ω0, i = 1, . . . ,M − 1,

where ωs is the sampling frequency. The offset errors cause distortion at the fre-quencies

i

Mωs, i = 1, . . . ,M − 1.

An example of an output spectrum from an interleaved ADC system with fourADCs with sinusoidal input signal is shown in Figure 1. This distortion causesproblems for instance in a radio receiver where a weak carrier cannot be distin-guished from the mismatch distortion from a strong carrier. It is therefore impor-tant to minimize the impact of the distortion.

1.2 Random interleaving

One way to decrease the impact of the distortion is to randomize the selectionof which ADC that should be used at each time instance. This means that anADC is picked at random at each sampling instance. However, the reason for usingthe interleaved structure is that each A/D converter needs M times the desiredsampling rate to complete the sampling. Therefore only one ADC is available for

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2 Notations and Definitions 217

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

Normalized angular frequency

Sig

nal p

ower

[dB

]

ADC output spectrum

Signal componentOffset error distortionTime and gain error distortion

Figure 1 Simulated output spectrum from interleaved ADC system withfour ADCs. The input signal is a single sinusoid. The distortion is causedby mismatch errors.

selection at each sampling instance. However, to achieve some randomization oneor more extra ADCs can be used [3], see Figure 2. With ∆M additional ADCsthere are always ∆M + 1 ADCs available to select from at each sampling instance.An example of the possible ADC selections for M = 4 and ∆M = 1 is shownin Figure 3. The randomization spreads the spikes in the spectrum to a morenoise-like shape. The spectrum for this kind of ADC system will be calculated indetail in Section 4.

2 Notations and Definitions

In this section we introduce the notation. We assume throughout the rest of thepaper that the overall sampling interval, for the complete ADC system, is Ts = 1.This assumption is done to simplify notation and is no restriction.

We denote by M the number of ADCs required to achieve the desired samplingrate, where each ADC needs the time MTs to complete a conversion. ∆M denotesthe number of additional ADCs used to randomize the spectrum. The total numberof ADCs in the system are M + ∆M . The time, gain and offset errors are denoted∆0t,i,∆

0g,i,∆

0o,i, i = 0, . . . ,M − 1,M, . . . ,M − 1 + ∆M respectively. The sampling

time instances for each ADC are picked at random and Xk denotes the ADC usedat time k. The time instances when the ith ADC is used are denoted ki. We usethe following notation for the signals involved:

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218 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

delay,Ts

clock u

y

y0

y1

yM−1

yM

yM+∆M−1

ADC0

ADC1

ADCM−1

ADCM

ADCM+∆M−1

UX

RANDO

M

M

S

E

EL

CT

Figure 2 Random interleaved ADC system with M times higher samplingrate than in each ADC. ∆M additional ADCs are used to achieve somerandomization, i.e., ∆M + 1 ADCs are available at each sampling instance.

0

1

1

2

2

3

3

3 4

Figure 3 An example of the possible ADC selection order for M = 4 and∆M = 1.

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2 Notations and Definitions 219

• u(t) is the analog input signal.

• u[k] is the input signal, sampled without errors.

• yi[ki] are the output subsequences from the M + ∆M ADCs.

yi[ki] = (1 + ∆0g,i)u(ki + ∆0

t,i) + ∆0o,i + eq[ki] (1)

i = 0, 1, . . . ,M + ∆M − 1.

Here eq[k] is quantization noise. The quantization noise is assumed to be uni-formly distributed and white.

• Xk is a stochastic variable that picks out which ADC should be used at time k.

• y[k] is the multiplexed output signal from the randomized subsequences fromall the ADCs. The subsequences are multiplexed together to form a signal withcorrect time ordering. The output signal can be expressed by

y[k] = (1 + ∆0g,Xk

)u(k + ∆0t,Xk

) + ∆0o,Xk

+ eq[k]. (2)

We assume throughout this paper that u(t) is band limited to the Nyquist fre-quency.

We will next establish a few definitions which will be used later in the paper.A discrete time signal u[k] is said to be quasi-stationary [4] if

mu = limN→∞

1N

N∑k=1

E{u[k]} (3)

Ru[n] = limN→∞

1N

N∑n=1

E{u[k + n]u[k]} (4)

exist, where the expectation is taken over possible stochastic parts of the signal.Analogously, a continuous time signal u(t) is quasi-stationary if

mu = limT→∞

1T

∫ T

0

E{u(t)}dt (5)

Ru(τ) = limT→∞

1T

∫ T

0

E{u(t+ τ)u(t)}dt (6)

exist. A stationary stochastic process is quasi-stationary, with mu and Ru[n] beingthe mean value and covariance function respectively. Assume that u[k] is quasi-stationary. Then the power spectrum of u[k] is defined as [4]:

Φu(eiω) =∞∑

n=−∞Ru[n]e−jωn. (7)

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220 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

Analogously, we define the power spectrum for continuous time signals as

Φu(ω) =∫ ∞−∞

Ru(τ)e−jωτdτ. (8)

We will next define two concepts for measuring the performance of an ADC.Assume that the output y[k] of an ADC consists of a signal part s[k], a distortionpart d[k], and a noise part e[k]

y[k] = s[k] + d[k] + e[k].

Then the SNDR (Signal to Noise and Distortion Ratio) is defined as

SNDR = 10 log10

(E{s2[k]}

E{d2[k]}+ E{e2[k]}

). (9)

The SFDR (Spurious Free Dynamic Range) is defined for a sinusoidal input signalas the distance between the signal component in the spectrum and the strongestdistortion component, measured in dB, see Figure 4.

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

50

SFDR

Normalized angular frequency

Sig

nal p

ower

[dB

]

SFDR definition

Figure 4 The SFDR is defined for a sinusoidal input. SFDR is the differ-ence between the signal component and the strongest distortion component,measured in dB.

3 Main results

The main result of this paper is an expression for the spectrum of the randomlyinterleaved ADC system. In this section we summarize these results. A complete

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3 Main results 221

derivation of the results is given in Section 4.The spectrum of the output signal from a randomly interleaved ADC system is

given by (53)

Φy(eiω) = β∆gΦu(eiω)H∆t

(ω)

+ α∆g

[Φ∆ ∗ (Φu ·H∆t

)](eiω)

+α∆g

ζ(M,∆M)

[Φ∆ ∗ Φ∆ ∗ (Φu · (1−H∆t

))](eiω)

+β∆g

ζ(M,∆M)

[Φ∆ ∗ (Φu · (1−H∆t

))](eiω)

+ α∆oΦ∆(eiω) + 2πβ∆o

δ(ω) + σ2q . (10)

where ∗ denotes convolution. α∆g, (28), and β∆g

, (29), are constants that dependon the gain errors. Similarly α∆o

, (31), and β∆o, (32), are constants that depend

on the offset errors, and

ζ(M,∆M) =M + ∆M − 1M + ∆M

. (11)

Further,

H∆t(ω) =

1(M + ∆M)2

M+∆M−1∑i=0

M+∆M−1∑j=0

cos(ω(∆t,i −∆t,j)), (12)

Φ∆(eiω) = −ζ(M,∆M) + 2Re

{ζeiω(M−1) + η((M − 2)eiω(M−2) + · · ·+ eiω)eiω(M−1) + 1

1+∆M (eiω(M−2) + · · ·+ 1)

}.

and σq is the quantization noise standard deviation.If all the mismatch errors are zero, ∆t = ∆o = ∆g = 0, we get

α∆g= α∆o

= α∆o= 0, β∆g

= 1 (13)

and

H∆t(ω) = 1. (14)

For this case (10) reduces to

Φy(eiω) = Φu(eiω) + σ2q (15)

as expected.In Figure 5 Φ∆(eiω) is shown for M = 8 and ∆M = 1, 4, 16. This plot shows

that the oscillations, and peak value, decrease when the number of additional ADCsis increased. This is expected since higher value of ∆M means that there are more

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222 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

0 1 2 3 4 5 610

−2

10−1

100

101

Normalized angular frequency

∆ M=1∆ M=4∆ M=8

Figure 5 The mismatch noise spectrum Φ∆(eiω) for M = 16 and ∆M =1, 4, 16.

ADCs to choose from at each sampling instance, and the errors are then morerandomized. However

∫ 2π

0Φ∆(eiω)dω is constant, independent of ∆M . When

∆M →∞, Φ∆(eiω) becomes constant.

In Figure 6 an example of a simulated output signal spectrum from a randomlyinterleaved ADC with M = 16, ∆M = 1 and sinusoidal input is shown. The the-oretical spectrum (10) is also shown in this figure. We can see that the simulatedspectrum shows good correspondence to the theoretical spectrum. Figure 7 showsthe output spectrum of a fixed interleaved ADC system with M = 16 for compar-ison. We can see that the SFDR is much better for a randomly interleaved ADCsystem. Measurements have also been done to verify the results on real data. Themeasurements were done on a 12-bit randomly interleaved ADC with M = 16 and∆M = 1. First, the randomization was turned off and only 16 ADCs were used.This is shown in Figure 8, where the input is sinusoidal of a very low frequency.The low frequency is chosen in order to minimize the effect of time errors. Herewe see that the interleaving mismatch causes a lot of distortion. In Figure 9 therandomization is used. Here the distortion peaks are eliminated and we see a spec-trum similar to the theoretical spectrum shown in Figure 6. In this example therandomization improves the SFDR with about 20dB.

In Section 4 a complete derivation of the spectrum (10) is given. Section 4 canbe skipped without loss of continuity and the reader can continue reading fromSection 5.

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3 Main results 223

0 1 2 3 4 5 6

−40

−20

0

20

40Simulated spectrum

Sig

nal p

ower

[dB

]

0 1 2 3 4 5 6

−40

−20

0

20

40Smoothed simulated spectrum

Sig

nal p

ower

[dB

]

0 1 2 3 4 5 6

−40

−20

0

20

40Theoretical spectrum

Sig

nal p

ower

[dB

]

Normalized angular frequency

Figure 6 Output signal spectrum from a randomly interleaved ADC systemwith sinusoidal input. Here M = 16 and ∆M = 1. The upper plot showsthe simulated output spectrum. The middle plot shows a smoothed versionof the simulated spectrum and the lower plot shows the theoretical spectrum(10).

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224 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

0 1 2 3 4 5 6−50

−40

−30

−20

−10

0

10

20

30

40

Normalized angular frequency

Sig

nal p

ower

[dB

]

ADC output spectrum

Figure 7 Output spectrum from a fixed interleaved ADC system with si-nusoidal input and M = 16.

0 1 2 3 4 5 6−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0

Normalized angular frequency

Sig

nal p

ower

[dB

]

Figure 8 Output spectrum from a time interleaved ADC without random-ization.

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4 Mismatch noise spectrum 225

0 1 2 3 4 5 6−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0

Normalized angular frequency

Sig

nal p

ower

[dB

]

Figure 9 Output spectrum from a randomly interleaved ADC system withM = 16 and ∆M = 1.

4 Mismatch noise spectrum

In this section we will calculate the spectrum for the noise introduced by mismatcherrors in a randomly interleaved ADC system. The spectrum for y[k] is given by(7) as

Φy(eiω) =∞∑

n=−∞Ry[n]e−iωn.

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226 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

To calculate the spectrum we need the covariance function (4) for y[k]. Assumingthat the noise eq[k] is independent of the mismatch errors, ∆t,∆g,∆o, we get

Ry[n] = limN→∞

1N

N∑n=1

E(y[k + n]y[k])

= limN→∞

1N

N∑n=1

E

{[(1 + ∆0

g,Xk+n)u(k + n+ ∆0

t,Xk+n)

+ ∆0o,Xk+n

+ eq[k + n]]·[

(1 + ∆0g,Xk

)u(k + ∆0t,Xk

) + ∆0o,Xk

+ eq[k]]}

= E

{(1 + ∆0

g,Xk+n)(1 + ∆0

g,Xk)}·

limN→∞

1N

N∑n=1

E

{u(k + n+ ∆0

t,Xk+n)u(k + ∆0

t,Xk)}

+ E

{∆0o,Xk+n

∆0o,Xk

}+ E

{eq[k + n]eq[k]

}. (16)

In the last equality we have assumed that mu = 0 for notational simplicity. How-ever, this is no restriction, since a mean value different from zero just gives anadditive constant. We have also assumed that the gain errors are independent ofthe input signal, which is a reasonable assumption since the samples are picked atrandom. We introduce the following notation for the respective parts of the lastexpression in (16)

R∆g[n] = E

{(1 + ∆0

g,Xk+n)(1 + ∆0

g,Xk)}. (17)

Ru,∆t[n] = lim

N→∞

1N

N∑n=1

E

{u(k + n+ ∆0

t,Xk+n)u(k + ∆0

t,Xk)}

(18)

R∆o[n] = E

{∆0o,Xk+n

∆0o,Xk

}(19)

Rq[n] = E

{eq[k + n]eq[k]

}. (20)

Using the above notation we can write the covariance for y[k] as

Ry[n] = R∆g[n]Ru,∆t

[n] +R∆o[n] +Rq[n]. (21)

From this, we can calculate the spectrum as

Φy(eiω) = Φ∆g∗ Φu,∆t

(eiω) + Φ∆o(eiω) + Φq(eiω). (22)

Each expression (17-20) will be evaluated separately in the following sections. How-ever, to evaluate these expressions we need a probabilistic model of the ADC sys-tem. This will be investigated next.

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4 Mismatch noise spectrum 227

4.1 Probabilistic model

We will now study the random interleaved ADC system, as described in Figure 2,from a probabilistic viewpoint. We have the notation Xk for the ADC that is usedto convert the signal at time k. Numbering the ADCs from 0 to M + ∆M − 1,we have that Xk ∈ {0, . . . ,M + ∆M − 1}. For the calculation of the covariancefunction in the next subsection we will need the probability that the same ADC isused at a certain time distance, n. We denote this probability by P (Xk+n = Xk).Since each ADC needs the time M to complete the conversion, the probabilityP (Xk+n = Xk) depends on the previous M − 1 time instances. Therefore, tocalculate this probability, we first calculate the joint probability over M − 1 timeinstances. To calculate this probability we introduce 2M−1 states, represented bybinary sequences of length M − 1, that the ADC system can be in at time k + n:

00 . . . 0 ={Xk+n 6= Xk,Xk+n−1 6= Xk, . . . , Xk+n−(M−2) 6= Xk}00 . . . 1 ={Xk+n 6= Xk,Xk+n−1 6= Xk, . . . , Xk+n−(M−2) = Xk}

...11 . . . 1 ={Xk+n = Xk,Xk+n−1 = Xk, . . . , Xk+n−(M−2) = Xk}.

Here a 0 denotes 6= and a 1 denotes =. Since the same ADC cannot be used withina time interval of M − 1, most of these states are illegal.

a1a2 . . . aM−1, is illegal if ai = aj = 1, i 6= j

Removing the illegal states we have M states remaining

10 . . . 001 . . . 0...00 . . . 100 . . . 0.

We first assume that n ≥M − 1. The joint probabilities are denoted as follows:

P(n)10...0 = P (10 . . . 0 at time k + n)

P(n)01...0 = P (01 . . . 0 at time k + n)

...

P(n)00...0 = P (00 . . . 0 at time k + n)

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228 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

and the probability state vector is denoted

P (n) =

P

(n)10...0

P(n)01...0...

P(n)00...1

P(n)00...0

.

These probabilities can be calculated recursively, and we have to treat three casesseparately here:

• P (n)10...0:

If we step back one time instance to time n − 1, we have the possible states00 . . . 0 and 00 . . . 1. However, the probability of going from 00 . . . 1 to 10 . . . 0 iszero since the time distance between the use of the same ADC is M − 1 here.This leaves the only possible previous state, 00 . . . 0, and since there are 1 + ∆MADCs available at each time instance and the probability for selecting any ofthose is equal the probability of going to the state 10 . . . 0 is 1

1+∆M , i.e.,

P(n)10...0 =

11 + ∆M

P(n−1)00...0

• P (n)0...010...0:

Here we have the two possible states 0 . . . 100 . . . 0 and 0 . . . 100 . . . 1 from the timeinstance before, of which only the first state is legal. Since the only possible tran-sition from state 0 . . . 100 . . . 0 one time step ahead is to the state 0 . . . 010 . . . 0the probability of this transition is one, i.e.,

P(n)0...010...0 = 1 · P (n−1)

0...100...0

• P (n)00...0:

In this case we also have two possible states at the previous time instance, 00 . . . 0and 00 . . . 1. Both these states are legal and both transitions are legal. From thestate 00 . . . 1 there is only one possible transition, to the state 00 . . . 0, so theprobability of this transition is one. From the state 00 . . . 0, two transitions arepossible, to 00 . . . 0 and to 10 . . . 0. The latter transition has a probability of

11+∆M according to the discussion in the first point above. This means that thefirst transition has a probability of 1− ∆M

1+∆M = ∆M1+∆M , i.e.,

P(n)00...0 =

∆M1 + ∆M

P(n−1)00...0 + 1 · P (n−1)

00...1 .

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4 Mismatch noise spectrum 229

To summarize, we have a transition probability from time difference n− 1 to timedifference n of

P (n) =

0 0 · · · 0 1

1+∆M

1 0 · · · 0 00 1 · · · 0 0...

.... . .

......

0 0 · · · 1 ∆M1+∆M

︸ ︷︷ ︸

A

P (n−1). (23)

The assumption at the derivation of these probabilities was that n ≥ M − 1.However, we will see that this is true for any n > 0. First consider n = 0. Thenwe know that Xk+n = Xk, i.e.,

P (0) =

10...0

.For 0 < n < M − 1, we have P (n)

10...0 = P(n)00...0 = 0 and

P (n)a1a2...aM−1

={

1 if an = 1, ai = 0, i 6= n0 otherwise ,

which is exactly

P (n) = AP (n−1).

How the probability state vector evolves with the time difference, n, is summarizedby

P 0 P (1) P (2) · · · P (M) P (M+1) · · · P (∞)100...0

010...0

001...0

· · ·

1

1+∆M

00...

∆M1+∆M

∆M(1+∆M)2

11+∆M

0...

(∆M)2

(1+∆M)2

· · ·

1

M+∆M1

M+∆M1

M+∆M...

1+∆MM+∆M

To calculate the covariance function we need the probability P (Xk+n = Xk) whichis equal to P (n)

10...0. This probability can be calculated recursively, for n ≥ 0, by thestate space form

P (n+1) = AP (n) +Bδ[n+ 1] (24)

P (Xk+n = Xk) = CP (n)

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230 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

where A is as defined in (23) and

B =[

1 0 · · · 0]T

C = [ 1 0 · · · 0 ].

Here the driving impulse δ[n+ 1] is used instead of an initial state on P . The statespace form only gives the probabilities for n ≥ 0 but the probability is symmetricin time, so that

P (Xk−n = Xk) = P (Xk+n = Xk).

4.2 Covariance functions

In this subsection we will evaluate the different parts (17-20) of the covariancefunction Ry[n].

We start with the gain error covariance, R∆g[n]. The probabilities are the same,

independent of the ADC number i, which gives

R∆g[n] = E{(1 + ∆0

g,Xk+n)(1 + ∆0

g,Xk)}

= P (Xk+n = Xk)1

M + ∆M

M+∆M−1∑i=0

(1 + ∆0g,i)

2

+ (1− P (Xk+n = Xk))1

(M + ∆M − 1)(M + ∆M)M+∆M−1∑

i=0

∑j 6=i

(1 + ∆0g,i)(1 + ∆0

g,j). (25)

From (24) we can calculate the stationary value by solving P = AP , and from thiswe can calculate

limn→∞

P (Xk+n = Xk) = CP =1

M + ∆M.

This means that R∆g[n] does not converge to zero. We therefore rearrange (25) in

one part, R∆, that converges to zero and a constant.

R∆g[n] = α∆g

R∆[n] + β∆g, (26)

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4 Mismatch noise spectrum 231

where

R∆[n] =(P (Xk+n = Xk)− 1

M + ∆M

), (27)

α∆g=

1M + ∆M − 1

(M+∆M−1∑

i=0

(1 + ∆0g,i)

2 − 1M + ∆M

(M+∆M−1∑

i=0

(1 + ∆0g,i)

)2

(28)

and

β∆g=

1(M + ∆M)2

(M+∆M−1∑

i=0

(1 + ∆0g,i)

)2

. (29)

The offset error covariance, R∆o[n], can be calculated in a similar way as the gain

error covariance function

R∆o[n] = E{∆0

o,Xk+n∆0o,Xk}

= α∆oR∆[n] + β∆o

(30)

where

α∆o=

1M + ∆M − 1

(M+∆M−1∑

i=0

(∆0o,i)

2 − 1M + ∆M

(M+∆M−1∑

i=0

∆0o,i

)2 (31)

and

β∆o=

1(M + ∆M)2

(M+∆M−1∑

i=0

∆0o,i

)2

. (32)

To express the combined time error and signal covariance function, Ru,∆t[n], we

have to involve the continuous time covariance function (6). From the assumptionthat the input signal is band limited to the Nyquist frequency, we have that Ru[n] =Ru(n). This gives

Ru,∆t[n] = lim

N→∞

1N

N∑n=1

E

{u(k + n+ ∆0

t,Xk+n)u(k + ∆0

t,Xk)}

= P (Xk+n = Xk)Ru(n) +{

1− P (Xk+n = Xk)}

1(M + ∆M − 1)(M + ∆M)

M+∆M−1∑i=0

∑j 6=i

Ru(n+ ∆t,i −∆t,j).

This can be rearranged into one part that depends on the probabilistic model (24),and one part that does not

Ru,∆t[n] = R∆[n]

(Ru[n]− Ru,∆t

[n])

+1

M + ∆MRu[n] +

M + ∆M − 1M + ∆M

Ru,∆t[n], (33)

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232 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

where

Ru,∆t[n] =

1(M + ∆M − 1)(M + ∆M)

M+∆M−1∑i=0

∑j 6=i

Ru(n+ ∆t,i −∆t,j). (34)

Finally, we should calculate the quantization noise part of the covariance function.With sufficiently many quantization levels, a uniformly distributed white noise isa good model of the quantization noise [5] for most input signals.

Rq[n] = σ2qδ[n], (35)

where σ2q = q2

12 , [6], and q is the quantization step.

4.3 Spectrum

The spectrum of a product of covariance functions is a convolution of the respectivespectra [7]. This means that we can calculate the spectrum of y[k] from (21) as

Φy(eiω) =1

∫ π

−πΦu,∆t

(ei(ω−γ))Φ∆g(eiγ)dγ + Φ∆o

(eiω) + Φq(eiω). (36)

We will next evaluate each part of (36) separately, starting with Φ∆g(eiω). From

the definition of spectrum and (26), we get

Φ∆g(eiω) = α∆g

∞∑n=−∞

R∆[n]e−iωn + β∆g

∞∑n=−∞

e−iωn. (37)

The second term of (37) can be associated with a Dirac function [8], if we restrictthe domain to ω ∈ [−π, π].

β∆g

∞∑n=−∞

e−iωn = 2πβ∆gδ(ω), ω ∈ [−π, π]. (38)

Next, the first term of (37) will be evaluated. To evaluate this, we need to transformthe state space description (24) to a transfer function

P (Xk+n = Xk) = C(qI −A)−1Bqδ[n]

=qM−1(q − ∆M

1+∆M )

qM−1(q − ∆M1+∆M )− 1

1+∆M

δ[n], n ≥ 0, (39)

where we get the second equality by evaluating the expression C(qI−A)−1B. Theprobability is symmetric so P (Xk+n = Xk) = P (Xk−n = Xk). In the same waywe can write the constant part of (27) as output from a system

1M + ∆M

=1

M + ∆Mq

q − 1δ[n], n ≥ 0. (40)

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4 Mismatch noise spectrum 233

Putting (39) and (40) together and eliminating the pole and zero in q = 1 we get

For n ≥ 0

R∆[n] = P (Xk+n = Xk)− 1M + ∆M

= ζ(M,∆M)qM−1 + η(M,∆M)((M − 2)qM−2 + · · ·+ q)

qM−1 + 11+∆M (qM−2 + · · ·+ 1)

δ[n]

where

ζ(M,∆M) =M + ∆M − 1M + ∆M

and

η(M,∆M) =1

M − 1 +M∆M + (∆M)2.

This means that we can calculate the spectrum as

Φ∆(eiω) =∞∑

n=−∞R∆[n]e−iωn

= −R∆[0] + 2Re

{ ∞∑n=0

R∆[n]e−iωn}

= −ζ(M,∆M) (41)

+ 2Re

{ζeiω(M−1) + η((M − 2)eiω(M−2) + · · ·+ eiω)eiω(M−1) + 1

1+∆M (eiω(M−2) + · · ·+ 1)

}.

In the last expression the dependence on M and ∆M is omitted for η and ζ forconvenience. To summarize, we have

Φ∆g(eiω) = α∆g

Φ∆(eiω) + 2πβ∆gδ(ω), (42)

where Φ∆(eiω) is as defined in (41). The offset error covariance (30) is similar tothe gain error covariance (26) except for the constants α and β. This means thatwe get the offset error spectrum directly from (42) by replacing the constants

Φ∆o(eiω) = α∆o

Φ∆(eiω) + 2πβ∆oδ(ω). (43)

Next, the time error part of the spectrum will be evaluated. Calculating thespectrum from (33) we get

Φu,∆t(eiω) =

1M + ∆M

Φu(eiω) +M + ∆M − 1M + ∆M

Φu,∆t(eiω)

+1

∫ π

−πΦ∆(ei(ω−γ))(Φu(eiγ)− Φu,∆t

(eiγ))dγ. (44)

We have Φ∆(eiω) from (41), and Φu(eiω) is the spectrum of the input signal.What remains to calculate then is Φu,∆t

(eiω), which is the Fourier transform of

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234 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

the covariance function (34). To calculate this we have to start from the continuoustime covariance function. If

R(n) = R(n+ ∆),

we have the “spectrum” [7] (this is not really a spectrum since R(n) is not a realcovariance function, but the sum of these “spectra” is a real spectrum, so we usethe same notation here).

Φ(ω) = Φ(ω)eiω∆. (45)

(This is not really a spectrum since R(n) is not a real covariance function, butthe sum of these “spectra” is a real spectrum, so we use the same notation here.)Using (45) in (34) we get

Φu,∆t(ω) =

Φu(ω)(M + ∆M − 1)(M + ∆M)

M+∆M−1∑k=0

∑j 6=i

eiω(∆t,k−∆t,j). (46)

This can be rewritten as

Φu,∆t(ω) = −Φu(ω) +

Φu(ω)(M + ∆M − 1)(M + ∆M)

·

M+∆M−1∑i=0

M+∆M−1∑j=0

cos(ω(∆t,i −∆t,j)). (47)

The discrete time spectrum can be calculated from the continuous time spectrumusing Poisson’s summation formula [7]. Since we assume that u(t) is band limitedto the Nyquist frequency we have

Φu,∆t(eiω) = Φu,∆t

(ω), ω ∈ [−π, π]. (48)

Putting (47) and (41) into (44) we get

Φu,∆t(eiω) =

1ζ(M,∆M)

(Φ∆ ∗ [Φu · (1−H∆t

)])(eiω) + Φu(eiω)H∆t

(ω), (49)

where ∗ denotes convolution, and

H∆t(ω) =

1(M + ∆M)2

M+∆M−1∑i=0

M+∆M−1∑j=0

cos(ω(∆t,i −∆t,j)). (50)

For small values of ∆t, H∆t(ω) can be approximated by a second order Taylor

expansion

H∆t(ω) ≈ 1− ω2

(M + ∆M)2

M+∆M−1∑i=0

M+∆M−1∑j=0

(∆t,i −∆t,j)2. (51)

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4 Mismatch noise spectrum 235

Finally, the quantization noise part of (36) should be evaluated. Here we haveassumed a white noise model of the quantization, and the spectrum is thereforeconstant

Φq(eiω) = σ2q (52)

To summarize, the output spectrum of the randomly interleaved ADC systemis

Φy(eiω) = β∆gΦu(eiω)H∆t

(ω)

+ α∆g

[Φ∆ ∗ (Φu ·H∆t

)](eiω)

+α∆g

ζ(M,∆M)

[Φ∆ ∗ Φ∆ ∗ (Φu · (1−H∆t

))](eiω)

+β∆g

ζ(M,∆M)

[Φ∆ ∗ (Φu · (1−H∆t

))](eiω)

+ α∆oΦ∆(eiω) + 2πβ∆o

δ(ω) + σ2q . (53)

Here the first term is the signal part of the spectrum, and the rest is noise anddistortion. We can see that even the signal part is somewhat distorted, by multi-plication with H∆t

(ω). However, this is not significant for most applications, sinceH∆t

(ω) ≈ 1 for small values of ∆t.

4.4 Asymptotic properties

If we in (41) let ∆M →∞, while M is kept constant we get

Φ∆(eiω) = 1,

i.e., white noise. This is natural since we then can choose randomly from almostall ADCs at every time instance. Putting this into (53) the output spectrum is

Φy(eiω) = β∆gΦu(eiω)H∆t

(ω)

+ α∆g

12π

∫ π

−πΦu(eiω)dω

+ β∆g

12π

∫ π

−πΦu(eiω)(1−H(ω))dω

+ α∆o+ 2πβ∆o

δ(ω) + σ2q .

The spectrum here consists of the signal spectrum, a Dirac pulse in ω = 0 andwhite noise, where the variance of the white noise depends on the variance of thegain, offset and time errors and the quantization.

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5 Sinusoidal input

So far we have not assumed anything about the input signal. In this section we willevaluate the spectrum with a sinusoidal input and compare it with the case withno additional ADCs, i.e., ∆M = 0. We assume, in this section, an input signal

u(t) = A cos(ω0t).

The spectrum of u(t) is then

Φu(ω) =2πA2

4(δ(ω − ω0) + δ(ω + ω0)). (54)

We assume that A is chosen such that the full range of the ADC is used here. Withan N -bit ADC, the quantization step then is q = 2A

2Nand the quantization noise

variance is σ2q = 4A2

12·22N . With random interleaving we then get the output signalspectrum by putting (54) into (53)

Φy(eiω) =πA2β∆g

2H∆t

(ω0)(δ(ω − ω0) + δ(ω + ω0)

)+A2α∆g

4H∆t

(ω0)(

Φ∆(ei(ω−ω0)) + Φ∆(ei(ω+ω0)))

+A2α∆g

4ζ(M,∆M)

(1−H∆t

(ω0))(

Φ∆ ∗ Φ∆(ei(ω−ω0)) + Φ∆ ∗ Φ∆(ei(ω+ω0)))

+A2β∆g

4ζ(M,∆M)

(1−H∆t

(ω0))(

Φ∆(ei(ω−ω0)) + Φ∆(ei(ω+ω0)))

+ α∆oΦ∆(eiω) + 2πβ∆o

δ(ω) +4A2

12 · 22N. (55)

Here we can see that the sinusoidal spectrum is in the first term, while the rest isnoise and distortion.

5.1 Fixed interleaving

For comparison, we will here evaluate the spectrum for a fixed interleaved ADCsystem (∆M = 0) with sinusoidal input. The covariance function of y[k] is as in(21)

Ry[n] = R∆g[n]Ru,∆t

[n] +R∆o[n] +Rq[n] (56)

which gives the spectrum

Φy(eiω) = Φ∆g∗ Φu,∆t

(eiω) + Φ∆o(eiω) + Φq(eiω). (57)

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5 Sinusoidal input 237

We start with R∆g[n], which is now periodic and symmetric

R∆g[n] =

1M

M−1∑i=0

(1 + ∆0g,i)(1 + ∆0

g,(i−n) modM )

R∆g[M + n] = R∆g

[n]R∆g

[−n] = R∆g[n].

The spectrum is then given by [4]

Φ∆g(eiω) =

2πM

M/2−1∑k=−M/2

Φp∆g(ei2πk/M )δ(ω − 2πk/M), (58)

where

Φp∆g(eiω) =

M−1∑n=0

R∆g[n]e−iωn.

The calculations for R∆o[n] are similar and we get the covariance function

R∆o[n] =

1M

M−1∑i=0

(∆0o,i∆

0o,(i−n) modM

)and the spectrum

Φ∆o(eiω) =

2πM

M/2−1∑k=−M/2

Φp∆o(ei2πk/M )δ(ω − 2πk/M), (59)

where

Φp∆o(eiω) =

M−1∑n=0

R∆o[n]e−iωn.

The above expressions are valid for a general input signal. However, for the timeerror part we restrict the calculations to a sinusoidal input for notational simplicity.The time error covariance function is

Ru,∆t[n] = A2 lim

N→∞

1N

N−1∑k=0

cos(k + n+ ∆t,k+n) cos(k + ∆t,k)

=A2

2limN→∞

1N

N−1∑k=0

(cos(2ω0k + ω0n+ ω0(∆t,k+n + ∆t,k))

+ cos(ω0n+ ω0(∆t,k+n −∆t,k)))

=A2

2M

M−1∑k=0

cos(ω0n+ ω0(∆t,k+n −∆t,k)). (60)

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Calculating the Fourier transform of (60) we get the spectrum

Φu,∆t(eiω) =

πA2

M

M/2−1∑k=−M/2

Φp∆t(ei2πk/M ) ·

(ω −

(ω0 +

2πkM

)[−π,π]

)+ δ

(ω +

(ω0 −

2πkM

)[−π,π]

)]. (61)

where

Φp∆t(eiω) =

M−1∑n=0

R∆t[n]eiωn

and

R∆t[n] =

1M

M−1∑i=0

cos(ω0(∆t,i+n −∆t,i)).

Here ω[−π,π] = ω+n ·2π where n is an integer such that ω[−π,π] ∈ [−π, π]. Putting(58), (59) and (61) into (57) we get the output spectrum for the fixed interleavedADC system

Φy(eiω) =πA2

2M2

M/2−1∑m=−M/2

M/2−1∑k=−M/2

Φp∆g(ei

2πmM )Φpu,∆t

(ei2πkM ) ·

(ω −

(ω0 +

2π(k +m)M

)[−π,π]

)+ δ

(ω +

(ω0 +

2π(k +m)M

)[−π,π]

)]

+2πM

M/2−1∑k=−M/2

Φp∆o(ei2πk/M )δ(ω − 2πk/M) +

4A2

12 · 22N. (62)

An example of the output spectrum from a fixed interleaved ADC system withsinusoidal input and mismatch errors was shown in Figure 1.

5.2 SNDR

In this section we will calculate and compare the SNDR for random interleavedADCs and fixed interleaved ADCs. For the randomly interleaved ADC the signalenergy is

E{s2[k]} =2πA2β∆g

4H∆t

(ω0)∫ π

−π(δ(ω − ω0) + δ(ω + ω0))dω

= πA2β∆gH∆t

(ω0).

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5 Sinusoidal input 239

We get the distortion energy by integrating all but the first term of (55)

E{e2[k]} = πA2α∆gζ(M,∆M) + πA2β∆g

(1−H∆t(ω0))

+ 2πζ(M,∆M)α∆o+ 2πβ∆o

+2πA2

3 · 22N. (63)

If we assume that the mean values of the respective errors are zero, we get

β∆o= 0, β∆g

= 1

α∆o=

1ζ(M,∆M)

σ2∆o, α∆g

=1

ζ(M,∆M)σ2

∆g,

where

σ2∆o

=1

M + ∆M

M+∆M−1∑i=0

∆2o,i

σ2∆g

=1

M + ∆M

M+∆M−1∑i=0

∆2g,i.

Further, if we assume that the time errors are small H∆t(ω) can be approximated

by a Taylor expansion

H∆t(ω) ≈ 1− ω2σ2

∆t,

where

σ2∆t

=1

M + ∆M

M+∆M−1∑i=0

∆2t,i

With these assumptions (63) can be simplified to

E{e2[k]} = πA2(σ2∆g

+ ω20σ

2∆t

+σ2

∆o

A2/2+

23 · 22N

).

With the assumption that the mean values of the errors are zero and that thetime errors are small we get the signal energy for the fixed interleaved case

E{s2[k]} =πA2

M2

M/2−1∑k=−M/2

Φp∆g(ei

2πkM )Φp∆t

(ei2πkM ) ≈ πA2(1− ω2

0σ2∆t

)

and the distortion energy

E{e2[k]} =∫ π

−πΦy(eiω)dω − E(s2[k])

≈ πA2(σ2∆g

+ ω20σ

2∆t

+σ2

∆o

A2/2+

23 · 22N

),

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240 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

which is exactly the same as for the randomly interleaved case.This means that the SNDR is the same for both the randomly interleaved ADC

system and the fixed interleaved ADC system

SNDR =10 log10

πA2(1− ω20σ

2∆t

)

πA2(σ2∆g

+ ω20σ

2∆t

+σ2

∆oA2/2 + 2

3·22N )

(64)

≈− 10 log10(σ2∆g

+ ω20σ

2∆t

+σ2

∆o

A2/2+

23 · 22N

). (65)

This is expected since we cannot change the total amount of distortion by changingthe order in which we select the ADCs. However, the shape of the distortion isvery different between the fixed interleaved and the randomly interleaved case. Ifwe study the SFDR we can see that in the randomly interleaved case there areno δ-spikes in the output spectrum. This means that the SFDR is infinite in therandomly interleaved case.

6 Mismatch error estimation

Since we have quantization noise in the ADC, we do not gain much performanceby decreasing the mismatch error noise below a certain level for the randomlyinterleaved ADC system. This level depends on the number of bits in the ADC.In this subsection we will compare the noise caused by the mismatch errors withthe quantization noise. The comparison can be done in two ways. The first wayis to compare the mean noise, i.e., the SNDR. The other way is to compare themaximum value of spectra. We will evaluate both cases here. We have the SNDRfor an N -bit ADC system from (65)

SNDR ≈ −10 log10(σ2∆g

+ ω20σ

2∆t

+σ2

∆o

A2/2+

23 · 22N

).

If we compare the quantization noise part with the mismatch noise part and cal-culate a limit such that the mismatch error noise contributes less than the quanti-zation noise we get

σ2∆g

+ ω20σ

2∆t

+σ2

∆o

A2/2<

23

4−N . (66)

To give a bound for each type of error we can assume that each part in (66)contributes equally much and further more put ω0 = π to get an upper bound onthe time error part

σ2∆g

<29

4−N (67)

σ2∆t

<2

9π24−N (68)

σ2∆o

<A2

94−N . (69)

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6 Mismatch error estimation 241

If we instead consider the maximum value of the spectrum, the maximum of thenoise part of (55) should be smaller than the quantization noise. The maximumvalue depends on the input signal frequency, therefore we maximize over both ωand ω0.

maxω,ω0

{A2α∆g

4H∆t

(ω0)(

Φ∆(ei(ω−ω0)) + Φ∆(ei(ω+ω0)))

+A2α∆g

4ζ(M,∆M)

(1−H∆t

(ω0))(

Φ∆ ∗ Φ∆(ei(ω−ω0)) + Φ∆ ∗ Φ∆(ei(ω+ω0)))

+A2β∆g

4ζ(M,∆M)

(1−H∆t

(ω0))(

Φ∆(ei(ω−ω0)) + Φ∆(ei(ω+ω0)))

+ α∆oΦ∆(eiω)

}<

4A2

12 · 22N.

If we again split the mismatch errors into three equal parts, we get

σ2∆g

<1

maxω Φ∆(eiω)2ζ(M,∆M)

94−N (70)

σ2∆t

<1

maxω Φ∆(eiω)2ζ(M,∆M)

9π24−N (71)

σ2∆o

<1

maxω Φ∆(eiω)A2ζ(M,∆M)

94−N . (72)

It is hard to find a general analytical solution to maxω Φ∆(eiω), but for M = 2 themaximum is

maxω

Φ∆(eiω) = ζ(M,∆M)(1 +2

∆M). (73)

Putting (73) into (70-72) the upper bounds for the errors are

σ2∆g

<∆M

∆M + 229

4−N

σ2∆t

<∆M

∆M + 22

9π24−N

σ2∆o

<∆M

∆M + 2A2

94−N .

In Figure 10 the dependence of maxω Φ∆(eiω)1

∫ 2π0 Φ∆(eiω)dω

on M is shown for some different

values of ∆M . Figure 11 shows the dependence of maxω Φ∆(eiω)1

∫ 2π0 Φ∆(eiω)dω

on ∆M for somedifferent values of M . These plots give a measure of how far from white noise themismatch noise spectrum is. Increasing M for a constant ∆M gives higher peaks inthe noise spectrum as expected since there are relatively fewer ADCs to choose fromat each sample instance. Increasing ∆M for a constant M decreases the peaks.

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When ∆M → ∞, maxω Φ∆(eiω)1

∫ 2π0 Φ∆(eiω)dω

→ 1 for any value of M , which corresponds towhite noise. This means that increasing ∆M gives better performance, but it alsoincreases the hardware cost.

0 2 4 6 8 10 12 14 160

2

4

6

8

10

12

14

16

18

M

max

Φ(ω

)/∫ 02π

Φ(ω

)dω

∆ M=1∆ M=2∆ M=3

Figure 10 maxω Φ∆(eiω)1

∫ 2π0 Φ∆(eiω)dω

is plotted as a function of M for ∆M = 1, 2, 3.

The maximum value increases with M as expected since there are relativelyfewer ADCs to choose from at each sample instance.

If the offset errors are known, the output signal can be corrected from the offseterrors [9] by subtracting the offset from the respective subsequences

z(∆0

o)i [ki] = yi[ki]−∆0

o,i.

Assuming that the input signal is quasi-stationary and zero mean, we get

myi = ∆0o,i.

This means that we can estimate the offset error by

For i = 0, . . . ,M + ∆M − 1

∆o,i =1Ni

∑ki

yi[ki],

where Ni is the number of samples in the sequence yi.If the gain errors are known, the offset corrected signal can be further corrected

with the gain errors [9]

z(∆0

o,∆0g)

i [ki] =1

1 + ∆0g,i

z(∆0

o)i [ki].

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6 Mismatch error estimation 243

1 2 3 4 5 6 7 80

2

4

6

8

10

12

14

16

18

20

∆ M

max

Φ(ω

)/∫ 02π

Φ(ω

)dω

M=2M=4M=8M=16

Figure 11 maxω Φ∆(eiω)1

∫ 2π0 Φ∆(eiω)dω

is plotted as a function of ∆M for M =2, 4, 8, 16. The maximum value decreases with ∆M as expected since thereare more ADCs to choose from at each sample instance.

The gain errors can be estimated by taking the mean absolute value of each offsetcorrected subsequence

For i = 0, . . . ,M + ∆M − 1

∆g,i =1Ni

∑ki|z(∆o)i [ki]|

1M+∆M

∑M+∆M−1j=0

{1Nj

∑kj|z(∆o)j [kj ]|

} − 1. (74)

In a fixed time interleaved ADC system the time errors can also be estimated [10,11]. In a randomly interleaved ADC system, the time errors are harder to estimatesince that requires that we study the difference between samples, and the samplesare not taken in the same order here. However, if the gain and offset errors aredominating it can still be useful to estimate the gain and offset.

Assume that the samples of y[ki] are independent and identically distributed.This is not really true, but since the time instances for the subsequences are pickedat random it is a rather good approximation. Under these assumptions the meanvalues are approximately Gaussian distributed according to the central limit theo-rem, if Ni is large enough

∆o,i = myi =1Ni

∑ki

y[ki] ∈ N(

∆o,i,σ2u

Ni(1 + ∆0

g,i)2

)(75)

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244 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

and

m|z(∆o)i | =

1Ni

∑ki

|z(∆o)i [ki]| ∈ N

((1 + ∆0

g,i)m|u|,σ2|u|Ni

(1 + ∆0g,i)

2

). (76)

The distribution of (76) is actually only valid if ∆o = ∆0o, but it is approximately

valid with small deviations from the true value. The denominator of (74) also hasan approximately Gaussian distribution. But since the same value is used for theestimation of all ∆g,i, an error in this value, just gives a bias to the all gain errorestimates and does not affect the gain error noise spectrum. This means that wecan treat it as a constant, and we get from (76)

∆g,i ∈ N

(∆0g,i,

σ2|u|

m2|u|Ni

(1 + ∆0g,i)

2

). (77)

If we assume that the gain errors are small we can simplify (75) and (77) to

∆o,i ∈ N(

∆o,i,σ2u

Ni

)and

∆g,i ∈ N

(∆0g,i,

σ2|u|

m2|u|Ni

).

Furthermore, a sum of squares of N(0, 1)-distributed variables is χ2-distributedwith M − 1 + ∆M degrees of freedom [12].

M−1+∆M∑i=0

(∆o,i −∆0o,i)

2

σu/√Ni

∈ χ2(M − 1 + ∆M)

and

M−1+∆M∑i=0

(∆g,i −∆0g,i)

2

σ|u|/m|u|√Ni∈ χ2(M − 1 + ∆M).

If we assume that Ni ≈ N for all i, we can make confidence intervals for σ2∆o

andσ2

∆g

σ2∆o

<σ2u

N

χ2α(M + ∆M − 1)M + ∆M

and

σ2∆g

<σ2|u|

m2|u|N

χ2α(M + ∆M − 1)M + ∆M

,

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6 Mismatch error estimation 245

2 4 6 8 10 12 14 1610

0

102

104

106

108

1010

1012

Number of bits

Req

uire

d am

ount

of d

ata

M=2M=4M=8M=16

Figure 12 Required amount of estimation data to get the offset mismatchnoise below the quantization noise. The confidence level is here 0.95 and∆M = 1.

2 4 6 8 10 12 14 1610

0

102

104

106

108

1010

1012

Number of bits

Req

uire

d am

ount

of d

ata

M=2M=4M=8M=16

Figure 13 Required amount of estimation data to get the gain mismatchnoise below the quantization noise. The confidence level is here 0.95 and∆M = 1.

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246 Paper D Analysis of Mismatch Effects in Randomly Interleaved...

where 1− α is the confidence level. This means that to achieve the mean boundsfor an N -bit ADC, (67) and (69), we need

N >σ2u

A2

χ2α(M + ∆M − 1)M + ∆M

9 · 4N (78)

for the offset error estimates and

N >σ2|u|

m2|u|

χ2α(M + ∆M − 1)M + ∆M

92

4N (79)

for the gain error estimates. Similarly, to achieve the max bounds, (70) and (72),we need

N >σ2u

A2

χ2α(M + ∆M − 1)M + ∆M − 1

9 maxω

Φ∆(ω)4N (80)

for the offset error estimates and

N >σ2|u|

m2|u|

χ2α(M + ∆M − 1)M + ∆M − 1

9 maxω Φ∆(ω)2

4N (81)

for the gain error estimates. In Figure 12 and 13, the required amount of data toestimate offset and gain are shown for varying number of bits, i.e., equations (80)and (81). In these figures the confidence level is 0.95 and ∆M = 1. The plots arehere generated for sinusoidal input, but the results are similar with other inputsignals.

7 Conclusion

With time interleaving, the sample rate of an ADC system can be increased a lot.However, since the ADC in the time interleaved array cannot be made exactlyidentical, mismatch errors in time, gain and offset will occur in the system. Themismatch causes distortion in the output signal, which severely decrease the SFDR.

One way to decrease the impact of the mismatch errors, is to randomize theorder in which the ADCs are used. Additional ADCs are then used in the inter-leaved ADC system to enable two or several ADCs to select from at each samplinginstance. By doing this the mismatch distortion is transformed to a more noise-likeshape. In this paper we have studied the randomly interleaved ADC system froma probabilistic viewpoint. In Section 4 we have presented a probabilistic model forthe ADC system and derived the spectrum caused by mismatch errors. We havealso calculated how small the errors must be to give less noise contribution thanthe quantization for a given number of bits. In Section 6 we have discussed howthe offset and gain errors can be estimated and compensated for. We have alsocalculated how much estimation data that is required to get the mismatch noisebelow the quantization noise.

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References 247

References

[1] Y.-C. Jenq, “Digital spectra of nonuniformly sampled signals: A robust sam-pling time offset estimation algorithm for ultra high-speed waveform digitizersusing interleaving,” IEEE Transactions on Instrumentation and Measurement,vol. 39, no. 1, pp. 71–75, February 1990.

[2] J. Elbornsson and J.-E. Eklund, “Blind estimation of timing errors in in-terleaved AD converters,” in Proc. ICASSP 2001, vol. 6. IEEE, 2001, pp.3913–3916.

[3] M. Tamba, A. Shimizu, H. Munakata, and T. Komuro, “A method to improveSFDR with random interleaved sampling method,” in ITC International TestConference, 2001, pp. 512–520.

[4] L. Ljung, System Identification, Theory for the user, 2nd ed. Prentice-Hall,1999.

[5] B. Widrow, I. Kollar, and M.-C. Liu, “Statistical theory of quantization,”IEEE Transactions on Instrumentation and Measurement, vol. 45, no. 2, pp.353–361, April 1996.

[6] R. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Con-verters. Kluwer Academic Publishers, 1994.

[7] M. Hayes, Statistical digital signal processing and modeling. Wiley, 1996.

[8] F. Gustafsson, L. Ljung, and M. Millnert, Digital Signalbehandling. Stu-dentlitteratur, 2001, in Swedish.

[9] J. Elbornsson, J.-E. Eklund, and F. Gustafsson, “Blind adaptive equalizationof mismatch errors in time interleaved A/D converter system,” Submitted toIEEE Transactions on Circuits and Systems – Part I: Fundamental Theoryand Applications, 2003.

[10] ——, “Equalization of time errors in time interleaved ADC system – part I:Theory,” Submitted to IEEE Transactions on Signal Processing, 2003.

[11] ——, “Equalization of time errors in time interleaved ADC system – part II:Analysis and examples,” Submitted to IEEE Transactions on Signal Process-ing, 2003.

[12] G. Blom, Sannolikhetslara med tillampningar. Studentlitteratur, 1984, inSwedish.

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PhD Dissertations, Division of Automatic Control, Linkoping University

M. Millnert: Identification and control of systems subject to abrupt changes. Thesisno. 82, 1982. ISBN 91-7372-542-0.

A.J.M. van Overbeek: On-line structure selection for the identification of multivariablesystems. Thesis no. 86, 1982. ISBN 91-7372-586-2.

B. Bengtsson: On some control problems for queues. Thesis no. 87, 1982. ISBN91-7372-593-5.

S. Ljung: Fast algorithms for integral equations and least squares identification problems.Thesis no. 93, 1983. ISBN 91-7372-641-9.

H. Jonson: A Newton method for solving non-linear optimal control problems withgeneral constraints. Thesis no. 104, 1983. ISBN 91-7372-718-0.

E. Trulsson: Adaptive control based on explicit criterion minimization. Thesis no. 106,1983. ISBN 91-7372-728-8.

K. Nordstrom: Uncertainty, robustness and sensitivity reduction in the design of singleinput control systems. Thesis no. 162, 1987. ISBN 91-7870-170-8.

B. Wahlberg: On the identification and approximation of linear systems. Thesis no.163, 1987. ISBN 91-7870-175-9.

S. Gunnarsson: Frequency domain aspects of modeling and control in adaptive systems.Thesis no. 194, 1988. ISBN 91-7870-380-8.

A. Isaksson: On system identification in one and two dimensions with signal processingapplications. Thesis no. 196, 1988. ISBN 91-7870-383-2.

M. Viberg: Subspace fitting concepts in sensor array processing. Thesis no. 217, 1989.ISBN 91-7870-529-0.

K. Forsman: Constructive commutative algebra in nonlinear control theory. Thesis no.261, 1991. ISBN 91-7870-827-3.

F. Gustafsson: Estimation of discrete parameters in linear systems. Thesis no. 271,1992. ISBN 91-7870-876-1.

P. Nagy: Tools for knowledge-based signal processing with applications to system iden-tification. Thesis no. 280, 1992. ISBN 91-7870-962-8.

T. Svensson: Mathematical tools and software for analysis and design of nonlinearcontrol systems. Thesis no. 285, 1992. ISBN 91-7870-989-X.

S. Andersson: On dimension reduction in sensor array signal processing. Thesis no.290, 1992. ISBN 91-7871-015-4.

H. Hjalmarsson: Aspects on incomplete modeling in system identification. Thesis no.298, 1993. ISBN 91-7871-070-7.

I. Klein: Automatic synthesis of sequential control schemes. Thesis no. 305, 1993. ISBN91-7871-090-1.

J.-E. Stromberg: A mode switching modelling philosophy. Thesis no. 353, 1994. ISBN91-7871-430-3.

K. Wang Chen: Transformation and symbolic calculations in filtering and control.Thesis no. 361, 1994. ISBN 91-7871-467-2.

T. McKelvey: Identification of state-space models from time and frequency data. Thesisno. 380, 1995. ISBN 91-7871-531-8.

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J. Sjoberg: Non-linear system identification with neural networks. Thesis no. 381, 1995.ISBN 91-7871-534-2.

R. Germundsson: Symbolic systems – theory, computation and applications. Thesisno. 389, 1995. ISBN 91-7871-578-4.

P. Pucar: Modeling and segmentation using multiple models. Thesis no. 405, 1995.ISBN 91-7871-627-6.

H. Fortell: Algebraic approaches to normal forms and zero dynamics. Thesis no. 407,1995. ISBN 91-7871-629-2.

A. Helmersson: Methods for robust gain scheduling. Thesis no. 406, 1995. ISBN91-7871-628-4.

P. Lindskog: Methods, algorithms and tools for system identification based on priorknowledge. Thesis no. 436, 1996. ISBN 91-7871-424-8.

J. Gunnarsson: Symbolic methods and tools for discrete event dynamic systems. Thesisno. 477, 1997. ISBN 91-7871-917-8.

M. Jirstrand: Constructive methods for inequality constraints in control. Thesis no.527, 1998. ISBN 91-7219-187-2.

U. Forssell: Closed-loop identification: Methods, theory, and applications. Thesis no.566, 1999. ISBN 91-7219-432-4.

A. Stenman: Model on demand: Algorithms, analysis and applications. Thesis no. 571,1999. ISBN 91-7219-450-2.

N. Bergman: Recursive Bayesian estimation: Navigation and tracking applications.Thesis no. 579, 1999. ISBN 91-7219-473-1.

K. Edstrom: Switched bond graphs: Simulation and analysis. Thesis no. 586, 1999.ISBN 91-7219-493-6.

M. Larsson: Behavioral and structural model based approaches to discrete diagnosis.Thesis no. 608, 1999. ISBN 91-7219-615-5.

F. Gunnarsson: Power control in cellular radio systems: Analysis, design and estima-tion. Thesis no. 623, 2000. ISBN 91-7219-689-0.

V. Einarsson: Model checking methods for mode switching systems. Thesis no. 652,2000. ISBN 91-7219-836-2.

M. Norrlof: Iterative learning control: Analysis, design, and experiments. Thesis no.653, 2000. ISBN 91-7219-837-0.

F. Tjarnstrom: Variance expressions and model reduction in system identification.Thesis no. 730, 2002. ISBN 91-7373-253-2.

J. Lofberg: Minimax approaches to robust model predictive control. Thesis no. 812,2003. ISBN 91-7373-622-8.

J. Roll: Local and Piecewise Affine Approaches to System Identification Thesis no. 802,

2003. ISBN 91-7373-608-2.