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    DECLARATION

    I, Timothy Andambike, declare that to the best of my knowledge the project presented here

    as part of the fulfillment for the award of Bachelor degree in electrical engineering is a work

    of my origin. All references used from books, articles, reports, papers etc in preparation ofthis project have their sources acknowledged in the reference list.

    Signature

    Timothy Andambike

    !ay "#$%

    Supervised by

    Signature....

    !r. &dimba

    !ay "#$%

    i

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    ACKNOWLEDGEMENT

    /irst of all I would like to thank our creator the Almighty 0od for giving me these chances

    to pursue the Bachelor degree in engineering programmed and preparation of this project

    report.

    I would like to e+tend my thanks to my project supervisor !r. &dimba .T for his valuable

    advice and guidance during the planning as well as implementation of this work.

    I am also deeply indebted to the project coordinator -r. A. 1ilimo for the help and

    directives he e+tended to me while preparing this project.

    !y thanks and appreciation should also go to all academic staff of electrical engineering

    department for the tireless advices, assistances supports and encouragement towards making

    this project successful.

    !y appreciation are also due to my employer for trusting and granting me the opportunity

    for pursuing studies at -IT. I also e+tend my thanks to my fellow workers who supported me

    in one way or another in fulfillment of this task.

    Also special thanks to my family members for their encouragement and support throughoutthe preparation of this work.

    As it is not possible to thank everyone, I would like to thank all people who have helped

    and inspired me during my project.

    iii

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    TABLE OF CONTENTS

    -()2A3ATI*&........................................................................................................................I

    ABST3A)T..............................................................................................................................II

    A)1&*42(-0(!(&T.......................................................................................................III

    TAB2( */ )*&T(&TS.........................................................................................................I5

    2IST */ S6!B*2S...............................................................................................................5I

    2IST */ TAB2(S.....................................................................................................................5

    2IST */ /I073(S8................................................................................................................5I

    2IST */ ABB3(5IATI*&S.................................................................................................5II

    )A9T(3 *&(.......................................................................................................................5$.$ I&T3*-7)TI*&8..........................................................................................................5

    $.". 93*B2(! STAT(!(&T.............................................................................................."

    $.:. 93*;()T *B;()TI5(S..............................................................................................."

    $.:.$. !AI& *B;()TI5(8................................................................................................:

    $.:.". S9()I/I) *B;()TI5(S8.......................................................................................:

    $.%. !(T*-*2*06..........................................................................................................:

    $.7(&)( */ T( 93*;()T................................................:

    )A9T(3 T4*........................................................................................................................ B"#$% &i'gr'( #) *+ -ig" "i 8#0r -/-*( $#$*& *# *+ "ig+*ig

    'rr-*r.

    ".%.% A33(ST(3S S(2()TI*& A&- A992I)ATI*&S

    The primary objective in arrester application is to select the lowest rated surge arrester

    that will provide ade'uate protection of the e'uipment insulation and be rated such that it will

    have a satisfactory service life when connected to the power system. An arrester of the

    minimum rating is preferred because it provides the highest margin of protection for the

    e'uipment insulation system. There is a fine line between protection and service life of a

    surge arrester. igher arrester ratings will increase the capability of the arrester to survive on

    a specific power system but reduce the margin of protection provided for the insulation level

    of the e'uipment it is protecting. Therefore, one should consider both issues of arrester

    survival and e'uipment protection when selecting surge arresters.The best location for installation of a surge arrester is as close as possible to the e'uipment

    it is protecting, preferably at the terminals where the line is connected to the e'uipment. This

    is based on the mathematics of wave theory addressing incident and reflected waves at a

    junction Dor protected e'uipment terminalE. 2ead length for the connection of the surge

    arrester to the e'uipment terminals and to ground should be minimied and installed as

    straight, minimiing bends in the leads, as possible. This will ensure that the surge energies

    are shunted to ground by the most direct path.

    ++ii

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    Increases in the lead length will reduce the protection capabilities of the surge arrester, due

    to the additional increase of impedance in the lead.

    The rating of the arrester is defined as the 3!S voltage at which the arrester passes the duty

    cycle test as defined by the referenced standard.

    There are some basic considerations when selecting the appropriate surge arrester for a

    particular application, these are8

    $. )ontinuous system voltages

    ". Temporary over voltages

    :. Switching surges Dmore often considered for transmission voltages of $:"k5 and higher,

    capacitor banks, and cable applicationsE

    %. 2ightning surges

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    normal voltage continuously applied to the arrester will be the full phase?to?phase voltage,

    even though the arresters are connected line to ground.

    2.3.3.2. TEMPORARY OVER VOLTAGES

    Temporary over voltages DT*5E can be caused by a number of system events, such as

    switching surges, line?to?ground faults, load rejection and ferro resonance. The system

    configuration and operating practices should be evaluated to identify the most probable forms

    and causes of temporary over voltages. If detailed transient system studies or calculations are

    not available, it is acceptable, as a minimum, to consider the over voltages due to single line?

    to?ground faults. The configuration and details of the system grounding will determine the

    over voltages associated with single line?to?ground faults. The arrester application standards,

    gives the guidance in determining the magnitude of over voltages associated with single line?

    to?ground faults. The primary effect of temporary overvoltageD T*5E on metal?o+ide

    arresters is the increased current and power dissipation, and a rising arrester temperature.

    These conditions affect the protection and survivability characteristics of the arrester.

    The arresters T*5 capability must meet or e+ceed the e+pected temporary over voltages of

    the system. Temporary overvoltage capabilities have been defined independent of system

    impedance and are valid for the voltages applied at the arrester location.

    2.3.3.. SWITCHING SURGES

    The arresters ability to dissipate switching surges can be 'uantified to a large degree in

    terms of energy. The unit used in 'uantifying the energy capability of metal?o+ide arresters is

    kilo;oulesFkilo5olt Dk;F k5E.

    The ma+imum amount of energy that may be dissipated are defined assuming multiple

    discharges distributed over a one?minute period. In applications where the discharges are

    distributed over a longer period of time, arresters will have considerably more capability. As

    noted previously, arresters applied correctly can repeat these capabilitiesK therefore, after a

    one?minute rest period the above discharges may be repeated. The one?minute rest period

    allows the diskDsE temperature distribution to reach e'uilibrium and become uniform. These

    energy ratings assume that the switching surges occur in a system having surge impedances

    of several hundred ohms, which would be typical for overhead transmission lines. In low

    impedance circuits having cables or shunt capacitors as elements, the energy capability metal?

    o+ide arresters may be reduced because currents can e+ceed the values noted.

    ++iv

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    2.3.3.3 SYSTEM CONFIGURATION

    1nowing the system configuration, wyeFdelta, grounded or ungrounded, is a key factor in

    selecting an arrester rating. The arrester nominal ratings for various utiliation system

    voltages Dline?to?lineE are based on the systems grounding configuration.

    If the system is solidly grounded, then a lower?rated arrester can be chosen. If the system is

    ungrounded, impedance grounded or temporarily ungrounded, then a higher arrester rating

    must be chosen to compensate for the potential of a higher continuous voltage, or !)*5,

    being impressed on the arrester for an e+tended period of time. *ther than a solidly grounded

    system, any other system configuration is considered to be effectively ungrounded and a

    higher arrester rating should be chosen. 1nowing the system configuration and choosing the

    correct arrester rating is critical in averting an application where the arrester can potentially

    have a failure and cause violent end of life.

    2.3.3.4 ARRESTER FAILURE AND PRESSURE RELIEF

    If the capability of an arrester is e+ceeded, the metal?o+ide diskDsE may crack or puncture.

    Such damage will reduce the arrester internal electrical resistance.

    This condition will limit the arresters ability to survive future system conditionsK it does not

    jeopardie the insulation protection provided by the arrester.

    In the unlikely case of complete failure of an arrester, a line?ground arc will develop and

    pressure will build up inside the housing. This pressure will be safely vented to the outside

    and an e+ternal arc will be established provided the fault current is within the pressure relief

    fault current capability of the arrester. This low?voltage arc maintains e'uipment protection.

    *nce an arrester has safely vented, it no longer possesses its pressure reliefFfault current

    capability and should be replaced immediately. /or a given application, the arrester selected

    should have a pressureFfault current capability greater than ma+imum short?circuit currentavailable at the intended arrester location. This rating of arrester capability should include

    appropriate allowances for future growth in the system.

    2.3.3.5 FAILURE MODES OF SURGE ARRESTERS

    An arrester failure may appear in different ways8

    1. An arrester with porcelain housing may in worst case e+plode and cause severe

    damages to the surroundings.

    ++v

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    Such a failed arrester is shown in /igure ".. In case of arresters with polymer

    housing, the housing may burst open, but the risk for objects being scattered is more

    limited.

    2. The arrester can be causing an earth fault due to internal flashovers etc. Such

    arresters can be difficult to locate.

    3. Aged or overloaded arresters may show reduced protection against overvoltage, i.e.

    during severe transient overvoltage, for instance due to multiple lightning stroke or

    high?energy temporary overvoltage, the arrester can fail before it actually has

    suppressed the overvoltage.

    Thus, the apparatus that the arrester is set to protect may be subject to overvoltage that can

    cause damage to it.

    Figur.2.?: M*'" O,i& Surg Arr-*r@ MOSA 0i*+ 8#r$"'i +#u-ig *+'* )'i"&

    $'*'-*r#8+i$'""/ i -r;i$.

    2.3.3.< ARRESTERS SELECTION AND APPLICATIONS SUMMARY

    The arrester selection and application process should include a review of all system

    stresses, service conditions e+pected, and system?grounding configuration Dgrounded or

    effectively ungroundedE at the arrester installation location. System stresses shall include

    continuous operating voltage, temporary over voltages, and switching surges. If arresters

    of different ratings are re'uired to meet these individual criteria, then the highest resulting

    arrester rating should be chosen.

    ++vi

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    /igure below shows various sies of porcelain housed lightning arresters used in the system.

    Figur.2.19.P#r$"'i +#u-& "ig+*ig 'rr-*r- #) ;'ri#u- -i- '& r'*ig.

    ++vii

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    9A3A!(T(3S

    A&&7A2 T(!9(3AT73( "

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    The resistivity depends on the amount of salts dissolved in its moisture .

    .2..2 M'-ur(* #) 'r*+ r-i-*'$-.

    (arth resistance measurements at different distribution transformers was done using a digital

    (arth and 3esistivity Tester as outlined below. (arth resistance measurement with the : polemethod .

    Figur .2: C+'u;i Ar#u, E'r*+ '& R-i-*i;i*/ T-*r. Nu(!r C.A 53

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    Figur . : E'r*+ %i*:)#r ('-urig ,i-*ig 'r*+ r-i-*'$-

    Pr#$&ur- )#r ('-ur(*

    $. Turn off the installation power supply and disconnect it from the (arth by opening the

    ground terminal bar.

    ". Short?circuit the terminals ( and (S using the corresponding terminal bar and connect

    them to the earth point to be measured.

    :. 9ush rod as deep as possible into the ground at a distance HA from the earth to be

    measured.

    It is advisable to have the distance HA greater than "

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    1A!4(&( "=

    !I4A&0A&I $"

    111T 3(2I&I %

    !I(!B(&I