anita4 trigger verification › ... › fw_journal › a4_trigverification.pdf · simulation input...
TRANSCRIPT
ANITA4 Trigger Verification
2
3
Signal Flow
4
Verilog/VHDL synthesis
iSim Testbench
iceMC nu generator
iSim (interactive)[FUSE/ batch]
Energy, production model
*.root (signal, trig)
iceMCtrig_extract_tclGen.C
*.tcl (stimuli)
Simulation Input Verification
5
Parse, generate *.tcl code (1)
6
Parse, generate *.tcl code (2)
7
Execute *.tcl code
8
restartrun 2000nsresumeisim force add mid_lcp 10 -time 104ns -radix bin -cancel 112nsisim force add mid_rcp 01 -time 2ns -radix bin -cancel 10nsisim force add bot_lcp 01 -time 14ns -radix bin -cancel 22nsrun 200nsisim force add mid_rcp 01 -time 86ns -radix bin -cancel 94nsisim force add bot_rcp 01 -time 84ns -radix bin -cancel 92nsrun 200nsisim force add top_lcp 10 -time 88ns -radix bin -cancel 96nsisim force add top_lcp 11 -time 92ns -radix bin -cancel 100nsisim force add top_rcp 11 -time 90ns -radix bin -cancel 98nsisim force add mid_lcp 01 -time 82ns -radix bin -cancel 90nsisim force add mid_lcp 11 -time 84ns -radix bin -cancel 92nsisim force add mid_rcp 01 -time 82ns -radix bin -cancel 90nsisim force add mid_rcp 11 -time 86ns -radix bin -cancel 94nsisim force add bot_lcp 10 -time 82ns -radix bin -cancel 90nsisim force add bot_lcp 11 -time 84ns -radix bin -cancel 92nsisim force add bot_rcp 11 -time 82ns -radix bin -cancel 90nsrun 200nsisim force add top_lcp 11 -time 90ns -radix bin -cancel 98nsisim force add top_rcp 10 -time 90ns -radix bin -cancel 98nsisim force add top_rcp 11 -time 92ns -radix bin -cancel 100nsisim force add mid_lcp 11 -time 84ns -radix bin -cancel 92nsisim force add mid_rcp 10 -time 84ns -radix bin -cancel 92nsisim force add mid_rcp 11 -time 86ns -radix bin -cancel 94nsisim force add bot_lcp 10 -time 82ns -radix bin -cancel 90nsisim force add bot_lcp 11 -time 84ns -radix bin -cancel 92nsisim force add bot_rcp 10 -time 82ns -radix bin -cancel 90nsisim force add bot_rcp 11 -time 84ns -radix bin -cancel 92ns
run 200nsisim force add top_lcp 10 -time 94ns -radix bin -cancel 102nsisim force add top_rcp 01 -time 92ns -radix bin -cancel 100nsisim force add mid_lcp 10 -time 88ns -radix bin -cancel 96nsisim force add bot_lcp 01 -time 92ns -radix bin -cancel 100nsisim force add bot_rcp 10 -time 86ns -radix bin -cancel 94nsrun 200nsrun 200nsrun 200nsisim force add mid_lcp 10 -time 22ns -radix bin -cancel 30nsrun 200nsrun 400nsStop end of eventresume
source ../sim/*.tcl
Example outputs
9
Event 27
Event 4