anna sfyrla - university of geneva ieee, rome 2004 the detector control system for the atlas...

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University of Geneva The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University of Geneva on behalf of the ATLAS SCT collaboration IEEE, Rome 2004 SCT DCS

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Page 1: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

The Detector Control System for the

ATLAS SemiConductor Tracker Assembly Phase

Anna SfyrlaUniversity of Geneva

on behalf of the ATLAS SCT collaboration

IEEE, Rome 2004

SCTDCS

Page 2: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

The ATLAS SemiConductor Tracker (SCT)

1.53 m

5.6 m

1.0

4 m

9 disks

9 disks

4 barrel layers

ModuleSCT Building Block

Constructed by 4 p-n strip silicon detectors & FE electronics

768*2 strips & active length of 123.2 mm

Silicon surface: ~62 m² -> 4088 modules -> ~6.3 million readout channels

* ~760 cables & ~2400 fibers required to transfer information from these channels

* Cooling System keeping electronics, modules and cables at low temperature

* Hundreds of sensors providing information about the environmental parameters

the coherent and safe operation of the detector demands a stable Detector Control

System

Page 3: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Detector Control System (DCSDCS)

DCS

Hardware and

Software Interlocks

ActionsHandling

Warnings

AlarmsErrors

Interactionwith

LHC Acceleratorand

External Systems

Interactionwith other

Subdetectors

DCSDistributed Back-End (BE) System

Running on PCsFront-End (FE) Systems (sensors, controllers…)

Supervisory Control and Data Acquisition System (SCADA) -> PVSS II

Hierarchical organization simulates the natural mapping of the experiment

Final State Machine (JCOP)States and transitions handling

Embedded Local Monitor Board (ELMB)Standard Analog&Digital I/O

Radiation hard – Low power consumption

CANbus

Detectors are complicated systems with huge number of parameters to be monitored and controlled-> Powerful DCS is needed to ensure their safe and coherent operation!

Common Architecture for all the LHC experiments (Joint Controls Project – JCOP)

Page 4: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Global Control Station

Subdetector Control Station

LocalControl Station

Hardware

FE System

Communication

PCsPVSS Projects

DCS Hierarchy

Page 5: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

SCT DCS HardwareCooling SystemSystem common for SCT and Pixels

• Radiation Damage = f(Temperature) -> operational temperature of the two detectors: -7°C• Initial testing and warm startup at temperatures ~ +15°C• Thermal stability better than 2 °C and tolerance to thermal shocks

-> flexible cooling system required!flexible cooling system required!

Evaporative fluorcarbon system Liquid C3F8

non-flammablenon-conductiveradiation resistant

Controlled by Programmable Logical Controllers (PLCs)

Page 6: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

SCT DCS Hardware

All sensors monitored by software

Cooling sensors monitored by Cooling sensors monitored by additional hardware interlockadditional hardware interlock

BBIM Crate with the IBOXes

BBIM : Building Block Interlock MonitoringIBOX : Interlock BoxIMatrix: Interlock MatrixSIC : System Interlock CardCC : Crate ControllerPS : Power SuppliesOPT : Optical Decoupling

Temperature sensors (NTC thermistors)• temperature in the outlets of the cooling pipes• temperature near the edge of the support structure • air temperature inside the detector

Humidity sensors (Xeritron)• humidity inside the detector

All sensors monitored by software

Cooling sensors monitored by Cooling sensors monitored by additional hardware interlockadditional hardware interlock

Thermal Enclosure• Detector in controlled environmental conditions• Monitoring of temperature, humidity and pressure

Environmental System

Schematic Layout of the Interlock System

Page 7: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

SCT DCS HardwarePower Supplies SystemProvide the modules with power and slow control signals

Provide the DCS with current, voltage and temperature information from the modules

Low Voltage (LV) cardControls 4 channelsOutputs Logical Signals for the FE electronics

Analogue Voltage (Vcc) andDigital Voltage (Vdd) for the hybridVCSEL Voltage andPIN bias Voltage for the optical communication of the module

High Voltage (HV) cardControls 8 channelsProvides bias voltage to the detector

Crate Controller (CC)ELMB based interface for the Communication of the LV and HV cards

Power Pack (PP)Redundant powering of the crates

System Interlock Card (SIC)Interface between PS and Interlock

Page 8: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

PS GUIPower Supplies Diagnostic Panels

Global Monitoring of a crate

Overview Panels

Page 9: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Final State Machine (FSM)

ATLAS Subdetector Supervisor : Common Infrastructure Control Station (CIC)SCT supervisor : PS Project

SCT DCS BE SystemProjects’ Features

• Monitoring and Control of all possible values• Additional functionalities where needed

(IV curves, dew point calculation…) • PVSS archiving for storing running conditions & trending for plotting parameters’ values• Configuration files for loading & storing system information

• Warnings and Alarms from ENVR and Cooling systems propagated to the PS system (Distributed Projects)

- Temperature & Humidity Limitations- Voltage & Current Limitations

• DAQ & DCS Communication (DDC) The two projects are sharing common databases

Page 10: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

SCT AssemblySCT Assembly proceeding in: Oxford (Barrels)

Liverpool & NIKHEF (Endcaps)

Modules on Barrels and EndcapsComplete DCS chain

Evaporative cooling systemInterlock system installedPower Supplies installed

-> System set tested successfully

Pictures taken at Oxford, by Georg Viehhauser. More about assembly at Oxford in his talk.

Page 11: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Final Assembly Site: CERN

Dedicated facility for the Inner Detector Assembly and Integration

SR1 Building

SCT Integration

Thermal Enclosure - All the cables are installed in the barrel support structure

A Crate installed in the Rack Area

Page 12: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Single Barrel – Full Barrel – Endcap Acceptance Tests -> Verification of the proper function of each component after transportation and before final assembly

700 cables and 2400 fibers installed in defined mapping and tested- 2 cables with defects- No faults in the fibers

Long term tests in all the DCS components- Thermal Enclosure monitoring- Detector Environmental monitoring- Cooling monitoring- Permanent use of the Power Supplies Project

Disk Sector with modules mounted on- Fitted with Cooling Pipes and Environmental Sensors- Monitoring of up to 6 modules successful

DCS Chain in the ATLAS Testbeam- Modules powered using the PS DCS; - System working!

-> IV of 1 module using the PS Project (September 2004)

Acceptance Tests

SCT Testbeam 2004

Temperature monitoring using the Envr ProjectPVSS Trending Tool used

Page 13: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

DCS Performance Tests

• Immediate Communication between the distributed projects (Ethernet Speed)-> Messages exchanged immediately

0.9ms separation between the messages in the long PS CANbus cable (100% Occupancy); 60% CANbus Occupancy; 11 crates on a CANbus;

-> 4s between each readout of all the parameters (11crates x 1500parameters/crate).

• 6s needed to switch off a crate- result reproducible many times;- still the same if more than one crates switched off simultaneously

Good Performance is an important issue since the system gets more and more complicated- for single barrel acceptance tests up to 15 crates used simultaneously;- for full barrel acceptance tests up to 44 crates used simultaneously;- 355 environmental sensors mounted on the four-barrel system;- later, disks integrated…

Page 14: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

Conclusions & Future PlansSCT Module Production reaching an end

Module assembly on Barrels & Endcaps underway

BE & FE DCS Systems ready for acceptance tests

Extensive DCS Testing & Upgrading Vital for the security and performance of the Detector

……Looking forward to testing the SCT fully assembled!Looking forward to testing the SCT fully assembled!

Looking forward to see such pictures…

…not only in simulations!

Page 15: Anna Sfyrla - University of Geneva IEEE, Rome 2004 The Detector Control System for the ATLAS SemiConductor Tracker Assembly Phase Anna Sfyrla University

Anna Sfyrla - University of Geneva IEEE, Rome 2004

27 km circumferenceoperating luminosity 1034cm-2s-1

bunch spacing 25ns -> ~23 collisions per bunch crossing

The LLarge HHadron CCollider (LHCLHC) at CERN

7 TeV beam energy