appd ecn description of revision 2. all capacitance …€¦ · mco 056-01585 brd 820-00229 sch...
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MCO 056-01585BRD 820-00229SCH 051-00482 System Block Diagram:
<rdar://problem/16684269>Schematic & PCB Callouts
D11 MLB - PVT
1 OF 81
SYSTEM:MECHANICAL COMPONENTS
SOC:JTAG,USB,XTAL
WIFI_MLB SCHEMATIC
PERENNIAL
63
LAST_MODIFICATION=Wed Jul 6 08:55:26 2016
24
<SYNC_DATE5>
<SYNC_MASTER90>
46
51
UAT MATCH AND TUNER [3]
TRANSCEIVER0/1: TX PORTS
METROCIRC [2]
page1
CELL,WIFI,NFC
I2C MAP: AP, TOUCH, HOMER, I2C5
<SYNC_DATE46>
SOC:GPIO & UART
4
<SYNC_MASTER71>
14
B2B FILTERS: UTAH
67
B2B FF SPECIFIC
NFC
WIFI FRONT-END [77]
page1
spare
TRISTAR 2
27
spare
<SYNC_MASTER86>
8
10
Accessory: Buck Circuit
AUDIO:SPEAKER AMP 2
79
41
ARC:MAGGIE
30
29
BOM_OMIT_TABLE
PMU: CONTROL AND CLOCKS
38
DISPLAY & MESA:POWER
77
SENSORS
B2B:FOREHEAD
B2B:NEVADA
B2B:DOCK FLEX
I2C MAP AOP
I2C TABLE
spare
spare
MLB UNIQUE
BASEBAND: POWER2
BASEBAND: CONTROL
TRANSCEIVER0/1: POWER
RECEIVE MATCHING
TDD TRANSMIT
FDD TRANSMIT
2
5
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spare
SYSTEM POWER:CHARGER
1
16
PMU: SWITCHERS AND LDOS
27
18
12
<SYNC_MASTER85>
<SYNC_MASTER84>
TEST POINTS & BOOT CONFIG
BASEBAND GPIOS
SYSTEM:EEEE CALLOUTS
SYSTEM:BOM TABLES
TABLE OF CONTENTS
3
15
<SYNC_DATE2>
<SYNC_MASTER53>
SOC:POWER (3/3)
NAND
SYSTEM POWER:BATTERY CONN
CAMERA:STROBE DRIVER
ARC:DRIVER
SYSTEM: BOARDID
15
SOC:SERIAL
B2B FILTERS: DISPLAY & TOUCH
B2B:ORB & MESA
36
10
72
<SYNC_DATE30>
SOC:POWER (2/3)
SOC:AOP
AUDIO:CALTRA CODEC (2/2)
<SYNC_DATE80>
ICEFALL, SIM, DEBUG_CONN
<CSA_PAGE79> <SYNC_MASTER79>
<SYNC_MASTER72>
<SYNC_MASTER1>
<SYNC_MASTER2>
<SYNC_DATE90>
<SYNC_MASTER81>
page1
52
<SYNC_DATE3>
TRANSCEIVER0/1: PRX PORTS
LOWER ANTENNA & COUPLERS
DIVERSITY RECEIVE ASM'S
DIVERSITY RECEIVE LNA'S
UPPER ANTENNA FEEDS
PMU: ET MODULATOR<CSA_PAGE78>78
LARGE FORM FACTOR SPECIFIC
TRINITY:FF SPECIFIC
SYSTEM POWER:PMU (1/3)
SOC:PCIE
SYSTEM POWER:BOOST
11
12
SOC:POWER (1/3)
AUDIO:CALTRA CODEC (1/2)
B2B FILTERS: RIGHT BUTTON FLEX
AUDIO:SPEAKER AMP 1
SOC:MIPI AND ISP
<CSA_PAGE82>
81
<SYNC_MASTER3>
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:PMU (2/3)
<SYNC_DATE52>
59
SOC:LPDP
SCH,MLB,D11051-00482
2016-07-0600065328798 ENGINEERING RELEASED
1 OF 53
8.0.0
TABLE OF CONTENTS
SYNC_DATE=03/01/2016SYNC_MASTER=david-copyTABLE OF CONTENTS
820-00229 1 CRITICAL ?PCBPCBF,MLB,D11-12
051-00482 SCH CRITICAL ?SCH,MLB,D11-121
CONTENTSPAGE <CSA> SYNC DATESYNC<CSA> CONTENTSPAGEDATE
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
Global R/C Alternates
Load Switch OMIT TABLE
UT LDO Alternates
Magnesium Alternates
updated 11/12
Power Inductor Alternates
Active Diode Alternate
Global Varistor Alternates
Global Ferrite Alternates
NAND BOM Options Acc Buck Alternates
DDR PLL Alternate
Mamba LDO Alternates
I2C5 Alternate
updated 11/12
reverted 11/13
For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts
Except BUCK5 LX (BUCK5 LX is Taiyo only)
MUR+KYO 15UF
N&V 15uF Cap Alternates
CPU
GPU + GPU_SRAM
#22686038:See Radar
2 OF 81
2 OF 53
8.0.0
051-00482
5 NAND_128GCRITICALCAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733138S00003
138S00003 5 CRITICALC1748,C1713,C1716,C1721,C1733 NAND_256GCAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402
CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C17335 CRITICAL NAND_32G138S0867
NAND,T,256GB,3Dv3,TLC335S00183 CRITICAL NAND_256G1 U1701
335S00182 SD,15nm,TLC,128GBALTERNATE335S00179 U1701
ALL138S0652 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0648 ALTERNATE
ALTERNATE ALL132S0400 132S0436 CAP,X5R,0.22UF,6.3V,01005,TDK
138S0986 ALTERNATE ALL138S00024 CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
138S0739 ALTERNATE138S0945 ALL CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA
138S00005 (C1813, C1820, C1827) CAP,X5R,15UF,6.3V,0.65MM,0402,TYALTERNATE138S00003
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 ALTERNATE138S00003 (C1838, C1843, C1845)
138S00005 ALTERNATE138S00003 (C1819, C1826, C1832) CAP,X5R,15UF,6.3V,0.65MM,0402,TY
132S0436 ALTERNATE ALL CAP,CER,X5R,0.22UF,20%,6.3V,20%132S0400
353S01007 CRITICAL1 ONSEMI,IC,LOAD,SWITCH,WLCSP4 U2710,NFCSW_RF
Q2700,Q2701 PFET,12V,CSP4376S00164 ALTERNATE376S00166
152S00558 ALTERNATE L2700152S00557 IND,MLD,0.47UH,2.5A,80Mohm,1608
SYNC_MASTER=Sync SYNC_DATE=06/29/2016
SYSTEM:BOM TABLES
Larger Wafer (-29 flow) Magnesium338S00203 ALTERNATE U2402338S00173
CAP, 3-TERM, 4.3UF, 4V, 0402ALLALTERNATE138S0835138S00006
CAP, X5R, 4.3UF, 4V, 0610138S0657 ALTERNATE ALL138S0702
138S0706 138S0739 ALLALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,MURATA
152S00297 ALL152S1843 ALTERNATE CYNTEC 2012 1UH
ALTERNATE152S00077 IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016ALL152S00397
IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012152S00121 152S00081 ALTERNATE ALL
ALTERNATE ALL RES, 3.92K, 0.1%, 0201118S0764 118S0717
ALTERNATE152S00398 152S00204 ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012
IND,MULT,1UH,1.2A,0.320 OHM,0603152S00366152S00402 ALLALTERNATE
IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225ALTERNATE152S1936152S00123 ALL
ALTERNATE IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016152S00074152S00117 L1806,L1810,L1814,L1816,L1817
FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE155S0581 ALL155S00067
FERR BD, 150OHM, TDKALLALTERNATE155S00194 155S0610
377S0140 ALL377S0168 ALTERNATE VARISTOR, 6.8V, 100PF, 01005
FERR, 240OHM, 0.38OHM DCR, 0201155S0581 ALTERNATE ALL155S00067
376S00047 ALTERNATE376S00106 Q2101 DIODES INC. ACT DIODE
ALTERNATE ST, LDO REG, 2.75V353S00576353S00932 U3801
353S00889 353S00015 U2501ALTERNATE ST, LDO REG, 2.925V, CSP 0.65x0.65
I2C5 ALTERNATEALTERNATE335S00234 335S00233 U1101
ALTERNATE FERR BD, 0.47UH, TY152S00489 ALL152S00456
FERR BD, 150OHM, TYALLALTERNATE155S00200 155S0610
FLTR, 65 OHMS, 0605155S00012 ALLALTERNATE155S00168
ALTERNATE371S00064371S00087 D2700 DIODE,SHOTTKY,30V,200MA,0201
ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016152S00075152S00118
152S00120 ALTERNATE For Chestnut inductor onlyALL152S00077
ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005155S00068155S00095
ALL138S00003 ALTERNATE138S00048 CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 138S00003 ALTERNATE (C1834, C1866, C1414)
138S00005 138S00003 ALTERNATE CAP,X5R,15UF,6.3V,0.65MM,0402,TY(C1814, C1821, C1828)
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 138S00003 (C1833, C1839, C1865)ALTERNATE
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 138S00003 (C1401, C1408, C1434)ALTERNATE
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 138S00003 (C1837, C1842, C1844)ALTERNATE
138S00005 138S00003 ALTERNATE CAP,X5R,15UF,6.3V,0.65MM,0402,TY(C1818, C1825, C1831)
CAP,X5R,15UF,6.3V,0.65MM,0402,TY138S00005 ALTERNATE138S00003 (C1806, C1810)
ALTERNATE152S00365 152S00297 ALL CYNTEC 2012 1UH
U1701ALTERNATE335S00169 S,16nm,MLC,32GB335S00209
NAND,H,32GB,16nm,MLC NAND_32GCRITICAL1 U1701335S00169
335S00180 U1701 T,15nm,TLC,128GBALTERNATE335S00182
335S00182 NAND,H,128GB,16nm,TLC1 U1701 CRITICAL NAND_128G
U1701335S00183 SS,3Dv3,TLC,256GB335S00190 ALTERNATE
335S00148 335S00183 SD,3Dv2,TLC,256GBU1701ALTERNATE
335S00182 SS,1Ynm,TLC,128GB335S00195 ALTERNATE U1701
335S00201 ALTERNATE T,15nm,MLC,32GBU1701335S00169
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
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TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
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TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
D11 EEEE CALLOUTS
2.2uF CAP Alts
SIP Alternates
CAYMAN OMIT TABLE
CAYMAN DDR Alternates
3 OF 81
3 OF 53
8.0.0
051-00482
ALTERNATE ALL339M00009 339M00003 TRINITY BLUE,STATS
ALTERNATE ALL339M00008 339M00002 NEO,STATS
SYNC_MASTER=david-copy SYNC_DATE=03/01/2016
SYSTEM:EEEE CALLOUTS
ALL138S0831 ALTERNATE CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATA138S00032
CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERAALLALTERNATE138S00049 138S00032
EEEE_D11_EXTREME_CH825-6838 EEEE CODE FOR 639-02462 EEEE_H8C31 CRITICAL
CRITICALEEEE_H8CK EEEE_D11_SUPREME_CH1 EEEE CODE FOR 639-02465825-6838
EEEE_H3RQ825-6838 EEEE_D11_EXTREME_ROWCRITICALEEEE CODE FOR 639-021401
339S00257 U07001 CRITICALCAYMAN, DDR-H, 3G, B1
EEEE_H3RP1 CRITICAL825-6838 EEEE CODE FOR 639-02139 EEEE_D11_SUPREME_ROW
ALL339S00258 DDR-S, 3G, B1339S00257
EEEE_D11_BEST_JPEEEE CODE FOR 639-01812 EEEE_GY2T1825-6838 CRITICAL
EEEE CODE FOR 639-018141 CRITICAL825-6838 EEEE_D11_EXTREME_JPEEEE_GY2W
EEEE_GY2V1825-6838 EEEE_D11_SUPREME_JPCRITICALEEEE CODE FOR 639-01813
EEEE CODE FOR 639-02138825-6838 1 CRITICALEEEE_H3RN EEEE_D11_BEST_ROW
CRITICAL825-6838 1 EEEE_H8C1EEEE CODE FOR 639-02460 EEEE_D11_BEST_CH
ALTERNATE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
TABLE_5_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
Current as of D11 MCO 056-01585 rev. 63
NEO Stiffener
VDD_MAIN
ACCESSORY ID AND POWER
FIDUCIALS
Contained in radio_mlb pages
100k to 200k#25244799
IN THE FACTORY FIXTURE. TP IS TO HELP WITH USB SI
O
PTH per Rev63 for 1.8mm Drill
AMUX
MOJAVE
#25046211
FORCE DFU
DFU
Note: Fiducial used as test point
POWER
VBATT
POWER GROUND
VBUS
TESTPOINTS
TOP SIDE
E75
O
LCM BACKLIGHT SOURCE (3/4)
LCM BACKLIGHT SOURCE
LCM
LCM BACKLIGHT SINK3
LCM BACKLIGHT SINK4
LCM BACKLIGHT SINK1
LCM BACKLIGHT SINK2
ANALOG MUX A OUTPUT
FOR DIAGS
Back Shields
Front Shields
O
Note: Fiducial used as test pointANALOG MUX B OUTPUT
4 OF 81
4 OF 53
8.0.0
051-004821CL0401
1
BS0404
1
BS0401
1
BS0415
2
1R0413
2
1 C0413
1
FD0411
1TP0423
1
FD0407
2
1 C04162
1 C04152
1 C0414
2
1 C0406
2
1 C0412
2
1 C0405
2
1 C0411
2
1 C04222
1 C0421
2
1 C0404
2
1 C0410
2
1 C0403
2
1 C0409
2
1 C04202
1 C0419
2
1 C0402
2
1 C0408
2
1 C0401
2
1 C0407
2
1 C04182
1 C0417
1TP0418
1TP0419
1TP0417
1TP0410
1TP0411
1TP0409
1TP0401
1TP0400
1TP0413
1TP0412
1TP0416
1TP0407
1TP0406
1TP0405
1TP0404
1TP0403
1TP0402
1TP0414
1
FD0408
1TP0408
1TP0415
1TP0422
1TP0420
1TP0421
1
BS0406
1SH0402
1 SH0400
1SH0403
1SH0401
1
BS0403
1
BS0405
1
BS0402
1
FD0410
1
FD0409
1
FD0406
1
FD0405
1
FD0404
1
FD0403
1
FD0402
1
FD0401
1
FD0400
PMU_AMUX_AY
PP_LCM_BL34_CAT1_CONN
PP_LCM_BL_CAT2_CONN
PP_LCM_BL_ANODE_CONN
PP16V0_MESA
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP1_CONN_N
PP_TRISTAR_ACC1
PP_TRISTAR_ACC2
PP_LCM_BL_CAT1_CONN
PMU_TO_AP_FORCE_DFU
PP5V0_USB
PP_LCM_BL34_CAT2_CONNPP_VDD_MAIN
NORTH_SCREW_EXPOSED
MESA_TO_BOOST_EN
PMU_AMUX_BY
90_TRISTAR_DP2_CONN_N
CHASSIS_GND_BS403
CHASSIS_GND_BS402
CHASSIS_GND_BS401
CHASSIS_GND_BS402 CHASSIS_GND_BS403CHASSIS_GND_BS401
TRISTAR_CON_DETECT_L
90_TRISTAR_DP1_CONN_P
PP_LCM_BL34_ANODE_CONN
PP_BATT_VCC
SYNC_MASTER=sync SYNC_DATE=05/17/2016
SYSTEM:MECHANICAL COMPONENTS
ROOM=TESTTP-P55
TP-P55ROOM=TEST
ROOM=TESTTP-P55
STDOFF-2.9OD1.9ID-0.85H-SM
SM
SHLD-SOFT-LOWER-BK-D11
SHLD-SOFT-UP-BK-D11
SM
SM
SHLD-LOWER-FRT-D11
SHLD-UP-FRT-D11
SM
STDOFF-2.9OD0.81H-SM
STDOFF-2.9OD0.888H-SM
STDOFF-2.9OD0.888H-SM
0P5SM1P0SQ-NSPFID
ROOM=ASSEMBLY
0P5SM1P0SQ-NSPFID
ROOM=ASSEMBLY
ROOM=ASSEMBLY
FID0P5SQ-SMP3SQ-NSP
0P5SM1P0SQ-NSP
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
FID
FID
ROOM=ASSEMBLY
0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
FID0P5SQ-SMP3SQ-NSP
FID
ROOM=ASSEMBLY
0P5SQ-SMP3SQ-NSP
FID0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
SM
CLIP-COAX-RETENTION-D11
2.70R1.80-NSP
2.70R1.80-NSP
UP_RFFE
2.70R1.80-NSP
MF01005
ROOM=SOC
1/32W1%200K
01005C0G-CERM10V5%220PF
FID0P5SQ-SMP3SQ-NSP
TP-P55ROOM=TEST
FID
ROOM=TEST
0P5SM1P0SQ-NSP
16VNP0-C0G
+/-0.1PF4PF
01005
16V
18PF2%
01005CERM
25V5%
NP0-C0G-CERM01005
56PF
NP0-C0G
4PF16V
01005
+/-0.1PF
4PF+/-0.1PF
NP0-C0G01005
16V
2%
CERM16V
01005
18PF
CERM16V2%18PF
01005
16V+/-0.1PF4PF
NP0-C0G0100501005
16VCERM
2%18PF
5%25V
01005NP0-C0G-CERM
56PF
NP0-C0G-CERM
5%
01005
25V
56PF
01005
16V5%
NP0-C0G
100PF
NP0-C0G
5%16V
01005
100PF
25V5%
01005
56PF
NP0-C0G-CERM01005
16V
100PF
NP0-C0G
5%
220PF10V5%
01005C0G-CERM
220PF5%10V
01005C0G-CERM
C0G-CERM01005
10V5%220PF
C0G-CERM01005
10V
220PF5%
C0G-CERM10V
220PF5%
0100501005
5%10V
220PF
C0G-CERM
TP-P55ROOM=TEST
ROOM=TESTTP-P55
ROOM=TESTTP-P55
TP-P55ROOM=TEST
ROOM=TESTTP-P55
ROOM=TESTTP-P55
ROOM=TESTTP-P55
TP-P55ROOM=TEST
TP-P55ROOM=TEST
TP-P55ROOM=TEST
TP-P55ROOM=TEST
ROOM=TESTTP-P55
ROOM=TESTTP-P55
ROOM=TESTTP-P55
ROOM=TESTTP-P55
ROOM=TESTTP-P55
TP-P55ROOM=TEST
ROOM=TESTTP-P55
0P5SM1P0SQ-NSPFID
ROOM=TEST
ROOM=TESTTP-P55
ROOM=TESTTP-P55
20
46 45
45 39
45 39
38 37
41 40
41 40
41 40
41 40
45 39
20 12
41 40 21
46 45 53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9
38 37
20
41 40
4
4
44 4
4 4 44 4
41 40
41 40
46 45
22 21
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
0=FORM FACTOR A, 1=FORM FACTOR B
01000 D10 MLB
01011 D11 DEV
SELECTED -->
1011 EVT
xxxx SPARE
1000 CARRIER
xxxx SPARE
0010 DVT
0=FORM FACTOR A, 1=FORM FACTOR B
BOARD_ID0=No connect
01001 D10 DEV
01110 D111 MLB
01111 D111 DEV
01100 D101 MLB
01010 D11 MLB
0=EUREKA, 1=KAROO
0=MLB, 1=DEV
FLOAT=LOW, PULLUP=HIGH
1110 PROTO1
1101 PROTO2
SELECTED -->
BOOT_CONFIG0=No connect
110 SLOW SPI0 TEST
101 NVME0 X1 TEST
111 FAST SPI0 TEST
FLOAT=LOW, PULLUP=HIGH
1100 PROTO2.5
0=EUREKA, 1=KAROO
100 NVME0 X1
FLOAT=LOW, PULLUP=HIGH
010 NVME0_X2
BOARD_ID[4:0]
000 SPI0
BOOT_CONFIG[2:0]
001 SPI0 TEST MODE
011 NVME0 X2 TEST
xxxx SPARE
0000 PVT
1111 Pre-Proto w/D520 (non enclosure)
BOARD IDBOOT CONFIG
BOOT_CONFIG1=No connect
BOARD_ID4=No connect
01101 D101 DEV
BOARD_REV[3:0]
SELECTED -->
BOOTSTRAPPING:BOARD REV
5 OF 81
PP1V812
5 OF 53
8.0.0
051-00482
21R0509
21R0505
21R0502
21R0508
21R0504
21R0503
21R0501BOARD_ID1
BOARD_ID2
BOARD_REV0
BOARD_ID3
BOARD_REV1
BOARD_REV3
BOARD_REV2
MAKE_BASE=TRUE PP1V8
MAKE_BASE=TRUE
SYSTEM: BOARDIDSYNC_DATE=03/01/2016SYNC_MASTER=david-copy
1.00KMF
5%1/32W
ROOM=SOCNOSTUFF
01005
MF5%
1/32W
1.00KROOM=SOC
01005
NOSTUFF
MF01005 1/32W
1.00KROOM=SOC
5%
01005 MF5%
1.00K1/32W
ROOM=SOC
MF 5%
ROOM=SOC 1.00K01005
NOSTUFF
1/32W
NOSTUFF
5%MF01005 1/32W
1.00KROOM=SOC
1/32W
1.00K5%MF01005
ROOM=SOC11
11
12
11
12
12
12
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
6 OF 81
6 OF 53
8.0.0
051-00482
spareSYNC_DATE=06/06/2016SYNC_MASTER=Sync
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
tbd - tbd V @5mA MAX
3.14-3.46V @20mA MAX
VDD18_USB: 1.71-1.89V @20mA MAXSOC - USB, JTAG, XTAL
Dev ONLY
VDD18_AMUX: 1.62-1.98V @1mA MAX
VDD11_XTAL:1.06-1.17V @TBD mA MAX
8.0.0
051-00482
7 OF 53
7 OF 81
CL42CM42
CK35
CC25
CG26
CE25
AJ60
CL20
CG50
CH26
CK26
CJ26
CM26CL26
CM20CM22
BJ2
BL3
BL65
CL29
CK33
CG37CJ35
CH37
CL31
BJ4
CM14
BJ3
N64
U0700
1
PP0701
2
1 R0700
2
1 C0705
2
1 C0702
2
1 R0701
21
R070231
42
Y0700
2
1 C0703
21
FL0700
2
1 C0704
2
1 C0701
2
1 C0700
SWD_DOCK_TO_AP_SWCLK
PP1V8
PP3V3_USB
PP1V8
AP_TO_PMU_TEST_CLKOUT
SWD_DOCK_BI_AP_SWDIO
PMU_TO_SYSTEM_COLD_RESET_L
PMU_TO_AOP_TRISTAR_ACTIVE_READY
AP_TO_NAND_RESET_L
XTAL_AP_24M_IN
PP1V1
AP_USB_REXT
SOC_24M_O
XTAL_AP_24M_OUT
USB_VBUS_DETECT
AP_TO_PMU_AMUX_OUT
90_USB_AP_DATA_P
AP_TO_PMU_WDOG_RESET
PP1V1_XTAL
PP0V9_SOC_FIXED
90_USB_AP_DATA_N
SOC:JTAG,USB,XTAL
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
CKPLUS_WAIVE=PWRTERM2GND
CSPCAYMAN-2GB-20NM-DDR-M
OMIT_TABLE
P2MM-NSMSM
01005
1/32WMF
1%200
ROOM=SOC
ROOM=SOC0201-1X5R-CERM
20%6.3V
2.2UF
16VCERM
12PF5%
01005ROOM=SOC
MF
ROOM=SOC
1/32W
01005
1%511K
01005
0%
MF
0.00
1/32W
ROOM=SOC
ROOM=SOCCRITICAL
1.60X1.20MM-SM
24.000MHZ-30PPM-9.5PF-60OHM
16V5%
01005CERM
12PF
ROOM=SOC
01005
240-OHM-25%-0.20A-0.9DCR
ROOM=SOC
01005ROOM=SOCX5R-CERM
20%6.3V
0.1UF
01005X5R-CERM
20%6.3V
0.1UF
ROOM=SOC
01005X5R-CERM
ROOM=SOC
6.3V
0.1UF20%
40
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
30 19
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
20
40
20 13
40 37 20 13
17
18 15
21
20
40
20
18 15 10 9 8
40
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
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A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NCNCNC
NCNC
SYM 1 OF 16
VDD1
2_UH
1_HS
IC0
VDD_
FIXE
D_US
B
VDD3
3_US
B
VDD1
1_XT
AL
ANALOGMUX_OUT
WDOG
XO0XI0
USB_REXT
USB_ID
UH1_HSIC0_DATAUH1_HSIC0_STB
JTAG_TRST*JTAG_TDO
JTAG_SEL
CFSB
COLD_RESET*
TST_CLKOUT
S3E_RESET*
JTAG_TMSJTAG_TDI
JTAG_TCK
TESTMODE
HOLD_RESET
VDD1
8_US
B
VDD1
8_AM
UX
USB_DMUSB_DP
USB_VBUS
PP
NC
VDD12_PCIE: 1.14-1.26V @10mA MAX
SOC - PCIE INTERFACES
VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX
LINK 1 USED ON AP_DEV ONLY
PCIE
LIN
K 0
PCIE
LIN
K 1
PCIE
LIN
K 2
PCIE
LIN
K 3
WLAN RX PP's are now managed on Page 52
VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX
#24557655:replace with 20% caps. SI no negative impact
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF
8 OF 81
PCIE_WLAN_BI_AP_CLKREQ_L 52
90_PCIE_AP_TO_WLAN_REFCLK_P 52
PCIE_AP_TO_WLAN_RESET_L52
90_PCIE_AP_TO_WLAN_REFCLK_N 52
PCIE_BB_BI_AP_CLKREQ_L 52
90_PCIE_AP_TO_BB_REFCLK_P 52
PCIE_AP_TO_BB_RESET_L52
90_PCIE_AP_TO_BB_REFCLK_N 52
8 OF 53
8.0.0
051-00482CC
47BW
55
CA60
CA55
CE60
CE55
CC62
CC53
CE49
CC49
CE58
CK63CJ63
CM57CL57
CM50CL50
CK44CJ44
CM61CL61
CK56CJ56
CK52CJ52
CM46CL46
CG63
CL64CM64
CK59CJ59
CL54CM54
CJ48CK48
BJ66
BE64BG64
BJ65
CH57CG57
BE66
BE65BG66
BC64
U0700
2
1 R0801
2
1 C080421
R0803
21
R0804
2
1R0806
2
1 R0800
2
1 R0802
2
1 R0805
21C0810
21C0809
21C0808
21C0807
2
1 C0806
2
1 C0805
2
1 C0803
2
1 C0802
2
1 C0801
2
1 C0800
PCIE_AP_TO_NAND_RESET_L
90_PCIE_AP_TO_NAND_TXD_P90_PCIE_AP_TO_NAND_TXD_N
90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N
90_PCIE_AP_TO_NAND_TXD_C_P
90_PCIE_NAND_TO_AP_RXD_P
90_PCIE_AP_TO_NAND_REFCLK_P
PCIE_NAND_BI_AP_CLKREQ_L
90_PCIE_AP_TO_NAND_TXD_C_N 90_AP_PCIE3_TXD_C_N90_AP_PCIE3_TXD_C_P
90_AP_PCIE3_RXD_C_N90_AP_PCIE3_RXD_C_P
90_AP_PCIE2_RXD_C_P
AP_PCIE_RCAL
PP1V2_SOC_PCIE_REFBUF
PP0V9_SOC_FIXED_PCIE_REFBUF
PP0V9_SOC_FIXED
PP1V8
PP1V2_SOC
90_AP_PCIE2_TXD_C_N90_AP_PCIE2_TXD_C_P
90_AP_PCIE2_RXD_C_N
90_PCIE_AP_TO_NAND_REFCLK_N
90_PCIE_NAND_TO_AP_RXD_C_P
SOC:PCIESYNC_DATE=06/06/2016SYNC_MASTER=Sync
CAYMAN-2GB-20NM-DDR-MCSP
100K
ROOM=SOC
5%
MF01005
1/32W
0.1UF
ROOM=SOC
6.3V20%
X5R-CERM01005
ROOM=SOC
MF01005
1/32W
0.00
0%
MF01005
0.00
ROOM=SOC
0%1/32W
100K5%
ROOM=SOC
MF01005
1/32W
3.01K
ROOM=SOC
1%
MF01005
1/32W
1/32W
100K5%
ROOM=SOC
MF01005
ROOM=SOC
100K5%
MF01005
1/32W
20%X5R
0.22UFROOM=SOC
010056.3V
GND_VOID=TRUE
20%X5R
ROOM=SOC01005
GND_VOID=TRUE
0.22UF6.3V
0.22UFGND_VOID=TRUE
20%X5R
6.3V01005
ROOM=SOC
20%X5R 01005
0.22UFGND_VOID=TRUE
6.3VROOM=SOC
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC
2.2UF20%6.3VX5R-CERM0201-1
ROOM=SOC
0.1UF6.3V20%
X5R-CERM01005
01005ROOM=SOC
X5R-CERM6.3V20%0.1UF
0.1UF
ROOM=SOC
6.3V20%
X5R-CERM01005
1.0UF
0201-1X5R
ROOM=SOC
6.3V20%
17
17
17
17
17
17
17
52
52
52
52
52
18 15 10 9 7
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 7 5
19 16 10
52
52
52
17
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
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A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NCNC
NCNC
NCNC
NC
LINK2
LINK3LINK0
LINK1
SYM 2 OF 16
VDD_
FIXE
D_PC
IE_C
LK
VDD_
FIXE
D_PC
IE_A
NA
VDD1
2_PC
IE_R
EFBU
F
PCIE_CLKREQ3*
PCIE_REF_CLK3_P
VDD1
2_PC
IE
VDD_
FIXE
D_PC
IE_R
EFBU
F
PCIE_TX1_NPCIE_TX1_P
PCIE_PERST1*
PCIE_EXT_REF_CLK_NPCIE_EXT_REF_CLK_P
PCIE_RX1_NPCIE_RX1_P
PCIE_REF_CLK1_PPCIE_REF_CLK1_N
PCIE_CLKREQ1*
PCIE_PERST0*
PCIE_TX0_NPCIE_TX0_P
PCIE_RX0_PPCIE_RX0_N
PCIE_CLKREQ0*
PCIE_REF_CLK0_PPCIE_REF_CLK0_N
PCIE_PERST3*
PCIE_TX3_NPCIE_TX3_P
PCIE_RX3_NPCIE_RX3_P
PCIE_REF_CLK3_N
PCIE_PERST2*
PCIE_RX2_PPCIE_RX2_N
PCIE_TX2_PPCIE_TX2_N
PCIE_REF_CLK2_N
PCIE_CLKREQ2*
PCIE_REF_CLK2_P
PCIE_REXT
AC return path for LCM MIPI which is referenced to GND and VDD_MAINRadar 21203307
0.825-0.94V @25mA MAX
Per Radar 21221938
Dev only
D11/111 ONLY
Radar 20511449
Dev ONLY
Spare
SOC - MIPI & ISP INTERFACES
1.62-1.98V @7mA MAX
D11/111 ONLY
<--- Needed for Cayman debug; this pin cannot be input
D11/111 ONLY
9 OF 81
90_MIPI_AP_TO_LCM_DATA2_P46
90_MIPI_AP_TO_LCM_DATA2_N46
90_MIPI_AP_TO_LCM_DATA3_P46
AP_TO_NV_SHUTDOWN_L 30
AP_TO_NV_CLK_R 30
90_MIPI_AP_TO_LCM_DATA3_N46
9 OF 53
8.0.0
051-004822
1 C09092
1 C09052
1 C0910
G6
G17
G13
G21
G19
G15
G10
AA64
AC65AE64AA65
C48
B48
E50
D50
A48
C50
A50
E52
B50
E11
A11
C9
B5
B4
B7
B11
B9
C5
A4
A7
E16
B16
B12
B14
C16
C12
A14
E24
A26
C24
B20
A18
B22
B26
B24
C20
B18
A22
W66W64
U66U65
R65U64
N66N65
BR4
BR2BN4
U0700
2
1 C0907
2
1 C0906
1 PP0902
2
1 C09042
1 C0908
21
R0907
21
R0906
2
1 C09032
1 C09022
1 C0901
2
1R0901
2
1R0900
2
1 C0900
90_MIPI_AP_TO_LCM_DATA1_N
90_MIPI_NH_TO_AP_CLK_P90_MIPI_NH_TO_AP_CLK_N
90_MIPI_AP_TO_LCM_CLK_P90_MIPI_AP_TO_LCM_CLK_N
AP_TO_STROBE_DRIVER_HWENSPI_AP_TO_MAGGIE_CS_L
MIPID_REXT
90_MIPI_NH_TO_AP_DATA1_N90_MIPI_NH_TO_AP_DATA1_P
90_MIPI_NH_TO_AP_DATA0_N90_MIPI_NH_TO_AP_DATA0_P
I2C_ISP_UT_SDA
PP0V9_SOC_FIXED
AP_TO_UT_SHUTDOWN_L
AP_TO_NH_SHUTDOWN_L
I2C_ISP_UT_SCL
I2C_ISP_NV_SDAI2C_ISP_NV_SCL
I2C_ISP_NH_SCLI2C_ISP_NH_SDA
AP_TO_MUON_BL_STROBE_EN
AP_TO_NH_CLK
AP_TO_UT_CLK
PP1V8
MIPI0C_REXT
90_MIPI_AP_TO_LCM_DATA0_P90_MIPI_AP_TO_LCM_DATA0_N
90_MIPI_AP_TO_LCM_DATA1_P
AP_TO_UT_CLK_R
AP_TO_NH_CLK_R
TP_SENSOR3_RST
NC_SENSOR0_ISTRB
PP_VDD_MAIN
SOC:MIPI AND ISPSYNC_DATE=06/06/2016SYNC_MASTER=Sync
01005
ROOM=SOC
5%10V
220PF
C0G-CERM01005
ROOM=SOC
5%10V
220PF
C0G-CERM
220PF
C0G-CERM10V5%
ROOM=SOC01005
CAYMAN-2GB-20NM-DDR-MCSP
100PF
NOSTUFF
01005NP0-C0G35V5%
NP0-C0G01005
100PF5%35V
NOSTUFF
SMP2MM-NSMROOM=SOC
ROOM=SOC
220PF
01005
5%10VC0G-CERM
10V
220PF5%
01005
ROOM=SOC
C0G-CERM
ROOM=SOC
33.2
1%1/32W
01005MF
01005
33.2
1/32WMF
1%
ROOM=SOC
ROOM=SOC01005
20%6.3VX5R-CERM
0.1UF
ROOM=SOC01005
20%6.3VX5R-CERM
0.1UF
ROOM=SOC
20%6.3V
0201-1X5R-CERM
2.2UF
4.02K
01005MF
1/32W1%
ROOM=SOC
MF01005
1%4.02K
1/32W
ROOM=SOC
ROOM=SOC0201-1
20%6.3VX5R-CERM
2.2UF
39
45
45
39
39
26
36
45
45
45
45
48
18 15 10 8 7
25
29
48
46 30
46 30
48
48
46 37
29
25
52 48 47 46 39 30 29 25 18 17 16 13 12 11 8 7 5
39
39
39
53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NCNC
NCNC
SYM 3 OF 16
SENSOR0_XSHUTDOWNSENSOR1_XSHUTDOWN
MIPI1C_DPDATA0
SENSOR1_ISTRB
MIPI1C_REXT
SENSOR0_ISTRB
MIPI1C_DPCLK
MIPI1C_DPDATA1
MIPI1C_DNDATA0
MIPI1C_DNDATA1
MIPI1C_DNCLK
ISP_I2C3_SCL
ISP_I2C2_SDAISP_I2C2_SCL
ISP_I2C1_SCLISP_I2C1_SDA
ISP_I2C0_SCL
ISP_I2C3_SDA
SENSOR0_CLKSENSOR1_CLKSENSOR2_CLK
SENSOR1_RST
SENSOR3_RSTSENSOR4_RST
SENSOR2_RST
SENSOR0_RST
MIPID_DPCLK
DISP_TOUCH_BSYNC0DISP_TOUCH_BSYNC1
DISP_TOUCH_EB
MIPID_REXT
VDD1
8_M
IPI
VDD_
FIXE
D_M
IPI
ISP_I2C0_SDA
SENSOR_INT
MIPID_DNCLK
MIPI0C_DPDATA0MIPI0C_DNDATA0
MIPI0C_DNDATA1MIPI0C_DPDATA1
MIPI0C_DPDATA2
MIPI0C_DPDATA3
MIPI0C_DNDATA2
MIPI0C_DNDATA3
MIPI0C_DPCLKMIPI0C_DNCLK
MIPI0C_REXT
MIPID_DPDATA0MIPID_DNDATA0
MIPID_DNDATA1
MIPID_DPDATA3MIPID_DNDATA3
MIPID_DPDATA1
MIPID_DPDATA2MIPID_DNDATA2
NC
NC
PP
NCNC
NC
NC
LPDP Lanes swapped between D10 and D11
VDD12_PLL_LPDP:1.14-1.26V @3mA MAX
D11/111 ONLY
GND ON MLB; other on Dev
GND ON MLB; other on Dev
AC return path for LCM LPDP which is referenced to GND and VDD_MAIN
#24401637:Unconnect LPDPRX_EXT_C
Dev ONLY
Reserved for PanelID[1:0] on ap_dev boardReserved for PanelID[1:0] on ap_dev board
D11/111 ONLY
Desense for Wifi frequencies
VDD12_LPDP:1.14-1.26V @60mA MAX
10 OF 81
90_LPDP_NV_TO_AP_D0_N30
90_LPDP_NV_TO_AP_D0_P30
90_LPDP_UT_TO_AP_D2_N25
90_LPDP_NV_TO_AP_D1_N30
90_LPDP_NV_TO_AP_D1_P30
LPDP_NV_BI_AP_AUX30
90_LPDP_UT_TO_AP_D3_P25
90_LPDP_UT_TO_AP_D3_N25
LPDP_UT_BI_AP_AUX25
90_LPDP_UT_TO_AP_D2_P25
10 OF 53
8.0.0
051-00482
2
1 C10132
1 C1001
G23
G30
G28
G25
G62
G60
G58
G55
A64B64
B63C63
A61B61
B56C56
A54B54
A57
B57
D57
B59C59
D64E63D61E56D54
A33B33
B31C31
A29B29
B27C27
E31E35
D33E33
BN3AP2
U0700
2
1 C10102
1 C1011
2
1 C10022
1 C1005
2
1C1006
2
1R1001
2
1 C1004
PP_VDD_MAIN
AP_LPDPRX_RCAL_NEG
PP1V2_SOC
PP0V9_SOC_FIXED
SOC:LPDPSYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=SOC0201-1
2.2UF
X5R-CERM
20%6.3V
ROOM=SOC0201-1
2.2UF
X5R-CERM
20%6.3V
CKPLUS_WAIVE=PWRTERM2GND
CSP
CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND
CAYMAN-2GB-20NM-DDR-M
33PF
NP0-C0G-CERM16V5%
ROOM=SOC01005
33PF
NP0-C0G-CERM16V5%
ROOM=SOC01005
01005
15PF
NP0-C0G-CERM16V5%
ROOM=SOC
0.01UF
ROOM=SOC
X5R6.3V10%
01005ROOM=SOC
0.1UF
X5R-CERM6.3V20%
01005
100PF5%16V
ROOM=SOC01005
NP0-C0G
3001%
01005-1MF
ROOM=SOC
1/32W
53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 9 4
19 16 8
18 15 9 8 7
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NCNC
NCNC
NCNC
NC
SYM 4 OF 16
VDD1
2_LP
DP_T
X
VDD1
2_LP
DP_R
X
VDD1
2_PL
L_LP
DP
LPDPRX_EXT_C
LPDPRX_RCAL_N
LPDPRX_BYP_CLK_PLPDPRX_BYP_CLK_N
LPDPRX_RCAL_P
LPDPRX_RX_D4_N
LPDPRX_AUX_D0_P
LPDPRX_AUX_D2_P
LPDPRX_AUX_D4_P
LPDPRX_AUX_D1_P
LPDPRX_AUX_D3_P
LPDPRX_RX_D4_P
LPDPRX_RX_D2_N
LPDPRX_RX_D3_PLPDPRX_RX_D3_N
LPDPRX_RX_D2_P
LPDPRX_RX_D1_P
LPDPRX_RX_D0_N
LPDPRX_RX_D1_N
LPDPRX_RX_D0_P
LPDP_TX3PLPDP_TX3N
LPDP_TX2NLPDP_TX2P
LPDP_TX0P
LPDP_TX1N
LPDP_TX0N
LPDP_TX1P
DP_WAKEUPEDP_HPD
LPDP_AUX_P
LPDP_CAL_VSS_EXT
LPDP_AUX_N
LPDP_CAL_DRV_OUT
NCNC
NC
NCNC
NCNC
NCNC
See Radar#25316444 for DetailsI2C5
Route as daisy-chain. No T's allowed.
SOC - SERIAL INTERFACES
.
BOARD_ID0
I2S1/2/3 MCLK NC #24559456
To Cayman
11 OF 81
11 OF 53
8.0.0
051-00482
B2A1
A2B1
U1101
CJ12
CM9CG22
CJ14CH16
CH22CH20
C42E44A42B42
D44A44B44C44
R3N4N3N2
CB4BY3BY4CB2
AG4
AH65
AK64AH66
BN66
CH11
CK9
CJ9CG18
CM7
BU66
BN64
BJ64BN65
BR66
D48
A46
E46C46
E48
BV65
BU64
BU65BR64
BY66
AE65AE66
U4U3
AG66AG64
CG12CK7
BY2
AM64AK65
AE3
AM66
U0700
21
R11162
1 R1113
2
1 R1114
21
R1101
21R1118
2
1 C1101
21
R1103
BOARD_ID3
BOARD_ID1
I2S_AP_TO_BT_BCLK
I2S_BB_TO_AP_DINI2S_AP_TO_BB_DOUT
I2S_AP_TO_CODEC_MCLK_RI2S_AP_TO_CODEC_MSP_BCLK
I2S_CODEC_TO_AP_MSP_DINI2S_AP_TO_CODEC_MSP_DOUT
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
AP_TO_NAND_SYS_CLK
SPI_AP_TO_CODEC_MAGGIE_MOSI
AP_TO_CUMULUS_CLK32K
I2S_AP_TO_CODEC_MCLK
SPI_AP_TO_TOUCH_SCLKSPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_CODEC_MAGGIE_SCLK_R
SPI_CODEC_MAGGIE_TO_AP_MISO
I2S_AP_TO_CODEC_MSP_LRCLK
DWI_PMGR_TO_BACKLIGHT_CLK
I2C2_AP_SCLI2C2_AP_SDA
I2C1_AP_SDAI2C1_AP_SCL
I2C0_AP_SDAI2C0_AP_SCL
I2C3_AP_SCLI2C3_AP_SDA
AP_TO_NAND_SYS_CLK_R
SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_MESA_MOSI
I2S_BB_TO_AP_LRCLK
I2S_AP_TO_BT_DOUTI2S_BT_TO_AP_DINI2S_AP_TO_BT_LRCLK
SPI_AP_TO_CODEC_MAGGIE_SCLK
SPI_AP_TO_MESA_SCLK
SPI_MESA_TO_AP_MISO
SPI_AP_TO_TOUCH_CS_L
SPI_AP_TO_CODEC_CS_L
DWI_PMGR_TO_BACKLIGHT_DATA
PP1V8
I2S_MAGGIE_TO_AP_DIN
PMU_TO_AP_THROTTLE_GPU_L
AP_TO_PMU_SOCHOT_L
PMU_TO_AP_PRE_UVLO_L
I2S_BB_TO_AP_BCLK
I2S_AP_TO_MAGGIE_DOUT
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
SPI_PMGR_TO_PMU_MOSISPI_PMU_TO_PMGR_MISOSPI_PMGR_TO_PMU_SCLK
I2C5_SDAI2C5_SCL
BOARD_ID2
SPI_AP_TO_TOUCH_SCLK_R
MESA_TO_AP_INT
I2C5_SDA
PP1V8
I2C5_SCL
SOC:SERIALSYNC_DATE=06/06/2016SYNC_MASTER=Sync
CRITICALROOM=SOC
WLCSP
CSPCAYMAN-2GB-20NM-DDR-M
0%
0.00
1/32W
01005MF
ROOM=SOC
1/32W
01005MF
10K5%
ROOM=SOC01005ROOM=SOC
MF1/32W5%10K
0%
0.00
1/32W
01005MF
ROOM=SOC
0%
0.00
1/32W
01005MF
ROOM=SOC
ROOM=SOC
1.0UF
0201-1X5R
20%6.3V
1/32W
01005MF
1%
33.2
ROOM=SOC
5
5
53
53
53
32
32
32
36 35 34 33 32
17
36 32
39
32
39
39
36 32
32
46 37
47
47
47
47
47
47
47
47
39
38
53
53
53
53
36 32
38
38
39
32
46 37
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
36
20
20
20
53
36
36 35 34 33 32
20
20
20
47 11
47 11
5
38
47 11
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
47 11
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SDASCL
VCC
VSS
NCNC
NCNCNC
NC
NC
NC
SYM 6 OF 16
I2C1_SCL
SPI3_SSINSPI3_SCLK
SPI2_SSIN
SPI2_MISO
SPI3_MOSI
SPI2_SCLK
SPI3_MISO
SPI2_MOSI
SPI1_SSINSPI1_SCLKSPI1_MOSISPI1_MISO
SPI0_SSIN
SPI0_MOSISPI0_SCLK
I2S3_BCLKI2S3_LRCK
I2S3_DOUT
SPI0_MISO
I2S3_MCK
I2S3_DIN
I2S2_MCK
I2S1_DIN
I2S2_DIN
I2S2_BCLKI2S2_LRCK
I2S2_DOUT
I2S1_DOUT
I2S0_MCK
I2S0_DIN
I2S1_MCK
I2S0_DOUT
I2S0_LRCK
I2S1_LRCK
I2S0_BCLK
I2S1_BCLK
DROOP
SOCHOT
DWI_DO
CLK32K_OUT
NAND_SYS_CLK
GPU_TRIGGER
DWI_CLK
PMU_SCLKPMU_MISOPMU_MOSI
SPI4_SCLK
I2C3_SDAI2C3_SCL
SPI4_MISO
I2C5_SCL
GPIO_42GPIO_43
I2C5_SDA
SPI4_MOSI
I2C2_SCLI2C2_SDA
I2C1_SDA
I2C0_SDAI2C0_SCL
NC
#25120460:REQUEST_DFU Assignment
Dev only
BOOT_CONFIG0
#24557547:Delete R1204
D101/D111 ONLY
#24608280
D10/D11 ONLY
SOC - GPIO INTERFACES
BOARD_ID4
D101/D111 ONLY
D101/D111 ONLY; for GNSS
D101/D111 ONLY
D101/D111 ONLY
Nostuff per #24511702
DEV ONLY
BOOT_CONFIG1
RESERVERD FOR SSHB ID ON DEV BOARD
12 OF 81
PP1V85
AP_TO_ICEFALL_FW_DWLD_REQ53
12 OF 53
8.0.0
051-00482
2
1 R1210
AM2AP3
CG14CG16
BG4
A37B37C37D37
U2W4W2AA4
AH2AK4AK3AM4
B39C39D39E39
CJ7CL5
AH3AH4AG2
BU3BU2
AY3AY2AV3AT2AT4A39E41C41A41E42D42AA3AA2
CG20CK11CH14
CL9CJ11BG2BE3BE4BE2BC4BC3BB4BB2AE2AC3AE4
AH64AP65AP66AT64AT66AT67AV67AV65AY66AY65BB66BC65BB64
U0700
AP_TO_TOUCH_MAMBA_RESET_LBOARD_REV0
UART_AP_TO_NFC_TXD
AP_TO_BB_COREDUMP
PMU_TO_AP_BUF_VOL_DOWN_LPMU_TO_AP_BUF_POWER_KEY_L
AP_TO_BB_MESA_ON
AP_TO_BB_IPC_GPIO1
NC_DFU_STATUS
AP_TO_ACC_BUCK_VSELAP_TO_MAGGIE_CRESETB_L
AP_TO_LCM_RESET_LAP_BI_HOMER_BOOTLOADER_ALIVE
AP_TO_NAND_FW_STRAP
ALS_TO_AP_INT_LAP_TO_SPKAMP2_RESET_L
AP_TO_BB_TIME_MARK
MAGGIE_TO_AP_CDONE
PP1V8
TOUCH_TO_AP_INT_L
PMU_TO_AP_THROTTLE_CPU_L
BB_TO_AP_RESET_DETECT_LNC_AP_TO_GNSS_TIME_MARK
AP_TO_BB_RESET_L
BUTTON_VOL_UP_L
AP_TO_BBPMU_RADIO_ON_L
AP_TO_NFC_FW_DWLD_REQ
PMU_TO_AP_FORCE_DFU
BOARD_REV3
UART_AP_DEBUG_TXD
PROX_BI_AP_AOP_INT_PWM_L
UART_AP_DEBUG_RXD
BOARD_REV1BOARD_REV2
AP_TO_BT_WAKEPMU_TO_AP_BUF_RINGER_A
AP_TO_WLAN_DEVICE_WAKE
AP_TO_NFC_DEV_WAKE
NC_BB_TO_AP_RESET_ACT_L
NC_AP_UART2_RTS_LNC_AP_UART2_CTS_L
UART_AP_TO_BT_TXD
UART_BT_TO_AP_CTS_L
UART_NFC_TO_AP_RXD
UART_AP_TO_HOMER_TXDUART_HOMER_TO_AP_RXD
UART_AP_TO_WLAN_TXDUART_WLAN_TO_AP_RXD
SWI_AP_BI_TIGRIS
UART_AP_TO_WLAN_RTS_L
UART_AP_TO_ACCESSORY_TXDUART_ACCESSORY_TO_AP_RXD
UART_WLAN_TO_AP_CTS_L
UART_BT_TO_AP_RXDUART_AP_TO_BT_RTS_L
NC_AP_UART2_RXD
UART_NFC_TO_AP_CTS_LUART_AP_TO_NFC_RTS_L
NC_AP_UART2_TXD
NC_AP_TO_BB_IPC_GPIO2NC_AP_TO_GNSS_WAKE
SOC:GPIO & UARTSYNC_DATE=06/06/2016SYNC_MASTER=Sync
1/32W5%
01005MF
10K
ROOM=SOC
NOSTUFF
CSPCAYMAN-2GB-20NM-DDR-M
39
5
53
53
20
20
53
53
27
36
39
36
17
29
33
53
36
52 48 47 46 39 30 29 25 18 17 16 13 11 9 8 7 5
39
20
53
53
44 20
53
53
20 4
5
40
29 13
40
5
5
53
20
53
53
53
53
53
36
36
53
53
21
53
40
40
53
53
53
53
53
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
SYM 5 OF 16
TMR32_PWM1
UART0_RXD
GPIO_4
REQUEST_DFU2REQUEST_DFU1
GPIO_41GPIO_40
GPIO_36
GPIO_38GPIO_37
GPIO_39
GPIO_35
GPIO_32GPIO_31
GPIO_34GPIO_33
GPIO_30
GPIO_27GPIO_26
GPIO_28GPIO_29
GPIO_25GPIO_24GPIO_23
GPIO_21GPIO_22
GPIO_20GPIO_19GPIO_18
GPIO_15GPIO_16GPIO_17
GPIO_11
GPIO_13GPIO_14
GPIO_10GPIO_9
GPIO_7GPIO_8
GPIO_5GPIO_6
GPIO_1GPIO_2GPIO_3
GPIO_0
TMR32_PWM0
TMR32_PWM2
UART2_RTS*UART2_CTS*
UART1_TXD
UART0_TXD
UART1_CTS*
UART3_TXDUART3_RXD
UART7_TXDUART7_RXD
UART4_TXDUART4_RXD
UART5_RTXD
UART4_RTS*
UART6_TXDUART6_RXD
UART4_CTS*
UART1_RXDUART1_RTS*
UART2_RXD
UART3_CTS*UART3_RTS*
UART2_TXD
GPIO_12
NC
NC
NCNC
Plan to use internal pullup in AOP. Radar 21210869
#25756894:North Carbon R1
DOCK_CONNECT can be GPIO, but input only. Radar 21680759
Use internal pullup in SOC (AOP side).
SOC - AOP
BB_SWDIO has pullup in Radio_MLB pages
#25756894:South Carbon R2
#24512059: Remove R1300 PU
13 OF 81
13 OF 53
8.0.0
051-00482
21
R1306
BV3BU4
CM33
CL37
CG41
CH35
CJ37CM31
CH29CG29
CL11CJ22
CJ20CK14
CG35CL16
CL14
CJ16CJ27CJ18
CK39CH41CM37
CM35CK37
CG39
CJ39CL35
CJ24CM11
CJ33CG33CK31CM12CK22CK29CK24CK27CJ31CK20CH31CG31CJ29CK18CK16CK12
CM29CM16
U0700
21
R1305
21
R1303
2
1 R1304
I2S_AOP_TO_MAGGIE_L26_MCLK
PROX_BI_AP_AOP_INT_PWM_L
UART_BB_TO_AOP_RXD
I2S_AOP_TO_MAGGIE_L26_MCLK_RI2S_CODEC_XSP_TO_AOP_LRCLK
I2S_CODEC_XSP_TO_AOP_DIN
UART_TOUCH_TO_AOP_RXD
PP1V8
PMU_TO_SYSTEM_COLD_RESET_L
PMU_TO_AOP_TRISTAR_ACTIVE_READY
AOP_TO_MESA_BLANKING_EN
AOP_TO_PMU_ACTIVE_REQUEST
AOP_TO_PMU_SLEEP1_REQUESTPMU_TO_AOP_SLEEP1_READY
PMU_TO_AOP_CLK32K
SWD_AP_BI_HOMER_SWDIO
SWD_AOP_BI_BB_SWDIOHOMER_TO_AOP_WAKE_INT
SWD_AP_TO_MANY_SWCLK
I2C_AOP_SCL
AUDIO_TO_AOP_INT_LAOP_TO_MESA_I2C_ISO_EN
SPI_IMU_TO_AOP_MISO
PMU_TO_AOP_IRQ_L
SPI_AOP_TO_IMU_MOSI
I2C_AOP_SDA
LCM_TO_MANY_BSYNC
ACCEL_GYRO_TO_AOP_INTSPI_AOP_TO_ACCEL_GYRO_CS_LACCEL_GYRO_TO_AOP_DATARDY
AOP_TO_MAGGIE_ENPHOSPHORUS_TO_AOP_INT_L
SPI_AOP_TO_COMPASS_CS_L
I2S_CODEC_XSP_TO_AOP_BCLK
UART_AOP_TO_TOUCH_TXD
AOP_TO_SPKAMP1_ARC_RESET_L
MESA_TO_AOP_FDINT
UART_AOP_TO_BB_TXD
MAGGIE_TO_AOP_INTUART_AOP_TO_MAGGIE_TXD
I2S_AOP_TO_CODEC_XSP_DOUT
BOT_ACCEL_GYRO_TO_AOP_DATARDY
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L
TRISTAR_TO_AOP_INT
SPI_AOP_TO_PHOSPHORUS_CS_L
COMPASS_TO_AOP_INT
SWD_AP_BI_NAND_SWDIO
AOP_TO_WLAN_CONTEXT_BAOP_TO_WLAN_CONTEXT_A
SPI_AOP_TO_IMU_SCLK_R2
SPI_AOP_TO_IMU_SCLKSPI_AOP_TO_IMU_SCLK_R1
SOC:AOPSYNC_DATE=06/06/2016SYNC_MASTER=Sync
49.9
1%1/32WMF
ROOM=SOC01005
CSPCAYMAN-2GB-20NM-DDR-M
49.9
1%1/32W
01005ROOM=SOC
MF
33.2
1/32W1%
ROOM=SOC
MF01005
1.00K5%
ROOM=SOC
MF01005
1/32W
NOSTUFF
36 35 34 33
29 12
53
32
32
39
52 48 47 46 39 30 29 25 18 17 16 12 11 9 8 7 5
20 7
40 37 20 7
38
20
20
20 15
20
36
53
36
53 36 17
48
35 34 33 32
48
24
20
24
48
53 39 23 20
24
24
24
36
24
24
32
39
35 34
38
53
36
36
32
24
24
40
24
24
17
53
53
24
24
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 7 OF 16CFSB_AOP
AWAKE_RESET*
AOP_PDM_CLK0AOP_PDM_DATA0
AWAKE_REQ
AOP_DDR_REQAOP_DDR_RESET*
DOCK_ATTENTION
DOCK_CONNECT
AOP_PDM_DATA1
RT_CLK32768
SWD_TMS2SWD_TMS3
AOP_SWD_TMS1AOP_SWD_TMS0
AOP_SWD_TCK_OUT
AOP_UART1_TXD
AOP_UART0_RXDAOP_UART0_TXD
AOP_UART1_RXD
AOP_I2C0_SCL
AOP_FUNC_13AOP_FUNC_14
AOP_SPI_SCLK
AOP_SPI_MISO
AOP_FUNC_15
AOP_SPI_MOSI
AOP_I2C0_SDA
AOP_FUNC_7
AOP_FUNC_5AOP_FUNC_4AOP_FUNC_3
AOP_FUNC_6
AOP_FUNC_11
AOP_FUNC_9AOP_FUNC_8
AOP_FUNC_10
AOP_FUNC_12
AOP_FUNC_0AOP_FUNC_1AOP_FUNC_2
AOP_I2S_MCKAOP_I2S_LRCK
AOP_I2S_DOUT
AOP_I2S_DINAOP_I2S_BCLK
AOP_UART2_RXDAOP_UART2_TXD
0.80V @TBD A MAX0.67V @TBD A MAX
0.92V @1.50A MAX1.03V @1.44A MAX
0.625V @tbd A MAX
1.06V @17.4A MAX
SOC - CPU, GPU & SOC RAILS
0.80V @4.1A MAX
0.80V @TBDA MAX
0.80V @TBD A MAX
1.03V @12.9A MAX0.92V @10.7A MAX
0.67V @TBDA MAX0.9V @tbd A MAX
1.06V @1.0A MAX
14 OF 81
14 OF 53
8.0.0
051-00482
2
1 C1414
AW25
J60BF40Y60Y36Y10V30T60T10P55J34J21J13CE45CE17CE13CA47CA43CA38CA34CA30CA25CA21CA17CA13BW10BT55BT51BT47BT43BT38BT34BT30BT25BT21BT17BT13BP58BP53BP49BP45BP40BP36BP32BP28BP23BP19BP15BM55BK53BK49BK45
BK40BK36BK32BK28BF58BF53BF49BF45BF36BF32BF28BD60
BD6BD55BD51BD47BD43BD38BD34BD30BD25AW60AW55AW51AW47AW43AW38AW34AW30AR55AR51AR47AR43AR38AR34AR30AR25AN58AN53AN49AN45AN40AN36AN32AN28
AL6AJ36AJ32AJ28AF60AD32AD28
U0700
AJ47
BK21
AL47
Y53Y49Y45Y40Y23Y19Y15P51P47P43P38P34P30P25P21P17
AF51AF47AF43
AJ45
Y28V55V51V38V34V25V13T53T40T36T15P13L53L49L45L40L36L32L28L23L19L15J51J47J43J38J30J25AJ53AJ49AJ40AF55AD53AD49AD45AD40AB55AB51AB47AB43AB25AB21AB17AB13
BH8BA19BA15AW8
AU19AR8
AN15AF8
BK23
AJ10BK15BK10BH21BH17BH13BF23BF10BD8
BD21BA23BA10AW21AW17AW13AU15AU10AR21AR17AR13AN23AN19AN10
AL8AL21AJ23AF17AF13AD23AD19AD15AD10
U0700
2
1 C14342
1 C14082
1 C14012
1 C1403
4
3
2
1
C1407
1 PP1411
1 PP1410
1PP1402
1 PP1403
1 PP1409
1 PP1408
4
3
2
1
C1435
4
3
2
1
C1439
1PP1401
2
1 C1444
21
XW1401
2
1 C1436
4
3
2
1
C1402
4
3
2
1
C1410
4
3
2
1
C1415
4
3
2
1
C1420
4
3
2
1
C1409
4
3
2
1
C1452
4
3
2
1
C1454
4
3
2
1
C1416
2
1 C1466
4
3
2
1
C1425
4
3
2
1
C1429
4
3
2
1
C1456
4
3
2
1
C1457
4
3
2
1
C1421
4
3
2
1
C1426
2
1 C1448
4
3
2
1
C1432
4
3
2
1
C1437
4
3
2
1
C1433
2
1 C1459
2
1 C1458
4
3
2
1
C1465
4
3
2
1
C1460
4
3
2
1
C1461
21XW1403
2 1XW1402
2
1 C1449
4
3
2
1
C1442
4
3
2
1
C1438
4
3
2
1
C1440
4
3
2
1
C1418
4
3
2
1
C1423
4
3
2
1
C1428
4
3
2
1
C1431
4
3
2
1
C1427
4
3
2
1
C1430
4
3
2
1
C1404
4
3
2
1
C1411
4
3
2
1
C1417
4
3
2
1
C1422
4
3
2
1
C1406
4
3
2
1
C1413
4
3
2
1
C1419
4
3
2
1
C1424
4
3
2
1
C1405
4
3
2
1
C1412
PP_GPU_VAR
PP_CPU_VAR
PP_GPU_SRAM_VAR
PP_CPU_SRAM_VAR
PP_CPU_VAR
AP_VDD_GPU_SENSE
PP_SOC_VARPP_GPU_VAR
AP_VDD_CPU_SENSE
TP_AP_VSS_CPU_SENSE
BUCK0_PP_CPU_FB
BUCK2_PP_SOC_FB
BUCK1_PP_GPU_FB
TP_VDD_SOC_SENSE
TP_VSS_SENSE
SOC:POWER (1/3)SYNC_DATE=06/06/2016SYNC_MASTER=Sync
15UF6.3VX5R0402-1ROOM=SOC
20%
CSPCAYMAN-2GB-20NM-DDR-M
CAYMAN-2GB-20NM-DDR-MCSP
0402-1X5R6.3V20%15UF
X5R
15UF20%6.3V
0402-1
6.3VX5R0402-1
20%15UF
6.3V20%10UF
CERM-X5R
ROOM=SOC
0402-9
20%
0402
4VCERM
ROOM=SOC
7.5UF
ROOM=SOCP2MM-NSM
SM
ROOM=SOCP2MM-NSM
SM
SM
ROOM=SOCP2MM-NSM
ROOM=SOCP2MM-NSM
SM
ROOM=SOCP2MM-NSM
SM
ROOM=SOCP2MM-NSM
SM
0402
4VCER
7.5UF
ROOM=SOC
20%
0402
4VCER
20%7.5UF
ROOM=SOC
SMP2MM-NSMROOM=SOC
ROOM=SOC
CERM-X5R
10UF
0402-9
6.3V20%
SHORT-20L-0.05MM-SM
OMIT ROOM=SOC
NO_XNET_CONNECTION
ROOM=SOC
CERM-X5R
10UF
0402-9
6.3V20%
0402
4V20%
CERM
4.3UF
ROOM=SOC
ROOM=SOC
4V20%1UF
CERM0402
4V20%
0402CERM
ROOM=SOC
1UF
ROOM=SOC
0402
4V
1UF20%
CERM
4.3UF
ROOM=SOC
4V20%
CERM0402
ROOM=SOC
20%4.3UF
4VCERM0402
ROOM=SOC
4.3UF20%
CERM0402
4V
ROOM=SOC
7.5UF
0402CERM4V20%
ROOM=SOC0201-1
20%2.2UF
X5R-CERM6.3V
0.47UF
0402
6.3V20%
CERM
ROOM=SOC ROOM=SOC
0402
0.47UF6.3V20%
CERM0402
ROOM=SOC
6.3V20%
CERM
0.47UF
ROOM=SOC
0.47UF
0402
6.3V20%
CERM
7.5UF
ROOM=SOC
4V
0402
20%
CERM
7.5UF20%
ROOM=SOC
4V
0402CERM
6.3V20%2.2UF
0201-1ROOM=SOC
X5R-CERM
20%
ROOM=SOC
7.5UF4V
CERM0402
4V
ROOM=SOC
20%
0402CERM
7.5UF
20%4V
ROOM=SOC
CERM0402
7.5UF
ROOM=SOC
CERM-X5R6.3V20%
0402-9
10UF
0402-9CERM-X5R
ROOM=SOC
10UF6.3V20%
ROOM=SOC
0402
4V
4.3UF20%
CERM
7.5UF
ROOM=SOC
4V20%
CERM0402
ROOM=SOC
7.5UF
0402
4V20%
CERM
NO_XNET_CONNECTION
OMIT
ROOM=SOC
SHORT-20L-0.05MM-SM
ROOM=SOC
OMIT
SHORT-20L-0.05MM-SM
NO_XNET_CONNECTION
ROOM=SOC0201-1
2.2UF20%6.3VX5R-CERM
0402
ROOM=SOC
0.47UF6.3V20%
CERM
ROOM=SOC
1UF
0402
4V20%
CERM4V
0402
7.5UF20%
ROOM=SOC
CERM
ROOM=SOC
20%1UF4V
0402CERM
20%
CERM0402
4V
1UF
ROOM=SOC
0402
4V20%
CERM
ROOM=SOC
1UF 1UF
0402
20%
CERM
ROOM=SOC
4V
ROOM=SOC
0402
4V20%
CERM
4.3UF4V20%
ROOM=SOC
4.3UF
CERM04020402
4V20%
7.5UF
ROOM=SOC
CERM CERM
20%4V
0402
7.5UF
ROOM=SOC
7.5UF
0402
4V20%
CERM
ROOM=SOC
4.3UF
ROOM=SOC
0402
20%4V
CERM
0.47UF6.3V20%
ROOM=SOC
CERM0402
ROOM=SOC
0402
0.47UF6.3V20%
CERM
ROOM=SOC
0402
6.3V20%0.47UF
CERM
20%6.3VCERM
ROOM=SOC
0.47UF
0402
ROOM=SOC
0402
4V
4.3UF20%
CERM0402
4V
4.3UF20%
ROOM=SOC
CERM
18 14
18 14
18
18
18 14
20
18 18 14
20
18
18
18
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 9 OF 16
VDD_SOCVDD_SOC
SYM 8 OF 16
VDD_GPU_SRAM
VDD_CPU_SRAM
VDD_CPU
VDD_GPU
VDD_GPU_SENSE
VSS_SENSE
VDD_SOC_SENSE
VSS_CPU_SENSE
VDD_CPU_SENSE
PP
PP
PP
PP
PP
PP
PP
1.06 - 1.17V @1.74A MAX
SOC - POWER SUPPLIES
TBD-TBDV @1.9A MAX
0.765-0.840V @60mA MAX
DDR IMPEDANCE CONTROL
1.06-1.17V @0.85A MAX
0.797-0.945V @9 mA MAX
(CURRENT INCLUDED IN VDD2)
1.06 - 1.17V @4mA MAX
15 OF 81
15 OF 53
8.0.0
051-00482
H64H4CD65CG3
P58J8BW60CE8
Y62V60T62P60K67E67
AH67AE67AD62AC67AB60
Y6V8T6P8L6K1E1
AH1AE1AC1AB8
CH67CD67BW62BT60BP62BM60BL67BK62BJ67BH60BE67
CH1CD1CC6CA8BW6BT8BP6BM8BL1BJ1BE1
W67W1R67R1N67N1D66D2CK66CK2CJ66CJ2C66C2BY67BY1BV67BV1BR67BR1BB65BB3AM65AM3
AA66
H65
K65
K64
H3
K3
K4
CB64
BY64
CB65
BN2
CF4
CD3
CF3
U0700
CE40CE30CC36
AW23
Y8Y58T8T58T32L60L58L10J62J55J23J17G36G32CC45CC32CC28CC23CC19CC15CC10BW8BW58BW53BW49BW45BW40BW36BW32BW28BW23BW19BW15BP60BP10BM51BM47BM43BM38BM34BM30BM25BM21BM17BM13BK6
BK58BH55BH51BH47BH43BH38BH34BH30BH25BA58BA53BA49BA45BA40BA36BA32BA28AU6
AU58AU53AU49AU45AU40AU36AU32AU28AR60AL60AL55AL51AL43AL38AL34AL30AL25AJ58AF62AF38AF34AF30AF25AD58AB38AB34AB30
U0700
2
1 C15122
1 C1513
2
1 C1510
2
1 C15012
1 C15082
1 C1509
2
1 C15072
1 C15292
1 C15112
1 C1515
4
3
2
1
C1527
2
1 C15282
1 C1522
21
FL1501
2
1 C1519
2
1 C1504
2
1 C1518
2
1 C1523
2
1 R1505
2
1 R1506
4
3
2
1
C1503
2
1 C15142
1 C15062
1 R1504
2
1 R1503
2
1 R1502
2
1 R1501
4
3
2
1
C1502
PP0V9_SOC_FIXED
PP1V1_SDRAM
PP0V8_AOP
PP1V1
PP1V1
PP1V1
PP1V1_SDRAM
PMU_TO_AOP_SLEEP1_READY
PP1V1_DDR_PLL
DDR2_RREFDDR3_RREF
DDR0_RREFDDR1_RREF
DDR0_ZQDDR3_ZQ
SYSTEM_ALIVE
SOC:POWER (2/3)SYNC_DATE=06/06/2016SYNC_MASTER=Sync
CAYMAN-2GB-20NM-DDR-MCSP
CSPCAYMAN-2GB-20NM-DDR-M
CERM-X5R
10UF
ROOM=SOC0402-9
6.3V20%
CERM-X5R0402-9
10UF6.3V20%
ROOM=SOC
20%6.3V
ROOM=SOC01005-1
0.22UF
X5R
20%6.3V
10UF
0402-9ROOM=SOC
CERM-X5R
20%6.3V
0.22UF
ROOM=SOC01005-1X5R
20%6.3V
01005-1
0.22UF
ROOM=SOC
X5R
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1
6.3V20%2.2UF
X5R-CERM
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
20%4V
1UF
0402
ROOM=SOC
CERM
10UF20%6.3V
0402-9CERM-X5R
ROOM=SOC
2.2UF20%6.3VX5R-CERM0201-1
ROOM=SOC
100OHM-25%-0.12A
ROOM=SOC01005
ROOM=SOC
2.2UF20%6.3VX5R-CERM0201-1
2.2UF20%6.3VX5R-CERM0201-1ROOM=SOC
X5R-CERM
2.2UF20%6.3V
0201-1ROOM=SOC
20%6.3V
ROOM=SOC
0.22UF
01005-1X5R
2401%
ROOM=SOC
MF01005
1/32W
ROOM=SOC
2401%
MF01005
1/32W
20%
ROOM=SOC
7.5UF4V
0402CERM
2.2UF20%6.3VX5R-CERM
ROOM=SOC0201-1
20%6.3VCERM-X5R
10UF
0402-9ROOM=SOC
ROOM=SOC
1%240
MF01005
1/32W1%240
ROOM=SOC
MF01005
1/32W1%
ROOM=SOC
240
MF01005
1/32W1%
ROOM=SOC
240
MF01005
1/32W
20%4.3UF
ROOM=SOC
4VCERM0402
18 10 9 8 7
19 18 15
19
18 15 7
18 15 7
18 15 7
19 18 15
20 13
21 20 17
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 11 OF 16
DDR1_SYS_ALIVEDDR0_SYS_ALIVE
DDR3_SYS_ALIVEDDR2_SYS_ALIVE
VDD2
VDDIO11_PLL_DDR0
VDDIO11_PLL_DDR3
DDR3_ZQDDR0_ZQ
DDR1_RREF
DDR1_RET*
DDR0_RREF
DDR0_RET*
DDR3_RREFDDR2_RREF
DDR2_RET*
VDDIO11_RET_DDR0
VDDIO11_RET_DDR2VDDIO11_RET_DDR3
VDDIO11_RET_DDR1
VDDIO11_DDR0
VDDIO11_DDR1
VDDIO11_DDR2
VDDIO11_DDR3
VDDIO11_PLL_DDR1VDDIO11_PLL_DDR2
DDR3_RET*SYM 10 OF 16
VDD_FIXED
VDD_LOW
VDD_FIXED_CPU
VDD_FIXED
VDD12_PLL_SOC:1.14-1.26V @31mA MAX
VDD12_PLL_CPU:1.14-1.26V @13mA MAX
1.70-1.95V @134mA MAX
SOC - POWER SUPPLIES
1.62-1.98V @10mA MAX
1.62-1.98V @43mA MAX
TBD-TBDV @30mA MAX
1.62-1.98V @1mA MAX
1.62-1.98V @1mA MAX
1.62-1.98V @2mA MAX
16 OF 81
16 OF 53
8.0.0
051-00482
J58BF38Y55Y51Y47Y43Y30Y25Y21Y17Y13W65W3V62V6V58V53V40V36V32V28V15V10U67U1T55T51T38T34T25T13R66R64R4R2P62P6P53P49P45P40P36P32P28P23P19P15P10M67M66M65M64M4M3M2M1L8L62L55L51L47L43L38
L34L30L25L21L17L13K66
K2J6
J53J49J45J40J32J28J19J15J10H67H66
H2H1G8
G51G47G43G38F67F66F65F64
F4F3F2F1E9E7
E66E65E64E61E59E57E54
E5E4
E37E3
E29E27E26E22E20
E2E18E14E12D9D7
D67D65D63D59D56D52
D5D46D41
D4D35D31
D3D29D27D26D24D22D20
U0700
D18D16D14D12D11D1CM66CM63CM59CM56CM52CM5CM48CM44CM41CM4CM39CM27CM24CM2CM18CL7CL67CL65CL63CL59CL56CL52CL48CL44CL41CL4CL39CL33CL3CL27CL24CL18CL12CL1CK64CK61CK57CK54CK50CK5CK46CK42CK41CK4CJ67CJ65CJ64CJ61CJ57CJ54CJ50CJ5CJ46CJ42CJ41CJ4CJ3CJ1CH9CH7CH66CH65CH64CH63CH61CH59CH56CH54CH52CH5
CH48CH46CH44CH42
CH4CH39CH33
CH3CH27CH24
CH2CH18CH12CG67CG66CG65CG64CG61CG59CG56CG54CG52
CG5CG48CG46CG44CG42
CG4CG27CG24
CG2CG11
CG1CF67CF66CF65CF64
CF2CF1
CE62CE6
CE53CE47CE15CE10CD66CD64
CD4CD2CC8T30
CL22CC43CC38CC34CC30CC21CC17CC13CB67CB66
CB3CB1
CA62CA6
CA58CA53CA49CA45CA40CA36CA32CA28CA23CA19CA15
U0700
CA10C7C64C61C57C54C52C4C35C33C29C26C22C18C14C11BY65CE51BW51BW47BW43BW38BW34BW30BW25BW21BW17BW13BV66BV64BV4BV2BU67BU1BT62BT6BT58BT53BT49BT45BT40BT36BT32BT28BT23BT19BT15BT10BR65BR3BP8BP55BP51BP47BP43BP38BP34BP30BP25BP21BP17BP13BN67BN1BM62BM6BM58BM53BM49BM45BM40BM36BM32BM28BM23BM19BM15BM10BL66
BL64BL4BL2BK8
BK60BK55BK51BK47BK43BK38BK34BK30BK25AL49BK17BK13BH62
BH6BH58BH53BH49BH45BH40BH36BH32BH28BH23BH19BH15BH10BG67BG65
BG3BG1BF8
BF55BF51BF47BF43BF34BF30BF25BF21BD62BD58BD53BD49BD45BD40BD36BD32BD28BD23BD10BC67BC66
BC2BC1BA8
BA60BA55BA51BA47BA43BA38BA34BA30BA21BA17BA13
B67B65B52B46B41B35
B3B1
U0700
AY67AY64AY4AY1AW62AW6AW58AW53AW49AW45AW40AW36AW32AW28CH50AW19AW15AW10AV66AV64AV4AV2AV1AU8AU60AU55AU51AU47AU43AU38AU34AU30AU25AU21AU17AU13AT65AT3AT1AR62AR6AR58AR53AR49AR45AR40AR36AR32AR28AR19AR15AR10AP67AP64AP4AP1AN8AN60AN55AN51AN47AN43AN38AN34AN30AN25AN21AN17AN13AL62AL58AL53AL45AL40AL36AL32AL28AL23
AK67AK66
AK2AK1AJ8
AJ55AJ51AL10AJ43AJ38AJ34AJ30AJ25AJ21AG67AG65
AG3AG1AF6
AF58AF53AF49AF45AF40AF36AF32AF28AF23AF19AF15AF10AD8
AD60AD55AD51AD47AD43AD34AD30AD25AD21AD17AD13AC66AC64
AC4AC2
AB62AB6
AB58AB53AB49AB45AB40AB36AB32AB28AB23AB19AB15AB10AA67
AA1A9
A66A63A59A56A52
A5A35A31A27A24A20
A2A16A12
U0700
CE43CE38
CE36CE34CE32CE28
CE23CE19
BF6BA6AN6AJ6AD6
G53G49G45G40
BF62BA62AU62AN62AJ62
BF60CE21
J36AF21BK19AR23
CC40
CG9
G34CG7
Y38
Y34AD38AD36
Y32
BA25
T28AU23
CK65CK3C65
C3BB67
BB1AM67
AM1
U0700
2
1 C1606
2
1C1604
21
R1602
2
1 C1615
2
1 C16092
1 C1613
2
1 C16012
1 C1603
2
1 C1611
21
R1601
2
1 C1605
2
1 C16142
1 C16102
1 C1607
2
1 C16122
1 C1608
2
1 C1602
PP1V2_PLL_SOC
PP1V2_PLL_CPU
PP1V2_REF
PP1V8_SDRAM
PP1V8
PP1V8_SDRAM
PP1V2_SOC
SOC:POWER (3/3)
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
CAYMAN-2GB-20NM-DDR-MCSPCSP
CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-MCSP
CAYMAN-2GB-20NM-DDR-MCSP
CKPLUS_WAIVE=PWRTERM2GNDCKPLUS_WAIVE=PWRTERM2GND
CSPCAYMAN-2GB-20NM-DDR-M
20%
01005
0.1UF6.3VX5R-CERM
ROOM=SOC
ROOM=SOC0201-1
X5R-CERM6.3V20%
2.2UF
ROOM=SOC
MF01005
1/32W
0.00
0%
6.3V
2.2UF
0201-1
20%
X5R-CERM
ROOM=SOC
ROOM=SOC
20%
01005
6.3VX5R-CERM
0.1UF
ROOM=SOC
0.1UF6.3V20%
X5R-CERM01005
20%0.1UF6.3VX5R-CERM01005ROOM=SOCROOM=SOC
0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
01005
1/32W
ROOM=SOC
MF
0.00
0%
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
6.3V20%2.2UF
ROOM=SOC
X5R-CERM0201-1
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
ROOM=SOC0201-1X5R-CERM6.3V20%2.2UF
10UF6.3V20%
CERM-X5R0402-9ROOM=SOC
19
53 52 48 47 46 41 40 37 36 32 21 20 18 16
52 48 47 46 39 30 29 25 18 17 13 12 11 9 8 7 5
53 52 48 47 46 41 40 37 36 32 21 20 18 16
19 10 8
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 16 OF 16
VSSVSS
SYM 15 OF 16
VSSVSS
SYM 14 OF 16
VSS VSS
SYM 13 OF 16
VSS VSS
SYM 12 OF 16
VDD18_EFUSE1VDD18_EFUSE2
VDD1
VDDIO18_GRP2
VDDIO18_GRP1
VDDIO18_GRP10
VDD18_TSADC1VDD18_TSADC0
VDD18_TSADC2
VDD18_LPOSC
VDD12_GPU_UVDVDD12_CPU_UVD
VDD18_TSADC5VDD18_TSADC4
VDD18_FMON
VDD18_TSADC3
VDD12_PLL_SOC
VDD12_SOC_UVD
VDD12_PLL_CPU
VDDIO18_GRP4
VDDIO18_GRP3
#26326159:10uF for C1719 #24543147:10uF for 32GB
1230mA MAX (1us peak power)
1007mA MAX
PROBE POINTS
315mA MAX
17 OF 81
17 OF 53
8.0.0
051-00482
2
1 C17192
1 C1713
D6
B2 P6P4P2
OE1
0
OE0
OC1
0O
C0L7L5L3G7B6B4
E5 R5OF1
0O
F0O
B10
OB0
A5R7R3J9J1F2A7A3 OG
10O
G0
OD1
0O
D0O
A10
OA0
D8
F8
M2K2
P8N7
N5N3
M8K8
H8H6
G9
K6K4
M6J7J5M
4
G5
C5
F4
G1
B8C7F6E7E3H2J3G3
H4
D4
D2
C3
U1701
2
1 C1704
2
1 C1748
2
1 C1736
2
1 C17392
1 C1741
2
1 C17542
1 C17532
1 C1752
2
1 C17352
1 C17342
1 C1732
2
1 C17082
1 C17112
1 C1717
2
1 C17472
1 C17452
1 C1743
2
1 C17232
1 C1712
2
1 C1730
2
1 C17032
1 C17062
1 C17092
1 C17142
1 C17202
1 C1728
2
1 C17372
1 C17382
1 C17402
1 C17422
1 C17442
1 C1746
2
1 C1731
2
1 C17492
1 C17502
1 C1751
2
1 C1729
2
1 C1733
1 PP17011 PP1702
21 R170721 R1702
2
1 C1724
2
1 C1727
2
1 C1722
2
1 C1726
2
1 C1725
2
1 R1701
2
1 C17212
1 C1716
2
1 C17052
1 C1702
2
1 C1701
2
1 C1710
21R1703
2
1 C17182
1 C1715
2
1 C1707
2
1 R1704
PP1V8
NAND_AGND
PP0V9_NAND
PP1V8
90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N
NAND_AGND
SWD_AP_NAND_SWCLK_R
PP1V8_NAND_AVDD
SWD_AP_BI_NAND_SWDIO_R
PCIE_AP_TO_NAND_RESET_L
AP_TO_NAND_FW_STRAPPMU_TO_NAND_LOW_BATT_BOOT_L
NAND_ZQ
AP_TO_NAND_RESET_L
SWD_AP_BI_NAND_SWDIO
SWD_AP_TO_MANY_SWCLK
SYSTEM_ALIVE90_PCIE_AP_TO_NAND_TXD_N90_PCIE_AP_TO_NAND_TXD_P
PCIE_NAND_RESREF
PCIE_NAND_BI_AP_CLKREQ_L
90_PCIE_AP_TO_NAND_REFCLK_N90_PCIE_AP_TO_NAND_REFCLK_P
AP_TO_NAND_SYS_CLK
NAND_VREF
90_PCIE_NAND_TO_AP_RXD_P90_PCIE_NAND_TO_AP_RXD_N
PP3V0_NAND
NANDSYNC_DATE=06/06/2016SYNC_MASTER=Sync
0402-1
15UF
OMIT
ROOM=NAND
X5R6.3V20%
VLGATHGBX6T1T82LFXF
ROOM=NAND
CRITICALBOMOPTION=OMIT_TABLE
X5R0402-1ROOM=NAND
15UF6.3V20%
6.3V
OMIT
15UF20%
ROOM=NAND0402-1X5R
100PF
01005NP0-C0G16V5%
ROOM=NAND
1.0UF
ROOM=NAND
X5R0201-1
6.3V20%
0201-1
6.3V
1.0UF
X5R
ROOM=NAND
20%
0201-1
6.3V20%
ROOM=NAND
1.0UF
X5R
20%6.3VX5R0201-1ROOM=NAND
1.0UF20%6.3VX5R
1.0UF
ROOM=NAND0201-1
C0G-CERM
ROOM=NAND01005
220PF10V5%
ROOM=NAND01005
100PF16V5%
NP0-C0G
ROOM=NAND01005NP0-C0G16V
39PF5%
5%
01005
220PF
C0G-CERM10V
ROOM=NAND
16V5%
01005
22PF
CERMROOM=NAND
16V5%
01005NP0-C0G
68PF
ROOM=NAND
1.0UF
X5R0201-1ROOM=NAND
6.3V20%
1.0UF
X5R
ROOM=NAND
6.3V20%
0201-1
1.0UF
X5R
20%
ROOM=NAND0201-1
6.3V
16V5%
01005NP0-C0G
39PF
ROOM=NAND
16V5%100PF
01005NP0-C0G
ROOM=NAND
X5R
15UF
ROOM=NAND0402-1
6.3V20%
5%
01005
10V
220PF
ROOM=NAND
C0G-CERM16V5%
01005
22PF
CERM
ROOM=NAND
16V5%100PF
01005NP0-C0G
ROOM=NAND
5%
01005
10V
220PF
C0G-CERM
ROOM=NAND
16V5%100PF
01005NP0-C0G
ROOM=NAND
16V5%
01005NP0-C0G
ROOM=NAND
68PF
0201-1
1.0UF
ROOM=NAND
6.3V20%
X5R
1.0UF
X5R0201-1ROOM=NAND
6.3V20%
1.0UF
X5R
ROOM=NAND
6.3V20%
0201-1
1.0UF
X5R6.3V20%
ROOM=NAND0201-1
1.0UF
X5R
ROOM=NAND
20%6.3V
0201-1 0201-1ROOM=NAND
20%1.0UF6.3VX5R
01005NP0-C0G16V5%
ROOM=NAND
68PF
20%6.3VX5R0201-1ROOM=NAND
1.0UF 1.0UF20%6.3VX5R0201-1ROOM=NAND
0201-1X5R
20%6.3V
1.0UF
ROOM=NAND
X5R
ROOM=NAND0402-1
15UF6.3V20%
OMIT
15UF20%6.3VX5R
ROOM=NAND0402-1
SM
P2MM-NSMROOM=NAND
SM
P2MM-NSMROOM=NAND
01005 MF
ROOM=NAND
1/32W 0%
0.00 01005 MF1/32W
ROOM=NAND
0%
0.00
01005
ROOM=NAND
10%6.3V
0.01UF
X5R
0402-1ROOM=NAND
15UF20%6.3VX5RX5R
15UF
0402-1ROOM=NAND
6.3V20%
ROOM=NAND0201-1X5R-CERM6.3V20%2.2UF
01005ROOM=NAND
X5R
10%0.01UF6.3V
01005
1/32WMF
0.5%34.8
ROOM=NAND
OMIT
20%6.3VX5R
15UF
0402-1ROOM=NAND
0402-9
10UF6.3VCERM-X5R
20%
ROOM=NANDROOM=NAND
X5R
15UF20%
OMIT
0402-1
6.3V
6.3V
0402-1X5R
ROOM=NAND
15UF20%
0402-1X5R
15UF6.3V20%
ROOM=NAND
0402-1
15UF
X5R
ROOM=NAND
6.3V20%
01005
0.1UF
ROOM=NAND
6.3V20%
X5R-CERM
01005
1/32WMF
ROOM=NAND
1%
24.9
ROOM=NAND01005
22PF
CERM16V5%
ROOM=NAND01005
220PF
C0G-CERM10V5%
X5R
15UF
0402-1ROOM=NAND
6.3V20%
01005
1/32WMF
3.01K
ROOM=NAND
1%
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
17
19
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
17 8
17 8
17
8
12
20
7
13
53 36 13
21 20 15
8
8
8
17 8
17 8
11
8
8
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VER-1
VDD
VDD
PCI_
AVDD
_H
PCIE_TX1_MPCIE_TX1_P
PCIE_CLKREQ*
TRST*
RESET*
PCIE_RX1_M
PCIE_TX0_PPCIE_TX0_M
VSS
VSS
PCIE_RX0_PPCIE_RX0_M
PCI_RESREF
PCIE_RX1_P
ZQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSA
EXT_D0EXT_D1EXT_D2EXT_D3EXT_D4EXT_D5EXT_D6EXT_D7
EXT_NCE
EXT_NRE
EXT_NWE
EXT_RNB
EXT_CLE
EXT_ALE
VDD
VDD
VDD
VDD
VDD
AVDD
1
VCC
VCC
VCC
VCC
VCC
VDDI
O
VCC
VDDI
OVD
DIO
VDDI
O
VDDI
OVD
DIO
VREF
PCI_
VDD2
PCI_
VDD1
PCIE_REFCLK_MPCIE_REFCLK_P
CLK_IN
PCI_
AVDD
_CLK
2PC
I_AV
DD_C
LK1
NCNC
NCNC
PP
PP
NC
NC
NC
NCNCNCNCNC
D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor
Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869
0.625V - 1.06V
1.03V for overdrive only BUCK1
BUCK
7
0.80V - 0.92V
0.80V - 1.06V
1.5A MAX
0.75A MAX
1.5A MAX
BUCK
61.5A MAX
3.2A MAX
BUCK
5(pending vendor qual)
1.7A MAX
0.67V - 0.92V
0.67V/0.80V
4.7A MAX
BUCK4BUCK3
13.4A MAXBU
CK8
13.4A MAX4.7A MAX
BUCK0BUCK2
BUCK
9
18 OF 81
18 OF 53
8.0.0
051-00482
2 1
L1801
2 1
L1804
21
L1802
2 1
L1805
2 1
L1818
21
L1811
2
1 C1840
2 1
XW1807
2
1 C18022
1 C1874
2
1 C1875
2
1 C1876
2
1 C1877
2
1 C1864
2
1 C1801
H13H14R13
M8
F11H6N7
L19L18
F19F18
V6U6
K19K18
D1C1B1
M3M2M1
T3T2
H3H2H1
D13C13B13A13
D17C17B17A17
D9C9B9A9
D5C5B5A5
V5U5
V2U2
M19M18
P16
G19G18
H15
V7U7
R8
J19J18
H16
A2D2C2B2
F5
V4U4
L3L2L1
N3N2N1
K5
V3U3
U1T1
R1R3R2
R7
J3J2J1
G3G2G1
J5
D12C12B12A12
D14C14B14A14
D16C16B16A16
A18D18C18B18
F12
D10C10B10A10
D8C8B8A8
D6C6B6A6
A4D4C4B4
F10
U1801
21
XW1805
21
L1817
2
1 C18302
1 C18362
1 C1861
21
L1816
21
XW1804
21
L1814
2 1
L1815
2
1 C18162
1 C1823
2
1 C18222
1 C18292
1 C1835
2
1 C1860
2
1 C18412
1 C1871
21
L1813
2 1
L1812
21
L1810
2
1 C18142
1 C18212
1 C18282
1 C18342
1 C18662
1 C1873
2
1 C18132
1 C18202
1 C18272
1 C18332
1 C18392
1 C1865
2 1
XW18062
1 C18702
1 C18622
1 C1863
2
1 C1869
2
1 C1868
2
1 C1867
2
1 C1872
2
1 C1811
21
L1809
21
L1807
2 1
L1803
2 1
L1808
21
L1806
2
1 C18562
1 C1849
2
1 C18592
1 C18552
1 C18522
1 C1848
2
1 C18582
1 C18542
1 C18512
1 C1847
2
1 C1810
2
1 C1809
2
1 C1808
2
1 C1807
2
1 C1806
2
1 C1805
2
1 C1804
2
1 C1803
2
1 C18452
1 C18432
1 C18382
1 C18322
1 C18262
1 C1819
2
1 C18442
1 C18422
1 C18372
1 C18312
1 C1825
2
1 C1857
2 1
XW1801
2 1
XW1803
2 1
XW1802
2
1 C18532
1 C18502
1 C1846
2
1 C1818
BUCK5_LX0PP0V9_SOC_FIXED
BUCK5_FB
PP2V8_UT_AF_VAR
PP_GPU_SRAM_VAR
PP_CPU_SRAM_VAR
PP1V1
PP1V8_MAGGIE_IMUPP1V8_TOUCH
BUCK2_PP_SOC_FB
BUCK1_PP_GPU_FB
BUCK0_PP_CPU_FB
PP1V8
BUCK9_LX0
BUCK7_LX0
BUCK6_LX0
BUCK9_FB
BUCK6_FB
BUCK4_FB
BUCK4_LX1
BUCK4_LX0
BUCK3_LX0
BUCK3_FB
BUCK2_LX1
BUCK2_LX0
BUCK1_LX3
BUCK1_LX2
BUCK1_LX1
BUCK1_LX0
BUCK0_LX3
BUCK0_LX1
BUCK0_LX0
PP_SOC_VAR
PP1V8_SDRAM
PP1V1_SDRAM
PP_GPU_VAR
BUCK0_LX2
PP_CPU_VARVDD_MAIN_SNS
BUCK8_LX0
BUCK8_FB
PP_VDD_MAIN
PP1V25_BUCK
BUCK7_FB
SYSTEM POWER:PMU (1/3) SYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=PMU
1UH-20%-2.1A-0.12OHMCRITICAL
PIQA20121T-SM
CRITICAL
ROOM=PMUPIQA20121T-SM
1UH-20%-2.1A-0.12OHM
0603
1.0UH-20%-1.5A-0.161OHMCRITICAL
MCFE2016T-SM
1.0UH-20%-2.25A-0.086OHMCRITICAL
ROOM=PMU
PIQA20121T-SM
0.47UH-20%-3.8A-0.048OHM
NO_XNET_CONNECTION=1CRITICAL
ROOM=PMU
CRITICALPINA20121T-SM
0.22UH-20%-6.7A-0.023OHM
NO_XNET_CONNECTION=1ROOM=PMU
0402-1ROOM=PMU
15UF
X5R6.3V20%
OMIT
ROOM=SOC
SHORT-20L-0.05MM-SM
NO_XNET_CONNECTION=1
ROOM=PMU0402-1X5R6.3V20%15UF
ROOM=PMU0402-1X5R6.3V20%15UF
20%6.3V
2.2UF
ROOM=PMU0201-1X5R-CERM
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
ROOM=PMU0402-1
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
D2333A1WLCSP
ROOM=PMU
OMIT
SHORT-20L-0.05MM-SM
NO_XNET_CONNECTION=1 ROOM=SOC
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
CRITICALROOM=PMU
NO_XNET_CONNECTION=1
ROOM=PMU0402-1X5R6.3V20%15UF
ROOM=PMU0402-1X5R6.3V20%15UF
5%10VC0G-CERM
ROOM=PMU01005
220PF
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
CRITICAL
ROOM=PMU
NO_XNET_CONNECTION=1OMIT
SHORT-20L-0.05MM-SM
ROOM=SOCNO_XNET_CONNECTION=1
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
ROOM=PMUCRITICAL
PIQA20121T-SM
0.47UH-20%-3.8A-0.048OHM
CRITICALNO_XNET_CONNECTION=1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
ROOM=PMU0402-1
15UF
X5R6.3V20%
ROOM=PMU0402-1
15UF
X5R6.3V20%
ROOM=PMU0402-1
15UF
X5R6.3V20%
ROOM=PMU01005
220PF
C0G-CERM10V5%
ROOM=PMU0402-1
15UF
X5R6.3V20%
ROOM=PMU01005
220PF
C0G-CERM10V5%
PINA20121T-SM
0.22UH-20%-6.7A-0.023OHM
ROOM=PMUCRITICALNO_XNET_CONNECTION=1
0.22UH-20%-6.7A-0.023OHM
PINA20121T-SM CRITICALROOM=PMUNO_XNET_CONNECTION=1
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
CRITICALROOM=PMU
NO_XNET_CONNECTION=1
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20% 20%
6.3VX5R
15UF
ROOM=PMU0402-1
5%10VC0G-CERM
220PF
ROOM=PMU01005
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
OMIT
SHORT-20L-0.05MM-SM
ROOM=SOC NO_XNET_CONNECTION=1
5%10VC0G-CERM
220PF
ROOM=PMU01005
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
5%10VC0G-CERM
220PF
ROOM=PMU01005
5%10VC0G-CERM
220PF
ROOM=PMU01005
5%10VC0G-CERM
220PF
ROOM=PMU01005
01005ROOM=PMU
220PF
C0G-CERM10V5%
220PF
C0G-CERM10V5%
01005ROOM=PMU
NO_XNET_CONNECTION=1PINA20121T-SM CRITICAL
0.22UH-20%-6.7A-0.023OHM
ROOM=PMU
PINA20121T-SM
0.22UH-20%-6.7A-0.023OHM
ROOM=PMUCRITICALNO_XNET_CONNECTION=1
CRITICAL
ROOM=PMU
1.0UH-3.6A-0.06OHM
NO_XNET_CONNECTION=1
MEKK2016T-SM
NO_XNET_CONNECTION=1 PINA20121T-SM
0.22UH-20%-6.7A-0.023OHM
CRITICALROOM=PMU
1.0UH-20%-3.6A-0.060OHM
PIQA20161T-SMROOM=PMU
CRITICALNO_XNET_CONNECTION=1
2.2UF20%6.3VX5R-CERM
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%
X5R-CERM6.3V
2.2UF
0201-1ROOM=PMU
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=PMU0201-1
2.2UF
ROOM=PMU0201-1X5R-CERM6.3V20%
6.3VX5R-CERM
2.2UF20%
0201-1ROOM=PMU
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R
20%15UF6.3V
0402-1ROOM=PMU
X5R6.3V20%15UF
ROOM=PMU0402-1
6.3V
15UF20%
0402-1ROOM=PMUX5R
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
15UF
X5R6.3V20%
0402-1ROOM=PMU
0402-1ROOM=PMU
6.3V20%15UF
X5R
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1ROOM=PMU
20%6.3VX5R
15UF
0402-1
20%
X5R
15UF
ROOM=PMU
6.3V
0402-1
20%
X5R
15UF
ROOM=PMU
6.3V
0402-1
20%6.3VX5R
15UF
ROOM=PMU0402-1
20%6.3VX5R
15UF
ROOM=PMU0402-1
20%6.3VX5R
15UF
ROOM=PMU
20%6.3VCERM-X5R
10UF
ROOM=PMU0402-9
OMIT
ROOM=SOC
SHORT-20L-0.05MM-SM
NO_XNET_CONNECTION=1
OMIT
SHORT-20L-0.05MM-SM
ROOM=SOC NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1ROOM=SOC
SHORT-20L-0.05MM-SM
OMIT
20%6.3VCERM-X5R
10UF
ROOM=PMU0402-9
ROOM=PMU
20%6.3VCERM-X5R
10UF
0402-9
20%6.3VCERM-X5R
10UF
0402-9ROOM=PMU
0402-1
20%6.3VX5R
15UF
ROOM=PMU
15 10 9 8 7
30 25
14
14
15 7
36 24
47 46 39 38
14
14
14
52 48 47 46 39 30 29 25 17 16 13 12 11 9 8 7 5
14
53 52 48 47 46 41 40 37 36 32 21 20 16
19 15
14
14
19
53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 10 9 4
19
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 2 OF 4
BA
T/U
SB
BU
CK
INP
UT
SW
ITC
H O
UT
PU
TS
VDD_BUCK6
VBUCK4_SW
BUCK3_SW1
BUCK3_SW2BUCK3_SW3
BUCK4_SW1
BUCK3_FB
VBUCK3_SW
BUCK3_LX0
BUCK4_LX0
BUCK4_LX1
BUCK4_FB
BUCK2_FB
BUCK2_LX0
BUCK1_FB
BUCK1_LX3
BUCK2_LX1
BUCK0_LX3
BUCK1_LX1
BUCK0_FB
BUCK1_LX2
BUCK1_LX0
BUCK0_LX1
BUCK0_LX0
BUCK0_LX2
VDD_BUCK1_01
VDD_MAIN
VDD_MAIN_SW
VDD_BUCK0_23
VDD_BUCK2
VDD_BUCK1_23
VDD_BUCK4
VDD_BUCK3
VDD_BUCK5
VDD_BUCK7
VDD_BUCK8
VDD_BUCK9
BUCK5_LX0
BUCK5_FB
BUCK6_LX0
BUCK6_FB
BUCK7_LX0
BUCK7_FB
BUCK8_LX0
BUCK8_FB
BUCK9_LX0
BUCK9_FB
VDD_MAIN_EVDD_MAIN_N
VDD_BUCK0_01
VDD_MAIN_WVDD_MAIN_W
VDD_MAIN_SNS
New for ADELYN
LDO2
LDO10 (Ga)
LDO8 (Cb)
2.4-3.675V
1.2-2.475V
U15 = PMU XTAL GND
ADELYN LDO SPECS
LDO18 (Gb)
LDO16 (Cb)
LDO19 (Gb)
BUF_1V2
LDO17 (Ca)
2.5V
0.7-1.4V
1.2V
1.2-2.475V
1.2-2.475V
0.7-1.4V
1.8V
1.2-2.475V
1.2-2.475V
ADJ.RANGE, LOW
2.4-3.675V
+/-5.0%
+/-3.0%
+/-2.0%
+/-3.0%
+/-2.5%
+/-5%
ACCURACY
+/-30mV
+/-30mV
+/-3.0%
ADJ.RANGE, HI
2.4-3.675V
2.4-3.675V
MAX.CURRENT
10mA
400mA
50mA
10mA
400mA
250mA
50mA
10mA
250mA
250mA
400mA
2.4-3.675V
2.4-3.675V
+/-2.5%
+/-30mV
LDO12 (E)
LDO13 (Cb)
LDO14 (Gb)
LDO15 (Ca)
(500/100mA in bypass)
+/-2.5%
50mA
ACCURACY
50mA
+/-2.5% 60mA
+/-1.4%
50mA
+/-2.5%
MAX.CURRENT
1000mA
250mA
+/-25mV
+/-30mV
+/-2.5%
2.4-3.675V
2.4-3.675V
2.4-3.675V
ADJ.RANGE, HI
1.2-2.475V
ADJ.RANGE, LOW
LDO4 (D)
LDO3 (Ca)
LDO#
LDO5 (F)
LDO9 (Cb)
LDO6 (Cb)
+/-75mV
LDO#
LDO11 (Cb)
0.7-1.2V 1150mA
250mA
LDO_RTC
LDO1
LDO5LDO4
LDO18
LDO16
LDO19
250mA
1.2-2.475V
0.7-1.4V
LDO15
LDO7
LDO12LDO13LDO14
250mA+/-30mV2.4-3.675V1.2-2.475VLDO7 (Cb)
1.2-2.475V
2.5-3.6V(tbc)
0.7-1.2V
2.4-3.675V
2.4-3.675V
1.2-2.475V
LDO2 (Ca)
LDO1 (Ca)
1.2-2.475V
1.2-2.475V
LDO8
LDO11LDO10
+/-4.5%
LDO9
LDO6
LDO3
LDO17
VBUF_1V2
VPUMP: 10nF min. @4.6V
#24989262:OTP-AO LDO17 default off,50mA Iout_max
#24989262
19 OF 81
19 OF 53
8.0.0
051-00482
2 1
R1901
2
1 C19232
1 C1930
2
1 C1904
2
1 C1905
2
1 C19152
1 C1912
2
1 C1919
2
1 C1909
2
1 C1902
2 1
XW1902
V8V19V12V1U8T13U15T8T7T6T4T15T5R4R17P15P4P3P2P1N4N19N18N17M4M17L8L4L17K8K4K3K2K17K1J8J4J17H4H19H18H17G4G17
F4F3F2
F17F1E9E8E7E6E5E4E3E2
E19E18E17E16E15E14E13E12E11E10
E1D7D3
D19D15D11
C7C3
C19C15C11
B7B3
B19B15B11
A7P14
A3P13A19H8
A15A11
A1
U1801
R5
G15
U18U17T11T18U12U16U14P7U13T9
P17
R18P18T17
T14U10U9T16T10U11T12
U19V18V17T19V16V13R9
R19P19R14V10
V9R16R10V11R12
R15
P8J6
U1801
2
1 C19352
1 C19332
1 C1932
2 1XW1901
2
1 C1922
2
1 C19132
1 C1908
2
1 C1925
2
1 C1926
2
1 C19272
1 C1921
2
1 C1918
2
1 C1916
2
1 C19012
1 C19072
1 C19112
1 C19102
1 C1914
PP2V9_NH_AVDD
PP0V9_NAND
PP0V8_AOP
PP3V3_USB
PP1V8_HAWKING
PP1V2_REF
PMU_VPUMP
PP_VDD_MAIN
PMU_VSS_RTC
PMU_PRE_UVLO_DET
VDD_MAIN_SNS
PP_VDD_MAIN
PP1V1_SDRAM
PP1V25_BUCK
PP_VDD_MAIN
PP_VDD_BOOST
PP3V0_TRISTAR_ANT_PROX
PP1V2_NH_NV_DVDDPP1V2_UT_DVDDPP_LDO17
PP1V8_ALWAYSPP3V0_MESAPP1V2_SOCPP1V8_MESA
PP_ACC_VAR
PP3V0_NAND
PP3V0_ALS_APS_CONVOYPP1V8_VA
SYSTEM POWER:PMU (2/3) SYNC_DATE=06/06/2016SYNC_MASTER=Sync
0.00 0201NOSTUFFMF
1%1/20W
20%2.2UF6.3VX5R-CERM0201-1ROOM=PMU
0201-1ROOM=PMU
X5R-CERM
20%2.2UF6.3V
2.2UF6.3V20%
X5R-CERM0201-1ROOM=PMU
5%16V
33PF
01005ROOM=PMU
NP0-C0G-CERM
6.3VX5RROOM=PMU
15UF20%
0402-1X5RROOM=PMU
20%6.3V
0402-1
15UF
20%
0201-1X5R-CERM
2.2UF
ROOM=PMU
6.3V
220PF
C0G-CERM10V5%
01005ROOM=PMU
47NF
X5R-CERM
ROOM=PMU
6.3V
01005
20%
ROOM=PMU
SHORT-20L-0.05MM-SM
OMIT
WLCSP
D2333A1
WLCSPD2333A1
ROOM=PMU
20%6.3VX5R0201-1
1.0UF20%6.3VX5R0201-1
1.0UF
ROOM=PMU
0.22UF20%6.3VX5R
ROOM=PMU01005-1
NO_XNET_CONNECTIONROOM=PMU
OMIT
SHORT-20L-0.05MM-SM
2.2UF
ROOM=PMU0201-1X5R-CERM6.3V20%
20%6.3V
ROOM=PMU
X5R-CERM0201-1
2.2UF20%
X5R-CERM
ROOM=PMU0201-1
6.3V
2.2UF
X5R0201-1
20%6.3V
ROOM=PMU
1.0UF
ROOM=PMU0201-1
20%6.3VX5R-CERM
2.2UF
0201-1
2.2UF20%6.3VX5R-CERM
ROOM=PMU
2.2UF
X5R-CERM
ROOM=PMU
20%6.3V
0201-1
20%6.3VX5R-CERM
2.2UF
0201-1ROOM=PMU
6.3V
ROOM=PMU
20%
0201-1X5R-CERM
2.2UF
X5R
20%6.3V
0402-1ROOM=PMU
15UF20%6.3VCERM-X5R
10UF
0402-9ROOM=PMUROOM=PMU
20%6.3V
0402-9
10UF
CERM-X5RCERM-X5R0402-9
6.3V
10UF20%
ROOM=PMU
6.3VCERM-X5R
20%
0402-9ROOM=PMU
10UF
29
17
15
30 7
44
16
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
20
20
18
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
18 15
18
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 38 37 32 30 25 23
53 41 40 29
30 29
25
21 20
38
16 10 8
48 38
40 27
17
30 29 25
35 34 33 32
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
SYM 4 OF 4
VSS VSS
SYM 1 OF 4
LDO
LDO
INP
UT
VDD_LDO4
VPP_OTP
VLDO2
VLDO8
VDD_LDO19VDD_LDO19
TP_DET
VDD_LDO10VDD_LDO11_13VDD_LDO14
VDD_LDO7_8
VDD_LDO16VDD_LDO18
VDD_LDO6_BYP
VDD_LDO9
VDD_LDO5
VDD_LDO1VDD_LDO2_15
VPUMP
VBUF_1V2
VLDO19VLDO18
VLDO14VLDO13
VLDO17VLDO16VLDO15
VLDO12
VLDO9_FB
VLDO10VLDO11
VLDO9
VBYPASS
VLDO7
VLDO6
VLDO4VLDO3
VDD_LDO3_17VLDO5_1VLDO5_0
VLDO1
#26169957: R2020 to 100ohm
Active high with int 200k PD
D101/D111 ONLY: TCXO_RF Supplies 32K
GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencerSequencer controllable
#24511807: Stuff for Carrier
Button for two-finger reset: 20711463 and 21196187
RS
RS
RS
BUTTON PULL-UP RESISTORS
NOTE:VDROOP_DET filtering is now inside Adelyn
RADIO PA NTC
AP NTC
FOREHEAD NTC
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
Reserved for MENU key on dev board
REAR CAMERA NTC
HIGH=FORCE PWM MODE
TBD
#24825674: Add R2020 to meet timing spec
20 OF 81
I2C0_AP_SCL 37 47
I2C1_AP_SCL47
I2C1_AP_SDA47
20 OF 53
8.0.0
051-00482
21
R2020
2
1 C2013
2
1 C2001
1 PP2002
1 PP2001
1 PP2003
21R2009
2
1 R2012
2
1 R2007
2
1 R2008
2
1 R2015
21R2000
V15V14
J7
F7
G7
F6
G6
N9
M7
L6L5P6M6R6
G16
H5
M9
R11L11
P12
M13
N6
N13
P11P10
P9
M5
N8
N10
M10
N5P5
G5
K6
L7
L9K10K9J10J9H10H9G8F8G9F9G10G11H12G12G13F13F14G14F15F16
L13L10
K11J11H11
N11M11N12M12
H7
N14N15N16M14M15M16L16L15L14
K12K13J13K14K15K16J16J15J14
K7
L12J12
U1801
21
Y2001
2
1 R2005
2
1 R2006
2
1 C2006
2
1 R2011
21XW2001
2
1 C2002
2
1 C20042
1C20032
1 C2011
2
1 R2010
2
1
R2004
2
1
R2003
2
1
R2002
2
1C2007
2
1C2008
2
1C2009
2
1C2010
2
1
R2001
21
XW2005
21
XW2004
21XW2002
21XW2003
PMU_TO_AOP_CLK32K
PMU_VSS_RTC
NC_GNSS_TO_PMU_HOST_WAKEPMU_TO_WLAN_REG_ON
PMU_TO_BB_USB_VBUS_DETECTPMU_TO_NFC_EN
PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R
PMUGPIO_TO_WLAN_CLK32K
AP_TO_PMU_SOCHOT_L
RADIO_PA_NTCREAR_CAMERA_NTC
PMU_IREF
BUTTON_POWER_KEY_LBUTTON_RINGER_A
BBPMU_TO_PMU_AMUX2
PMU_TO_CODEC_DIGLDO_PULLDN
PMU_TO_BT_REG_ON
NC_PMU_TO_GNSS_ENPMU_TO_NAND_LOW_BATT_BOOT_LNFC_TO_PMU_HOST_WAKE
PMU_TO_BBPMU_RESET_R_L
BBPMU_TO_PMU_AMUX1
PMU_XTAL2
PMU_TO_BOOST_EN
BT_TO_PMU_HOST_WAKE
PMU_TO_ACC_BUCK_SW_EN
PMU_VREF
PMU_TO_AP_PRE_UVLO_L
TRISTAR_TO_PMU_USB_BRICK_IDPMU_ADC_IN
BUTTON_VOL_DOWN_L
PMU_TO_AP_BUF_RINGER_APMU_TO_AP_BUF_POWER_KEY_LPMU_TO_AP_BUF_VOL_DOWN_L
TIGRIS_TO_PMU_INT_LBB_TO_PMU_PCIE_HOST_WAKE_L
WLAN_TO_PMU_HOST_WAKE
PMU_TO_HOMER_RESET_LPMU_TO_LCM_PANICBPMU_VDD_RTC
PP1V8_SDRAM
PP1V8_SDRAM
AP_NTC_RETURN
PMU_TO_BBPMU_RESET_L
BUTTON_POWER_KEY_L
RCAM_NTC_RETURN
PP1V8_ALWAYS
PP1V8_SDRAM
BUTTON_RINGER_A
BUTTON_VOL_DOWN_L
PP1V8_ALWAYS
PA_NTC_RETURN
TRISTAR_TO_PMU_HOST_RESET
PMU_TO_AOP_TRISTAR_ACTIVE_READYAOP_TO_PMU_ACTIVE_REQUESTPMU_TO_AOP_SLEEP1_READY
PMU_TO_SYSTEM_COLD_RESET_L
PMUGPIO_TO_WLAN_CLK32K
PMU_AMUX_BY
PMU_AMUX_AY
TRISTAR_TO_PMU_USB_BRICK_ID
PMU_ADC_IN
BBPMU_TO_PMU_AMUX3
PMU_TCAL
PMU_XTAL1
FOREHEAD_NTC
PMU_PRE_UVLO_DET
AP_VDD_GPU_SENSEAP_VDD_CPU_SENSE
PMU_TO_AP_THROTTLE_GPU_L
AP_TO_PMU_WDOG_RESET
LCM_TO_MANY_BSYNC
PMU_TO_AP_THROTTLE_CPU_L
PMU_TO_AOP_IRQ_L
AOP_TO_PMU_SLEEP1_REQUEST
AP_TO_PMU_TEST_CLKOUT
ACC_BUCK_TO_PMU_AMUX
PP1V2_MAGGIE
LCM_TO_CHESTNUT_PWR_EN
BUTTON_VOL_UP_L
AP_TO_PMU_AMUX_OUT
FOREHEAD_NTC_RETURN
AP_NTC
I2C_PMU_SDA_R
SYSTEM_ALIVE
CHESTNUT_TO_PMU_ADCMUX
SPI_PMGR_TO_PMU_SCLKSPI_PMGR_TO_PMU_MOSISPI_PMU_TO_PMGR_MISO
SYSTEM POWER:PMU (3/3) SYNC_DATE=06/06/2016SYNC_MASTER=Sync
OMIT
ROOM=SOC
SHORT-20L-0.05MM-SM
1/32W
100
MF01005
5%
1000PF10V
PLACE_NEAR=U1801:2mm
01005
10%
X5R
ROOM=PMU
1000PF10V10%
01005ROOM=PMUX5R
OMIT
SHORT-20L-0.05MM-SMROOM=SOC
P2MM-NSMROOM=SOC
SM
P2MM-NSMROOM=SOC
SM
ROOM=PMUP2MM-NSM
SM
0.00
MF01005
1/32W0%
10K
01005
NO_XNET_CONNECTION
ROOM=PMU
5%1/32WMF
NOSTUFF
220K1/32W
ROOM=PMU
5%
01005MF
NOSTUFF
5%
01005
1/32WMF
ROOM=PMU
100K
NOSTUFF
5%
01005
1/32WMF
ROOM=PMU
220K
ROOM=PMU
1/32W5%
01005MF
1.00K
WLCSPD2333A1
1.60X1.00-SMROOM=PMU
CRITICAL
32.768KHZ-20PPM-12.5PF
5%
01005
1/32WMF
100K
ROOM=PMU01005ROOM=PMU
5%1/32WMF
100K
SHORT-20L-0.05MM-SMROOM=SOC
OMIT
0.22UF
X5R
ROOM=PMU
20%6.3V
0201
1/20W
200K
MF201
1%
ROOM=PMU
SHORT-20L-0.05MM-SM
ROOM=PMUOMIT
20%
ROOM=PMU
X5R0201
6.3V
0.22UF
ROOM=PMU
CERM01005
5%16V
22PF
ROOM=PMU01005CERM
5%16V
22PF
16V5%
100PF
01005NP0-C0G
ROOM=PMU
100PF16V
01005ROOM=PMU
5%
NP0-C0G MF1/20W
ROOM=PMU
0.1%
0201
3.92K
0100510KOHM-1%
ROOM=PMU
10KOHM-1%01005ROOM=PMU
01005
10KOHM-1%
ROOM=PMU
16V
100PF
NP0-C0G
ROOM=PMU01005
5%
16V5%
100PF
01005NP0-C0G
ROOM=PMU
100PF16V
NP0-C0G01005
ROOM=PMU
5%
01005
ROOM=PMU
10KOHM-1%
OMIT
SHORT-20L-0.05MM-SM
ROOM=SOC
13
19
53
53
53
12 4
53 20
11
44 20
44 20
53
32
53
17
53
53
23
53
27
11
40 20
20
44 20
12
12
12
21
53
53
36
39
53 52 48 47 46 41 40 37 36 32 21 20 18 16
53 52 48 47 46 41 40 37 36 32 21 20 18 16
53
44 20
21 20 19
53 52 48 47 46 41 40 37 36 32 21 20 18 16
44 20
44 20
21 20 19
40
40 37 13 7
13
15 13
13 7
53 20
4
4
40 20
20
53
19
14
14
11
7
53 39 23 13
12
13
13
7
27
36
39 37
44 12
7
21 17 15
37
11
11
11
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
PP
PP
PP
NC
NC
NC
NC
NCNC
NC
SYM 3 OF 4
RE
FS
RE
SE
TS
CO
MP
AR
AT
OR
AD
C
PM
GR
BU
TT
ON
S
AM
UX
GP
IO
NT
CX
TA
L
GPIO3
SHDNRESET*RESET_IN3RESET_IN2
SLEEP1_REQ
CRASH*
OUT_32KSLEEP_32K
ACTIVE_RDY
SYS_ALIVEFORCE_SYNC
ACTIVE_REQSLEEP1_RDY
IRQ*
SDA
SCLK
SCL
MISOMOSI
AMUX_A1AMUX_A0
AMUX_A3AMUX_A2
AMUX_A4AMUX_A5
AMUX_B1AMUX_B0
AMUX_B2
AMUX_B4AMUX_B5AMUX_B6AMUX_B7
AMUX_B3
AMUX_BY
TDEV3TDEV2TDEV1
XTAL1
TCALTDEV5TDEV4
XTAL2
VDD_RTC
RESET_IN1
GPIO21
GPIO17GPIO18GPIO19GPIO20
GPIO16GPIO15GPIO14
GPIO12GPIO13
GPIO11GPIO10
GPIO6
GPIO8GPIO7
GPIO9
GPIO4GPIO5
GPIO2GPIO1
BUTTON2BUTTON3BUTTON4
BUTTONO1BUTTONO2BUTTONO3
BUTTON1
AMUX_A6AMUX_A7AMUX_AY
ADC_IN
IBATVBAT
BRICK_ID
VDROOP0_DETVDROOP1_DET
PRE_UVLO_DET
VDROOP0*VDROOP1*
PRE_UVLO*
IREF
VREF
#24558610: Change to 100ohm
TIGRIS CHARGER
F4: 100 kOhm pullup to VLDO (regulated output voltage)
TO TRINITY#25112685,Remove Snub
21 OF 81
I2C1_AP_SCL47
I2C1_AP_SDA47
21 OF 53
8.0.0
051-00482
21
R2103
2
1
3
Q2102
2
1 C2103
2
1R2105
2
1C2102
C2D2B2A2
F4
F1
E5C5D5B5A5
F3
E3
G3E4
F5
C3D3B3A3
G4
G2
G1F2
C4D4B4A4
G5
E1
C1D1B1A1
E2
U2101
2
1 C21132
1 C2114
2
1R2102
21
C2105
B3B2B1A3A2
A1
C3C2C1
Q2101
21
R2104
2
1 C2104
2
1 C21182
1 C2117
2
1 C2115
2
1 C21122
1 C21112
1 C2109
2
1 C2108
2
1 C2110 2
1C2106
2
1R21012
1 C2101
TIGRIS_BUCK_LX
PP_VDD_MAIN
USB_VBUS_DETECT
TIGRIS_ACTIVE_DIODETIGRIS_TO_PMU_INT_L
PP5V0_USB
TRISTAR_TO_TIGRIS_VBUS_OFF
SYSTEM_ALIVE
VBATT_SENSETIGRIS_TO_PMU_INT_R_L
TIGRIS_VBUS_DETECT
TIGRIS_PMID TIGRIS_LDO
TIGRIS_BOOT
SWI_AP_BI_TIGRISTIGRIS_TO_BATTERY_SWI_1V8
TIGRIS_TO_BATTERY_SWI
PP_BATT_VCC
PP1V8_SDRAM
PP1V8_ALWAYS
SYSTEM POWER:CHARGERSYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=CHARGERX5R-CERM16V10%
0402-1
4.2UF
ROOM=CHARGER
330PF
CER-X7R16V10%
01005
ROOM=CHARGER
330PF
CER-X7R16V10%
01005
CER-X7R01005ROOM=CHARGER
10%16V
330PF
MF
100K
ROOM=CHARGER01005
1/32W5%
ROOM=CHARGER
4.2UF
X5R-CERM16V10%
0402-1
MF1/32W
01005
5%ROOM=CHARGER
100
RV3C002UNDFN
ROOM=CHARGER
100PF
NP0-C0G35V5%
01005
1%
01005
1/32WMF
40.2K
220PF10V5%
01005C0G-CERM
ROOM=CHARGER
WCSP
CRITICALROOM=CHARGER
SN2400AB0
ROOM=CHARGER
10UF
CERM-X5R6.3V20%
0402-9 0402-9CERM-X5R6.3V20%
ROOM=CHARGER
10UF
NOSTUFF
5%1/32W
MF
ROOM=CHARGER01005
100K
0201
0.047UF
16V10%
NO_XNET_CONNECTION
ROOM=CHARGER
X5R
CRITICAL
ROOM=CHARGER
CSD68827WBGA
01005
30.1K
1/32WMF
1%ROOM=CHARGER
ROOM=CHARGER
220PF10V5%
01005C0G-CERM
2.2UF
ROOM=CHARGER
X5R-CERM6.3V20%
0201-1ROOM=CHARGER
2.2UF
X5R-CERM6.3V20%
0201-1
20%
ROOM=CHARGER
X5R-CERM0201-1
6.3V
2.2UF
ROOM=CHARGER
100PF
NP0-C0G35V5%
01005
4.2UF16V10%
X5R-CERM0402-1ROOM=CHARGER
28
53 46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 19 18 10 9 4
7
20
41 40 4
40
20 17 15
22
12
22
22 4
53 52 48 47 46 41 40 37 36 32 20 18 16
20 19
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NOTICE OF PROPRIETARY PROPERTY:
A
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C
345678
D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
S D
SY
M_V
ER
_1
G
PMID
VBUS
PGND
PGND
PGND
PGND
HDQ_HOSTHDQ_GAUGE
ACT_DIODE
BAT_SNS
BATBATBATBAT
BUCK_SWBUCK_SWBUCK_SWBUCK_SW
BOOT
LDO
TEST
VBUS_DET
INT
VBUS_OVP_OFF
SCLSDA
SYS_ALIVE
VBUS
VBUSVBUSVBUS
VDD_
MAI
NVD
D_M
AIN
VDD_
MAI
NVD
D_M
AIN
G
S
D
BATTERY CONNECTORTHIS ONE ON MLB ---> 516S00172 (matches d10 mlb MCO rev 27)
22 OF 81
22 OF 53
8.0.0
051-00482
2
1 C2204
21XW2201
12
11
109
87
6
5
43 21
J2201
21
R2201
2
1 C22012
1 C22032
1 C2202
VBATT_SENSE
TIGRIS_TO_BATTERY_SWIPP_BATT_VCC
TIGRIS_BATTERY_SWI_CONN
SYSTEM POWER:BATTERY CONNSYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=BATTERY_B2B
100PF
NP0-C0G16V5%
01005ROOM=BATTERY_B2B
56PF
NP0-C0G-CERM25V5%
01005C0G-CERM
220PF10V5%
ROOM=BATTERY_B2B01005
SHORT-20L-0.05MM-SM
ROOM=BATTERY_B2B
NO_XNET_CONNECTION=1PLACE_NEAR=J2201:2mm
RCPT-BATT-SHORT
ROOM=BATTERY_B2B
CRITICALALLOW_APPLE_PREFIX
F-ST-SM
ROOM=BATTERY_B2B
5%
MF1/32W
100
01005
ROOM=BATTERY_B2B
56PF
NP0-C0G-CERM25V5%
01005
21
21
21 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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C
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
Otherwise tracks VDD_MAINWhen VDD_MAIN < 3.4, boosts to 3.4
BOOST
HIGH=FORCE PWM MODE
Control details from Radar 19634006
23 OF 81
I2C0_AP_SDA47
I2C0_AP_SCL47
23 OF 53
8.0.0
051-00482
B1
B4B3
A4A3
C4C3
C2
B2
D4D3D2
A2
A1
C1
D1
U2301
2
1 C230921
L2301
2
1R2301
2
1 C23072
1 C23082
1 C23062
1 C23012
1 C23022
1 C23042
1 C2303
PP_VDD_MAIN
LCM_TO_MANY_BSYNC
SYS_BOOST_LX
PP_VDD_BOOST
PMU_TO_BOOST_EN
SYSTEM POWER:BOOSTSYNC_DATE=06/06/2016SYNC_MASTER=Sync
01005
5%10VC0G-CERM
220PF
ROOM=BOOST
4.7UF
X5R-CERM16.3V20%
402ROOM=BOOST
15UF
X5R6.3V20%
0402-1ROOM=BOOST
15UF
X5R6.3V20%
0402-1ROOM=BOOST
DSBGA
ROOM=BOOST
SN61280D
ROOM=BOOST0402-9
20%6.3V
10UF
CERM-X5R
0.47UH-20%-4.2A-0.048OHMROOM=BOOST
PIUA20121T-SM
511K
MF01005
1/32W1%
15UF
X5R6.3V20%
0402-1ROOM=BOOST
15UF
X5R6.3V20%
ROOM=BOOST0402-1
15UF
X5R6.3V20%
0402-1ROOM=BOOST
53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 21 19 18 10 9 4
53 39 20 13
53 38 37 32 30 25 19
20
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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C
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VOUT
AGNDPGND
SCL
BYP*
EN
SW
VOUT
SW
GPIO
VIN
VIN
SDA
VSEL
#25782019:Add 0ohm
MAGNESIUM - COMPASS
BOSCH: Internal PU
114K INT PU
114K INT PD1.09M INT PU
ST (APN:338S00230): stuff C2420-C2423, C2420R2422 with 155S00017, stuff R2403 PUBOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU
XW2404 to balance Via/Cu at INT pin
CARBON - ACCEL & GYROINVENSENSE, MPU-6800: C2403=0.1UF
#25740540:PP for South Carbon MOSI
BOMOPTION: CARBON_1#25765850:Update Carbon APN
C2420=4pF(131S0253),C2405=3pF(131S0251) per #25691124
PHOSPHORUS #24593845
24 OF 81
24 OF 53
8.0.0
051-00482
21
R2404116
2
43
14
7
15131211109
8
6
5
U2404
116
2
43
14
7
15131211109
8
6
5
U2401
1 PP2440
21
XW2404
2
1 C2442
2
1 C2418
2
1 C24482
1 C2445
2
1 C2449
2
1 C2443
2
1 R2441
2
1 C2419
21
R2422
2
1 R2403
68
534 7
1
2
U2403
2
1 C24212
1 C2422
2
1 C2408
2
1 C2415
2
1 C24202
1 C2423
2
1 R2401
C1
C2
C4
C3
B4
A4
A3
D2D1B3B1
D4
A1
A2
U2402
2
1 C2401
1PP2404
2
1 C2403
1PP2403
1PP2402
1PP2401
2
1 C24052
1 C24142
1 C2413
2
1 C2402
SPI_AOP_TO_COMPASS_CS_L
PP1V8_MAGGIE_IMU_FILT
PHOSPHORUS_TO_AOP_INT_L
SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI
PP1V8_MAGGIE_IMU_FILT
SPI_IMU_TO_AOP_MISO
SPI_AOP_TO_IMU_MOSI
COMPASS_TO_AOP_INT
SPI_AOP_TO_IMU_SCLK_R1
SPI_AOP_TO_PHOSPHORUS_CS_LSPI_AOP_TO_IMU_SCLK_R1
PP1V8_MAGGIE_IMU_FILT
BOT_GYRO_CHARGE_PUMP
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L
SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI
ACCEL_GYRO_TO_AOP_DATARDY
SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI
BOT_ACCEL_GYRO_TO_AOP_DATARDY
SPI_AOP_TO_IMU_SCLK_R2
BOT_ACCEL_GYRO_TO_XW_INT
PP1V8_MAGGIE_IMU_FILT
SPI_AOP_TO_IMU_SCLK_R1
PP1V8_MAGGIE_IMU
PP1V8_MAGGIE_IMU
PP1V8_MAGGIE_IMU PP1V8_MAGGIE_IMU_R
ACCEL_GYRO_TO_AOP_INT
GYRO_CHARGE_PUMP
SPI_AOP_TO_ACCEL_GYRO_CS_L
PP1V8_MAGGIE_IMU_R
PP1V8_MAGGIE_IMU
SENSORSSYNC_DATE=06/06/2016SYNC_MASTER=Sync
0%1/32W
01005MF
0.00
ROOM=BOT_CARBON
CRITICAL
MPU-6900-21
ROOM=BOT_CARBON
LGA
LGA
CRITICALROOM=CARBON
MPU-6900-21
BOMOPTION=CARBON_1
P2MM-NSMROOM=HOMER
SM
SHORT-20L-0.05MM-SM
ROOM=BOT_CARBONNO_XNET_CONNECTION=1
OMIT
0.1UF6.3VX5R-CERM01005
20%
ROOM=BOT_CARBON
6.3V
0201-1
20%
X5R-CERM
2.2UF
ROOM=CARBON
6.3V20%2.2UF
ROOM=BOT_CARBON0201-1X5R-CERM X5R-CERM
01005
6.3V20%0.1UF
ROOM=BOT_CARBON
ROOM=BOT_CARBON
NOSTUFF
5PF+/-0.1PF16VNP0-C0G01005
0.1UF
ROOM=BOT_CARBON
6.3V
0201
10%
X6S
100K5%1/32W
ROOM=SOC01005MF
+/-0.1PF5PF
01005
16VNP0-C0G
ROOM=CARBON
BOMOPTION=CARBON_1
01005
0%1/32W
0.00
MF
ROOM=PHOSPHORUS
1/32W
ROOM=SOC01005
100K5%
MF
NOSTUFF
BMP284AALGA
NP0-C0G-CERM
ROOM=PHOSPHORUS
20PF5%16V
01005
NOSTUFF
01005NP0-C0G-CERM
ROOM=PHOSPHORUS
16V5%20PF
NOSTUFF
X5R-CERM6.3V
0201-1
2.2UF20%
ROOM=MAGNESIUM
20%6.3V
01005
0.1UF
BOMOPTION=CARBON_1
ROOM=CARBON
X5R-CERM
4PF+/-0.1PF16V
ROOM=PHOSPHORUS01005
NOSTUFF
NP0-C0G
ROOM=PHOSPHORUS
NP0-C0G-CERM16V
01005
+/-0.1PF
NOSTUFF
5.6PF
100K5%1/32WMF01005ROOM=SOC
BOMOPTION=CARBON_1
CRITICALROOM=MAGNESIUM
LGA
HSCDTD601A-19A
20%0.1UF6.3VX5R-CERM01005ROOM=MAGNESIUM
ROOM=MAGNESIUMP2MM-NSM
SM
0.1UF10%
0201X6S6.3V
ROOM=CARBON
BOMOPTION=CARBON_1
SM
P2MM-NSMROOM=MAGNESIUM
ROOM=MAGNESIUM
SMP2MM-NSM
SM
ROOM=MAGNESIUMP2MM-NSM
ROOM=PHOSPHORUS
6.3V
01005
0.1UF20%
X5R-CERM
ROOM=PHOSPHORUS0201-1
20%
X5R-CERM6.3V
2.2UF0.1UF20%6.3V
ROOM=PHOSPHORUS01005X5R-CERM
X5R-CERM
20%6.3V
BOMOPTION=CARBON_1
01005ROOM=CARBON
0.1UF
13
24
13
24 13 24 13
24
24 13
24 13
13
24 13
13
24 13
24
13
24 13
24 13
13
24 13
24 13
13
13
24
24 13
36 24 18
36 24 18
36 24 18 24
13
13
24
36 24 18
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VDD VDDIO
SPCSDI
SDO
DRDY
GND
GND
GND
GND
GND
GND
CSFSYNC
INT
REGOUT
VDD VDDIO
SPCSDI
SDO
DRDY
GND
GND
GND
GND
GND
GND
CSFSYNC
INT
REGOUT
PP
NC
CS*
SDI SDO
VDD VDDIO
IRQ
GND
SCK
VPP
RSVRSV
RSV
VDD
VSS
SDO
SCL/SCK
SDA/SDI
CSB
TRG/SE
DRDY
RSV
RST*
PP
PP
PP
PP
NCNC
NC
NC
NC
NC
NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY
See Page46: D11x C2507 is 4UF
Scrub voltage selection IO FILTERSUTAH POWER
LPDP FILTERSAC return path for LPDP which is referenced to GND and VDD_MAIN
Desense for Wifi frequencies
25 OF 81
90_LPDP_UT_TO_AP_D2_P10
90_LPDP_UT_TO_AP_D2_N10
90_LPDP_UT_TO_AP_D3_P10
90_LPDP_UT_TO_AP_D3_N10
LPDP_UT_BI_AP_AUX10
25 OF 53
8.0.0
051-00482
2
1 C2514
2
1 C2502
2
1 C25292
1 C25282
1 C2522
2
1 C25102
1 C25082
1 C2506
21
C2530
2
1 C2519
2
1 C2505
2
1 C2521
2
1 C2520
21
L2502
2
1 C2518
A2A1
B1
B2
U2501
2
1 C2527
21C2525
21C2526
21C2523
21C2524
21
L2504
21
L2501
21
L2503
2
1 C2501
2
1 C25092
1 C2511
2
1 C2503
2
1 C2504
21
FL2503
2
1 C2512
21
FL2501
21
FL2504
2
1 C2515
2
1 C2513
PP1V2_UT_VDD_CONN
UT_AND_NV_TO_STROBE_DRIVER_STROBE
AP_TO_UT_CLK
PP1V2_UT_DVDD
MAKE_BASE=TRUE90_LPDP_UT_TO_AP_D2_N 90_LPDP_UT_TO_AP_D2_CONN_N
MAKE_BASE=TRUE90_LPDP_UT_TO_AP_D2_P 90_LPDP_UT_TO_AP_D2_CONN_P
90_LPDP_UT_TO_AP_D3_CONN_N
90_LPDP_UT_TO_AP_D3_CONN_PMAKE_BASE=TRUE90_LPDP_UT_TO_AP_D3_P
90_LPDP_UT_TO_AP_D3_NMAKE_BASE=TRUE
LPDP_UT_BI_AP_AUXMAKE_BASE=TRUE
PP1V8
PP_VDD_MAIN
AP_TO_UT_CLK_CONN
UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
LPDP_UT_BI_AP_AUX_CONN
PP1V8_UT_CONN
AP_TO_UT_SHUTDOWN_L
PP3V0_ALS_APS_CONVOY
PP2V8_UT_AF_VAR
PP_VDD_BOOST PP2V9_UT_AVDD_CONN
PP3V0_UT_SVDD_CONN
PP2V8_UT_AF_VAR_CONN AP_TO_UT_SHUTDOWN_CONN_L
SYNC_MASTER=sync SYNC_DATE=05/17/2016
B2B FILTERS: UTAH
ROOM=RCAM_B2B
5%
01005
10VC0G-CERM
220PF
DSBGA
ROOM=RCAM_B2B
LP5907UVX2.925-S
20%6.3VX5R-CERM0201-1
2.2UF
ROOM=RCAM_B2B
6.3V20%X5R-CERM
0.1UF
01005
ROOM=RCAM_B2B
6.3V20%X5R-CERM 01005
ROOM=RCAM_B2B
0.1UF
6.3V20%X5R-CERM
0.1UFROOM=RCAM_B2B
01005
6.3V20%X5R-CERM
0.1UF
01005
ROOM=RCAM_B2B
33-OHM-25%-1500MA
0201ROOM=RCAM_B2B
33-OHM-25%-1500MA
0201ROOM=RCAM_B2B
ROOM=RCAM_B2B0201
33-OHM-25%-1500MA
220PF
C0G-CERM10V
ROOM=RCAM_B2B
5%
01005
ROOM=RCAM_B2B
5%
01005
220PF10VC0G-CERM
ROOM=RCAM_B2B0201-1
20%6.3VX5R
1.0UF
01005ROOM=RCAM_B2B
5%10VC0G-CERM
220PF
ROOM=RCAM_B2B
5%
01005
10VC0G-CERM
220PF
ROOM=RCAM_B2B
5%
01005
10VC0G-CERM
220PF
150OHM-25%-200MA-0.7DCR
ROOM=RCAM_B2B01005
5%10V
220PF
C0G-CERM
ROOM=RCAM_B2B01005
ROOM=RCAM_B2B
10%
CER-X5R
0.22UF
01005
6.3V
33PF
NP0-C0G-CERM16V5%
ROOM=RCAM_B2B01005
33PF
NP0-C0G-CERM16V5%
ROOM=RCAM_B2B01005
ROOM=RCAM_B2B01005NP0-C0G-CERM
33PF16V5%
0201-1
6.3V20%
ROOM=RCAM_B2B
X5R-CERM
2.2UF
NOSTUFFROOM=RCAM_B2B
01005
5%16VNP0-C0G
100PF
0201-1ROOM=RCAM_B2B
2.2UF
X5R-CERM
20%6.3V
0201-1X5R-CERM6.3V20%2.2UF
ROOM=RCAM_B2B
01005ROOM=RCAM_B2B
0.1UF
X5R-CERM
20%6.3V
150OHM-25%-200MA-0.7DCR
01005ROOM=RCAM_B2B
0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=RCAM_B2B
20%2.2UF
0201-1X5R-CERM6.3V
ROOM=RCAM_B2B
ROOM=RCAM_B2B01005
5%16V
15PF
NP0-C0G-CERM
01005
150OHM-25%-200MA-0.7DCR
ROOM=RCAM_B2B
ROOM=RCAM_B2B01005
5%25VNP0-C0G-CERM
56PF
33-OHM-25%-1500MA
ROOM=RCAM_B2B0201
01005
5%25VNP0-C0G-CERM
56PF
ROOM=RCAM_B2B
45
26
9
19
45
45
45
45
52 48 47 46 39 30 29 18 17 16 13 12 11 9 8 7 5
53
46 41 40 39 37 35 34 33 31 30 28 27 26 23 21 19 18 10 9 4
45
45 30
45
45
9
30 29 19
30 18
53 38 37 32 30 23 19 46 45
45
45 45
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
VOUT
VEN
VIN
D10/sip_neo
STROBE DRIVERS INSIDE NEO SIP MODULE
AC return path for plane edge termination, which occurs near the Strobe modules.
26 OF 81
I2C_ISP_NV_SDA46
I2C_ISP_UT_SCL48
I2C_ISP_NV_SCL46
I2C_ISP_UT_SDA48
26 OF 53
8.0.0
051-00482
E19E18E17E16E15E14E13E12E11E10E9E8E7E6E5E4E3E2E1D19D18D17D16D15D14D5D4D1C20C19C18C17C16C15C14
C7C6C5C4C3C2C1
B20B17B16
B7B6B5B4B3B2
A20A19A18A17A16A15A14A13A12A11A10
A9A8A7A6A5A4A3A2
D20
E20B1A1
M2600D13B19B18
C13
D12
D11
C11
B15B14
B12B11
C12
B13
M2600
D3D2B8
C8
B9
B10
C10
D7D6
D10D9
C9
D8
M2600
2
1 C26172
1 C2618
2
1C2614
2
1C2613
2
1C26112
1C2612
2
1C26092
1C2610
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
PP_STROBE_DRIVER2_WARM_LED
PP_STROBE_DRIVER1_WARM_LED
PP_STROBE_DRIVER1_COOL_LED
PP_STROBE_DRIVER2_COOL_LED
STROBE_MODULE_NTCUT_AND_NV_TO_STROBE_DRIVER_STROBE
BB_TO_STROBE_DRIVER_GSM_BURST_IND
AP_TO_STROBE_DRIVER_HWEN
CAMERA:STROBE DRIVERSYNC_DATE=06/06/2016SYNC_MASTER=Sync
SIP
NEO
NEOSIP
SIP
ROOM=STROBE
NEO
CRITICAL
01005
10V
220PF
ROOM=STROBE2
5%
C0G-CERM01005
5%10VC0G-CERM
220PF
ROOM=STROBE2
01005
5%10V
C0G-CERM
220PF
ROOM=STROBE
01005
5%10V
C0G-CERM
220PF
ROOM=STROBE
CDS_LIB=apple
0402-9
20%6.3V
CERM-X5R
10UF
ROOM=STROBE2
20%6.3V
CERM-X5R
10UF
0402-9ROOM=STROBE2
20%
CERM-X5R
ROOM=STROBE0402-9
6.3V
10UF
0402-9
6.3VCERM-X5R
10UF
ROOM=STROBE
20%
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
45 44
45 44
45 44
45 44
44
25
53 46 37
9
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 3 OF 3
GND
GNDGNDGNDGND
GND
GNDGND
GNDGNDGND
GNDGNDGNDGND
GND
GNDGNDGND
GND
GND
GNDGNDGND
GNDGNDGND
GND
GND
GND
GND
GNDGND
GNDGND
GND
GND
2
GND
1
GND
2S
GND
1S
GNDGND
GNDGND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GNDGNDGNDGND
GND
GNDGND
GNDGND
GND
GND
GNDGND
GND
GND
GND
GNDGNDGND
GND
SYM 2 OF 3
LED1LED1
LED2LED2
NTC
VDDVDD
VDD
HWEN0
SDA2
GSM0
STB0
SCL2
SYM 1 OF 3
HWEN1
LED1
LED2
LED1
LED2
NTC
VDDVDD
VDD
GSM1
SDA1
STB1
SCL1
#25761020:Add Bypass 0ohm
ACCESSORY BUCK
From PMU GPIO14
PMU_AMUX_B3 FOR NOW
From AP GPIO1
#25741319: Change to 4UF
From PMU LDO6
#25987909: To Resistor Divider
#25919133: C2707 on P46
#25172498
FET Changes per #25687842 4/12/2016
To Tristar on Pg40
#25370332: For EMC
27 OF 81
27 OF 53
8.0.0
051-00482
A1A2
B2
B1
U2710
2
1R2702
A1
A2
B1
C2
C1
B2
U2700
6
15
2
4
3
U2701
2
1R2704
2
1R2703
2
1R2706
2
1 C2710
2
1R2710
21
R2711
2
1 C2708
2
1
XW2707
21
XW2700
A2B2
A1
B1
Q2701
A2B2
A1
B1
Q2700
2
1 C2700
2
1R2700
21
L2700
2
1 C2701
2
1R2705
2
1 C2703
2
1 C27052
1 C2704
2
1C2706
2
1 C2702
2
1R2701
K
A
D2700
PP_ACC_VAR
ACC_BUCK_FB
ACC_BUCK_TO_PMU_AMUX
PP_ACC_VAR
AP_TO_ACC_BUCK_VSEL
ACT_DIODE_TO_COMP_OUT
ACT_DIODE_TO_COMP_NEG
PP_ACC_BUCK_VAR
ACT_DIODE_TO_COMP_POS
ACC_BUCK_SW
PMU_TO_ACC_BUCK_SW_EN
ACC_BUCK_EN
ACC_BUCK_FB
PP_VDD_MAIN_ACC_BUCK_VINPP_VDD_MAIN
SYNC_DATE=05/17/2016SYNC_MASTER=sync
Accessory: Buck Circuit
ROOM=ACC_BUCK
10K1/32W
01005
5%
MF
10V
ROOM=ACC_BUCK
220PF5%
01005C0G-CERM
6.3V20%2.2UF
ROOM=PMUX5R-CERM0201-1
6.3V20%2.2UF
X5R-CERM0201-1ROOM=PMU
10%0.22UF
6.3VCER-X5R
ROOM=ACC_BUCK01005
10UF
ROOM=ACC_BUCK
6.3VCERM-X5R0402-9
20%
1/32W
ROOM=ACC_BUCK
100K
MF01005
5%
PMEG3002ESFROOM=ACC_BUCK
SOD962-2
ROOM=ACC_BUCK
WLCSP-COMBOFPF1204UCX
OMIT_TABLE
0.1%1/32W
01005ROOM=ACC_BUCK
200K
TF
FAN53612-1.5V-1.9VWLCSP
ROOM=ACC_BUCK
SCY992200A
ROOM=ACC_BUCK
UDFN
ROOM=ACC_BUCK01005TF1/32W0.1%200K
ROOM=ACC_BUCK01005TF1/32W0.1%200K0.1%
1/32WTF01005ROOM=ACC_BUCK
200K
ROOM=ACC_BUCK
CER-X5R01005
0.22UF10%6.3V
01005
100K1%1/32WMF
ROOM=ACC_BUCK
MF
ROOM=ACC_BUCK
0.00
1%
0201
1/20W
NOSTUFF
CER-X5R
20%
0201ROOM=TRISTAR
4UF6.3V
ACT_DIODE_TO_COMP_SENSE
SHORT-20L-0.05MM-SMROOM=TRISTARNO_XNET_CONNECTION=1
OMIT
NO_XNET_CONNECTION=1ROOM=ACC_BUCK
SHORT-20L-0.05MM-SM
PLACE_NEAR=Q2700:2mm
OMIT
PMCM4401VPEWLCSP
ROOM=TRISTAR
WLCSP
ROOM=TRISTAR
PMCM4401VPE
2.2UF6.3VX5R-CERM0201-1
ROOM=ACC_BUCK
20%
ROOM=ACC_BUCK
MF01005
5%1/32W
100K
CRITICAL
ROOM=ACC_BUCK
0.47UH-20%-2.52A-0.08OHM
PIGA1608-SM
ROOM=ACC_BUCK
0.1UF20%6.3VX5R-CERM01005
40 27 19
27
20
40 27 19
12
46
20
27
53
46 41 40 39 37 35 34 33 31 30 28 26 25 23 21 19 18 10 9 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
VIN
GND
VOUT
ON
FB
EN
VSEL
SW
VIN
GND
VEE
VCC
VOUT
NCIN-
IN+
D
G
S
D
G
S
28 OF 81
28 OF 53
8.0.0
051-00482
Y5Y4Y3Y2Y1X7X4X1W7W6W5W4W3W2W1V7V4V1U7U6U5U4U3U2U1T7T5T4T3T1S7S5S4S3S1R7R5R4R3R1Q7Q5Q4Q3Q1P7P6P5P4P3P2P1N7N5N3N2N1M7M5
M3M2M1L7L5L3L2L1K7K6K5K4K3K2K1J7J5J4J3J1H7H5H4H3H1G7G5G4G3G1F7F5F4F3F1E7E6E5E4E3E2E1D7D4D1C7C6C5C4C3C2C1B7B4B1A7A6A5A4A3
Y6Y7A2A1
M2800
T2S2R2Q2
D3D2
B3B2
T6S6R6Q6
M2800
J2H2G2F2
D6D5
B6B5
J6H6G6F6
M2800
V6V5
X6X5
M2800
V3V2
X3X2
M2800
N4M4L4
N6M6L6
M2800
TIGRIS_BUCK_LX
ARC1_LX
SPEAKERAMP1_LX
BL_SW1_LX
BL_SW2_LX
BL34_SW1_LX
BL34_SW2_LX
PP_VDD_MAIN PP_VDD_MAIN
SYNC_MASTER=sync SYNC_DATE=05/17/2016
TRINITY:FF SPECIFIC
TRINITY_BLUESIP
TRINITY_BLUESIP
SIPTRINITY_BLUE
TRINITY_BLUESIP
TRINITY_BLUESIP
SIPTRINITY_BLUE
21
35
34
37
37
46
46
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 6 OF 6
GND
GND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND
GNDGND
GND
GNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGND
GND
1SG
ND1
GND
2G
ND2S
GND
GNDGNDGNDGND
GND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND
SYM 5 OF 6
BL2_2BL2_2
BL2_1
BL2_1BL2_1BL2_1
VDD2_2VDD2_2
VDDX_1VDDX_1VDDX_1VDDX_1
SYM 4 OF 6
VDDX_1VDDX_1VDDX_1VDDX_1
VDD1_2VDD1_2
BL1_2
BL1_1BL1_1
BL1_1BL1_1
BL1_2
SYM 3 OF 6
SPKSPKVDD_S
VDD_S
SYM 2 OF 6
VDD_AVDD_A ARC
ARC
SYM 1 OF 6
VDD_TVDD_TVDD_T TIG
TIGTIG
NEW HAMPSHIRE I/O
CONVOY I/O
SPEAKER2
#24511567: Remove C2918
PROX, ALS, & CONVOY POWER
MIC3
NEW HAMPSHIRE POWER
#25170697: R2915 to 240ohm/C2921 to 220pF
PROX/ALS I/O
#25657495: Update FL2905 to 100ohm
29 OF 81
29 OF 53
8.0.0
051-00482
2
1 C2934
2
1 C2933
21
R2905
2
1 C2935
2
1C2931
2
1 C2932
2
1 C2916
21
R2915
21
FL2903
21
R2904
21
R2903
2
1 C29172
1 C2926
21
FL2910
2
1 C29272
1 C2908
2 1
FL2909
21
FL2904
21
FL2914
2
1 DZ2907
2
1 DZ2906
2
1 DZ2905
21
FL2906
2
1 C2906
2
1 C2905
2
1 C29092
1 C2904
2
1 C2903
2
1 C2902
21
FL2902
21
FL2908
2
1 C2911
21
FL2907
2
1 C2910
2
1 C2901
2
1 C2914
2
1 C2915
21
FL2901
2
1 C2924
2 1
FL2911
21
FL2913
2
1 C2921
SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N
SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
PDM_ADARE_TO_CONVOY_CLK PDM_ADARE_TO_CONVOY_CLK_CONN
PP2V9_NH_AVDD_CONN
AP_TO_NH_SHUTDOWN_L AP_TO_NH_SHUTDOWN_CONN_L
AP_TO_NH_CLK
PROX_BI_AP_AOP_INT_PWM_L
SPEAKERAMP2_TO_SPEAKER_OUT_POS
PP3V0_ALS_CONVOY_CONN
PP3V0_PROX_CONN
SPEAKER_TO_SPEAKERAMP2_VSENSE_N
FRONTMIC3_TO_CODEC_AIN4_CONN_N
FRONTMIC3_TO_CODEC_AIN4_CONN_P
PP3V0_ALS_APS_CONVOY
PP3V0_TRISTAR_ANT_PROX
PDM_CONVOY_TO_ADARE_DATA_CONN
PP2V9_NH_AVDD
PP1V8
AP_TO_NH_CLK_CONN
PP1V8_NH_IO_CONN
PP1V2_NH_NV_DVDD
PDM_CONVOY_TO_ADARE_DATA
ALS_TO_AP_INT_CONN_LALS_TO_AP_INT_L
PP_CODEC_TO_FRONTMIC3_BIAS
FRONTMIC3_TO_CODEC_AIN4_N
FRONTMIC3_TO_CODEC_AIN4_P
PP1V2_NH_DVDD_CONN
SPEAKER_TO_SPEAKERAMP2_VSENSE_P
PROX_BI_AP_AOP_INT_PWM_L_CONN
SPEAKERAMP2_TO_SPEAKER_OUT_NEG
B2B:FOREHEAD
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
01005
NO_XNET_CONNECTION=1
ROOM=FOREHEAD
NP0-C0G
100PF5%35V
01005
NO_XNET_CONNECTION=1
ROOM=FOREHEAD
NP0-C0G
100PF5%35V
1/32W5%
100
01005MF
ROOM=FOREHEAD
ROOM=FOREHEAD
5%
01005
NO_XNET_CONNECTION=1
C0G-CERM10V
220PF
C0G-CERM
ROOM=FOREHEAD
5%10V
01005
220PF
NO_XNET_CONNECTION=1
C0G-CERM01005
220PF10V
ROOM=FOREHEAD
5%
NO_XNET_CONNECTION=1
2.2UF6.3VX5R-CERM
ROOM=FOREHEAD
20%
0201-1
240
1%1/32W
ROOM=FOREHEAD01005MF
10-OHM-750MA
ROOM=FOREHEAD01005-1
ROOM=FOREHEAD
0%
MF1/32W
01005
0.00
01005ROOM=FOREHEAD
MF1/32W0%
0.00
X5R-CERM6.3V20%
ROOM=FOREHEAD0201-1
2.2UF5%
01005
220PF10VC0G-CERMROOM=FOREHEAD
ROOM=FOREHEAD01005
150OHM-25%-200MA-0.7DCR
2.2UF
X5R-CERM6.3V20%
ROOM=FOREHEAD0201-1
C0G-CERM10V5%
01005ROOM=FOREHEAD
220PF
150OHM-25%-200MA-0.7DCR
01005ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
ROOM=FOREHEAD01005
ROOM=FOREHEAD01005
150OHM-25%-200MA-0.7DCR
NO_XNET_CONNECTION=1
ROOM=FOREHEAD6.8V-100PF01005
NO_XNET_CONNECTION=1
6.8V-100PF01005ROOM=FOREHEAD
6.8V-100PFROOM=FOREHEAD01005
ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
01005
ROOM=FOREHEAD
56PF5%
NP0-C0G-CERM25V
01005
01005NP0-C0G-CERM
ROOM=FOREHEAD
56PF25V5%
ROOM=FOREHEAD0201-1
2.2UF
X5R-CERM6.3V20%
ROOM=FOREHEAD01005
220PF
C0G-CERM10V5%
5%10VC0G-CERM
220PF
01005ROOM=FOREHEAD
ROOM=FOREHEAD
5%10VC0G-CERM
220PF
01005
33-OHM-25%-1500MA
0201ROOM=FOREHEAD
ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
01005
10V
01005ROOM=FOREHEAD
C0G-CERM
220PF5%
01005ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
01005
25V5%
NP0-C0G-CERM
56PF
ROOM=FOREHEAD
ROOM=FOREHEAD
0.1UF
X5R-CERM6.3V20%
01005
ROOM=FOREHEAD
0.1UF
X5R-CERM6.3V20%
01005
ROOM=FOREHEAD
X5R-CERM6.3V
0.1UF20%
01005
ROOM=FOREHEAD
33-OHM-25%-1500MA
0201
ROOM=FOREHEAD
56PF
NP0-C0G-CERM25V5%
01005
150OHM-25%-200MA-0.7DCR
ROOM=FOREHEAD
01005
ROOM=FOREHEAD01005
150OHM-25%-200MA-0.7DCR
C0G-CERM10V5%
01005ROOM=FOREHEAD
220PF
45
45
45
33 45
45
9
9
13 12
46 45 33
45
33
45
45
30 25 19
53 41 40 19
45
19
52 48 47 46 39 30 25 18 17 16 13 12 11 9 8 7 5
45
45
30 19
33
45 12
32
31
31
45
33
45
46 45 33
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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DR
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SHEET
PAGE TITLE
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A
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2 1
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
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D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NEAR SOC
D11: STUFF L3001, L3004. NOSTUFF L3005, L3006
46 - FF Specific4 - Mechanical
OTHER FORM FACTOR SPECIFIC PAGES:THIS PAGE UNIQUE TO LARGE FORM FACTOR
THIS ONE --->
NEVADA CONNECTOR
NEAR B2B
Desense for Wifi frequencies
516S00151 PLUG516S00152 RCPT (USED ON MLB)
D12: NOSTUFF L3001, L3004. STUFF L3005, L3006
GPIO FILTERS
LPDP FILTERS
NEVADA POWERNOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY
30 OF 81
LPDP_NV_BI_AP_AUX10
CKPLUS_WAIVE=I2C_PULLUP
AP_TO_NV_CLK_R9
AP_TO_NV_SHUTDOWN_L9
90_LPDP_NV_TO_AP_D0_P10
90_LPDP_NV_TO_AP_D1_P10
CKPLUS_WAIVE=I2C_PULLUP
90_LPDP_NV_TO_AP_D1_N10
90_LPDP_NV_TO_AP_D0_N10
30 OF 53
8.0.0
051-00482
2
1 C30062
1 C3007
2
1 C30212
1 C30192
1 C3016
2
1 C3012
2
1 C3018
2
1 C3026
2
1 C3017
2
1 C3001
2
1 C3009
2
1 C30332
1 C30322
1 C30042
1 C3003
2
1 C3002
2
1 C3005
26 25
24 23
22 2120 1918 1716 1514 1312 1110 9
8 76 54 32 1
J3001
21
L3005
21
L3006
21
C3031
2
1 C3030
2
1 C3028
A2A1
B1
B2
U3001
21
L3002
21
L3004
2
1 C3020
21
L3001
2
1 C3010
21
R3002
2
1 C3014
2
1 C3013
21
R3001
21
R3003
2
1 C3029
21C3025
21C3024
21C3023
21C3022
2
1 C300821
FL3004
2
1 C3015
2
1 C3011
21
FL3002
2
1 C3027
21
L3003
21
FL3001
PP2V8_UT_AF_VAR
LPDP_NV_BI_AP_AUX_CONN
90_LPDP_NV_TO_AP_D1_CONN_P
90_LPDP_NV_TO_AP_D0_CONN_P
I2C_NV_SCL_CONNI2C_ISP_NV_SCLMAKE_BASE=TRUE
I2C_ISP_NV_SDAMAKE_BASE=TRUE
PP1V2_NV_VDD_CONN
AP_TO_NV_SHUTDOWN_CONN_L
PP1V2_NH_NV_DVDD
MAKE_BASE=TRUEAP_TO_NV_CLK_R
90_LPDP_NV_TO_AP_D0_CONN_N
90_LPDP_NV_TO_AP_D1_CONN_N
MAKE_BASE=TRUE90_LPDP_NV_TO_AP_D0_N
90_LPDP_NV_TO_AP_D0_CONN_N
90_LPDP_NV_TO_AP_D1_CONN_N
LPDP_NV_BI_AP_AUX_CONNPP1V8_NV_IO_CONN
I2C_NV_SCL_CONN 90_LPDP_NV_TO_AP_D0_CONN_PUT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
MAKE_BASE=TRUE90_LPDP_NV_TO_AP_D0_P
PP1V8_NV_AF_CONNPP3V3_NV_SVDD_CONN
AP_TO_NV_SHUTDOWN_CONN_L90_LPDP_NV_TO_AP_D1_CONN_P
AP_TO_NV_CLK_CONN
PP2V9_NV_AVDD_CONN
MAKE_BASE=TRUELPDP_NV_BI_AP_AUX
UT_TO_NV_SYNC_J2501_CONN UT_TO_NV_SYNC_J3001_CONN
AP_TO_NV_SHUTDOWN_LMAKE_BASE=TRUE
AP_TO_NV_CLK
PP1V2_NV_VDD_CONN
UT_TO_NV_SYNC_J3001_CONN
I2C_NV_SDA_CONN
PP3V3_NV_SVDD_CONN
PP1V8_NV_IO_CONN
PP1V8
PP3V3_USB
AP_TO_NV_CLK_CONN
I2C_NV_SDA_CONN
PP_VDD_BOOST
PP3V0_ALS_APS_CONVOY
UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
MAKE_BASE=TRUE90_LPDP_NV_TO_AP_D1_N
PP2V8_UT_AF_VAR
PP1V8_NV_AF_CONN
PP_VDD_MAIN
MAKE_BASE=TRUE90_LPDP_NV_TO_AP_D1_P
PP2V9_NV_AVDD_CONN
B2B:NEVADASYNC_DATE=05/17/2016SYNC_MASTER=sync
ROOM=NEVADA01005
150OHM-25%-200MA-0.7DCR
6.3V20%4UF
CER-X5R0201
ROOM=NEVADA
CER-X5R
10%
01005
0.22UF
ROOM=NEVADA
6.3V
ROOM=NEVADA
2.2UF
X5R-CERM6.3V20%
0201-1ROOM=NEVADA
2.2UF
X5R-CERM6.3V20%
0201-1ROOM=NEVADA
2.2UF20%
0201-1
6.3VX5R-CERM
01005
10V5%220PF
C0G-CERM
ROOM=NEVADA
01005
10V5%220PF
C0G-CERM
ROOM=NEVADA
01005C0G-CERM10V5%
ROOM=NEVADA
220PF
01005
220PF5%10VC0G-CERM
ROOM=NEVADA
01005
10V5%
C0G-CERM
220PF
ROOM=NEVADA
01005
5%10V
220PF
C0G-CERM
ROOM=NEVADA
ROOM=NEVADA
NP0-C0G-CERM
33PF5%16V
01005ROOM=NEVADA
NP0-C0G-CERM
33PF5%16V
01005ROOM=NEVADA
NP0-C0G-CERM
5%16V
01005
33PF5%16V
01005NP0-C0G-CERM
ROOM=NEVADA
33PF
0201-1
2.2UF6.3V20%
X5R-CERM
ROOM=NEVADA
NP0-C0G
100PF5%16V
ROOM=NEVADA01005
NOSTUFF
F-ST-SMAA26D-S022VA1
ROOM=NEVADA
0201ROOM=NEVADA
33-OHM-25%-1500MA
NOSTUFF
0201ROOM=NEVADA
33-OHM-25%-1500MA
NOSTUFF
ROOM=NEVADA
X5R-CERM6.3V20%
01005
0.1UF
0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=NEVADA
01005
5%16VNP0-C0G-CERM
15PF
ROOM=NEVADA
ROOM=NEVADA
DSBGALP5907UVX2.925-S
0201ROOM=NEVADA
33-OHM-25%-1500MA
0201ROOM=NEVADA
33-OHM-25%-1500MA
ROOM=NEVADA
1.0UF
X5R6.3V20%
0201-1
ROOM=NEVADA0201
33-OHM-25%-1500MA
NP0-C0G-CERM
ROOM=NEVADA
56PF25V5%
01005
01005
0.00
1/32WMF
0%
ROOM=NEVADA
ROOM=NEVADA
56PF
NP0-C0G-CERM25V5%
01005
56PF
NP0-C0G-CERM25V5%
ROOM=NEVADA01005
01005
0.00
1/32WMF
0%
ROOM=NEVADA
1%
MF1/32W
33.2
01005ROOM=SOC
100PF
NP0-C0G
5%
01005ROOM=RCAM_B2B
16V
ROOM=NEVADA GND_VOID=TRUE
01005X5R-CERM6.3V20%
0.1UF
GND_VOID=TRUE
01005X5R-CERM
ROOM=NEVADA0.1UF
20% 6.3V
GND_VOID=TRUE
0.1UF
X5R-CERM
ROOM=NEVADA20% 6.3V
01005
GND_VOID=TRUE
X5R-CERMROOM=NEVADA
0.1UF6.3V20%01005
5%16VNP0-C0G
100PF
ROOM=NEVADANOSTUFF
01005
ROOM=NEVADA01005
150OHM-25%-200MA-0.7DCR
ROOM=NEVADA
56PF25V5%
01005NP0-C0G-CERM
ROOM=NEVADA
100PF
NP0-C0G16V5%
01005
150OHM-25%-200MA-0.7DCR
ROOM=NEVADA01005
100PF
NP0-C0G16V5%
01005ROOM=NEVADA
33-OHM-25%-1500MA
ROOM=NEVADA0201
30 25 18
30
30
30
30 46 9
46 9
30
30
29 19
30
30
30
30
30
30
30 30
45 30 25
30
30
30
30
30
30
45 30
30
30
30
30
30
52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5
19 7
30
30
53 38 37 32 25 23 19
29 25 19
45 30 25
30 25 18
30
53 46 41
40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4
30
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
VOUT
VEN
VIN
Radar 21203307
For Borealis
AC return path for Mikeybus which is referenced to GND and VDD_MAIN
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)
WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy
31 OF 81
31 OF 53
8.0.0
051-00482
2
1R3101
2
1 C31122
1 C3113
B9A9
G10
D1E1
M10
M4
L10
M5
K11K10
J9
J12H12
B2A2
B3A3
C3C4
B4A4
L8M8
L9M9
G2G3
F2F3
F1G1
J3J4
K2K1
K3L3
L2L1
U3101
21
C3106
21R3103
21R3104
21
C3107
MIKEYBUS_REFERENCE
PDM_CODEC_TO_SPKAMP2_CLK
LOWERMIC1_TO_CODEC_AIN1_PLOWERMIC1_TO_CODEC_AIN1_N
LOWERMIC4_TO_CODEC_AIN2_N
FRONTMIC3_TO_CODEC_AIN4_N
REARMIC2_TO_CODEC_AIN3_P
90_MIKEYBUS_DATA_P
90_MIKEYBUS_DATA_N
PP_VDD_MAIN
90_MIKEYBUS_CALTRA_DATA_N90_MIKEYBUS_CALTRA_DATA_P
REARMIC2_TO_CODEC_AIN3_N
FRONTMIC3_TO_CODEC_AIN4_P
PDM_CODEC_TO_SPKAMP2_DATA
HAWKING_TO_CODEC_AIN7_PHAWKING_TO_CODEC_AIN7_N
LOWERMIC4_TO_CODEC_AIN2_P
AUDIO:CALTRA CODEC (1/2) SYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=CODEC
NP0-C0G01005
100PF
5%16V
MF01005
5%
ROOM=CODEC
1/32W
20.0
20.0
MF1/32W5%
01005ROOM=CODEC
NP0-C0G01005
100PF
5%16V
ROOM=CODEC
5%
01005
1/32WMF
100
ROOM=CODEC
ROOM=CODEC
C0G-CERM
220PF10V
01005
5%
ROOM=CODEC
C0G-CERM
220PF10V
01005
5%
CRITICAL
CS42L71
WLCSP-1
ROOM=CODEC
41
33
41
41
41
29
44
40
40
53
46 41 40 39 37 35 34 33 30 28 27 26 25 23 21 19 18 10 9 4
44
29
33
44
44
41
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NCNC
NCNC
NCNC
NCNC
NCNC
NC
NCNC
NCNCSYM 1 OF 3
HS3_REFHS4_REF
HPDETECT
HPOUTB
HS3
HS4
AOUT2-
HSIN+HSIN-
HPOUTA
AOUT1+AOUT1-
AOUT2+
MBUS_REF
DNDP
AIN1+AIN1-
AIN2+AIN2-
AIN3+AIN3-
AIN4-AIN4+
AIN5-AIN5+
AIN6-AIN6+
AIN7+AIN7-
DMIC3_DATADMIC3_CLK
DMIC2_CLKDMIC2_DATA
DMIC4_CLK
DMIC1_DATADMIC1_CLK
PDM_CLK
DMIC4_DATA
PDM_DATA
NCNC
NCNC
NC
CALTRA AUDIO CODEC (POWER & I/O)
32 OF 81
32 OF 53
8.0.0
051-00482
2
1
XW3203
2
1R3202
2
1 C3222
2
1 C32232
1 C3224
2
1 C3225
2 1
XW3202
2
1 C3221
A10A11
B11C11
K8
K4E7E6E5D6D5B10D11
M1H4G11E9E8D9D7D10C10
H3
A7D8
B7C7
B8A8
C12
D3
C2D2D4
K9
J8
H9H8H7H6G9G8G7G6G5G4F10F9F8F7F6F5F4E10E4E3E2B12A12A1
H5J5
C9C8
B6B5
C6C5
U3101
H11
H10
M7
A5E12
C1G12
D12
J11
J1
J10
K5J6
L5K6
J7L6
K7M6
M11F12
M2M3
L7L4F11
E11B1A6
L11
J2
K12
M12
L12
H1
H2
U3101
2
1 C3205
2
1 C3209
2
1 C32122
1 C3214
2
1 C3217
21
C3202
2
1 C32152
1 C3213
2
1 C3220
2
1 C3211
21
C3201
21
C3204
21
C3203
2
1 C3208
2
1R3201
I2S_L26_CODEC_TO_MAGGIE_DIN
I2S_AOP_TO_CODEC_XSP_DOUT
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_CODEC_XSP_TO_AOP_DIN
I2S_AP_TO_CODEC_MSP_BCLK
SPI_CODEC_MAGGIE_TO_AP_MISO
SPI_AP_TO_CODEC_MAGGIE_SCLK
I2S_CODEC_XSP_TO_AOP_LRCLKI2S_CODEC_XSP_TO_AOP_BCLK
AUDIO_TO_AOP_INT_L
I2S_AP_TO_CODEC_MSP_DOUT
CODEC_RESET_L
PP1V8_SDRAM
I2S_CODEC_TO_AP_MSP_DIN
SPI_AP_TO_CODEC_MAGGIE_MOSI
PMU_TO_CODEC_DIGLDO_PULLDN
SPI_AP_TO_CODEC_CS_L
CODEC_AGND
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
CALTRA_LP_FILTP
PP1V2_VD_FILT
PP_VDD_BOOST
PP1V8_VA
PP_CODEC_TO_FRONTMIC3_BIAS
PP1V8_SDRAM
FRONTMIC3_TO_CODEC_BIAS_FILT_RET
REARMIC2_TO_CODEC_BIAS_FILT_RET
LOWERMIC1_TO_CODEC_BIAS_FILT_RET
FRONTMIC3_BIAS_FILT_IN
PP_CODEC_TO_LOWERMIC1_BIASLOWERMIC1_BIAS_FILT_IN
PP_CODEC_TO_REARMIC2_BIASREARMIC2_BIAS_FILT_IN
LOWERMIC4_TO_CODEC_BIAS_FILT_RET LOWERMIC4_BIAS_FILT_INPP_CODEC_TO_LOWERMIC4_BIAS
I2S_AP_TO_CODEC_MCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
CALTRA_FILTP
CODEC_AGND AUDIO:CALTRA CODEC (2/2) SYNC_DATE=06/06/2016SYNC_MASTER=Sync
2.2UF
X5R-CERM6.3V20%
0201-1ROOM=CODEC
2.2UF6.3V20%
0201-1ROOM=CODECX5R-CERM
0.1UF
X5R-CERM6.3V20%
01005ROOM=CODEC
X5R-CERM01005
0.1UF6.3V20%
ROOM=CODEC
1.0UF
X5R6.3V20%
0201-1ROOM=CODEC
402
20%6.3V
X5R-CERM1
4.7UF
ROOM=CODEC
ROOM=CODEC
6.3V20%
01005
0.1UF
X5R-CERM01005ROOM=CODEC
X5R-CERM6.3V20%0.1UF
0.1UF
X5R-CERM6.3V20%
01005ROOM=CODEC
ROOM=CODEC
10UF
CERM-X5R6.3V20%
0402-9
402
20%6.3V
ROOM=CODEC
4.7UF
X5R-CERM1
ROOM=CODEC
6.3V20%
402
4.7UF
X5R-CERM1
4.7UF
6.3V20%
402X5R-CERM1
ROOM=CODEC
ROOM=CODEC
CERM-X5R
10UF6.3V20%
0402-9
ROOM=CODEC
1.00K5%1/32WMF01005
NO_XNET_CONNECTION
OMIT
ROOM=FOREHEAD
SHORT-20L-0.05MM-SM
ROOM=CODEC
100K5%
1/32WMF
01005
ROOM=CODEC
1.0UF
X5R6.3V20%
0201-1
1.0UF
ROOM=CODEC
X5R6.3V20%
0201-1 0201-1ROOM=CODEC
1.0UF20%
X5R6.3V
ROOM=CODEC
1.0UF
X5R6.3V20%
0201-1
ROOM=CODEC
SHORT-10L-0.1MM-SM
1.0UF
X5R6.3V20%
0201-1ROOM=CODEC
WLCSP-1
CRITICAL
CS42L71ROOM=CODEC
WLCSP-1
ROOM=CODECCS42L71
CRITICAL
36 35 34 33
13
11
13
11
36 11
36 11
13
13
35 34 33 13
11
53 52 48 47 46 41 40 37 36 32 21 20 18 16
11
36 11
20
11
32
36 35 34 33 11
36 35 34 33
53 38 37 30 25 23 19
35 34 33 19
29
53 52 48 47 46 41 40 37 36 32 21 20 18 16
45
41
41
44
41
41
11
36 35 34 33 11
32
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NCNC
NCNCNCNCNCNC
NCNC
NC
NC
NC
NC
NC
NC SYM 3 OF 3
DIGLDO_PDNGND
TSTO
TSTOTSTO
RESET*
GND
MSP_LRCK/FSYNC
MCLK
XSP_SDIN/DAC2B_MUTEXSP_SDOUT
GND
TSTI
TSTI
MOSI
GNDDIGLDO_PULLDN
MSP_SCLK
MSP_SDOUTMSP_SDIN
ASP_LRCK/FSYNCASP_SDIN
ASP_SCLK
MISO
CCLKCS*
WAKE*
GNDGNDGNDGNDGNDGND
GNDGNDGND
GND
GNDGNDGND
GNDGNDGNDGND
GND
GND
GNDGND
TSTITSTI
TSTITSTI
TSTI
TSTOTSTO
TSTI
TSTI
TSTOTSTO
JTAG_TCKJTAG_TDI
JTAG_TDO
TSTO
JTAG_TMS
XSP_LRCK/FSYNCXSP_SCLK
ASP_SDOUT
INT*
SYM 2 OF 3
VP_M
BUS
VPRO
G_C
P
HS_BIAS_FILTHS_BIAS_FILT_REF
MIC4_BIAS_FILT
MIC2_BIASMIC2_BIAS_FILT
MIC3_BIASMIC3_BIAS_FILT
MIC1_BIAS_FILTMIC1_BIAS
GND
P
GND
A
FILT-
FILT+
FLYP
GNDCP
FLYN
LP_FILT+
-VCP_FILT
+VCP_FILT
FLYC
VCP VDVD VL
VD_F
ILT
VD_F
ILT VP VA
MIC4_BIAS
GND
HS
GND
DG
NDD
GND
D
GND
D
NCNCNCNC
Pg46: Compass Compensation Coil
SPEAKER AMPLIFIER 2 (North)
33 OF 81
I2C2_AP_SCL47
PDM_ADARE_TO_CONVOY_CLK
I2C2_AP_SDA47
33 OF 53
8.0.0
051-00482
2
1 C3318
E2E3
A5
B1A1
D1C1
F5
B2A2
B6
D7
D6
C7
E6
A6
D5
E7
F7
D2C2
B7
C6
F1E1
A7
D4D3C5C4C3B4B3A4A3 F2E4B5
F4
F6
F3
E5
U3301
2
1R33042
1R33012
1 C3319
2
1C33312
1 C3323
2
1 C33112
1 C3312
2
1C3327
2
1 C33242
1 C33252
1 C33062
1 C330821
L3302
2
1C33262
1C33282
1 C33162
1C33292
1 C33152
1C3313
SPKAMP1_TO_SPKAMP2_SYNC
AP_TO_SPKAMP2_RESET_L
SPEAKERAMP2_ISENSE_PSPEAKERAMP2_ISENSE_N
SPEAKERAMP2_TO_SPEAKER_OUT_NEGSPEAKERAMP2_TO_SPEAKER_OUT_POS
PP_SPKR2_VBOOST
PP1V8_VA
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
MAKE_BASE=TRUEPDM_ADARE_TO_CONVOY_CLK
PDM_CODEC_TO_SPKAMP2_CLK
SPEAKERAMP2_FILT
SPEAKER_TO_SPEAKERAMP2_VSENSE_PI2S_AOP_TO_MAGGIE_L26_MCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN
PDM_CODEC_TO_SPKAMP2_DATA
PDM_CONVOY_TO_ADARE_DATA
SPEAKERAMP2_LX
AUDIO_TO_AOP_INT_L
PP_VDD_MAIN
SPEAKER_TO_SPEAKERAMP2_VSENSE_N
AUDIO:SPEAKER AMP 2SYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=SPKAMP20402-9
20%6.3V
CERM-X5R
10UF
402-1
10%10VX5R
1UF
ROOM=SPKAMP2
WLCSP
ROOM=SPKAMP2
CS35L26-A1
CRITICAL
01005MF1/32W5%100K
ROOM=SPKAMP2
01005
5%
ROOM=SPKAMP2
100K1/32WMF
6.3V
0.01UF
01005
10%
X5R
ROOM=SPKAMP2NO_XNET_CONNECTION
1000PF10V
ROOM=SPKAMP201005X5R
10%
ROOM=SPKAMP201005
10%10V
1000PF
X5R
0201
10%16VX5R-CERM
0.1UF
ROOM=SPKAMP2
5%10VC0G-CERM
220PF
ROOM=SPKAMP201005
0402-8
20%10V
X5R-CERM
10UF
ROOM=SPKAMP2
0402-8
10VX5R-CERM
ROOM=SPKAMP2
10UF20%
10UF
X5R-CERM
20%10V
ROOM=SPKAMP20402-8
ROOM=SPKAMP2
X5R-CERM
20%10V
10UF
0402-8
10VX5R-CERM
20%10UF
0402-8ROOM=SPKAMP2
1.2UH-20%-3.0A-0.080OHM
ROOM=SPKAMP2PIQA20161T-SM
CRITICAL
0402-9
20%6.3V
CERM-X5R
10UF
ROOM=SPKAMP2 0402-9
20%6.3V
CERM-X5R
10UF
ROOM=SPKAMP20201-1
20%6.3VX5R-CERM
2.2UF
ROOM=SPKAMP2
2.2UF6.3V
0201-1
20%
ROOM=SPKAMP2
X5R-CERM01005
20%6.3V
0.1UF
ROOM=SPKAMP2
X5R-CERM
34
12
46 45 29
46 45 29
35 34 32 19
36 35 34 32 11
36 35 34 32 11
29
31
29
36 35 34 13
36 35 34 32
36 35 34 32
31
29
35 34 32 13
53
46 41 40 39 37 35 34 31 30 28 27 26 25 23 21 19 18 10 9 4
29
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VP
PDM_CLK0
AD0/PDM_CLK1
VBST_A
SWSW
FILT+
GNDP GNDA
ISNS+ISNS-
VSNS+VSNS-
OUT+OUT-
VBST_A
VBST_BVBST_B
SDA
ALIVE/SYNC
MCLK
SCLK
LRCK/FSYNC
SDIN
SDOUT
SCL
VA
PDM_DATA0
PDM_DATA1 AD1
INT*
RESET*
#25112685,Remove C3414
PULLED LOW ON PG 35
(South)SPEAKER AMPLIFIER 1
TO TRINITY
34 OF 81
I2C_AOP_SDA48
GND
I2C_AOP_SCL48
34 OF 53
8.0.0
051-00482
2
1 C3429
2
1C3424
E2E3
A5
B1A1
D1C1
F5
B2A2
B6
D7
D6
C7
E6
A6
D5
E7
F7
D2C2
B7
C6
F1E1
A7
D4D3C5C4C3B4B3A4A3 F2E4B5
F4
F6
F3
E5
U3402
2
1 C3430
2
1C34072
1C3405
2
1 C3427
2
1 C34252
1 C3426
2
1 C34282
1 C34032
1 C34042
1 C3431
2
1C34222
1 C3434
2
1 C3432
SPEAKERAMP1_FILT
SPEAKERAMP1_TO_SPEAKER_OUT_POSSPEAKERAMP1_TO_SPEAKER_OUT_NEG
PP1V8_VA
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
MAKE_BASE=TRUE
PP_VDD_MAIN
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPEAKER_TO_SPEAKERAMP1_VSENSE_N
SPKAMP1_TO_SPKAMP2_SYNC
I2S_L26_CODEC_TO_MAGGIE_DIN
AUDIO_TO_AOP_INT_L
AOP_TO_SPKAMP1_ARC_RESET_L
PP_SPKR1_VBOOST
SPEAKERAMP1_ISENSE_PSPEAKERAMP1_ISENSE_N
I2S_AOP_TO_MAGGIE_L26_MCLKSPEAKER_TO_SPEAKERAMP1_VSENSE_P
SPEAKERAMP1_LX
I2S_MAGGIE_TO_L26_CODEC_DOUT
AUDIO:SPEAKER AMP 1SYNC_DATE=06/06/2016SYNC_MASTER=Sync
1000PF
X5R10V10%
01005ROOM=SPKAMP1 ROOM=SPKAMP1
1000PF
X5R10V10%
01005
ROOM=SPKAMP1
X5R-CERM0201-1
6.3V20%2.2UF
10UF6.3V20%
0402-9ROOM=SPKAMP1
CERM-X5R
CS35L26-A1
CRITICAL
WLCSP
ROOM=SPKAMP1
0.01UF
X5R6.3V10%
01005ROOM=SPKAMP1NO_XNET_CONNECTION
10UF
X5R-CERM10V20%
0402-8ROOM=SPKAMP1
10UF
CERM-X5R6.3V20%
0402-9ROOM=SPKAMP1
10UF
X5R-CERM10V20%
0402-8ROOM=SPKAMP1
220PF
C0G-CERM10V5%
01005ROOM=SPKAMP1
01005X5R-CERM6.3V
0.1UF20%
ROOM=SPKAMP1
2.2UF
X5R-CERM6.3V20%
0201-1ROOM=SPKAMP1
0.1UF
X5R-CERM16V10%
0201ROOM=SPKAMP1
10UF
X5R-CERM10V20%
0402-8ROOM=SPKAMP1
10UF
X5R-CERM10V20%
0402-8ROOM=SPKAMP1
10UF
X5R-CERM10V20%
0402-8ROOM=SPKAMP1
41
41
35 33 32 19
36 35 33 32 11
53
46 41 40 39 37 35 33 31 30 28 27 26 25 23 21 19 18 10 9 4
36 35 33 32 11 41
33
36 35 33 32
35 33 32 13
35 13
36 35 33 13
41
28
36 35 33 32
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VP
PDM_CLK0
AD0/PDM_CLK1
VBST_A
SWSW
FILT+
GNDP GNDA
ISNS+ISNS-
VSNS+VSNS-
OUT+OUT-
VBST_A
VBST_BVBST_B
SDA
ALIVE/SYNC
MCLK
SCLK
LRCK/FSYNC
SDIN
SDOUT
SCL
VA
PDM_DATA0
PDM_DATA1 AD1
INT*
RESET*
NC
NC
#25742582,Add back C3531 for D10x at Pg46
TO TRINITY
ARC DRIVER
NC FROM HOMER PER #25452686
0201 C3525 is at Pg46
35 OF 81
VOLTAGE=8.0V
PP1V8_VA
I2C_AOP_SDA48
VOLTAGE=8.0V
VOLTAGE=8.0V
I2C_AOP_SCL48
35 OF 53
8.0.0
051-00482
2
1 C3536
2
1C3501
E2E3
A5
B1A1
D1C1
F5
B2A2
B6
D7
D6
C7
E6
A6
D5
E7
F7
D2C2
B7
C6
F1E1
A7
D4D3C5C4C3B4B3A4A3 F2E4B5
F4
F6
F3
E5
U3502
2
1 C3528
2
1R3508
2
1C35302
1C3532
2
1 C3526
2
1 C35272
1 C3534
2
1 C35352
1 C35372
1 C35242
1 C3538
2
1C35292
1 C3542
2
1 C3539
MAKE_BASE=TRUEPP1V8_VA
PP1V8_VA
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
PP_ARC1_VBOOST
SOLENOID1_TO_ARC1_VSENSE_NEGSOLENOID1_TO_ARC1_VSENSE_POS
ARC1_ISENSE_NARC1_ISENSE_P
ARC1_FILT
I2S_L26_CODEC_TO_MAGGIE_DIN
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
AOP_TO_SPKAMP1_ARC_RESET_L
ARC1_TO_SOLENOID1_OUT_POSARC1_TO_SOLENOID1_OUT_NEG
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_AOP_TO_MAGGIE_L26_MCLK
AUDIO_TO_AOP_INT_L
ARC1_LX
PP_VDD_MAIN
ARC:DRIVER SYNC_DATE=06/06/2016SYNC_MASTER=Sync
1000PF
X5R10V10%
01005ROOM=ARC1
ROOM=ARC1
X5R-CERM0201-1
6.3V20%2.2UF
16V
ROOM=ARC101005CERM
5%10PF
NOSTUFF
CRITICAL
CS35L26-A1WLCSP
ROOM=SPKAMP2X5R-CERM0402-8
10UF10V20%
ROOM=ARC1
NO_XNET_CONNECTION
01005
0.01UF
X5R6.3V10%
ROOM=ARC101005MF1/32W5%100K
ROOM=ARC1
ROOM=ARC1
20%10V
X5R-CERM0402-8
10UF
0402-9
10UF6.3V
ROOM=ARC1
20%
CERM-X5R
220PF
C0G-CERM10V5%
01005ROOM=ARC1
ROOM=ARC1
0.1UF
X5R-CERM6.3V20%
01005 0201-1X5R-CERMROOM=ARC1
2.2UF6.3V20%
0.1UF
X5R-CERM16V10%
0201ROOM=ARC1
10UF
X5R-CERM10V20%
0402-8ROOM=ARC1
10UF
0402-8X5R-CERM
20%
ROOM=ARC1
10V20%10UF
X5R-CERM10V
0402-8ROOM=ARC1
1000PF10V10%
01005ROOM=ARC1
X5R
35 34 33 32 19
35 34 33 32 19
36 34 33 32 11
41
41
36 34 33 32
36 34 33 32 11
34 13
41
41
36 34 33 32
36 34 33 13
34 33 32 13
28
53
46 41 40 39 37 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
VP
PDM_CLK0
AD0/PDM_CLK1
VBST_A
SWSW
FILT+
GNDP GNDA
ISNS+ISNS-
VSNS+VSNS-
OUT+OUT-
VBST_A
VBST_BVBST_B
SDA
ALIVE/SYNC
MCLK
SCLK
LRCK/FSYNC
SDIN
SDOUT
SCL
VA
PDM_DATA0
PDM_DATA1 AD1
INT*
RESET*
HOMER STM32L0 MICRO
VPP_2V5 must be > 1.71V for SPI Slave programming
MAGGIE <-> ARC, SPKRS, CODEC (SDIN)
MAGGIE <-> AP (SDIN)
MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC
MAGGIE <-> ARC, SPKRS, CODEC (SDOUT)
APN: 353S00842
MAGGIE <-> AP (SDOUT)
MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC
STM32L03 APN: 337S00231
APN: 336S00020MAGGIEMAGGIE LDO
#24543115: Scrub Value
NOTE: RESET HAS INTERNAL 65K PULLUP
36 OF 81
36 OF 53
8.0.0
051-00482D4B3C4A4 A5 C3
A6B6C6
A2
B5
F1E1D1F2B2C1E2D2B1C2E3F3E4F4B4
E5F5D5D6E6F6
A1 C5 A3
D3
U3602
1PP3602
1PP3601
2
1R3611
21
R3607
2
1C3603
A2A1
B2
B1
U3603
E1C4D1
D5
C5B5
A4A3B2D2E2
A2A1C2B1C1C3E3D3B3E4D4B4E5
A5
U3601 2
1R3603
2
1 C3607
2
1 C3606
2
1R3605
21
R3604
2
1R3602
2
1 C3602
2
1 C3605
21
R3601
2
1 C3604
2
1 C3601
MAGGIE_TO_HOMER_WAKE
PP1V2_MAGGIE
AP_TO_MAGGIE_CRESETB_L
SPI_AP_TO_MAGGIE_CS_L
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLKSPI_CODEC_MAGGIE_TO_AP_MISOSPI_AP_TO_CODEC_MAGGIE_MOSI
I2S_AP_TO_MAGGIE_DOUTI2S_L26_CODEC_TO_MAGGIE_DIN
SPI_AP_TO_CODEC_MAGGIE_SCLK
PP1V2_MAGGIE_PLL
MAGGIE_TO_AP_CDONEI2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R
UART_AOP_TO_MAGGIE_TXDI2S_MAGGIE_TO_AP_DINI2S_AOP_TO_MAGGIE_L26_MCLKI2S_MAGGIE_TO_L26_CODEC_DOUT PP1V8_MAGGIE_IMU
PP1V8_SDRAM
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
SPI_HOMER_TO_MAGGIE_POS_MISO
SWD_AP_TO_MANY_SWCLKSWD_AP_BI_HOMER_SWDIO
SPI_MAGGIE_TO_HOMER_POS_MOSI
AP_BI_HOMER_BOOTLOADER_ALIVEI2C_HOMER_SDA
SPI_MAGGIE_TO_HOMER_POS_SCLK
PMU_TO_HOMER_RESET_L
MAGGIE_TO_HOMER_WAKEUART_AP_TO_HOMER_TXDUART_HOMER_TO_AP_RXD
PP1V8_SDRAM
I2C_HOMER_SCLHOMER_TO_AOP_WAKE_INT
AP_BI_HOMER_BOOTLOADER_ALIVE_R
PP1V8_MAGGIE_IMU
MAGGIE_TO_AOP_INTAOP_TO_MAGGIE_EN
ARC:MAGGIESYNC_DATE=06/06/2016SYNC_MASTER=Sync
ICE5LP4K-SWG36I
CRITICAL
WLCSP
ROOM=ARC_CTRL
SMP2MM-NSMROOM=HOMER
SM
ROOM=HOMERP2MM-NSM
01005
5%
MF1/32W
27K
ROOM=HOMER
1/32WMF
ROOM=HOMER
5%
100
01005
6.3V20%
ROOM=HOMER
2.2UF
X5R-CERM0201-1
CSPLD39130S-1.2V/AP
ROOM=HOMER
WLCSP
STM32L031E6Y6D
511K1%
MF01005
1/32W
2.2UF
X5R-CERM
20%6.3V
ROOM=ARC_CTRL0201-1
ROOM=HOMER
X5R-CERM6.3V20%0.1UF
01005
ROOM=ARC_CTRL
0.1UF
X5R-CERM6.3V20%
01005
20%0.1UF
01005ROOM=ARC_CTRL
X5R-CERM6.3V
MF
5%1/32W
01005
10K
01005
33.2
1/32WMF
1%
ROOM=ARC_CTRL
10K5%1/32WMF01005
20%
01005ROOM=ARC_CTRL
X5R-CERM6.3V
0.1UF
0201
20%
ROOM=ARC_CTRL
6.3VCER-X5R
4UF
MF1/32W
100
5%
ROOM=ARC_CTRL01005
36
12
9
35 34 33 32 11
32 11
32 11
11
35 34 33 32
32 11
12
13
11
35 34 33 13
35 34 33 32 36 24 18
53 52 48 47 46 41 40 37 36 32 21 20 18 16
35 34 33 32 11
53 17 13
13
12 47 41
20
36
12
12
53 52 48 47 46 41 40 37 36 32 21 20 18 16
47 41
13
36 24 18
13
13
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.B
AN
K 2
BA
NK
0
BA
NK
1
RGB1RGB2
GND
_LED
IOB_7B
GND
VCCI
O_2
VCCI
O_0
VPP_
2V5
VCC
CRESET_B
IOB_32A_SPI_SOIOB_31BIOB_30AIOB_29BIOB_27BIOB_26A
IOB_25B_G3IOB_20AIOB_16A
IOB_11B_G5IOB_12A_G4_CDONE
IOB_10A
SPI_
VCCI
O1
IOB_6AIOB_5BIOB_4AIOB_3B_G6IOB_2A
IOT_46B_G0
RGB0
IRLED
GND
VCCP
LL
IOB_34A_SPI_SCKIOB_35B_SPI_CSN
IOB_33B_SPI_SI
PP
PP
EN
OUT
GND
IN
VDDAVDD
PC15_OSC32_OUTPC14_OSC32_IN
PB1PB0
PB7PB6PB3
RST*
BOOT0
VSSA
PA1
PA6PA5PA4PA3PA2
PA0_CLK_IN
PA7
PA13PA10PA9PA8
PA14
NCNC
NC
NCNCNC
NC
NC
NC
NC
NC
NC
NC
#26634069:D1x, C3715/C3716 to 138S0719 0402 4.7uF
6.3V
LED BACKLIGHT DRIVER - 6LEDAPN:353s00640
TO TRINITY
#24543286: Densense Cap for Chestnut Charge Pump
MOJAVE MESA BOOSTAPN:353S00671
CHESTNUT DISPLAY PMU
25V
25V
APN:338S1172
200K INT PD
NO INT PULL
DISPLAY & TOUCH - POWER SUPPLIES
NO INT PULL
C3722 See Page46
37 OF 81
I2C0_AP_SDA47
I2C0_AP_SCL47
I2C0_AP_SCL20 47
I2C0_AP_SDA47
37 OF 53
8.0.0
051-00482
2
1 C37262
1 C3727
2
1 C3711
2
1 C37032
1 C37212
1 C37052
1 C37062
1 C37042
1 C3725
2
1C3724
2
1 R3701
2
1 C3709
KA
D3701
A K
D3702
2
1C3702
D3
D1
A4A3
C4
C2
B2A2
C3
A1
B1C1
D2
D4
B4B3
U3701
2
1 C3717
2
1
L3704
21
L3703
2
1 C3708C3A2
B1
C1
A1
C2
A3B2
B3
U3702
2
1 C3715
2
1 C3719
2
1 C37202
1C3718
2
1 C37122
1 C37132
1 C3714
2
1C3710
2
1 C3716
E2
E3
D1
A2
B2
D2
D3
C2
D4B1
B3
C3
A1
A3
A4
B4
E4C4
C1
E1
U3703
2
1 C3707
PP5V1_TOUCH_VDDH
PP5V7_LCM_AVDDH
PP_LCM_BL_ANODE
PN5V7_LCM_MESON_AVDDN
PP5V7_MESON_AVDDH
PN_CHESTNUT_CN
CHESTNUT_LX
PP_VDD_MAIN
LCM_TO_CHESTNUT_PWR_EN
PP_CHESTNUT_CP
BB_TO_STROBE_DRIVER_GSM_BURST_IND
PMU_TO_AOP_TRISTAR_ACTIVE_READY
CHESTNUT_TO_PMU_ADCMUX
DWI_PMGR_TO_BACKLIGHT_CLK
BL_SW2_LX
PP_LCM_BL_CAT2
DWI_PMGR_TO_BACKLIGHT_DATA
PP1V8_SDRAM
PP_VDD_MAIN
PP_VDD_BOOST
POS18V0_MESA_LXPP_VDD_MAIN
PP17V0_MOJAVE_LDOIN
PP16V0_MESA
BL_SW1_LX
MESA_TO_BOOST_EN
PP_LCM_BL_CAT1
AP_TO_MUON_BL_STROBE_EN
PP6V0_LCM_BOOST
SYNC_MASTER=Sync SYNC_DATE=06/17/2016
DISPLAY & MESA:POWER
X5R-CERMVOLTAGE=10V20%
0402-8
10UF
ROOM=CHESTNUT
NP0-C0G-CERM
5%25V
01005
56PF
ROOM=CHESTNUT
NOSTUFF
5%25V
01005NP0-C0G-CERM
NOSTUFF
ROOM=CHESTNUT
56PF
ROOM=CHESTNUT0201
16V20%1UF
CER-X5R
0201
PLACE_NEAR=U3701:2MMROOM=BACKLIGHT
C0G
220PF2%50V 35V
0402X5R
2.2UF20%
35VX5R
2.2UF20%
0402
35V
2.2UF20%
0402X5RX5R
35V
0402
2.2UF20%
2.2UF35V
0402X5R
20%
10UF
CERM-X5R6.3V20%
0402-9ROOM=MOJAVE
01005
1/32WMF
ROOM=BACKLIGHT
1%200K
100PF
NP0-C0G35V5%
ROOM=MOJAVE01005
CRITICAL
ROOM=BACKLIGHTNSR05F30NXT5G
DSN2
CRITICAL
NSR0530P2T5G
ROOM=BACKLIGHTSOD-923-1
0402-9
20%VOLTAGE=6.3V
10UF
ROOM=BACKLIGHT
CERM-X5R
CRITICAL
LM3539A1DSBGA
ROOM=BACKLIGHT
C0G-CERM10V5%
01005ROOM=CHESTNUT
220PF
CRITICAL
1.0UH-20%-2.25A-0.15OHMPIXB2016FE-SM
ROOM=CHESTNUT
ROOM=MOJAVE
1.0UH-20%-0.4A-0.636OHM
0403
CRITICAL
ROOM=MOJAVE
100PF
NP0-C0G35V5%
01005
ROOM=MOJAVE
CRITICAL
BGALM3638A0
X5R-CERM
4.7UF
ROOM=CHESTNUT
10V20%
0402
20%35VX5R
2.2UF
ROOM=MOJAVE0402
20%35VX5R
2.2UF
ROOM=MOJAVE0402
10UF
CERM-X5R6.3V20%
0402-9ROOM=MOJAVE
10UF
X5R-CERM
ROOM=CHESTNUT
10V20%
0402-8
10V
10UF20%
X5R-CERM0402-8ROOM=CHESTNUT
20%
ROOM=CHESTNUT0402-8
10UF10VX5R-CERM
10UF
CERM-X5R6.3V20%
0402-9ROOM=CHESTNUT
20%10VX5R-CERM
ROOM=CHESTNUT
4.7UF
0402
BGA
ROOM=CHESTNUT
TPS65730A0PYFF
CRITICAL
39
39
39
39
39
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
39 20
53 46 26
40 20 13 7
20
46 11
28
39
46 11
53 52 48 47 46 41 40 36 32 21 20 18 16
53 46 41
40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 38 32 30 25 23 19
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
28
38 4
39
46 9
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SDI
VIO/HWEN
SCK
SDA
TRIG
SW2_1SW2_2
SCL
SW1
IN OUT
LED1LED2
INHIBITG
NDG
ND
PMID
VOUT
EN_S
LDOIN
EN_M
SW
VIN
PGND
AGND
HVLDO3
HVLDO2
HVLDO1
VNEG(SUB)
VNEG
AGND
PGND
2PG
ND1
CPUMPLCMBST
CF1CF2
ADCMUX
RESET*
LCM_EN
SDA
SCL
SYNC
SW
VIN
MAMBA POWERST:353S00932TI:353S00576
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY
Matches flex_x452_acf, schematic revision 1.5.0 pinout
#24543342: stuff 100pF
MAMBA DIGITAL I/O
MLB: 516S00141 (RCPT)FLEX: 516S00142 (PLUG)
MAMBA AND MESA CONNECTOR
MESA DIGITAL I/O
MESA POWER
GUARD
38 OF 81
I2C_TOUCH_TO_MAMBA_SCL47
I2C_TOUCH_BI_MAMBA_SDA47
38 OF 53
8.0.0
051-00482
2
1 C3826
2
1 C3807
21
R3811
21
FL3811
21
FL3806
21
R3809
21
FL3802
21
FL3801
21
FL3803
2
1R3808
2
1R3807
21
XW3801
1
PP3801
2
1 C3825
2
1 C380621
FL3804
2
1C3805
21
R3801
21
R3802
2
1 C3819
2
1 C3801
2
1 C3816
2
1 C3817
2
1 C3818
21
FL3807
2
1 C3812
2
1 C38112
1 C3824
2
1 C3823
21
R3805
14
52
3
U38012
1C3828
2
1 C38042
1 C38222
1 C38212
1 C38152
1 C3813
2
1 C3802
2
1 C3803
2
1 C3814
30
29
28 27
26 25
24 2322 2120 1918 1716 1514 1312 1110 9
8 76 54 32 1
J3801
LCM_TO_MAMBA_MSYNC_CONN
PP2V75_MAMBA_CONN
I2C_MESA_TURTLE_SCL_CONNMESA_TO_BOOST_EN_CONN
SPI_AP_TO_MESA_MOSI_CONN
PP_VDD_BOOST
PP1V8_TOUCH
MESA_TO_AOP_FDINT MESA_TO_AOP_FDINT_CONN
PP1V8_TOUCH_TO_MAMBA_CONN
TP_MAMBA_HINT_L
PP3V0_MESA_CONN
AP_TO_TOUCH_MAMBA_RESET_CONN_L
SPI_AP_TO_MESA_SCLK_CONN
PP3V0_MESA
MAMBA_TO_LCM_MDRIVE_CONN_MESA
MAMBA_TO_LCM_MDRIVE_CONN_MESA
PP1V8_TOUCH_TO_MAMBA_CONN
PP1V8_TOUCH
PP1V8_MESA_CONN
MESA_TO_AOP_FDINT_CONNI2C_MESA_TURTLE_SDA_CONN
MESA_TO_AP_INT_CONN
SPI_MESA_TO_AP_MISO_CONNAOP_TO_MESA_BLANKING_EN_CONN
MESA_TO_AP_INT_CONN
MESA_TO_BOOST_EN
SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN
SPI_AP_TO_MESA_SCLK
PP16V0_MESA_CONN
AOP_TO_MESA_BLANKING_EN AOP_TO_MESA_BLANKING_EN_CONN
MESA_TO_AP_INT
MAMBA_TO_LCM_MDRIVE
PP16V0_MESA_CONNPP16V0_MESA
PP1V8_MESA_CONNPP1V8_MESA
PP3V0_MESA_CONN
MAMBA_LDO_EN
SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_MOSI_CONN
MESA_TO_BOOST_EN_CONN
SPI_AP_TO_MESA_SCLK_CONN
PP2V75_MAMBA_CONN
B2B:ORB & MESASYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=MAMBA_MESA
100PF
NP0-C0G16V5%
01005
25V
ROOM=MAMBA_MESA01005
56PF5%
NP0-C0G-CERM
1%1/32W
ROOM=MAMBA_MESA
33.2
MF01005
150OHM-25%-200MA-0.7DCR
01005
01005ROOM=MAMBA_MESA
150OHM-25%-200MA-0.7DCR
1/32W
ROOM=MAMBA_MESA
MF
0.00
0%
01005
ROOM=MAMBA_MESA
150OHM-25%-200MA-0.7DCR
01005
150OHM-25%-200MA-0.7DCR
01005ROOM=MAMBA_MESA
0201ROOM=MAMBA_MESA
80-OHM-25%-0.52A-0.17OHM
1%
ROOM=MAMBA_MESA
511K1/32WMF01005
ROOM=MAMBA_MESA
511K1%1/32WMF01005
OMIT
SHORT-20L-0.05MM-SM
ROOM=PMU
SMP2MM-NSM
56PF25V5%
01005ROOM=MAMBA_MESA
NP0-C0G-CERM
5%25V
56PF
01005NP0-C0G-CERM
NOSTUFF
ROOM=MAMBA_MESA
01005ROOM=MAMBA_MESA
150OHM-25%-200MA-0.7DCR
ROOM=MAMBA_MESA
56PF
NP0-C0G-CERM25V5%
01005
1%
681
ROOM=MAMBA_MESA
MF1/32W
01005
ROOM=MAMBA_MESA
1%
MF1/32W
681
01005
01005
5%16VNP0-C0G
100PF
ROOM=MAMBA_MESA
100PF
NP0-C0G16V5%
01005ROOM=MAMBA_MESA
56PF25V5%
01005NP0-C0G-CERM
ROOM=MAMBA_MESA
5%
ROOM=MAMBA_MESA
56PF
NP0-C0G-CERM25V
01005
56PF
NP0-C0G-CERM25V5%
01005ROOM=MAMBA_MESA
150OHM-25%-200MA-0.7DCR
ROOM=MAMBA_MESA01005
ROOM=MAMBA_MESA
C0G-CERM
220PF10V5%
01005
220PF
C0G-CERM10V5%
01005ROOM=MAMBA_MESA
6.3V20%
0201-1
2.2UF
X5R-CERM
ROOM=MAMBA_MESA
0402-8X5R-CERM
20%10V
10UF
ROOM=MAMBA_MESA
0%
01005ROOM=MAMBA_MESA
MF1/32W
0.00
LP5907SNX-2.75
ROOM=MAMBA_MESA
X2SON
X5R-CERM6.3V20%
0201-1ROOM=MAMBA_MESA
2.2UF
ROOM=MAMBA_MESA01005
5%10VC0G-CERM
220PF
ROOM=MAMBA_MESA01005
20%6.3VX5R-CERM
0.1UF
0201-1
20%6.3V
2.2UF
ROOM=MAMBA_MESA
X5R-CERM
ROOM=MAMBA_MESA0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=MAMBA_MESA0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=MAMBA_MESA
5%
01005
10VC0G-CERM
220PF
5%35V
100PF
NP0-C0G01005ROOM=MAMBA_MESA
ROOM=MAMBA_MESA0201-1
20%6.3VX5R-CERM
2.2UF
ROOM=MAMBA_MESA
F-ST-SM
BB35C-RA24-3A
CRITICAL
45
38
48
38
38
53 37 32 30 25 23 19
47 46 39 38 18
13 38
38
38
45 39
38
19
38
38
38
47 46 39 38 18
38
38
48
38
38
38
38
37 4
11 38
11
38
13 38
11
45
38 37 4
38 48 19
38
11 38
38
38
38
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
VIN
ENEPADGND
VOUT
To Mamba/Mesa B2B
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN
AOP/TOUCH INTERFACE
AC Coupling Caps
BACKLIGHT
For placement "along the way" as we route from SOC to B2B.
DISPLAY MIPIDISPLAY POWER
AP/TOUCH INTERFACE
To Display B2B
39 OF 81
VOLTAGE=25.0V
39 OF 53
8.0.0
051-00482
2
1 C39292
1C3901
2
1 C3940
2
1 C3937
2
1R3901
2
1 C3903
2
1 C39382
1 C39362
1 C3935
2
1 C3905
2 1
R3908
21
FL3915
2 1
FL3906
2 1
FL3908
21
FL3910
21
FL3903
21
FL3902
21
FL3901
21
R3923
2
1 C39022 1
FL3904
2
1 C3915
2
1 C39392
1 C39302
1 C3931
2
1 C3924
2
1 C3923
2
1 C3925
2 1
FL3922
2 1
FL39242
1C3922
2
1 C3926
2
1 C3927
2 1
FL3919
2 1
FL3920
2
1 C3928
2
1 C39162 1
FL3913
2
1 C3917
2
1 C391821
R3915
2
1 C3904
2
1 C3912
2
1 C3913
2
1 C3914
2
1 C3933
2
1 C3934
2
1 C3909
2 1
FL3912
2 1
FL3909
2
1 C3910
2
1 C39112
1C3932
2 1
FL3911
4
3 2
1
L3903
4
3 2
1
L3902
4
3 2
1
L3901
2 1
FL3917
2
1 C3920
2 1
FL3918
2
1 C3921
2 1
FL3916
2
1 C3919
PN5V7_LCM_MESON_AVDDN
PP5V7_MESON_AVDDH
PP5V7_LCM_AVDDH
PP1V8
PP5V7_MESON_AVDDH_CONN
PMU_TO_LCM_PANICB_CONN
LCM_TO_MANY_BSYNC_CONN
PMU_TO_LCM_PANICB
90_MIPI_AP_TO_LCM_CLK_CONN_P
90_MIPI_AP_TO_LCM_CLK_CONN_N90_MIPI_AP_TO_LCM_CLK_N
PP5V1_TOUCH_VDDH_CONN
90_MIPI_AP_TO_LCM_DATA0_CONN_P
90_MIPI_AP_TO_LCM_DATA1_CONN_N
PP_LCM_BL_CAT1_CONN
PP1V8_TOUCH
PP1V8_LCM_CONN
SPI_AP_TO_TOUCH_MOSI_CONN
LCM_TO_MANY_BSYNC
PP_LCM_BL_CAT1
PP_LCM_BL_ANODE
PP1V8_TOUCH_CONN
90_MIPI_AP_TO_LCM_CLK_P
SPI_TOUCH_TO_AP_MISO_CONN
90_MIPI_AP_TO_LCM_DATA1_N
90_MIPI_AP_TO_LCM_DATA0_P
AP_TO_LCM_RESET_L
TOUCH_TO_AP_INT_L_CONN
PP5V1_TOUCH_VDDH
UART_TOUCH_TO_AOP_RXDSPI_TOUCH_TO_AP_MISO
SPI_AP_TO_TOUCH_MOSI
LCM_TO_CHESTNUT_PWR_EN_CONN
90_MIPI_AP_TO_LCM_DATA0_CONN_N
AP_TO_CUMULUS_CLK_32K_CONN
SPI_AP_TO_TOUCH_CS_CONN_L
AP_TO_TOUCH_MAMBA_RESET_L
PP_LCM_BL_CAT2_CONN
UART_TOUCH_TO_AOP_RXD_CONN
90_MIPI_AP_TO_LCM_DATA1_CONN_P
TOUCH_TO_AP_INT_L
AP_TO_CUMULUS_CLK32K
SPI_AP_TO_TOUCH_CS_L
LCM_TO_CHESTNUT_PWR_EN
AP_TO_LCM_RESET_CONN_L
UART_AOP_TO_TOUCH_TXD
90_MIPI_AP_TO_LCM_DATA1_P
AP_TO_TOUCH_MAMBA_RESET_CONN_L
PP_LCM_BL_CAT2
PN5V7_LCM_MESON_AVDDN_CONN
PP_VDD_MAIN
UART_AOP_TO_TOUCH_TXD_CONN
SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_SCLK_CONN
PP5V7_LCM_AVDDH_CONN
90_MIPI_AP_TO_LCM_DATA0_N
PP_LCM_BL_ANODE_CONN
B2B FILTERS: DISPLAY & TOUCH
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
ROOM=DISPLAY_B2B
10UF20%10VX5R-CERM0402-8
ROOM=DISPLAY_B2B
20%10V
X5R-CERM
10UF
0402-8
ROOM=DISPLAY_B2B
X5R-CERM6.3V20%
0201-1
2.2UF
01005C0G-CERM
ROOM=DISPLAY_B2B
5%10V
220PF
ROOM=DISPLAY_B2B
100K
MF1/32W
01005
5%
2%50V
0201C0G
220PF
ROOM=DISPLAY_B2B
220PF
01005C0G-CERM
ROOM=DISPLAY_B2B
5%10V
C0G-CERM10V5%
01005ROOM=DISPLAY_B2B
220PF
ROOM=DISPLAY_B2B
5%10VC0G-CERM01005
220PF
NP0-C0G
ROOM=DISPLAY_B2B01005
100PF35V5%
ROOM=DISPLAY_B2B01005
1%1/32W
33.2
MF
01005150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B
240-OHM-25%-0.42A-0.31DCR
0201
240-OHM-25%-0.42A-0.31DCR
ROOM=DISPLAY_B2B0201
33-OHM-25%-1500MA
0201ROOM=DISPLAY_B2B
33-OHM-25%-1500MA
ROOM=DISPLAY_B2B0201
0201
33-OHM-25%-1500MA
ROOM=DISPLAY_B2B
0201
33-OHM-25%-1500MA
ROOM=DISPLAY_B2B
0.00
MF01005
1/32W0%
ROOM=DISPLAY_B2B
10V
01005
5%
ROOM=MAMBA_MESA
C0G-CERM
220PF
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B01005
10VC0G-CERM
5%220PF
01005ROOM=DISPLAY_B2B
10V
01005
220PF5%
C0G-CERM
220PF10V5%
01005C0G-CERM
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B01005
5%10VC0G-CERM
220PF
01005
5%25VNP0-C0G-CERM
56PF
ROOM=DISPLAY_B2B
01005
5%25VNP0-C0G-CERM
56PF
ROOM=DISPLAY_B2B
25VNP0-C0G-CERM
56PF
01005ROOM=DISPLAY_B2B
5%
01005ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B01005
150OHM-25%-200MA-0.7DCR
5%56PF
25VNP0-C0G-CERM
01005ROOM=DISPLAY_B2B
NOSTUFF
5%25VNP0-C0G-CERM
56PF
ROOM=DISPLAY_B2B01005
01005
5%16VNP0-C0G
100PF
ROOM=DISPLAY_B2B
01005ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
01005
01005
5%16VNP0-C0G
100PF
ROOM=DISPLAY_B2B
01005
5%10VC0G-CERM
220PF
ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
01005ROOM=DISPLAY_B2B
01005
5%220PF
C0G-CERM10V
ROOM=DISPLAY_B2B
16VNP0-C0G
ROOM=DISPLAY_B2B
01005
5%100PF
ROOM=DISPLAY_B2B
10
1/32WMF
01005
5%
01005NP0-C0G
ROOM=DISPLAY_B2B
100PF35V5%
ROOM=DISPLAY_B2B
5%
C0G-CERM
220PF
01005
10V
5%
C0G-CERM01005
10V
220PF
ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B
220PF
01005
10V5%
C0G-CERM
2.2UF
ROOM=DISPLAY_B2B
20%6.3VX5R-CERM0201-1
X5R-CERM0201-1
6.3V20%2.2UF
ROOM=DISPLAY_B2B
01005C0G-CERM10V
ROOM=DISPLAY_B2B
5%220PF
240-OHM-25%-0.42A-0.31DCR
ROOM=DISPLAY_B2B0201
240-OHM-25%-0.42A-0.31DCR
ROOM=DISPLAY_B2B0201
01005
5%10VC0G-CERM
220PF
ROOM=DISPLAY_B2B
C0G-CERM01005
10V
220PF
ROOM=DISPLAY_B2B
5%
0201-1
20%6.3V
X5R-CERM
2.2UF
ROOM=DISPLAY_B2B
0201ROOM=DISPLAY_B2B
240-OHM-25%-0.42A-0.31DCR
65OHM-0.7-2GHZ-3.4OHMTAM0605
ROOM=DISPLAY_B2B
CRITICAL
CRITICAL
ROOM=DISPLAY_B2B
65OHM-0.7-2GHZ-3.4OHMTAM0605
65OHM-0.7-2GHZ-3.4OHMCRITICAL
TAM0605
ROOM=DISPLAY_B2B
01005ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
NP0-C0G-CERM01005
25V
56PF
ROOM=DISPLAY_B2B
5%
01005ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
5%25V
ROOM=DISPLAY_B2B
01005NP0-C0G-CERM
56PF
01005ROOM=DISPLAY_B2B
150OHM-25%-200MA-0.7DCR
01005
25V5%
ROOM=DISPLAY_B2B
NP0-C0G-CERM
56PF
37
37
37
52 48 47 46 30 29 25 18 17 16 13 12 11 9 8 7 5
45
45
20
45
45 9
45
45
47 46 38 18
45
45
53 23 20 13
37
37
9
45
9
9
12
45
37
13
11
11
45
45
45
45
12
45
45
12
11
11
37 20
45
13
9
45 38
37
53 46 41 40 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
45
11 45
45
9
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM_VER-1
SYM_VER-1
SYM_VER-1
#25714843: Remove R4003 Weak PD
<rdar:/24285280> EVT: 343S00091 (P2:343S00078)
TRISTAR 2
Sm Footprint: 376S00135
z=0.45mm
POW_GATE_EN* is 6V-tolerant
AC return path for USB pairs which is referenced to GND and VDD_MAIN
40 OF 81
I2C0_AP_SDA 47
I2C0_AP_SCL 47
40 OF 53
8.0.0
051-00482
1
PP4001
2
1
3
Q4001
F4F3
A1B1
A3B3
D2D1
F2F1
E2E1
E4
D3D4
D6
F6
B5A5 C6
B6
F5 C1 A6
A4
A2
B4
B2
C3C4
E3
E6
C2
D5
E5C5
U4001
2
1 C4006
2
1 C40082
1 C4007
21
L4021
21
L4022
2
1R4002
21
R4001
2
1 C4001
2
1 C40022
1 C4003
2
1 C4005
2
1 C4004
PP5V0_USB_RVP
TRISTAR_CON_DETECT_L
PP_TRISTAR_ACC1
90_TRISTAR_DP1_CONN_P
PP_TRISTAR_ACC2
PP3V0_TRISTAR_ANT_PROX
TRISTAR_USB_BRICK_ID_R
90_USB_AP_DATA_L_P
TRISTAR_TO_PMU_HOST_RESETPMU_TO_AOP_TRISTAR_ACTIVE_READY
TRISTAR_REVERSE_GATE
TRISTAR_TO_TIGRIS_VBUS_OFF
TRISTAR_TO_AOP_INT
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_P90_TRISTAR_DP2_CONN_N
90_USB_BB_DATA_P90_USB_BB_DATA_N
90_USB_AP_DATA_P
90_USB_AP_DATA_N
PP_VDD_MAIN
TRISTAR_BYPASS
PP1V8_SDRAM
UART_AP_DEBUG_RXD
UART_ACCESSORY_TO_AP_RXD
UART_AP_DEBUG_TXD
SWD_DOCK_TO_AP_SWCLK
90_USB_AP_DATA_L_N
SWD_DOCK_BI_AP_SWDIO
UART_AP_TO_ACCESSORY_TXD
PP_ACC_VAR
90_MIKEYBUS_DATA_N90_MIKEYBUS_DATA_P
PP5V0_USB
TRISTAR_TO_PMU_USB_BRICK_ID
TRISTAR 2SYNC_DATE=06/06/2016SYNC_MASTER=Sync
20%6.3VX5R
1.0UF
0201-1ROOM=TRISTAR
10%
ROOM=TRISTAR
6.3VX5R
0.01UF
01005
P2MM-NSMSM
DFN
ROOM=TRISTAR
RV3CA01ZP
CRITICAL
WLCSPCBTL1610A3BUK
1UF16V20%
0201CER-X5R
ROOM=TRISTAR
220PF
ROOM=SOC01005
5%10VC0G-CERM
ROOM=SOC
5%10VC0G-CERM
220PF
01005
0201ROOM=TRISTAR
15NH-250MA
0201
15NH-250MA
ROOM=TRISTAR
MF
10K5%1/32W
01005ROOM=TRISTAR
ROOM=PMU01005
6.34K
1/32WMF
1%
ROOM=PMU01005
10%6.3VX5R
0.01UF
01005
20%6.3VX5R-CERM
0.1UF
ROOM=TRISTARROOM=TRISTAR0201-1
20%6.3VX5R
1.0UF
41 4
41 4
41 4
41 4
53 41 29 19
20
37 20 13 7
21
13
41 4
41 4
41 4
53
53
7
7
53
46 41 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53 52 48 47 46 41 37 36 32 21 20 18 16
12
12
12
7
7
12
27 19
31
31
41 21 4
20
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Apple Inc.
PP
S
D
G
BRICK_ID
POW_GATE_EN*
BYPASS
SCLINT
SDA
SWITCH_ENHOST_RESET
CON_DET_L
DN2DP2
DN1DP1
ACC2ACC1P_IN
VDD_
1V8
VDD_
3V0
ACC_
PWR
JTAG_DIO
UART2_RX
JTAG_CLK
UART1_RX
UART2_TX
UART0_RX
UART1_TX
USB0_DN
UART0_TX
USB0_DP
USB1_DNUSB1_DP
DIG_DN
DVSS
DVSS
DVSS
DIG_DP
NC
#26118161: Update FL4104 to 49.9ohm
ARC CONTROL
Per ANT Erdinc, change to cap
#25429221:Carrier Dock flex to add +1 ACC2 pin
#25098110: Decrease DCR
TRISTAR
Antenna GPIO
DOCK FLEX CONNECTOR
ARC1
AC return path for USB pairs which is referenced to GND and VDD_MAINUSB AC Coupling
LOWER MIC1/4ANTENNAPlease loop in Matt Mow (Antenna Team)
SPEAKER1
#22499940:Change Net Name to POS/NEG
when changing these components!
41 OF 81
VOLTAGE=4.3V
VOLTAGE=3.0V
VOLTAGE=4.3V
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
VOLTAGE=16.0V
41 OF 53
8.0.0
051-00482
2
1C4107
21
FL4112
21
R4104
21
FL4106
2
1 C4111
2
1 C4136
2
1 C4135
54
53
5251
5049
484746454443424140393837363534333231302928272625242322212019181716151413121110987654321
J4101
2 1
FL4102
2
1 C41102 1
FL4101
2
1 C4143
2
1C41092
1C41052
1C41062
1C4108
21
R4110
21
R4109
2
1 C4127
2
1 C4103
2
1 C4104
2 1
FL4115
2
1C41022
1C4101
2
1 C4118
2
1 C41342 1
FL4103 2
1 C4128
2
1 C4129
2 1
FL4116
2 1
FL4117
2 1
FL4118
2
1 C4130
2
1 C4131
2
1 C4132
2 1
FL4119
2 1
FL4120
2 1
FL4121
2
1 C4133
2
1 C41262 1
FL4114
2
1 C4119
2
1 C4120
2 1
FL4107
2 1
FL4108
2
1 C4121
2
1 C4122
2
1 C4116
2
1 C411721
FL4105
2 1
R4102
I2C_HOMER_SDA
LOWERMIC1_TO_CODEC_AIN1_P
TRISTAR_CON_DETECT_L
SPEAKERAMP1_TO_SPEAKER_OUT_NEG
TRISTAR_CON_DETECT_CONN_L
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG
SOLENOID1_TO_ARC1_VSENSE_NEGI2C_HOMER_SDA_CONNI2C_HOMER_SCL_CONN
SOLENOID1_TO_ARC1_VSENSE_POSARC1_TO_SOLENOID1_OUT_POS
I2C_MIC1_SCL_CONN
PP_CODEC_TO_LOWERMIC1_BIAS_CONNLOWERMIC1_TO_CODEC_AIN1_CONN_NEGLOWERMIC1_TO_CODEC_AIN1_CONN_POS
LOWERMIC1_TO_CODEC_BIAS_FILT_RET
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS
ARC1_TO_SOLENOID1_OUT_POS
90_TRISTAR_DP1_CONN_P90_TRISTAR_DP1_CONN_N
BB_TO_LAT_GPO3_CONN
I2C_MIC1_SDA_CONN
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG
PP_TRISTAR_ACC1_CONN
BB_TO_LAT_GPO2_CONN
MIKEYBUS_REFERENCE
PP3V0_LAT_CONN
SPEAKERAMP1_TO_SPEAKER_OUT_POS
LOWERMIC1_TO_CODEC_AIN1_CONN_POS
LOWERMIC1_TO_CODEC_AIN1_CONN_NEG
LOWERMIC4_TO_CODEC_AIN2_CONN_POS
LOWERMIC4_TO_CODEC_AIN2_CONN_NEG
90_TRISTAR_DP2_CONN_N90_TRISTAR_DP2_CONN_P
PP_TRISTAR_ACC1_CONN
PP1V8_LAT_ARC_CONN
SPEAKER_TO_SPEAKERAMP1_VSENSE_P
PP_CODEC_TO_LOWERMIC4_BIAS
LOWERMIC4_TO_CODEC_AIN2_N
SPEAKER_TO_SPEAKERAMP1_VSENSE_N
SPEAKERAMP1_TO_SPEAKER_OUT_POS
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS
PP_CODEC_TO_LOWERMIC4_BIAS_CONN
PP_VDD_MAIN
LOWERMIC4_TO_CODEC_AIN2_P
LOWERMIC1_TO_CODEC_AIN1_N
PP_CODEC_TO_LOWERMIC1_BIAS_CONNPP3V0_LAT1_CONN
BB_TO_LAT_GPO1
BB_TO_LAT_GPO2
PP1V8_SDRAM
BB_TO_LAT_ANT_SCLK
BB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_DATA_CONN
PP3V0_TRISTAR_ANT_PROX
PP_TRISTAR_ACC1
PP_TRISTAR_ACC2_CONNPP_TRISTAR_ACC2
TRISTAR_CON_DETECT_CONN_L
ARC1_TO_SOLENOID1_OUT_NEG
PP_CODEC_TO_LOWERMIC4_BIAS_CONN
SPEAKERAMP1_TO_SPEAKER_OUT_NEG
LOWERMIC4_TO_CODEC_AIN2_CONN_NEG
PP3V0_LAT1_CONNPP1V8_LAT_ARC_CONNBB_TO_LAT_ANT_DATA_CONN
LOWERMIC4_TO_CODEC_BIAS_FILT_RET
BB_TO_LAT_ANT_SCLK_CONNBB_TO_LAT_GPO1_CONN
LOWERMIC4_TO_CODEC_AIN2_CONN_POSBB_TO_LAT_GPO2_CONNPP_TRISTAR_ACC2_CONN
ARC1_TO_SOLENOID1_OUT_POS
ARC1_TO_SOLENOID1_OUT_NEG
BB_TO_LAT_GPO1_CONN
BB_TO_LAT_ANT_SCLK_CONN
I2C_HOMER_SCLPP3V0_LAT_CONN I2C_HOMER_SCL_CONN
PP_CODEC_TO_LOWERMIC1_BIAS
I2C_HOMER_SDA_CONN
PP5V0_USB
B2B:DOCK FLEXSYNC_DATE=06/06/2016SYNC_MASTER=Sync
01005
10V5%
ROOM=DOCK_B2B
220PF
C0G-CERM
150OHM-25%-200MA-0.7DCR
ROOM=DOCK_B2B01005
56PF5%
ROOM=DOCK_B2B01005
25VNP0-C0G-CERM
5%56PF
NP0-C0G-CERM01005ROOM=DOCK_B2B
25V
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
01005
150OHM-25%-200MA-0.7DCR
ROOM=DOCK_B2B01005
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
01005
01005
220PF
C0G-CERM
5%
ROOM=DOCK_B2B
10V
ROOM=DOCK_B2B01005
5%
NP0-C0G-CERM25V
56PF
5%
ROOM=DOCK_B2B01005
25VNP0-C0G-CERM
56PF
01005
150OHM-25%-200MA-0.7DCR
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
5%220PF
C0G-CERM10V
01005ROOM=DOCK_B2B
5%
01005
10VC0G-CERM
220PF
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
01005
10V5%
C0G-CERM
220PF
ROOM=DOCK_B2B
01005
10-OHM-1.1A
ROOM=DOCK_B2B
01005
5%
C0G-CERM10V
ROOM=DOCK_B2B
220PF
ROOM=DOCK_B2B01005
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
33PF16V
01005
5%
ROOM=DOCK_B2BNP0-C0G-CERM
5%
01005
16V
ROOM=DOCK_B2B
NP0-C0G-CERM
33PF
1.00K
5%
MF
ROOM=DOCK_B2B
1/32W
01005
150OHM-25%-200MA-0.7DCR
01005
1/32W
ROOM=DOCK_B2B01005MF
1%
49.9
22-OHM-25%-1800MA
0201ROOM=DOCK_B2B
56PF
ROOM=DOCK_B2B01005NP0-C0G-CERM25V5%
56PF5%
ROOM=DOCK_B2B
NP0-C0G-CERM25V
01005
56PF
NP0-C0G-CERM
ROOM=DOCK_B2B
25V5%
01005
245857F-ST-SM
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
ROOM=DOCK_B2B01005NP0-C0G-CERM
56PF5%25V
150OHM-25%-200MA-0.7DCR
ROOM=DOCK_B2B01005
10V5%220PF
C0G-CERM01005
ROOM=SOC
X5R0201
25V
0.1UF
ROOM=DOCK_B2B
10%
0201
10%25V
0.1UF
X5R
ROOM=DOCK_B2B
10%0.1UF
25V
0201X5R
ROOM=DOCK_B2B ROOM=DOCK_B2B01005
16VCER-X7R
330PF10%
01005
25VNP0-C0G-CERM
5%
ROOM=DOCK_B2B
56PF
MF1/32W0%
0.00
01005ROOM=DOCK_B2B
ROOM=DOCK_B2B
NP0-C0G01005
16V5%27PF
MF1/32W0%
01005ROOM=DOCK_B2B
0.00
5%220PF
C0G-CERM10V
01005ROOM=DOCK_B2B
5%
ROOM=DOCK_B2B01005
220PF
C0G-CERM10V
5%
ROOM=DOCK_B2B
10VC0G-CERM
220PF
01005
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
ROOM=DOCK_B2B
220PF
C0G-CERM10V5%
01005
5%
ROOM=DOCK_B2B01005
220PF
C0G-CERM10V
100PF16VNP0-C0G01005
ROOM=DOCK_B2B
5%
100PF16V5%
NP0-C0G01005
ROOM=DOCK_B2B
47 36
31
40 4
41 34
41
41
35
41
41
35
41 35
47
41
41 41
32
41
41 35
40 4
40 4
46
47
41
41
41
31
41
41 34
41
41
41
41
40 4
40 4
41
41
34
32
31
34
41 34
41
41
53
46 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
31
31
41 41
53
53
53 52 48
47 46 40 37 36 32 21 20 18 16
53
53 41
53 40 29 19
40 4
41 40 4
41
41 35
41
41 34
41
41
41
41
32
41
41
41
41
41
41 35
41 35
41
41
47 36
41
41
32
41
40 21 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
42 OF 81
42 OF 53
8.0.0
051-00482
spareSYNC_DATE=06/06/2016SYNC_MASTER=Sync
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
43 OF 81
43 OF 53
8.0.0
051-00482
spare
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
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I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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IV ALL RIGHTS RESERVED
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NOTICE OF PROPRIETARY PROPERTY:
A
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C
345678
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
#24678255:DOE with 10% and/20% cap
#24544474: Can R4401 be changed to 5%?
HAWKING
STROBE1 STROBE2 BUTTONS
MIC2 (ANC REF)
44 OF 81
CKPLUS_WAIVE=MISS_N_DIFFPAIR
44 OF 53
8.0.0
051-00482
21
FL4407
2
1 C4422
21
R4402
21
R4405
21
R4406
2
1C4420
2
1C4419
2
1C4418
2
1 DZ4404
2
1 DZ4403
2
1
DZ4402
2
1R4401
21
C4417
21
C4421
2
1 C44162
1 C441421
FL4406
21
FL4405
2
1 C4415
2 1
FL4402
2
1 C4405
2
1 C4404
2 1
FL4401
2 1
FL4403
2
1 C4403
2
1 C4407
21
FL4404
2
1C4406
2
1C4402
2
1 C4408
2
1 C4409
2
1C4411
2
1C4410
2
1 C4412
2
1 C44132
1C4401
2
1
DZ4401
HAWKING_TO_CODEC_AIN7_N
PP_CODEC_TO_REARMIC2_BIAS_CONN
HAWKING_TO_CODEC_AIN7_N_CONN
HAWKING_TO_CODEC_AIN7_C_PHAWKING_TO_CODEC_AIN7_P
REARMIC2_TO_CODEC_AIN3_CONN_P
REARMIC2_TO_CODEC_AIN3_CONN_NREARMIC2_TO_CODEC_AIN3_N
PP_CODEC_TO_REARMIC2_BIAS
BUTTON_VOL_DOWN_L
BUTTON_VOL_UP_L
CHASSIS_GND_BS401
BUTTON_VOL_UP_CONN_L
CHASSIS_GND_BS401
BUTTON_VOL_DOWN_CONN_L
CHASSIS_GND_BS401
BUTTON_POWER_KEY_CONN_L
PP1V8_HAWKING
PP_STROBE_DRIVER2_COOL_LED
PP_STROBE_DRIVER2_WARM_LED
BUTTON_RINGER_A_CONNBUTTON_RINGER_A
BUTTON_POWER_KEY_L
CHASSIS_GND_BS401STROBE_MODULE_NTC_CONN
REARMIC2_TO_CODEC_AIN3_P
PP_STROBE_DRIVER1_WARM_LED
PP_STROBE_DRIVER1_COOL_LED
STROBE_MODULE_NTC
PP1V8_HAWKING_CONN
HAWKING_TO_CODEC_AIN7_P_CONN
B2B FILTERS: RIGHT BUTTON FLEX
SYNC_DATE=06/06/2016SYNC_MASTER=Sync
20%
X5R
ROOM=RIGHT_BUTTON01005
6.3V
0.22UF
X5R-CERM6.3V20%
ROOM=RIGHT_BUTTON0201-1
2.2UF
C0G-CERM
5%
01005
10V
ROOM=RIGHT_BUTTON
220PF
150OHM-25%-200MA-0.7DCR
ROOM=RIGHT_BUTTON01005
ROOM=RIGHT_BUTTON
27PF
NP0-C0G16V5%
01005
150OHM-25%-200MA-0.7DCR
ROOM=RIGHT_BUTTON01005
ROOM=RIGHT_BUTTON
56PF25V5%
01005NP0-C0G-CERM
27PF
NP0-C0G16V5%
01005ROOM=RIGHT_BUTTON
ROOM=RIGHT_BUTTON
150OHM-25%-200MA-0.7DCR
01005
ROOM=RIGHT_BUTTON
56PF
NP0-C0G-CERM25V5%
01005
01005ROOM=RIGHT_BUTTON
NP0-C0G-CERM25V
56PF5%
150OHM-25%-200MA-0.7DCR
01005ROOM=RIGHT_BUTTON
150OHM-25%-200MA-0.7DCR
ROOM=RIGHT_BUTTON01005
ROOM=RIGHT_BUTTON
220PF
C0G-CERM10V5%
01005
27PF
ROOM=RIGHT_BUTTONNP0-C0G
6.3V5%
0201
02015.5V-6.2PF
ROOM=RIGHT_BUTTON
01005ROOM=RIGHT_BUTTON
220PF
C0G-CERM10V5%
150OHM-25%-200MA-0.7DCR
01005
ROOM=RIGHT_BUTTON
ROOM=RIGHT_BUTTON
220PF
C0G-CERM10V5%
01005
ROOM=RIGHT_BUTTON
220PF
C0G-CERM10V5%
01005
ROOM=RIGHT_BUTTON
27PF16VNP0-C0G
5%
01005
27PF
NP0-C0G16V5%
01005ROOM=RIGHT_BUTTON
ROOM=LEFT_BUTTON
120-OHM-0.220A
01005
ROOM=RIGHT_BUTTON
NOSTUFF
180PF
01005
10V10%
CERM
ROOM=RIGHT_BUTTON01005
100
1/32WMF
5%
ROOM=LEFT_BUTTON01005
100
1/32WMF
5%
01005
100
1/32WMF
5%
ROOM=LEFT_BUTTON
220PF
C0G-CERM10V5%
01005ROOM=RIGHT_BUTTON
100PF
NP0-C0G16V5%
01005ROOM=LEFT_BUTTON
ROOM=LEFT_BUTTON
100PF
NP0-C0G16V5%
01005
ROOM=LEFT_BUTTON
27PF
NP0-C0G6.3V5%
0201
5%
ROOM=RIGHT_BUTTON
220PF
C0G-CERM10V
01005
12V-33PF01005-1ROOM=LEFT_BUTTON
01005-112V-33PFROOM=LEFT_BUTTON
02015.5V-6.2PF
ROOM=LEFT_BUTTON
ROOM=RIGHT_BUTTON
0.5%1/32W
01005MF
27K
0.22UF
ROOM=RIGHT_BUTTON
20%
X5R01005
6.3V
31
45
45
31
45
45 31
32
20
20 12
44 4
45
44 4
45
44 4
45
19
45 26
45 26
45 20
20
44 4
45
31
45 26
45 26
26
45
45
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
UTAH-D FLEX CONNECTOR MLB: 516S00050DISPLAY / TOUCH FLEX CONNECTOR
Per #25048465:No Satin flex support in CRB
<-- THIS ONE516S00152 RCPT (USED ON MLB)516S00151 PLUG
FOREHEAD FLEX CONNECTOR
APPLE APN: 516S00150
MLB: 516S00146 (MCO REV 27)
COMBO BUTTON FLEX CONNECTOR<-- THIS ONE ON MLB (matched MCO rev 27)
APPLE APN: 516S00149
45 OF 81
CKPLUS_WAIVE=I2C_PULLUP
GND
CKPLUS_WAIVE=I2C_PULLUP I2C_TOUCH_BI_MAMBA_SDA 47
I2C_TOUCH_TO_MAMBA_SCL47
45 OF 53
8.0.0
051-00482
21
R4501
2
1 C4507
1
PP4501
21
XW4501
363534333231302928272625242322212019181716151413121110987654321
42
41
4039
3837
J4503
26 25
24 23
22 2120 1918 1716 1514 1312 1110 9
8 76 54 32 1
J4501
22 21
20 19
18 17
16 15
14 1312 1110 9
8 76 54 32 1
J4504
54
53
5251
5049
484746454443424140393837363534333231302928272625242322212019181716151413121110987654321
J4502
MAKE_BASE=TRUE
90_MIPI_NH_TO_AP_DATA0_N
I2C_ALS_CONVOY_SCL_CONN
SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N
I2C_PROX_SCL_CONN
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
PP1V8_NH_IO_CONN
PDM_ADARE_TO_CONVOY_CLK_CONN
I2C_NH_SCL_CONN
90_MIPI_NH_TO_AP_CLK_N90_MIPI_NH_TO_AP_CLK_P
90_LPDP_UT_TO_AP_D2_CONN_PLPDP_UT_BI_AP_AUX_CONN
UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
PP3V0_UT_SVDD_CONN
I2C_UT_SDA_CONN
PP_LCM_BL34_CAT1_CONN
I2C_DISP_EEPROM_SCL_CONN
AP_TO_LCM_RESET_CONN_L
90_MIPI_AP_TO_LCM_DATA2_CONN_N
90_MIPI_AP_TO_LCM_DATA1_CONN_P90_MIPI_AP_TO_LCM_DATA1_CONN_N
90_MIPI_AP_TO_LCM_DATA2_CONN_P
90_MIPI_AP_TO_LCM_DATA3_CONN_P90_MIPI_AP_TO_LCM_DATA3_CONN_N
90_MIPI_AP_TO_LCM_CLK_CONN_P
HAWKING_TO_CODEC_AIN7_N_CONN
STROBE_MODULE_NTC_CONNPP1V8_HAWKING_CONNHAWKING_TO_CODEC_AIN7_P_CONN
BUTTON_RINGER_A_CONN
PP_STROBE_DRIVER1_COOL_LEDPP_STROBE_DRIVER2_WARM_LED
PP_STROBE_DRIVER2_COOL_LED
I2C_MIC2_SDA_CONNI2C_MIC2_SCL_CONN
REARMIC2_TO_CODEC_AIN3_CONN_PREARMIC2_TO_CODEC_BIAS_FILT_RET
REARMIC2_TO_CODEC_AIN3_CONN_NPP_CODEC_TO_REARMIC2_BIAS_CONN
BUTTON_VOL_DOWN_CONN_LBUTTON_VOL_UP_CONN_L
BUTTON_POWER_KEY_CONN_L
PP_STROBE_DRIVER1_WARM_LED
FRONTMIC3_TO_CODEC_AIN4_CONN_NFRONTMIC3_TO_CODEC_AIN4_CONN_PSPEAKERAMP2_TO_SPEAKER_OUT_POS
PP2V9_NH_AVDD_CONN
AP_TO_NH_CLK_CONN
I2C_PROX_SDA_CONNPP3V0_ALS_CONVOY_CONN
PROX_BI_AP_AOP_INT_PWM_L_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P
AP_TO_NH_SHUTDOWN_CONN_L
PDM_CONVOY_TO_ADARE_DATA_CONN
SPEAKERAMP2_TO_SPEAKER_OUT_NEG
90_MIPI_NH_TO_AP_DATA1_P90_MIPI_NH_TO_AP_DATA1_N
PP1V2_NH_DVDD_CONNI2C_NH_SDA_CONNALS_TO_AP_INT_CONN_L
PP_LCM_BL34_CAT2_CONN
PP5V1_TOUCH_VDDH_CONNLCM_TO_CHESTNUT_PWR_EN_CONN
90_MIPI_AP_TO_LCM_DATA0_CONN_N90_MIPI_AP_TO_LCM_DATA0_CONN_P
LCM_TO_MANY_BSYNC_CONN
PP_LCM_BL_ANODE_CONNPP_LCM_BL_CAT2_CONN
PP_LCM_BL34_ANODE_CONN
90_MIPI_NH_TO_AP_DATA0_P
UART_AOP_TO_TOUCH_TXD_CONNPMU_TO_LCM_PANICB_CONN
AP_TO_TOUCH_MAMBA_RESET_CONN_LTOUCH_TO_AP_INT_L_CONN
PP_LCM_BL_CAT1_CONN
PP5V7_LCM_AVDDH_CONNPP1V8_LCM_CONN
SPI_AP_TO_TOUCH_MOSI_CONN
PP1V8_TOUCH_CONN
PP5V7_MESON_AVDDH_CONN
90_MIPI_AP_TO_LCM_CLK_CONN_N
TP_LCM_PIFA
PN5V7_LCM_MESON_AVDDN_CONN
PP3V0_PROX_CONN
I2C_ALS_CONVOY_SDA_CONN
I2C_DISP_EEPROM_SDA_CONN
SPI_TOUCH_TO_AP_MISO_CONN
MAMBA_TO_LCM_MDRIVE
SPI_AP_TO_TOUCH_CS_CONN_LAP_TO_CUMULUS_CLK_32K_CONN
UART_TOUCH_TO_AOP_RXD_CONNSPI_AP_TO_TOUCH_SCLK_CONN
90_LPDP_UT_TO_AP_D3_CONN_PUT_TO_NV_SYNC_J2501_CONN
AP_TO_UT_SHUTDOWN_CONN_L
90_LPDP_UT_TO_AP_D2_CONN_N
PP1V8_UT_CONN
I2C_UT_SCL_CONN
PP2V8_UT_AF_VAR_CONN
PP1V2_UT_VDD_CONN
PP2V9_UT_AVDD_CONN
AP_TO_UT_CLK_CONN
90_LPDP_UT_TO_AP_D3_CONN_N
I2C_TOUCH_SCL_CONN
LCM_TO_MAMBA_MSYNC_CONN
SYNC_MASTER=sync SYNC_DATE=05/17/2016
B2B FF SPECIFIC
1%
ROOM=DISPLAY_B2B
MF01005
200
1/32W
25V
ROOM=DISPLAY_B2B01005
5%56PF
NP0-C0G-CERMSM
P2MM-NSM
SHORT-20L-0.05MM-SM
BB35C-RA48-3AF-ST-SM
CRITICALROOM=FOREHEAD
F-ST-SM245858036201829
ROOM=RCAM_B2B
AA26D-S022VA1F-ST-SM
CRITICAL
F-ST-SMAA37D-S014SVA1
ROOM=RIGHT_BUTTON
9
47
29
48
29
29
29
48
9
9
25 25
30 25
25
48
46 4
47
39
46
39
39
46
46
46
39
44
44
44
44
44
44 26 44 26
44 26
47
47
44
32
44
44
44
44
44
44 26
29 29
46 33 29
29
29
48
29
29 29
29
29
46 33 29
9
9
29
48
29
46 4
39
39
39
39
39
39 4
39 4
46 4
9
39
39
39 38
39
39 4
39
39
39
39
39
39
39
29
47
47
39
38
39
39
39
39
25 30
25
25
25
48
25
25
46 25
25
25
38
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
ARC CAP CHESTNUT CAPVDD MAIN CAPAC Coupling Caps
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN
ACC Buck Caps
TOUCH I2C
UT B2B
rf GROUND
Extra RF GNDTop Speaker Compass Coil
THIS PAGE UNIQUE TO LARGE FORM FACTOR
Dock B2B (Pg 41)
2ND BACKLIGHT DRIVER - 4LED
ISP I2C1
46 OF 81
I2C_ISP_NV_SDA 26
90_MIPI_AP_TO_LCM_DATA2_P9
90_MIPI_AP_TO_LCM_DATA3_N9
90_MIPI_AP_TO_LCM_DATA3_P9
90_MIPI_AP_TO_LCM_DATA2_N9
I2C1_AP_SDA47
I2C1_AP_SCL47
I2C_ISP_NV_SCL 26
46 OF 53
8.0.0
051-00482
2
1C3722
2
1R4711
2
1C3525
2
1 C2507
2
1 C2707
2
1R3333
2
1 C3333
2
1
XW3333
2
1R3332
2
1 C3332
2
1 C4605
2
1 C4604
2 1
FL4604
2
1 C4608
2
1 C4606
2
1 C46152
1 C46132
1 C46032
1 C4618
4
3 2
1
L4603
4
3 2
1
L4602
1TP4602
2
1 C46102
1 C46112
1 C46122
1 C46022
1 C4609
21
FL4603
21
FL4602
21
FL4601
2
1R4603
2
1R4604
2
1 C4607
2
1C4601
D3
D1
A4A3
C4
C2
B2A2
C3
A1
B1C1
D2
D4
B4B3
U4601A
K
D4602K
A
D4601
SPEAKERAMP2_TO_SPEAKER_OUT_POS
NEG_COMPASS_COIL_COMP
MAKE_BASE=TRUEI2C_ISP_NV_SCL
BL34_SW2_LX
PP_LCM_BL34_ANODE
BL34_SW1_LX
PP_LCM_BL34_CAT1PP_LCM_BL34_CAT2
PP1V8_SDRAM
PP_VDD_MAIN
AP_TO_MUON_BL_STROBE_EN
DWI_PMGR_TO_BACKLIGHT_DATA
BB_TO_STROBE_DRIVER_GSM_BURST_IND
PP_LCM_BL34_ANODE_CONN
PP_LCM_BL34_CAT1_CONN
PP_LCM_BL34_CAT2_CONN
BB_TO_LAT_GPO3_CONN
90_MIPI_AP_TO_LCM_DATA2_CONN_N
90_MIPI_AP_TO_LCM_DATA2_CONN_P90_MIPI_AP_TO_LCM_DATA2_PMAKE_BASE=TRUE
90_MIPI_AP_TO_LCM_DATA2_NMAKE_BASE=TRUE
90_MIPI_AP_TO_LCM_DATA3_CONN_N
90_MIPI_AP_TO_LCM_DATA3_CONN_P
PP_LCM_BL34_ANODE
PP_LCM_BL34_CAT1
PP_LCM_BL34_CAT2
MAKE_BASE=TRUE90_MIPI_AP_TO_LCM_DATA3_N
90_MIPI_AP_TO_LCM_DATA3_PMAKE_BASE=TRUE
POS_COMPASS_COIL_COMP
DWI_PMGR_TO_BACKLIGHT_CLK
PP2V9_UT_AVDD_CONN
PP_ACC_BUCK_VAR
BB_TO_LAT_GPO3
PP1V8
I2C_TOUCH_TO_MAMBA_SCL
PP1V8_TOUCH
PP_VDD_MAIN
MAKE_BASE=TRUEI2C_ISP_NV_SDA
SPEAKERAMP2_TO_SPEAKER_OUT_NEG
PP_VDD_MAIN PP_VDD_MAIN
LARGE FORM FACTOR SPECIFICSYNC_DATE=06/17/2016SYNC_MASTER=sync
ROOM=DISPLAY_B2B0201
33-OHM-25%-1500MA
33-OHM-25%-1500MA
0201ROOM=DISPLAY_B2B
0201ROOM=DISPLAY_B2B
33-OHM-25%-1500MA
ROOM=BACKLIGHT34
NSR0530P2T5GSOD-923-1
CRITICAL
1/32WMF
5%
ROOM=SOC
1.00K
01005
1.00K
ROOM=SOC
5%
MF01005
1/32W
DSN2
ROOM=BACKLIGHT34
CRITICAL
NSR05F30NXT5G
ROOM=DISPLAY_B2B
100PF
01005
35V5%
NP0-C0G
ROOM=BACKLIGHT34
10UF
CERM-X5R6.3V20%
0402-9
CRITICALDSBGA
LM3539A1
ROOM=BACKLIGHT34
10UF6.3V
ROOM=CHESTNUT0402-9
CERM-X5R
20%
5%
MF1/32W
10K
01005ROOM=MAMBA_MESA
ROOM=ARC1
10UF20%
CERM-X5R0402-9
6.3V
6.3V20%4UF
CER-X5R0201
ROOM=RCAM_B2B
ROOM=TRISTAR
20%
0201-1X5R-CERM6.3V
2.2UF
1/32WMF
1.1K
01005
1%
ROOM=SPKAMP2
220PF10VC0G-CERM
5%
01005ROOM=SPKAMP2
OMIT
SHORT-20L-0.05MM-SMNO_XNET_CONNECTION
ROOM=MAMBA_MESA
1/32W1%
MF
1.1K
ROOM=SPKAMP201005
10VC0G-CERM01005
5%
ROOM=SPKAMP2
220PF
0201
50V2%220PF
C0G
ROOM=DISPLAY_B2B
2%50VC0G
220PF
0201ROOM=BACKLIGHT34
150OHM-25%-200MA-0.7DCR
01005ROOM=DOCK_B2B
01005
5%25VNP0-C0G-CERM
56PF
ROOM=DOCK_B2B
5%35VNP0-C0G01005
100PF
ROOM=DISPLAY_B2B
220PF
01005
10VC0G-CERM
ROOM=DISPLAY_B2B
5%
C0G-CERM01005
220PF10V5%
ROOM=DISPLAY_B2BROOM=DISPLAY_B2B01005
220PF
C0G-CERM10V5%
01005C0G-CERM
ROOM=DISPLAY_B2B
10V5%220PF
ROOM=DISPLAY_B2BCRITICAL
TAM060565OHM-0.7-2GHZ-3.4OHM
65OHM-0.7-2GHZ-3.4OHM CRITICALROOM=DISPLAY_B2BTAM0605
TP-P55
X5R
20%35V
0402ROOM=BACKLIGHT34
2.2UF
X5R
2.2UF20%35V
ROOM=BACKLIGHT340402
X5R
2.2UF20%35V
0402ROOM=BACKLIGHT34
X5R
20%35V
ROOM=BACKLIGHT340402
2.2UF20%
X5R
2.2UF35V
ROOM=BACKLIGHT340402
45 33 29
30 9
28
46
28
46
46
53 52 48 47 41 40 37 36 32 21 20 18 16
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
37 9
37 11
53 37 26
45 4
45 4
45 4
41
45
45
45
45
46
46
46
37 11
45 25
27
53
52 48 47 39 30 29 25 18 17 16 13 12 11 9 8 7 5
47
47 39 38 18
53 46 41
40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
30 9
45 33 29
53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
53
46 41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SDI
VIO/HWEN
SCK
SDA
TRIG
SW2_1SW2_2
SCL
SW1
IN OUT
LED1LED2
INHIBIT
GND
GND
SYM_VER-1
SYM_VER-1
A
I2C3
TO COMBINED BUTTON FLEX
TO DOCK FLEX
TOUCH
I2C1
#24544434
I2C2
TO FOREHEAD FLEX
I2C0
TO DISPLAY / TOUCH FLEX
AP
TO DISPLAY FLEX
D11/111 ONLY
#24544426
TO MAMBA / MESA FLEX
I2C5HOMER
NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEOADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE
47 OF 81
CKPLUS_WAIVE=I2C_PULLUP
I2C1_AP_SCL 46
I2C_TOUCH_BI_MAMBA_SDA 38 I2C0_AP_SCL 37
I2C1_AP_SDA 46
I2C1_AP_SDA 20
I2C0_AP_SCL 40
I2C0_AP_SDA 40
I2C0_AP_SCL 23
I2C0_AP_SDA 23
I2C0_AP_SCL 20 37
I2C_TOUCH_TO_MAMBA_SCL 45
I2C0_AP_SDA 37
I2C1_AP_SCL 20
I2C_TOUCH_BI_MAMBA_SDA 45
I2C0_AP_SDA 37
I2C1_AP_SDA 21
I2C1_AP_SCL 21
I2C_TOUCH_TO_MAMBA_SCL 38
I2C2_AP_SCL 33
I2C2_AP_SDA 33
CKPLUS_WAIVE=I2C_PULLUP
ckplus_waive=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
47 OF 53
8.0.0
051-00482
2 1
FL4729
2
1R4715
2
1R4716
2
1R4703
2
1R4704
2
1 C47042
1C4703
2 1
FL4741
2 1
FL4742
2
1 C47412
1 C4742
2
1 R4714
2
1 R4713
2
1R4702
2
1R4701
2 1
FL47312 1
FL4732
2
1 C47312
1C4732
21
R4708
21
R47072 1
FL4730
2
1 C47022
1C4701
2
1C47302
1 C4729
2
1R4709
2
1R4710
2
1R4712
2
1C47112
1 C4712
2
1 C47102
1C4709
2
1C47072
1 C4708
2
1R4705
2
1R4706
MAKE_BASE=TRUEI2C1_AP_SCL
I2C3_AP_SDA
I2C3_AP_SCL
I2C_MIC2_SDA_CONN
I2C5_SDA
MAKE_BASE=TRUEI2C_TOUCH_BI_MAMBA_SDA
PP1V8_TOUCH
PP1V8_SDRAM
I2C5_SCL
PP1V8
I2C_HOMER_SCL
MAKE_BASE=TRUEI2C1_AP_SDA
MAKE_BASE=TRUEI2C0_AP_SDAMAKE_BASE=TRUEI2C0_AP_SCL
PP1V8
I2C_DISP_EEPROM_SCL_CONN
I2C_DISP_EEPROM_SDA_CONN
I2C_ALS_CONVOY_SCL_CONN
PP1V8
PP1V8
I2C_ALS_CONVOY_SDA_CONN
PP1V8
MAKE_BASE=TRUEI2C2_AP_SDAMAKE_BASE=TRUEI2C2_AP_SCL
I2C_HOMER_SDA
I2C_MIC2_SCL_CONN
I2C_TOUCH_TO_MAMBA_SCL MAKE_BASE=TRUE
I2C_MIC1_SCL_CONN
I2C_MIC1_SDA_CONN
I2C MAP: AP, TOUCH, HOMER, I2C5
SYNC_DATE=06/17/2016SYNC_MASTER=Sync
5%1/32W
MF
ROOM=SOC
2.2K
01005
2.2K1/32W
01005MF
5%
ROOM=SOC
01005ROOM=DOCK
MF
100
5%1/32W
2.2K
MF
ROOM=SOC
1/32W
01005
5%
MF01005
ROOM=SOC
2.2K1/32W
5%
01005ROOM=SOC
4.02K1/32W
MF
1%4.02K
ROOM=SOC
MF1/32W
01005
1%
NOSTUFF
NP0-C0G-CERM01005
56PF25V5%
ROOM=PMU
NOSTUFF
NP0-C0G-CERM
56PF5%25V
01005ROOM=PMU
01005
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B
01005
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B
25V5%
ROOM=DISPLAY_B2B01005NP0-C0G-CERM
56PF25V5%
NP0-C0G-CERM
56PF
01005ROOM=DISPLAY_B2B
ROOM=HOMER
MF01005
1.00K5%1/32W
ROOM=HOMER
1/32W
01005
5%1.00K
MF
4.02K
MF
1%
ROOM=SOC01005
1/32W1%
MF1/32W
4.02K
01005ROOM=SOC
150OHM-25%-200MA-0.7DCR
01005ROOM=RIGHT_BUTTON
ROOM=RIGHT_BUTTON
150OHM-25%-200MA-0.7DCR
01005
ROOM=RIGHT_BUTTON
NP0-C0G-CERM01005
25V5%56PF56PF
5%25V
01005NP0-C0G-CERM
ROOM=RIGHT_BUTTON
0.00
1/32WROOM=FOREHEAD
MF01005
0%
ROOM=FOREHEAD
0.00
010051/32WMF0%
150OHM-25%-200MA-0.7DCR
ROOM=DOCK
01005
NP0-C0G-CERM
ROOM=SOC01005
NOSTUFF
25V5%56PF
NP0-C0G-CERM
NOSTUFF
ROOM=SOC01005
56PF25V5%
NP0-C0G-CERM
ROOM=DOCK_B2B
56PF5%
25V
01005ROOM=DOCK_B2B
25V
01005
56PF5%
NP0-C0G-CERM
01005
2.2K5%
1/32WMF
ROOM=SOC
2.2K5%
MF01005
ROOM=SOC
1/32W
NOSTUFF
10K
MF1/32W
ROOM=MAMBA_MESA01005
5%
5%25V
56PF
NP0-C0G-CERM01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B
56PF5%
NP0-C0G-CERM25V
01005
01005
NOSTUFF
5%
NP0-C0G-CERM
ROOM=MAMBA_MESA
56PF25V
NP0-C0G-CERM
ROOM=MAMBA_MESA
56PF25V
01005
5%
NOSTUFF
56PF
NP0-C0G-CERM01005
ROOM=FOREHEAD
5%25V
56PF
NP0-C0G-CERM
ROOM=FOREHEAD01005
5%25V
11
11
11
45
11
46 39 38 18
53 52 48 46 41 40 37 36 32 21 20 18 16
11
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
41 36
11
11
11
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
45
45
45
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
45
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
11
11
41 36
45
46
41
41
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
#24550735: ISP I2C0 PU#24544699: Support 1MHz
ISP
I2C1
I2C2
Reduce undershoot when Prox Driving
AOPI2C I2C0
See page 46
TO MAMBA/MESA FLEX
TO FCAM FLEX
Intentional R4815 Change
#24958320:Intentional R4815 Change
48 OF 81
CKPLUS_WAIVE=I2C_PULLUP
I2C_AOP_SCL 35
I2C_AOP_SCL 34
I2C_AOP_SDA 34
CKPLUS_WAIVE=I2C_PULLUP
I2C_ISP_UT_SCL 26
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
I2C_AOP_SDA 35
I2C_ISP_UT_SDA 26
CKPLUS_WAIVE=I2C_PULLUP
48 OF 53
8.0.0
051-00482
2
1 R4802
2
1 R4801
2 1
R48152
1 R4811
2
1 R48102 1
FL4815
2
1R4805
2
1 C4810
2
1 C4809
4 1
3
5
6
2
U4806
4 1
3
5
6
2
U4805
2
1 C48032
1 C4804
B1
B2
A2
A1
U4802
2
1 C4807
2
1 R4803
2
1 R4804
2 1
R4806
2 1
R4807
21R4813
21
R4812
2
1 R4808
2
1 R4809
21R4817
2
1 C4816
2
1 C481721
R4816
2
1 C4813
2
1 C4812
MAKE_BASE=TRUEI2C_AOP_SDA
I2C_AOP_SDA_ISO
AOP_TO_MESA_I2C_ISO_EN
I2C_PROX_SCL_CONN
PP1V8_SDRAM
I2C_AOP_SCL_ISO
PP1V8_SDRAM
I2C_PROX_SDA_CONN
PP1V8_SDRAM
PP1V8_MESA
PP1V8
I2C_UT_SCL_CONN
I2C_MESA_TURTLE_SCL_CONN
I2C_ISP_NH_SDA MAKE_BASE=TRUE
I2C_MESA_TURTLE_SDA_CONN
I2C_NH_SDA_CONN
I2C_NH_SCL_CONN
I2C_AOP_SCL MAKE_BASE=TRUE
I2C_UT_SDA_CONN
MAKE_BASE=TRUEI2C_ISP_NH_SCL
PP1V8
I2C_ISP_UT_SCL MAKE_BASE=TRUE
PP1V8_SDRAM
I2C_ISP_UT_SDA MAKE_BASE=TRUE
I2C MAP AOP SYNC_DATE=06/06/2016SYNC_MASTER=Sync
0.00
1/32W0%01005MF ROOM=MAMBA_MESA
0%MF ROOM=MAMBA_MESA
1/32W01005
0.00
1/32W
ROOM=FOREHEAD
0.00
MF
0%
01005
0.00
0%1/32WMF
ROOM=FOREHEAD01005
1.00K
ROOM=SOC
1/32W
01005
5%
MF
1.00K
ROOM=SOC
1/32W
01005MF
5%
ROOM=RCAM_B2B
0.00
MF1/32W0%
0100525V
ROOM=RCAM_B2B01005NP0-C0G-CERM
5%56PF
ROOM=RCAM_B2B
5%
01005
56PF25VNP0-C0G-CERM
ROOM=RCAM_B2B
1/32W
0.00
01005
0%
MF
ROOM=FOREHEAD01005NP0-C0G-CERM
56PF25V5%
56PF5%
ROOM=FOREHEAD
25VNP0-C0G-CERM01005
2.2K1/32W5%
01005MF
5%
MF
2.2K
01005
1/32W
1%
33.2
01005MF
1/32W
ROOM=FOREHEAD
ROOM=SOC
5%
01005MF1/32W
2.2K2.2K
ROOM=SOC01005MF1/32W5%
01005
150OHM-25%-200MA-0.7DCR
ROOM=FOREHEAD
MF1/32W1%
01005
511K
56PF5%25V
01005NP0-C0G-CERM
ROOM=MAMBA_MESA
56PF
ROOM=MAMBA_MESA01005
25VNP0-C0G-CERM
5%
X2SON674LVC1G3157GX
X2SON674LVC1G3157GX
ROOM=FOREHEAD
56PF25V5%
01005NP0-C0G-CERM
56PF25V
01005ROOM=FOREHEAD
5%
NP0-C0G-CERM
WLPMAX20312
ROOM=SOC
0.1UF20%6.3V
01005X5R-CERM
ROOM=SOC
1%1/32WMF
4.7K
01005ROOM=MAMBA_MESA
1/32W1%
01005
4.7K
MF
ROOM=MAMBA_MESA
13
13
45
53 52 48 47 46 41 40 37 36 32 21 20 18 16
53 52 48 47 46 41 40 37 36 32 21 20 18 16
45
53 52 48 47 46 41 40 37 36 32 21 20 18 16
38 19
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
45
38
9
38
45
45
13
45
9
52 48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
9
53 52 48 47 46 41 40 37 36 32 21 20 18 16
9
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
GND
S
VCC
Z
Y0
Y1
NC
GND
S
VCC
Z
Y0
Y1
GND
IOVCC1
VCC
IOVCC2
49 OF 81
49 OF 53
8.0.0
051-00482
I2C TABLESYNC_DATE=06/06/2016SYNC_MASTER=Sync
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
spare
spare
PCIe LanesThis page controls elements different accross all MLBs
#24556007:Parallel to 100kohm R5906_RF(nostuff)
52 OF 81
PCIE_BB_BI_AP_CLKREQ_L8
PCIE_AP_TO_BB_RESET_L8
PCIE_AP_TO_WLAN_RESET_L8
90_PCIE_AP_TO_BB_REFCLK_P8
90_PCIE_AP_TO_WLAN_REFCLK_P8
PCIE_WLAN_BI_AP_CLKREQ_L8
90_PCIE_AP_TO_BB_REFCLK_N8
90_PCIE_AP_TO_WLAN_REFCLK_N8
52 OF 53
8.0.0
051-00482
2
1R5206
21C0811
21C0812
21C0814
21C0813
21C0816
21C0817
21C0815
21C0818
2
1 R0807
1PP802
1PP801
90_AP_PCIE3_RXD_C_P
90_AP_PCIE2_TXD_C_P
90_AP_PCIE2_RXD_C_P
MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_N90_AP_PCIE2_RXD_C_N
90_AP_PCIE3_RXD_C_N
MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_P90_AP_PCIE3_TXD_C_P
90_AP_PCIE3_TXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_N
MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_P
90_AP_PCIE3_RXD_C_N
MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_WLAN_REFCLK_P MAKE_BASE=TRUE
MAKE_BASE=TRUEPCIE_BB_BI_AP_CLKREQ_L
MAKE_BASE=TRUE90_PCIE_AP_TO_BB_REFCLK_P
90_AP_PCIE3_RXD_C_P
90_AP_PCIE2_TXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_N
MAKE_BASE=TRUEPCIE_WLAN_BI_AP_CLKREQ_L
PCIE_BB_BI_AP_CLKREQ_L
MAKE_BASE=TRUE90_PCIE_AP_TO_BB_REFCLK_N
MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_P
PP1V8
PCIE_WLAN_BI_AP_CLKREQ_L
MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_N
PCIE_AP_TO_BB_RESET_L MAKE_BASE=TRUE
MAKE_BASE=TRUEPCIE_AP_TO_WLAN_RESET_L
90_PCIE_AP_TO_WLAN_REFCLK_N MAKE_BASE=TRUEPP1V8_SDRAM
SYNC_MASTER=david-copy SYNC_DATE=03/01/2016
MLB UNIQUE
ROOM=RADIO_BB01005
MF1/32W
1%100K
X5R-CERMROOM=SOC 6.3V
01005GND_VOID=TRUE20%
0.1UF
X5R-CERM 01005GND_VOID=TRUEROOM=SOC 6.3V20%
0.1UF
GND_VOID=TRUEROOM=SOCX5R-CERM
0.1UF010056.3V20%
GND_VOID=TRUE01005
0.1UFX5R-CERM
ROOM=SOC 6.3V20%
GND_VOID=TRUE
X5R-CERM20% 6.3V
01005
0.1UFROOM=SOC
GND_VOID=TRUE
X5R-CERM 01005
0.1UF6.3V20%ROOM=SOC
20% 6.3V01005
0.1UF
X5R-CERMROOM=SOC GND_VOID=TRUE
GND_VOID=TRUEROOM=SOC
0.1UF
010056.3V20%
X5R-CERM
SM ROOM=SOCP2MM-NSM
100K5%1/32WMF01005ROOM=SOC
P2MM-NSMROOM=SOCSM
52 8
8
8
53 8
52 8
53 8
8 53
53
52 8
53
53
53 52
53
52 8
8 53
53 52
53 52
53
53
48 47 46 39 30 29 25 18 17 16 13 12 11 9 8 7 5
53 52
53
53
53
53 53 48 47 46 41 40 37 36 32 21 20 18 16
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
Per JimYang 3/17, D11 only, NC BUFFER_GPO2
Opposite polarity on Karoo -->
Wifi/BT
NFC
FF SPECIFIC
Cellular
53 OF 81
AP_TO_ICEFALL_FW_DWLD_REQ12
53 OF 53
8.0.0
051-00482
1PP5303
1PP5302
1PP5301
1PP5304
50_UAT_MB_HB_SOUTH50_UAT_LB_MLB_SOUTH
BB_TO_LAT_GPO2
50_UAT_WLAN_2G_EAST
UART_WLAN_TO_BB_COEX
I2S_AP_TO_BT_DOUT
I2S_AP_TO_BT_LRCLK
AOP_TO_WLAN_CONTEXT_BAOP_TO_WLAN_CONTEXT_A
UART_BT_TO_AP_CTS_L
UART_BT_TO_AP_RXDUART_AP_TO_BT_TXD
UART_WLAN_TO_AP_CTS_L
AP_TO_WLAN_DEVICE_WAKE
UART_AP_TO_WLAN_TXD
PCIE_BB_BI_AP_CLKREQ_L
I2S_BB_TO_AP_LRCLKI2S_AP_TO_BB_DOUTI2S_BB_TO_AP_DIN
UART_BB_TO_WLAN_COEXUART_WLAN_TO_BB_COEX
NFC_SWP
BB_TO_LAT_GPO3
SWD_AOP_BI_BB_SWDIOPMU_TO_BB_USB_VBUS_DETECT
SWD_AP_TO_MANY_SWCLK
SE2_PWR_REQ
PP_VDD_MAIN
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_BCLK
PMU_TO_WLAN_REG_ON
PP_VDD_MAINPP1V8_SDRAM
BT_TO_PMU_HOST_WAKE
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_AP_TO_WLAN_REFCLK_P
UART_WLAN_TO_AP_RXD
90_PCIE_WLAN_TO_AP_RXD_P
PMU_TO_BT_REG_ON
PP_VDD_MAIN
PMUGPIO_TO_WLAN_CLK32K
PCIE_WLAN_BI_AP_CLKREQ_L
50_UAT_WLAN_5G_WEST
50_UAT_WLAN_5G_EAST
50_WLAN_A_1
90_PCIE_AP_TO_WLAN_REFCLK_N
AP_TO_BT_WAKE
NFC_TO_PMU_HOST_WAKE
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_CTS_L
NFC_SWPSE2_READYSE2_PWR_REQ
UART_AP_TO_NFC_RTS_LUART_NFC_TO_AP_RXD
BB_TO_NFC_CLK
AP_TO_NFC_FW_DWLD_REQAP_TO_NFC_DEV_WAKE
50_UAT2_M
PMU_TO_NFC_EN
NFC_TO_BB_CLK_REQ
PCIE_AP_TO_WLAN_RESET_L
WLAN_TO_PMU_HOST_WAKE
PP1V8_SDRAM
UART_BB_TO_WLAN_COEX
90_PCIE_AP_TO_WLAN_TXD_P
UART_AP_TO_BT_RTS_L
50_WLAN_G_1
90_PCIE_WLAN_TO_AP_RXD_N
50_UAT_WLAN_2G_WEST_PLEXER
UART_BB_TO_AOP_RXDUART_AOP_TO_BB_TXD
AP_TO_BB_TIME_MARK
BB_TO_AP_RESET_DETECT_LBB_TO_STROBE_DRIVER_GSM_BURST_IND
AP_TO_BB_COREDUMP
AP_TO_BB_IPC_GPIO1
90_PCIE_AP_TO_BB_REFCLK_N90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_TXD_N90_PCIE_AP_TO_BB_TXD_P
90_PCIE_BB_TO_AP_RXD_P90_PCIE_BB_TO_AP_RXD_NPCIE_AP_TO_BB_RESET_L
BB_TO_PMU_PCIE_HOST_WAKE_L
90_USB_BB_DATA_P90_USB_BB_DATA_N
I2S_BB_TO_AP_BCLK
NFC_TO_BB_CLK_REQBB_TO_NFC_CLKNFC_SWP_MUXSE2_READYAP_TO_ICEFALL_FW_DWLD_REQ MAKE_BASE=TRUE
SE2_PRESENT
50_UUAT_LB_MLB_NORTH
UART_AP_TO_WLAN_RTS_L
SE2_PRESENT
NFC_SWP_MUX
ICEFALL_LDO_ENABLE
ICEFALL_LDO_ENABLE
50_UAT1_WEST
50_UAT_WLAN_2G_WEST_PLEXER
50_UAT_WLAN_2G_EAST50_UAT_WLAN_5G_EAST 50_UAT_MB_HB_SOUTH
50_UUAT_LB_MLB_NORTH
50_UAT_LB_MLB_SOUTH
PP_VDD_MAIN
50_UAT2_M50_UAT_WLAN_5G_WEST
50_WLAN_A_150_WLAN_G_1
50_UAT1_TUNER50_UAT1_WEST
BB_TO_LAT_ANT_SCLK
BUFFER_GPO1
PP3V0_TRISTAR_ANT_PROX
BB_TO_UAT_DATA
PP1V8_SDRAMBB_TO_UAT_SCLK
MAKE_BASE=TRUEBB_TO_UAT_SCLKMAKE_BASE=TRUEBB_TO_UAT_DATA
50_UAT1_TUNERBUFFER_GPO1
BB_TO_LAT_ANT_SCLKBB_TO_LAT_ANT_DATABB_TO_LAT_GPO1
BB_TO_LAT_ANT_DATA
BBPMU_TO_PMU_AMUX2
AP_TO_BB_MESA_ON
LCM_TO_MANY_BSYNC
AP_TO_BB_RESET_LPMU_TO_BBPMU_RESET_LAP_TO_BBPMU_RADIO_ON_L
BBPMU_TO_PMU_AMUX3
BBPMU_TO_PMU_AMUX1PP_VDD_BOOST
PP1V8_SDRAM
SYNC_MASTER=david-copy
CELL,WIFI,NFC SYNC_DATE=03/01/2016
I33
TRUE
ieeework.allieee.std_logic_1164.all
I32
SMROOM=UAT_DEBUG
P2MM-NSM
P2MM-NSM
ROOM=UAT_DEBUGSM
SMROOM=UAT_DEBUG
P2MM-NSM
P2MM-NSM
ROOM=UAT_DEBUGSM
I16
I10
73 57 53
73 57 53
68 41
61 57 53
68 60 53
60 11
60 11
60 13
60 13
60 12
60 12
60 12
60 12
60 12
60 12
68 52
68 11
68 11
68 11
68 60 53
68 60 53
81 55 53
68 46
67 13
64 20
67 36 17 13
78 55 53
77 60 57 55 53 46 41
40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
60 11
60 11
60 20
77 60 57 55 53 46 41
40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
68 60 58 55 53 52 48 47 46 41 40 37 36 32 21 20 18 16
60 20
60 52
60 52
60 12
60 52
60 20
77 60 57 55 53 46 41
40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
60 20
60 52
61 57 53
61 57 53
60 57 53
60 52
60 12
55 20
55 12
55 12
81 55 53
78 55 53
78 55 53
55 12
55 12
64 55 53
55 12
55 12
61 58 53
55 20
64 55 53
60 52
60 20
68 60 58 55 53 52 48 47 46 41 40 37 36 32 21 20 18 16
68 60 53
60 52
60 12
60 57 53
60 52
76 57 53
68 13
68 13
68 12
68 12
68 46 37 26
68 12
68 12
67 52
67 52
67 52
67 52
67 52
67 52
68 52
68 20
67 40
67 40
68 11
64 55 53
64 55 53
78 55 53
78 55 53 78
81 55 53
75 57 53
60 12
81 55 53
78 55 53
78 55 53
78 55 53
75 57 53
76 57 53
61 57 53
61 57 53 73 57 53
75 57 53
73 57 53
77 60 57 55 53 46
41 40 39 37 35 34 33 31 30 28 27 26 25 23 21 19 18 10 9 4
61 58 53
61 57 53
60 57 53
60 57 53
76 58 53
75 57 53
68 58 53 41
68 58 53
58 41 40 29 19
68 58 53
68 60 58 55 53 52 48 47 46 41 40 37 36 32 21 20 18 16
68 58 53
68 58 53
68 58 53
76 58 53
68 58 53
68 58 53 41
68 58 53 41
68 41
68 58 53 41
65 20
68 12
64 39 23 20 13
64 12
64 20
64 12
69 20
65 20
65 38 37 32 30 25 23 19
68 60 58 55 53 52 48 47 46 41 40 37 36 32 21 20 18 16
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
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D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
RADIO_MLB
AP_TO_BB_IPC_GPIO2
UART_GNSS_TO_AOP_RXD
UART_AOP_TO_GNSS_TXD
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_RXD
UART_GNSS_TO_AP_CTS_L
GNSS_TO_PMU_HOST_WAKE
UART_AP_TO_GNSS_RTS_L
AP_TO_GNSS_TIME_MARK
PMU_TO_GNSS_EN
UART_AP_TO_BB_TXD
UART_BB_TO_AP_RXD
BB_TO_AP_RESET_ACT_L
BBPMU_TO_PMU_AMUX2
BBPMU_TO_PMU_AMUX3
AP_TO_BB_TIME_MARK
TOUCH_TO_BBPMU_FORCE_PWM
100_PCIE_AP_TO_BB_REFCLK_P
100_PCIE_AP_TO_BB_REFCLK_N
AP_TO_BB_MESA_ON
AP_TO_BB_COREDUMP_TRIG
AP_TO_BB_GYRO_FORCE_PWM
BB_TO_AP_GSM_TXBURST
BB_TO_AP_RESET_DETECT_L
100_PCIE_AP_TO_BB_TX_P
100_PCIE_AP_TO_BB_TX_N
100_PCIE_BB_TO_AP_RX_P
100_PCIE_BB_TO_AP_RX_N
PCIE_AP_TO_BB_PERST_L
PCIE_AP_BI_BB_CLKREQ_L
PCIE_BB_TO_PMU_WAKE_L
UART_AOP_TO_BB_TXD
PP_VDD_BOOST_RF
BBPMU_TO_PMU_AMUX1
PP1V8_SDRAM
AP_TO_ICEFALL_FW_DWLD
UART_BB_TO_WLAN_COEX
I2S_AP_TO_BB_DOUT
I2S_AP_TO_BB_LRCLK
I2S_AP_TO_BB_BCLK
AP_TO_BB_RESET_L
PP_VDD_MAIN
SE2_PWR_REQ
SE2_PRESENT
ICEFALL_LDO_ENABLE
SE2_READY
NFC_SWP_MUX
BB_TO_NFC_CLK
NFC_TO_BB_CLKREQ
NFC_SWP
RFFE_GPO3
RFFE_GPO2
RFFE_GPO1
LAT_RFFE_DATA
LAT_RFFE_CLK
BUFFER_GPO2
50_UAT1_TUNER
UAT_RFFE_DATA
BUFFER_GPO1
UAT_RFFE_CLK
50_UAT1_WEST
50_UUAT_LB_MLB_NORTH
50_UAT_MB_HB_SOUTH
90_USB_BB_N
90_USB_BB_P
USB_BB_VBUS
SWD_AP_BI_BB_IO
SWD_AP_TO_BB_CLK
I2S_BB_TO_AP_DIN
UART_WLAN_TO_BB_COEX
50_UAT_LB_MLB_SOUTH
50_UAT_WLAN_2G_WEST_PLEXER
UART_BB_TO_AOP_RXD
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
WIFI_MLB
50_UAT2_M
50_UAT_WLAN_5G_WEST
I2S_AP_TO_BT_DOUT
UART_WLAN_TO_BB_COEX
50_WLAN_G_1
UART_AP_TO_BT_TXD
UART_WLAN_TO_AP_CTS_L
I2S_BT_TO_AP_DIN
AP_TO_WLAN_DEV_WAKE
100_PCIE_AP_TO_WLAN_TX_N
100_PCIE_AP_TO_WLAN_REFCLK_P
UART_WLAN_TO_AP_RXDUART_AP_TO_WLAN_RTS_L
UART_BT_TO_AP_RXDUART_AP_TO_BT_RTS_LUART_BT_TO_AP_CTS_L
UART_AP_TO_WLAN_TXD
PCIE_WLAN_TO_PMU_WAKE
100_PCIE_AP_TO_WLAN_TX_P
100_PCIE_WLAN_TO_AP_RX_P
PMU_TO_BT_REG_ON
PP_VDD_MAIN
100_PCIE_WLAN_TO_AP_RX_N
PP1V8_SDRAM
BT_TO_PMU_HOST_WAKE
UART_BB_TO_WLAN_COEX
I2S_AP_TO_BT_LRCKI2S_AP_TO_BT_BCLK
AOP_TO_WLAN_CONTEXT_BAOP_TO_WLAN_CONTEXT_A
50_UAT_WLAN_2G_EAST
AP_TO_BT_WAKE
PMU_TO_WLAN_32K
PMU_TO_WLAN_REG_ON
100_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_AP_TO_WLAN_PERST_LPCIE_AP_BI_WLAN_CLKREQ_L
50_UAT_WLAN_5G_EAST
50_WLAN_A_1
PP
PP
PP
PP
RADIO_MLB_FF
50_UAT_WLAN_2G_WEST_PLEXER
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_5G_EAST 50_UAT_MB_HB_SOUTH
50_UUAT_LB_MLB_NORTH
50_UAT_LB_MLB_SOUTH
VDD_TUNER_RFFE_VIO_1V8
50_UAT1_TUNER
PP3V0_TRISTAR_ARC_PROX
PP_VDD_MAIN
50_UAT1_WEST
50_UAT2_M
50_UAT_WLAN_5G_WEST
50_WLAN_A_1
50_WLAN_G_1
BUFFER_GPO1
UAT_TUNER_RFFE_DATA
UAT_TUNER_RFFE_CLK
BB_TO_LAT_ANT_SCLKBB_TO_LAT_ANT_SDATA
STOCKHOLM_MLB
ICEFALL_LDO_ENABLE
AP_TO_NFC_DEV_WAKEAP_TO_NFC_FW_DWLDNFC_TO_BB_CLK_REQ
PMU_TO_NFC_ENBB_TO_NFC_CLK
NFC_SWP_MUX
SE2_PRESENT
UART_NFC_TO_AP_RXD
PP_VDD_MAINPP1V8_SDRAM
UART_AP_TO_NFC_RTS_L
SE2_PWR_REQSE2_READYNFC_SWP
UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_TXD
NFC_TO_PMU_HOST_WAKE
BOM OPTIONS
ALTERNATES
JUNE 22, 2016STOCKHOLM_MLB
54 OF 81
AP_TO_NFC_FW_DWLD_REQ
SCH,MLB,D11
051-00482
2016-07-0600065328798 ENGINEERING RELEASED
1 OF 75
8.0.0
SE2_PWR_REQ
SE2_PRESENT
NFC_SWP_MUX
CRITICALNFCSW_RFONSEMI,IC LOAD SWITCH, WLCSP41353S01007
120PF, 0201 2% 50V1 D10_ROWC7518_RF131S00117
22PF, 0201 2% 50V D10_ROW1131S00055 C7512_RF
D10_ROWC7516_RF820PF, 0201 2% 50V1131S00026
220PF, 0201 2% 50V D10_ROW1 C7514_RF131S0883
150PF, 0201 2% 50V131S00019 D10_JP1 C7518_RF
560PF, 0201 2% 50V D10_JP1131S0825 C7516_RF
22PF, 0201 2% 50V D10_JP1131S00055 C7512_RF
D101C7518_RF120PF, 0201 2% 50V131S00117 1
C7516_RF131S00026 1 820PF, 0201 2% 50V D101
C7514_RF D10_JP220PF, 0201 2% 50V1131S0883
C7512_RF D10122PF, 0201 2% 50V131S00055 1
C7514_RF1 D101131S0883 220PF, 0201 2% 50V
D11_ROWC7516_RF1 680PF, 0201 2% 50V131S00033
C7516_RF D11_JP1131S00033 680PF, 0201 2% 50V
C7518_RF D11_ROW1 180PF, 0201 2% 50V131S00118
C7514_RF131S00081 1 270PF, 0201 2% 25V D11_ROW
1 D11_JPC7518_RF131S0731 100PF, 0201 2% 50V
131S00033 1 680PF, 0201 2% 50V D111C7516_RF
131S00081 1 D11_JPC7514_RF270PF, 0201 2% 25V
C7518_RF1 D111180PF, 0201 2% 50V131S00118
D1111 C7514_RF270PF, 0201 2% 25V131S00081
AP_TO_NFC_DEV_WAKE
UART_NFC_TO_AP_CTS_L
PP_VDD_MAIN
NFC_SWP
PP1V8_SDRAM
PMU_TO_NFC_EN
BB_TO_NFC_CLK
UART_AP_TO_NFC_TXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_RXD
NFC_TO_BB_CLK_REQ
NFC_TO_PMU_HOST_WAKE
SE2_READY
ICEFALL_LDO_ENABLE
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
132S0400 0.22UF 20% 6.3V 01005C7504_RF132S0436
page1
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S)PART NUMBERALTERNATE FORPART NUMBER
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
OUT
OUT
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
OUT
IO
NFC FRONT END
5V BOOSTERSTOCKHOLMNFC CONTROLLER
180 PHASE SHIFT INTRODUCED BY BALUNDONE FOR BEST ROUTING
NFC LOAD SWITCH
55 OF 81
051-004828.0.0
75 OF 75
VOLTAGE=1.80V
VOLTAGE=1.80V
AP_TO_NFC_FW_DWLD_REQ
A1A2
B2
B1
NFCSW_RF
2
1R7599_RF
21
R7520_RF
F2
B3B4
A6
F1
E6
C3
E5
G2
E2
F7
E1
C6 C7
D5
G5G3
B1
G4
E7
A5
B7
E3E4
A4
B5
G1
F6F5
C1
A1
C2
D3
A3
D1A7
C5
F4
G6G7
B2
C4B6
D2
A2
F3D6D4
D7
NFC_RF
2
1 C7518_RF
21
C7512_RF
21
C7514_RF
2
1 C7509_RF
2
1 C7510_RF
21
R7509_RF
21
R7508_RF
1
PP7509_RF
1
PP7508_RF
1
PP7507_RF
1
PP7506_RF
1
PP7505_RF
1
PP7504_RF
1
PP7503_RF
2
1 C7527_RF
2
1 C7506_RF
2
1 C7526_RF
2
1 C7516_RF
2
1 C7515_RF
1TP7500_RF
41
32
BALU
N_RF
1TP7505_RF
2
1 C7504_RF
2
1 C7520_RF
2
1 C7521_RF
2
1 C7522_RF
2
1 C7500_RF
21
R7502_RF
21
L7501_RF
21
L7500_RF
21
L7502_RF
2
1 C7517_RF
2
1 C7511_RFA2A1A3
B2B1
C2C1
B3
C3
NFBST_RF
21
C7507_RF
21
C7508_RF
2
1 C7505_RF
2
1 C7503_RF
2
1 C7502_RF
OMIT_TABLE
OMIT_TABLE
NFC_TO_PMU_HOST_WAKE1 2
1
1
1
1 2
1 2
1 2
1 2
1 2
1 2
1
1 2 1
1
1
1 2 1
NFC
PP1V8_SDRAM
PP_VDD_MAIN PP_VDD_MAIN_NFC
SE2_PWR_REQ
BB_TO_NFC_CLK
UART_NFC_TO_AP_RXD
PMU_TO_NFC_EN
NFC_RXN
PP_VDD_MAIN_NFCPP_VDD_MAIN
VDD_NFC_AVDD
VDD_NFC_5V
NFC_BALN
NFC_BOOST_SW
PP_VDD_MAIN_NFC
NFC_ANT_MATCH
NFC_RXN_CAP
NFC_TXP
NFC_ANT
NFC_SWP_MUX
SE2_READY
VDD_NFC_ESE
NFC_BOOST_EN
NFC_RXP
VDD_NFC_ESE
VDD_NFC_AVDD
VDD_NFC_DVDD
SE2_PRESENT
NFC_TO_BB_CLK_REQ
NFC_RXN
NFC_RXP_CAP
NFC_TEST_OUT
PP_VDD_MAIN_NFC
NFC_TXN
NFC_TXP
NFC_RXP
NFC_BOOST_EN
VDD_NFC_5V
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L AP_TO_NFC_DEV_WAKE
UART_NFC_TO_AP_CTS_L
NFC_BALP
UART_NFC_TO_AP_CTS_L
PMU_TO_NFC_EN
NFC_TO_PMU_HOST_WAKE
UART_AP_TO_NFC_RTS_L
ICEFALL_LDO_ENABLE
UART_AP_TO_NFC_TXD
NFC_TEST_OUT
NFC_SWP
PP1V8_SDRAM VDD_NFC_TVDD
PP1V8_SDRAM
SE2_PWR_REQ
NFC_VMID
AP_TO_NFC_DEV_WAKE
NFC_TXN
FPF1204UCX
15UF FAN4
8614
BUC5
0X
15UF
1.8UH-0.7A
160NH-10%-0.48A-0.33OHM
160NH-10%-0.48A-0.33OHM
1UF
0.00
1UF
0.1UF
100PF100PF
1UF
0.22UF
ATB1
6100
6F-2
0011
1000PF 820PF
2.2UF2.2UF 2.2UF
P2MM-NSM
P2MM-NSM
P2MM-NSM
P2MM-NSM
P2MM-NSM
P2MM-NSM
P2MM-NSM
560
560
680PF
680PF
220PF
22PF
120PF
PN67VEU3-B001D004
0.00
1.00K
1UF
1000PF
1000PF
NFC
NFC
NFCNFC
NFC
NFC
NFC
NFC
NFC
NFC
NFCNFC
NFC
NFC
NFC
NFC NFC
NFC
NFC
NFC
NFC
NFC
NFC
NFC
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT_TABLE
OMIT
OMIT_TABLE
NOSTUFF
6.3V 6.3V
10V10V
6.3V
16V16V
10V
6.3V
25V 25V
6.3V6.3V 6.3V
25V
25V
50V
50V
50V
10V
25V
25V
20% 20%
20%
0%
20%
20%
5%5%
20%
20%
2% 2%
20%20% 20%
1%
1%
2%
2%
2%
2%
2%
1%
5%
20%
2%
2%
WLCSP-COMBO
0402-1
WLCSP
0402-10603
0402
0402
0201
01005
0201
01005
0100501005
0201
01005
TP-P55
SM
SM-TP1P25-TOP
0201 0201
0201-10201-1 0201-1
SM
SM
SM
SM
SM
SM
SM
201
201
0201
0201
0201
0201
0201
UFLGA
0201
01005
0201
0201
0201
X5R X5R
X5R
MF
X5R
X5R-CERM
NP0-C0GNP0-C0G
X5R
X5R
C0G-NP0 C0G-NP0
X5R-CERMX5R-CERM X5R-CERM
MF
MF
C0G-NP0
C0G-NP0
C0G
C0G-CERM
NP0-C0G
MF
MF
X5R
C0G-NP0
C0G-NP0
1/32W
1/20W
1/20W
1/20W
1/32W
2
1 2
2
1 2
1 2
1 2
1 2 1 2
1 2
1 2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1 2 2
2
1 2
2 2 1
2 1
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VIN
GND
VOUT
ON
SMX_RST*
EXT_MUX
SE2_BUSY
XTAL2
IC2
TXRXNFC_CLK_XTAL1
IRQ
DWL
ESE_IO1
RTSVEN
CLK_REQ
CTS
SVDD_REQ
VDD
VBAT
PVDD VU
P
SIM
_PM
U_VC
C
TVDD
AVDD
SVDD
ESE_
VDD
VMID
TX2
RX-
TX1
RX+
WKUP_REQ
SE2_ENABLE
TX_PWR_REQ
SIM_SWIO
SE2_SVDD_IN
GPIO0
IC00
IC01
ESE_DWPM_DBGESE_DWPS_DBG
PVSS
TVSS
DVSS
AVSS
DVSS
AVSS
AVSS
VSS
SMX_CLK
OUTOUT
PP
PP
PP
PP
PP
PP
PP
BI
IN
OUTIN
IN
A
NCNC
UNBA
LBA
L0G
NDBA
L1
A
NC
NC
IN
IN
OUT
OUT
IN
IN
IN
OUT
IN
OUT
NC
SW
PGND
PGND
VIN
SW
VOUT
AGND
EN
VOUT
NC
D11 RADIO_MLB_FF FEB 05, 2016
NOLMBRF:LMBRF:
56 OF 81
SCH,MLB,D11
051-00482
2016-07-0600065328798 ENGINEERING RELEASED
1 OF 3
8.0.0
?
2
PDF PAGE
METROCIRC
CONTENTS
1 CRITICAL152S0983 L8009_RF LMBRF
LMBRFCRITICAL1 2.4NH,600MA,0201152S2001 L8008_RF
1 L8009_RF
CRITICAL1152S2024 L8008_RF NOLMBRF1.4NH,1.1A,0201
NOLMBRFCRITICAL3.6NH,2%,1.7A,0.045OHM,0402152S006106.8NH,2%,1.5A,0.055OHM,0402
TABLE_TABLEOFCONTENTS_HEAD
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
TABLE_TABLEOFCONTENTS_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEMTABLE_5_ITEM
TABLE_5_ITEM
WIFI LOWER ANTENNA FEED
METROCIRC
WIFI_BULK CAP
EAST MLB
LOWER MLB
RADIO MLB
WIFI MLB
RADIO MLB
WEST MLB
D11 EAST-WEST METROCIRC339S00146
METROCIRC
WIFI MLB
COAX
THROUGH METROCIRC
WIFI MLB
WIFI MLB
METROCIRC RADIO MLB
RADIO MLB
WIFI MLB
RADIO MLB
UPPER MLB
339S00147D11 NORTH-SOUTH METROCIRC
57 OF 81
2 OF 3
8.0.0
051-00482
2
1 C7611_RF
2
1
C6729_RF
21
R6711_RF
11107
513
3029282726252423
222112
98642
MCEW_RF
9117
426
39383736353433
3231302928272625242322211210
8531
MCNS_RF
2
1 C7610_RF
2
1
C7702_RF
2
1
L7703_RF
2
1
L7702_RF
1
3
2
JLAT3_RF
2
1 C7704_RF
21
R7701_RF
2
1 C7703_RF4
6
5312
W25DI_RF
21
R7700_RF
21
C7701_RF
2
1 C7700_RF
4 1
6 5 3 2
W2BPF_RF
2
1
L7701_RF
21
L7700_RF
WLAN_RFFEOMIT
OMIT
3.6PF
16V
OMIT
9.1NH-3%-0.17A-1.7OHM01005WLAN_RFFE
50_WLAN_A_1
50_WLAN_G_1
50_UAT_WLAN_5G_WEST
50_UAT1_WEST
50_UAT_WLAN_5G_EAST
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_2G_WEST_PLEXER
50_UUAT_LB_MLB_NORTH 50_UAT_LB_MLB_SOUTH
50_UAT_MB_HB_SOUTH
PP_VDD_MAIN
50_WLAN_A_1_DPLX
50_WLAN_G_1_DPLX
50_LAT_WLAN_M
50_UAT_WLAN_2G_WEST
50_LAT_WLAN_NORTH
50_WLAN_G_1_BPF
50_LAT_WLAN_SOUTH
50_UAT1_EAST
50_UAT1_EAST
50_LAT_WLAN_NORTH
50_UAT_WLAN_2G_WEST
50_LAT_WLAN_SOUTH
METROCIRC [2]
10UF20%6.3VCERM-X5R
WLAN0402-9
F-ST-SMMM7829-2700
NP0-C0G01005
+/-0.1PF16V0.2PF
WLAN_RFFENOSTUFF
MF
0.00
+/-0.1PF16V
NOSTUFF
0.2PF
WLAN_RFFE01005NP0-C0G
0805
0.00
NP0-C0G01005
16V0.2PF
B39242B8847P810LGA
WLAN-BT-LTE
010059.1NH-3%-0.17A-1.7OHM
X5R10V10%1000PF
NOSTUFF01005
OMIT
02017.5NH+/-0.3%-0.4AUP_RFFE
INOUTINOUT
0201
+/-0.1PF25V
C0G-CERM
UP_RFFEOMIT
3.9PF
2
FLTPSSL-672ESM
FLTPSSL-765ESM
01005
WLAN_RFFE01005
1/32W0%
OMIT
+/-0.1PF
+/-0.1PF
NP0-C0G01005
WLAN_RFFE
4.0NH-+/-0.1NH-0.27A
WLAN_RFFE01005MF
1/32W0%
0.00
OMIT
50_WLAN_G_1_M
NOSTUFFWLAN_RFFE
WLAN_RFFE01005MF
1/32W0%
OMIT
WLAN_RFFE
WLAN_RFFE01005
OMITDPX205850DT-9173C1SJ
4.3NH-3%-0.270A
2
2 2
2
2
2
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
COM
LO
HI
IO
GND
IN/OUT IN/OUTIO
IO
IOBI
IO
IO
IO
IN IO
BI OUT
GND
SIGNAL2-WSIGNAL1-W
SIGNAL3-W
GND
SIGNAL3-ESIGNAL2-ESIGNAL1-E
SIGNAL1-U SIGNAL1-L
GND
SIGNAL3-USIGNAL2-U SIGNAL2-L
SIGNAL3-L
GND
LB/MLB/GNSS/MB/HB
FOR ANY COMPONENT CHANGE.
STANDOFF5G WIFI
STANDOFFFROM RADIO SCHEMATICS
PLEASE CONTACT ANTENNA (MATT MOW)
UAT TUNER FLEX
ALT UAT1 GND
58 OF 81
BB_TO_UAT_SCLK3
BB_TO_UAT_DATA3
PP3V0_TRISTAR_ANT_PROX3
PP3V0_TRISTAR_ANT_PROX
BB_TO_LAT_ANT_DATA
PP1V8_SDRAM
BB_TO_UAT_DATA BB_TO_UAT_SCLK
3 OF 3
8.0.0
051-00482
2
1 C6736_RF
2
1 C8001_RF
21
L8008_RF
2
1 C5909_RF
2
1 C5908_RF
2
1 C5905_RF
2
1 C5904_RF
21
L6708_RF
10 9
8 7
6 54 32 1
TUNFX_RF
1
AGND_RF
2
1
L8009_RF
2
1 C8008_RF
2
1L6707_RF
2
1 C6714_RF
21
FL6703_RF
21
FL6700_RF
21
L8007_RF
42
61
5
3
USPDT_RF
2
1 C8006_RF
2
1 C8005_RF
21
L8010_RF
2
1 C6734_RF
2
1 C6735_RF
1
SUAT2_RF
2
1
L7709_RF
21
C7731_RF
2
1 C7730_RF
2
1 C6733_RF2
1 C6732_RF2
1 C6731_RF2
1 C6730_RF
1
SP6701_RF
1
SUAT1_RF
21
C6716_RF
21
FL6702_RF
2
1 C6703_RF
2
1 C6705_RF
2
1 C6702_RF
2
1 C6701_RF
21
FL6701_RF
25V
0201CERM
UP_RFFE
UP_RFFE
0201
120NH-5%-40MA
0201
UAT
2.4NH+/-0.1NH-0.6A
0201
C0H-CERM
NOSTUFF
STDOFF-2.56OD1.4ID.99H-SM
04026.8NH-1.5A-0.055OHMOMIT_TABLE
CHASSIS_GND
STDOFF-2.2OD0.25H-0.50-1.70
OMIT_TABLE
USPDT_RF DC_BLOCKUAT_TUNER_GPO_FIL
ALT_GND
50_UAT1_FEED
USPDT_VDD
UAT_TUNER_RFFE_DATA_FILT
CHASSIS_GND
50_UAT1_NOTCH
CHASSIS_GND
VDD_TUNER_RFFE_VIO_1V8_FILT PP3V0_TRISTAR_UAT_TUNER_B2B_FILT
UAT_TUNER_RFFE_CLK_FILT
BUFFER_GPO1
50_UAT1_TUNER
BB_TO_LAT_ANT_SCLK
UAT MATCH AND TUNER [3]
3
0201
+/-0.05PF0.3PF25VC0G-CERM
3
6.3V0.1UF
01005X5R-CERM20%
CERM
22PF2%16V
01005
NOSTUFF
33PF5%16V
01005NP0-C0G-CERM
6.3V5%
01005NP0-C0G
82PF
5%35VNP0-C0G01005
100PF
3
0201
1.4NH+/-0.1NH-1.1A
505066-0620F-ST-SM
UAT
25V2%
0201
18PF
03015
18NH-3%-0.22A-0.54OHM
NO_XNET_CONNECTIONUP_RFFE
0.8PF
0201
25VC0G
UP_RFFE
+/-0.05PF
NO_XNET_CONNECTION
01005
150OHM-25%-200MA-0.7DCR
01005
150OHM-25%-200MA-0.7DCR
0201
560NH-5%-2.80OHM
WLCSPRF1341
UAT01005
5%16VNP0-C0G
27PF
33PF5%
01005
16VNP0-C0G-CERM
16V
01005
5%33PF
NP0-C0G-CERM
100PF
UP_RFFE
16V5%
01005NP0-C0G
UP_RFFE
5%16VCERM
18PF
01005
UP_RFFE
UAT01005
16V5%NP0-C0G
27PF
UP_RFFE02011.5NH+/-0.1NH-1.0A
220PF
CERM
5%6.3V
01005
16V+/-0.1PF
01005-1NP0-C0G
4.7PF
NP0-C0G16V5%56PF
01005CERM
5%6.3V
220PF
01005
2.85R1.5-NSP
UP_RFFE
STDOFF-2.56OD1.4ID.99H-SM
0201
2%
C0H-CERM25V
18PF
UP_RFFE
MF
0%1/32W
01005
0.00
0%
01005
1/32WMF
0.00
01005UAT
NP0-C0G16V5%27PF
16V27PF5%NP0-C0G01005
0.8NH-+/-0.05NH-1.1A-0.04OHM50_UAT2_M
0.6PF+/-0.05PF
50_UAT2_FEED
3
3
3
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
INIO
IO
IN
IN
IO
IO
GNDA
VDD
RF1
RFGND
CBIN
IO
FEBRUARY 1, 2016
CLOCKS
CONTROL
WLAN PCIE
POWER
AUDIO
COEX
ANTENNA
WLAN UART
AOP
D1X WIFI_MLB (PERENNIAL)
BOM OPTIONS:
D101_WIFI:D10_ROW:D10_JP:
C7703_RF,C7704_RF,L7703_RF
BLUETOOTH UART
NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RFC7700_RF, C7703_RF,C7704_RF
D11_ROW:
NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RFC7703_RF,C7704_RF,L7703_RF
D11_JP:
NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF
NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RFC7700_RF, C7703_RF,C7704_RF NOSTUFF: C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF
C7700_RF, C7703_RF,C7704_RF
NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RFC7703_RF,C7704_RF,L7703_RF
D111_WIFI:
59 OF 81
PCIE_WLAN_BI_AP_CLKREQ_L
PMUGPIO_TO_WLAN_CLK32K
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
PCIE_AP_TO_WLAN_RESET_L
AP_TO_WLAN_DEVICE_WAKE
I2S_AP_TO_BT_LRCLK
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
WLAN_TO_PMU_HOST_WAKE
SCH,MLB,D11
051-00482
2016-07-0600065328798 ENGINEERING RELEASED
1 OF 77
8.0.0
D10_ROW
D10_ROW
D10_ROW
D101
D101
D101
1 CRITICALL7703_RF152S00038 IND,4.0NH,+/-0.1NH,UH-Q,01005
CRITICAL1 C7701_RFCAP,3.6PF,+/-0.1PF,01005131S0401
IND,9.1NH,UH-Q,010051152S1853
TRUE
CRITICALL7702_RF
L7702_RF CRITICAL
TRUE
152S1853 1 IND,9.1NH,UH-Q,01005
CAP,3.6PF,+/-0.1PF,01005 C7701_RF1 CRITICAL
152S00038 CRITICAL1152S00038 D10_JPCRITICAL1
131S0401 1
D10_JPCRITICAL
TRUE
152S1853 1
1 D10_ROW117S0161 CRITICAL
TRUE
1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 D10_JP
R7701_RF
L7700_RF
CAP,CER,4.0PF,+/-0.1PF,01005
IND,0.6NH,+/-1NH,UH-Q,01005
IND,9.1NH,UH-Q,01005
1
L7702_RF
C7701_RF
D10_JP1117S0161 CRITICAL
CRITICAL
TRUE
D11_JP152S1853 1 IND,9.1NH,UH-Q,01005
C7729_RF
C7702_RF
R7701_RF
L7701_RF
IND,0.6NH,+/-1NH,UH-Q,01005
R7700_RF
CAP,CER,0.2PF,+/-0.05PF,01005
CAP,CER,0.3PF,+/-0.05PF,01005
IND,FILM,2.2NH,UH-Q,01005
CAP,CER,3.5PF+/-0.1,01005
IND,0.7NH,UH-Q,01005
152S00273
UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_TXD
UART_WLAN_TO_AP_RXD
RES,MF,0 OHM,1/32W,01005
IND,9.1NH,UH-Q,01005
RES,MF,0 OHM,1/32W,01005
IND,6.2NH,UH-Q,01005
1152S1998
152S2043 IND,6.2NH,UH-Q,01005 D10_JPCRITICALC7702_RF1
CRITICALR7700_RF D10_JP1117S0161
D10_JP1152S1998 IND, 0.8NH,UH-Q,01005 CRITICAL
BT_TO_PMU_HOST_WAKE
RES,MF,0 OHM,1/32W,01005117S0161 1
TRUE
D11_JP152S1853 1 IND,9.1NH,UH-Q,01005 L7702_RF152S1853 CRITICAL1
TRUE
D11_ROW
D11_ROW
TRUE
L7701_RF CRITICAL152S1853
D11_ROW1 CRITICALC7701_RF117S0161
1152S2061 D10_JPCRITICAL
D10_JP1131S0404 CRITICAL
152S1980 1 D10_JPCRITICALIND,1.0NH,UH-Q,01005
1
131S0893 1 D10_JPCRITICALC7706_RF
1 D10_JPCRITICALRES,MF,0 OHM,1/32W,01005
152S00029 1 R7703_RF D10_JPCRITICAL
C7705_RF1131S0648 CAP,CER,0.3PF,+/-0.05,01005 D10_JPCRITICAL
D10_ROWIND,6.2NH,UH-Q,01005152S2043 1 L7701_RF CRITICAL
D10_ROWL7700_RFIND, 0.8NH,UH-Q,01005 CRITICAL
152S2043 D10_ROW
TRUE
1 C7702_RF CRITICAL
TRUE
117S0161 1 CRITICAL D10_ROWR7700_RF
TRUE
1117S0161 R6711_RF D10_ROWCRITICALTRUE
152S1853 1 C6729_RF CRITICAL D10_ROW
CRITICAL D10_ROW1 R7704_RF152S1988
TRUE1 R7702_RFRES,MF,0 OHM,1/32W,01005 D10_ROWCRITICAL117S0161
TRUE
1131S0893 CAP,CER,0.2PF,+/-0.05,01005 C7706_RF D10_ROWCRITICAL
1 CRITICALR7711_RFRES,MF,0 OHM,1/32W,01005117S0161 D10_ROW
IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D10_ROWCRITICAL
CAP,CER,0.3PF,+/-0.05,01005 CRITICAL1 C7705_RF131S0648 D10_ROW
IND,6.2NH,UH-Q,01005152S2043 CRITICAL1 L7701_RF D101
IND, 0.8NH,UH-Q,01005152S1998 CRITICAL1 L7700_RF D101
C7702_RFTRUE
CRITICAL1 D101IND,6.2NH,UH-Q,01005152S2043
R7700_RF CRITICALRES,MF,0 OHM,1/32W,01005 D1011117S0161
CRITICALC6729_RFIND,9.1NH,UH-Q,0201TRUE1 D101152S2054
D101RES,MF, 0 OHM,1/20W, 0201TRUE1 CRITICALR6711_RF118S0724
TRUEC7708_RF CRITICAL1 D101CAP,CER,0.3PF,+/-0.05PF,01005131S0648
TRUEIND,2.4NH,UH-Q,010051 R7704_RF D101152S1988 CRITICAL
D1011 RES,MF,0 OHM,1/32W,01005 R7702_RF117S0161 CRITICAL
D101R7711_RF1 RES,MF,0 OHM,1/32W,01005117S0161 CRITICAL
IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D101CRITICAL
CRITICALC7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 D1011
CAP,CER,0.3PF,+/-0.05,01005131S0648 C7705_RF1 D101CRITICAL
CRITICALL7700_RF
TRUE
D11_ROW
131S0405 1 CRITICALR7701_RF D11_ROW
C7702_RF
TRUE
CRITICAL1 D11_ROW
IND,1.0NH,+/-0.1NH,UH-Q,01005 R7700_RF
TRUE
1 CRITICAL152S1980 D11_ROW
131S0648 1 CRITICAL
TRUE
D11_ROW
1 CRITICAL131S0893 D11_ROWC7729_RF
CRITICAL D11_ROW
152S2054 CRITICAL D11_ROW1
118S0724 D11_ROW1TRUE
R7704_RF
D11_ROWCAP,CER,3.5PF+/-0.1,01005131S0400 1 R7702_RF
IND,0.7NH,UH-Q,01005 CRITICALR7711_RF1
IND,0.6NH,UH-Q,01005 D11_ROWCRITICAL1 R7703_RF
152S00273
TRUE
1 D11_JPL7700_RF
CAP,CER,4.0PF,+/-0.1PF,01005
TRUE
131S0405 1
131S0648 CAP,CER,0.3PF,+/-0.05PF,01005
TRUE
CRITICAL1
131S0648 1 CRITICAL D11_JP
TRUE
TRUE
IND,1.0NH,+/-0.1NH,UH-Q,01005 D11_JP1152S1980
131S0893
TRUE
1 D11_JP
TRUE
C6729_RF1 D11_JPCRITICAL152S2055
C7705_RF
TRUE
1 CRITICAL131S0893 D11_JP
TRUE
D11_JP1131S0593
C7708_RF131S0648 1
R7704_RF
TRUE
152S1986 CRITICAL1
TRUE
1131S0400
152S1976
TRUE
1 D11_JP
TRUE
IND,0.6NH,UH-Q,01005
TRUE
R7703_RF1
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_5G_WEST
50_UAT_WLAN_5G_EAST
50_UAT2_M
50_WLAN_A_1
50_WLAN_G_1
I2S_BT_TO_AP_DIN
UART_WLAN_TO_BB_COEX
UART_BB_TO_WLAN_COEX
I2S_AP_TO_BT_DOUT
I2S_AP_TO_BT_BCLK
UART_BT_TO_AP_RXD
AOP_TO_WLAN_CONTEXT_B
AOP_TO_WLAN_CONTEXT_A
UART_AP_TO_BT_RTS_L
UART_AP_TO_BT_TXD
UART_AP_TO_WLAN_RTS_L
AP_TO_BT_WAKE
PMU_TO_BT_REG_ON
PMU_TO_WLAN_REG_ON
PP1V8_SDRAM
PP_VDD_MAIN
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
WIFI FRONT-ENDPERENNIALCONTENTSCSA PAGEPDF PAGE
23
7677
WIFI_MLB SCHEMATIC
UART_BT_TO_AP_CTS_L
TRUE
CRITICAL
CRITICAL
CRITICAL
D11_JPCRITICAL
IND,2.4NH,UH-Q,01005
D10_JPCRITICALRES,MF,0 OHM,1/32W,01005 R7711_RF
R7702_RF
R7704_RF
R6711_RF
C6729_RF
117S0161
117S0161
CAP,3.6PF,+/-0.1PF,01005
RES,MF,0 OHM,1/32W,01005
IND,4.0NH,+/-0.1NH,UH-Q,01005
IND,9.1NH,UH-Q,01005
IND,7.5NH,UH-Q,01005
CAP,CER,0.2PF,+/-0.05,01005
IND,1.1NH,UH-Q,01005
CAP,3.9PF,+/-1.0PF,01005
RES,MF,0 OHM,1/32W,01005
L7701_RF
L7702_RF
C7701_RF
L7703_RF
CRITICAL D10_JP
R6711_RF
R7701_RF
L7703_RF
D11_JP
131S0893 1
D11_ROWCRITICAL
CRITICAL
C7705_RF
C6729_RF
RES,MF,0 OHM,1/20W,0201
CRITICAL D11_JP 152S00273
152S1976CRITICALR7711_RF
R7702_RF CRITICAL D11_JP
TRUE1 IND,FILM,2.2NH,UH-Q,01005152S1986
D11_JPCRITICAL
CAP,3.9PF,+/-1.0PF,0201,HI-Q
IND,7.5NH,UH-Q,0201
R6711_RF CRITICALTRUE
IND,9.1NH,UH-Q,0201
CAP,CER,0.3PF,+/-0.05PF,01005 C7700_RFCRITICALCAP,CER,0.2PF,+/-0.05PF,01005
CAP,CER,0.3PF,+/-0.05PF,01005 C7700_RF
CRITICAL
D11_JP
131S0648 CAP,CER,0.3PF,+/-0.05PF,01005TRUE
CAP,CER,0.2PF,+/-0.05PF,01005
CAP,CER,0.2PF,+/-0.05PF,01005
CRITICAL
D11_JP
152S00273
1
IND,9.1NH,UH-Q,01005
RES,MF,0 OHM,1/32W,01005
D11_ROW
131S0401
IND,4.0NH,+/-0.1NH,UH-Q,01005
RES,MF,0 OHM,1/32W,01005
CRITICAL1117S0161 R7701_RF D101RES,MF,0 OHM,1/32W,01005
1 IND,0.6NH,UH-Q,01005 R7703_RF D111CRITICAL152S00273
R7702_RF D111CRITICAL1131S0400 CAP,CER,3.5PF+/-0.1,01005
D1111 CRITICALR7711_RF152S1976 IND,0.7NH,UH-Q,01005
152S1986 R7704_RF1 D111CRITICALIND,FILM,2.2NH,UH-Q,01005TRUE
118S0724TRUE
1 D111R6711_RFRES,MF, 0 OHM,1/20W, 0201 CRITICAL
152S2054 1TRUE
D111IND,9.1NH,UH-Q,0201 C6729_RF CRITICAL
1 CRITICAL D111C7705_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005
1 CRITICAL D111C7729_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005
R7700_RF
TRUE
1 CRITICAL152S1980 IND,1.0NH,+/-0.1NH,UH-Q,01005 D111
C7700_RF131S0648 1 CAP,CER,0.3PF,+/-0.05PF,01005 CRITICAL
TRUE
D111
TRUE
CRITICALCAP,CER,0.3PF,+/-0.05PF,010051131S0648 D111C7702_RF
1 CRITICALL7700_RF
TRUE
152S00273 IND,0.6NH,+/-1NH,UH-Q,01005 D111
CAP,CER,4.0PF,+/-0.1PF,01005131S0405
TRUE
1 CRITICALR7701_RF D111
CRITICAL152S1853 IND,9.1NH,UH-Q,01005 L7701_RF1
TRUE
D111
117S0161 C7701_RF CRITICALRES,MF,0 OHM,1/32W,010051 D111
CRITICAL152S1853 IND,9.1NH,UH-Q,010051
TRUE
D111L7702_RF
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEMTABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IO
OUT
WIFI/BT
TDO
TDI
60 OF 81
I2S_AP_TO_BT_LRCLK
AP_TO_WLAN_DEVICE_WAKE
PMUGPIO_TO_WLAN_CLK32K
90_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_WLAN_BI_AP_CLKREQ_L
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_AP_TO_WLAN_REFCLK_P
WLAN_TO_PMU_HOST_WAKE
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_AP_TO_WLAN_TXD_P
PCIE_AP_TO_WLAN_RESET_L1 2
PMUGPIO_TO_WLAN_CLK32K1 2
90_PCIE_AP_TO_WLAN_TXD_P1 2
90_PCIE_AP_TO_WLAN_REFCLK_P1 2
AP_TO_WLAN_DEVICE_WAKE1 2
90_PCIE_AP_TO_WLAN_REFCLK_N2 1
90_PCIE_AP_TO_WLAN_TXD_N1 2
WLAN_TO_PMU_HOST_WAKE1 2
PCIE_AP_TO_WLAN_RESET_L
76 OF 77
8.0.0
051-00482
163162161160159158157156155154153152151150149148147146145144143142141140139138137136135134133132131130129128127126125124123122121120119118117116115114113112111110109108107106
105104103102101100
999897969594919089888786858483828180797877767574
7372717069686765605857535150494847464536343227242118
641
WLAN_RF
92
1413
35
15 2928 3130
33
78
2223
2526
1920
1617
54
2626461
1110
9
12
363
4241
4344
93
374039
38
56
55
6659
552
WLAN_RF
2
1 C7606_RF
1
PP7623_RF
1
PP7622_RF
1
PP7621_RF
1
PP7620_RF
1
PP7624_RF
2
1 C7603_RF
21
L7600_RF
4
3
2
1
C7604_RF
2
1 C7602_RF
2
1 C7607_RF
2
1 C7601_RF
2
1 C7600_RF
2
1R7600_RF
1
PP7608_RF
1
PP7609_RF
1
PP7616_RF
1
PP7611_RF
1
PP7610_RF
1
PP7612_RF
1
PP7613_RF
1
PP7614_RF
1
PP7615_RF
1
PP7618_RF
1
PP7619_RF
1
PP7600_RF
1
PP7601_RF
1
PP7603_RF
1
PP7617_RF
1
PP7604_RF
1
PP7605_RF
1
PP7606_RF
1
PP7607_RF
339S00199339S00201 ALTERNATE ALT WIFI/BT MODULEWLAN_RF
LBEE5W11GJ-943LGA
P2MM-NSM
AP_TO_BT_WAKE
NOSTUFF
SR_LVX
AOP_TO_WLAN_CONTEXT_B
50_WLAN_A_1
50_WLAN_A_0
BT_TO_PMU_HOST_WAKE
50_WLAN_G_0
3
1
UART_WLAN_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L
OMIT
2
X5R
UART_AP_TO_BT_TXD
I2S_AP_TO_BT_BCLK
PMU_TO_BT_REG_ON
JTAG_WLAN_SEL
CERM
7.5UF20%4V
LGALBEE5W11GJ-943
NP0-C0G
SYNC_MASTER=WIFI
JTAG_WLAN_TMS
UART_AP_TO_WLAN_RTS_L
AP_TO_BT_WAKE
I2S_BT_TO_AP_DIN
AOP_TO_WLAN_CONTEXT_A
VIN_LDO
UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX
PMU_TO_WLAN_REG_ON
JTAG_WLAN_TRST_L
JTAG_WLAN_TCK
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
I2S_AP_TO_BT_DOUT
50_WLAN_G_1
OMIT
OMIT
1
3
2
2
01005
0.01UF
X5R10%6.3V
WLAN WLAN
PP_VDD_MAIN
01005
PP1V8_SDRAM
OMITUART_BT_TO_AP_CTS_L
OMITSM
P2MM-NSM OMITSM
P2MM-NSM OMITSM
P2MM-NSMSM
OMIT
JTAG_WLAN_SEL
PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON
UART_BT_TO_AP_RXD
UART_AP_TO_BT_TXD
AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B
JTAG_WLAN_SEL
PP1V8_SDRAM
JTAG_WLAN_TRST_L
BT_TO_PMU_HOST_WAKE
JTAG_WLAN_TMS
JTAG_WLAN_TCK
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD
SR_LVX_1
SYNC_DATE=01/30/2014
PERENNIAL
0.01UF
WLAN
6.3V10%
01005
P2MM-NSM OMITSM
27PF
WLAN
16V5%
01005NP0-C0G
2 1
2 1
2 1
2 1
2 1
1
1
1
2 1
2 1
1
1
2 1
2 1
2 1
1
2 1
P2MM-NSM OMITSM
P2MM-NSM OMITSM
P2MM-NSM OMITSM
2 1
P2MM-NSM OMITSM
2 1
1
1
P2MM-NSM OMITSM
10K
WLAN
5%
01005MF1/32W
P2MM-NSM OMITSM
P2MM-NSM OMITSM
P2MM-NSM OMITSM
P2MM-NSM OMITSM
P2MM-NSMSM
P2MM-NSMSM
OMITSM
P2MM-NSM
SMOMITP2MM-NSM
P2MM-NSMSM
100PF
WLAN
16V5%
01005NP0-C0G
2.2UH-20%-0.68A-0.25OHM
0806
1
P2MM-NSM OMITSM
1
0402
10UF6.3V20%
0402-9CERM-X5R
P2MM-NSM OMITSM
27PF16V5%
1
1
P2MM-NSMSM
1
1
2 1
2 1
2 1
OMITSM
P2MM-NSM
P2MM-NSM OMITSM
2
2
2
2
1
2
2 1
2 1 2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2
2
2 1
2
2
2 1
2 1
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI
PP
IN
IN
IN
OUT
OUT
OUT
IN
IN
OUT
IN
BI
OUT
IN
IN
IN
OUT
IN
PP
PP
PP
IN
PP
IN
IN
OUT
PP
PP
PP
PP
PP
PP
PP
SYM 2 OF 2
THRM_PAD
GND
THRM_PAD
SYM 1 OF 2
JTAG_TMS
FAST_UART_CTS_IN
BT_DEV_WAKE
VBAT
_RF_
VCC
VBAT
_RF_
VCC
VBAT
_VCC
VBAT
_VCC
VDDI
O_1
P8V
BT_PCM_OUT
PCIE_RDPPCIE_RDN
WL_HOST_WAKE
PCIE_REFCLK_P
PCIE_TDNPCIE_TDP
PCIE_CLKREQ*PCIE_PERST*
PCIE_REFCLK_N
CXT_A/JTAG_TDICXT_B/JTAG_TDO
SR_VLX
VIN_LDO
LPO_IN
SECI_RXSECI_TX
WL_REG_ON
BT_REG_ON
JTAG_TRST*
JTAG_SELJTAG_TCK
WL_DEV_WAKE
FAST_UART_TXFAST_UART_RX
FAST_UART_RTS_OUT
5G_ANT_CORE05G_ANT_CORE1
BT_UART_RXDBT_UART_TXD
BT_UART_CTS*BT_UART_RTS*
BT_PCM_CLKBT_PCM_SYNC
BT_PCM_IN
BT_HOST_WAKE
2G_ANT_CORE02G_ANT_CORE1
PP
PP
PP
PP
PP
PP
PP
IO
IO
IN
PP
OUT
PP
IN
IN
IN
PP
IN
OUT
IN
OUT
IN
PP
BI
PP
2GHZ UAT
WIFI UPPER ANTENNA FEEDS
5GHZ UAT
61 OF 81
77 OF 77
8.0.0
051-00482
21
R7704_RF
31
2
W5BPF_RF
2
1 C7711_RF
2
1 C7729_RF
21
R7711_RF21
3
JUAT2_RF
2
1 C7709_RF
2
1 C7710_RF
21
R7702_RF
2
1 C7707_RF
2
1 C7708_RF
2
1 C7706_RF
21
R7703_RF
2
1 C7705_RF
OMIT
OMIT
NP0-C0G16V
OMIT_TABLE OMIT_TABLE
1/32W0%
MF01005
+/-0.1PF
50_UAT_WLAN_5G_WEST
2.4NH+/-0.1NH-0.370A50_UAT_WLAN_2G_EAST
0.6PF
OMIT_TABLE
01005
NP0-C0G
0.2PF
OMIT_TABLEWLAN_UP_RFFE01005
NOSTUFF
+/-0.1PF
16V+/-0.05PF
01005
1/32W
01005
WLAN_UP_RFFE
2
50_WLAN_A_0
50_UAT2_BPF50_UAT_WLAN_5G_BPF 50_UAT2_TEST 50_UAT2_M
WIFI FRONT-END [77]
LFB185G53CGZE200
16V+/-0.1PF
01005NP0-C0G
WLAN_UP_RFFE01005
0.001
MM8830-2600B
UP_RFFE
F-RT-SM
0.2PF
WLAN_UP_RFFE
16V+/-0.1PF
01005NP0-C0G
0.2PF16V+/-0.1PF
01005NP0-C0G
0.00
01005MF
1
2 0.00
0%
MF
1
5.15-5.85GHZ-1.2DB
0%
WLAN_UP_RFFE
CERM16V
WLAN_UP_RFFE01005NP0-C0G+/-0.1PF0.2PF
50_WLAN_G_0
OMIT_TABLE
WLAN_UP_RFFE
16VNP0-C0G
01005WLAN_UP_RFFE
OMIT OMIT
16V+/-0.1PF0.2PF
1 50_UAT_WLAN_5G_EAST
1/32W
0.2PF0.2PF
OMIT
OMIT
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI C R
GND
BI
BIBI
BI
PCIE
POWER
AOP
AUDIO
ANTENNA
AP CONNECTIONS
NFC
TUNER
DOCK
WLAN
DEBUG
BB CONTROL
MAV16 RADIO_MLB
ALTERNATES
ALL:C5616_RF-C5618_RF,C5632_RF-C5634_RF
BOM: 939-00826 SCH: 951-00964
AMUX
90_PCIE_BB_TO_AP_RXD_P
BB_TO_STROBE_DRIVER_GSM_BURST_IND
PP_VDD_BOOST
PMU_TO_BB_USB_VBUS_DETECT
AP_TO_BB_IPC_GPIO1
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N
PCIE_AP_TO_BB_RESET_L
SWD_AP_TO_MANY_SWCLK
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_LRCLK
90_USB_BB_DATA_N
BB_TO_LAT_GPO3
BB_TO_LAT_GPO2
BB_TO_LAT_GPO1
NFC_TO_BB_CLK_REQ
BB_TO_LAT_ANT_SCLK
BB_TO_LAT_ANT_DATA
AP_TO_ICEFALL_FW_DWLD_REQ
BB_TO_UAT_SCLK
BB_TO_UAT_DATA
PCIE_BB_BI_AP_CLKREQ_L
SWD_AOP_BI_BB_SWDIO
90_USB_BB_DATA_P
BB_TO_PMU_PCIE_HOST_WAKE_L
90_PCIE_BB_TO_AP_RXD_N
BB_TO_UAT_SCLK 14 7
BB_TO_LAT_ANT_SCLK 17 7
BB_TO_LAT_ANT_DATA 17 7
BB_TO_UAT_DATA 14 7
LCM_TO_MANY_BSYNC
AP_TO_BB_COREDUMP
AP_TO_BB_MESA_ON
62 OF 81
LAST_MODIFICATION=Wed Jun 29 12:06:01 2016
PMU: SWITCHERS AND LDOS
78
BOM_OMIT_TABLEPMU: CONTROL AND CLOCKS
LOWER ANTENNA & COUPLERS
TRANSCEIVER0/1: TX PORTS
DIVERSITY RECEIVE LNA'S
FDD TRANSMIT
BASEBAND: POWER2
7071
13
UPPER ANTENNA FEEDSPMU: ET MODULATORTEST POINTS & BOOT CONFIGTDD TRANSMIT
22
81
<SYNC_DATE3>
<SYNC_DATE4>
<SYNC_DATE5>
<SYNC_DATE27>
<SYNC_MASTER2>
BASEBAND: CONTROL
page1
BASEBAND GPIOS
2
3
4
6362
5
677
6
688
10
72
14
15
16
17
7677
757473
79
28
27
19
20
21
23
24
26
25
29
1
<SYNC_MASTER4>
<SYNC_MASTER3>
<SYNC_MASTER1>
80
18
<SYNC_MASTER5>
<SYNC_DATE2>
<SYNC_DATE1>
TRANSCEIVER0/1: POWER
11
666564
9
DIVERSITY RECEIVE ASM'S
RECEIVE MATCHINGTRANSCEIVER0/1: PRX PORTS
69
12
ICEFALL, SIM, DEBUG_CONN
30 <SYNC_DATE30>
SCH,MLB,D11
051-00482
2016-07-0600065328798 ENGINEERING RELEASED
1 OF 72
8.0.0
MAKE_BASE=TRUE
MAKE_BASE=TRUE
17
3
7
AP_TO_BB_TIME_MARK
7 17
17
BBPMU_TO_PMU_AMUX2
page1
page1
UPPDI_RF155S00235 NOLMBRF155S00234 ALTERNATE
353S00321 IC SWITCH SPDT353S00253 SWPMX_RFALTERNATE
335S0894 IC EEPROM335S00013 EPROM_RFALTERNATE
TRANSITION CAP138S00095138S00101 ALLALTERNATE
197S0565 197S0593
19P2 MHZ XTAL
19P2 MHZ XTAL
197S0593 Y5501_RFALTERNATE197S0598
Y5501_RFALTERNATE
6
7 17
7 17
7
7 17 20
3 17
6 17 20
6 20
7
14
15
12
12
14
15
20
17 20
17 20
17 20
20
7 20
7
17 20
3 17
7
7
7
17 20
7
6 17 20
7 17 20
7
7
7
7
6 20
3 7
6
6
6 17
6 17
7
7 17
7
3 20
3 17 20
3 4 16 20
4
3 20
3 17
4
4
7 17
6
BB_TO_AP_RESET_DETECT_L
BBPMU_TO_PMU_AMUX3
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
BBPMU_TO_PMU_AMUX1
PP_VDD_MAIN
AP_TO_BB_RESET_L
UART_AOP_TO_BB_TXD
I2S_AP_TO_BB_DOUT
UART_BB_TO_WLAN_COEX
BUFFER_GPO2
ICEFALL_LDO_ENABLE
SE2_PWR_REQ
BUFFER_GPO1
PP1V8_SDRAM
SE2_PRESENT
SE2_READY
NFC_SWP_MUXNFC_SWP
50_UAT1_TUNER
50_UUAT_LB_MLB_NORTH
50_UAT_MB_HB_SOUTH
50_UAT_LB_MLB_SOUTH
50_UAT_WLAN_2G_WEST_PLEXER
50_UAT1_WEST
BB_TO_NFC_CLK
UART_WLAN_TO_BB_COEX
I2S_BB_TO_AP_DIN
UART_BB_TO_AOP_RXD
PP_VDD_BOOST
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
4 20
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
DATESYNCCONTENTSCSAPAGE
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IO
OUT
IN
OUT
OUT
OUT
IN
IN
OUT
OUT
IO
IN
OUT
IN
OUT
IN
IN
IO
IO
IO
IO
OUT
IO
IO
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
LMBRF:
BOM OPTIONS:NOLMBRF:
D11 SPECIFIC:
D10 SPECIFIC:
LMBRF1 C7501_RF
C7523_RF1138S0739
LMBRF1138S0739 CAP,1UF,0201
CRITICAL1 LMBRF138S00032 CAP,2.2UF,0201
LMBRF1353S00026 CRITICALLDO,BGA,2X2
LMBRFCRITICAL1131S0630
LMBRFCRITICAL1
CRITICAL LMBRF
LMBRF1 CRITICAL
152S2006 1 LMBRFCRITICAL
MLBPA_RFMLB PAD CRITICAL LMBRF
117S0002 LMBRF
CRITICAL1
353S00627 CRITICAL1 MLB LNA LMBRF
138S00032 1 CAP,2.2UF,0201 LMBRFCRITICAL
C7528_RF LMBRF
155S00158 1 LMBRFCRITICAL
RES,MF,4.99K OHM,01005118S0643 1 CRITICAL LMBRF
MLB LNA OUTPUT MATCH LMBRFR6710_RF CRITICAL1
155S00139 PENTAPLEXER LMBRF1 CRITICAL
155S00193 1 LMBRFCRITICAL
C7201_RF138S0739 LMBRF1
1 SE2_RF
CAP,100PF,010051 LMBRF131S0217 CRITICAL
1118S0627 RES,10KOHM,01005
LMBRFCRITICAL1131S0341
LMBRF1131S0630 CRITICAL
152S2006 1 CRITICAL LMBRF
1 CRITICAL LMBRF
IND,1.3NH,1.1A,02011 CRITICAL LMBRF
1 LMBRFCRITICAL152S2000
CRITICAL LMBRF
LMBRF1
CRITICAL1118S0724
RES,MF,0OHM,1/20W,0201 CRITICAL LMBRF1118S0724
1 CRITICAL LMBRF131S00001
1131S0341 LMBRFCRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL LMBRF
LMBRF
C7524_RF
RES,MF,0OHM,1/20W,0201
IND,FILM,6.2NH,3%,400MA,UH-Q,0201
CAP,1UF,0201
CAP,1UF,0201
337S00284
CAP,1UF,0201
132S0316
138S0739 1
CAP,0.1UF,01005
CAP,CER,NPO/COG,27PF,2%,16V,01005
IND,FILM,6.2NH,3%,400MA,UH-Q,0201
CAP,CER,NPO/COG,27PF,2%,16V,01005
117S0002
1
1
LMBRFCRITICAL
CAP,CER,C0G,HQ,0.6PF,+/-0.05PF,25V,0201131S0363
152S2042
FLTR,DIPLEXER,LB-MB/HB,MIRROR,0805
IC,SECURE ELEMENT,BCM20211,WLBGA25
C6348_RF
L6322_RF
1131S0275
152S2002
RES,MF,0OHM,1/20W,0201
1
IND,2.7NH,+/-0.1NH,600MA,0201,UH-Q R6605_RF
131S0337
118S0724
C6416_RF
R6606_RF
C6610_RF
R6703_RF
C7119_RF
R7104_RF
R6404_RF
C6106_RF
C6306_RF
L6305_RF
C6315_RF
C6345_RF
SE2LDO_RF
R7512_RF
C7531_RF
C7530_RF
C7529_RF
MLBLN_RF
FLTR,DIPLEXER,LB-MB-HB,DPX,SHIELD,0805
CAP,CER,COG,3.0PF,+/-0.05,25V,0201,HI-Q
R6708_RF
CAP,CER,0.1PF,25V,0201
IND,2.0NH,600MA,0201
152S2051
131S0630
353S00723
MLB PAD LAT OUTPUT MATCH
MLB PAD UAT OUTPUT MATCH
UPPDI_RF
UATDI_RF
R7506_RF
PPLXR_RF
R7106_RF
R7105_RF
LMBRF
CRITICALC7123_RF
CAP,CER,C0G,0.3PF,+/-0.1PF,25V,0201,HQ
118S0608 1 R5911_RF LMBRFCRITICAL
C6613_RFIND,10NH,3%,250MA,HI-Q,0201 CRITICAL LMBRF1152S1356
RES,MF,1K OHM,1%,1/32W,01005
CAP,1.5PF,+/-0.05PF,25V,0201,HQ
CAP,CER,NPO/COG,27PF,2%,16V,01005
CAP,CER,COG,3.0PF,+/-0.05PF,25V,0201,HI-Q
CRITICAL
LMBRF
CRITICAL 152S2020 L6320_RFDCS/PCS RX FILTER MATCH CRITICAL NOLMBRF1
DCS/PCS RX FILTER MATCH1 R6301_RF131S0444 CRITICAL NOLMBRF
155S00149 GSMRX_RF NOLMBRFDCS/PCS RX FILTER CRITICAL1
DCS/PCS RX MATCH (DCS) C6332_RF CRITICAL131S0319 NOLMBRF1
DCS/PCS RX MATCH (DCS) L6318_RF NOLMBRFCRITICAL152S2005 1
DCS/PCS RX MATCH (DCS)131S0630 C6340_RF CRITICAL NOLMBRF1
1 DCS/PCS RX MATCH (DCS) C6341_RF CRITICAL131S0630 NOLMBRF
DCS/PCS RX MATCH (DCS) L6319_RF NOLMBRF152S2005 1 CRITICAL
DCS/PCS RX MATCH (DCS) C6333_RF CRITICAL NOLMBRF1131S0385
155S00163 1 QUADPLEXER PPLXR_RF NOLMBRFCRITICAL
1 NOLMBRFCRITICALUPPDI_RF155S00234 FLTR,DPX,PASS THRU,LB-MB-HB,UNSHLD,0805
155S00199 FLTR,DPX,PASS THRU,LB-MB-HB,SHLD,0805 CRITICALUATDI_RF1 NOLMBRF
1118S0724 RES,MF,0OHM,1/20W,0201 R6404_RF CRITICAL NOLMBRF
18PF,0201,25V CRITICALR6708_RF131S0549 1
1.2NH,+/-0.05NH,1.1A,UH-Q,0201152S00157 1 R6703_RF NOLMBRFCRITICAL
152S2044 IND,2.2NH,+/-0.1NH,600MA,0201 NOLMBRF1 R7104_RF CRITICAL
CAP,CER,12PF,5%,25V,0201,HI-Q NOLMBRF1 CRITICAL131S0445
CRITICAL
1
C7120_RF D10131S0278 1
131S0425 CAP,CER,COG,0.5PF,+/-0.05PF,25V,0201,HI-Q
CAP,CER,COG,1PF,+/-0.1PF,25V,0201,HI-Q
D11CRITICAL
NOLMBRF
C7120_RF
R6606_RF
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
1245678
B
D
8 7 6 5 4 3
C
B
A
C
A
D
2 1
3
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
124K102K82.5K 51.1K
51.1K51.1K DEV5
REVISIONDEV1
CARRIER
DEV 2.1
PMU: CONTROL AND CLOCKS
HW_REV_ID
51.1K51.1K
DEV4
PVTDVT
6.34K1.60V200K40.2K1.50V51.1K
51.1K14.7K1.40V
0.10V0.20V
255K51.1K
T181PP/P1
DEV 3
DEV2
REV_ID
MPPS AND GPIOS: PMU
R5501R5505887K
EVT ALT/CARBONDEV639.0K1.30V
63.4K51.1K
82.5K
100K
180K
P2
XTAL AND CLOCK: PMU
51.1K
RESET AND CONTROL: PMU
PCIE PERST OPTION
PCIE PERST OPTION
GND_XO_CLK: VIA DOWN TO GND PLANE
EVT
51.1K
51.1K
422K
51.1K EVT DOE
0.30V
50.0K 100K
63.4K
1.20V1.10V1.00V0.90V0.80V0.70V
0.40V0.50V0.60V
51.1K
64 OF 81
PCIE_AP_TO_BB_RESET_L
PP_VDD_MAIN
LCM_TO_MANY_BSYNC
NFC_TO_BB_CLK_REQPMU_TO_BB_USB_VBUS_DETECT
55 OF 72
8.0.0
051-00482
2
1R5501_RF
2
1R5505_RF
21
R5511_RF
2
1R5503_RF
6555
76
72
7766
45
41
71
5635
BBPMU_RF
888320
49
615113
383237211526
BBPMU_RF
62574636
BBPMU_RF
3125
43
8263
75 4252
98
67
58
53
BBPMU_RF
2
1 C5501_RF
4
3
2
1
Y5501_RF
21R5504_RF
21R5502_RF
2
1 C5502_RF
20.0K
AP_TO_BB_RESET_L
RADIO_PMIC
6
MAKE_BASE=TRUE
PP_VDD_MAIN
SPMI_CLK
SIM1_REMOVAL_ALARM
PCIE_AP_TO_BB_PERST_PMU_L
SHIELD_MDM_19P2M_CLK
50_MDM_PCIE_CLK
BB_TO_NFC_CLK
SHIELD_WTR_19P2M_CLK
SHIELD_SLEEP_CLK_32KXTAL_19P2M_OUT
XTAL_19P2M_IN
XO_THERM
XTAL_19P2M_OUT
PP_1V8_LDO7
VREF_DAC_BIAS
SPMI_DATA
XTAL_19P2M_IN
XO_THERM
XO_OUT_D0_EN
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
PMIC_RESOUT_L
PS_HOLD_PMIC
HW_REV1_ID
PP_1V8_LDO7
PAGE_TITLE=PMU: CONTROL AND CLOCKSSYNC_DATE=04/17/2015
RADIO_PMIC01005X5R-CERM
1000PF6.3V10%
RADIO_PMIC01005
0.1UF6.3VX5R-CERM20%
17 6
RADIO_PMIC
100K1%1/32WMF01005
2.0X1.6-SM
RADIO_PMIC
19.2MHZ-10PPM-7PF-80OHM
6
17 6
17 1
17 7
20 17 1
17 6
17 1
17 6
17 6
5%1/32W01005
MF
1.00K
MF
010051/32W1%
RADIO_PMIC
20 1
6
17 6
1%
MF1/20W
0201
0.007 1
20 17 1
9
17 1
PMD9645WLNSP
RADIO_PMIC
WLNSP
RADIO_PMIC
WLNSPPMD9645
RADIO_PMIC
PMD9645
RADIO_PMIC
WLNSP
1
5 4 3
VDDPX_BIAS_UIM2
PMD9645
PS_HOLD
MF1/32W1%6.34K
01005
5
MF1/32W1%51.1K
01005
20 16 4 1
3
3
3
3 3
3
5 4 3
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IN
OUT
OUT
IN
IN
NCOUT
OUT
IN
OUT
IN
BI
BI
IN
IN
OUT
IN
NC
NC
NC
IN
OUT
OUT
NC
CLOCK
SYM 2 OF 5BB_CLK_EN
XO_THERMGND_XOADC
XTAL_19M_INXTAL_19M_OUTGND_XO_CLK
LN_BB_CLKBB_CLK
RF_CLK1RF_CLK2
SLEEP_CLK
GPIO_MPPSYM 3 OF 5
PA_THERM2PA_THERM1
GPIO_06GPIO_05GPIO_04GPIO_03GPIO_02GPIO_01
MPP_06MPP_05MPP_04MPP_03MPP_02MPP_01
GNDSYM 5 OF 5
GNDGNDGNDGNDCONTROL
SYM 1 OF 5
GND
GND
CBL_PWR*PON_1
SPMI_CLKSPMI_DATA
OPT_1OPT_2
BAT_ID_THERMPS_HOLDPON_RST*RESIN*
IN
MDM PLL
MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL
MDM LOW VOLTAGE USB
MDM HIGH VOLTAGE USB
1.16V/1951MA
1.80V/15MA
1.80V/52MA
1.00V/610MA1.20V/569MA1.23V/124MA
1.80V/366MA
1.00V/88MA
2.70V/5MA1.80V/60MA
1.11V/1253MA
1.80V/60MA
1.80V/245MA
2.70V/62MA
3.20V/15MA
1.80V/133MA
MDM EBI1, DDR CORE
MDM HIGH VOLTAGE ANALOG
MDM LOW VOLTAGE ANALOG
MDM CORE
GPS LNA
UIM2
RF_CLK_GND
VIA XW DOWN TO THE GND PLANE
XO_GND
PLACE XW CLOSE TO PMU
VIA XW DOWN TO THE GND PLANEPLACE XW CLOSE TO PMU
PLACE C5635 AND C5636 NEAR THE PMU
DESENSE CAPS
CORE
1.85V/1241MA
1.01V/1059MA
0.90V/2685MA
1.25V/693MAXO SHUTDOWN: ON
XO SHUTDOWN: OFF
XO SHUTDOWN: BYP
XO SHUTDOWN: OFF
XO SHUTDOWN: BYP
XO SHUTDOWN: ON
XO SHUTDOWN: BYP
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: ON
XO SHUTDOWN: OFF
XO SHUTDOWN: ON
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: BYP
XO SHUTDOWN: OFF MDM MODEM
PMU: SWITCHERS AND LDOS
UIM1
FRONT END SUPPLY
RFFE VIO
MDM PCIE
MEMORY
SWITCHERS BULK CAPS
XO SHUTDOWN: ON
XO SHUTDOWN: ON HIGH VOLTAGE LDOS
LOW VOLTAGE LDOS
XO SHUTDOWN: ON MDM MEMORY, MDM USB
051-00482
8.0.0
65 OF 81
56 OF 72
GND4
GND4
GND4
GND4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
GND4
GND4
PP_VDD_MAIN4
PP_VDD_MAIN4
PP_VDD_MAIN4
BBPMU_TO_PMU_AMUX24
BBPMU_TO_PMU_AMUX3
GND4
GND4
PP_VDD_MAIN4
GND4
GND
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
PP_VDD_MAIN 4
BBPMU_TO_PMU_AMUX34 8
BBPMU_TO_PMU_AMUX24
BBPMU_TO_PMU_AMUX14 5
PP_VDD_MAIN4
GND 4
GND 4
GND 4
GND 4
GND 4
BBPMU_TO_PMU_AMUX3
BBPMU_TO_PMU_AMUX2 4
BBPMU_TO_PMU_AMUX1
2
1 C5607_RF
2
1 C5605_RF
21
L5604_RF
21
L5602_RF
21
L5605_RF
2 1
L5603_RF
2
1 C5634_RF
2
1 C5633_RF
2
1 C5632_RF
2
1 C5631_RF
2
1 C5618_RF
2
1 C5617_RF
2
1 C5616_RF
2
1 C5615_RF
2
1
XW5617_RF
2
1
XW5616_RF
2
1 C5604_RF
2
1 C5636_RF
2
1 C5635_RF
2
1
XW5615_RF2
1
XW5614_RF
2
1 C5602_RF
2
1R5601_RF2
1 C5629_RF
2
1 C5630_RF
99
2
6459
97
272211
34
87
12
69
91
10
60
3010196859584100291831948398180
78
4790
24
94
8
70
10392
165
73
89
23
14
44
86
79
40
93
71
5449
102
332817
6
50
68
74
BBPMU_RF
2
1 C5620_RF
2
1 C5608_RF2
1 C5627_RF
2
1 C5626_RF
2
1 C5609_RF
2
1 C5628_RF
2
1 C5610_RF
2
1 C5612_RF
2
1 C5611_RF
2
1 C5613_RF
2
1 C5614_RF
2
1 C5603_RF
21
L5601_RF
2
1 C5625_RF
2
1 C5601_RF
2
1 C5621_RF
2
1 C5622_RF
2
1 C5623_RF
2
1 C5624_RF
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PP_VDD_MAIN
MAKE_BASE=TRUEPP_VDD_MAIN
MAKE_BASE=TRUEPP_VDD_MAIN
MAKE_BASE=TRUEPP_VDD_MAIN
AVDD_BYP_GND
VREG_XO_GND
MDM_VREF_LPDDR2
PP_1V225_SMPS2
AVDD_BYP
REF_BYP
PP_VDD_BOOST
VDD_OTP
GND_REF
PP_VDD_MAIN
PP_VDD_MAINMAKE_BASE=TRUE
MAKE_BASE=TRUE
PP_VDD_MAIN
VREG_XO
VREG_RF_CLK_GND
VREG_RF_CLK
VREG_RF_CLK
MAKE_BASE=TRUE
MAKE_BASE=TRUE
VREG_XO_GND
VREG_XO
BBPMU_TO_PMU_AMUX3
BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2
VREG_RF_CLK_GND
PP_VSW_S4
PP_0V95_LDO4
PP_1V8_LDO6
VDD_SIM1
PP_VSW_S2
PP_1V2_LDO2
PP_1V8_LDO8
VDD_SIM2
PP_0V9_LDO3
PP_1V8_LDO15
PP_2V7_LDO12
PP_3V075_LDO10
PP_1V0_LDO9
PP_1V8_LDO7
PP_1V7_LDO5
PP_VSW_S5
PP_1V5_LDO1
PP_1V8_LDO14
PP_1V0_SMPS5
PP_VSW_S3
PP_1V225_SMPS2
PP_VSW_S1
PAGE_TITLE=PMU: SWITCHERS AND LDOS
SYNC_DATE=04/17/2015
19 18 16 14 13 12 7
6
5
8 4
RADIO_PMIC0402
15UF
CERM6.3V20%
20 16 4 3 1
5 4
8 4
20 16 4 3 1
5
5
8
5
5
5 3
5
5
5
20 16 4 3 1
20 5
14
13 12
5
10
20 16 4 3 1
RADIO_PMIC
15UF20%6.3VCERM0402
RADIO_PMIC
X5R20%1UF10V
0201
1UF10VX5R0201RADIO_PMIC
20%
2.2UH-20%-0.14OHM-1.6A
0806RADIO_PMIC
2.2UH-20%-0.14OHM-1.6A
0806RADIO_PMIC
1.0UH-20%-2.7A-0.056OHM
RADIO_PMIC0806
RADIO_PMIC0806
1.0UH-20%-2.7A-0.056OHM
6.3VX5R
25UF20%
0402
25UF
0402
6.3V20%
X5R
0402
6.3V20%25UF
X5R
0402
6.3V
20UF20%
CERM-X5R
25UF
X5R
20%6.3V
0402
25UF6.3V
0402
20%
X5R
0402
6.3V20%25UF
X5R
0402
6.3VCERM-X5R
20UF20%
SHORT-10L-0.1MM-SM
OMIT
SHORT-10L-0.1MM-SM
OMIT RADIO_PMIC0402
6.3V10UF20%CERM-X5R
01005CERM16V2%27PF100PF
01005NP0-C0G16V5%
20 16 4 3 1
SHORT-10L-0.1MM-SM
OMIT
SHORT-10L-0.1MM-SM
OMIT
20 16 4 3 1
0.47UF
0201
6.3VCERM-X5R
10%
20%20UF6.3VCERM-X5R0402
15UF20%6.3V
0402CERM
RADIO_PMIC
PMD9645WLNSP
RADIO_PMIC
1
1
1
0402RADIO_PMIC
15UF6.3V20%CERM
X5R-CERM120%4.7UF
RADIO_PMIC
6.3V
402
RADIO_PMIC
CER-X5R01005
0.1UF10%6.3V
RADIO_PMIC
10UF
CERM-X5R6.3V20%
0402
0201X5R10V1UF
RADIO_PMIC
20%
RADIO_PMIC
20%10V1UF
X5R0201
20%1UF10V
0201X5R
RADIO_PMIC
20%1UF
RADIO_PMIC0201
10VX5R
1UF20%
RADIO_PMIC0201
10VX5R
RADIO_PMIC
20%10V1UF
X5R0201
1UF10VX5R0201RADIO_PMIC
20%
43UF20%
0603X5R4V
20 16 4 3 1
RADIO_PMIC
1UF
X5R20%
0201
10V
RADIO_PMIC
20%X5R10V1UF
0201
1UH-20%-0.054OHM-3.4A
RADIO_PMIC2520
RADIO_PMIC
CERM
15UF6.3V20%
0402
0.001/32WMF
0%
01005
RADIO_PMIC
0402
20%15UF6.3VCERM
4
4
4
4
4
4
4
4
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
POWER
SYM 4 OF 5
GND_S1GND_S1
VDD_S1VDD_S1
VREG_L10VREG_L11
VREG_L4_16
VREG_S1VSW_S1
VSW_S1VSW_S1
VSW_S2VREG_S2
VREG_S3VSW_S3VSW_S3
VREG_S4VSW_S4
VREG_L1
VSW_S5VREG_S5
VREG_L2VREG_L3
VREG_L7
VREG_L5
VREG_L12VREG_L13
GND_XOVREG_XO
VREG_L15VREG_L14
GND_RF_CLKVREG_RF
GND_S1GND_S1
VDD_S3
GND_S2
VDD_S4
GND_S3
GND_S4GND_S4
GND_S3
VDD_S2VDD_S2
VDD_S5GND_S5
VDD_L9
VDD_L1_2_16
VDD_L3_4
VDD_L5_6_15
VDD_L7_8
VDD_OTP
REF_BYP
GND_REF
VIN_VPH1VIN_VPH2
VREF_DDR
AVDD_BYP
VDD_XO_RF
VREG_L6
VREG_L9VREG_L8
OUT
OUT
OUT
IN
BASEBAND: POWER
(PP_UIM1_LDO11)
(PP_UIM2_LDO13)
(MODEM SUB MEMORY)
(MSM CORE)
(MSM MODEM)
66 OF 81
57 OF 72
051-00482
8.0.0
BBPMU_TO_PMU_AMUX14 5
BBPMU_TO_PMU_AMUX14 5
2
1 C5755_RF
2
1 C5752_RF
2
1 C5701_RF
2
1 C5702_RF
2
1 C5703_RF
2
1 C5726_RF
2
1 C5723_RF
2
1 C5720_RF
2
1 C5727_RF
2
1 C5728_RF
2
1 C5724_RF
2
1 C5721_RF
2
1 C5725_RF
2
1 C5722_RF
2
1 C5717_RF
2
1 C5714_RF
2
1 C5711_RF
2
1 C5718_RF
2
1 C5715_RF
2
1 C5719_RF
2
1 C5716_RF
2
1 C5712_RF
2
1 C5713_RF
2
1 C5708_RF
2
1 C5705_RF
2
1 C5709_RF
2
1 C5706_RF
2
1 C5710_RF
2
1 C5707_RF
Y8Y4V6V1U9U23U17U15U10T7T23T17T16T15
T14T11T10R7R18R17R12R11P9P8P18P17P13P12P1N9N6N18N17N16N15N14N13N10M7M6M18M14M11M10L8L7L23L16L12L11K9K8K17K16K13K12K1J9J6J22J17J16J10H7
H6H23H19H18H17H12H11G23G19G15G14G13G10F23F17F16F15F14F11E9E8E6
E23E22E21E18E16E15E14D23D21
D2C9C4
C21C20
C2C16C11
C1B5
B22B21B20B19B13AB9AB7AB5
AB23AB21AB15AB10
AB1AA5
A9A7A6A4
A23A22
A2A17A15A12A11
A1
BB_RF
T9T8T13R9R8R14R13R10P14P11P10N8N11M9M8L9L6L14L13L10K7K6K14K11K10J11G7F8F7
V18U6
U18U13U12U11
T6T18T12P7P6N7
N12M13M12L18L17K18
J8J7
J15J14J13J12H9H8
H14H13H10G18F19F18E19
V17V16
U8U7
U16R16R15P16P15M17M16M15L15K15J19J18H16H15G9G8
G17G16G12G11
F9F13F12
BB_RF
2
1 C5754_RF
2
1 C5735_RF2
1 C5753_RF
V11AA10
V9
Y20U21
AA3W3
AB3
F10
P19E13
Y7Y6Y5
M19AB11
AA15
AA21
P2K2E2
AB16AA23
R23
Y2W2
U22T22M22L22H22G22D22C22
U1K23E1B23
W1J23D1C23AA1
U14
E17E7
E3C7C6C18
C15C12
B18
B15
B12
E10B10
B8
B7
B3
BB_RF
2
1 C5745_RF
2
1 C5704_RF
2
1 C5750_RF
2
1 C5741_RF
2
1 C5731_RF
2
1 C5732_RF
2
1 C5740_RF
2
1 C5737_RF
2
1 C5734_RF
2
1 C5749_RF
2
1 C5747_RF
2
1 C5748_RF
2
1 C5751_RF
2
1 C5746_RF
2
1 C5744_RF
2
1 C5743_RF
2
1 C5738_RF
2
1 C5730_RF
2
1 C5729_RF
2
1 C5733_RF
2
1 C5736_RF
2
1 C5739_RF
2
1 C5742_RF
PP_1V0_LDO9
PP_1V0_LDO9
PP_1V0_SMPS5
PP_1V0_SMPS5
VDD_SIM2
PP_3V075_LDO10
PP_1V8_LDO8
PP_0V95_LDO4
PP_1V8_LDO6
PP_1V8_LDO7
PP_1V7_LDO5
PP_1V0_LDO9
VDDPX_BIAS_UIM2
PP_0V95_LDO4
VDD_SIM1
PP_1V8_LDO7
PP_1V5_LDO1
PP_1V8_LDO6
PP_1V8_LDO6
PP_1V2_LDO2
PP_1V2_LDO2
PP_1V8_LDO6
SYNC_DATE=04/17/2015
PAGE_TITLE=BASEBAND: POWER2
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMIC0201-1X5R-CERM
2.2UF20%6.3V
RADIO_PMIC
20%2.2UF
X5R-CERM6.3V
0201-1RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMICNOSTUFF
0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMIC
X5R-CERM0201-1
20%6.3V2.2UF
0201-1
6.3VX5R-CERM20%2.2UF
RADIO_PMIC
2.2UF
RADIO_PMIC0201-1
20%6.3VX5R-CERM
6.3V
RADIO_PMIC0201-1
20%2.2UF
X5R-CERM
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMIC0201-1
6.3VX5R-CERM20%2.2UF2.2UF
6.3V
RADIO_PMIC
20%
0201-1
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
2.2UF20%X5R-CERM6.3V
0201-1RADIO_PMIC RADIO_PMIC
0201-1X5R-CERM6.3V20%2.2UF
RADIO_PMIC
2.2UF20%X5R-CERM6.3V
0201-1RADIO_PMIC0201-1X5R-CERM
2.2UF6.3V20%
RADIO_PMIC
X5R-CERM0201-1
6.3V2.2UF20%
RADIO_PMIC
X5R-CERM20%2.2UF6.3V
0201-1
6.3VX5R-CERM
2.2UF20%
0201-1RADIO_PMIC
15UF
RADIO_BB
CERM0402
6.3V20%
RADIO_BB
15UF
CERM0402
6.3V20%
CERM
RADIO_BB
15UF
0402
6.3V20%
X5R-CERM
2.2UF4V20%
0201RADIO_BB
X5R-CERM
2.2UF20%4V
0201RADIO_BB
4VX5R-CERM
2.2UF20%
0201RADIO_BB
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM
2.2UF
0201
20%4V
2.2UF20%
0201X5R-CERM
RADIO_BB
4V
RADIO_BB
X5R-CERM0201
2.2UF20%4V
RADIO_BB
4VX5R-CERM0201
2.2UF20%
4VX5R-CERM
2.2UF20%
0201RADIO_BB
X5R-CERM
2.2UF20%4V
0201RADIO_BB
X5R-CERM
2.2UF4V20%
0201RADIO_BB
4V
RADIO_BB
X5R-CERM0201
2.2UF20%
RADIO_BB
X5R-CERM0201
2.2UF20%4V
RADIO_BB
4VX5R-CERM0201
2.2UF20%
RADIO_BB
X5R-CERM0201
2.2UF20%4V
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM4V2.2UF20%
0201X5R-CERM4V2.2UF20%
0201RADIO_BB
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM
2.2UF4V
0201
20%
RADIO_BB
X5R-CERM4V
0201
2.2UF20%
RADIO_BB
X5R-CERM4V
0201
2.2UF20%
MDM9645BGA
MDM9645BGA
RADIO_PMIC
X5R-CERM0201-1
6.3V2.2UF20%
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
RADIO_PMIC0201-1
6.3VX5R-CERM
2.2UF20%
MDM9645BGA
RADIO_PMIC0201-1X5R-CERM
2.2UF20%6.3V
X5R-CERM
NOSTUFFRADIO_PMIC0201-1
6.3V2.2UF20%
X5R-CERM
0.1UF
RADIO_PMIC01005
6.3V20%
RADIO_PMIC01005
NOSTUFF
0.1UF4V20%X5R
5 4
5 4
5 4
5 4
4
4
4
5 4
20 17 7 6 5 4
5 4 3
4
5 4
3
5 4
20 4
5 4 3
4
20 17 7 6 5 4
20 17 7 6 5 4
5 4
5 4
20 17 7 6 5 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
NC
SYM 8 OF 8
GND
GND
GNDGND
GNDGNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GND
GNDGNDGND
GND
GNDGNDGNDGND
GNDGND
GND
GNDGND
GNDGND
GNDGND
GNDGND
GND
GNDGND
GND
GNDGNDGND
GND
GNDGND
GNDGNDGND
GNDGND
GNDGNDGND
GND
GND
GND
GND
GND
GNDGNDGNDGNDGND
GNDGND
GNDGND
GND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGNDGND
GNDGNDGNDGNDGND
GNDGND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGNDGNDGNDGNDGND
SYM 6 OF 8PWR1
VDD_CORE
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEM
VDD_MODEMVDD_MODEM
VDD_MODEM
VDD_MODEMVDD_MODEM
VDD_MODEMVDD_MODEM
VDD_MODEMVDD_MODEM
VDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEMVDD_MODEM
VDD_COREVDD_COREVDD_CORE
VDD_COREVDD_CORE
VDD_COREVDD_CORE
VDD_COREVDD_COREVDD_CORE
VDD_COREVDD_CORE
VDD_COREVDD_COREVDD_CORE
VDD_CORE
VDD_COREVDD_COREVDD_COREVDD_COREVDD_COREVDD_COREVDD_COREVDD_CORE
VDD_COREVDD_CORE
VDD_MEMVDD_MEM
VDD_MEMVDD_MEM
VDD_MEMVDD_MEMVDD_MEM
VDD_MEMVDD_MEM
VDD_MEM
VDD_MEMVDD_MEM
VDD_MEM
VDD_MEMVDD_MEM
VDD_MEMVDD_MEMVDD_MEM
VDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEMVDD_MEM
NCNCNC
SYM 7 OF 8PWR2
VDD_A2VDD_A2
VDD_A1VDD_A1
VDD_A2
VDD_A1VDD_A2VDD_A1VDD_A2
VDD_ALWAYS_ON
VDD_PLL
VDD_USB_HS_MX
VDD_A2VDD_A2VDD_A2
VDD_A3VDD_A3
VDD_DDR_CORE_1P2
VDD_A1VDD_A2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P8VDD_DDR_CORE_1P8VDD_DDR_CORE_1P8VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P2VDD_DDR_CORE_1P2VDD_DDR_CORE_1P2
VREF_SDCVREF_UIM
VDD_PLL
VDD_QFPROM_PRG
VDD_P1VDD_P1VDD_P1
VDD_P1VDD_P1
VDD_P2
VDD_P3
VDD_P1VDD_P1VDD_P1
VDD_P3VDD_P3
VDD_P1VDD_P1
VDD_P4
VDD_P3VDD_P3
VDD_P5
VDD_USB_HS_1P8VDD_USB_HS_3P3
VDD_P7
VDD_USB_SS_0P9VDD_USB_SS_1P8
VDD_USB_SS_0P9
VDD_P7
VDD_PCIE_1P8
VDD_PCIE_0P9VDD_PCIE_0P9
BASEBAND: CONTROL AND INTERFACES
NOSTUFF AT CARRIER
PLACE
TO U12CLOSE
CLOSEPLACE
TO AA10
TO E1 TO T3CLOSE CLOSEPLACE PLACE
67 OF 81
58 OF 72
8.0.0
051-00482
SWD_AP_TO_MANY_SWCLK1 20
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N
90_USB_BB_DATA_N
90_USB_BB_DATA_P
SWD_AOP_BI_BB_SWDIO1 20 2
1R5807_RF2
1 C5804_RF
4
51
3
2
U5801_RF
2
1 C5801_RF
2
1R5806_RF AB2AA2
AA4AB4
Y1
Y9
V10Y10
AA9
AB6AA6
AA8AB8
AA7
V8V7
BB_RF
C19C13
A13A14
C14B14
A16B16
C17B17
J21H21F22F21
E12
E11
A18A19
A20A21
Y3G6G1F6F1
B11
B1
C3
A5
B6
C8
A10
C10
B2
A3
B4
C5
A8
B9
BB_RF
K22
U5K21G21
V5D3
BB_RF
U19W22
V21V22
W23
V19
AB18Y17
T2
R22R19T19T21V23R21
V2V3 U2
T3R6
U3F2
BB_RF
2
1R5803_RF
2
1R5802_RF
2
1R5801_RF
SHIELD_XCVR0_DRX_CA2_Q
SHIELD_XCVR1_DRX_I
SHIELD_XCVR0_DRX_CA2_I
SHIELD_XCVR0_PRX_CA2_Q
XO_OUT_D0_EN
SHIELD_SLEEP_CLK_32K
SHIELD_XCVR0_PRX_CA2_I
PP_1V8_LDO6 MDM_VREF_LPDDR2EBI1_CAL
BDM_CAL
PCIE_CAL_RES
50_MDM_PCIE_CLK
BB_USB_TRXTUNE
SHIELD_XCVR0_TX_FB_RX_I
SHIELD_ET_DAC_N
SHIELD_ET_DAC_P
SHIELD_XCVR0_TX_FB_RX_Q
SHIELD_GPS_RX_I
SHIELD_XCVR0-1_TX_Q_P
PS_HOLD
SPMI_CLK
VREF_DAC_BIAS
SHIELD_XCVR0_PRX_CA1_I
SHIELD_XCVR0_PRX_CA1_Q
SHIELD_XCVR0_DRX_CA1_Q
SHIELD_XCVR0_DRX_CA1_I
SHIELD_XCVR1_DRX_Q
SHIELD_XCVR1_PRX_I
SHIELD_XCVR1_PRX_Q
SHIELD_GPS_RX_Q
SHIELD_XCVR0-1_TX_Q_N
SHIELD_XCVR0-1_TX_I_N
SHIELD_XCVR0-1_TX_I_P
PMIC_RESOUT_L
SHIELD_MDM_19P2M_CLK
SPMI_DATA
BB_JTAG_RST_L
SWD_AP_TO_BB_CLK_BUFFER
PP_1V8_LDO6
SWD_AP_TO_BB_CLK_BUFFER
PAGE_TITLE=BASEBAND: CONTROL
SYNC_DATE=04/17/2015
20 17 1
17 1
17 1
17 3
20 17
5%1.00K1/32WMF01005
SOT1226
NOSTUFF
74AUP1G34GX
X5R-CERM01005
6.3V20%0.1UF
1%
MF1/32W
01005
4.02K
BGAMDM9645
10 9
10 9
10
10
9
9
9
9
16
16
BGAMDM9645
10
10
10
10
10
10
10
10
10
10
10
10
3
MDM9645BGA
3
17 3
17 3
17 3
17 3
3
17 3
BGAMDM9645
1.43K1%
01005RADIO_BB
1/32WMF
RADIO_BB01005
2401%1/32WMF
RADIO_BB
MF
2401/32W1%
01005
1
1
1
1
0201
10%10VX5R-CERM
0.1UF
RADIO_BB
20 17 1
20 17 7 6 5 4 4
17 6
20 17 7 6 5 4
17 6
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
BI
IN
IN
IN
NCNC
NC
NCIN
NCNC
NC
NC
NC
NCNC
NCNCNCNC
USB_PCIE
SYM 5 OF 8
PCIE_REFCLK_MPCIE_REFCLK_P
PCIE_REXT
PCIE_RX_MPCIE_RX_P
PCIE_TX_PPCIE_TX_M
PCIE_USB_SYSCLKUSB_HS_REXT
USB_HS_DMUSB_HS_DP
USB_SS_REXT
USB_SS_RX_MUSB_SS_RX_P
USB_SS_TX_MUSB_SS_TX_P
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
NCNCNCNCNC
NCNC
ANALOG_RF
SYM 2 OF 8
GNSS_BB_QP
BBRX_IP_FB
BBRX_QP_FB
GNSS_BB_IP
TX_DAC0_IP
TX_DAC0_QPTX_DAC0_QM
TX_DAC1_IPTX_DAC1_IM
TX_DAC1_QPTX_DAC1_QM
ET_DAC0_PET_DAC0_MET_DAC1_PET_DAC1_M
TX_DAC0_IM
DNCDNCDNC
DNCDNC
BBRX_IP_CH0
BBRX_QP_CH0
BBRX_IP_CH1
BBRX_IP_CH3
BBRX_QP_CH2
BBRX_IP_CH2
BBRX_QP_CH1
BBRX_QP_CH6BBRX_IP_CH6
BBRX_QP_CH5BBRX_IP_CH5
BBRX_QP_CH3
TX_DAC_VREFTX_DAC_VREF
NCNCNC
NCNCNC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
SYM 4 OF 8
MEMORYBDM_ZQ
VREF_DQ_BDMEBI1_CAL
EBI1_VREFEBI1_VREF
EBI1_VREF
OUT
BI
BI
NCNC
OUT
IN
IN
IN
NCNC
NCNC
SYM 1 OF 8
CONTROL
SPMI_DATASPMI_CLK
RESOUT*
SDC1_DATA_3SDC1_DATA_2
SDC1_DATA_0SDC1_CMDSDC1_CLK
PS_HOLD
SDC1_DATA_1
SRST*
CXO_ENCXO
SLEEP_CLK
RESIN*
TCK
MODE_0MODE_1
TRST*
TDOTDITMS
IN
IN
NCNC
NCNC
OUT
OUT
RFCAL_QCN
RFFE USAGE TABLE
JP 1.0 KOHMNOSTUFFR5911_RF
BASEBAND: GPIOS
R5912_RF
USID=0X8
USID=0XF
NOSTUFFSKUROW
NOSTUFF
IMPROVES RXBN BY 4DB
RFFE1 WTR3925
MAV13 = BB_LAT_0
RF_BB_LAT_2
WDOG DIS CONFLICT
RFFE3 DIV MODULES
RF_BB_LAT_1
MAV13 = WDOG DIS
PLACE CAP CLOSE TO MDM
BUFFER ON RFFE5SCLK/SDATA_A IS OUTPUT
PCIE PULL-UPS TO BB RAIL
RF_BB_LAT_3
RFFE5 TUNERS + ELNAS
RFFE7 LB PA, COUPLERS
BB EEPROM
RFFE6 2G PA,MLB PA,MB/HB TDD PA,MB/HB FDD PA
RFFE4 WTR4905
RFFE2 QFE3100
051-00482
68 OF 81
59 OF 72
8.0.0
BB_TO_UAT_SCLK 14 7 1
BB_TO_UAT_DATA 14 7 1 BB_TO_LAT_ANT_DATA
1 17 7
BB_TO_LAT_GPO2 1
BB_TO_LAT_GPO3 1
BB_TO_LAT_GPO1 1
BB_TO_LAT_ANT_DATA17 7 1
BB_TO_LAT_ANT_SCLK17 7 1
BB_TO_LAT_ANT_SCLK17 7 1
PCIE_BB_BI_AP_CLKREQ_L7 1
BB_TO_UAT_SCLK 14 7 1
BB_TO_UAT_DATA 14 7 1
BB_TO_LAT_ANT_SCLK17 7 1
BB_TO_LAT_ANT_DATA17 7 1
AP_TO_BB_COREDUMP
BB_TO_STROBE_DRIVER_GSM_BURST_IND
BB_TO_LAT_ANT_DATA 17 7 1
BB_TO_LAT_ANT_SCLK 17 7 1
I2S_BB_TO_AP_LRCLK
I2S_BB_TO_AP_BCLK
BB_TO_PMU_PCIE_HOST_WAKE_L
AP_TO_BB_IPC_GPIO1
PCIE_BB_BI_AP_CLKREQ_L
PCIE_AP_TO_BB_RESET_L
AP_TO_BB_MESA_ON
2
1R5912_RF
2
1 C5907_RF
2
1 C5906_RF
A3
A2
A1B4B2B1A4
B3
GPIO_RF
2
1R5911_RF
21
R5910_RF
21R5909_RF
2
1 C5903_RF
4
63
52
81
7
RFBUF_RF
2
1R5907_RF
A2A1
B2B1
EPROM_RF
2
1 C5902_RF
AA20AB20Y19Y21G5G2G3H5AB12N21AA18AA17W21L21AA11Y11M21Y22AB17Y12AB22M23AA22L19Y23K19V12AA16N23Y16H1H2H3J5J1J2J3K5K3F3
F5N22
L1L2L3L5M5M1M2M3N5N1N2N3
P22N19Y18P23P21
AB19AB13
Y14AA14
V14AA13
Y13AA12
V13P5R5P3T5R1R2R3T1
Y15AB14AA19
V15
BB_RF
2
1 C5901_RF2
1R5906_RF
2
1R5908_RF
UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX
BB_TO_AP_RESET_DETECT_L
1 17
17
1
FAST_BOOT_SELECT1
SIM1_REMOVAL_ALARM75_RFFE7_SDATA
75_RFFE7_SCLK
75_RFFE6_SDATA
75_RFFE6_SCLK
FAST_BOOT_SELECT0
UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD
I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_DOUT
BB_EEPROM_I2C_SCL
BB_EEPROM_I2C_SDA
AP_TO_BB_TIME_MARK
1
SHIELD_GSM_TX_PHASE
75_RFFE3_SDATA
75_RFFE3_SCLK
75_RFFE4_SDATA
75_RFFE2_SCLK
75_RFFE1_SCLK
SIM1_DETECT
17 20
17 20
17 20
1
1 17 20
1 17 20
1%
MF
100K1/32W
RADIO_BB01005
NOSTUFF
1UF20%10V
RADIO_BB0201X5R
17
WLCSPRF1352
MDM9645BGA
22PF16VCERM2%
01005
CAT24C08C4AWLCSP
RADIO_BB
12 17
12 17
1 17
3 17
1 3
16 17
9 17
13 17
9 17
9 17
13 17
9 17
16 17
17 18 19
RADIO_BB
1/32WMF01005
1%10K
12 19
1 7
13 17
100PF5%16VNP0-C0G01005
1 17
1
1
1
1
1
NOSTUFF
0%0.00MF
01005RADIO_BB
1/32W
1/32W
0.00
MF
0%
NOSTUFF
01005RADIO_BB
01005MF
1/32W1%
1.00K
RADIO_BB
OMIT_TABLE
WLCSPQM18064
01005
6.3VX5R
10%0.01UF
16VNP0-C0G-CERM
33PF
01005
5%
1 17
NOSTUFF
1%
MF1/32W
1.00K
RADIO_BB
01005
1%10K
MF01005
1/32W
RADIO_BB
1
17 20
9
SYNC_DATE=04/17/2015
BASEBAND GPIOS
RX-DSPDT_CTL2
SIM1_RST
SKU_ID2
SIM1_IOPP1V8_SDRAM
PP_1V8_LDO6
FBRX-DSPDT_CTL1
BB_EEPROM_I2C_SCL BB_EEPROM_I2C_SDA
PP_1V8_LDO6
PP_1V8_LDO1575_RFFE4_SCLK
FBRX-DSPDT_CTL2
PP_1V8_LDO6
BUFFER_GPO1BUFFER_GPO2
SKU_ID
75_RFFE2_SDATA
75_RFFE1_SDATA
SIM1_CLK
17
17
1 20
4 5 6 7 17 20
7 7
7
4 5 6 7 17 20
12 19
4 12 13 14 16 18 19
4 5 6 7 17 20
1
1
7
17 18 19
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
OUT
OUT
IN
IN
OUT
NC
NCSDATA
GPO4GPO3GPO2
GND
VIO
SCLK
GPO1
NC
NCNCNCNCNCNC
IN
OUT
IN
IN
IN
OUT
NCNCNCNC
OUT
NC
NC
NCNC
BI
NCNC
NC
NC
BI
OUT
OUT
OUT
BI
OUT
OUT
BI
BI
BI
BI
NC
NCNC
IN
NC
NC
NC
NC
NCNCNCNC
NC
NC
BI
IN
OUT
OUT
VCC
VSS
SDASCL
GPIO
SYM 3 OF 8
GPIO_39GPIO_38GPIO_37GPIO_36GPIO_35GPIO_34GPIO_33GPIO_32GPIO_31GPIO_30GPIO_29GPIO_28GPIO_27
GPIO_24GPIO_25
GPIO_23
GPIO_26
GPIO_22
GPIO_20GPIO_21
GPIO_19
GPIO_17GPIO_18
GPIO_16GPIO_15
GPIO_12GPIO_13GPIO_14
GPIO_7
GPIO_9GPIO_10GPIO_11
GPIO_8
GPIO_3GPIO_4
GPIO_6GPIO_5
GPIO_2
GPIO_0GPIO_1
GPIO_78GPIO_79
GPIO_77GPIO_76GPIO_75GPIO_74GPIO_73GPIO_72GPIO_71GPIO_70GPIO_69GPIO_68GPIO_67GPIO_66GPIO_65GPIO_64GPIO_63GPIO_62GPIO_61GPIO_60GPIO_59GPIO_58GPIO_57GPIO_56GPIO_55GPIO_54GPIO_53GPIO_52GPIO_51GPIO_50
GPIO_46GPIO_45GPIO_44GPIO_43GPIO_42GPIO_41
GPIO_49GPIO_48GPIO_47
GPIO_40
SDATA
SCLK_A
SDATA_A
GPO2
GND
VIO
SCLK
GPO1
OUT
IN
OUT
NC
BI
BI
OUT
C6380_RF CAN BE 0201 (TBD)
250MA
25MA
STAR ROUTING
40MA
175MA
25MA
250MA
40MA
STAR ROUTING
TRANSCEIVER: POWER
175MA
35MA
250MA
8.0.0
69 OF 81
60 OF 72
051-00482
BBPMU_TO_PMU_AMUX3
BBPMU_TO_PMU_AMUX3
2
1 C6017_RF
2
1 C6016_RF
2
1 C6015_RF
2
1 C6022_RF
2
1 C6024_RF
2
1 C6023_RF
2
1 C6021_RF
2
1 C6020_RF
2
1 C6019_RF
2
1 C6018_RF
21
R6008_RF
21
R6007_RF
21
R6006_RF
21
R6005_RF
2
1 C6004_RF
2
1 C6002_RF
2
1 C6009_RF
2
1 C6008_RF
2
1 C6007_RF
21
R6004_RF
21
R6003_RF
2
1 C6006_RF
21
R6002_RF
524845424039373532
302927262524211613
9
XCVR1_RF
34
44
2333
50
XCVR1_RF
2
1 C6005_RF
2
1 C6014_RF
2
1 C6013_RF
2
1 C6012_RF
2
1 C6011_RF
2
1 C6010_RF
21
R6001_RF
2
1 C6001_RF
2
1 C6003_RF
312538
484163712726838257
5453
61363752178187
94
55
1028919902091218428
72425658
3
XCVR0_RF
23
30
88
67
49
64
45
XCVR0_RF
WLPSPWTR3925-2-TR-03-1
RADIO_TRANSCEIVER
DEFAULT_CAPACITOR_27.000000pF_2_1
RADIO_TRANSCEIVER
WLPSPWTR3925-2-TR-03-1
RADIO_TRANSCEIVER
PP_0V9_LDO3 PP_VDD_XCVR1_RF1_DIG
PP_VDD_XCVR1_RF1_TX
PP_VDD_XCVR1_RF1_RX
PP_VDD_XCVR0_RF1_DIG
PP_VDD_XCVR0_RF1_RX2
PP_VDD_XCVR0_RF1_RX1
PP_0V9_LDO3
PP_VDD_XCVR0_RF1_TX
PP_VDD_XCVR0_RF1_TX_VCO
VDD_XCVR1_RF2_LDO_BYPASS
VDD_XCVR0_RF2_LDO_BYPASS
SYNC_DATE=04/17/2015
PAGE_TITLE=TRANSCEIVER0/1: POWERRADIO_TRANSCEIVER
NP0-C0G
27PF5%16V
01005
DEFAULT_CAPACITOR_27.000000pF_2_1
NP0-C0G
27PF
01005
16V5%
RADIO_TRANSCEIVER
NP0-C0G
27PF
01005
16V5%
DEFAULT_CAPACITOR_100000pF_2_1
0.1UF
X5R-CERM01005
6.3V20%
20%2.2UF
X5R-CERM6.3V
0201-1
0201-1X5R-CERM
2.2UF20%6.3V
DEFAULT_CAPACITOR_100000pF_2_1
0.1UF
X5R-CERM01005
6.3V20%
DEFAULT_CAPACITOR_100000pF_2_1
0.1UF
X5R-CERM01005
6.3V20%
DEFAULT_CAPACITOR_100000pF_2_1
0.1UF
X5R-CERM01005
6.3V20%
DEFAULT_CAPACITOR_100000pF_2_1
0.1UF
X5R-CERM
20%6.3V
01005
DEFAULT_RESISTOR_0.001OHM_2_1
MF
0%
0.00
01005
1/32W
DEFAULT_RESISTOR_0.001OHM_2_1
MF
0%
01005
0.00
1/32W
DEFAULT_RESISTOR_0.001OHM_2_1
0%
MF01005
1/32W
0.00
0%
0.00
1/32WMF
01005
DEFAULT_CAPACITOR_100000pF_2_1
20%CERM-X5R-1201
4V0.47UF
RADIO_TRANSCEIVER
8 4
DEFAULT_CAPACITOR_4700pF_2_1
RADIO_TRANSCEIVER
4700PF
X5R10%
01005
6.3V
RADIO_TRANSCEIVER
CERM-X5R-1
0.47UF4V20%
201
RADIO_TRANSCEIVER
0.1UF
X5R-CERM
20%6.3V
01005
RADIO_TRANSCEIVER
0.1UF
X5R-CERM01005
6.3V20%
RADIO_TRANSCEIVER
0.1UF
X5R-CERM01005
6.3V20%
0.00
MF
0%
01005
1/32W
RADIO_TRANSCEIVER
0%
MF01005
1/32W
0.00
RADIO_TRANSCEIVER
6.3VX5R-CERM0201-1
2.2UF20%
8 4
DEFAULT_RESISTOR_0.001OHM_2_1
RADIO_TRANSCEIVER
MF
0%
01005
1/32W
0.00
WTR4905WLNSP
WLNSP
WTR4905
DEFAULT_CAPACITOR_4700pF_2_1
RADIO_TRANSCEIVER
10%6.3V
01005X5R
4700PF
RADIO_TRANSCEIVER
DEFAULT_CAPACITOR_27.000000pF_2_1
NP0-C0G
27PF
01005
5%16V
DEFAULT_CAPACITOR_27.000000pF_2_1
27PF
NP0-C0G01005
5%16V
RADIO_TRANSCEIVER
RADIO_TRANSCEIVER
27PF
NP0-C0G01005
5%16V
NP0-C0G
27PF
01005
5%16V
DEFAULT_CAPACITOR_27.000000pF_2_1
RADIO_TRANSCEIVER
27PF
NP0-C0G
5%16V
01005
8 4
8 4
RADIO_TRANSCEIVER
DEFAULT_RESISTOR_0.001OHM_2_1
0%
MF01005
0.00
1/32W
DEFAULT_CAPACITOR_1e+06pF_2_1
RADIO_TRANSCEIVER
CERM-X5R20%6.3V10UF
0402
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IN
IN
GND
SYM 5 OF 5
GNDGNDGNDGNDGNDGNDGND
GNDGND
GNDGNDGNDGNDGNDGNDGNDGNDGNDGND
SRM 4 OF 5
PWR
VDD_RF1_TX
VDD_RF1_DIG
VDD_RF1_RX
VDD_RF2
VDD_RF2_LDO
IN
IN
SYM 5 OF 5GND
GND
GNDGND
GND
GNDGNDGNDGNDGNDGNDGND
GNDGND
GNDGND
GND
GNDGND
GNDGNDGND
GND
GNDGNDGND
GNDGND
GNDGNDGND
GNDGNDGNDGND
GNDGND
GND
PWRSYM 4 OF 5
VDD_RF1_TSIG
VDD_RF2
LDO_CAP
VDD_RF1_DIG
VDD_RF1_RX1
VDD_RF1_RX2
VDD_RF1_TVCO
TRANSCEIVER: TX PORTS
61 OF 72
8.0.0
70 OF 81
051-00482
2
1 C6117_RF2
1 C6118_RF
21
L6111_RF
2
1
L6103_RF
2
1
L6102_RF21
C6105_RF
21
C6115_RF
2
1 C6114_RF
21
L6109_RF
21
C6116_RF
2
1 C6113_RF
21
L6110_RF
21
C6110_RF
21
C6109_RF
2
1 C6111_RF
21
C6106_RF
21
C6107_RF
21
C6108_RF
2
1
L6101_RF
21
C6101_RF
2
1
L6104_RF
21
C6102_RF
21
C6103_RF
21
C6104_RF
8693100101
19
46
44515966
7480
816
6860
7675
6247
XCVR0_RF
2
1 C6112_RF
55
31
7212181
38
1419
5651
57
XCVR1_RF
50_XCVR1_TX_G1800_G1900_PA_IN27PF
18
RADIO_TRANSCEIVER
CERM
2%
50_XCVR0_TX_HMLB2_B34_B39
50_XCVR1_TX_B8_B20_B26_B27_PA_IN
RADIO_TRANSCEIVER
10NH-3%-140MA01005NOSTUFF
SHIELD_XCVR0-1_TX_Q_P
50_XCVR1_TX_HMLB1_G1800_G1900
WLPSP
SHIELD_XCVR0-1_TX_I_N
SHIELD_XCVR0-1_TX_Q_P
SHIELD_XCVR0-1_TX_Q_N
SHIELD_XCVR0_TX_FB_RX_I
75_RFFE1_SCLK
SHIELD_XCVR0_TX_FB_RX_Q
50_XCVR0_TX_HMB3_B1_B3_B4_B25
50_XCVR0_TX_HMB1_B11_B21
50_XCVR0_TX_HMB2_B38_B40_B41
50_XCVR0_TX_HMB4_B7_B30
50_XCVR0_TX_HMLB2_B34_B39
100_XCVR0_TX_FBRX_IN_WTR
75_RFFE1_SDATA
SHIELD_XCVR0-1_TX_I_P
WTR3925-2-TR-03-1
RADIO_TRANSCEIVER
SHIELD_WTR_19P2M_CLK
SHIELD_XCVR0_19P2M_CLK_WTR_IN
SHIELD_XCVR0-1_TX_I_N
SHIELD_XCVR0-1_TX_Q_N
75_RFFE4_SCLK
75_RFFE4_SDATA
SHIELD_XCVR0-1_TX_I_P
SHIELD_GSM_TX_PHASE
50_XCVR1_TX_HMLB1_G1800_G1900
50_XCVR1_TX_HMLB2_B8_B20_B26_B27
50_XCVR1_TX_HMLB4_B12_B13_B28
50_XCVR1_TX_HMLB5_G850_G900
50_XCVR1_TX_FBRX_IN
50_XCVR1_TX_HMLB5_G850_G900
50_XCVR1_TX_HMLB4_B12_B13_B28
50_XCVR0_TX_FBRX_IN_UNBAL 50_XCVR0_TX_FBRX_IN
50_XCVR0_TX_HMB3_B1_B3_B4_B25
50_XCVR0_TX_HMB4_B7_B30
50_XCVR1_TX_G850_G900_PA_IN
50_XCVR0_TX_HMB4_B7_B30_MATCH
50_XCVR0_TX_HMB2_B38_B40_B41
50_XCVR0_TX_HMB1_B11_B21
50_XCVR0_TX_HMB2_B38_B40_B41_MATCH
50_XCVR0_TX_B34_B39_PA_IN
50_XCVR0_TX_B7_B30_PA_IN
50_XCVR0_TX_B11_B21_PA_IN
50_XCVR0_TX_B38_B40_B41_PA_IN
50_XCVR0_TX_B1_B3_B4_B25_PA_IN
50_XCVR1_TX_HMLB2_B8_B20_B26_B27
50_XCVR1_TX_B12_B13_B28_PA_IN
SHIELD_WTR_19P2M_CLK SHIELD_XCVR1_19P2M_CLK_WTR_IN
SYNC_DATE=04/17/2015
TRANSCEIVER0/1: TX PORTS
DEFAULT_CAPACITOR_1.200000pF_2_1
NP0-C0G-CERM01005
16V+/-0.05PF1.2PF
DEFAULT_INDUCTOR_2.800000nH_2_1
01005
2.8NH-+/-0.1NH-0.36A
DEFAULT_CAPACITOR_22.000000pF_2_1
22PF
01005CERM16V5%DEFAULT_CAPACITOR_1.200000pF_2_1
NP0-C0G-CERM16V+/-0.05PF
01005
1.2PF
2.8NH-+/-0.1NH-0.36A
DEFAULT_INDUCTOR_2.800000nH_2_1
01005
DEFAULT_CAPACITOR_1000pF_2_1
6.3V10%
01005
1000PF
X5R-CERM
DEFAULT_CAPACITOR_1000pF_2_1
100PF
5%6.3V
01005CERM
7
17 7
9 3
5%
01005NOSTUFF
NP0-C0G-CERM25V
68PF
19
18
19
19
18
9 3
OMIT_TABLE
27PF
2%16VCERM01005
RADIO_TRANSCEIVER
27PF
CERM16V
01005RADIO_TRANSCEIVER
2%
9 6
9 6
16V
27PF
01005
19
19
OFFPAGE=TRUE
18
9 6
RADIO_TRANSCEIVER01005CERM
2%16V
RADIO_TRANSCEIVERNOSTUFF
10NH-3%-140MA01005
01005RADIO_TRANSCEIVER
27PF
16V2%
CERM
9 6
RADIO_TRANSCEIVER
27PF
2%
01005
16VCERM
RADIO_TRANSCEIVER
27PF
16VCERM01005
2%
9 6
9 6
9 6
17 7
9 6
10 6
10 6
17 7
1.0PF
NP0-C0G
NOSTUFF01005
16V+/-0.1PF
WLNSP
WTR4905
1.5PF+/-0.1PF
NP0-C0G16V
01005-1
+/-0.1PF
NP0-C0G
1.5PF
01005-1
16V
3.0NH+/-0.1NH-200MA
01005
NOSTUFF01005
RADIO_TRANSCEIVER
10NH-3%-140MA
RADIO_TRANSCEIVER
10NH-3%-140MA01005NOSTUFF
12
27PF
2%
RADIO_TRANSCEIVER01005
16VCERM
DEFAULT_CAPACITOR_22.000000pF_2_1
22PF
01005CERM16V5%
17 7
9
9
9
9
9
9
9
9
9
9
12
9
9
9
9
9
9
9
9
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
IN
OUT
OUT
OUT
IN
IN
NCNCNC
TX
SYM 3 OF 5TX_LB1
TX_BB_IMTX_BB_QPTX_BB_QM
TX_FBRX_BBI
RFFE_CLK
TX_FBRX_BBQ
XO_IN
TX_LB2
TX_LB4TX_LB3
TX_MHB3
TX_MHB1TX_MHB2
TX_MHB4
TX_HMLB1TX_HMLB2
TX_FBRX_MTX_FBRX_P
RFFE_DATA
TX_BB_IP
NC
IN
IN
IN
IN
IN
OUT
OUT
IN
NC
NC
SYM 2 OF 5
TX
TX_BB_QP
TX_BB_IM
TX_BB_QM
TX_BB_IP
GP_DATA
RFFE_DATARFFE_CLK
XO_IN
TX_DA1TX_DA2TX_DA3TX_DA4TX_DA5
TX_FBRX
IN
NC
TRANSCEIVER: PRX, DRX, & GPS PORTS
PLACE NEAR U_WTRGPS FILTER
71 OF 81
62 OF 72
8.0.0
051-00482
41
6532
GFILT_RF
21
L6200_RF
2
1 C6201_RF
7
91
3
86542
GLNA_RF21
R6201_RF
2
1 C6205_RF
2
1 C6204_RF
21
L6201_RF
2
1 C6203_RF
2410
32
18
40
34
70
78
2
136
147
2215
114
125
35295043
XCVR0_RF
58
41
46
5359
605449
4338
36
47
XCVR1_RF
33
39
77
69
97105
98106
9299
95103
96104
79856573
XCVR0_RF
510
4
61117
2228
20
15
XCVR1_RF
50_XCVR0_PRX_PHB3_B38_B40_B41
50_XCVR0_DRX_DMB2_B34
50_XCVR0_DRX_DMB3_B1_B4
50_XCVR0_DRX_DMB5_B3_B25
50_XCVR0_DRX_DHB4_B30_B40
WLPSP
SHIELD_GPS_RX_Q
SHIELD_XCVR0_DRX_CA2_Q
SHIELD_XCVR0_DRX_CA2_I
SHIELD_XCVR0_DRX_CA1_Q
50_XCVR0_DRX_DMB4_B39
50_XCVR0_DRX_DHB2_B7_B38_B41
50_XCVR0_DRX_DMLB6_B11_B21
50_GPS_RX
SHIELD_XCVR0_DRX_CA1_I
SHIELD_GPS_RX_I
WTR3925-2-TR-03-1
RADIO_TRANSCEIVER
WLPSPWTR3925-2-TR-03-1
SHIELD_XCVR0_PRX_CA2_Q
SHIELD_XCVR0_PRX_CA1_Q
SHIELD_XCVR0_PRX_CA2_I
50_XCVR0_PRX_PHB2_B40_EXT
50_XCVR0_PRX_PHB1_B7
50_XCVR0_PRX_PMB3_B3
SHIELD_XCVR0_PRX_CA1_I
50_XCVR0_PRX_PHB4_B30
50_XCVR0_PRX_PMLB6_B11_B21
50_XCVR0_PRX_PMB5_B25
50_XCVR0_PRX_PMB4_B34_B39
50_XCVR0_PRX_PMB2_B1_B4
50_XCVR0_PRX_PMB1_B4
RADIO_TRANSCEIVER
PP_1V8_LDO14
50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29
SHIELD_XCVR1_PRX_Q
50_GPS_RX
50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29
50_XCVR1_DRX_DMB2_B3
50_XCVR1_DRX_DLB2_B8_B26_B27
SHIELD_XCVR0_TX_FB_RX_Q
SHIELD_XCVR0_TX_FB_RX_I
SHIELD_XCVR1_DRX_Q
SHIELD_XCVR1_DRX_I
SHIELD_XCVR1_PRX_I
50_XCVR1_PRX_PMB2_G1900
50_XCVR1_PRX_PMB1_G1800
50_XCVR1_PRX_PLB2_B8_B26_B27
50_DRX_GPS_LNA_MATCH 50_GPS_FILTER_OUT50_DRX_GPS_LNA_OUT50_GNSS
PAGE_TITLE=TRANSCEIVER0/1: PRX PORTS
SYNC_DATE=04/17/2015
LGASAFGB1G56XA0F57GPS-GNSS
6
6
120NH-5%-40MA
0201GNSS
01005
0.1UF6.3V20%X5R-CERM
GNSS
GNSS
LGASKY65766-13
DEFAULT_RESISTOR_0.001OHM_2_1
0.00
0%
MF1/32W
01005 2.0PF+/-0.1PF16V
NOSTUFF01005NP0-C0G
2.0PF
01005NP0-C0G16V+/-0.1PF
NOSTUFF
01005
10NH-3%-0.170A
01005NP0-C0G
1.6PF+/-0.1PF16V
15
6
6
6
6
6
11
11
11
11
11
11 6
6
6
9 6
9 6
WTR4905WLNSP
11
11
11
6
6
6
6
WLNSP
WTR4905
11
10
11
11
11
11
11
11
11
11
11
4
11
10
11
11
11
11
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
UNBAL_PRT UNBAL_PRT
GND
NC
OUT
NC
NC
NC
NC
NC
OUT
NC
RFIN
GND
RFOUT
VDD
LNA_EN
NC
NC
IN
OUT
OUT
OUT
OUT
OUT
NC
NC
NC
NC
PRXSYM 1 OF 5
PRX_CA2_BBQ
PRX_CA1_BBQ
PRX_CA2_BBI
PRX_HB2PRX_HB1
PRX_MB3
PRX_CA1_BBI
PRX_HB4PRX_HB3
PRX_MLB6PRX_MB5PRX_MB4
PRX_MB2PRX_MB1
PRX_LB4
PRX_LB2PRX_LB3
PRX_LB1
IN
IN
IN
IN
IN
INOUT
OUT
OUT
OUT
NC
OUT
NC
NC
SYM 2 OF 5DRX_GPS
GNSS_BBQ
DRX_CA2_BBQ
DRX_CA2_BBI
DRX_CA1_BBQ
DRX_LB1DRX_LB2
DRX_LB4
DRX_MB2DRX_MB1
DRX_LB3
DRX_MB5DRX_MB4DRX_MB3
DRX_HB1
DRX_HB4DRX_HB3DRX_HB2
DNC
DRX_MLB6
GNSS_L1
DRX_CA1_BBI
GNSS_BBI
GP_DATANC
NC
NC
NC
SYM 1 OF 5
DRX_GPS
GNSS_BBQ
GNSS_BBI
DRX_BBQ
DRX_BBI
GNSS_IN
DRX_HB1DRX_HB2
DRX_MB1DRX_MB2
DRX_LB3
DRX_LB1DRX_LB2
NC
NC
IN
IN
IN
OUT
OUT
OUT
OUT
PRX
SYM 3 OF 5
PRX_LB2PRX_LB1
PRX_LB3
PRX_BBI
PRX_BBQ
PRX_MB3
PRX_MB1PRX_MB2
PRX_HB2PRX_HB1
DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF
SHUNT COMPONENT WITH BAND 40 FILTER
DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF
PRIMARY & DIVERSITY RECEIVE MATCHING
72 OF 81
63 OF 72
8.0.0
051-00482
21
C6333_RF
21
C6345_RF21
L6322_RF
21
C6318_RF21
L6310_RF
21
C6316_RF21
L6306_RF
21
C6314_RF21
L6304_RF
21
C6338_RF21
C6324_RF
21
C6349_RF21
L6323_RF
21
C6350_RF21
L6328_RF
21
L6319_RF
21
C6332_RF21
L6318_RF
21
C6348_RF
21
C6302_RF
21
C6317_RF
21
C6301_RF21
L6309_RF
21
C6309_RF21
C6343_RF21
L6308_RF
21
C6308_RF21
C6342_RF21
L6307_RF
21
C6306_RF21
C6315_RF21
L6305_RF
21
C6305_RF
21
L6325_RF
21
L6324_RF
3
4
6 5 2
1
GSMRX_RF
21
R6301_RF
2
1
L6320_RF
21
L6321_RF
21
L6301_RF
21
C6311_RF
21
C6307_RF
21
L6313_RF
21
C6310_RF
21
L6311_RF
21
L6312_RF
2
1 C6351_RF
2
1 C6352_RF
21
C6346_RF
21
C6334_RF
21
C6344_RF
21
C6336_RF
21
C6337_RF21
C6323_RF
21
C6325_RF
21
C6335_RF
21
C6340_RF
21
C6341_RF
21
C6328_RF
21
C6329_RF
21
C6319_RF
21
C6320_RF
50_XCVR0_PRX_PMB2_B1_B4
50_XCVR0_PRX_PMB1_B4
50_XCVR0_B7_PA_PRX
50_XCVR0_DRX_DMLB6_B11_B21_MATCH 50_XCVR0_DRX_DMLB6_B11_B21
50_XCVR0_B34_B39_PA_PRX
50_XCVR0_PRX_PHB1_B750_XCVR0_PRX_PHB1_B7_MATCH
50_XCVR0_PRX_PMB4_B34_B39
50_XCVR0_PRX_PMB1_B4_MATCH
50_XCVR0_PRX_PMB5_B25_MATCH
50_XCVR0_PRX_PMLB6_B11_B21_MATCH
50_XCVR0_B11_B21_PA_DRX
1.9NH-+/-0.1NH-0.6A-0.12OHM
50_XCVR0_PRX_PMB2_B1_B4_MATCH
50_XCVR0_PRX_PMB4_B34_B39_MATCH
50_XCVR0_B1_B4_PA_PRX
19
2%
CERM
RADIO_TRANSCEIVER
27PF
01005
16V
16V
27PF
01005CERM
2%
RADIO_TRANSCEIVER
16VCERM01005
RADIO_TRANSCEIVER
27PF
2%
13
01005CERM16V2%
27PF
13
RADIO_TRANSCEIVER
CERM
2%16V
27PF
01005
13
2%
CERM
RADIO_TRANSCEIVER
16V
01005
27PF
13
2%
27PF
CERM16V
01005RADIO_TRANSCEIVER
19
RADIO_TRANSCEIVER01005CERM16V2%
27PF
NOSTUFF
27PF
01005
16V2%
CERM
01005
27PF16VCERM
2%
NOSTUFF
20NH-3%-0.25A-0.8OHM
RADIO_TRANSCEIVER0201
0201
0.00
MF1/20W1%
RADIO_TRANSCEIVER
0201
0.00
MF1/20W1%
0201RADIO_TRANSCEIVER
15NH-3%-0.3A-0.7OHM
3.0NH+/-0.1NH-0.6A
RADIO_TRANSCEIVER0201
2.1NH-+/-0.1NH-0.6A-0.12OHM
0201RADIO_TRANSCEIVER
0201
2.5NH+/-0.1NH-0.6A
RADIO_TRANSCEIVER
0201
4.3NH+/-3%-0.5A
RADIO_TRANSCEIVER
18
02013.6NH+/-0.1NH-0.5ARADIO_TRANSCEIVER
OMIT_TABLE
27PF
RADIO_TRANSCEIVER
NOSTUFF
NP0-C0G0201
5%6.3V
GSM1800-1900OMIT_TABLELGA
B8856
13
2.4NH+/-0.1NH-0.6A
0201
3.2NH+/-0.1NH-0.5A
19
3.1NH-+/-0.1NH-0.5A-0.17OHM
RADIO_TRANSCEIVER0201
19
6.2NH-3%-0.4A
0201
OMIT_TABLE
RADIO_TRANSCEIVER01005
16V2%
CERM
27PF
OMIT_TABLE
RADIO_TRANSCEIVER
2%16V
01005CERM
27PF
RADIO_TRANSCEIVER
C0G-CERM0201
25V+/-0.05PF
3.0PF OMIT_TABLE
0201
4.3NH+/-3%-0.5A
RADIO_TRANSCEIVER01005CERM16V2%
27PF
1.2PF
C0G-CERM25V
+/-0.1PF
0201
19
RADIO_TRANSCEIVER0201
4.3NH+/-3%-0.5A
RADIO_TRANSCEIVER
27PF
2%16VCERM01005
RADIO_TRANSCEIVER01005
16VCERM
2%
27PF
RADIO_TRANSCEIVER
1.2PF
C0G-CERM25V
0201
+/-0.1PF
18
0201
RADIO_TRANSCEIVER
0201
3.3NH+/-0.1NH-0.5A
RADIO_TRANSCEIVER
16V2%
CERM
27PF
01005
19
RADIO_TRANSCEIVER
+/-0.1PF
201
1.0PF
25VC0G
19
3.0PF
25V
0201
+/-0.05PF
OMIT_TABLERADIO_TRANSCEIVER
C0G-CERM
RADIO_TRANSCEIVER0201
OMIT_TABLE5.1NH-3%-0.4A
2.0PF
+/-0.1PF
RADIO_TRANSCEIVER
OMIT_TABLE
0201
25VC0G-CERM
5.1NH-3%-0.4A
RADIO_TRANSCEIVEROMIT_TABLE
0201
0201
3.0NH+/-0.1NH-0.6A
+/-0.1PF
0201C0G-CERM
25V2.2PF
RADIO_TRANSCEIVER
0201
RADIO_TRANSCEIVER
2.4NH+/-0.1NH-0.6A
RADIO_TRANSCEIVER
0201
3.2NH+/-0.1NH-0.5A
2%16V
01005CERM
RADIO_TRANSCEIVER
27PF
27PF
0201NP0-C0G6.3V5%
1.6NH-+/-0.1NH-1A-0.05OHM
RADIO_TRANSCEIVER0201
27PF
01005
2%
CERM16V
RADIO_TRANSCEIVER
1.9NH-+/-0.1NH-0.6A-0.12OHM
RADIO_TRANSCEIVER0201
RADIO_TRANSCEIVER
2%16VCERM01005
27PF
3.9NH+/-0.1NH-0.5A
0201
RADIO_TRANSCEIVER
27PF
2%
01005CERM16V
0201
6.2NH-3%-0.4A
OMIT_TABLE
27PF
RADIO_TRANSCEIVER
2%16VCERM01005
OMIT_TABLE
OMIT_TABLE
+/-0.1PF
NP0-C0G
2.0PF
16V
01005
19
19
19
19
01005RADIO_TRANSCEIVER
27PF
16VCERM
2%
27PF
RADIO_TRANSCEIVER
CERM01005
2%16V
OMIT_TABLERADIO_TRANSCEIVER
16V2%
27PF
01005CERM
RADIO_TRANSCEIVER01005
16VCERM
2%
27PFOMIT_TABLE
13
13
13
13
RECEIVE MATCHING
SYNC_DATE=07/21/2015
50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT
50_XCVR1_DRX_DMB2_B3
50_XCVR1_PRX_PLB2_B8_B26_B27_MATCH
50_XCVR1_G1800_G1900_DIPLEX_OUT
50_XCVR1_B3_DRX-DSPDT_OUT 50_XCVR1_DRX_DMB2_B3_MATCH
50_XCVR1_DRX_DLB2_B8_B26_B27
50_XCVR1_G1800_DIPLEX_IN
50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29
50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT
50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT
50_XCVR1_G1900_DIPLEX_IN
50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29_MATCH
50_XCVR0_PRX_PMB2_G1900_MATCH
50_XCVR0_PRX_PMB1_G1800_MATCH
50_XCVR0_B30_PA_PRX
50_XCVR1_PRX_PMB2_G1900
50_XCVR0_PRX_PHB2_B40_EXT_MATCH
50_XCVR0_PRX_PHB4_B3050_XCVR_PRX_PHB4_B30_MATCH
50_XCVR0_B38_B40_B41_PA_PRX 50_XCVR0_PRX_PHB3_B38_B40_B41_MATCH
50_XCVR0_PRX_PMB3_B3_MATCH
50_XCVR0_B34_MBHB-DRX-ASM_OUT
50_XCVR1_PRX_PLB2_B8_B26_B27
50_XCVR1_B12_B13_B20_B28_B29_PA_PRX
50_XCVR0_B39_MBHB-DRX-ASM_OUT
50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR0_DRX_DMB5_B3_B25_MATCH
50_XCVR0_B40_PA_PRX_EXT_FIL
50_XCVR0_PRX_PHB3_B38_B40_B41
50_XCVR0_B3_PRX-DSPDT_OUT
50_XCVR1_PRX_PMB1_G1800
50_LAT_MLB_G1800_G1900_PA_RX
50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT
50_XCVR0_DRX_DHB2_B7_B38_B41_MATCH
50_XCVR0_DRX_DMB3_B1_B4
50_XCVR0_DRX_DMB2_B34
50_XCVR0_DRX_DMB5_B3_B25
50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29
50_XCVR0_DRX_DHB4_B30_B40
50_XCVR0_DRX_DHB2_B7_B38_B41
50_XCVR0_DRX_DMB4_B39
50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT
50_XCVR1_B8_B26_B27_PA_PRX
RADIO_TRANSCEIVER
RADIO_TRANSCEIVER0201
RADIO_TRANSCEIVER
50_XCVR0_PRX_PHB2_B40_EXT
50_XCVR0_B25_PA_PRX
50_XCVR0_B11_B21_PA_PRX
50_XCVR0_PRX_PMB3_B3
50_XCVR0_PRX_PMB5_B25
50_XCVR0_PRX_PMLB6_B11_B21
50_XCVR0_B4_PA_PRX19
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GSM1800COMMON
GSM1900
GND
IN
IN
IN
IN
IN
IN
LOWER ANTENNA AND COUPLER
USID=0X6
USID=0X7
UPPER ANTENNA COUPLER
73 OF 81
64 OF 72
8.0.0
051-00482
21
FL6401_RF
21
FL6402_RF
2
1 C6420_RF
2
1 C6419_RF
46
531
2
UATDI_RF
46
531
2
LATDI_RF
2
1 C6418_RF
2
1 C6416_RF
21
R6404_RF
2
1 C6415_RF
5
9
6
128
142
131
164
15111073
UATCP_RF
5
9
6
128
142
131
164
15111073
LATCP_RF
8
97
12
10 456
3
SWLATCP_RF
21
R6402_RF
21
R6401_RF
1
3
2
JLAT1_RF
2
1 C6414_RF
2
1 C6411_RF2
1 C6410_RF2
1 C6409_RF
2
1 C6407_RF
21
R6405_RF
2
1 C6408_RF
2
1 C6401_RF
2
1 C6406_RF
2
1 C6417_RF
2
1 C6400_RF
2
1 C6402_RF
2
1 C6403_RF
2
1 C6404_RF
21
R6400_RF
2
1 C6405_RF
50_XCVR0_LAT_CPLD
PP_2V7_LDO12
FBRX-DSPDT_CTL1FBRX-DSPDT_CTL2
50_XCVR0_TX_FBRX_IN
50_XCVR1_TX_FBRX_IN
50_LAT_LB_COMBINER_IN
50_LAT_MB_HB_COMBINER_IN
50_UAT_LB_COMBINER_IN
50_UAT_MLB_COMBINER_IN
50_XCVR0_UAT_CPLD
50_XCVR1_LAT_CPLD
50_XCVR0_LAT_CPLD
PP_2V7_LDO1250_UAT_LB_MLB_SOUTH
50_XCVR0_UAT_CPLD
50_LAT_LB_MB_HB_COMBINER_OUT 50_LAT_LB_MB_HB_CPL_ANT
PP_2V7_LDO12
50_UAT_LB_MLB_CPL_OUT
50_UAT_MB_HB_SOUTH
50_UAT_MB_HB_CPL_ANT
50_XCVR1_UAT_CPLD
50_XCVR1_LAT_CPLD
50_UAT_LB_MLB_COMBINE
50_LAT1_ANT
75_RFFE7_SDATA
PP_1V8_LDO15_UATCP
75_RFFE7_SCLK
50_UAT_MB_HB_CPL_IN
PP_1V8_LDO15
50_XCVR1_UAT_CPLD
50_UAT_LB_MLB_CPL_IN
PP_1V8_LDO15 PP_1V8_LDO15_LATCP75_RFFE7_SDATA
50_LAT_LB_MB_HB_CPL_IN
75_RFFE7_SCLK
PAGE_TITLE=LOWER ANTENNA & COUPLERSSYNC_DATE=04/17/2015
9
9
01005
2%16VCERM
18PF
19 18 16 14 13 12 7 4
19 12 7
19 12 7
19 18 16 14 13 12 7 4
NOSTUFF
C0H-CERM0201
2%25V18PF
19 12 7
19 12 7
NOSTUFF
C0G-CERM0201
+/-0.05PF0.7PF25V
NOSTUFF
25V
0201
18PF2%C0H-CERM
0.1UF
X5R-CERM01005
6.3V20%
18PF
CERM01005
16V2%
1
1%
0201MF
1/20W
0.00
6.3V20%0.1UF
01005X5R-CERM
19
01005X5R-CERM
0.033UF4V20%
2%CERM16V
01005
18PF
2%18PF25V
0201C0H-CERM
NOSTUFF
19
0.033UF20%X5R-CERM01005
4V
NOSTUFF
18PF2%25V
0201C0H-CERM
19
2%18PF
C0H-CERM25V
0201NOSTUFF
10-OHM-1.1A
01005
10-OHM-1.1A
01005
18PF2%
01005
16VCERM
18PF
CERM01005
16V2%
OMIT_TABLE0805-LGA
LFD21829MMY1E339
0805-LGALFD21829MMY1E339
16V5%
CERM
18PF
01005NOSTUFF
C0G-CERM25V
201OMIT_TABLE
0.3PF+/-0.1PF
OMIT_TABLE
1.3NH+/-0.1NH-1.1A
02011
2%
NOSTUFF0201C0H-CERM25V18PF
LGA
SKY16705-21
SKY16705-21LGA
CXA4439GC-ELGA-1
C0H-CERM
18PF
NOSTUFF0201
25V2%
0201
1.3NH+/-0.1NH-1.1A
0201
2NH+/-0.1NH-0.6A
F-ST-SMMM7829-2700
0201MF
1/20W1%
0.0019
12
14 13 12 4
17 7
17 7
12
12
12
14 13 12 4
12
14 13 12 4
12
12
19
12
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
OUT
IN
IN
BI
IN
IN
BI
OUT
BI
BI
BIANT
GND
LBMB-HB
ANT
GND
LBMB-HB
NCNC
OUT
VDD
RF_CPL1RF_CPL2
GND
RFOUT2RFOUT1RFIN1
RFIN2
SDATASCLK
USID
VIO
VDD
RF_CPL1RF_CPL2
GND
RFOUT2RFOUT1RFIN1
RFIN2
SDATASCLK
USID
VIO
GND
RF1 RF1A
VDD
RF2 RF1B
RF2ARF2B
VCTL1VCTL2
LB DRX ASM
USID=0X9
DIVERSITY RECEIVE
USID=0XA
MB HB DRX ASM
74 OF 81
65 OF 72
8.0.0
051-00482
2
1 C6515_RF
2
1 C6514_RF
122
5
9
212019
76
113
181715141310841
16LBDSM_RF
2
1 C6513_RF
3
264
5
1
SWDSM_RF
2
1 C6504_RF
26252423
22
18
2021
19171211976541
1413
1516
23
8
10
MHBDSM_RF
2
1 C6507_RF
21
R6501_RF
2
1 C6510_RF
2
1 C6512_RF
2
1 C6509_RF
2
1 C6511_RF
2
1 C6508_RF
21
R6503_RF
21
R6502_RF
2
1 C6502_RF
2
1 C6506_RF
2
1 C6505_RF
2
1 C6501_RF
2
1 C6503_RF
50_XCVR0_B3_B25_DRX-DSPDT_OUT
50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT
75_RFFE3_SCLK
75_RFFE3_SDATA
PP_1V8_LDO15
PP_2V7_LDO12
50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT
RX-DSPDT_CTL2
50_XCVR1_B3_DRX-DSPDT_OUT
50_LAT_MB_HB_DRX
50_UAT_MB-HB-DRX-LNA_OUT_RX
PP_2V7_LDO12
50_XCVR0_B34_MBHB-DRX-ASM_OUT
50_UAT_MB-HB-DRX-ASM_ANT2
50_LAT_MB-HB-DRX-ASM_ANT150_XCVR0_B39_MBHB-DRX-ASM_OUT
75_RFFE3_SCLK
75_RFFE3_SDATA
50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT
50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT
50_XCVR0-1_B3_B25_MBHB-DRX-ASM_OUT
50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT
PP_2V7_LDO12
PP_1V8_LDO15
50_LAT-UAT_LB-DRX-ASM_ANT 50_LB_DRX
PAGE_TITLE=DIVERSITY RECEIVE ASM'SSYNC_DATE=04/17/2015
01005
2%16VCERM
18PF
NOSTUFF
25V
0201C0G-CERM
+/-0.1PF2.0PF
0201
3.9NH+/-0.1NH-0.5A
NOSTUFF
C0G-CERM25V
0201
+/-0.1PF2.0PF
0201NOSTUFF
+/-0.1PF
C0G-CERM
2.0PF25V
0201NOSTUFF
2.0PF25VC0G-CERM
+/-0.1PF
25VC0G-CERM
NOSTUFF0201
+/-0.1PF2.0PF
25V
NOSTUFF0201C0G-CERM
+/-0.1PF2.0PF
5%
MF1/20W
0
201
201
1/20W5%
0
MF
D5315LGA
6.3V20%0.1UF
01005X5R-CERM
18PF16V
01005
2%CERM
01005CERM16V2%18PF0.1UF
20%
01005
6.3VX5R-CERM
17 13 7
17 13 7
19 18 16 14 13 12 7 4
19
14
19
4V20%0.033UF
X5R-CERM01005
19 18 16 14 13 12 7 4
17 13 7
17 13 7
2%
01005
16V18PF
CERM
CERM16V2%18PF
01005
LGAHFQSWEWUA
CERM16V2%
01005
18PF
CXA4430GC-ELGA
11
11
14 13 12 4
11
17 7
11
14 13 12 4
11
11
11
11
11
14 13 12 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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36
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DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
MIPI_VIO
B34_RX
MIPI_VDD
ANT2
ANT1
THRM_PADGND
B39_RX
MIPI_SCLKMIPI_SDATA
B30_B40_RXB1_B4_RXB3_B25_RX
B7_B38/B41B_B41_RX
BI
IN
IN
IN
IN
IN
IN
BI
IN
LB_RX1
VLB_RX0
LB_RX0VLB_RX1
ANT
VDD
EPADGNDSCLKSDATAVIO
VDD
RF1RF2
GND
CTRL
RFIN
USID=0X2
LB DRX LNA
MLB DRX LNA
USID=0X4
USID=0X3
DIVERSITY RECEIVE LNAS
MB/HB DRX LNA
75 OF 81
BB_TO_UAT_DATA
BB_TO_UAT_SCLK
BB_TO_UAT_SCLK
BB_TO_UAT_DATA
BB_TO_UAT_DATA
BB_TO_UAT_SCLK
66 OF 72
8.0.0
051-00482
21
20
28272625
2322
24
241918171514131211109876531
16MHBLN_RF
9
10
3
252423
78
222120191817161513121165421
14LBLN_RF
2
1
1615
43
6
141211109875
13MLBLN_RF
2
1 C6610_RF
2
1
C6613_RF
21
R6605_RF
64
5 3 1
2
UPPDI_RF
21
FL6602_RF
2
1 C6629_RF
2
1 C6625_RF
21
FL6603_RF
2
1 C6620_RF
2
1 C6619_RF
2
1 C6617_RF
2
1 C6627_RF
2
1 C6622_RF
2
1 C6614_RF
21
R6606_RF
2
1 C6611_RF
2
1 C6602_RF
21
R6601_RF
2
1 C6601_RF
OMIT_TABLE
0201
2.7NH+/-0.1NH-0.6A
4 7 12 14 16 18 19
4 7 12 13 14 16 18 19
1 7 14
1 7 14
150OHM-25%-200MA-0.7DCR
01005
4 7 12 13 14 16 18 19
1 7 14
1 7 14
16V2%
01005
18PF
CERM01005
6.3V0.1UF
X5R-CERM20%
01005
LGA
OMIT_TABLE
LMRX2HJB-H68LGA
SKY13702-17LGA
1
C0H-CERM
NOSTUFF0201
18PF2%25V
0.00
0201
1/20W1%
MF
NOSTUFF
25V2%18PF
0201C0H-CERM
0201
2%C0H-CERM25V18PF
OMIT_TABLE
1/20W1%
MF0201
0.00
2%25V
0201NOSTUFF
C0H-CERM
CERM2%18PF16V
01005
20%6.3VX5R-CERM01005
0.1UF
16VCERM2%18PF
01005
2%CERM16V
01005
20%0.033UF
7 14
1 7 14
CDS_LIB=apple
SYNC_DATE=04/17/2015
DIVERSITY RECEIVE LNA'S
50_UAT_LB_SPLIT_OUT
PP_MHBLN_RF
50_UAT_LB-DRX-LNA_ANT50_UAT_LB-DRX-LNA_TX_RX
PP_1V8_LDO15
50_UUAT_MLB
PP_1V8_LDO15
PP_MLBLN_RF
50_UAT_MLB-DRX-LNA_TX_RX
50_UAT_LB_MLB_SPLIT_IN50_UUAT_LB_MLB_NORTH
PP_2V7_LDO12
50_UAT_LB-DRX-LNA_TX_RX
18PF
50_UAT_MLB-DRX-LNA_TX_RX
150OHM-25%-200MA-0.7DCR
13
PP_2V7_LDO12
+/-0.05PF25V
OMIT_TABLE0201
LFD21829MMP5E222
NOSTUFF
50_UAT_MLB_SPLIT_OUT
C0G-CERM
10NH-3%-250MA
OMIT_TABLE
0201
OMIT_TABLE
1.5PF
SKY13703-21 50_UAT_MB-HB-DRX-LNA_ANT
PP_MHBLN_RF
PP_1V8_LDO15
50_UAT1_WEST
50_UAT_MB-HB-DRX-LNA_OUT_RX
01005
LGA
X5R-CERM4V
18PF
1
14
14
14
15 14
15 14
4 12 13 14
4 12 13 14
13
1
14
15
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
BI
BI
OUT_RXIN_TX
VIOSDATA
VDD
EPAD
ANT
GNDSCLK
SCLKSDATAVIO
TX_RX
GND EPAD
ANT
VDD
OUT_RX
GND EPAD
VDD
VIOSDATASCLK
ANT
ANT
GND
LBMB-HB
BI
IN
IN
BI
IN
IN
UPPER ANTENNA FEEDS
TO ANTENNA TUNER
UAT1
76 OF 81
67 OF 72
8.0.0
051-00482
21
R6705_RF
2
1
L6700_RF
21
R6708_RF
21
R6703_RF
2
1 C6713_RF
21
3
JUAT1_RF
21
R6715_RF
2
1 C6726_RF
21
R6709_RF
1
19
814
10
17
181615131211976432
5
PPLXR_RF
2
1 C6728_RF
21
R6710_RF
2
1 C6711_RF
2
1 C6727_RF
50_UAT1_TUNER
50_UAT1
50_GNSS
50_UUAT_MLB_PLEXER50_UUAT_MLB
50_UUAT_LB_PLEXER
50_UAT_WLAN_2G_WEST_PLEXER
50_UAT_MB-HB-DRX-LNA_ANT 50_UUAT_HB_PLEXER
50_UAT_LB-DRX-LNA_ANT
50_UAT1_MATCH
50_GNSS_PLEXER
50_UAT1_TEST
PAGE_TITLE=UPPER ANTENNA FEEDSSYNC_DATE=04/17/2015
0.00
UP_RFFE0201MF
1/20W1%
56NH-100MA-3.9OHM0201UP_RFFENOSTUFF
0201MF
UP_RFFE
OMIT_TABLE
1/20W1%
0.00
UP_RFFE
1%
OMIT_TABLE
0201
0.00
1/20WMF
25V2%
NOSTUFF0201C0H-CERM
18PF
1
14
14
1
0.00
UP_RFFE
MF0201
1/20W1%
25VC0H-CERM
UP_RFFENOSTUFF
0201
2%18PF
MM8830-2600BF-RT-SM
UP_RFFE
0.00
1%1/20WMF0201UP_RFFE
OMIT_TABLELGA
ACFM-W312-AP1
NOSTUFF
0201UP_RFFE
2%25VC0H-CERM
18PF
14
C0H-CERM25V2%
UP_RFFENOSTUFF
0201
18PF
1%1/20WMF0201UP_RFFE
OMIT_TABLE
0.00
NOSTUFFUP_RFFE0201C0H-CERM
18PF2%25V
10
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI
BI
BI
BI
C R
GND
MB-HB
GNSS
GND
WIFI
EPAD
ANT
LBMLB
BI
PLACE C6806 AND C6807 NEAR THE QPOET
DESENSE CAPS
PMU: ET MODULATOR
051-00482
8.0.0
68 OF 72
77 OF 81
221491
131225242120158765
19
2326
1617
10
32313029282718114
23
QPOET_RF
2
1 C6807_RF
2
1 C6806_RF
2
1 C6805_RF
2
1 C6803_RF
2
1 C6804_RF
2
1 C6802_RF
2
1 C6801_RF
PP_VDD_MAIN
75_RFFE2_SDATA75_RFFE2_SCLK
SHIELD_ET_DAC_P
PP_VDD_MAIN
PP_1V8_LDO15PP_VPA_APT
PP_QPOET_VCC_PA
PP_PA_VBATT
SHIELD_ET_DAC_N
PMU: ET MODULATOR
LGA2103-601507-10
01005CERM16V2%27PF
5%
NP0-C0G16V
100PF
01005
20 16 4 3 1
6
6
19 18 14 13 12 7 4
0201-1
20%6.3VX5R-CERM
2.2UF
0201-1
20%2.2UF6.3VX5R-CERM
0201-1
20%
X5R-CERM
2.2UF6.3V20%
6.3V
2.2UF
X5R-CERM0201-10201-1
6.3VX5R-CERM
2.2UF20%
20 16 4 3 1
17 7
17 7
18
19 18
19 18
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
SDATASCLK
AMP_IN+
VDD_
VBAT
T
VDD_
LDO
VDD_
VBAT
T
VDD_
LDO
GND
VDD_
BUCK
VDD_
BUCK
VDD_
1P8
VCC_
PA_G
SMVC
C_PA
_GSM
VCC_
PA_E
TVC
C_PA
_ET
PA_V
BATT
USID_LSB
TRIM_18TRIM_14
AMP_IN-
IN
NCIN
IN
IN
MLB TEST POINTS
ICEFALL
DEFAULT FAST_BOOT[2:0]BOOT CONFIG
USB = 0X2
BBPMU
PCIE
PCIE GND
BASEBAND
SIM
78 OF 81
PMU_TO_BB_USB_VBUS_DETECT 1 3 20
AP_TO_ICEFALL_FW_DWLD_REQ 1 20
90_USB_BB_DATA_P 1 6 20
AP_TO_BB_COREDUMP 1 7
BB_TO_PMU_PCIE_HOST_WAKE_L 1 7
BB_TO_STROBE_DRIVER_GSM_BURST_IND1 7
NFC_TO_BB_CLK_REQ 1 3
90_PCIE_AP_TO_BB_REFCLK_N 1 6
90_PCIE_AP_TO_BB_REFCLK_P 1 6
BB_TO_LAT_ANT_DATA 1 7
BB_TO_LAT_ANT_SCLK 1 7
90_USB_BB_DATA_N 1 6 20
69 OF 72
8.0.0
051-00482
1
PP6981_RF
1
PP6912_RF
1
PP7502_RF
1
PP7501_RF
1
PP7500_RF
1
PP6980_RF
1
PP6979_RF
1
PP6978_RF
1
PP6977_RF
1
PP6974_RF
1
PP6973_RF
1
PP6972_RF
1
PP6969_RF
1
PP6953_RF
1
PP6900_RF
1
PP6905_RF
1
PP6945_RF
1
PP6938_RF
1
PP6931_RF
1
PP6930_RF
1
PP6929_RF
1
PP6926_RF
1
PP6925_RF
1
PP6924_RF
1
PP6923_RF
1
PP6921_RF
1
PP6920_RF
1
PP6919_RF
1
PP6918_RF
1
PP6917_RF
1
PP6933_RF
1
PP6914_RF
1
PP6913_RF
1
PP6911_RF
1
PP6909_RF
1
PP6908_RF
1
PP6907_RF
1
PP6906_RF
1
PP6971_RF
1
PP6970_RF
1
PP6916_RF
1
PP6915_RF
1
PP6936_RF
1
PP6935_RF
1
PP6904_RF
1
PP6903_RF
1
PP6942_RF
1
PP6941_RF
1
PP6940_RF
1
PP6939_RF
1
PP6944_RF
1
PP6943_RF
1
PP6952_RF
1
PP7000_RF
2
1 R6922_RF
2
1 R6921_RF
UART_BB_TO_WLAN_COEX
BB_TO_AP_RESET_DETECT_L
SE2_PWR_REQ
NFC_SWP_MUX
SE2_READY
SIM1_RST
SIM1_CLK
BB_JTAG_RST_L
UART_BB_TO_AOP_RXD
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
PMIC_RESOUT_L
RX-DSPDT_CTL2
AP_TO_BB_TIME_MARK
SPMI_DATA
SPMI_CLK
FBRX-DSPDT_CTL1
75_RFFE6_SCLK
75_RFFE6_SDATA
SHIELD_SLEEP_CLK_32K
SIM1_REMOVAL_ALARM
SWD_AP_TO_BB_CLK_BUFFER
75_RFFE1_SCLK
75_RFFE2_SDATA
75_RFFE2_SCLK
75_RFFE3_SDATA
75_RFFE3_SCLK
75_RFFE4_SDATA
75_RFFE1_SDATA
PP_1V8_LDO6
FAST_BOOT_SELECT0
FAST_BOOT_SELECT1
75_RFFE4_SCLK
UART_WLAN_TO_BB_COEX
FBRX-DSPDT_CTL2
50_MDM_PCIE_CLK
BB_TO_NFC_CLK
XO_OUT_D0_EN
SIM1_SWP
SE2_SWP
ICEFALL_LDO_ENABLE
SIM1_IO
SIM1_DETECT
TEST POINTS & BOOT CONFIG
P2MM-NSMSM
OMIT
P2MM-NSM
OMIT
SM
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
SM
OMIT
P2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
OMIT
SMP2MM-NSM
P2MM-NSM
OMIT
SM
P2MM-NSM
OMIT
SM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSM
OMIT
SM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
OMIT
SMP2MM-NSM
P2MM-NSMSM
OMIT
P2MM-NSMSM
OMIT
01005
1/32WMF
10K
RADIO_DEBUG
1%
NOSTUFF
1/32W
01005RADIO_DEBUG
MF
10K1%
20 7 1
7 1
20 1
20 1
20 1
20 7
20 7
20 6
7 1
3 1
20 3 1
6 3
13 7
7 1
6 3
6 3
12 7
19 18 7
19 18 7
6 3
7 3
6
9 7
16 7
16 7
13 7
13 7
9 7
9 7
20 7 6 5 4
7
7
9 7
20 7 1
12 7
6 3
3 1
6 3
20
20
20 1
20 7
20 7
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PPPP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
USID=0X5
USID=0XF
2G PA
TDD TRANSMIT
MB HB TDD PA
79 OF 81
70 OF 72
8.0.0
051-00482
2
1 C7017_RF
149811
434241403938373635343332313029
12 13
27
25
3
5
18202328262422211917151076421
16
TDDPA_RF
2
1 C7016_RF
2
1 C7015_RF
1138
910
17
612
542 13
GSMPA_RF
21
R7002_RF
2
1 C7006_RF
2
1 C7004_RF
2
1 C7005_RF
21
FL7001_RF
2
1 C7007_RF
2
1 C7010_RF
21
C7012_RF
2
1 C7014_RF
2
1 C7009_RF
21
C7011_RF
2
1 C7013_RF
2
1 C7001_RF
2
1 C7008_RF
19
50_XCVR1_TX_G1800_G1900_PA_IN
PP_1V8_LDO15
75_RFFE6_SDATA
75_RFFE6_SCLK
50_TX_G850_G900_PA_OUT
50_XCVR1_TX_G850_G900_PA_IN
600-OHM-25%-0.1A
27PF
NP0-C0G01005
16 14
19
18 17
9
50_TX_G1800_G1900_PA_OUT
PP_PA_VBATT PP_VPA_APT
50_TX_G850_G900_PA_OUT_M
50_TX_G1800_G1900_PA_OUT_M
MLB_PA_VBATT
50_TDD_PA_ANT_M50_XCVR0_TX_B38_B40_B41_PA_IN
PP_1V8_LDO15
75_RFFE6_SDATA
50_XCVR0_B34_B39_PA_PRX
50_XCVR0_B38_B40_B41_PA_PRX
50_XCVR0_TX_B34_B39_PA_IN
TDD_PAD_VCC1
2GPA_VBATT
PP_QPOET_VCC_PA
75_RFFE6_SCLK
SYNC_DATE=04/17/2015
PAGE_TITLE=TDD TRANSMIT
19 18 17 7
19 18 17 7
9
9
11
11
16V5%
01005NP0-C0G
27PF
LGA-1
AFEM-8065-AP1
01005
5.6PF+/-0.1PF16VNP0-C0G
NP0-C0G01005
16V
5.6PF+/-0.1PF
SKY77363LGA
MF0%
01005
1/32W
0.00
19
2.2UF
X5R-CERM
20%6.3V
0201-1
1.0UF6.3V20%
X5R0201-1
5%16V
0201-1
2.2UF
X5R-CERM
20%6.3V
0201-1
19 18 16 14 13 12 7 4
18PF25V2%C0H-CERM0201NOSTUFF
27PF
5%
0201NP0-C0G6.3V
0201
25V
NOSTUFF
C0H-CERM
18PF2%
19
NOSTUFF
C0H-CERM
18PF2%25V
0201
27PF
NP0-C0G0201
6.3V5%
25V
0201C0H-CERM
18PF
NOSTUFF
2%
19
7
18 17 7
19 18 13 12 7 4
9
0.1UF20%X5R-CERM6.3V
01005
18PF2%16VCERM01005
19 16 16
19
19 16
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI
IN
IN
IN
OUT
OUT
VBAT
T
ANTRFIN_HB
THRM_PAD
VIO
SDAT
A
SCLK
GND
RX_B34_B39
RX_B38_B40_B41
RFIN_MB
VCC1
VCC2
VCCVBATT
LBRFIN
HBRFIN
LBRFOUT
HBRFOUT
VIOSDATASCLK
GNDEPAD
OUT
IN
OUT
OUT
IN
BI
IN
IN
IN
USID=0XB
FDD TRANSMIT
824-915
MB/HB PA1710-2690
USID=0XD
LB PA824-915
1428-1463
1710-2690
USID=0XE
MLB PA1428-1463
21
R7111_RF
2
1 C7133_RF
21
R7104_RF
22272825
434241403938373635343332313029
24 23
2
20
26211917161513111098765431
18
12
14
MLBPA_RF
23
24
1040417
575655545352515049484746454443
8 9
3
2
25
26
12
423938373635343332313029282722212019171513116541
14
1618
LBPA_RF
2
1 C7126_RF
21
R7112_RF
2
1 C7101_RF
21
R7114_RF
2
1 C7128_RF
2
1 C7129_RF
2
1 C7127_RF
2
1R7131_RF
2
1 C7131_RF
2
1 C7132_RF2
1R7132_RF
2
1 C7130_RF2
1R7130_RF
26383729
87
575655545352515049484746454443
28 27
2119
517
31
3132
34
10
96424140393635333025242322201816151242
1113
14
MBHBPA_RF
2
1 C7117_RF
21
R7103_RF
2
1 L7123_RF
2
1
L7122_RF
6 5 3 2
1 4
RXFIL_RF
2
1 C7125_RF
2
1 C7124_RF
2
1 C7121_RF
2
1 C7120_RF
2
1R7108_RF
2
1R7110_RF
21
R7107_RF
21
R7113_RF
21
R7109_RF
2
1 C7106_RF
2
1 C7113_RF
2
1 C7103_RF
2
1 C7104_RF2
1 C7105_RF
2
1 C7114_RF
2
1 C7108_RF2
1 C7110_RF
21
R7105_RF
2
1 C7122_RF
21
R7106_RF
2
1 C7123_RF
21
R7101_RF
21
R7102_RF
2
1
C7111_RF
2
1 C7112_RF
2
1 C7118_RF
2
1 C7119_RF
0.033UF
18PF
25V
OMIT_TABLE
1.0PF
0.00
1%
50_LAT_MLB_G1800_G1900_PA_RX
OMIT_TABLE0201
50_UAT_MLB_COMBINER_IN
50_LAT_LB_COMBINER_IN
+/-0.1PF
20%
NOSTUFF
33PF
50_UAT_LB_PA_ANT
DEFAULT_RESISTOR_0.001OHM_2_1
1/32W
01005
DEFAULT_RESISTOR_0.001OHM_2_1
0.00
0201OMIT_TABLE
1.8NH+/-0.1NH-0.8A
+/-0.05PF
OMIT_TABLE0201
25VCERM
0.6PF
50_UAT_MLB_PA_ANT
PP_PA_VBATT
PP_PA_VBATT
LB_SNUBBER
MLB_TDD_SNUBBER
MBHB_SNUBBER
MBHB_FDD_PA_VBATT
MBHB_FDD_PAD_VCC1
50_XCVR0_B30_PA_PRX
50_XCVR0_B25_PA_PRX
50_XCVR0_B1_B4_PA_PRX
50_XCVR0_B4_PA_PRX
50_XCVR0_B7_PA_PRX
50_LAT_MLB_G1800_G1900_PA_RX
50_LAT_MB_HB_DRX
LB_PA_VBATT
LB_PAD_VCC1
PP_1V8_LDO15
50_XCVR0_B11_B21_PA_PRX
50_XCVR0_B11_B21_PA_DRX
PP_QPOET_VCC_PA
75_RFFE6_SCLK
75_RFFE6_SDATA
75_RFFE6_SCLK
75_RFFE6_SDATA
PP_1V8_LDO15
50_XCVR1_TX_B8_B20_B26_B27_PA_IN
PP_QPOET_VCC_PA
50_XCVR1_TX_B12_B13_B28_PA_IN
50_TDD_PA_ANT_M50_LAT_MB_HB_PA_ANT
50_UAT_MB_HB_CPL_IN
50_XCVR0_TX_B11_B21_PA_IN
50_UAT_MB_HB_PA_ANT50_XCVR0_B3_PRX-DSPDT_OUT
50_XCVR0_B40B_PA_PRX
50_XCVR0_TX_B7_B30_PA_IN
50_XCVR0_TX_B1_B3_B4_B25_PA_IN
50_TX_G1800_G1900_PA_OUT_M
PP_QPOET_VCC_PA
50_XCVR1_B12_B13_B20_B28_B29_PA_PRX
50_XCVR1_B8_B26_B27_PA_PRX
50_LB_DRX
50_TX_G850_G900_PA_OUT_M
PP_PA_VBATT
50_LAT_MLB_PA_ANT
50_LAT_MB_HB_COMBINER_IN
50_XCVR0_B40B_PA_PRX 50_XCVR0_B40_PA_PRX_EXT_FIL
MLB_PA_VBATT
75_RFFE7_SDATA75_RFFE7_SCLK
PP_1V8_LDO15PP_1V8_LDO15_PA
75_RFFE7_SCLK_PA
50_UAT_LB_COMBINER_IN
50_LAT_LB_PA_ANT
75_RFFE7_SDATA_PA
SYNC_DATE=04/17/2015
19 18 16 14 13 12 7 4
12 7
12 7
MF1/20W
C0H-CERM
18PF2%
0201
25V
NOSTUFF
19 18 16 14 13 12 7 4
19 18 17 7
19 18 17 7
12
12
13
2%
C0H-CERM0201
25V
1%
MF0201
0.00
1/20W
020122NH-3%-0.25A
2%18PF25VC0H-CERM0201
9
12
12
11
11
11
NOSTUFF
C0H-CERM0201
2%18PF25V
C0G
+/-0.05PF
OMIT_TABLE0201
25V
0.1PF
9
19 18 17 7
19 18 16 14 13 12 7 4
19 18 17 7
11
9
18
13
1/32WMF
0%
01005
0.00
4V20%0.033UF
01005
11
11
0201OMIT_TABLE
2NH+/-0.1NH-0.6A
OMIT_TABLELGA
HRPDAF025
LGA1
SKY78100-14
NOSTUFF01005
16V
33PF5%
NP0-C0G-CERM
01005MF
1/32W0%
0.00
10%10VCERM
180PF
01005
01005
10-OHM-1.1A
16V5%
NP0-C0G-CERM01005NOSTUFF NOSTUFF
20%X5R-CERM4V
01005
0.033UF
11
X5R-CERM01005
4V
19 11
1/32W1%
NOSTUFF
1.00
MF01005
NP0-C0G01005
68PF2%6.3V
NOSTUFF
6.3V
68PF2%
NP0-C0G01005NOSTUFF
NOSTUFF
01005
1.001%1/32WMF
NOSTUFF01005NP0-C0G
68PF2%6.3V
NOSTUFF
1%1/32W
1.00
MF01005
LGA
AFEM-8055-AP1
01005
2%CERM
0201
1.8NH+/-0.1NH-0.8A
NP0-C0G
1.0PF16V+/-0.1PF
01005
4.7NH-3%-0.270A01005
LGAQM21140
BAW-B40F-RX
25VC0H-CERM
18PF2%
NOSTUFF0201
25V18PF
0201
2%C0H-CERM
NOSTUFF
0201
25V18PF2%
11
18
18
DEFAULT_RESISTOR_0.001OHM_2_1
0%
01005MF1/32W
0.00
0%
01005MF1/32W
0.00
01005
0%
MF1/32W
0.00
0%
MF01005
1/32W
DEFAULT_RESISTOR_0.001OHM_2_1
0.00
MF
0%DEFAULT_CAPACITOR_1e+06pF_2_1
1.0UF6.3VX5R0201-1
20%
9
1.0UF20%
X5R0201-1
6.3V
1.0UF20%6.3VX5R
DEFAULT_CAPACITOR_1e+06pF_2_1
0201-1
18PF16V2%
01005CERM
18PF2%
01005CERM16V
9
18PF2%CERM16V
01005
01005CERM16V2%18PF
16V2%18PF
01005CERM
19 11
12
11
NOSTUFF
C0H-CERM
NOSTUFF
X5R-CERM
C0G201
16V18PF
19 18 16
19 18 16
11
19 18 16
19 18 16
11
19
19 18 16
19 18 16
19
18
1245678
B
D
8 7 6 5 4 3
C
B
A
C
A
D
2 1
3
IN
BI
IN
IN
BI
IN
BI
BI
OUT
IN
BI
BI
OUT
OUT
OUT
IN
BI
IN
IN
OUT
IN
IN
OUT
NC
NC
OUT
OUT
VIO
SCLK
SDAT
A
VBAT
T
GND
PRX
DRX
THRM_PAD
ANT2
ANT1
RFIN_MLB
VCC2
VCC1
RFIN0
SDAT
A
VIO
SCLK
GND
ANT2
ANT1
VBAT
T
VCC1
VCC2
RFIN1
THRM_PAD
2G_TX
LB_DIV
LB_RX0
LB_RX1
VLB_RX0
VLB_RX1
OUT
OUT
VBAT
T
VCC1
SDAT
A
VIO
TRX2
RFIN_MBRFIN_GSM VC
C2
RFIN_HB
SCLK
RX_B30RX_B25RX_B4RX_B7RX_B3RX_B1
MB_HB_DRXDCS_PCS_RX
TRX3
EPAD
ANT2
ANT1
GND
B40RXOUT
GND
B40ANT OUT
IN
IN
IN
IN
BI
BI
ICEFALL LDO
DEBUG CONNECTOR
SWP MUXICEFALL
SIM CARD CONNECTOR
VOLTAGE=1.80V
AP_TO_ICEFALL_FW_DWLD_REQ
SWD_AP_TO_MANY_SWCLK
SWD_AOP_BI_BB_SWDIO
90_USB_BB_DATA_N
VOLTAGE=1.20V
90_USB_BB_DATA_P
PMU_TO_BB_USB_VBUS_DETECT1 3 17
2
1R6904_RF
2
1 C7531_RF
2
1R6900_RF
2
1C7528_RF
2
1C7201_RF
2
1R7512_RF
2
1 C7530_RF
2
1 C7529_RF
21
R7511_RF
A2A1
B1
B2
SE2LDO_RF
2
1 C6901_RF
2
1DZ6904_RF
2
1DZ6903_RF
2
1DZ6905_RF
2
1DZ6902_RF
2
1
DZ6901_RF
21
R7510_RF
2
1 C6900_RF
2
1
DZ6900_RF1
6
9 8
2
7
161514131211105
3 J_SIM_RF
363534333231302928272625242322212019181716151413121110987654321
42
41
4039
3837
J_DEBUG
2
1R7506_RF
C1
D1C4D5B5
E1A5E5C5D2C3C2
B2
E3A2A1B1A3B3
D3
D4E4
E2
A4B4
SE2_RF
2
1 C7524_RF5
6
2
1
34
SWPMX_RF
2
1 C7525_RF
2
1 C7501_RF
2
1C7523_RF
SE2_PWR_REQ
PP1V8_ICEFALL_LDO
PP_VDD_MAIN
VDD_SE2_1V8
SE2_READY
NFC_SWP_R
SIM1_RST
SIM1_IO
SIM1_CLK
SIM1_SWPSIM1_IO
SIM1_CLK
AP_TO_BB_RESET_L
BB_JTAG_RST_L
SIM1_IO
PP_VDD_BOOST
VDD_SIM1
VDD_SIM1
SIM1_IO
ICEFALL_LDO_ENABLE
SE2_PRESENT
PP1V8_ICEFALL_LDOPP1V8_SDRAM
SE2_SWP
NFC_SWP_MUX
SIM1_SWP
NFC_SWPPP1V8_SDRAM
SIM1_RST
SE2_SWP
VDD_SE2_1V2
PP1V8_SDRAM
SIM1_DETECT
PP_1V8_LDO6
SIM1_SWP
SIM1_DETECT
SIM1_CLK
SIM1_RST
VDD_SIM1
PP1V8_ICEFALL_LDO
AP_TO_BBPMU_RADIO_ON_L
UART_WLAN_TO_BB_COEX
UART_BB_TO_WLAN_COEX
SIM1_DETECT
SIM1_SWP
PP_VDD_MAIN
SG-WLL-2-2
SIMESD202-B1-CSP01005ESD202-B1-CSP01005
SG-WLL-2-2
SIM
SG-WLL-2-2
SIMESD202-B1-CSP01005
SG-WLL-2-2
SIMESD202-B1-CSP01005
01005-112V-33PFSIM
17 1
1 0.00
0%1/32WMF
01005NFC
SIM
X5R-CERM
2.2UF20%6.3V
0201-1
20 17 7
20 17 7
SIM
02015.5V-6.2PF
20 17 7
20 17 7
F-RT-SMSIM
RCPT-WIDE-HSG-THICK-PIVOT
6 1
3 1
6 1
17 6 1
17 3 1
17 6 1
17 6
17 7 1
17 7 1
20 17 7
20 17 7
20 17 7
20 17 7
NOSTUFF
F-ST-SM
20-5857-036-001-829
1
OMIT_TABLENFC01005
1/32W
4.99K1%
MF
OMIT_TABLE
WLBGA
SE2
BCM20211CP
SE2
1UF20%10V
0201X5R
OMIT_TABLE
NLAS3257CMX2TCGDFN
SE2
0.1UF20%6.3VX5R-CERM01005
17 1
OMIT_TABLE
0.1UF
SE201005X5R-CERM20%6.3V
10V20%
0201X5R
OMIT_TABLE
1UF
SE2
SIMMF
1/32W
01005
1%100K
CERM6.3V5%
01005
100PF
OMIT_TABLE
MF
1%1/32W
01005
15.00K
SIM
1UF
OMIT_TABLE
X5R0201SE2
20%10V
NOSTUFF
10VX5R0201
20%
SE2
1UF
MF
10K1/32W1%
OMIT_TABLE01005
SE2
20%X5R-CERM0201-1
6.3V2.2UF
OMIT_TABLE SE2
6.3V20%
0201-1X5R-CERM
OMIT_TABLE
2.2UF
20 7 1
1%1/20WMF
NOSTUFF
0.00
0201
LP5907UVX-1.825-S
OMIT_TABLE
DSBGA
17 1
5%16VNP0-C0G01005SIM
100PF
17 1
20
20 16 4 3 1
20 17 7
20 17 7
20 17 20 17 7
20 17 7
4 1
20 5 4
20 5 4
17 1
20
20 17
20 17
20 7 1
20 17
20 7 1
20 17 7
17 7 6 5 4
20 17
20 5 4
20
20 17
20 16 4 3 1
1245678
B
D
8 7 6 5 4 3
C
B
A
C
A
D
2 1
3
IN
IN
NC
IN
IN
NC
BI
OUT
GND
SIM_DETECTSIM_DETECT_GND
CLK
VCC
RESET
IO
SWP
OUT
NC
OUT
OUT
BI
OUT
BI
NC
OUT
IN
IN
NC
OUT
IN
BI
IN
OUT
VDDO
_NFC
REG_PU
TCAL_CLK
SWP
NC
GPIO_1
DWP
DB_TXDB_RX
GPIO_0
SPI_MISOSPI_MOSI
VDDO
_HO
ST_2
VDDC
VDD1
P2
VDD1
P8
VDD1
P8_B
YP
VDDC
SPI_CLKSPI_CSSPI_INT
VSS
VSS
VSS
VSS
VER 1
B1
VCC
B0A
S
GND
IN
NC
NC
IN
GND
VOUT
VEN
VIN
NC
IN
NC