TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEADDRAWINGDRAWINGTABLE_TABLEOFCONTENTS_ITEM3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.81. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVEDI TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT3B7ECN REVBRANCHDRAWING NUMBERREVISIONSIZEDPROPRIETARY PROPERTY OF APPLE COMPUTER, INC.DRAWING TITLETHE POSESSOR AGREES TO THE FOLLOWING:Apple Inc.SHEETRDATEDACTHE INFORMATION CONTAINED HEREIN IS THE2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.PAGENOTICE OF PROPRIETARY PROPERTY:AC3 4 5 6DB8 7 6 5 4 2 11 2APPDCKDESCRIPTION OF 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K231 OF 1100000774489 A051-7863A.0.01 OF 110PRODUCTION RELEASED 2009-08-20LAST_MODIFIED=Wed Sep2 16:45:56 2009LAST_MODIFIED=Wed Sep2 16:45:56 20094655K2209/02/2009Thermal SensorsSyncDatePage(.csa)Contents(.csa) DateContents Sync PageABBREV=DRAWINGTITLE=K22Table of Contents 11 N/AMASTERSCH,K23,MLB4756K2209/02/2009HD AND OD FAN4857K2209/02/2009CPU FAN4961K2209/02/2009SPI ROM5062K2209/02/2009AUDIO: CODEC/REGULATOR5163SKIPAUDIO04/20/2009AUDIO: FILTER/BUFFER5264SKIPAUDIO04/20/2009AUDIO: Tweeter Amp 15365SKIPAUDIO04/20/2009AUDIO: Woofer Amp5466K2209/02/2009Audio: MLB to I/O Conn.5567SKIPAUDIO04/20/2009AUDIO: Detects/Grounding5668K2209/02/2009AUDIO: Mikey5769K2209/02/2009POWER SEQUENCING BLOCK DIAGRAM5870K2209/02/2009PGOOD and Power Sequencing5971K2209/02/2009VREG: PPVCORE_S0_CPU6072K2209/02/2009VREG: PPVCORE_S0_CPU6173K2209/02/20095V_S3 REGULATOR6274K2209/02/2009MCP CORE REGULATOR6375K2209/02/20091.5V DDR SUPPLY6476K2209/02/2009FSB VTT/3.3V S5 SUPPLIES6578K2209/02/2009S3 & S0 FETs6679K2209/02/20091V1 S5 POWER SUPPLY6784K2209/02/2009MXM PCIe, DP & Power6885K2209/02/2009MXM I/O6986K2209/02/2009MXM PCIE CAPS7087MARKVIDEO03/12/2009Display: Aliases7190MARKVIDEO03/12/2009Display: Int DP Connector7291MARKVIDEO03/12/2009Display: BiDiVi Mux17392MASTERN/ABIDIVI DP MUX27494MARKVIDEO03/12/2009Display: Ext DP Connector7595MARKVIDEO03/12/2009Display: BiDiVi Support76100K2209/02/2009CPU/FSB Constraints77101K2209/02/2009Memory Constraints78102K2209/02/2009MCP Constraints 179103K2209/02/2009MCP Constraints 280104K2209/02/2009Ethernet Constraints81105K2209/02/2009FireWire Constraints82106K2209/02/2009SMC Constraints83107MASTERN/AGraphics Constraints84108K2209/02/2009K22/K23 SPECIFIC CONSTRAINTS85109K2209/02/2009K22/K23 RULE DEFINITIONS86110K2209/02/2009K22/K23 ICT/FCTSystem Block Diagram 22 09/02/2009K22Power Block Diagram 33 09/02/2009K22BOM Configuration 44 N/AMASTERPower Conn / Alias 56 N/AMASTERHoles 67 N/AMASTERUNUSED SIGNAL ALIAS 78 09/02/2009K22Signal Aliases 89 N/AMASTERCPU FSB 910 09/02/2009K22CPU TEST & MISC. 1011 09/02/2009K22CPU POWER, GND, DECAPS 1112 09/02/2009K22eXtended Debug Port (XDP) 1213 09/02/2009K22MCP CPU Interface 1314 09/02/2009K22MCP Memory Interface 1415 09/02/2009K22MCP MEMORY CNTRL & MISC 1516 09/02/2009K22MCP PCIe Interfaces 1617 09/02/2009K22MCP Ethernet & Graphics 1718 09/02/2009K22MCP PCI & LPC 1819 09/02/2009K22MCP SATA & USB 1920 09/02/2009K22MCP HDA & MISC 2021 09/02/2009K22MCP Power & Ground 2122 09/02/2009K22MCP Standard Decoupling 2225 09/02/2009K22MCP Graphics Support 2326 09/02/2009K22SB Misc 2428 09/02/2009K22FSB/DDR3 Vref Margining 2529 09/02/2009K22MEMORY CAPS 2630 N/AMASTERDDR3 SO-DIMMs 0 & 2 2731 07/06/2009K22DDR3 SO-DIMM CONNECTOR B 2832 09/02/2009K22DDR3 SUPPORT AND BITSWAPS 2933 N/AMASTERPCI-E Wireless Connector 3034 05/28/2009K22Ethernet PHY (RTL8211CL) 3137 09/02/2009K22Ethernet Support 3238 09/02/2009K22ETHERNET CONNECTOR 3339 N/AMASTERFireWire LLC/PHY (XIO2213B) 3441 09/02/2009K22FW: 1394B MISC 3542 09/02/2009K22FIREWIRE CONNECTOR 3643 09/02/2009K22SATA Connectors 3745 09/02/2009K22EXTERNAL USB CONNECTORS 3846 09/02/2009K22Internal USB Connections 3947 09/02/2009K22SMC 4049 03/12/2009MARKVIDEOSMC Support 4150 03/12/2009MARKVIDEOLPC+SPI Debug Connector 4251 09/02/2009K22SMBus Connections 4352 N/AMASTERCPU/MXM CURRENT AND VOLTAGE SENSE 4453 09/02/2009K22MCP CURRENT AND VOLTAGE SENSE 4554 09/02/2009K22 II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1INTERNALJ9410PORTCONNFW643MXM CONNECTOR64-BitXDP CONNPG 10MEMORYPG 15 LPC+SPI CONNPG 56,57PG 51PG 53PG 55U4900J3100, J3200PG 31,32 PG 61PG 49J4780PG 47PG 20 2711J4720PG 21 SATA-A0LVDS OUTU3900 PG 39 PG 37 PG 17Mini PCI-EConnAirPortJ3400 U4100 PG 43 PG 41 GPIOsPG 34 PG 18DP OUTDVI OUTRGB OUTTMDS OUTJ8400HDMI OUT658413CLKPG 13SYNTHJ5100SerPrtADCSMCBSB B,0SPIU1000U1300PG 13PG 20SATA-A1E-NETMAGNETICSConnFireWireJ4300 CPU DIE CPU HEATSINKMXM - GPU DIE TEMP SENSORSJ5600, J5601, J5700PG 19 Boot ROMPG 21 Port80,serialPG 21 BluetoothPWRU1400CTRLPG 84PG 45J4510HDSATA1.05V/3GHZ.1.05V/3GHZ.ConnSATAODDConn PG 45J4520PG 94DISPLAYJ9002PG 90DISPINTEL CPU LCD TEMPLPCDDR3-1067MHZMAIN3.X GHZLGA775 - WOLFDALEPG 10-124 SO-DIMMsMCP7APG 47IR J4700PG 47CAMERA PG 47J47xxWHICH PORT?EXTERNAL J4610,4620,4630,4640ConnectorsUSB PG 47SD CARDSPIU6100MiscPG 24 USB(UP TO 12 DEVICES)910Fan MCP DIE AMBIENT INTAKE HARD DRIVEOPTICAL DRIVE MCP HEATSINK FAN CONN AND CONTROL POWER SENSE FSB INTERFACE GPU HEATSINK TEMP, CURRENT SENSEPOWER SUPPLY1333 MHZFSBDIMMNVIDIASATAUP TO 20 LANES3X16 PCI-ET3900 PG 39 ConnsAudioU3700 AudioU6201MikeyU6806CodecPG 19 PCI0RGMIIPCI-ESMBMIKEYHDA(UP TO FOUR PORTS)DIMMsPG 18 E-NETSpeakerAmpsU6400, U6500GBRTL8211CLGRLine InInt/Ext MicsHeadphonesJ6600,J6601,J6602,J6603051-7863A.0.02 OF 110 OF System Block DiagramSYNC_MASTER=K22 SYNC_DATE=09/02/2009 II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1PAGE 6MXM20" INVERTERCPU_COREPAGE 76PPVTT_S0_FSBPM_SLP_S3CPU_AVDDDDR3 MAIN MEMORYPPVCORE_CPUPAGE 71-72PAGE 74MCP, CPU FSB (VTT)MCP_PLLCPU_VCCPPP1V8_S0_REGMCP PP1V1_S5SMBUSPAGE 78 PPDDR_S3_REG PP5V_S3_REG CAMERAMEM_VTTAP PCIEAUDIO20" PANEL24" PANELFANSMCP_ENETFWAPETHERNETPAGE 78USBPP12V_S0MCPPAGE 76BTHDD20" PANELPP12V_S5CLOCKPAGE 38PP1V2_S3PAGE 75PP1V5_S0PP0V75_S0ENETPAGE 75PM_SLP_S3_OD12V_S5MAIN MEMORYMCP79 MEMTEMP SENSORCONTROLPP12V_S0_INVPP12V_S0_HDDHARD DRIVEPAGE 79PP5V_S0IRBOOT ROMAC/DC POWER SUPPLYPAGE 76MCP_COREDCM/FCMPAGE 80OPTICALMCP_VDD_AUXCMXMPAGE 74P5VS0_ENFIREWIRE PORTSAUDIOPPMCPCORE_S0_REGMXMFWPP3V3_S3P3V3S3_ENP3V3S0_ENPP3V3_S0PAGE 78AUDIOPAGE 42PP1V_S5SMCPP3V3_S5_REG3 OF 110051-7863A.0.0 OF Power Block DiagramSYNC_MASTER=K22 SYNC_DATE=09/02/2009TABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEMTABLE_BOMGROUP_ITEM II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1TABLE_BOMGROUP_ITEMBOM OPTIONS BOM NAME BOM NUMBERTABLE_BOMGROUP_HEADBOM OPTIONS BOM GROUPTABLE_BOMGROUP_HEADTABLE_BOMGROUP_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMCRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)TABLE_5_ITEMCRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)TABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_BOMGROUP_ITEMCRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)TABLE_5_ITEMTABLE_5_ITEMTABLE_5_ITEMTABLE_BOMGROUP_ITEMBOM VariantsCPUSBOM GROUPSCOMMONMCP -J SKU HAS INTEGRATED GPUGROUND 7654BOTTOMSIGNAL POWERGROUND 23TOP SIGNALPOWERSIGNAL SIGNALMCP -D SKU DOES NOTALTERNATESK23 PARTSBOARD STACK-UP(338S0489 - BLNK)4 OF 110051-7863A.0.0 OF K23,3P06GHZ_CPU,BASIC,MXM,K23_MXM PCBA,MLB,3.06 GHZ,K23 639-0509PCBA,MLB,DEV,K23 607-4427 DEVELOPMENT,DEV_GROUP630-9880 PCBA,MLB,ULTIMATE,K23 K23,3P33GHZ_CPU,BASIC,MXM,K23_MXMPCBA,MLB,3.16 GHZ,K23(INVESTIGATION) K23,3P16GHZ_CPU,BASIC,MXM,K23_MXM 639-0109PCBA,MLB,2.93 GHZ,K23 K23,2P93GHZ_CPU,BASIC,MXM,K23_MXM 639-0185630-9983 PCBA,MLB,BEST,K23 K23,3P0GHZ_CPU,BASIC,MXM,K23_MXM639-0394 K23,2P80GHZ_2M_CPU,BASIC,MXM,K23_MXM PCBA,MLB,2.80 GHZ-2M,K23PCBA,MLB,BETTER,K23COMMON,ALTERNATE,MCP7A,XDP,BETTER,MCP_ISL9563A,PRODUCTIONBOOT_MODE_USER,MEMRESET_HW,MEMRESET_MCP1 IC,EFI BOOTROM,K22/K23IC,MCP,MCP7A-DA,B03,35X35MM,BGA1437,DTIC,GMCP,MCP7A-JA,B03,35X35MM,BGA1437,DT CRITICALMLB LABEL,48.0X4.8IC,RTL8251CA,GIGE TRANSCEIVER, 48P TQFP U37002P83GHZ_CPUBOM ConfigurationSYNC_MASTER=MASTER SYNC_DATE=N/A820-2507 K23 1 MLB1 PCBF,K23,MLB341T0169 K23 U4900 1 IC,SMC,K23 CRITICAL630-9879 K23,2P80GHZ_CPU,BASIC,MXM,K23_MXMCPU 1 337S3766 3P06GHZ_CPUCRITICAL 1 U4100 338S0765 IC,XIO2211ZAY,1394B,167BGAU1400 338S0732 MXM CRITICAL 1051-7863 K23 1 SCH,K23,MLB SCH1CPU CRITICALWLF,SLB9J,PRQ,3.0G,65W,1333,E0,6M,LGA 3P0GHZ_CPU 1 CRITICAL CPU1 CRITICAL CPU WLF,SLB9K,PRQ,3.16G,65W,1333,E0,6M,LGACPU CRITICAL 1 WLF,SLB9J,PRQ,2.83G,65W,1333,E0,6M,LGA338S0694 1 CRITICALU6100 CRITICAL 341T0170U1400 IG 338S0731 11 CRITICAL X14 825-7122CPU CRITICALDEV_GROUP XDP_CONN,LPCPLUS,VREFMRGN,MCP_PWR_SENSE,MCP_CPU_TDIODE,PECI_SMB,MOJOMUXBASICMCP7A3P16GHZ_CPU3P33GHZ_CPU2P93GHZ_CPUCRITICAL1337S3727337S3807WLF,SLB9L,PRQ,3.33G,65W,1333,E0,6M,LGA 1337S3715337S3726337S3742WLF,SLB9L,PRQ,3.06G,65W,1333,E0,6M,LGAWLF,SLB9L,PRQ,2.93G,65W,1333,E0,6M,LGACRITICAL CPU 1 337S3745 WLF,QXXX,QS,2.80G,65W,1066,R0,3M,LGA 2P80GHZ_CPU1 CPU CRITICAL 337S3804 WLF,SLGU9,PRQ,2.80G,65W,1066,R0,2M,LGA 2P80GHZ_2M_CPU II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 15 OF 110051-7863A.0.0 OF SYNC_DATE=12/05/2008 SYNC_MASTER=K22BLANK PAGEIN G SDGSDINGSDININ II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1ON IN RUN AND SLEEPSILKSCREEN:4"S0" RAILS518-0352ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)PLACE AT J600."S5" RAILSGND RAILSONLY ON IN RUN"S3" RAILSEMC: C600,C626,C627,C628,C629,C630,C631SILKSCREEN:2SILKSCREEN:3SILKSCREEN:1sourced from buffer on csa 906 OF 110051-7863A.0.0 OF 453Q60221R603126Q6029876543214131211101J60021 C63121 C63021 C62321 C600213Q61021 C62621 C62421 C62721LED60221R60221LED60421R60421LED60321LED60521R60021LED60121R601MXM_GOODPP3V3_S0=PP3V3_S0_MCP_PLL_UFPP3V3_S3=PPSPD_S0_MEM_B=PP3V3_S0_VRD=PP3V3_S0_SMC_LS=PP3V3_S0_SMBUS_SMC_0_S0=PP5V_S3_1V8GPU_PRESENT_DRAINVIDEO_ON_L=PPSPD_S0_MEM_AGPU_PRESENT_RALL_SYS_PWRGD_R=PP3V3_S0_SMBUS_SMC_B_S0CORE_VOLTAGES_ONCORE_VOLTAGES_ON_R=PP3V3_S0_TSENS=PP3V3_S0_DPCONN=PP3V3_S0_SMBUS_SMC_MGMTPP5V_S3_REGMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMVOLTAGE=5VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 mmLCD_SHOULD_ONPP3V3_S0PP3V3_S0MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3VMAX_NECK_LENGTH=3 MM=PP3V3_FWRS0_FWXIOPP1V5_S0MIN_LINE_WIDTH=0.15MMMAKE_BASE=TRUEMAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.1MMVOLTAGE=1.5V=PP3V3_FW_FWPHY=PP1V5_FWRS0_FWXIO=PP3V3_S0_DP=PP5V_S0_LPCPLUS=PP1V5_S0_AUD_DIGLCD_PWMPPVTT_S0_FSB_REGMAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=PWRMAKE_BASE=TRUEVOLTAGE=1.2V=PP1V05_S0_MCP_PLL_UF=PP0V75_S0_MEM_VTT_A=PP1V05_S0_MCP_HDMI_VDD_R=PPVTT_S0_FSB_CPU=PP3V3_S0_VIDEO=PP3V3_S0_SMC=PPVTT_S0_XDP=PP1V8_S0_PGCMP=PP0V75_S0_MEM_VTT_B=PP1V05_S0_MCP_PEX_DVDD=SMB_ACDC_SCL=PP5V_S0_SATAPP12V_S5MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMMAKE_BASE=TRUEVOLTAGE=12V=PP12V_S5_REG=PPVIN_S5_P5VS3=PPVIN_S5_P3V3S5=PPVIN_S5_DDRREG=PP12V_S5_FWPP5V_S5_LDONET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.2 mmVOLTAGE=5VMAX_NECK_LENGTH=3 MMMIN_LINE_WIDTH=0.4 MMMAKE_BASE=TRUE=PP3V3_S3_MCP_GPIO=PP3V3_S3_VREFMRGNPP3V3_S3MAKE_BASE=TRUENET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3VMIN_LINE_WIDTH=0.5 mmMAX_NECK_LENGTH=3 MMLCD_BKL_ONPP12V_S0PM_ACDC_PS_ONPPMCPCORE_S0_REGMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmVOLTAGE=1.05VMAKE_BASE=TRUENET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM=PP5V_S3_CAMERA=PPDDR_S3_PGCMPPM_SLPS3_BUF2_L=PP3V3_S5_SMBUS_SMC_BSAPPVCORE_S0_CPUVOLTAGE=1.1VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MMNET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.3MMMAX_NECK_LENGTH=3 MM=PP3V3_S5_P1V1S5=PPVIN_S0_MCPCOREPP12V_S0NET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmMAKE_BASE=TRUEVOLTAGE=12VMAX_NECK_LENGTH=3 MM=PP12V_S5_PWRCTLPP3V3_S3ITS_PLUGGED_IN=PP3V3_S5_SMCUSBMUX=PP5V_S5_AVREFPP3V3_S5_REGITS_ALIVE=PP3V3_S0_MCPTHMSNS=PP3V3_S5_MEMRESET=PP3V3_S5_LPCPLUS=PP3V3_S5_SMC=PP3V3_S5_RTC_D=PP3V3_S5_ROM=PP1V05_S5_MCP_VDD_AUXC=PP1V1_S5_ENET_FETPP1V1_S5_REGMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMMAKE_BASE=TRUEMIN_LINE_WIDTH=0.5 mmVOLTAGE=1.1V=PP5V_S3_S0FETPPVTT_S3_DDR_BUFMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.75VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.3 MMPP12V_S5=SMB_ACDC_SDA=PPVCORE_S0_MCP=PP3V3_S5_MCP_GPIO=PP3V3_S5_MCP=PPDDR_S3_S0FET NET_SPACING_TYPE=PWRMAKE_BASE=TRUEPPVTT_S0_DDR_LDOMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mmMAX_NECK_LENGTH=3 MMVOLTAGE=0.75V=PPVCORE_S0_CPU=PP1V05_S0_MCP_AVDD_UF=PP1V05_S0_MCP_SATA_DVDD0=PP3V3_S0_MCP=PP3V3_S3_MCPREG=PP3V3_S3_MINI=PPVTT_S3_DDR_BUF=PP1V5_S3_MEMRESET=PP1V5_S3_MEM_B=PP3V3_S3_BT=PP3V3_S3_SMC=PP3V3_S3_SMBUS_SMC_A_S3=PP3V3_S5_ENET_FET=PP3V3_S5_S0FET=PP3V3R1V8_S0_MCP_IFP_VDD_R=PP3V3_S5_S3FET=PP3V3_S5_PWRCTL=PP3V3_S0_MXM=PP3V3_S0_MCP_VPLL_UF=PP3V3_S0_AUDIO=PP3V3R1V5_S0_MCP_HDA=PP3V3_S0_SMBUS=PP3V3_S0_XDP=PP3V3_S0_SATALED=PPVTT_S0_VTTCLAMP=PP3V3_S0_FAN=PP3V3_S0_MCP_GPIO=PP5V_S0_AUDIO=PP12V_S0_FAN=PP12V_S0_AUDIO_SPKRAMP=PP12V_S0_VRD=PPV_S0_MXM_PWR=PPVIN_S0_PPVTT_FSB=PP12V_S0_LCD=PP5V_S0_DP_AUX_MUX=PP5V_S0_VRD=PP5V_S0_MXM=PP5V_S0_SATA=PP5V_S0_PWRCTLPP5V_S0MAKE_BASE=TRUEMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 MMNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMVOLTAGE=5VPP3V3_S5_REGMAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3VMAKE_BASE=TRUE=PP5V_S3_USB=PP5V_S3_VTTCLAMP=PP5V_S3_PWRCTL=PP5V_S3_MCPREG=PP1V5_S0_CPU_VCCPLL=PP5V_S3_IR=PP5V_S3_DDRREG=PP3V3_S3_SDCARD=PPVTT_S0_CPU=PP1V05_S0_MCP_FSB=PP1V8R1V5_S0_MCP_MEM=PP1V5_S3_MEM_A PPDDR_S3_REGMAKE_BASE=TRUEMAX_NECK_LENGTH=3 MMMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=PPDDR_MEMVOLTAGE=1.5VMIN_NECK_WIDTH=0.2 mm=PP3V3_S0_PWRCTL=PP3V3_S0_ODDPP1V8_S0_REGMAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.1 MMNET_SPACING_TYPE=PWRMIN_LINE_WIDTH=0.4 mmVOLTAGE=1.8VMAKE_BASE=TRUE=PP5V_S0_ISENSENET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.1MMMAX_NECK_LENGTH=4.1 MMMAKE_BASE=TRUEGNDVOLTAGE=0VPower Conn / AliasSYNC_DATE=N/A SYNC_MASTER=MASTER70GREEN-3.6MCD2.0X1.25MM-SM402MF-LF5%1K1/16W9GREEN-3.6MCD2.0X1.25MM-SM402MF-LF1K1/16W5%2.0X1.25MM-SMGREEN-3.6MCDGREEN-3.6MCDDEVELOPMENT2.0X1.25MM-SMDEVELOPMENT1K5%1/16WMF-LF402MF-LF1/16W4021K5%2.0X1.25MM-SMGREEN-3.6MCDSOT-3632N7002DW-X-G904021K1/16W5%MF-LF2N7002DW-X-GSOT-363CRITICAL76833-0100M-RT-TH0.001UF40210%X7R50VX7R0.001UF10%50V40210UF20%10VX5R80550VX7R40210%0.001UF2N7002SOT23-HF10.001UF40210%X7R50V10UF10%16V1210X5R-CERM70 50 49 90.001UF40250V10%X7R6 7825110 6 78327155 50523152559452110 736 786 78415443 42 414192 91 90 87 955162907625312612 119054 53 5013703228 255245 667673767543762129110 6 78906 7054 7447705272 7179746 7078 70 38110 6 7846506 7655335150 492861 5125 223879787565225 2220 1825 227875122520 2825 22 217434293332 30 108475052387826787084 852668 67 66 65 64 6225 215213457857 5621 19 1868 6257 566771 70537690718445 6110 786 76467870741247754771 55 50 1025 22 1430 25 1631 30 108 75704553 II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1Rear CoverStandoffs (860-1255)CPU Heatsink4mm Plated Holes (998-0850)EMC Springs (870-1125)DIMM CONNECTOR NUTSNuts (805-9582)Backer PlateMCP HeatsinkNuts (835-0269)7 OF 110051-7863A.0.0 OF 1SDF07191SDF07181SDF07171SDF07151SDF07141NUT07501NUT07511NUT07521NUT07531NUT07031NUT07021NUT07011NUT07001SC07001SC07011SDF07131ZH07031ZH07021ZH07011ZH0700SYNC_MASTER=MASTER SYNC_DATE=N/AHolesSTDOFF-6.8OD15.0H-1.56-THCRITICAL CRITICALSTDOFF-6.8OD15.0H-1.56-THCRITICALSTDOFF-6.8OD15.0H-1.56-THCRITICALSTDOFF-6.8OD15.0H-1.56-TH STDOFF-6.8OD15.0H-1.56-THCRITICALCRITICALNUT-4.25OD1.4H-1.40-3.25-THCRITICALNUT-4.25OD1.4H-1.40-3.25-THCRITICALNUT-4.25OD1.4H-1.40-3.25-THCRITICALNUT-4.25OD1.4H-1.40-3.25-THNUT-6.5OD1.4H-1.56-3.8-THCRITICAL CRITICALNUT-6.5OD1.4H-1.56-3.8-TH NUT-6.5OD1.4H-1.56-3.8-THCRITICAL CRITICALNUT-6.5OD1.4H-1.56-3.8-THCLIP-SM1EMI-SPRINGCRITICAL CRITICALEMI-SPRINGCLIP-SM1STDOFF-6.8OD15.0H-1.56-THCRITICAL4P75R4OMIT4P75R4OMIT OMIT4P75R4 4P75R4OMIT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1NC ON UNUSED ALIASESMCP HAS INTERNAL 15K PULL-DOWNSUNUSED MEMORY SIGNALSUNUSED GMUX JTAG FROM MCP8 OF 110051-7863A.0.0 OF TP_PE4_CLKREQ_LMAKE_BASE=TRUE NO_TEST=TRUENC_PE4_CLKREQ_LTP_ENET_PWRDWN_LUSB_MINI_NMAKE_BASE=TRUE NO_TEST=TRUENC_USB_MINI_NTP_USB_10PTP_USB_10NMAKE_BASE=TRUE NO_TEST=TRUENC_USB_MINI_P USB_MINI_PMAKE_BASE=TRUENC_USB_EXCARD_PNO_TEST=TRUEMAKE_BASE=TRUENC_USB_EXCARD_NNO_TEST=TRUEUSB_EXCARD_PUSB_EXCARD_NNO_TEST=TRUENC_ENET_INTR_LMAKE_BASE=TRUENC_MCP_KBDRSTIN_LNO_TEST=TRUE MAKE_BASE=TRUETP_PCIE_PE4_D2RNNO_TEST=TRUENC_PCIE_EXCARD_D2R_PMAKE_BASE=TRUENO_TEST=TRUE MAKE_BASE=TRUENC_MCP_PCI_GNT0_LTP_PCI_ADMAKE_BASE=TRUENC_PCI_ADNO_TEST=TRUETP_PCI_ADMAKE_BASE=TRUENC_PCI_ADNO_TEST=TRUEEXCARD_CLKREQ_L NC_EXCARD_CLKREQ_LMAKE_BASE=TRUE NO_TEST=TRUEPCIE_CLK100M_EXCARD_N NC_PCIE_CLK100M_EXCARD_NMAKE_BASE=TRUE NO_TEST=TRUEPCIE_CLK100M_EXCARD_P NC_PCIE_CLK100M_EXCARD_PMAKE_BASE=TRUE NO_TEST=TRUEODD_PWR_EN_L NC_ODD_PWR_EN_LNO_TEST=TRUE MAKE_BASE=TRUENC_USB_10PMAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUENC_USB_10NNO_TEST=TRUETP_SB_A20GATE NC_SB_A20GATEMAKE_BASE=TRUE NO_TEST=TRUETP_PE4_PRSNT_LMAKE_BASE=TRUENC_PE4_PRSNT_LNO_TEST=TRUEPCIE_EXCARD_PRSNT_LNO_TEST=TRUENC_PCIE_EXCARD_PRSNT_LMAKE_BASE=TRUETP_PCIE_CLK100M_PE6N NC_PCIE_CLK100M_PE6NNO_TEST=TRUE MAKE_BASE=TRUETP_PCIE_CLK100M_PE4NTP_PCIE_CLK100M_PE4PNO_TEST=TRUE MAKE_BASE=TRUENC_PCIE_CLK100M_PE6P TP_PCIE_CLK100M_PE6PTP_PCIE_CLK100M_PE5NTP_PCIE_CLK100M_PE5PTP_PCI_PARTP_PCI_INTZ_LTP_PCI_INTW_LTP_PCI_GNT1_LTP_PCI_GNT0_LTP_PCI_FRAME_LTP_PCI_CLK1TP_PCI_CLK0TP_PCI_C_BE_LPCIE_EXCARD_D2R_NTP_PCIE_PE4_R2D_CNNC_PCIE_PE4_R2D_CPNO_TEST=TRUE MAKE_BASE=TRUEPCIE_EXCARD_D2R_PMAKE_BASE=TRUENC_USB_TPAD_PNO_TEST=TRUETP_PCIE_PE4_D2RPNO_TEST=TRUE MAKE_BASE=TRUENC_PCIE_PE4_D2RNNC_PCIE_PE4_D2RPNO_TEST=TRUE MAKE_BASE=TRUEPCIE_EXCARD_R2D_C_PNO_TEST=TRUENC_MEM_A_CLK2PMAKE_BASE=TRUEGMUX_JTAG_TMSMAKE_BASE=TRUE NO_TEST=TRUENC_MCP_BUF_SIO_CLKNC_PCI_IRDY_LNO_TEST=TRUE MAKE_BASE=TRUENO_TEST=TRUE MAKE_BASE=TRUENC_MCP_TV_DAC_RSETCRT_IG_G_Y_YTP_PCI_ADNO_TEST=TRUE MAKE_BASE=TRUENC_PCI_FRAME_LNO_TEST=TRUENC_ENET_PWDWN_LMAKE_BASE=TRUEMAKE_BASE=TRUENC_MCP_CLK27M_XTALINNO_TEST=TRUENC_PCI_CLK0NO_TEST=TRUE MAKE_BASE=TRUEMAKE_BASE=TRUE NO_TEST=TRUENC_PCI_CLK1USB_TPAD_NNO_TEST=TRUE MAKE_BASE=TRUENC_CRT_IG_HSYNCCRT_IG_B_COMP_PBCRT_IG_HSYNCCRT_IG_R_C_PRMCP_CLK27M_XTALINMCP_TV_DAC_VREFNC_PCI_ADNO_TEST=TRUE MAKE_BASE=TRUENO_TEST=TRUE MAKE_BASE=TRUENC_PCI_PERR_LNO_TEST=TRUENC_MCP_CLK27M_XTALOUTMAKE_BASE=TRUENC_MCP_GPIO_18MAKE_BASE=TRUE NO_TEST=TRUENC_PCI_INTW_LMAKE_BASE=TRUE NO_TEST=TRUENC_PCI_INTY_LMAKE_BASE=TRUE NO_TEST=TRUEMAKE_BASE=TRUENC_PCI_INTZ_LNO_TEST=TRUEMCP_TV_DAC_RSETMCP_CLK27M_XTALOUTTP_PCI_IRDY_LTP_MCP_RGB_VSYNCTP_MCP_RGB_HSYNCTP_PCI_C_BE_LTP_ENET_INTR_LTP_MCP_KBDRSTIN_LNO_TEST=TRUE MAKE_BASE=TRUENC_MCP_TV_DAC_VREFMAKE_BASE=TRUENC_MCP_RGB_VSYNCNO_TEST=TRUENO_TEST=TRUE MAKE_BASE=TRUENC_MCP_RGB_HSYNCTP_MCP_BUF_SIO_CLKNO_TEST=TRUENC_LPC_DRQ0_LMAKE_BASE=TRUETP_LPC_DRQ0_LTP_PCI_PERR_LNO_TEST=TRUENC_MEM_A_CLK2NMAKE_BASE=TRUEMAKE_BASE=TRUE NO_TEST=TRUENC_MEM_A_CLK5P TP_MEM_A_CLK5PNO_TEST=TRUE MAKE_BASE=TRUENC_MEM_A_CLK5NMAKE_BASE=TRUE NO_TEST=TRUENC_GMUX_JTAG_TCK_L GMUX_JTAG_TCK_LNC_GMUX_JTAG_TDONO_TEST=TRUE MAKE_BASE=TRUENC_GMUX_JTAG_TDINO_TEST=TRUE MAKE_BASE=TRUEGMUX_JTAG_TDINO_TEST=TRUENC_GMUX_JTAG_TMSMAKE_BASE=TRUEMAKE_BASE=TRUE NO_TEST=TRUENC_PCI_C_BE_LCRT_IG_VSYNCMAKE_BASE=TRUENC_MEM_B_CLK2P NO_TEST=TRUE TP_MEM_B_CLK2PMAKE_BASE=TRUENC_MEM_B_CLK2N NO_TEST=TRUE TP_MEM_B_CLK2NMAKE_BASE=TRUENC_MEM_B_CLK5P NO_TEST=TRUETP_PCI_INTY_LNO_TEST=TRUE MAKE_BASE=TRUENC_MLB_RAM_SIZENO_TEST=TRUE MAKE_BASE=TRUENC_CRT_IG_R_C_PRTP_MEM_B_CLK5PNC_CRT_IG_VSYNCNO_TEST=TRUE MAKE_BASE=TRUETP_PCI_DEVSEL_LTP_PCI_SERR_LNO_TEST=TRUE MAKE_BASE=TRUENC_PCI_SERR_LNO_TEST=TRUE MAKE_BASE=TRUENC_PCI_DEVSEL_LTP_MEM_A_CLK5NNO_TEST=TRUE MAKE_BASE=TRUENC_CRT_IG_G_Y_YNO_TEST=TRUENC_CRT_IG_B_COMP_PBMAKE_BASE=TRUENC_PCIE_CLK100M_PE4PMAKE_BASE=TRUE NO_TEST=TRUEPCIE_EXCARD_R2D_C_NTP_PCI_RESET1_LTP_PCI_STOP_LMAKE_BASE=TRUENC_PCIE_CLK100M_PE5PNO_TEST=TRUENC_PCIE_CLK100M_PE5NMAKE_BASE=TRUE NO_TEST=TRUETP_PCI_TRDY_LNC_PCIE_CLK100M_PE4NNO_TEST=TRUE MAKE_BASE=TRUETP_MEM_A_CLK2NTP_MEM_A_CLK2PMAKE_BASE=TRUE NO_TEST=TRUENC_PCI_TRDY_LMAKE_BASE=TRUENC_PCI_GNT1_LNO_TEST=TRUENC_PCI_STOP_LMAKE_BASE=TRUE NO_TEST=TRUETP_MEM_B_CLK5NMAKE_BASE=TRUENC_PCI_INTX_LNO_TEST=TRUENO_TEST=TRUE MAKE_BASE=TRUENC_PCI_C_BE_LTP_MLB_RAM_SIZETP_MCP_GPIO_18NO_TEST=TRUEMAKE_BASE=TRUENC_MEM_B_CLK5NTP_PCIE_PE4_R2D_CPGMUX_JTAG_TDOUSB_TPAD_PNO_TEST=TRUE MAKE_BASE=TRUENC_PCIE_PE4_R2D_CNNC_PCIE_EXCARD_D2R_NMAKE_BASE=TRUE NO_TEST=TRUENO_TEST=TRUENC_PCIE_EXCARD_R2D_C_PMAKE_BASE=TRUENO_TEST=TRUENC_PCIE_EXCARD_R2D_C_NMAKE_BASE=TRUEMAKE_BASE=TRUE NO_TEST=TRUENC_USB_TPAD_NTP_PCI_INTX_LMAKE_BASE=TRUENC_PCI_PARNO_TEST=TRUEMAKE_BASE=TRUENC_PCI_RESET1_LNO_TEST=TRUEUNUSED SIGNAL ALIASSYNC_DATE=09/02/2009 SYNC_MASTER=K22171820202020202017191917171721211717171717171717191919191919191919171717171719181920181818181818181918181918212119191617191815151916191916171919191515162117172019OUTOUT ININININOUTOUTININ OUTOUTOUTOUTOUT ININININININOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUT INOUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1MCP_CPUVDD_EN WILL ASSERT AFTER MCP_PS_PWRGD IS UPLPC Reset (Unbuffered)PCIE Reset (Unbuffered)(P50 HAS A 100K TO GROUND)Platform Reset ConnectionsSIGNAL ALIASPEG Slot SupportK22/K23 Use one GPIO for both ports 2&3 OCUSB PORT 2 AND 3 (C AND D) SHARE OVER-CURRENT WITH PORT 2PREVIOUSLY, PORT 3 HAD ITS OWN BUT EFI MAPS THAT TO EXPRESSCARDSEE RDAR://62504249 OF 110051-7863A.0.0 OF 2 1R99321R9122 1R9112 1R9102 1R93021R9552 1R9832 1R9812 1R9922 1R9902 1R9912 1R97121 C9732 1R9252 1R9722 1R9262 1R9292 1R900PEG_R2D_C_PMAKE_BASE=TRUEPEG_D2R_NMAKE_BASE=TRUEMAKE_BASE=TRUEHPLUG_DET2MAKE_BASE=TRUEUSB_EXTC_OC_LMCP_CPUVDD_ENCARDREADER_PLT_RST_LPCA9557D_RESET_LMEM_VTT_EN_RPM_SLPS3_BUF1_LMAKE_BASE=TRUEDEBUG_RESET_L=PEG_D2R_NMAKE_BASE=TRUEPEG_R2D_C_N =PEG_R2D_C_N=MCP_MII_RXER=MCP_MII_COLFW_RESET_LSMC_LRESET_LLPC_CLK33M_LPCPLUS=MCP_MII_CRSMCP_MII_NUMAKE_BASE=TRUEPEG_CLK100M_N=DVI_HPD_GMUX_INT=PEG_R2D_C_P=PEG_D2R_PPEG_PRSNT_LMINI_RESET_LMAKE_BASE=TRUEPEG_D2R_PGPU_CLK100M_PCIE_NMAKE_BASE=TRUETP_MLB_RAM_VENDORMAKE_BASE=TRUEPM_SLPS3_BUF2_L PM_SLP_S3_LMAKE_BASE=TRUEMXM_DETECT_LMCP_CPU_VLDPCIE_FW_PRSNT_LLPC_RESET_LMXM_GOODMAKE_BASE=TRUEPCIE_MINI_PRSNT_LDDRVTT_ENPEG_RESET_LPCIE_RESET_LLPC_CLK33M_SMCPM_CLK32K_SUSCLK PM_CLK32K_SUSCLK_RLPC_CLK33M_SMC_RUSB_EXTD_OC_LGPU_CLK100M_PCIE_PMAKE_BASE=TRUEPEG_CLK100M_PSYNC_DATE=N/A SYNC_MASTER=MASTERSignal Aliases1/16W0MF-LF5%40247402100K5%1/16WMF-LF402MF-LF1/16W5%155%1/16W402MF-LF1521PLACEMENT_NOTE=Place close to U140040222MF-LF5%1/16W215%MF-LF40247K1/16W51494134872978 7549 10351 10349 103PLACEMENT_NOTE=Place close to U140033MF-LF5%1/16W402PLACEMENT_NOTE=Place close to U1400402335%1/16WMF-LF103 19MF-LF5%04021/16W1/16WMF-LF4025%05%MF-LF01/16W4024025%MF-LF01/16WNO STUFF40210%CERM-X5R6.3V0.47UFMF-LF1/16W5%PLACEMENT_NOTE=Place close to U1400 334025%1/16W33MF-LF402PLACEMENT_NOTE=Place close to U140033MF-LF1/16W5%402PLACEMENT_NOTE=Place close to U140040222MF-LF5%1/16W1719103 19103 21402MF-LF20K5%1/16W17 851717102 87102 87 17171717102 86102 861717 86 10286 10220 4694 73181818182170 50 49 6 102 21646BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIININININBIBIBIBIBIBIBIBIININININA_34*A_35*REQ_4*A_7*DBSY*INIT*A_20*A20M*ADS*ADSTB_0*ADSTB_1*A_3*A_4*A_6*A_8*A_10*A_14*A_15*A_16*A_17*A_18*A_19*A_21*A_22*A_23*A_24*A_25*A_26*A_27*A_28*A_29*A_30*A_31*A_32*A_33*BCLK_0BCLK_1BNR*BPRI*BR_0*DEFER*DRDY*FERR_PBE*IERR*IGNNE*LINT0LINT1REQ_0*REQ_1*REQ_3*RS_0*RS_1*RS_2*SMI*STPCLK*REQ_2*A_13*A_12*A_11*A_9*A_5*LOCK*RESET*TRDY*HIT*HITM*CONTROLADDR GROUP0(1 OF 7)CLKSBADDR GROUP1INOUTINININININININBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBID_11*D_10*D_9*D_1*D_2*D_8*D_7*D_6*DBI_0*DBI_1*DBI_2*DBI_3*DSTBN_0*DSTBN_1*DSTBN_2*DSTBN_3*DSTBP_0DSTBP_1DSTBP_2DSTBP_3D_0*D_3*D_4*D_5*D_12*D_13*D_14*D_15*D_16*D_17*D_18*D_19*D_20*D_21*D_22*D_23*D_24*D_25*D_26*D_27*D_28*D_29*D_30*D_31*D_32*D_33*D_34*D_35*D_36*D_37*D_38*D_39*D_40*D_41*D_42*D_43*D_44*D_45*D_46*D_47*D_48*D_49*D_50*D_51*D_52*D_53*D_54*D_55*D_56*D_57*D_58*D_59*D_60*D_61*D_62*D_63*(2 OF 7) II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1PLACE W/ A TESTPOINT W/ A GND NEARBYCPU GTLREF(63.5% OF 1.2V) = 0.762VGTLREF VOLTAGE SHOULD BE 0.635 * VTT10 OF 110051-7863A.0.0 OF 21R104421R104321R100121 C10422 1R104521 C104321R104121 C104021R104021 C10412 1R1042C17G19E12B9A16G20G12C8C20D19G11A8A11A10A7B22A22A19B19B7B21C21B18A17B16C18B15C14C15A14B6D17D20G22D22E22G21F21E21F20E19A5E18F18F17G17G18E16E15G16G15F15C6G14F14G13E13D13F12F11D10E10D7A4E9F9F8G9D11C12B12D8C11B10C5B4J1000E3M3P2A3F5B3G23J6K6M6J5K4C3L1K1P3N2AB2E4D4R3C1G7B2F3G8C2G28F28AD5R6D2T5R4M4L4M5P6AJ6AJ5AH5AH4AG5AG4L5AG6AF4AF5AB4AC5AB5AA5AD6AA4Y4Y6W6AB6W5V4V5U4U5T4U6K3J100021R100421R100321R1000CPU_GTLREF_DIV1PPCPU_VTT_OUT_LEFTFSB_A_LCPU_INTRFSB_ADSTB_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_REQ_LCPU_SMI_LFSB_REQ_LFSB_REQ_LFSB_REQ_LFSB_DRDY_LFSB_CLK_CPU_NFSB_CLK_CPU_PFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_ADSTB_LCPU_A20M_LFSB_A_LFSB_REQ_LCPU_GTLREF_DIV0 CPU_GTLREF0PPCPU_VTT_OUT_LEFTFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_DSTB_L_PFSB_DSTB_L_PFSB_DSTB_L_NFSB_DSTB_L_NFSB_DINV_LFSB_DINV_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_A_LFSB_LOCK_LFSB_D_LFSB_D_LFSB_DSTB_L_NCPU_IGNNE_L=PPVTT_S0_CPUFSB_ADS_LFSB_D_LFSB_D_LFSB_DINV_LFSB_DSTB_L_PFSB_D_LFSB_D_LFSB_D_LFSB_DINV_LFSB_DSTB_L_NFSB_DSTB_L_PFSB_BNR_LCPU_GTLREF1FSB_D_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_TRDY_LFSB_RS_LPPCPU_VTT_OUT_RIGHTFSB_RS_LFSB_RS_LCPU_INIT_LCPU_IERR_LFSB_CPURST_LFSB_HITM_LFSB_HIT_LCPU_NMICPU_STPCLK_LPPCPU_VTT_OUT_RIGHTCPU_FERR_LFSB_BREQ0_LFSB_DBSY_LFSB_DEFER_LFSB_BPRI_LPPCPU_VTT_OUT_LEFTSYNC_DATE=09/02/2009CPU FSBSYNC_MASTER=K22402MF-LF1/16W1%1001/16W1%40257.6MF-LF1/16W624025%MF-LF10%402CERM6.3V1UF1/16W101%402MF-LF50V40210%220PFNOSTUFFX7R-CERM402100MF-LF1/16W1%4021UF6.3V10%CERM1%MF-LF40257.61/16WNOSTUFF220PF50VX7R-CERM40210%402MF-LF1%101/16WBGA-NOHSKWOLFDALE-SKT-1CRITICALCPU14 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 100BGA-NOHSKWOLFDALE-SKT-1CRITICALCPUMF-LF5%4021/16W2001/16W5%MF-LF624021/16W624025%MF-LF14 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10013 14 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10014 10010 11 1211 29 10010 11 126 50 55 7111 29 10010 11 1210010 11 1210 11 12ININOUTININBIBIBIBIBIBIINBITESTHI_0BPM_0*BPM_1*BPM_2*BPM_3*BPM_4*BPM_5*DBR*FC3FC8FC10FC15FC18FC23FC26FC27/BPMB0*FC28/TDO_MFC29FC30FC31FC32FC33FC34FC35FC36FC37FC39FC40FC41/BPMB1*ITPCLK_0ITPCLK_1RSVD_A20RSVD_AC4RSVD_AE4RSVD_AE6RSVD_AH2RSVD_D1RSVD_D14RSVD_D16RSVD_E5RSVD_E6RSVD_E7RSVD_E23RSVD_F23RSVD_F29RSVD_G6RSVD_J3RSVD_N4RSVD_N5RSVD_P5RSVD_V2TCKTDITDOTESTHI_1TESTHI_2TESTHI_3TESTHI_4TESTHI_5TESTHI_6TESTHI_7TESTHI_8/BPMB3*TESTHI_9/BPMB2*TESTHI_10TESTHI_12/TDI_MTMSTRST*(4 OF 7)RESERVEDTESTJTAGXDP/ITPPROCHOT*THERMTRIP*GTLREF1GTLREF0THERMDCFC5/GTLREF2BOOTSELECTBSEL_0BSEL_1BSEL_2COMP_0COMP_1COMP_2COMP_3COMP_8DPRSTP*DPSLP*IMPSELMSID_0MSID_1PECIPSI*PWRGOODSKTOCC*SLP*THERMDAVRDSELFC38/GTLREF3(3 OF 7)THERMALPWR MGMTBIBIBIBIBIBIBIOUTOUTOUTINOUTOUT OUTINOUTOUTOUTOUTOUTIN II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1(TDI)WITHIN 38MM (1.5IN) OF THE CPUFROM 975X PDG: IMPSEL0 - 51 PD TO GNDIPUNCNCNCNCPLACE TMS/TMI/TCK TERMINATION(TMS)(TCK)NC(ALSO WRITTEN AS BPM2)CPU BPMB TERMKENTSFIELD CPU SUPPORTCPU BPM TERM(SELECTS 50 OHM SYSTEM IMPEDANCE)11 OF 110051-7863A.0.0 OF 21R115021R112021R112121R112221R112321R112821R1151 21R110921R112921R118021R118121R118221R118321R113021R113321R113221R1135AL3M2AK1AL1L2AE8N1Y3AL2G5V1W1F6H2H1F2G10P1T2B13R1G2T1A13G30H30G29Y1J1000AG1AC1G4G3F24G24G26G27G25F25W2H5W3F26AF1AD1AE1V2P5N5N4J3G6F29F23E7E6E5E23D16D14D1AH2AE6AE4AC4A20AJ3AK3AK6C9AM6AA2AB3AD3H4J17H16H15J16U3J2U2U1G1E29A24AE3H29E24AC2AG3AF2AG2AD2AJ1AJ2J100021R119121R119521R119021R119221R119321R11942 1R11022 1R11012 1R1100CPU_PD_IMPSELCPU_COMPCPU_COMPPM_THRMTRIP_LXDP_DBRESET_LCPU_XDP_BPMBCPU_XDP_BPMBCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_TRST_LCPU_XDP_TDOCPU_XDP_BPMBCPU_XDP_BPMBCPU_XDP_BPMBCPU_XDP_BPMBCPU_XDP_BPMBCPU_XDP_BPMBPM_PGOOD_PVCORE_CPUCPU_TESTHI_10CPU_TESTHI_1CPU_TESTHI_0PPCPU_VTT_OUT_LEFTPPCPU_VTT_OUT_RIGHTCPU_TESTHI_2_7CPU_TESTHI_MCPU_XDP_TMSCPU_XDP_TDICPU_XDP_TCKPPCPU_VTT_OUT_RIGHTPPCPU_VTT_OUT_RIGHTCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LPPCPU_VTT_OUT_LEFT=PPVTT_S0_FSB_CPUCPU_COMPCPU_COMPCPU_COMPCPU_COMPCPU_COMPCPU_GTLREF0CPU_COMPCPU_COMPCPU_COMPCPU_PECI_LCPU_THERMD_PCPU_THERMD_NCPU_BSELFSB_CPUSLP_LCPU_PSI_LCPU_BSELCPU_BSELCPU_BOOTCPU_GTLREF1PPCPU_VTT_OUT_RIGHTCPU_PROCHOT_LCPU_DPSLP_LCPU_DPRSTP_LCPU_PWRGDCPU TEST & MISC.SYNC_MASTER=K22 SYNC_DATE=09/02/200970 7114 50 10014 50 1007114 10014 10013 14 10014 100NOSTUFF1%130MF-LF1/16W40249.91%4021/16WMF-LF1/16W1%49.9MF-LF40249.9MF-LF4021%1/16W402MF-LF1/16W1%49.9 24.91/16WMF-LF4021%51MF-LF1/16W5%40255 10855 10855 108MF-LF5%1/16W4025114 10014 10014 1004025%1/16W51MF-LF11 13 10011 13 10011 13 10011 13 10051MF-LF4021/16W5%MF-LF514021/16W5%511/16WMF-LF4025%51402MF-LF1/16W5%11 13 10011 13 10011 13 1005%1/16W51402MF-LF515%1/16W402MF-LF MF-LF4025%1/16W511/16W4025%51MF-LFCRITICALCPUWOLFDALE-SKT-1BGA-NOHSKCPUCRITICALWOLFDALE-SKT-1BGA-NOHSK51402MF-LF5%1/16W4025%1/16W51MF-LF5%MF-LF511/16W4025%1/16WMF-LF402515%1/16WMF-LF40251402MF-LF5%1/16W5111 13 100MF-LF1/16W4025%511/16WMF-LF402515%MF-LF1/16W402515%13 2811 13 10011 13 10011 13 10011 13 10011 13 10011 13 10013 10013 10013 10013 10013 10011 10011 10010 11 1210 11 1210 11 1210 11 1211 13 10011 13 10011 13 10011 13 10011 13 10011 13 10010 11 126 1211 10011 10011 10011 10011 10010 29 10011 10011 10011 10010 29 10010 11 12OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTVCCPVCCPVTT_C29VTT_C30VTT_D25VTT_D26VTT_D27VTT_D28VTT_D29VTT_D30VTT_OUT_RIGHTVTT_OUT_LEFTVTT_SELVTT_C28VTT_C27VTT_C26VTT_C25VTT_B29VTT_B28VTT_B27VTT_B26VTT_B25VTT_A30VTT_A29VTT_A28VTT_A27VTT_A26VTT_A25VTT_B30VCCAVCCIOPLLVCCPVCCPLLVCC_MB_REGULATIONVCC_SENSEVID_0VID_1VID_2VID_3VID_4VID_5VID_6VID_7VID_SELECTVSSAVSS_MB_REGULATIONVSS_SENSEVCCP(7 OF 7)OUTGND GND(5 OF 7)GND GND(6 OF 7) II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1POWERGNDVCC PLL DECOUPLING(SEE VREG PAGE)VCCP CORE DECOUPLING~125MA CURRENTTHIS IS FOR OLDER CPU SUPPORTGNDWILL PLACE FILTER BUT NOT CONNECT FOR WOLFDALEVID PULLUPS WITH VREGFSB VTT DECOUPLING12 OF 110051-7863A.0.0 OF 21R1200V25E20R7V27R5V28V29R2V30V26E26P7P4N7N6N3M7M1L7L6C13V7B8B5B1D3D5R30D6C4D9E2H6T7Y2H3AN24AN27AN28E27H12B11K7 B14C22K2C24D12C10C19AN2D18F7D21E11Y5L28E14H7H8H28H9AN23AN20J4K5J7L25D24E28F10F13F16F22F4E17F19C16H13H14H17H18H19H20H21H22H10H23H24H25B17H26B20E8H27L3B24L23L24H11L26L27Y7D15L29L30C7P23W7P25W4P26P27V6P28P29V3P30R23R24U7R25R26R27R28R29E25T6V23V24T3P24J1000AN10AA24AA25AA26AA27AN13AA28AM4AA29AA30AB23AB24AB25AN16AB26AB1AB27AN17AB28AB29AB30AK24AJ27AH1AE26AJ4A9A6A2A18AF13AE10AF16AF17AG24AF23AF24AF25AF26AF27AL7 AJ7AH7AK7AF7AK23AL10AF28AE16AN1AF29AL17AL13AM1AM27AK20AK16AL20AK13AL24AL16AM24AE24AF10AE30AE29AF30AE28A12AL23AK30AG7AE13AJ23AM10AK10AH3AJ17AK29AF6AG10AE17AJ16AK5AF3AJ10AJ30AH24AM13AE7AH23AE5AH20AH17AK17AH16AD7AH13AJ28AE27AG13AE25AM16AH6AC7AC6AC3AM17AG16AJ24AB7AA6AG17AA7AA3AM20AK28AK27AJ29AE2A21AH10A15AM23AG20AD4AL27AG23AJ20AJ13AM28AF20AK2AL28AA23AE20J1000F27AA1J1D30D29D28D27D26D25C30C29C28C27C26C25B30B29B28B27B26B25A30A29A28A27A26A25B23AN4AN6AN7AM7AM5AL4AK4AL6AM3AL5AM2D23AM15AD23AF11AK15AG27J21J18J26AL15AF18AD29AH15AN9AG26AJ15J10AK26AG11AN29AK22AF22AL29AF9N26AG9AN12AK8T27AJ19U26AJ8AN15AG8AL22AH12N28T26AM8AL19K23P8K25J11AA8J29AH9AJ25AL30N29AG14AK11AJ9AL12AH25AG18AN30AL14K30AJ11AL11AM11AJ21AG30AK21AK14J30Y24AF21AD30AL9AG19J27J12W28T28J13AF14J24AM12AL26AG28AH27AH29AH19J15AL8AE11AE12AM26K29AG22AJ14AB8AM19AM18AC27J23U24M29AC29Y26AD28AH11AN14Y30W30AC25AL18Y28T25W25W24W23AK9M27Y25Y27AN18AN11AN25AN26Y23AC23AC24U29M28W29N23AE14AC8AF15AM9T30J28J8AC26AF12W26AE18N25AC28T8AN21M24K27M30AE15N8AC30AE19AM30AE21K8V8AN19AE22AE23AD24AF19K28U28AM22N27AG29M23U23AD27AJ12Y8K26U25L8M26M25AM29AJ26AD26N30M8AD25J14AM21AG21T24J22AG15AK19AK25Y29 AE9AM25AN22AM14T29AH22AK12AH21AH28K24AD8AK18U8N24R8T23AH14AN8AL25W27AH26AH18J20AJ22AH8AG12AH30J19AJ18AG25AL21U30J25AF8W8J9U27C23A23AN3AN5J100021 C120021 C120121 C128121 C128021 C121021 C121321 C121121 C12122 1R12112 1R12102 1L121021 C123821 C123721 C123621 C123521 C123421 C1226VOLTAGE=0VCPU_VSSAMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM=PPVTT_S0_FSB_CPUCPU_VIDCPU_VCC_PKG_SENSE_NCPU_VIDTP_VTT_SELPPCPU_VTT_OUT_RIGHTCPU_VCCACPU_VCCIOPLLCPU_VIDCPU_VIDCPU_VIDCPU_VSSACPU_VID CPU_VCCA_FLT=PP1V5_S0_CPU_VCCPLLPPCPU_VTT_OUT_LEFTMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRPPCPU_VTT_OUT_LEFTVOLTAGE=1.2V=PP1V5_S0_CPU_VCCPLLCPU_VIDCPU_VCCAVOLTAGE=1.2VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMCPU_VCCIOPLLVOLTAGE=1.2VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMCPU_VID=PPVTT_S0_FSB_CPUTP_CPU_VSS_SENSE=PPVTT_S0_FSB_CPUCPU_VID_SELECTVOLTAGE=1.2VMIN_LINE_WIDTH=0.6 mmNET_SPACING_TYPE=PWRMIN_NECK_WIDTH=0.2 mmPPCPU_VTT_OUT_RIGHT=PPVCORE_S0_CPUPPCPU_VTT_OUT_RIGHTCPU_VID_SELECTCPU_VCC_SENSECPU_VCC_PKG_SENSE_PCPU POWER, GND, DECAPSSYNC_DATE=09/02/2009 SYNC_MASTER=K2210V0.1UF20%402CERM0.1UFCERM10V40220%0.1UF20%40210VCERM0.1UFCERM20%10V402CERM20%10V0.1UF402 402CERM0.1UF20%10V4026805%1/16WMF-LFCRITICALCPUWOLFDALE-SKT-1BGA-NOHSKCRITICALCPUWOLFDALE-SKT-1BGA-NOHSK71 100CRITICALCPUWOLFDALE-SKT-1BGA-NOHSK402CERM10V0.1UF20%10V20%402CERM0.1UF40216V10%CERM0.01UF6036.3VX5R10UF20%805-3CERM-X5R6.3V20%22UF6.3VX5R10uF60320%NOSTUFF1UF10%402CERM6.3VNOSTUFF6.3V1UF10%CERM402603MF-LF1/10W5%0MF-LF5%60301/10WFERR-120-OHM-0.2A0603CONROE71 10071 10053 10871 10071 10071 10071 10071 10071 10071 100126 11 1210 11 121212126 1210 11 1210 11126 1212126 11 126 11 121210 1112610 11 1212INBIBIBIBIOUTINBIINININOUTOUTOUTBIBIBIBIBIBIBIBIOUTININININOUTOUTOUTOUTNCINININININ II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1PWRGD/HOOK0OBSDATA_A3OBSDATA_A2TRSTnDBR#/HOOK7RESET#/HOOK6OBSFN_D1OBSFN_D0OBSDATA_C1OBSDATA_C0OBSFN_C1OBSFN_C0OBSDATA_C2OBSDATA_C3OBSDATA_B3OBSDATA_D1OBSDATA_A1MCP79-specific pinoutOBSFN_A1HOOK3OBSFN_B1OBSDATA_B2TDOTDIXDP_PRESENT#TMS TCK0TCK1SCLSDAOBSDATA_B1OBSDATA_B0OBSFN_A0HOOK1OBSDATA_D0VCC_OBS_CDOBSDATA_A0OBSFN_B0ITPCLK#/HOOK5OBSDATA_D3OBSDATA_D2ITPCLK/HOOK4NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.HOOK2VCC_OBS_AB13 OF 110051-7863A.0.0 OF 21R130121R131698 76065958 5756 5554 5352 515054948 4746 4544 4342 414043938 3736 3534 3332 313032928 2726 2524 2322 212021918 1716 1514 1312 11101J13002 1R130321 C130121 C130021R13152 1R1399CPU_XDP_BPMBCPU_XDP_BPMBXDP_OBS20SMBUS_MCP_0_DATACPU_XDP_TCKCPU_XDP_TRST_L SMBUS_MCP_0_CLKPM_LATRIGGER_LJTAG_MCP_TCKXDP_PWRGDXDP_DBRESET_LTP_XDP_OBSFN_B1=PPVTT_S0_XDPCPU_XDP_BPM_LCPU_PWRGDCPU_XDP_BPM_LMCP_DEBUGFSB_CPURST_LMCP_DEBUGCPU_XDP_TDICPU_XDP_TMSCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LCPU_XDP_BPM_LMCP_DEBUGMCP_DEBUG CPU_XDP_BPMBCPU_XDP_BPMB=PP3V3_S0_XDPJTAG_MCP_TDOJTAG_MCP_TRST_LMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGJTAG_MCP_TMSJTAG_MCP_TDIFSB_CLK_ITP_NXDP_CPURST_LCPU_XDP_TDOFSB_CLK_ITP_PTP_XDP_OBSFN_B0eXtended Debug Port (XDP)SYNC_MASTER=K22 SYNC_DATE=09/02/2009MF-LF1/16WXDP5%4025111 10011 10011 10011 1004025%62XDP1/16WMF-LF1911 2811 10011 10011 10011 10014 10014 1002121191919191919191921212111 10011 10011 10011 100F-ST-SMCRITICALXDP_CONNLTH-030-01-G-D-A-TRMF-LFPLACEMENT_NOTE=Place close to CPU to minimize stub.4021KXDP1/16W5%10 14 10011 10011 10011 100XDP0.1uF10%40216VX5RXDP0.1uF10%X5R40216V40254.91%1/16WMF-LFXDP21 52 10621 52 1064021KMF-LF5%1/16WXDP11 14 10066100ININININOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIINBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTINBIBICPU_ADSTB0*CPU_BPRI*CPU_A25*CPU_A24*CPU_D4*BCLK_OUT_CPU_NBCLK_VML_COMP_GNDBCLK_VML_COMP_VDDCPU_A14*CPU_A15*CPU_A10*CPU_A11*CPU_A13*CPU_A12*CPU_A16*CPU_A31*CPU_A18*CPU_A30*CPU_A26*CPU_A33*CPU_A21*CPU_A20*CPU_A23*CPU_A19*CPU_A22*CPU_A28*CPU_A29*CPU_A7*CPU_A17*CPU_A27*CPU_A35*CPU_A34*CPU_A32*CPU_REQ2*CPU_A9*CPU_REQ3*CPU_A4*CPU_A8*CPU_A3*CPU_ADSTB1*CPU_BSEL0CPU_BSEL1CPU_BSEL2CPU_COMP_GNDCPU_COMP_VCCCPU_D1*CPU_D3*CPU_D15*CPU_D11*CPU_D10*CPU_D8*CPU_D13*CPU_D9*CPU_D23*CPU_D19*CPU_D21*CPU_D22*CPU_D2*CPU_D18*CPU_D20*CPU_D17*CPU_D31*CPU_D28*CPU_D27*CPU_D25*CPU_D26*CPU_D24*CPU_D7*CPU_D30*CPU_D29*CPU_D38*CPU_D33*CPU_D32*CPU_D39*CPU_D37*CPU_D36*CPU_D5*CPU_D42*CPU_D44*CPU_D43*CPU_D40*CPU_D41*CPU_D45*CPU_D49*CPU_D55*CPU_D6*CPU_D50*CPU_D53*CPU_D52*CPU_D51*CPU_D48*CPU_D54*CPU_D59*CPU_D57*CPU_D62*CPU_D58*CPU_D0*CPU_D61*CPU_D60*CPU_D63*CPU_D56*CPU_D14*CPU_D12*CPU_DBI1*CPU_DBI2*CPU_DPRSTP*CPU_DPSLP*CPU_DPWR*CPU_DSTBN0*CPU_DSTBN2*CPU_DSTBN3*CPU_DSTBP0*CPU_DSTBP1*CPU_DSTBP2*CPU_DSTBP3*CPU_FERR*CPU_HIT*CPU_LOCK*CPU_NMICPU_PECICPU_PROCHOT*CPU_REQ0*CPU_REQ1*CPU_A6*CPU_RESET*CPU_RS0*CPU_RS1*CPU_RS2*CPU_SLP*CPU_SMI*CPU_THERMTRIP*CPU_TRDY*V1P1_DLLDLCELL_AVDDV1P1_PLL_CPUV1P1_PLL_FSBV1P1_PLL_MCLKCPU_D16*CPU_D47*CPU_D46*CPU_A5*CPU_DBI3*CPU_D35*CPU_D34*BCLK_OUT_ITP_NCPU_DEFER*BCLK_OUT_CPU_PBCLK_OUT_ITP_PBCLK_IN_NBCLK_OUT_NB_NBCLK_OUT_NB_PCPU_INIT*BCLK_IN_PCPU_A20M*CPU_IGNNE*CPU_INTRCPU_PWRGDCPU_STPCLK*CPU_BR0*CPU_BR1*CPU_DBSY*CPU_DRDY*CPU_HITM*CPU_BNR*CPU_ADS*CPU_REQ4*CPU_DBI0*CPU_DSTBN1*FSB(1 OF 11) II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 120 mA29 mA15 mA206 mACurrent numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).Loop-back clock for delay matching.270 mA (A01)NC14 OF 110051-7863A.0.0 OF 21R142021R142121R1422AH27AG28AH28AG27AE41AG43AG42AH41AM33AC42AB41AC41H38AC39AC37AE38AA33AC38AH43AJ41E41AG41AC43AF42AH42AH39AD40AB42AH40M39N37W39T40M41L36W37U40AD41AM32AN33AN32AA40AD39J41N35V35V41T43T41W41H39H43K41J40V42H41H42L41M43M42K42N41N40M40P41Y39L42H40J39J38J37L39L38L37N38N36Y42R39N33R37R38N34P35R34R35U38R33W42U37U36U35U34U33W38W35W34W33AA34Y40AA37AA36AA35AA38R42P42R41U41T39T42Y43Y41AM43AM42F42D42F41AL32AE40AA41AD43AK35AE36AD42AE34AE35AC34AC35AC33AE37AN34AR39AN36AN35AN38AL33AB35AN37AL34AL35AJ33AL38AL39AJ36AL37AJ35AF41AJ37AJ38AG33AJ34AG34AG35AF35AG37AG38AE33AG39AM39AM40AL41AK42AL43AL42G42G41AJ40AK41U140021R141621R144021R141021R143521R143021R143121R1436CPU_INIT_LFSB_BREQ1_LFSB_TRDY_LCPU_PROCHOT_LPM_THRMTRIP_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LCPU_BSELCPU_BSELCPU_BSELFSB_HIT_LFSB_RS_LFSB_RS_LPP1V05_S0_MCP_PLL_FSBMCP_CPU_COMP_VCCCPU_DPSLP_LFSB_CPUSLP_LMCP_BCLK_VML_COMP_VDDMCP_BCLK_VML_COMP_GNDMCP_CPU_COMP_GNDFSB_A_LFSB_D_LFSB_D_LCPU_IGNNE_LCPU_INTRCPU_NMICPU_SMI_LCPU_PWRGDFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_DINV_LFSB_A_LFSB_D_LFSB_D_LFSB_D_LCPU_STPCLK_LFSB_RS_LFSB_CPURST_LFSB_A_LFSB_REQ_LFSB_REQ_LFSB_REQ_LCPU_PECI_MCPFSB_LOCK_LFSB_HITM_LFSB_DSTB_L_PFSB_DSTB_L_PFSB_DSTB_L_PFSB_DSTB_L_PFSB_DSTB_L_NFSB_DSTB_L_NFSB_DSTB_L_NFSB_DSTB_L_NFSB_DRDY_LCPU_DPRSTP_LFSB_DBSY_LFSB_DINV_LFSB_DINV_LFSB_DINV_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_D_LFSB_BREQ0_LFSB_BNR_LFSB_ADSTB_LFSB_ADS_LFSB_A_LFSB_A_LFSB_A_LFSB_REQ_LFSB_A_LFSB_REQ_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LCPU_A20M_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_A_LFSB_CLK_MCP_PFSB_CLK_MCP_NFSB_CLK_ITP_PFSB_CLK_ITP_NFSB_CLK_CPU_PFSB_CLK_CPU_NFSB_D_LFSB_A_LFSB_BPRI_LFSB_DEFER_LFSB_ADSTB_L=PP1V05_S0_MCP_FSBCPU_FERR_L=PP1V05_S0_MCP_FSBSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP CPU Interface5%1/16WMF-LF470402 4024705%MF-LF1/16W4024705%MF-LF1/16WMCP7ABGAOMIT1/16W402MF-LF625%NO STUFF1501/16W402MF-LF5%5%62402MF-LF1/16W49.91/16W1%402MF-LF49.9MF-LF4021%1/16W1/16W1%402MF-LF49.9 49.91/16W1%402MF-LF10 10010 10011 50 10011 50 10055 10811 10010 10011 10011 10011 13 10010 10010 10010 10010 10010 10010 10010 10010 10013 10013 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 10010 13 10010 10011 10011 10011 100100251001001001001001006 14 22 256 14 22 25OUTOUTOUTOUTOUTOUTOUTOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIOUTBIOUTOUTOUTOUTOUTOUTOUTMDQ0_1MDQ0_2MCLK0A_1_NMCLK0A_0_PMCS0A_0*MDQ0_63MDQ0_62MDQ0_61MDQS0_1_PMDQS0_0_PMDQ0_57MDQ0_41MDQ0_40MDQ0_28MDQ0_42MDQ0_43MDQ0_44MDQ0_45MDQ0_46MDQ0_47MDQ0_48MDQ0_49MDQ0_38MA0_0MA0_1MA0_10MA0_11MA0_12MA0_13MA0_14MA0_2MA0_4MA0_5MA0_6MA0_7MA0_8MA0_9MBA0_0MBA0_1MBA0_2MCAS0*MCKE0A_0MCKE0A_1MCLK0A_0_NMCLK0A_1_PMCLK0A_2_NMCLK0A_2_PMCS0A_1*MDQ0_0MDQ0_10MDQ0_11MDQ0_12MDQ0_13MDQ0_14MDQ0_15MDQ0_16MDQ0_17MDQ0_18MDQ0_20MDQ0_21MDQ0_22MDQ0_23MDQ0_24MDQ0_25MDQ0_26MDQ0_27MDQ0_29MDQ0_3MDQ0_30MDQ0_31MDQ0_32MDQ0_33MDQ0_34MDQ0_35MDQ0_36MDQ0_37MDQ0_39MDQ0_4MDQ0_5MDQ0_55MDQ0_56MDQ0_58MDQ0_59MDQ0_6MDQ0_60MDQ0_7MDQ0_9MDQM0_0MDQM0_1MDQM0_2MDQM0_3MDQM0_4MDQM0_5MDQM0_6MDQM0_7MDQS0_0_NMDQS0_1_NMDQS0_2_NMDQS0_2_PMDQS0_3_NMDQS0_3_PMDQS0_4_NMDQS0_4_PMDQS0_5_NMDQS0_5_PMDQS0_6_NMDQS0_6_PMDQS0_7_NMDQS0_7_PMODT0A_0MODT0A_1MRAS0*MWE0*MDQ0_54MDQ0_53MDQ0_52MDQ0_51MDQ0_50MA0_3MDQ0_19MDQ0_8 0AMEMORYCONTROLMEMORY PARTITION 0(2 OF 11)MDQ1_43MA1_0MA1_1MA1_10MA1_11MA1_12MA1_13MA1_14MA1_2MA1_3MA1_4MA1_5MA1_6MA1_7MA1_8MA1_9MBA1_0MBA1_1MBA1_2MCAS1*MCKE1A_0MCS1A_0*MDQ1_0MDQ1_1MDQ1_10MDQ1_11MDQ1_12MDQ1_13MDQ1_14MDQ1_15MDQ1_16MDQ1_17MDQ1_18MDQ1_19MDQ1_2MDQ1_20MDQ1_21MDQ1_22MDQ1_23MDQ1_24MDQ1_25MDQ1_26MDQ1_27MDQ1_28MDQ1_29MDQ1_3MDQ1_30MDQ1_31MDQ1_32MDQ1_33MDQ1_34MDQ1_35MDQ1_36MDQ1_37MDQ1_38MDQ1_39MDQ1_4MDQ1_40MDQ1_41MDQ1_42MDQ1_44MDQ1_45MDQ1_46MDQ1_47MDQ1_48MDQ1_49MDQ1_5MDQ1_50MDQ1_51MDQ1_52MDQ1_53MDQ1_54MDQ1_55MDQ1_56MDQ1_57MDQ1_58MDQ1_59MDQ1_6MDQ1_61MDQ1_62MDQ1_63MDQ1_7MDQ1_8MDQ1_9MDQM1_0MDQM1_1MDQM1_2MDQM1_3MDQM1_4MDQM1_5MDQM1_6MDQM1_7MDQS1_0_NMDQS1_0_PMDQS1_1_NMDQS1_1_PMDQS1_2_PMDQS1_3_NMDQS1_3_PMDQS1_4_NMDQS1_4_PMDQS1_5_NMDQS1_5_PMDQS1_6_NMDQS1_6_PMDQS1_7_NMDQS1_7_PMODT1A_1MRAS1*MWE1*MDQ1_60MDQS1_2_NMCLK1A_2_PMCLK1A_2_NMCLK1A_1_PMCLK1A_1_NMCLK1A_0_PMCLK1A_0_NMCS1A_1*MODT1A_0MCKE1A_1MEMORYCONTROL1AMEMORY PARTITION 1(3 OF 11) II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 115 OF 110051-7863A.0.0 OF BA16AW16BB13AY15AT2AT1AY2AY1BB6BA6BA10AY11BB33BA33BB37BA37BA43AY42AT42AT43AT5BA2AY7BA11BB34BB38AY43AR42AW42AW41AT40AT4AT3AV2AV3AT41AR4AR3AU2AU3AY4AY3BB3BC3AW4AW3AP41BA3BB2BB5BA5BA8BC8BB4BC4BA7AY8AN40BA9BB10BB12AW12BB8BB9AY12BA12BC32AW32AU40BA35AY36BA32BB32BA34AY35BC36AW36BA39AY40AU41BA36BB36BA38AY39BB40AW40AV42AV41BA40BC40AR41AP42BB14BB16BA42BB42BB22BA22BA19AY19AY31BB30BA15BB29BB18BB17BB28AY28BA28AY27BA27BA26BB26BA25BA29BA14AW28BC28BA17BB25BA18U1400AR17AV17AP15AV15AL10AL11AR8AR9AW7AW8AP13AR13AV25AW25AU30AU29AT35AU35AU39AT39AN5AU5AR10AN13AN27AW29AV35AR34AT37AU37AW39AL8AL9AP9AN9AV39AL6AL7AN6AN7AR6AR7AV6AW5AN10AR5AR37AU6AV5AU7AU8AW9AP11AW6AY5AU9AV9AR38AU11AV11AV13AW13AR11AT11AR14AU13AR26AU25AV38AT27AU27AP25AR25AP27AR27AP29AR29AP31AR31AW38AV27AN29AV29AN31AU31AR33AV37AW37AT31AV31AR35AP35AT15AR18AW33AV33BA24AY24BB20BC20AU23AT23AP17AP23AP19AW17AV21AR22AU21AP21AR21AN21AV19AU19AR23AU15AN23AW21AN19AT19AR19U1400MEM_B_CKEMEM_B_ODTMEM_B_DQMEM_A_DQMEM_A_AMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_WE_LMEM_A_RAS_LMEM_A_ODTMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_PMEM_A_DQS_NMEM_A_DQS_NMEM_A_DQS_NMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DMMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_CS_LTP_MEM_A_CLK2PTP_MEM_A_CLK2NMEM_A_CLK_PMEM_A_CLK_NMEM_A_CKEMEM_A_CKEMEM_A_CAS_LMEM_A_BAMEM_A_BAMEM_A_BAMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_AMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_DQS_PMEM_A_DQS_PMEM_A_DQMEM_A_DQMEM_A_DQMEM_A_CS_LMEM_A_CLK_PMEM_A_CLK_NMEM_A_DQMEM_A_DQMEM_A_DQMEM_B_CKEMEM_B_CS_LMEM_B_CLK_NMEM_B_CLK_PMEM_B_CLK_NMEM_B_CLK_PTP_MEM_B_CLK2NTP_MEM_B_CLK2PMEM_B_DQS_NMEM_B_DQMEM_B_WE_LMEM_B_RAS_LMEM_B_ODTMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_PMEM_B_DQS_NMEM_B_DQS_PMEM_B_DQS_NMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DMMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_DQMEM_B_CS_LMEM_B_CAS_LMEM_B_BAMEM_B_BAMEM_B_BAMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_AMEM_B_DQMEM_A_ODTMEM_A_DQMEM_A_DQSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP Memory InterfaceBGAOMITMCP7A MCP7ABGAOMIT33 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10132 10132 10132 10132 10132 10132 10133 10133 10133 10133 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10132 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10131 10131 10131 10131 10131 10131 10133 10133 10133 10133 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10131 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10133 10188 88MRESET0*MCLK0B_0_PMCLK0B_1_P MCLK1B_1_PMCLK1B_2_PGNDMCKE1B_0MCKE1B_1MCLK0B_2_NMCLK0B_2_PMCLK1B_0_NMCLK1B_0_PMCLK1B_1_NMCS0B_0* MCS1B_0*MCS1B_1*MODT0B_1 MODT1B_1V1P1_PLL_DPV1P8_MEM_VDDP GNDMEM_COMP_1P8VMEM_COMP_GNDV1P1_PLL_XREF_XSV1P1_PLL_COREV1P1_PLL_VMCKE0B_1MODT0B_0MCLK0B_0_NMCLK0B_1_NMODT1B_0MCLK1B_2_NMCS0B_1*MCKE0B_0MEMORY CONTROL 1BMEMORY CONTROL 0B(4 OF 11)OUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 14771 mA (A01, DDR3)17 mA12 mACurrent numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).19 mA39 mATP or NC for DDR2.87 mA (A01)16 OF 110051-7863A.0.0 OF AR16AV16AP24AP20AN22BC29AN16AM29AM27AM25AP16AM31AL30BC25AW24AW19AY26AM23AY25AU18AM15AT17AY18AY17AV20BC17AW27AU22AU20AM21AV24AY29AN24AT21AU24AN18AU16AP18AP22AW15AR24AM19AR20AN20AM17T27T28U28U27AY32BC13AY16AN15AN17AM41AN41BA13BC16AR15AU17BA41BB41AY23BA23BA20AY20AU33AU34BB24BC24BA21BB21BA31BA30AN25AV23W5V34V10U22U20U18T9T7T6T38T37T35T34T33T26T24AK11T20T18T10R5R43R40R36P7P40P4P37P34P33P10N8N39M9M7M6M5M38K7H31G32G30F24D34BC9AY9BC21F28AU10AR36AP30AT25AP12AM28AK7AH35AG24AF24AE20AD22AB7AB22AA39AA22U140021R161121R1610MCP_MEM_COMP_GNDMCP_MEM_COMP_VDDMEM_B_CS_LMEM_B_CLK_NMEM_B_CLK_P=PP1V8R1V5_S0_MCP_MEMPP1V05_S0_MCP_PLL_CORETP_MEM_A_CLK5NMEM_A_CLK_NMEM_A_ODTMEM_A_CS_L=PP1V8R1V5_S0_MCP_MEMMEM_A_CKEMEM_A_CS_LTP_MEM_B_CLK5NMEM_B_ODTMEM_A_CLK_NMEM_A_CKEMEM_B_ODT MEM_A_ODTMEM_B_CS_LMEM_B_CLK_NTP_MEM_A_CLK5PMEM_B_CKETP_MEM_B_CLK5PMEM_B_CLK_P MEM_A_CLK_PMEM_A_CLK_PMEM_B_CKEMCP_MEM_RESET_LMCP MEMORY CNTRL & MISCSYNC_MASTER=K22 SYNC_DATE=09/02/2009334021/16W1%MF-LF40.2MF-LF4021/16W40.21%OMITBGAMCP7A10110132 10133 10133 1016 16 25 3025833 10131 10131 1016 16 25 3031 10131 101832 10133 10131 10132 101 31 10132 10133 101832 101833 101 33 10133 10132 101OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTINININININININININININININININININININININININININININININININININININININININININININININOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTINOUTOUTININPEB_CLKREQ*/GPIO_49PEB_PRSNT*PE0_RX13_NPE0_RX14_PPEE_CLKREQ*/GPIO_16V1P1_PEX_AVDD0V1P1_PEX_AVDD1V1P1_PEX_DVDD0V1P1_PEX_DVDD1V1P1_PLL_PEXPE_WAKE*PE0_PRSNT_16* PE0_REFCLK_NPE0_REFCLK_PPE0_RX0_NPE0_RX0_PPE0_RX1_NPE0_RX1_PPE0_RX10_NPE0_RX10_PPE0_RX11_NPE0_RX11_PPE0_RX12_NPE0_RX12_PPE0_RX13_PPE0_RX14_NPE0_RX15_NPE0_RX15_PPE0_RX2_NPE0_RX2_PPE0_RX3_NPE0_RX3_PPE0_RX4_PPE0_RX6_NPE0_RX6_PPE0_RX7_NPE0_RX7_PPE0_RX8_NPE0_RX8_PPE0_RX9_NPE0_RX9_PPE0_TX0_NPE0_TX0_PPE0_TX1_NPE0_TX1_PPE0_TX10_PPE0_TX11_NPE0_TX11_PPE0_TX12_NPE0_TX12_PPE0_TX13_NPE0_TX13_PPE0_TX14_NPE0_TX14_PPE0_TX15_NPE0_TX15_PPE0_TX2_NPE0_TX2_PPE0_TX3_NPE0_TX3_PPE0_TX4_NPE0_TX4_PPE0_TX5_NPE0_TX5_PPE0_TX6_NPE0_TX6_PPE0_TX7_NPE0_TX7_PPE0_TX8_NPE0_TX8_PPE0_TX9_NPE0_TX9_PPE1_REFCLK_NPE1_REFCLK_PPE1_RX0_NPE1_RX0_PPE1_RX1_NPE1_RX1_PPE1_RX2_NPE1_RX2_PPE1_RX3_NPE1_RX3_PPE1_TX0_NPE1_TX0_PPE1_TX1_NPE1_TX1_PPE1_TX2_NPE1_TX2_PPE1_TX3_NPE1_TX3_PPE3_REFCLK_NPE3_REFCLK_PPE4_REFCLK_NPE4_REFCLK_PPE5_REFCLK_NPE5_REFCLK_PPE6_REFCLK_NPE6_REFCLK_PPEC_CLKREQ*/GPIO_50PEC_PRSNT*PED_CLKREQ*/GPIO_51PED_PRSNT*PEE_PRSNT*/GPIO_46PEF_CLKREQ*/GPIO_17PEF_PRSNT*/GPIO_47PEX_CLK_COMPPEX_RST0*PE0_RX5_PPE0_RX5_NPE0_RX4_NPE0_TX10_NPE2_REFCLK_NPE2_REFCLK_PPEG_PRSNT*/GPIO_48PEG_CLKREQ*/GPIO_18PCI EXPRESS(5 OF 11)OUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1Int PU (S5)If PE0 interface is not used, ground DVDD0_PEX and AVDD0_PEX.206 mA (A01, AVDD0 & 1)Int PUCurrent numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).84 mA (A01)Int PUInt PUInt PUInt PUInt PUInt PUInt PUInt PUMinimum 1.025V for Gen2 supportIf PE1 interface is not used, ground DVDD1_PEX and AVDD1_PEX.Int PUInt PUInt PU57 mA (A01, DVDD0 & 1)Minimum 1.025V for Gen2 supportInt PU17 OF 110051-7863A.0.0 OF T16U19T19U16W18W17W16V19U17W19T17P13N13M13R12P12M12AB12AA12W12V12AD12U12T12N12AC12Y12K11A11M19M17M18M16L18L16B10M15C10E8D9D5F17N14M14L14K14J13H13G13F13J11J10B6C6A7B7B8A8D8C8H7G7F9E9H9G9K9J9G11F11H3H2G3H4F3F4E2F2D2E1C1D1B3B2A4A3C4B4M2M1M4M3L4L3K2K3J2J3H1J1C5D4L11L10J5J4J7J6G5H5C3D3E4E3E5F5E6F6D7C7N5N4N7N6N9P9N11N10L7L6L9L8F7E7E11D11 C9U140021R1710CARDREADER_RESETGMUX_JTAG_TCK_LAUD_IP_PERIPHERAL_DETTP_PE4_PRSNT_L=PP1V05_S0_MCP_PEX_DVDD0PCIE_MINI_D2R_PPCIE_WAKE_LPCIE_EXCARD_PRSNT_LEXCARD_CLKREQ_LFW_CLKREQ_LMINI_CLKREQ_LPEG_PRSNT_L=PEG_D2R_N=PEG_D2R_PPCIE_FW_PRSNT_LTP_PE4_CLKREQ_LGMUX_JTAG_TDOPCIE_MINI_D2R_NPCIE_FW_D2R_PPCIE_FW_D2R_NTP_PCIE_PE4_D2RNPCIE_EXCARD_R2D_C_N PCIE_EXCARD_D2R_N=PP1V05_S0_MCP_PEX_DVDD1PP1V05_S0_MCP_PLL_PEXMCP_PEX_CLK_COMP=PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_D2R_P=PP1V05_S0_MCP_PEX_AVDD0PCIE_MINI_PRSNT_L=PEG_D2R_N=PEG_D2R_P=PP1V05_S0_MCP_PEX_AVDD1PEG_CLK100M_NPEG_CLK100M_P=PEG_D2R_N=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_P=PEG_D2R_N=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_D2R_N=PEG_D2R_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_N=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_P=PEG_R2D_C_N=PEG_R2D_C_PPCIE_CLK100M_MINI_NPCIE_CLK100M_MINI_PPCIE_EXCARD_D2R_PTP_PCIE_PE4_D2RPPCIE_MINI_R2D_C_NPCIE_MINI_R2D_C_PPCIE_FW_R2D_C_NPCIE_FW_R2D_C_PPCIE_EXCARD_R2D_C_PTP_PCIE_PE4_R2D_CNTP_PCIE_PE4_R2D_CPPCIE_CLK100M_EXCARD_NPCIE_CLK100M_EXCARD_PTP_PCIE_CLK100M_PE4NTP_PCIE_CLK100M_PE4PTP_PCIE_CLK100M_PE5NTP_PCIE_CLK100M_PE5PTP_PCIE_CLK100M_PE6NTP_PCIE_CLK100M_PE6PPCIE_RESET_L=PEG_D2R_P=PEG_D2R_N=PEG_D2R_N=PEG_R2D_C_NPCIE_CLK100M_FW_NPCIE_CLK100M_FW_PSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP PCIe Interfaces47OMITBGAMCP7A67889PLACEMENT_NOTE=Place within 12.7mm of U1400NO STUFF1/16W1%MF-LF4022.37K98834 10234 1028841 10241 10241 10241 10234 10234 102889348841 10241 1023442934 10234 102999999999999999999999999999999999999999999999999999999999999999999825 2888282510225 2828888888888INBIOUTININININININOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTININOUTOUTOUTOUTOUTOUTOUTININOUTINININBIXTALIN_TVRGB_DAC_RSETMII_COMP_GNDMII_COMP_VDDV1P1_DUAL_MACPLLMII_COL/GPIO_20/MSMB_DATABUF_25MHZDDC_CLK0DDC_CLK2/GPIO_23DDC_CLK3DDC_DATA0DDC_DATA2/GPIO_24DDC_DATA3DP_AUX_CH0_NDP_AUX_CH0_PGPIO_6/FERR*/IGPU_GPIO6GPIO_7/NFERR*/IGPU_GPIO7HDMI_RSETHDMI_TXC_N/ML0_LANE3_NHDMI_TXC_P/ML0_LANE3_PHDMI_TXD0_N/ML0_LANE2_NHDMI_TXD0_P/ML0_LANE2_PHDMI_TXD1_N/ML0_LANE1_NHDMI_TXD1_P/ML0_LANE1_PHDMI_TXD2_N/ML0_LANE0_NHDMI_TXD2_P/ML0_LANE0_PHDMI_VPROBEHPLUG_DET2/GPIO_22HPLUG_DET3IFPA_TXC_NIFPA_TXC_PIFPA_TXD0_NIFPA_TXD0_PIFPA_TXD1_NIFPA_TXD2_NIFPA_TXD2_PIFPA_TXD3_NIFPA_TXD3_PIFPAB_RSETIFPAB_VPROBEIFPB_TXC_NIFPB_TXC_PIFPB_TXD4_NIFPB_TXD4_PIFPB_TXD5_NIFPB_TXD5_PIFPB_TXD6_NIFPB_TXD6_PIFPB_TXD7_NIFPB_TXD7_PLCD_BKL_CTL/GPIO_57LCD_BKL_ON/GPIO_59LCD_PANEL_PWR/GPIO_58MII_RESET*MII_RXER/GPIO_36MII_VREFV3P3_DUAL_RMGT0V3P3_DUAL_RMGT1V1P0_DUAL_RMGT_0V1P0_DUAL_RMGT_1V3P3_PLL_HDMIV3P3_PLL_IFPABV3P3_RGBDAC_VDDV3P3_TVDAC_VDDV1P1_HDMI_VDDV1P8_IFPA_VDDV1P8_IFPB_VDDRGB_DAC_BLUERGB_DAC_HSYNCRGB_DAC_REDRGB_DAC_VREFRGB_DAC_VSYNCMII_MDCMII_MDIOMII_PWRDWN/GPIO_37MII_RXCLKMII_RXDVMII_RXD0MII_RXD1MII_RXD2MII_RXD3MII_TXD0MII_TXD1MII_TXD2TV_DAC_BLUETV_DAC_GREENTV_DAC_HSYNC/GPIO_44TV_DAC_REDTV_DAC_RSETTV_DAC_VREFTV_DAC_VSYNC/GPIO_45XTALOUT_TVMII_TXENMII_TXCLKMII_TXD3RGB_DAC_GREENIFPA_TXD1_PMII_CRS/GPIO_21/MSMB_CLKMII_INTR/GPIO_35DACSLANFLAT PANEL(6 OF 11)OUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTOUTBIOUTBIOUTOUTOUTOUTOUTOUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.LVDS:Power +VDD_IFPx at 1.8VDual-channel TMDS: Power +VDD_IFPx at 3.3VNOTE: HDMI port requires level-shifting.IFP interface canNOTE: 1K pull-down required on DP_IG_AUX_CH_N if DP is used.TP_DP_IG_AUX_CHP/NTMDS_IG_HPDTMDS_IG_DDC_CLKTMDS_IG_TXD_P/NTMDS_IG_TXD_P/NTMDS_IG_TXD_P/NTMDS_IG_TXC_P/NTMDS/HDMI=MCP_HDMI_TXC_P/N=MCP_HDMI_TXD_P/N=MCP_HDMI_TXD_P/N=MCP_HDMI_TXD_P/Nbe used to provide HDMI or dual-channel TMDS withoutDP_IG_DDC_DATADP_IG_DDC_CLKInterface Modelevel-shifters.DP_IG_AUX_CH_P/NNOTE: 20K pull-down required on DP_HPD_DET.190 mA (A01, 1.8V)C/ PrMCP79 requires a S5 pull-up.Comp / Pb206 mA (A01)103 mA103 mAOkay to float XTALIN_TV and XTALOUT_TV.Okay to float all RGB_DAC signals.DDC_CLK0/DDC_DATA0 pull-ups still required.Y/ YTV DAC Disable:Okay to float all TV_DAC signals.DDC_CLK0/DDC_DATA0 pull-ups still required.ENET_TXD10 MIIRGMIIInterfaceNetwork Interface SelectNOTE: All Apple products set strap tofeature via software.Thisavoids a leakage issue sinceRGB ONLY5 mA (A01)DisplayPortDP_IG_ML_P/NDP_IG_ML_P/NDP_IG_ML_P/NTMDS_IG_DDC_DATAMCP Signal=MCP_HDMI_DDC_CLK=MCP_HDMI_DDC_DATA=MCP_HDMI_HPD8 mA8 mA16 mA (A01)95 mA (A01)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).TV / ComponentRGB DAC Disable:WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliasesMII, RGMII products will enable83 mA (A01)131 mA (A01)DP_IG_AUX_CH_P/NDP_IG_HPDDP_IG_ML_P/N(See below)(See below)Alias to DVI_HPD for systems using IFP for DVI.=DVI_HPD_GMUX_INT:Pull-down (20k) required in all cases.Alias to HPLUG_DET2 for other systems.Alias to GMUX_INT for systems with GMUX.pull-ups (~10K to 3.3V S0).To ensure pins are lowby default, pull-downs (1K or stronger) must be used.GPIOs 57-59 (if LCD panel is used):In MCP79 these pins have undocumented internal18 OF 110051-7863A.0.0 OF D38C38K32J32M28M29K24J24M26M27T25T23V23U23C37A35E36A36D36B36C36A41B38C39B39A40A39B40E28C26D25C25C24B24D24 F23C22A24E24B23C23A23J23G23C21D21J22B22C27B27B26F40E37G39N30M30L30K30L29K29J29H29L31K31G31E32B34C34D33C33D32C32B32A32B35C35F31C31J30J33H33F33G33G35F35D35E35J31B15E16D43C43E31B30A31D31C30B31E23U140021R182021R186021R186121R185021R181121R1810LVDS_IG_A_DATA_NLVDS_IG_A_DATA_N=PP3V3_S0_MCP_GPIO=PP3V3_ENET_MCP_RMGT=PP3V3_S5_MCP_GPIOTP_ENET_INTR_L=MCP_MII_CRSLVDS_IG_A_DATA_PTP_MCP_RGB_GREENENET_TXDENET_CLK125M_TXCLKENET_TX_CTRLMCP_CLK27M_XTALOUTCRT_IG_VSYNCMCP_TV_DAC_RSETCRT_IG_R_C_PRCRT_IG_HSYNCCRT_IG_G_Y_YCRT_IG_B_COMP_PBENET_TXDENET_TXDENET_TXDENET_RXDENET_RXDENET_RXDENET_RXDENET_RX_CTRLENET_CLK125M_RXCLKTP_ENET_PWRDWN_LENET_MDIOENET_MDCTP_MCP_RGB_VSYNCTP_MCP_RGB_DAC_VREFTP_MCP_RGB_REDTP_MCP_RGB_HSYNCTP_MCP_RGB_BLUE=PP3V3R1V8_S0_MCP_IFP_VDD=PP1V05_S0_MCP_HDMI_VDDPP3V3_S0_MCP_DACPP3V3_S0_MCP_VPLL=PP1V05_ENET_MCP_RMGT=PP3V3_ENET_MCP_RMGTMCP_MII_VREF=MCP_MII_RXERENET_RESET_LLVDS_IG_PANEL_PWRLVDS_IG_BKL_ONLVDS_IG_BKL_PWMLVDS_IG_B_DATA_PLVDS_IG_B_DATA_NLVDS_IG_B_DATA_PLVDS_IG_B_DATA_NLVDS_IG_B_DATA_PLVDS_IG_B_DATA_NLVDS_IG_B_DATA_PLVDS_IG_B_DATA_NLVDS_IG_B_CLK_PLVDS_IG_B_CLK_NMCP_IFPAB_VPROBEMCP_IFPAB_RSETLVDS_IG_A_DATA_PLVDS_IG_A_DATA_PLVDS_IG_A_DATA_NLVDS_IG_A_DATA_PLVDS_IG_A_DATA_NLVDS_IG_A_CLK_PLVDS_IG_A_CLK_N=MCP_HDMI_HPD=DVI_HPD_GMUX_INTMCP_HDMI_VPROBE=MCP_HDMI_TXD_P=MCP_HDMI_TXD_N=MCP_HDMI_TXD_P=MCP_HDMI_TXD_N=MCP_HDMI_TXD_P=MCP_HDMI_TXD_N=MCP_HDMI_TXC_P=MCP_HDMI_TXC_NMCP_HDMI_RSETDP_IG_CA_DETLPCPLUS_GPIODP_IG_AUX_CH_PDP_IG_AUX_CH_N=MCP_HDMI_DDC_DATALVDS_IG_DDC_DATAMCP_DDC_DATA0=MCP_HDMI_DDC_CLKLVDS_IG_DDC_CLKMCP_DDC_CLK0MCP_CLK25M_BUF0_R=MCP_MII_COLPP1V05_ENET_MCP_PLL_MACMCP_MII_COMP_VDDMCP_MII_COMP_GNDTP_MCP_RGB_DAC_RSETMCP_CLK27M_XTALINMCP_TV_DAC_VREFMCP Ethernet & GraphicsSYNC_DATE=09/02/2009 SYNC_MASTER=K2237 10437 10437 10426 10237 10426 10299898989 10789 10789 10789 10789 10737 10489 10789 10789 10789 10789 10789 10789 10789 10789 10789 10737 10489 10789 10789 10789 10789 10737 104OMITBGAMCP7A1/16WMF-LF40247K5%51100K1/16W5%MF-LF402MF-LF1/16W100K5%402MF-LF5%1/16W40210K99988931/16W1%40249.9MF-LF49.9402MF-LF1/16W1%8888826 10726 1079993 10793 10799999999898989883737 10437 10437 10437 10437 10437 10438 10437 104256 19 2118 25 386 2088882626262625 3818 25 3825104104OUTOUTBIBIBIBIINBI OUTOUTOUTOUTININOUTOUTBIBIBIBIBIBIBIBIOUTOUTOUT(7 OF 11)PCIGNDLPCPCI_AD28PCI_REQ4*/GPIO_52/RS232_SIN*PCI_REQ2*/GPIO_40/RS232_DSR*PCI_AD31LPC_PWRDWN*/GPIO_54/EXT_NMI*LPC_RESET0*LPC_AD1LPC_AD2LPC_AD3LPC_CLK0LPC_FRAME*PCI_TRDY*PCI_STOP*PCI_SERR*PCI_RESET1*PCI_RESET0*PCI_REQ3*/GPIO_38/RS232_CTS*PCI_REQ1*/FANRPM2PCI_REQ0*PCI_PME*/GPIO_30PCI_PERR*/GPIO_43/RS232_DCD*PCI_PARPCI_IRDY*PCI_INTZ*PCI_INTY*PCI_INTX*PCI_INTW*PCI_GNT4*/GPIO_53/RS232_SOUT*PCI_GNT3*/GPIO_39/RS232_RTS*PCI_GNT2*/GPIO_41/RS232_DTR*PCI_GNT1*/FANCTL2PCI_GNT0*PCI_FRAME*PCI_DEVSEL*PCI_CLKRUN*/GPIO_42PCI_CLKINPCI_CLK2PCI_CLK1PCI_CLK0PCI_CBE3*PCI_CBE2*PCI_CBE1*PCI_CBE0*PCI_AD30PCI_AD29PCI_AD27PCI_AD26PCI_AD25PCI_AD24PCI_AD23PCI_AD22PCI_AD21PCI_AD20PCI_AD19PCI_AD18PCI_AD17PCI_AD16PCI_AD15PCI_AD14PCI_AD13PCI_AD12PCI_AD11PCI_AD10PCI_AD9PCI_AD8PCI_AD7PCI_AD6PCI_AD5PCI_AD4PCI_AD3PCI_AD2PCI_AD1PCI_AD0LPC_SERIRQLPC_DRQ0*LPC_AD0GND GNDLPC_DRQ1*/GPIO_19 II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1Strap for Boot ROM Selection (See HDA_SDOUT)Int PUInt PUInt PUInt PU (S5)19 OF 110051-7863A.0.0 OF Y3Y2AA7R11R10T4U9T3V9T2T1AB9Y1AA10N1N2N3P2P3U11R4U10R3Y4AA9AD11R9R8R7R6W10AA11AA6AA3AA2AC8AC7AB2AC6AB3U7T5AE11U6U1U5U2W11U3W9V2W8V3AC4W7W4W6W3Y5AA5AA1AC11AC10AC9AE10AC3AE6AE5AE12AD4AE2AE1AE9AD5AD1AD2AD3Y27Y26Y25Y24Y22Y20Y19Y18Y17Y16W43W40W36W24W22W20V7V40V4V37V33V28V27V26V24V22V20V18V17V16U8U4U39U26U24AD34AD33AD28AD27AD26AD25AD24AD20AD19AD18AD17AD16AC5AB33AC40AC36AC22AB40AB4AB37AB34AB28AB27AB26AB25AB24AB23AB21AB20H34AB18U14002 1 R19532 1 R19522 1 R19512 1 R19502 1 R196021R19612 1 R19922 1 R19942 1 R19902 1 R19912 1 R198921R1910CRTMUX_SEL_TV_LPCI_REQ1_LPCI_REQ0_LMCP_RS232_SOUT_LLPC_ADLPC_ADLPC_ADLPC_FRAME_LLPC_ADMCP_RS232_SIN_L=PP3V3_S0_MCP_GPIOFW_PME_LLPC_AD_RTP_LPC_DRQ0_LLPC_SERIRQMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGMCP_DEBUGTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_ADTP_PCI_C_BE_LTP_PCI_C_BE_LTP_PCI_C_BE_LTP_PCI_C_BE_LTP_PCI_CLK0TP_PCI_CLK1PCI_CLK33M_MCP_RPM_CLKRUN_LTP_PCI_DEVSEL_LTP_PCI_FRAME_LTP_PCI_GNT1_LGMUX_JTAG_TMSGMUX_JTAG_TDIMCP_RS232_SOUT_LTP_PCI_INTW_LTP_PCI_INTX_LTP_PCI_INTY_LTP_PCI_INTZ_LTP_PCI_IRDY_LTP_PCI_PARTP_PCI_PERR_LPM_LATRIGGER_LPCI_REQ0_LPCI_REQ1_LAUD_IPHS_SWITCH_ENMEM_VTT_EN_RTP_PCI_RESET1_LTP_PCI_SERR_LTP_PCI_STOP_LTP_PCI_TRDY_LLPC_FRAME_R_LLPC_CLK33M_SMC_RLPC_AD_RLPC_AD_RLPC_AD_RLPC_RESET_LLPC_PWRDWN_LTP_PCI_ADCRTMUX_SEL_TV_LMCP_RS232_SIN_LTP_PCI_ADTP_PCI_GNT0_LPCI_CLK33M_MCPTP_PCI_ADSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP PCI & LPCOMITBGAMCP7A88681313131313131313131919429225% 1/16W MF-LF 402402 MF-LF 1/16W 5%22 40222MF-LF 1/16W 5%40222MF-LF 1/16W 5%5%22402 MF-LF 1/16W10K5%1/16W402MF-LF19402 MF-LF 1/16W 5%8.2K5%8.2K1/16W MF-LF 4028.2K5% 1/16W MF-LF 402 8.2K5% 1/16W MF-LF 4028.2K5% 1/16W MF-LF 402225%1/16W402MF-LFPLACEMENT_NOTE=Place close to pin R849 519 103 49 5149 5149 51 10349 51 10349 51 10349 51 1039 10349 51 1031919 10319 10319196 18 21103888888888888888888888888103888888888819 10319 10388881031031031038881038BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIINININOUTOUTININOUTOUTININUSB9_PUSB9_NUSB8_PUSB8_NUSB7_PUSB7_NUSB6_PUSB6_NUSB5_PUSB5_NUSB4_PUSB4_NUSB3_PUSB3_NUSB2_PUSB2_NUSB11_PUSB11_NUSB10_PUSB10_NUSB1_PUSB1_NUSB0_PUSB_RBIAS_GNDUSB_OC3*/GPIO_28/MGPIOUSB_OC2*/GPIO_27/MGPIOUSB_OC1*/GPIO_26USB_OC0*/GPIO_25SATA_TERMPSATA_C1_RX_PSATA_C1_RX_NSATA_C0_TX_PSATA_C0_TX_NSATA_C0_RX_PSATA_C0_RX_NSATA_B1_TX_PSATA_B1_TX_NSATA_B1_RX_PSATA_B1_RX_NSATA_B0_TX_PSATA_B0_TX_NSATA_B0_RX_PSATA_B0_RX_NSATA_A1_TX_PSATA_A1_TX_NSATA_A1_RX_PSATA_A1_RX_NSATA_A0_TX_NSATA_A0_RX_NV3P3_PLL_USBV1P1_SATA_DVDD1V1P1_SATA_DVDD0V1P1_SATA_AVDD1V1P1_SATA_AVDD0GNDSATA_A0_TX_PSATA_C1_TX_NSATA_C1_TX_PSATA_LED*V1P1_PLL_SATAUSB0_NSATA_A0_RX_PUSBSATA(8 OF 11)BIBI II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 119 mA (A01)If all SATA_Ax & Bx pins are not used, ground DVDD0_SATA and AVDD0_SATA.127 mA (A01, AVDD0 & 1)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).Geyser Trackpad/KeyboardAirPort (PCIe Mini-Card)External DExternal ACameraBluetoothIRExternal BExternal CMinimum 1.025V for Gen2 support43 mA (A01, DVDD0 & 1)84 mA (A01)If all SATA_Cx pins are not used, ground DVDD1_SATA and AVDD1_SATA.Minimum 1.025V for Gen2 supportExpressCard20 OF 110051-7863A.0.0 OF L28AH19AH17AG19AG17AG16AF19AM14AM13AL14AN14AL13AN12AM12AM11AL12AK13AK12AN11AJ12AE16A27H21J21K21L21H25J25K25L25D27E27F27G27J26J27K27L27F29G29A28B28C28D28K23L23F25G25C29D29AE3E12AP3AP2AN2AN3AN1AM1AM3AM2AM4AL3AK3AL4AK2AJ3AJ1AJ2AJ11AJ10AK9AJ9AJ7AJ6AJ4AJ5AH24AH22AH20AH18AG40AG36AG26AG22AG20AG18AF40AF37AF34AF33AF28AF27AF26AF22AF20AF18AF17AF16AD6AE4AE39AE24AE22AD38AD37AD35U140021R205021R205121R205221R205321R206021R2010TP_USB_10NUSB_SDCARD_PUSB_SDCARD_NUSB_EXTB_NTP_SATA_D_D2RNSATA_ODD_D2R_NUSB_EXTC_PUSB_EXTC_NUSB_EXCARD_PUSB_EXCARD_NUSB_EXTB_PUSB_BT_NUSB_TPAD_PUSB_IR_PUSB_IR_NUSB_CAMERA_PUSB_CAMERA_NUSB_EXTD_PUSB_EXTD_NTP_USB_10PUSB_MINI_PUSB_MINI_NUSB_EXTA_PMCP_USB_RBIAS_GNDMCP_SATA_TERMPTP_SATA_F_D2RPTP_SATA_F_D2RNTP_SATA_E_R2D_CPTP_SATA_E_R2D_CNTP_SATA_E_D2RPTP_SATA_E_D2RNTP_SATA_D_R2D_CPTP_SATA_D_R2D_CNTP_SATA_D_D2RPTP_SATA_C_R2D_CPTP_SATA_C_R2D_CNTP_SATA_C_D2RPTP_SATA_C_D2RNSATA_ODD_R2D_C_PSATA_ODD_R2D_C_NSATA_ODD_D2R_PSATA_HDD_R2D_C_NSATA_HDD_D2R_N=PP1V05_S0_MCP_SATA_DVDD1=PP1V05_S0_MCP_SATA_DVDD0=PP1V05_S0_MCP_SATA_AVDD1=PP1V05_S0_MCP_SATA_AVDD0SATA_HDD_R2D_C_PTP_SATA_F_R2D_CNTP_SATA_F_R2D_CPTP_MCP_SATALED_LPP1V05_S0_MCP_PLL_SATAUSB_EXTA_NSATA_HDD_D2R_PUSB_BT_PUSB_TPAD_N=PP3V3_S5_MCP_GPIOPP3V3_S0_MCP_PLL_USBEXCARD_OC_LUSB_EXTC_OC_LUSB_EXTB_OC_LUSB_EXTA_OC_LSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP SATA & USB47 10347 103OMITBGAMCP7A45 10245 10245 10245 10245 10245 10245 10245 1028.2K5%MF-LF1/16W402MF-LF4021/16W8.2K5%8.2K5%MF-LF1/16W4024021/16WMF-LF8.2K5%4021/16W1%MF-LF8062.49K4021/16W1%MF-LF9 46464646 10346 1038846 10346 10347 10347 1038847 10347 10347 10347 10346 10346 1038846 10346 10388103102286 28282845256 1825OUTOUTOUTBIBIOUTOUTOUTOUTOUTOUTOUTOUTOUTINOUTOUTOUTOUTINOUTININOUTININININOUTOUTININ OUTININOUTINEXT_SMI*/GPIO_32V1P1_PLL_NV_HA20GATEBUF_SIO_CLKCPU_DPRSLPVRCPU_VLD CPUVDD_ENFANCTL0/GPIO_61FANCTL1/GPIO_62FANRPM0/GPIO_60FANRPM1/GPIO_63GPIO_1/PWRDN_OK/SPI_CS1GPIO_12/SUS_STAT*/ACCLMTR_EXT_TRIGHDA_BITCLKHDA_RESET*HDA_SDATA_IN0GPIO_2/HDA_SDATA_IN1/PS2_KB_CLKGPIO_3/HDA_SDATA_IN2/PS2_KB_DATAHDA_SDATA_OUTHDA_SYNCINTRUDER*JTAG_TCKJTAG_TDIJTAG_TDOJTAG_TMSJTAG_TRST*KBRDRSTIN*LID*LLB*GPIO_13/MCP_VID0GPIO_14/MCP_VID1GPIO_15/MCP_VID2V3P3_DUAL_HDA_0V3P3_DUAL_HDA_1V1P1_PLL_SP_SPREFPKG_TESTPS_PWRGDPWRBTN*PWRGD_SBRSTBTN*RTC_RST*SIO_PME*SLP_RMGT*SLP_S3*SMB_ALERT*/GPIO_64SMB_CLK0SMB_CLK1/MSMB_CLKSMB_DATA0SMB_DATA1/MSMB_DATAGPIO_11/SPI_CLKGPIO_10/SPI_CS0GPIO_8/SPI_DIGPIO_9/SPI_DOSPKRSUS_CLK/GPIO_34TEST_MODE_ENTHERM_DIODE_NTHERM_DIODE_PXTALINXTALIN_RTCXTALOUTXTALOUT_RTCSLP_S5*GPIO_5/HDA_DOCK_RST*/PS2_MS_DATAGPIO_4/HDA_DOCK_EN*/PS2_MS_CLK HDA_PULLDN_COMPHDAMISC(9 OF 11)OUTOUTINININININININOUTOUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1(MGPIO2)(MGPIO3)Int PU (S5)Int PU (S5)17 mA20 mA 37 mA (A01)7 mA (A01)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).HDA Output CapsFor EMI Reduction on HDA interfacePCInot use LPC for BootROM override.LPC_FRAME# high for SPI1 ROM override.SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_LInt PUInt PU (S5)Int PUInt PU25 MHz42 MHz 0LPC ROMs.So Apple designs will01HDA_SYNC24 MHz0110SPI_CLK SPI_DO01114.31818 MHzBUF_SIO_CLK FrequencyFrequency31 MHzNOTE: Straps not provided on this page.1 MHzSPI Frequency SelectFrequencyNOTE: MCP79 does not support FWH, onlyLPCSPI0SPI1I/F HDA_SDOUTBIOS Boot SelectR1961 and R2160 selects SPI0 ROM bydefault, LPC+ debug card pulls1100LPC_FRAME#0101Int PDInt PDInt PDInt PU (S5)NOTE: MCP79 rev A01 does not supportSPI1 option.Rev B01 will.Int PUInt PU (S5)SAFE mode: For ROMSIP recoveryUSER mode: NormalConnects to SMC for(MXM_OK for MXM systems)automatic recovery.Int PUNC21 OF 110051-7863A.0.0 OF B19B16A19A16K16J16AE17AE18B11C11K22B18C13F21K19G21L19M23H17G17J17C19C20D16D20C16E20L22M24M25L13J18J19F19E19G19B20L15F15 G15K15A15E15B14C15L17K17J15J14L24M21M20L20L26D13C14D12B12C12A12C18D17 C17M22AE7K13U140021R214021R214321R215421R215121R215521R215621R215721R214121R214221R214721 C217221 C217021 C217321 C217121R215021R21102 1R217221R218121R218021R216021R21632 1R21732 1R21712 1R217021R219021R212021R2121RTC_RST_LMCP_VIDSMBUS_MCP_0_DATASMBUS_MCP_1_DATAAP_PWR_ENARB_DETECTJTAG_MCP_TCKJTAG_MCP_TRST_L=PP3V3_S0_MCP_GPIOMCP_VIDMCP_VIDMCP_VIDPM_PWRBTN_LMCP_CPU_VLD=PP3V3_S3_MCP_GPIOTP_MCP_BUF_SIO_CLK=PP3V3_S0_MCPSMC_IG_THROTTLE_LMEM_EVENT_LHDA_SYNCARB_DETECTHDA_BIT_CLK_RHDA_RST_R_LHDA_SDOUT_RHDA_SYNC_R=PP3V3R1V5_S0_MCP_HDAPP3V3_G3_RTCHDA_SDOUTHDA_BIT_CLKHDA_RST_LMCP_GPIO_4AUD_I2C_INT_LAP_PWR_ENMCP_HDA_PULLDN_COMP MCP_GPIO_4AUD_I2C_INT_LPM_SLP_S4_LRTC_CLK32K_XTALOUTMCP_CLK25M_XTALOUTRTC_CLK32K_XTALINMCP_CLK25M_XTALINMCP_THMDIODE_PMCP_THMDIODE_NMCP_TEST_MODE_ENPM_CLK32K_SUSCLK_RMCP_SPKRSPI_MOSI_RSPI_MISOSPI_CS0_R_LSPI_CLK_RSMBUS_MCP_1_CLKSMBUS_MCP_0_CLKPM_SLP_S3_LPM_SLP_RMGT_LSMC_WAKE_SCI_LPM_SYSRST_DEBOUNCE_LPM_RSMRST_L=PP3V3R1V5_S0_MCP_HDAMCP_VIDMCP_VIDPM_BATLOW_LTP_MCP_LID_LTP_MCP_KBDRSTIN_LJTAG_MCP_TMSJTAG_MCP_TDOJTAG_MCP_TDISM_INTRUDER_LHDA_SYNC_RHDA_SDOUT_RTP_MLB_RAM_VENDORTP_MLB_RAM_SIZEHDA_SDIN0HDA_RST_R_LHDA_BIT_CLK_RSMC_ADAPTER_EN=SPI_CS1_R_L_USE_MLBSMC_IG_THROTTLE_LMEM_EVENT_LODD_PWR_EN_LMCP_CPUVDD_ENTP_SB_A20GATEPP1V05_S0_MCP_PLL_NVSMC_RUNTIME_SCI_LMCP_PS_PWRGDSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP HDA & MISC51 10351 61 10351 61 1032849497028 10328 10328 10328 103OMITBGAMCP7A21 50504021/16WMF-LF5%10K 10K5%1/16W402MF-LF402100K5%MF-LF1/16W100K1/16W5%MF-LF402MF-LF5%22K1/16W402 4021/16WMF-LF5%22K4021/16WMF-LF5%22K10K5%MF-LF1/16W402MF-LF4021/16W5%10K100K5%MF-LF1/16W40221 31 32 49 5549 509 921 688CERM4025%10PF50VCERM4025%10PF50VCERM4025%10PF50VCERM4025%50V10PF131313131310K5%MF-LF1/16W4024021%1/16WMF-LF49.951MF-LF1/16W225%4021/16WBOOT_MODE_USERMF-LF40210K5%1/16W402BOOT_MODE_SAFEMF-LF10K5%4021/16W5%8.2KMF-LF1/16W10K5%402MF-LF4021/16WMF-LF225%224021/16W5%MF-LF1/16W225%402MF-LF49499 1031/16W1%1KMF-LF4021/16W402MF-LF49.9K1%49.9K4021%1/16WMF-LF62 10362 10362 10362 10362 103497055 1082121 7421 7455 10821 745213 52 1065213 52 10670 1029 10251 61 103216 18 1921 7421 7421 74686 22 2521 5021 31 32 49 552121 10321 10321 10321 1036 21 2522 282121 6821103 216 21 25821 10321 1039821 10321 103825V1P0_CORE_VDDV3P3V3P3_DUAL_USBV3P3_DUALV3P3_VBATV1P0_VDD_AUXCV1P2_CPU_VTTV1P2_CPUCLK_VTT(10 OF 11) (11 OF 11)GND GND II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 123065 mA (A01, 1.2V)105 mA (A01)43 mA1139 mA250 mA16996 mA (A01, 1.0V)80 uA (S0)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).10 uA (G3)16 mA 266 mA (A01)1182 mA (A01)450 mA (A01)22 OF 110051-7863A.0.0 OF T22AH16Y11V11T11Y6P11AY13AB19AA4M11AD7AN26AB16AB17Y38Y37Y35Y34Y33Y28M37M35M34M10L5L43L40AU1K8K40K4K37K26K18K12K10J8J12G40AN8H23AW35H15H11G8G6G43G4G34AW20G24G22BC12G16G14G12G10F8F32F16F12E33E29E25E21E17E13D6D37D30D26D23D22D19D18D15D14D10C2BC5AY14BC41BC37BC33L35AY6AW31BA4BA1AV40AY41AY38AY37AY34AY33AY30AV12AY10AW43AR43G20AW11AV7AV4AV36AV32AV28F20G28AU4AU38AU36AR30AU32AP33AU28AU12L12AY22AY21AT9AT7AT6AT33AT29AT13AR12AT10AR40AR32AR28AW23AP7AP40AP4AP37AP36AP34AP32AP28AU14AP14AU26AP10Y7AN4AN39AN30AN28AP26AM9AM7AM6AM5AM38AM37AM35AM34AM30AM26AM24AM22AM20AM18AM16AM10AL5AL40AL36AK40AK4AK37AK34AK33AK10AJ8AJ39AH38AH37AH34AH33AH26U1400A20K28J28H27G26K20J20H19G18Y9AA8AB11Y10AD9AB10AE8AD10AG32AL31AD32AK32AK31W32V32AJ32U32T32AA32Y32P32N32N31M33M32M31AH32L34L33L32K35K34K33J36J35J34H37AE32H35G38G37G36F39F38F37E40E39E38AF32D41D40D39C42C41C40B42B41AC32AB32P31R32V21U21T21AC21AA16AC20AF12W25Y23W23W21AA24AH9AH7AH6AH5AC19AH4AH3AH21Y21AH25W28AA23AH2W26AH11AC18AH10AH1AG9AG8AG5AG7AG6AA21AG4AG3AC17AG25AG23AG21AG12AG11AG10AA20AF9AH23AF7AC16AF4AF3AF25AF23AF21AF2AH12AA19AF11AF10AA28AE28AE27AE26AE25AE23AE21AE19U25AA18V25AA27W27AD23AD21AC28AC27AC26AC25AC24AC23AA17AA26AA25U1400=PP1V05_S0_MCP_FSB =PPVCORE_S0_MCP=PP3V3_S0_MCP=PP3V3_S5_MCPPP3V3_G3_RTC=PP1V05_S5_MCP_VDD_AUXCSYNC_DATE=09/02/2009 SYNC_MASTER=K22MCP Power & GroundBGAOMITMCP7A MCP7ABGAOMIT6 14 25 6 256 21 256 2521 286 25 II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 123 OF 110051-7863A.0.0 OF SYNC_DATE=09/02/2009 SYNC_MASTER=K22BLANK PAGE II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 124 OF 110051-7863A.0.0 OF SYNC_MASTER=K22 SYNC_DATE=09/02/2009BLANK PAGEOUT II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 1REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEADQTY DESCRIPTION PART#TABLE_5_ITEMNV: 1x 4.7uF 0603, 4x 0.1uF 0402 (5.1 uF)MCP SATA (DVDD) PowerNV: 1X 4.7UF 0402, 2X 1UF 0402, 2X 0.1UF 0402 (6.9UF)84 mA (A01)270 mA (A01)Apple: 4x 2.2uF 0402 (8.8 uF)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)Apple: 1x 2.2uF 0402 (2.2 uF)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)Apple: 1x 2.2uF 0402 (2.2 uF)19 mA (A01)NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)5 mA (A01)87 mA (A01)562 mA (A01)84 mA (A01)BALLS FOR AVDD0 SO 80% OFCAPACITANCE ON AVDD0NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 1uF 0402, 2x 0.1uF 0402 (16.9 uF)Apple: 1x 2.2uF 0402 (2.2 uF)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).450 mA (A01)57 mA (A01)127 mA (A01)206 mA (A01)37 mA (A01)83 mA (A01)131 mA (A01)16996 mA (A01, 1.0V)23065 mA (A01, 1.2V)(No IG vs. EG data)MCP 3.3V Ethernet PowerMCP79 Ethernet VRefApple: 1x 2.2uF 0402 (2.2 uF)MCP 3.3V AUX/USB Power266 mA (A01)MCP 3.3V/1.5V HDA Power5 mA (A01)MCP FSB (VTT) PowerMCP Memory PowerMCP 3.3V Power4771 mA (A01, DDR3)19 mA (A01)7 mA (A01)1182 mA (A01)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)MCP 1.05V AUX Power105 mA (A01)NV: 1x 10uF 0805, 1x 4.7uF 0402, 2x 0.1uF 0402 (14.9 uF)Apple: 5x 2.2uF 0402 (11 uF)Apple: 2x 2.2uF 0402 (4.4 uF)MCP PCIE (DVDD) PowerAPPLE: 4X 4.7UF 0402, 4X 1UF 0402, 6X 0.1UF 0402 (23.4 UF)MCP Core PowerDIFFERENT THAN ON T18PEX_AVDD RAIL SPLIT BASEDON IG VS. EG. 12 OUT OF 15PEX_DVDD RAIL SPLIT BASEDON IG VS. EG. 8 OUT OF 10CAPACITANCE ON DVDD0BALLS FOR DVDD0 SO 80% OFApple: 7x 2.2uF 0402 (15.4 uF)43 mA (A01) 333 mA (A01)MCP 1.05V RMGT PowerNV: 1x 10uF 0805, 2x 4.7uF 0402, 3x 1uF 0402, 9x 0.1uF 0402 (23.3 uF)K50: 2X 2.2UF 0402, 2X 1UF 0402, (6.4 UF)25 OF 110051-7863A.0.0 OF 21 C259721 C252821 C252921 C259621 C258721 C258521 C258321 C258121 C251821 C252121R259121 C259121R25902 1L259521 C259521 C259021 C258921 C256021 C252521 C25262 1L258021 C250121 C25002 1L25552 1L25862 1L25882 1L25842 1L25822 1L25752 1L257021 C258021 C256421 C256221 C254021 C254121 C254221 C254321 C254421 C254521 C254621 C254721 C254821 C254921 C255021 C255121 C255221 C255321 C257521 C257621 C257321 C257421 C257021 C252021 C257121 C257221 C251521 C251621 C251721 C253021 C253121 C253221 C253321 C253421 C253521 C253621 C251221 C251321 C250821 C250921 C251021 C251121 C250421 C250521 C250621 C250721 C250221 C255521 C258621 C258421 C258821 C258221 C2503=PP1V05_S0_MCP_PEX_DVDD0 =PP1V05_S0_MCP_PEX_DVDD=PP1V8R1V5_S0_MCP_MEM=PPVCORE_S0_MCPVOLTAGE=1.05VMIN_LINE_WIDTH=0.4 MMPP1V05_S0_MCP_PEX_AVDDMIN_NECK_WIDTH=0.2 MM=PP1V05_S0_MCP_SATA_DVDD=PP1V05_ENET_MCP_RMGT=PP1V05_S0_MCP_FSB=PP1V05_S5_MCP_VDD_AUXCMIN_LINE_WIDTH=0.4 MMVOLTAGE=3.3VPP3V3_S0_MCP_PLL_USBMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05VPP1V05_S0_MCP_PLL_PEXPP1V05_ENET_MCP_PLL_MACMIN_LINE_WIDTH=0.4 MMVOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MM=PP1V05_ENET_MCP_PLL_MAC=PP3V3_ENET_MCP_RMGTMCP_MII_VREF=PP3V3R1V5_S0_MCP_HDA=PP3V3_S5_MCP =PP3V3_ENET_MCP_RMGT=PP1V05_S0_MCP_PEX_AVDD0MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMPP1V05_S0_MCP_PLL_NVVOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMVOLTAGE=1.05VPP1V05_S0_MCP_PLL_SATA=PP1V05_S0_MCP_PLL_UFPP1V05_S0_MCP_PLL_COREVOLTAGE=1.05VMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMPP1V05_S0_MCP_SATA_AVDDMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05V=PP1V05_S0_MCP_AVDD_UF=PP3V3_S0_MCP =PP3V3_S0_MCP_PLL_UFMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.05VPP1V05_S0_MCP_PLL_FSB116S0004 RES,0,5%,0402 IG 2 C2574,C2518MCP Standard DecouplingSYNC_DATE=09/02/2009 SYNC_MASTER=K224V20%402X5R4.7UFX5R40220%4.7UF4V4.7uF4VX5R40220%CERM0.1uF40220%10V40220%4VX5R4.7UF40220%X5R4V4.7UF40220%4VX5R4.7UF402X5R4V20%4.7UFX5R4024.7UF4V20%2.2UF20%CERM6.3V402-LFMXMCERM40210V20%0.1uF18MF-LF1%1/16W1.47K4020.1UFCERM20%10V4021.47K1/16W1%MF-LF40230-OHM-1.7A040220%4.7UF4VX5R4024VX5R2.2UF20%402X5R4V20%4024.7UF6.3V2.2UF20%402-LFCERMCERM20%0.1uF10V402CERM20%0.1uF10V402040230-OHM-1.7A4V4.7UF20%X5R4024V20%X5R4024.7UF30-OHM-1.7A0402040230-OHM-1.7A30-OHM-1.7A040230-OHM-1.7A0402040230-OHM-1.7A060330-OHM-5A060330-OHM-5A4V402X5R20%4.7UFCERM402-LF20%2.2UF6.3V402-LF6.3V2.2UF20%CERM20%4.7UFX5R4024V0.1UFCERM20%10V40220%0.1UF10VCERM40220%10V402CERM0.1UF 0.1UF20%CERM10V4020.1UF20%10VCERM40210V20%402CERM0.1UF 0.1UF20%CERM10V4020.1UF20%CERM10V4020.1UF20%CERM10V4026.3V2.2UF20%402-LFCERM2.2UF6.3V20%402-LFCERM CERM6.3V2.2UF20%402-LF2.2UF6.3V20%402-LFCERM6.3V20%CERM2.2UF402-LFCERM402-LF20%6.3V2.2UF6.3VCERM402-LF20%2.2UFMXMMXM6.3VCERM402-LF20%2.2UF402-LFCERM6.3V2.2UF20%40220%4V4.7UFX5RCERM402-LF20%2.2UF6.3VMXM2.2UFCERM402-LF20%6.3VMXM 2.2UF402-LFMXM6.3VCERM20%10%1UF402-1X5R10V402-11UF10%10VMXMX5RCERM402-LF20%2.2UF6.3V402-LF20%6.3VCERM2.2UF6.3V2.2UF20%402-LFCERM6.3V2.2UF20%CERM402-LF2.2UF6.3V20%402-LFCERM6.3V2.2UF20%402-LFCERM402-LFCERM6.3V20%2.2UF10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R402-11UF10%10VX5R10%402-11UF10%1UF402-1X5R10V 4V20%X5R4024.7UF402-LF2.2UF6.3V20%CERM4V4.7UF20%X5R4024.7UF20%4VX5R40220%4.7UF4VX5R4024V4.7UF20%X5R40217 28 6 286 16 306 2228 2818 386 14 226 22201718 3818 25 386 216 22 18 25 3817 2821206162866 21 22 614CRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)TABLE_5_ITEMTABLE_5_ITEMCRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)CRITICAL BOM OPTIONTABLE_5_HEADPART# DESCRIPTION QTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PARTI TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:THE INFORMATION CONTAINED HEREIN IS THE3 6BRANCHREVISIONDRAWING NUMBER SIZEDR IV ALL RIGHTS RESERVEDSHEETPAGE TITLECAD2 1PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.Apple Inc.PAGENOTICE OF PROPRIETARY PROPERTY:ABC3 4 5 6 7 8DB8 7 5 4 2 116 mA (A01)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)NV: 1x 4.7uF 0603, 1x 0.1uF 0402 (4.8 uF)Apple: 1x 2.2uF 0402 (2.2 uF)190 mA (A01, 1.8V)95 mA (A01)Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official docu