apv settings at cold temperatures

October, 2004 CMS Tracker Week 1

APV settings at cold temperatures

Objective: provide recommendations for APV I2C settings for cold operation, for test beam and eventually CMS

Outline: what are the temperature effects and where do they come from? experimental method used to measure and compensate for T effects recommendations from results of measurements on 4 APV TIB module

Mark Raymond, Imperial College


IPREIPCASC

VFP VFS

IPSF ISSFISHA IPSP

IMUXIN

VPSP

APV bias settings

all analogue bias currents on chip derived from one masterreference current (provides reference current to bias gen.)

Iref depends on Vt and R (not V250)

but Vt and R have T dependence

as T↓ , Vt ↑ 1mV / OC R ↓ 0.15% / OC

so Iref ↑ (simulation -> 0.233% / OC)

Reference currentcircuit

APV analogue chain


Temperature effects on APV

T reduces -> master Iref increases -> all I2C bias currents increase -> chip power increases

reduce bias currents (I2C parameters beginning with ‘I’) to compensate

simple method: adjust each parameter by same factor and round to nearest integer

Other T effects

T reduces -> increases => gm increases => circuit speed increases, pulse shape changes and needs re-tuning

APV gain also depends on R at MUX I/P stage, so gain goes up as T reduces

gain


Experimental setup

VUTRI card

TIB module

environmentalchamber

flushed withnitrogen


Experimental setup

sensor

12

56

Pt100 temperature sensors

peltier

peltier

hybrid

Al plate

hybrid in contact with Al plate (thermal grease)2 peltier elements cool platePt100 sensor measures hybrid temperature (where APVs 3 and 4 would be if 6 chip module)another Pt100 measures Al plate underside temperature hybrid temp. ~3O > Al plate temp.temperature stability ~ ± 2O


Experimental setup

peltierfan-cooled

heatsink

90Srsource

scintillatorbeneath sensor

Pt100 hybrid in thermalcontact with Al plate

peltier


Method

1) wait for environment to stabilise at target hybrid temperature

2) adjust peltier current to fine tune hybrid temperature to target value

3) tune I2C Ibias parameters to get ~ same V250 and V125 currents as for standard values @ +30O

4) tune ISHA to achieve close approx. to 50 ns peak mode pulse shapeaverage of 16 pulse shapes corresponding to one test pulse linepulse shape tuned “by eye”

not found necessary to alter VFS setting (or VPSP)

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time [nsec]

+30o

Isha=46

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time [nsec]

-20o

Isha=30

+30 -20peakideal CR-RCdecon


Pulse shapes120

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+30o

Isha=46

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+10o

Isha=38

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Isha=45

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-10o

Isha=30

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Isha=32

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-20o

Isha=30

Pulse shapes for all temperatures aftertuning for correct power and pulse shape

VFS = 70 for all temperatures

ICAL=80 in all cases, but outputsignal amplitude increases as T↓

+30 1.00

+20 1.04

+10 1.08

0 1.12

-10 1.17

-20 1.21

relativetest pulse height

dependenceon T

ICAL derived from master ref. butgain also increases as T↓ so twocontributing effects here


Peak & deconvolution pulse shapes

ICAL: 0 -> 240 in steps of 40 (1 mip ~ 60 ADC units)


Chip-to-chip variation on this hybrid80

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[nsec]

apv5 apv6 apv2 apv1

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apv5 apv6 apv1 apv2

room temperature measurement – hybrid at 30O

same I2C parameters for all 4 chips (including VFS and ISHA)small ICAL response differences here (but absolute value of test charge subject to chip to chip variation) and small pulse shape differences but these chips will have been picked from same wafer (probably same location on wafer) how will pulse shape vary across full production?

-> look at wafer probe data


peak and deconvolution mode pulse shapes are acquiredfor every chip at wafer test time (for same I2C parameters)

example data here (presented at LECC’02) for lots 1 to 5(see http://www.hep.ph.ic.ac.uk/~dmray/pdffiles/APV_LECC02_HEP.pdf)

plots show pulse shapes for all KGD normalised to max. pulse height

Peak DeconvolutionLot 1 Lot 1

Lot 4

Lot 5Lot 3

Lot 2

Lot 3 Lot 5

Lot 2 Lot 4

Wafer to wafer pulse shape variation

conclusion

one set of start-up I2C parameters will suit all chips, at least for a particular module type

fine tuning can then followlater


Beta pulse height spectraPeak Mode Deconvolution

90Sr source, sensor HT 250V

strip signal included if neighbour signal < 3 x noise

S/N values quoted for mostprobable signal

best way to measure gain changes with T gain increase, +30 -> -20 = ~ 7% (7.5% expected from gain resistor) S/N increase: ~13% peak mode, ~8% deconvolution

not quite the same but significant errors here (statistics and details of pulse shape)


Beta pulse height spectra

Peak Mode Deconvolution


Recommended I2C parameters vs. T

+ 30O + 20O + 10O 0O - 10O - 20O

IPRE 98 96 93 92 85 85

IPCASC 52 51 49 49 45 45

IPSF 34 34 33 32 30 30

ISSF 34 34 33 32 30 30

IPSP 55 54 53 52 48 48

IMUXIN 34 34 33 32 30 30

VFP 30 30 30 30 30 30

VPSP 43 43 43 43 43 43

ISHA 46 45 38 32 30 30

VFS 70 70 70 70 70 70

total power

[mW/module]

1465 1480 1473 1479 1455 1475

power/APV 366 370 368 374 364 368

all bias current params (those starting with ‘I’) adjusted by same factorto achieve ~ same total module power at each temperature

over ~ 10O range power variation small(~ few %) so not necessary to re-tuneparameters for variations at this level

slight over-adjustment between 0 -> -10so no further adjustment needed for -20

power/APV = total power / 4 but this alsoincludes APVMUX, DCU and PLL power(not possible to separate out)

recommend values in –10O column for CMS operation

Note: this doesn’t apply to VPSP, ISHAand VFS. ISHA and VFS will depend on sensor type and some chip to chip variationcan also be expected


Digital header amplitude

digital header (and tick mark) amplitude varies with T because levels are set by current ref. circuit similar to that for bias generator

+ 30O + 20O + 10O 0O - 10O - 20O

relative dig. head amplitude

1.00 1.02 1.05 1.07 1.09 1.11

dig.headamp.


analogue baseline

VPSP setting

VPSP setting adjusts analogue baseline position

works by introducing DC voltage offset at APSP O/P which in turn produces DC offset current flowing in the MUXstages

choice of VPSP for this study no major movement in analogue baseline observed with temperature same value (43) used throughout

sets baseline at ~ 25% relative to dig. head amp. allows plenty of room for signals and negative CM excursions

note: power penalty if set higher than necessary e.g. ~ 7% power increase if move from 25% to 50% level

0

100%

50%

module powerbaseline pos’n


What happens if no I2C change with T?

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standard I2C settings used for all temperatures

module power increases by ~ 10% (+30 -> - 20)

test pulse amplitude increases

gm increase in shaper and preamp -> rise-timefaster as T decreases

deconvolution pulse shape sensitive torise-time


T measurement using DCU

DCU ADC value shows linear dependenceon hybrid temperature measured with Pt100

9.65 slope value similar to 9.22 quoted inDCU manual

clearly no problem to use DCU to measurehybrid temp. if calibration factor known

2700

2600

2500

2400

2300

2200

DC

U A

DC

val

ue

3020100-10-20

hybrid temp. [deg.C]

2412+9.65/deg.


Summary

recommendations provided for APV I2C settings for low temperature operation based on studies of 4 chip TIB module hybrid temperature used as reference

provides starting point for module operation but free parameters still exist VPSP sets analogue baseline. remember power penalty if set high ISHA/VFS tune pulse shape

~ some chip to chip variationwill be different for different sensor types

results here consistent with previous studies on single chips presented CMS week in Catania (June 2001, E. Noah)

note available with more details: http://www.hep.ph.ic.ac.uk/~dmray/pdffiles/cold_APV_params.pdf (preliminary version already circulated)

ongoing work verify parameter choice for 6 chip TIB module – expect to be same as 4 chip version look at other module types – old TOB module available

- 10O

IPRE 85

IPCASC 45

IPSF 30

ISSF 30

IPSP 48

IMUXIN 30

VFP 30

VPSP 43

ISHA 30

VFS 70


Supply currents vs. T if no I2C change

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mod

ule

curr

ent [

mA

]

403020100-10-20

hybrid temperature [ oC]

I125 I250 total I250 digital only I250 analog only

standard I2C settings used for all temperatures

I125 shows 16% increase, +40 -> -20 (close to 14% simulated)

I250 total includes digital and analogue

I250 digital only measured by switching biasoff in mode registers small ~ 3.5% increase, +40 -> -20

I250 analogue only = I250 total – I250 digital only ~ 21% increase (> I125 but probably includes some contribution from analogue baseline shift)

module power +40 -> -20 1.43 W -> 1.56 W ~ 10% increase

but extra power also dissipated in cables

apv settings at cold temperatures

Documents

chip power increases

pulse shapevfs

t effects recommendations

i2c bias currents

pulse shape changes

t dependence

bias currents i2c parameters

test pulse linepulse