assignment 3 88/8/10) 1 following tables have been collected...
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In the name of Allah
Assignment 3 (Deadline: 88/8/10)
1‐ Following Tables have been collected and typed by a student; unfortunately tables have some typing and logical mistakes. This question requests you to find and correct these mistakes.
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Notice: You will need tables in next pages to solve the question. Caution, you are not asked to correct tables below and these are just for referring.
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2‐ The FETCH process in CPU contains steps which are depicted as state diagram as follow.
Below timings are examples of a simple FETCH. As its obvious the first one doesn’t contain any wait while the second one does.
Opcode FETCH without wait
Opcode FETCH with wait
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One of the typical circuits for providing one cycle waiting in FETCH can be designed as follow.
Finally what the question expected you to do: a) Draw Q and Q’ timings in diagram according to pervious circuit.
b) Design a circuit like previous one which provides 2 cycle waiting instead of one cycle.