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ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

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Page 1: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO DEVELOPMENT BOARD TESTING

An Overview and Test Summary of High Speed Input/Output Boards

Lawrence Carlson

August 10, 2010

Page 2: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 2

Acknowledgments

Testing completion based on the collaborative efforts of several individuals

– Dave Nelson– Martin Kocian– Matthew Weaver– Su Dong

Page 3: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 3

Work Overview

• Establish familiarity with testing protocols– Write manual for testing procedure

• Documentation– Summary – Repair Log– Individual procedure results / measurements

• Make documentation available to developers– Web-based proposal

Page 4: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 4

HSIO Test Areas

Page 5: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 5

HSIO Untested Areas

Page 6: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 6

HSIO Board Features

• XILINX Virtex 4

• 32 MB DDR SDRAM

• General Purpose Rotary Switch

• USB 1.0 & 2.0 interface chips

• 4-character x 2 LED display

• 10/100/1000 Ethernet Mac-PHY transceiver

• On-board power supplies for all necessary voltages

Page 7: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 7

HSIO Board Features

• Power Indicator LED

• Two SFP+ giga-bit fiber interfaces

• One SFP+ giga-bit interface

• One XFP giga-bit fiber interface

• Two AFBR giga-bit interface

• XILINX XCF32P Platform Flash storage device (PROM)

Page 8: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 8

Testing Observations

• Twenty-seven boards ordered– Two types

• FX60 (25)

• FX100 (2)

– One FX60 shipped unloaded

• Testing discrepancies between LINUX and Windows– Failures in LINUX passed in Windows

• Drivers?

– Variance between LINUX installs

FX100 contains more logic cells, I/O Pairs, configuration memory bits.

Page 9: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 9

Test Protocol (breakdown)

• Resistance checks– Pre-test

• Voltage checks– Across on-board chips

• Component checks– Bit files downloaded via dongle to XILINX FPGA

• Documentation

Page 10: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 10

Sample Test Data Sheets

Summary Sheet Jumper: Voltages and Currents

Page 11: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 11

Test Results (Initial Testing)

• FX60– Twenty-four failures

• Voltage short (3.3V pin) x 1 – Testing Halted• Pin Wiring (P5 and J26) x 1• Ethernet port indicator lights x 23

– Quantity of failures suggest fundamental flaw» R151 resistor misplaced

• FX100– Two Failures*

• USB 2.0 communication• DDR memory read/write

*- Perhaps due to bit file compilation (different from FX60)

R151 resistor placed in the R153slot. Swapping locations resolved

Indicator light issues.

Page 12: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 12

Post-test Failures

• Reset switch (SW1) – 2 boards– Required manual wiring SW1 to U2 port 1

• PROM program failure– Inconsistencies in PROM programming under LINUX, even after

initial pass– No such issue with Windows

• SFP+ Ethernet port failure– Swapping Ethernet inserts for optical fiber inserts yields success

test

Suggest an extended burn-in time to isolate additional post-test failures

Page 13: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 13

What Next?

• Finalize manual (version 1.1) – Image/diagram insertion– FT_PROG_1.9 documentation

• Update test sheet documentation• Consolidate documentation into web-based format

– User's Guide– Testing Protocol– Test Data Sheets– Summaries– Test files (?)

Page 14: ATLAS HSIO DEVELOPMENT BOARD TESTING An Overview and Test Summary of High Speed Input/Output Boards Lawrence Carlson August 10, 2010

ATLAS HSIO Development Board TestingPage 14

Things to Consider

• Hosting of files?– Currently residing

http://www.slace.stanford.edu/~lcarlson/hsio– Static location

• Bit files availability– Potential issues with support– Include drivers with recommended installation instructions

• Testing of final (27th) board– Update of index.html– Inclusion of documentation