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The introduction of copper interconnect forsemiconductors presents several uniquechallenges for critical dimension metrologyin both lithography and etch processes. Thedual-inlaid process introduces multi-pat-tern features and higher aspect ratio struc-tures. These dual-layer structures presentnew challenges to the imaging and mea-surement capability of the CD SEM, butalso offer opportunities through new in-device measurements to collect processinformation that has been unavailable inconventional interconnect processing.

With copper interconnect, the nature ofdual-inlaid structures adds complexity tolithography and etch processing. Patterningtwo layers sequentially prior to metal depo-sition increases the aspect ratio of fin a lstructures, and forces etch depth control notpreviously required. Higher aspect ratiostructures require thicker resists which canreduce process windows and make clearingcontact holes and trenches more difficult.

In parallel to these new processing chal-lenges, additional constraints are placed onthe critical dimension metrology. The inter-actions now possible between the sequen-tially patterned contact and line layers dic-tate that in-device features must be mea-sured more often or more complex dual-layer test structures must be used for processcontrol metrology.

Dual-inlaid process fl o wDual-inlaid interconnect processing repre-sents a significant departure from conven-tional single-layer processing. While themetal line and via steps are completely inde-pendent in aluminum metal patterning, thetwo steps are combined for dual-inlaid cop-p e r. Two distinct options for the metal andvia steps within the dual-inlaid process arepossible:

1) The metal line areas are patterned astrenches and partially etched into thedielectric. Contacts or vias are patternedwithin the line trenches, then etched intothe trench. The specific CD metrology chal-lenge with this scheme is that the contactholes in resist are very deep. Excellent elec-tron collection efficiency is required fromthe CD SEM in order to image and measurethe holes.

2) Vias are patterned and partially etchedinto the dielectric. Line patterns are printedover the holes, then the lines are etched intothe dielectric, and the vias are etchedthrough the dielectric to make contact withthe metal or poly below. The CD metrologychallenge here is that not only are the con-tact holes deep, but both the linewidth andvia must be measured after litho and etch.The linewidth may be in spec, but it is stillpossible that the contacts have not beeneffectively cleared. Both must be measuredand controlled.

Several dimensions are critical within theprocess flo w. Figure 1 shows a cross-sectiondiagram of the dual-inlaid structure. Metalwidth (1), metal space (5) and via width (2)are the CD measurements typically made inan interconnect process. Two additionalcritical dimensions exist in the structure —oxide space (3) and via overlay (4) —but arenot generally measured in top-down SEMm e t r o l o g y. The oxide space (3) cannot bedetermined because the metal lines are notvisible with an SEM through the dielectricl a y e r. The via overlay (4) is not measuredusing conventional optical measurementtechniques due to the complexity of the in-device measurement of a structure at thebottom of a deep contact hole. Theimproved capabilities in the newest CDSEMs such as the 8100XP enable automat-

Autumn 1999 Yield Management Solutions

CD SEM Measurement of Dual-Inlaid CopperInterconnectby Richard Elliott, Strategic Marketing Manager, KLA-Tencor E-Beam Metrology and John Allgair, Ph.D., Litho-Metrology, Motorola, APRDL

g u re 1. Process cr itical

i m e n s i o n s .

Metal 1 CD

Via 1 CD

Via 1 to Adjacent Metal 1

(Oxide) Space

Via 1 to Meta l 1

Overlay To l e r a n c e

Metal 1 space

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ic measurements such as via overlay thathave previously been impracticably diffi-c u l t .

CD SEM capability r e q u i re m e n t sIn order to measure a dual-inlaid contacthole or trench feature at litho or etch, twokey attributes are required of the metrologyCD SEM. First, the SEM must be able toefficiently capture electrons from deepstructures to provide clear images of thebottoms of trenches and contact holes.These dual-inlaid structures can be up totwice the depth of corresponding single-layer line or contact structures in conven-tional interconnect processes. A typicaldeep-trench structure is shown in figure 2.

Second, the metrology algorithm must havethe capability to exclude irrelevant edgesfrom the analysis of the measurement scan.To measure a contact hole that is patternedin the bottom of a line trench, the trenchedges must be ignored. Similarly, if thetrench width is to be measured, the presenceof the contact hole must be ignored.

Apparent in the figure are both specificmeasurement challenges, a deep trenchcombined with additional feature edges, aswell as the presence of the via space. Themeasurement of this via space can provides i g n i ficant information that is not availablefrom just the metal linewidth or contacto p e n i n g .

Adjacent interconnect leakageOne failure mechanism for interconnectfailure is current leakage between two adja-cent interconnect paths. A short can devel-op due to the confluence of several factors. Al a rge Metal 1 or a large V1 CD will makeleakage more likely. In addition, a misalign-ment between the Metal 1 and V1 layers canbring the oxide space (3) to a critical level.The cross-section image of the interconnectstructure in Figure 3 shows the possibilityof encroachment between the via and under-lying adjacent metal pattern. Note that thevia does not have to touch the adjacentmetal line for excessive leakage to occur. Ifthe oxide space is too small, current leakingthrough the space will result in a failure.

This oxide space cannot be measured direct-ly in-line — a destructive cross-sectionmeasurement is required. However, using a

CD SEM, this space can be estimated byusing the metal line measurement com-bined with the measurement of the via tometal overlay. This measurement can bemade within the actual working device, notjust in a scribe line test pattern. The mea-surement of overlay on in-device structuresrequires a third unique CD SEM capability.With curved structures, the ability toobtain multiple scans over a profile and fit acurve to a device structure is necessary. Thiscurve fit can then be analyzed to determinethe maximum or minimum space. Figure 4shows a measurement setup that can be usedto measure overlap at the bottom of the pat-terned via. The oxide space (3) can be calcu-lated by this formula:

Oxide Space (3) = M1 space (5) - Via overlay (4)

Given this in-line measurement, correlationto the cross-section measurement can bedrawn, and an appropriate in-line disposi-tion threshold for interconnect leakage canbe established. Good correlation has beenmeasured between the oxide space inferredfrom CD SEM measurements, and leakagecurrents measured at final electrical test(Reference) which verifies the in-circuitmeasurement capability of the 8100XP.

C o n c l u s i o nCopper interconnect processing has raisednew challenges for critical dimensionmetrology and process control. The deep-trench imaging performance and metrologyalgorithm intelligence of the CD SEM mustbe such that the complex, high-aspect ratiostructures generated during dual-inlaid pat-terning can be measured. Hidden in thismeasurement challenge, however, is theopportunity to increase the value of CDmetrology at the interconnect levels.Through the additional in-device measure-ment of via to metal overlay in combinationwith the traditionally measured metal andvia CDs, an estimate of the propensity for interconnect leakage can be obtained.This measurement can provide valuableinformation towards isolating a seriousyield-limiting event. ❈

R e f e r e n c eA l l g a i r, J. et. al., SPIE’s Conference on Micro l i t h o g r a p h y,1 9 9 9 .

Autumn 1999 Yield Management Solutions

F i g u re 2. Typical dual-in laid

via stru c t u re .

V1 space

H

F i g u re 3. Cross-section of dual-

inlaid interc o n n e c t .

Oxide space

F i g u re 4. CD SEM image and

m e a s u rement of via overlay. The

blue lines indicate the location

of the measured edges, while

the red lines define the box in

which the measurement is con-

f i n e d .

H

c i r cle RS#009