8/9/2007 - 1 -

AW-GH320

IEEE 802.11 b/g Wireless LAN Module IC

For Mobile Phones, DSCs, PMPs and Gaming Devices

Datasheet

Version 1.3

Document release Date Modification Initials Approved

Version 0.6 2006/11/8

1. Add some pin description of the pin 33 and 39 at P13 2. Add note about the reflow temperature at P25 3. Change module high to 1.4mm

Ivan Chen CE Huang

Version 0.7 2006/11/22 1.Improve the customer product yield AW-GH320 Top View PCB Layout at p24 2. Modify operating Temperature

Ivan Chen CE Huang

Version 0.8 2006/12/26 1.Imporve Rx Sensitivity 2. Some system VIO_X2 use 3.3V stable than 1.8V

Ivan Chen CE Huang

Version0.9 2007/2/23 Ervise Top View PCB Layout footprint at P24 Ivan Chen CE Huang

Version1.0 2007/04/23 1.Add Reliability test and Certification test 2.Modified reflow profile time

Ivan Chen CE Huang

Version1.1 2007/05/31 Modify the pad size to improve the customer’s SMT yield Ivan Chen CE Huang

Version1.2 2007/06/25 Modify Power manager define and add SMT preparation Ivan Chen CE Huang

Version1.3 2007/08/09 1.Add Japan ch14 target power 2. Update operating temperature Ivan Chen CE Huang

8/9/2007 - 2 -

1. General Description 1-1. Product Overview and Functional Description AzureWave Technologies, Inc. introduces the first IEEE 802.11b/g WLAN module IC---AW-GH320.

The module IC is targeted to mobile devices including Mobile Phones, Digital Still Cameras (DSCs), Portable Media Players (PMPs), Personal Digital Assistants (PDAs), and Gaming Devices which

need small footprint package, low power consumption, multiple interfaces and OS support. By using AW-

GH320, the customers can easily enable the Wi-Fi embedded applications with the benefits of high

design flexibility, short development cycle, and quick time-to-market.

Compliance with the IEEE 802.11b/g standard, the AW-GH320 uses Direct Sequence Spread Spectrum

(DSSS), Orthogonal Frequency Division Multiplexing (OFDM), DBPSK, DQPSK, CCK and QAM

baseband modulation technologies. A high level of integration and full implementation of the power

management functions specified in the IEEE 802.11 standard minimize the system power requirements

by using AW-GH320. In addition to the support of WPA/WPA2 and WEP 64-bit and 128-bit encryption,

the AW-GH320 also supports the IEEE 802.11i security standard through the implementation of AES-CCMP. The support of QoS also enables the AW-GH320 for the use of video, voice and multimedia

applications.

The AW-GH320 provides host interfaces SDIO and G-SPI which is suitable for multiple mobile

processors for different applications. With the support of Bluetooth co-existence and cellular phone co-existence, the AW-GH320 is also the best solution for mobile phones and PDA phones applications.

AW-GH320 module adopts Marvell’s latest highly-integrated WLAN SoC---88W8686. All the other

components are implemented by all means to reach the mechanical specification required. AW-GH320

uses surface mount technologies (SMT) that solder join and soldering strength provide mounting

mechanism to secure the AW-GH320 module against vibration and shock on the host system.

1-2. Key Features

Small footprint: 9.6mm(L) x 9.6mm(W) x 1.3 mm(H) SDIO, G-SPI interfaces support Bluetooth and Cellular phone co-existence support Multiple power saving modes for low power consumption IEEE 802.11i for advanced security Quality of Service (QoS) support for multimedia applications Multi OS support including WinCE, Linux, u-Itron, ThreadX Lead-free design

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A simplified block diagram of the AW-GH320 module is depicted in the figure below.

AzureWave AW-GH320

BT_Coexistance

POR and Software Configuration 2.4 GHz

ANTENNA

SDIO/GSPI Interface

POWER SUPPLIES

OSC

88W8686

EEPROM

2.4 GHz SPDT

2.4 GHz BPF

2.4 GHz PA

2.4 GHz RX

2.4 GHz TX

2.4 GHz Balun

WLAN (802.11 b/g)

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1-3. Specifications Table Model Name AW-GH320

Product Description Wireless LAN Module IC

WLAN Standard IEEE 802.11b/g, Wi-Fi compliant

Host Interface SDIO/G-SPI

Operating Conditions

Voltage 3V /1.8V/(1.2V)+/- 10%

Temperature Operating: -40 ~ 85oC

Humidity 15% ~ 95%

Dimension 9.6mm x 9.6mm x 1.3mm

Package LGA

Weight Less than 10 grams

Electrical Specifications

Frequency Range 2.4 GHz ISM radio band

Number of Channels

802.11b: USA, Canada and Taiwan – 11 Most European Countries – 13 France – 4, Japan – 14 802.11g: USA and Canada – 11 Most European Countries – 13

Modulation DSSS, OFDM, DBPSK, DQPSK, CCK, 16-QAM, 64-QAM

Output Power

802.11b(Ch1~13): typical 15dBm +/- 1.5dBm 802.11b(Ch14): typical 10dBm +/- 1.5dBm 802.11g: typical 12dBm +/- 1.5dBm

Antenna One RF port on pad

Receive Sensitivity 802.11b: typical -86dBm at 11Mbps 802.11g: typical -71dBm at 54Mbps

Medium Access Protocol CSMA/CA with ACK

Data Rates 802.11b: 1, 2, 5.5, 11Mbps 802.11g: 6, 9, 12, 18, 24, 36, 48, 54Mbps

Power Consumption

TX g mode 54MHz: 197.39mA(CW mode) b mode 11MHz:220.39mA(CW mode) RX g mode:170.12 mA b mode:148.78 mA Deep Sleep Mode:0.42mA

Operating Range Open Space: ~300m ; Indoor: ~100m (The transmission speed may vary according to the environment)

Security

WEP 64-bit and 128-bit encryption with H/W TKIP processing WPA/WPA2 (Wi-Fi Protected Access) AES-CCMP hardware implementation as part of 802.11i security

standard

Operating System Compatibility Win CE 4.2/.NET, Win CE 5.0, Linux, Pocket PC 2004/2005

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Co-Existence Bluetooth and cell phone(GSM/DCS/WCDMA/UMTS/3G) co-existence

Reliability Test ESD-MM:JEDEC EIA/JESD22-A115-A Class 1 ESD-HBM:MIL-STD-883F Method 3015.7 Class 1

Certification Pre-CE/ pre-FCC/pre-SRMC

2. Electrical Characteristics 2-1. Absolute Maximum Ratings

Symbol Parameter Condition Min Typ Max Units 3V_PA PA power supply 3.0 4.6 V

3V_IO Digital I/O power supply 3.0 4.6 V

1.8 2.3 VIO_X1 Host I/O power supply

3.3 4.2 V

1.8 2.3 VIO_X2 Digital power supply

3.3 4.2 V

VDD18_X3 Internal voltage power supply 1.8 2.3 V

VDD18A Analog I/O power supply 1.8 2.3 V

1.2_EXT Digital power supply 1.2 1.35 V

2-2. Recommended Operating Conditions

Symbol Parameter Condition Min Typ Max Units 3V_PA PA power supply 2.7 3 3.3 V

3V_IO Digital I/O power supply 2.7 3 3.3 V

1.62 1.8 1.98 VIO_X1 Host I/O power supply

2.97 3.3 3.63 V

1.62 1.8 1.98 VIO_X2 Digital power supply

2.97 3.3 3.63 V

VDD18_X3 Internal voltage power supply 1.62 1.8 1.98 V

VDD18A Analog I/O power supply 1.7 1.8 1.9 V

1.2_EXT Digital power supply 1.08 1.2 1.32 V

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2-3. Serial Interface Specification 2-3-1. DC Electricals- 1.8V/3.3V(VIO_X1/VIO_X2)

Symbol Parameter Operating

Mode Condition Min Typ Max Units

V18 Power supply voltage 1.8V 1.62 1.8 1.98 V

V33 Power supply voltage 3.3V 2.97 3.3 3.63 V

1.8V 1.2 V18+0.3 V VIH Input high voltage

3.3V 2 V33+0.3 V

1.8V -0.3 0.6 V VIL Input low voltage

3.3V -0.3 1V V

1.8V 1.22 V VOH Output high voltage

3.3V 2.57 V

1.8V 0.4 V VOL Output low voltage

3.3V 0.4 V

IOH@1.62V-0.4V Output high current 1.8V SR[1:0]=3 7. 12 16 mA

IOL@0.4V Output low current 1.8V SR[1:0]=3 8 16.5 23 mA

IOH@1.62V-0.6V Switch high current 1.8V SR[1:0]=3 10 16 22 mA

IOL@0.6V Switch low current 1.8V SR[1:0]=3 10 22 32 mA

OH@2.97V-0.4 Output high current 3.3V SR[1:0]=3 9.5 13.5 16.5 mA

IOL@0.4V Output low current 3.3V SR[1:0]=3 10 18 23.5 mA

IOH@2.97V-0.6V Switch high current 3.3V SR[1:0]=3 13 18.5 23 mA

IOL@0.6V Switch low current 3.3V SR[1:0]=3 13.5 24.5 33 mA

I_pullup 15.7 21.7 28.7 uA

I_pulldown 11.8 22.5 33.1 uA

I_pullup_weak 2.1 2.4 3.4 uA

I_pulldown_weak 1.3 3 4.9 uA

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AC Electricals- 1.8V/3.3V(VIO_X1/VIO_X2)

Symbol Parameter Operating

Mode Condition Min Typ Max Units

1.8V 0.2*V18-

0.8*V18 0.58 1.05 1.65 V/ns TSLEW_RISE

@10pF

Load

Output rise slew rate

when SR1[1:0]=3 3.3V

0.2*V33-

0.8*V33 0.81 1.39 2.08 V/ns

1.8V 0.8*V18-

0.2*V18 0.6 1.34 2.38 V/ns TSLEW_FALL

@10pF

Load

Output fall slew rate

when SR1[1:0]=3 3.3V

0.8*V33-

0.2*V33 0.73 1.49 2.21 V/ns

1.8V 0.2*V18-

0.8*V18 0.58 1.05 1.65 V/ns TSLEW_RISE

@10pF

Load

Output rise slew rate

when SR1[1:0]=2 3.3V

0.2*V33-

0.8*V33 0.81 1.39 2.08 V/ns

1.8V 0.8*V18-

0.2*V18 0.4 0.88 1.38 V/ns TSLEW_FALL

@10pF

Load

Output fall slew rate

when SR1[1:0]=2 3.3V

0.8*V33-

0.2*V33 0.64 1.29 1.86 V/ns

1.8V 0.2*V18-

0.8*V18 0.19 0.34 0.5 V/ns TSLEW_RISE

@10pF

Load

Output rise slew rate

when SR1[1:0]=1 3.3V

0.2*V33-

0.8*V33 0.38 0.59 0.82 V/ns

1.8V 0.8*V18-

0.2*V18 0.2 0.45 0.68 V/ns TSLEW_FALL

@10pF

Load

Output fall slew rate

when SR1[1:0]=1 3.3V

0.8*V33-

0.2*V33 0.36 0.7 0.89 V/ns

1.8V 0.2*V18-

0.8*V18 0.19 0.34 0.5 V/ns TSLEW_RISE

@10pF

Load

Output rise slew rate

when SR1[1:0]=0 3.3V

0.2*V33-

0.8*V33 0.38 0.59 0.82 V/ns

1.8V 0.8*V18-

0.2*V18 0.2 0.45 0.68 V/ns TSLEW_FALL

@10pF

Load

Output fall slew rate

when SR1[1:0]=0 3.3V

0.8*V33-

0.2*V33 0.36 0.7 0.89 V/ns

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2-3-2. DC Electricals-3V pads(3V_IO) Symbol Parameter Condition Min Typ Max Units

V30 Power supply voltage 2.7 3.0 3.3 V

VIH Input high voltage 1.0 1.2 V

VIL Input low voltage 0.6 0.8 V

VHYS Input hysteresis 250 mV

VOH Output high voltage 2.3 V

VOL Output low voltage 0.4 V

IOH@2.97V-0.4V Output high current 4.5 9.5 13.5 mA

IOL@0.4V Output low current 4.5 9 12 mA

IOH@2.97V-0.6V Switching current high 5.5 14 20 mA

IOL@0.6V Switching current low 5.5 12.5 18 mA

AC Electricals-3V pads(3V_IO)

Symbol Parameter Condition Min Typ Max UnitsTSLEW_RISE@10pF

Load Output rise slew rate 0.2*V30-0.8*V30 0.31 0.63 1.16 V/ns

TSLEW_FALL@10pF

Load Output fall slew rate 0.8*V30-0.2*V30 0.35 0.68 1.02 V/ns

2-4. Input Clock Specifications AW-GH320 requires external reference clock source. The frequency can be 19.2, 20, 26, 38.4(default),

40 MHz. The selection of reference clock is configurable based on boot strip setting.

26 MHz Clock Timing Note: Over full range of values specified in the Recommended operating conditions unless otherwise

specified

Symbol Parameter Condition Min Typical Max Units TP_xo26 XO26 period 38.462-20ppm 38.462 38.462+20ppm ns

TH_xo26 XO26 high time 15.3848 19.231 23.0772 ns

TL_xo26 XO26 low time 15.3848 19.231 23.0772 ns

TR_xo26 XO26 rise time 5 ns

TF_xo26 XO26 fall time 5 ns

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38.4 MHz Clock Timing Note: Over full range of values specified in the Recommended operating conditions unless otherwise

specified

Symbol Parameter Condition Min Typical Max Units TP_xo38.4 XO38.4 period 26.042-20ppm 26.042 26.042+20ppm ns

TH_xo38.4 XO38.4 high time 10.4168 13.021 15.6252 ns

TL_xo38.4 XO38.4 low time 10.4168 13.021 15.6252 ns

TR_xo38.4 XO38.4 rise time 5 Ns

TF_xo38.4 XO38.4 fall time 5 ns

40 MHz Clock Timing Note: Over full range of values specified in the Recommended operating conditions unless otherwise

specified

Symbol Parameter Condition Min Typical Max Units TP_xo40 XO40 period 25-20ppm 25 25+20ppm ns

TH_xo40 XO40 high time 10 12.5 15 ns

TL_xo40 XO40 low time 10 12.5 15 ns

TR_xo40 XO40 rise time 5 Ns

TF_xo40 XO40 fall time 5 ns

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2-5. G-SPI Host Interface Protocol Timing Referred from Marvell hardware specifications

Symbol Parameter Condition Min Typ Max UnitsT1 Clock Period 20

T2 Clock high 5

T3 Clock Low 9

T4 Clock Rise Time 1

T5 Clock Fall Time 1

T6 SDI Hold Time 2.5

T7 SDI Setup Time 2.5

T8 SDO Hold Time 5

T9 SDO Setup Time 1

T10 SCSn Fall to Clock 5

T11 Clock to SCSn Rise

0

T12 SCSn Rise to SCSn Fall 400

ns

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2-6. SDIO Host Interface Protocol Timing Referred from Marvell hardware specifications

Over full range of values specified in the recommended operating conditions unless otherwise specified.

Symbol Parameter Condition Min Typ Max Unitsfpp CLK Frequency 0 45 MHz

TWH CLK High Time 11.1

TWL CLK Low Time 11.1

TISU Input Setup Time 5

TIH Input Hold Time 5

TODLY Output Delay Time

0 15

ns

2-7. Pin Out Power Supply Use VIO_X1 Supply 3V_IO VDD18_X3

PDn/RESTn ANT_SEL_N BT_STATE EX_OSC_C ANT_SEL_P WLAN_ACTIVE

WLAN MAC_WAKE BT_PRIORITY LED out

SD_DAT[1]/SPI_SDOn SD_DAT[3]

SD_DAT[2]/SPI_SINTn SD_DAT[0]/SPI_SCSn

SD_CMD/SPI_SDI SD_CLK/SPI_CLK

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3. Module Current Consumption AW-GH320 provides customers different good power control to save the power of mobile devices.

Power Down mode :PDn is asserted. Only I/O ring is powered. CPU, Memory, MAC/BB,RF are off.

Not associated

Deep Sleep mode CPU and memory run on slow clock. MAC/BB/RF are turned off. Associated

AW-GH320 power configurations:

(3.3V I/O),TX b mode power=15dBm, g mode power 10dBm,External Oscillator(26MHz),1.2V internal

voltage regulator.

If the mobile devices supply VIO_X1 only when using power down mode, the current consumption will be

the lowest.

Current consumption table as below

Deep Sleep Mode

TX 54Mb/s(CW Mode)

TX11Mb/s (CW Mode)

Rx G mode

RX B mode

Total current(mA)

0.42 197.39 220.39 170.12 148.78

Configuration Total

poer(mW) 0.97 463.67 539.54 325.64 288.46

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4. Pin Definition 4-1. Pin Assignment

Pin No Definition Basic Description Type 1 GND

2 RF IN/OUT RF port for antenna or RF connector 50Ohm @2.4GHz

3 GND

4 GND

5 TRSTn JTEG pin (internal use) No connection

6 GPIO2 JTAG mode enabled pin (internal use) No connection

7 EX_OSC_C External oscillator control I/O

8 TMS_ARM JTEG pin (internal use) No connection

9 3V_PA 3V PA power supply P

10 WLAN MAC_Wake WLAN MAC wake-up in /Interrupt in Software uses this pin or though SDIO as a method of getting the device out of deep sleep.

I/O

11 LED out Transmit power or receive ready LED.

12 GND

13 SD_DAT[1]/ SPI_SDOn

SDIO 4-bit Mode: Data line bit[1] SDIO 1-bit Mode: Interrupt SDIO SPI Mode: Reserved G-SPI Mode: G-SPI Data Output(active low)

I/O Note2

14 SD_DAT[3] SDIO 4-bit Mode: Data line bit[3] SDIO 1-bit Mode: Reserved SDIO SPI Mode: Card Select(active low)

I/O Note2

15 OSC select(1) OSC Frequency Select: Note1

16 BT_STATE

Bluetooth State 0= normal priority, RX 1=high priority, Tx Priority is signaled after BT_PRIORITY has been asserted. After priority signaling, BT_STATE indicates the Tx/Rx mode of BT radio.

I

17 WLAN_ACTIVE

WLAN Active(active low) 2-Wire BCA Mode: When high,WLAN is transmitting or receiving packets. 3-Wire BCA Mode: 0=Bluetooth(BT) device allowed to transmit 1=Bluetooth device not allowed to transmit Internal pull-down. In WLAN Sleep mode ,all I/O PADs are powered down.This Pad must stay at a low state even in power down mode.

O

18 NC

19 3V_IO 3V digital I/O power supply P

20 EXT_REF_CLK External clock source 19.2, 20, 26, 38.4, 40 MHz I/O

21 BT_PRIORITY

Bluetooth Priority 2-Wire BCA Mode: When high,BT is transmitting or receiving high priority packets. 3-Wire BCA Mode: When high,BT is transmitting or receiving packets.

I

22 SLEEP_CLK

Clock input for external sleep clock Note: SLEEP_CLK is used by the WLAN MAC. The input clock frequency is typically 32kHz/32.768kHz/3.2kHz.The Bluetooth radio chip supply is 3.2kH.The WLAN requires 32kHz.

I

23 OSC select(2) OSC Frequency Select Note1

24 GND

25 SD_DAT[2]/ SPI_SINTn

SDIO4-bit Mode: Data line bit[2]or Read Wait(optional) SDIO 1-bit Mode: Read Wait(optional) SDIO SPI Mode: Reserved G-SPI Mode: Active G-SPI Interrupt Output(active low)

I/O Note2

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Pin No Definition Basic Description Type

26 SD_DAT[0]/ SPI_SCSn

SDIO 4-bit Mode: Data line bit[0] SDIO 1-bit Mode:Data line SDIO SPI Mode: Data output G-SPI Mode: G-SPI Chip Select Input(active low)

I Note2

27 SD_CLK/ SPI_CLK

SDIO 4-bit Mode: Clock Input SDIO 1-bit Mode: Clock Input SDIO SPI Mode: Clock Input G-SPI Mode:G-SPI Clock Input

I/O Note2

28 TDI JTEG pin (internal use) No connection

29 SD_CMD/ SPI_SDI

SDIO 4-bit Mode: Command/Response SDIO 1-bit Mode: Command Line SDIO SPI Mode: Data Input G-SPI Mode: G-SPI Data Input

I/O Note2

30 TCK JTEG pin (internal use) No connection

31 ANT_SEL_P

Different Antenna Select Negative out Provides the antenna select negative control signal Default value is 1 ANT_SEL_N ANT_SEL_P Antenna 0 1 Antenna 1 1 0 Antenna 0 Note: Also used as RF switch control for single Bluetooth/WLAN antenna configurations.

O

32 OSC select(0) OSC Frequency Select Note1

33 ECSn SDIO: Series 100Kohm to ground G-SPI: Keep float *

34 SCLK internal use No connection

35 VIO_X2 1.8V/3.3V Digital Power Supply (Some system VIO_X2 use 3.3V stable than 1.8V) P

36 GND

37 VDD18_X3 1.8V digital I/O and internal voltage regulator power supply P

38 VIO_X1 1.8V/3.3V Host Supply P

39 PDn/RESETn

PDn: Internal pull-up Full Power Down(active low as long as system need) 0=full power down mode 1=normal mode Connect to power down pin of host

RESETn: Internal pull-up Reset(active low at least 10ns)

(1)When the customer uses the PDn/RESETn mode, the SDIO/SPI interface must reboot.

(2)When the customer uses SDIO interface, the pin 33 must series 100K ohm to ground.

I

40 1.2_EXT 1.2V digital power supply(could use internal 1.2V LDO) Note: Please parallel 10uF capacitor if use internal LDO. P

41 VDD18A 1.8V analog I/O power supply P

42 1.2V Reg_SEL Ground: Use module internal LDO supply V1.2V Float : PM Chip supply 1.2 V (default in pad)

43 Host Interface Select(1)

44 Host Interface Select(0)

Host Interface Select: Generic SPI: Each pin series 100K ohm to ground SDIO :Each pin float(default in pad)

45 ANT_SEL_N

Different Antenna Select Negative out Provides the antenna select negative control signal Default value is 0 ANT_SEL_N ANT_SEL_P Antenna 0 1 Antenna 1 1 0 Antenna 0 Note: Also used as RF switch control for single Bluetooth/WLAN antenna configurations.

O

46 GND

47 GND

48 GND

49 GND PA Ground

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Note1: Oscillator frequency select define table, 38.4 MHz default in pad Pin No Definition Basic Description Type

23 OSC select(2)

15 OSC select(1)

32 OSC select(0)

OSC Frequency Select: 2 10(OSC select) RRN 26 MHz RNR 19.2MHz NRR 20 MHz NNN 38.4 MHz (default in pad) NNR 40 MHz Note: R mean this pin series 100K ohm to ground. N mean this pin float

Note2:SDIO/G-SPI interface Pin

13 SD_DAT[1]/ SPI_SDOn

SDIO 4-bit Mode: Data line bit[1] SDIO 1-bit Mode: Interrupt SDIO SPI Mode: Reserved G-SPI Mode: G-SPI Data Output(active low)

I/O

14 SD_DAT[3] SDIO 4-bit Mode: Data line bit[3] SDIO 1-bit Mode: Reserved SDIO SPI Mode: Card Select(active low)

I/O

25 SD_DAT[2]/ SPI_SINTn

SDIO4-bit Mode: Data line bit[2]or Read Wait(optional) SDIO 1-bit Mode: Read Wait(optional) SDIO SPI Mode: Reserved G-SPI Mode: Active G-SPI Interrupt Output(active low)

I/O

26 SD_DAT[0]/ SPI_SCSn

SDIO 4-bit Mode: Data line bit[0] SDIO 1-bit Mode:Data line SDIO SPI Mode: Data output G-SPI Mode: G-SPI Chip Select Input(active low)

I

27 SD_CLK/ SPI_CLK

SDIO 4-bit Mode: Clock Input SDIO 1-bit Mode: Clock Input SDIO SPI Mode: Clock Input G-SPI Mode:G-SPI Clock Input

I/O

29 SD_CMD/ SPI_SDI

SDIO 4-bit Mode: Command/Response SDIO 1-bit Mode: Command Line SDIO SPI Mode: Data Input G-SPI Mode: G-SPI Data Input

I/O

Note3:Bluetooth coexistence

16 BT_STATE

Bluetooth State 0= normal priority, RX 1=high priority, Tx Priority is signaled after BT_PRIORITY has been asserted. After priority signaling, BT_STATE indicates the Tx/Rx mode of BT radio.

I

17 WLAN_ACTIVE

WLAN Active(active low) 2-Wire BCA Mode: When high,WLAN is transmitting or receiving packets. 3-Wire BCA Mode: 0=Bluetooth(BT) device allowed to transmit 1=Bluetooth device not allowed to transmit Internal pull-down. In WLAN Sleep mode ,all I/O PADs are powered down.This Pad must stay at a low state even in power down mode.

O

21 BT_PRIORITY

Bluetooth Priority 2-Wire BCA Mode: When high,BT is transmitting or receiving high priority packets. 3-Wire BCA Mode: When high,BT is transmitting or receiving packets.

I

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5. Bluetooth Interface 5-1. Bluetooth Coexistence The AW-GH320 supports coexistence capability with co-located Bluetooth (BT) devices.

There are two Bluetooth Coexistence Arbitration (BCA) units in the AW-GH320:

Marvell 2-Wire Bluetooth Coexistence Arbitration (2WBCA) scheme

Marvell 3-Wire Bluetooth Coexistence Arbitration (3WBCA) scheme

Only one of the Bluetooth coexistence arbitration units can be used at a time. In addition, the AW-GH320

contains a Switch Module (SM) that controls antenna switching for both single antenna and dual antenna

applications.

Bluetooth Top Block Diagram

5-1-1. System Level Configuration Hardware configurability enables the following system-level configuration options:

BT1.1 or BT1.2 AFH

Marvell QoS-aware 2-wire coexistence signaling interface or 3-wire coexistence signaling interface

Single shared antenna or dual antenna

- For single antenna system, single 3-port or dual 2-port T/R switching configuration

- For single antenna system with 3-port T/R switch, 2-bit encoded or 3-bit once-hot switch control

Configurable timing on coexistence signaling interface and switch control interface

Future-proofed firmware programmable and system-configurable QoS classification and

prioritization

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5-1-2. WLAN / Bluetooth Channel Information Exchange Since BT and 802.11g/b WLAN use the same 2.4GHz frequency band, each can cause interference with

the other. The level of interference depends on the respective frequency channel used by BT and WLAN

(other factors can impact interference, like Tx power and Rx sensitivity of the device).

In a system with both BT and WLAN, the common host receivers information about WLAN channel

usage and passes this information to the BT device. For 1.2 BT devices with Adaptive Frequency

Hopping (AFH) enabled, the BT device can block channel usage that overlaps the WLAN channel in use.

When the BT device avoids all channels used by the WLAN, the impact of interference is greatly reduced,

but not completely eliminated. For 1.1 BT devices, the BT device cannot block WLAN channel usage and

an active BCA scheme at the MAC level is required. The BCA scheme can also be used with 1.2 BT

devices to further reduce the impact of interference to a minimum.

5-1-2-1. Dual /Single Antenna Support Both arbitration units support dual and single antenna configuration.

5-1-2-1-1. Dual Antenna Configuration In dual antenna configurations, both WLAN and BT have their own dedicated antennas. In this case, the

BCA allows simultaneous WLAN and BT transactions, resulting in higher WLAN/BT network

performance.

Dual Antenna Configuration

5-1-2-1-2 Single Antenna Configuration In single antenna configurations, both WLAN and BT share one antenna. In this case, the BCA must

ensure that only one device is allowed to use the antenna. A single antenna configuration has an

advantage of lower cost and board space saving, compared to the dual antenna configuration.

The external RF switch (es) for the single antenna need additional control signals for switch control. This

is accomplished by Switch Module (SM) logic in the AW-GH320. Two possible external RF switch

configurations are supported:

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Single Antenna with two 2-way switches.

Single Antenna with one 3-way switch (some 3-way switches which have internal decoders need

only 2-bit control (use only TR_P/N pins); others need 3-bit one-hot control).

Single Antenna with Two, 2-Way Switches

Single Antenna with One, 3-Way Switch

5-1-3. 2-Wire BCA The 2WBCA interface decides which device has primary access to the shared wireless medium

according to the 2WBCA coexistence scheme. The 2WBCA interface makes its decision based on input

signals from the bluetooth device, input signals from the 802.11 MAC device, and MAC register settings.

The inputs signals from the 802.11 and bluetooth device report activity or priority for their respective

devices. The 2WBCA interface module compares any conflicting traffic based on a programmable table

in the MAC registers.

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2WBAC Block Diagram

5-1-3-1. 2-Wire BCA Arbitration Tables The arbitration scheme is as follows:

WLAN high-priority packets have priority over all BT packets. BT high-priority packets have priority

over WLAN low-priority packets.

When the BT priority signal is asserted, the arbiter checks if the WLAN has a Tx or Rx request. If

the WLAN requests during this time, the arbiter makes an arbitration decision based on the arbiter

decision table. Typically, for the BT device, once the arbiter allows it to transmit, the BT does not

stop transmitting until the transmitting packet completes. For this reason, if a higher priority WLAN

request enters while the BT is transmitting, the arbiter allows the BT to complete transmission

before granting access to the WLAN.

For WLAN requests, the arbiter has no WLAN arbitration window, but the arbiter may stop the

WLAN while the WLAN is in the middle of packet transmission. Since there is no WLAN arbitration

window, the WLAN is granted access immediately if there is no BT request at that time. Except for

WLAN high-priority packets, there is no guarantee that WLAN can transmit or receive (for signal

antenna case) the entire packet. The arbiter can stop the WLAN from transmitting or receiving (for

signal antenna case) in the middle of the packet if there is a new BT request, and the new arbiter

decision is in favor of the BT packet. This approach optimizes the performance of BT voice

applications, at the expense of WLAN performance.

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Single Antenna Default Arbitration Table WLAN Tx Request

WLAN Tx Priority

WLAN Rx Request

WLAN Rx Priority

BT Priority Result

0 0 1 0 1 Stop Low Priority WL Rx

High Priority BT OK

0 0 1 1 1 High Priority WL Rx OK Stop High Priority BT

1 0 0 0 1 Stop Low Priority WL Tx

High Priority BT OK

1 1 0 0 1 High Priority WL Tx OK Stop High Priority BT

Two Antenna Default Arbitration Table

WLAN Tx Request

WLAN Tx Priority

WLAN Rx Request

WLAN Rx Priority

BT Priority Result

0 0 1 0 1 Low Priority WL Rx OK

High Priority BT OK

0 0 1 1 1 High Priority WL Rx OK

High Priority BT OK

1 0 0 0 1 Stop Low Priority WL Tx

High Priority BT OK

1 1 0 0 1 High Priority WL Tx OK Stop High Priority BT

5-1-4. 3-Wire BCA The 3WBCA coexistence framework is based on the IEEE 802.15.2 recommended practice Packet

Traffic Arbitration (PTA) and AFH scheme. This section focuses on the detailed implementation of the

BCA logic that resides in the Marvell WLAN MAC block.

3WBCA High-Level Block Diagram

8/9/2007 - 21 -

5-1-4-1. Packet Classification WLAN packet information includes the 6-bit Pkt_Type (apply to either WLAN Tx or Rx packets). The

arbitration unit has two 64-bit programmable masks (WL_Tx_Pri_Mask and WL_Rx_Pri_Mask) to mask

off all the low-priority packet types. The remaining unmasked packet types are considered high-priority

packet types (firmware puts 0 on the WL_Pri_Mask corresponding to the packet type that has low-

priority). By default, only WLAN ACK packet types have a 1 in the mask.

{WL_Tx_Pkt_Type, WL_Tx_Pri_Mask} -> WL_Tx_Pri

{WL_Rx_Pkt_Type, WL_Rx_Pri_Mask} -> WL_Rx_Pri

5-1-4-2. Arbitration The WLAN MAC includes a flexible packet level arbitration scheme between the WLAN and BT. An

arbiter inside the arbitration block decides whether WLAN or BT can transmit.

{WL_Pri, WL_Tx_Rx, BT_Pri, BT_Tx_Rx} -> Arb_Decision

The default Arb_Decision which is geared towards performance optimization for both WLAN an BT,

based on coexistence test result. Arb_Decision is controlled by two sets of 32-bit firmware-

programmable register for flexibility during performance tuning.

Decision made by the arbitration scheme use the following inputs and register controls:

Classification of each type of WLAN packet as high priority or low priority

Recognition of each BT request as a request to transmit or receive high or low priority

Selection of which traffic type has higher priority: high priority WLAN or high priority BT

Selection of which traffic type has low priority: low priority WLAN or low priority BT

5-1-4-2-1. Arbitration Scheme The arbitration scheme is as follows (default behavior shown):

WLAN high-priority packets have priority over all BT packets. BT high-priority packets have priority

over WLAN low-priority packets.

If AFH is enabled in the BT device and sufficient guard-band outside the WLAN operating frequency

is preserved, the BT device uses the OutOfBand (OOB) channel with respect to the WLAN device.

Otherwise, the BT device uses the InBand (IB)and OOB channels with respect to the WLAN device.

Firmware controls the arbiter for BT IB versus OOB by programming the arbitration mode

configuration register.

For the co-located devices running in dual antenna configuration:

- WLAN Tx and BT Tx in OOB situation have little interference impact on each other.

- WLAN Tx and BT Tx in IB situation have a sizable interference impact on each other. Therefore,

the arbiter decision table allows either WLAN or BT Tx, based on their relative packet priorities.

- WLAN Tx and BT Rx (both OOB and IB) have sizable interference impacts on BT Rx. Therefore,

the decision table stops WLAN Tx when BT Rx is prioritized over WLAN Tx.

8/9/2007 - 22 -

- WLAN Rx and BT Tx (both OOB and IB) have sizable interference impacts on WLAN Rx.

Therefore, the decision table stops BT Tx when WLAN Rx is prioritized over BT Tx.

For BT requests, the arbiter has a BT arbitration window of approximately 75μs after assertion of

the signal indicating the start of BT Tx/Rx high-priority packets. During the BT arbitration window,

the arbiter checks if the WLAN has a Tx or Rx request. If the WLAN requests during the arbitration

window, the arbiter makes an arbitration decision based on the arbiter decision table. Typically, for

the BT device, once the arbiter allows it to transmit, the BT does not stop transmitting until the

transmitting packet completes. For signal antenna mode, if a high priority WLAN request enters

while the BT transaction is on going, the arbiter requests the SM to stop BT immediately and allow

the WLAN to use the antenna.

For WLAN requests, the arbiter has no WLAN arbitration window, but the arbiter may stop the

WLAN while the WLAN is in the middle of packet transmission. Since there is no WLAN arbitration

window, the WLAN is granted access immediately if there is no BT request at that time. Except for

WLAN high-priority packets, there is no guarantee that WLAN can transmit or receive the entire

packet (for single antenna case). The arbiter can stop the WLAN from transmitting or receiving (for

single antenna case) in the middle of the packet if there is a new BT request, and the new arbiter

decision is in favor of the BT packet. This approach optimizes the performance of BT voice

application, but at the expense of WLAN performance.

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6. Cell Phone Co-Existence TX Noise Floor AW-GH320 module support good cell phone co-existence characteristically. The cell phone co-existence

can fit in GSM/DCS/WCDMA/UMTS/3G system. Let’s the handset system users can easy to build-up the

WLAN sub-system in handset system. In the module, we reduce the interference between cell phone

and WLAN by reduce the module maximum TX noise floor. We list the module maximum noise flow at

antenna terminal in the follow table.

Standard Down-Link Band Target Tx Noise Floor at WLAN Ant.

GSM850 869-894 -155dBm/Hz GSM900 925-960 -155dBm/Hz DCS1800 1805-1880 -155dBm/Hz PCS1900 1930-1990 -155dBm/Hz W-CDMA 2110-2170 -155dBm/Hz

Note: Assume over the air is 15dB between Cell phone antenna to WLAN antenna.

7. Mechanical Characteristics

The size and thickness of the AW-GH320 LGA package module is listed below:

1.3+/-0.1mm

AzureWave AW-GH320

YYWW@Taiwan XXXXXXXXXX

Molding

8/9/2007 - 24 -

AW-GH320 Top View PCB Layout FootPrint

Unit: mm

Note: AzurWave will provide AW-GH320 Top View FootPrint DXF file and for customer reference.

8/9/2007 - 25 -

8. Reflow Soldering Profile

No Item Temperature(℃) Time(sec) 1 Pre-heat 120℃ ~ 160℃ 90sec~120sec 2 Soldering Time of above 220℃ 40~60sec 3 Peak-Temp 245℃ max

Note:1. N2 atmosphere during reflow (O2<300ppm) 2. Some component can not reflow over 250℃, please be careful for the reflow

temperature. 9. Module IC SMT Preparation 1. Shelf life in sealed bag: 12 months

At<30℃ and <90% relative humidity (RH)

2. Peak package body temperature: 250℃

3. After bag is opened, devices that will be subjected to reflow solder or other high temperature

process must

(A) Mounted within: 24 hours of factory conditions ≦30℃/60% RH.

(B) Stored at ≦10% RH

4. Devices require baking, before mounting, if:

(A) Humidity indicator card is >10%

When read at 23＋－5℃

(B) 3A or 3B not met.

5. If baking is required, devices must be baked for 24 hours at 125+-5℃

PS: Due to possible contamination from the environment, please bake the device immediately after opening the package.