bit scope

Circuit Cellar INK® Issue 97 August 1998 1www.circuitcellar.com

BitScope

FEATUREARTICLE

Norman Jackson

sHas your officebecome so clutteredthat you can’t findyour oscilloscope orlogic analyzer? Noproblem, Norman willhelp you build a low-cost, mixed-signalcapture engine thatconnects to yourcomputer via theserial port.

ome time ago, Ihad a bad experi-

ence with a bus—alogic bus. It had six ram-

paging DSP cards and a SCSI control-ler all trying to ride at the same time.

About once an hour, there was asickening crash. After going throughthe usual stages of blaming the soft-ware, I relented, admitted possibleculpability, and borrowed a mixed-mode DSO.

This machine has a digital samplingoscilloscope and a logic analyzer effec-tively joined at the hip. They share acommon trigger module that enablesthe user to identify a complex eventand record the state of the target hard-ware before and after the trigger—inboth the analog and digital domains.

In the case of my erratic bus logic,the culprit turned out to be a delin-quent GAL with a ground bounceproblem. The offending chip had itsduties reassigned and the documenta-tion police were alerted. Engineer

A Mixed-Signal Capture Engine

T H E C O M P U T E R A P P L I C A T I O N S J O U R N A L

®INK

triumphs over bug.By employing a high-tech piece of

test equipment, I could trigger on acomplex digital event and correlate thisevent to an oscilloscope trace thatshowed what was really happening inthe analog domain. I was saved in thenick of time, but despite having formeda deep attachment to the trusty ’scope,I had to give it back.

Following this adventure, I startedmusing about how to roll my ownversion of that useful electronic gadget.After some mental tinkering and withthe added incentive of Design98, I wassoon sketching electronic stuff on thegrid pad. BitScope began to emerge(see Photo 1).

THE BIG PICTUREThe basic idea behind BitScope is

that of a specialized piece of data-capture hardware that doesn’t includeany user interface other than an RS-232plug. Most engineers have more com-puters, mice, and keyboards than they

2 Issue 97 August 1998 Circuit Cellar INK®

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SERIAL CONNECTIONWhile a serial interface may seem a

bottleneck for a capture engine that canpotentially store 64 KB of data, this isnot a problem. Thanks to the Internetand 56k modems, most PCs now havefast, buffered UARTs.

The transmission speed of the Bit-Scope serial link can be scaled to115 kbps using a fast microcontroller.At this rate, you can transfer enough

troller firmware is designed as avirtual machine (VM). TheBitScope design is novel becauseit has an unusual arrangement ofthe VM program code. The in-structions are not located inmemory on the microcontrollerbut reside in the user interfaceand are executed atomicallydirect from the serial port.

If you study BitScope’s vir-tual instruction set, you see thatarranging things in this crazyway has its advantages. All instruc-tions are atomic. In other words, thereis no inherent syntax associated withany command byte.

All instruction bytes are echoed toprovide a simple handshake mechanism.And, all instructions are preemptive,so you can always abort the previouscommand and regain control simplyby sending a new command.

know what to do with. If I was goingto build a cheap ’scope, I certainlydidn’t want any more of that stuff.

What I needed was an electronicdrone that could capture and disgorgedata on command. No more, no less.

The commands had to be simpleASCII characters that are intuitiveand easy to learn. The PC-based userinterface can then synthesize func-tionality of arbitrary complexity bysending scripts of command charac-ters and receiving the replies.

The answer: a virtual instrumentwhere specialized hardware does theelectronic test job and a PC lets theengineer drive it. One big advantage ofthis setup is that changing the waythe virtual instrument works doesn’tusually involve reprogramming chips(hard) but may be done by download-ing a new program from the ’Net (easy).

As described in the sidebar “VirtualMachine Architecture,” the microcon-

Figure 1 —This block diagram of the mixed-signal capture engineshows basic design architecture.

A B divn

AnalogSupply

PowerSupply

MuxRange

FlashADC

DigitalPod

DataMux

32K × 8SRAM

32K × 8SRAM

Clock

PLDLogic

Control

PICCPU

Serial

Figure 2a —The BitScope CPU and storageengine includes the PIC, PLD logic, clock, datamuxes, and sample RAM.


Virtual-Machine ArchitectureA virtual machine (VM) consists of a fully functional

processor hosted on an unrelated substrate machine.VM design has advantages over conventional coding.Each instruction may be highly optimized for perfor-mance—unlike a general-purpose interpreter like BASIC,which can do anything but inefficiently. VM instructionsare compact like assembly but perform extremelycomplex tasks. Once a register and command set aredevised, you can add new instructions to enhance themachine. The original instructions remain the same,which promotes modularity. Since the operationaldefinition of the VM is rigid, firmware changes tend tobe straightforward, even to the point of hosting thetarget architecture on a completely new substrate.

In this design, the PIC16F84 is a substrate to imple-ment a custom BitScope machine with its instruction setbecoming microcode to implement the VM. So, theBitScope VM has instructions and registers but they’reunrelated to the PIC native instruction set. The virtualregisters are hosted by PIC memory registers but havemeaning only to the BitScope. Similarly, BitScope has nouse for XOR- or DECFSZ-type instructions. Instead, it hasinstructions for manipulating registers, starting sampleRAM, and dumping captured data. BitScope registers maybe option bits, timer constants, sample address, and soon. The exact function of the register set is detailed inTable i. Table ii shows the current command set.

Most interpreters run from a program stored in memory.BitScope is different because it executes directly from

the serial port. BitScope’s instruction set is designed tohave no syntax, so there can be a maximum of 256 in-structions and each is stand alone—just like a RISC in-struction set. An atomic protocol means the software atboth ends of the serial line is simple and does not have topreserve state information. In a PIC with 1024 words ofprogram, it’s advisable to be economical with code, espe-

Table i —The BitScope virtual machine has a set of 20 registers. The operation of themachine and all its instructions refer to these registers.

R0 Byte Input Reg Assemble input data hereR1 Register Pointer Pointer to R(0–ff)R2 Register Source Pointer to R(0–ff)R3 Sample Preload L Low byte of RAM addr to load to SpockR4 Sample Preload H High byte of RAM addr to load to SpockR5 TRIG Logic Byte Logic levels for Spock to match, loaded

during Spock InitR6 TRIG Mask Byte Don’t Care bits in trigger match, loaded

during Spock InitR7 Spock OPTION byte TRIG and PG1 setup in SpockR8 Trace Register Trace Option controls Sample operation

of BitScopeR9 Counter capture Lo Counter low byte shifted out of SpockR10 Counter capture Hi Counter high byte shifted out of SpockR11 DELAY-L Post TRIG delay before haltingR12 DELAY-H Post TRIG delay before haltingR13 TimeBase TimeBase expander countR14 Channel-A/B Channel Range settings for ChopR15 Dump Length Counter for number of samples trans-

mitted per requestR16 EEPROM Data Data register for EEPROMR17 EEPROM Address Address register for EEPROMR18 POD Transmit Register holds byte for PODR19 POD Receive Register gets byte from POD

54 T Trace with TRIG stop Begin sample with Opt mode, until Trigthen Delay, Halt Sample Clk, andprint sample add.

5b [ Clear R0 Reg R0 is cleared. This usuallyprecedes a nibble load

5d ] Nibble swap R0 R0:(0–3) is swapped with R0:(4–7).This command puts the enterednibbles in the correct order.

61 a Enter nibble 'a' hex Incr R0 by 10 and nibble swap R062 b Enter nibble 'b' hex Incr R0 by 11 and nibble swap R063 c Enter nibble 'c' hex Incr R0 by 12 and nibble swap R064 d Enter nibble 'd' hex Incr R0 by 13 and nibble swap R065 e Enter nibble 'e' hex Incr R0 by 14 and nibble swap R066 f Enter nibble 'f' hex Incr R0 by 15 and nibble swap R06c l Load R0 from @R2 Copy contents of reg pointed to by R2

toR06e n Next Address Incr addr reg R170 p Print REG value @R1 Print <CR>ASCII,ASCII<CR>73 s Store R0 to @R1 Copy contents of R0 to reg pointed to

by R175 u Update RAM pointers Copy contents of R3,4 to R9,10.

Updates sample addr value fromsample preload reg.

78 x Exchange byte with Transmit byte in POD_TX to PODPOD IO-0. Wait for reply byte on IO-1

and put it inPOD_RX then return it tohost.

7c | Pass Through byte Transmit byte in POD_TX to POD IO-0.to POD Connect IO-1 to Serial Out for host.

00 • Reset Reset the machine and print its IDstring

23 # Load Source Reg Store R0 into R2. Set up R2 which is asource reg. A reg-to-reg move may bedone by pointing to a source (R2) anddestination (R1).

2b + Inc REG Incr the reg pointed to by R12d – Dec REG Decr the reg pointed to by R130 0 Enter nibble 0 Incr R0 by 0 and nibble swap R031 1 Enter nibble 1 Incr R0 by 1 and nibble swap R032 2 Enter nibble 2 Incr R0 by 2 and nibble swap R033 3 Enter nibble 3 Incr R0 by 3 and nibble swap R034 4 Enter nibble 4 Incr R0 by 4 and nibble swap R035 5 Enter nibble 5 Incr R0 by 5 and nibble swap R036 6 Enter nibble 6 Incr R0 by 6 and nibble swap R037 7 Enter nibble 7 Incr R0 by 7 and nibble swap R038 8 Enter nibble 8 Incr R0 by 8 and nibble swap R039 9 Enter nibble 9 Incr R0 by 9 and nibble swap R03c < Get ctr value Shift the current 16 bit ctr value from

from Spock Spock into R9, R103e > Program Spock Load 5 bytes of data from R3–R7 into

from Registers Spock. Previous contents of ctr aredestroyed

3f ? Print Machine ID Print <CR>CHAR8–CHAR1<CR>where CHARn is part of a stringidentifying the type and revision of thisdevice.

40 @ Load Address Reg Store R0 into R1. Use to set up reg ptr.53 S Dump Sample Dump lines of 16 Sample RAM

RAM (CSV) values (digital and analog)

Table ii —The command set for the BitScope virtual machine is a subset of the byte values between 0 and 255. Active commands are confined to the ASCII range from 0 to 127.



cially given the importance ofreliably transmitting packets overa serial link.

I decided the BitScope commandset should use common printableASCII commands. Since the assign-ment of byte codes is arbitrary,any value could mean “enter hexnibble 3,” but obviously 3 is agood choice. The general schemefor allocating byte-code values andtheir ASCII symbol is:

• numerals—data entry• operators—manipulation of reg-

ister values• lower case—general machine

operation• upper case—major machine func-

tions• nonprintables—reserved for fu-

ture commands

An example script for loading R6with 0x5a is [6]@[5a]s. It mayseem obscure, but if you study it,it should make sense. Ultimately,a user interface will debug scriptsand writing scripts will only benecessary if a user develops a newmode of operation or drives itdirectly from a terminal.

All BitScope operations, includingwait on trigger, may be interruptedby any serial command. The firstpart of the software UART ensuresthat the sample clock is halted. Whena serial byte is assembled andechoed, the UART turns on and,once activated, aborts all previousoperation. In this sense, BitScope’scommand protocol is truly atomic.Each command ends in a halt, ifnot prematurely aborted. ASCII code00 is the reset vector, so it can getthe PIC’s attention with a <break>.

Inevitably, a VM like this willget enhanced firmware. Microchiphas devices that potentially doublethe number of byte codes imple-mented. To cope with the poten-tial of other feature sets, ? returnsa 32-bit ID code. User-interfacesoftware may keep a register offeature sets supported by eachbyte-code revision.

samples to draw a 640 × 480 screen—at most 640 bytes—in about 55 ms, or18 screens per second.

For lower frequency data or simplesine waves, it’s necessary to only send ahandful of samples to the host and havethe user interface do some curve fitting.Small bursts of contiguous sample datamay be used to enhance a waveformdisplay to show high-frequency noise.

Logic analyzers don’t need to rapidlyupdate their display at all. After a triggerevent, the data may stay in the sampleRAM and be downloaded only whenthe host needs it. At 115 kbps, thetotal contents of a 16-KB buffer candownload in less than 2 s. The userinterface may then draw logic state ortiming diagrams and manipulate themas necessary.

USER INTERFACEDon’t think shrink-wrapped mono-

lithic Windows software for this design.Think more about the Linux modelwhere the engineering communitybuilds its own tools and can custom-ize them as needs arise.

Because BitScope uses simple ASCIIcommands, in a pinch, you can use aterminal program and spreadsheet todisplay waveforms. For complex applica-tions, you need more advanced softwarebased on C, Delphi, or Visual Basic.

A BitScope user interface can rununder many possible environments,including Windows, MAC, Unix,WinCE, Palm Pilot, Psion, DOS, orAmiga. Basically, it can work on anymachine with a serial port.

No single person could write all thatsoftware. Instead, I made the BitScopedesign open and documented so youcould create what you need.

On INK’s Web site, you’ll find someuser-interface software with sourcelistings to start the ball rolling. Via theInternet, you can also find existingprograms that already simulate oscillo-scopes, logic circuits, and data displays.DESIGN PHILOSOPHY

A good place to start designing is witha functional specification. For BitScope,the main issue was sample rate. Whileit seemed clear that a 200-MHz samplerate was out of reach, I could easilyget to about 50 MS/s and still be aheadon the price/performance curve.

For the engineer dealing with micro-controller circuits, it’s unlikely thatfrequencies of interest will exceed20 MHz—at least for the time being.Later on, when 3-V logic becomesmore prevalent, that 50-MS/s rate canprobably stretch to 100 MS/s in anSMT version of the design.

To make BitScope as useful aspossible, I was determined that it shouldphysically stand alone. It needed to beunconstrained to a particular machineor bus standard, and I wanted it tocommunicate with any computerusing the ubiquitous RS-232 interface.

From my experience, the mostcommonly required features of thistype of test equipment are two analoginput channels and eight digital logicinputs. Combine those features with aflexible trigger capability, and you geta pretty useful instrument. I set adesign goal of about $100 for the costof required components, all of whichshould be readily available.

For the core of BitScope, I selecteda PIC16F84 micro tightly coupled witha Lattice 1016 PLD. The PIC controlsthe serial port and implements a VMarchitecture. The Lattice counts RAMaddresses and waits for a trigger.

These chips are cheap and solidperformers. Both are flash-memorybased for easy upgrades, and they haveexcellent entry-level developmentsoftware. Sample RAM is provided bytwo 32-KB 15-ns cache memories.

These devices will take the design to50 MS/s and have the great advantagethat about eight of them are perchedon every ’486 motherboard ever built.That should put their head count atabout one billion, so don’t tell me youcan’t find any!

Every DSO must be built around aflash ADC. These chips were exoticuntil a few years ago when digital ma-nipulation of video became popular.

Now, several companies have devicesthat can provide 40 MS/s or better forless than $10. Even an older device likeMotorola’s MC10319P can samplefrom DC to 25 MS/s and is availablein a DIP package.

In fact, I used this device for Bit-Scope. By selecting a 600-mil DIPpackage, I could accommodate any ofthe new SMD devices as a plug-in


Figure 2b— BitScope power supply and comms deal with filtering, rectification, andregulation as well as RS-232 level shifting and indicators.

module and avoid the needfor multiple PCB versions.

For vertical amplifiersthat process analog signalsto the ADC, the video in-dustry again provides asolution. Maxim and Ana-log Devices both havecheap, stable 300-MHz op-amps that make wide-bandamplifier design easy.

Using these devices letsthe vertical-amplifier band-width get close to 100 MHz,matching the input specs onthe new flash ADC chipsfrom Analog Devices andTI. For an insight into why we needsuch wide-bandwidth vertical amplifi-ers, see the sidebar “Subsampling—Bending Nyquist.”WALKING THRU SCHEMATICS

Before delving into the schematics,take a look at Figure 1, which overviewsthe functionality of the BitScope design.

The PIC, the Lattice PLD, and theSRAMs are shown in Figure 2a. Thesechips are closely coupled to form thesample capture functions at the coreof this design.

By using a synchronous tristateclocking circuit, the PIC is able to stop,start, and preload the Lattice PLDusing just a handful of signals. Notice

that it’s necessary to read in data fromthe RAM chips one bit at a time be-cause there are no spare eight-bitports available.

One fundamental rule in mixinganalog and digital circuits is to avoidcontamination of the analog grounds.Figure 2b shows that great care wastaken to isolate the analog and digitalsections of this circuit at high frequen-cies. Similarly with the RS-232 port,it’s best not to allow PC noise to haveany path to a test circuit.

Digital test signals and two spareanalog signals are shown on Figure 2cconnecting to the DB25M pod connec-tor. Logic levels are latched and condi-

tioned ready for storagein the digital sampleRAM.

You might guess fromthe extra signals on thepod that it’s not justeight logic levels in. Aswell as fused balancedpower supplies, there is adigital I/O communica-tion port. Everything youneed is there to connectan active, programmableextension module.

Most of the analogconditioning circuits andthe flash ADC are shown

in Figure 2d. The circuit consists of anamplifier chain driving through a pairof 4:1 analog mux devices.

Modern video op-amps help here.They give you high input impedance,low output impedance, and unity gainstability.

The PIC controls the mux sourcesthat allow implementation of rangeswitching and channel chop functions.To accommodate different ADCchips, there are adjustment pots forboth the range and offset voltages asrequired by the manufacturers.

Figure 2e shows the final part of theanalog conditioning circuit. ChannelsA and B are standard 1-MB input im-pedance AC/DC BNC connectors. Aclassic source follower tree driving aunity gain buffer for each channelcompletes the vertical-amplifier sec-tion.

For engineers who like to measurehigh frequencies, I added a small 1-GHzprescaler circuit, which includes a swit-chable 50-Ω terminator hanging off theChannel B input circuit. Note thatBitScope has a couple of ways to mea-sure the frequencies of applied signals.I explain the motivation behind thisin the sidebar “Subsampling—BendingNyquist.”

THAT IS LOGICAL, CAPTAINPLDs such as the Lattice 1016 can

swallow a whole swag of logic func-tions. In this case, about 18 mediumTTL devices with all their wiringdisappear into a 44-pin PLCC device.

Radial PLDs like the Lattice arelike eight PALs in a circle surround-

Photo 1 —BitScope was prototyped on a two-layer PCB. Notice that the components arearranged to separate analog and digital sections of the circuit.



Subsampling—Bending NyquistIn data-acquisition applications, there is often some

confusion about the relationship between bandwidth andsample rate. The Nyquist rate of half of the samplingfrequency (Fs) is well known to be the maximum fre-quency that can be captured by periodic sampling at Fs.Given that mathematical constraint, why would wewant an instrument that has a bandwidth of 100 MHzand yet samples at a maximum rate of only 50 MS/s?The answer lies with subsampling.

The Nyquist rate applies to continuous time varyingsignals. In that general case, the highest-frequency com-ponent should be less than half of Fs (25 MHz at 50 MS/s)to avoid aliasing. Repetitive waveforms are a differentmatter. They’re the only high-frequency waveforms youever see on an analog CRO. The same waveform is redrawneach sweep, and the eye sees a solid trace. Subsamplingis similar. You use multiple samples and overlay themto build an image. Providing that your ADC has a widebandwidth and a small aperture, it is possible to samplea repetitive waveform over many cycles and build up asnapshot of the exact waveform, limited only by thebandwidth of the signal path. This technique, known assubsampling, is just an example of the RF mixer in thedigital world.

Subsampling has a few constraints. It isn’t possible tosubsample a waveform that’s harmonically related to thesampling frequency. Practically, this means that if thewaveform of interest is related to the sample frequency,the sample points always fall at the same relative position

on the waveform and the regions between will foreverremain a mystery.

Another concern has to do with resolving the am-biguous period of the subsampled waveform. Let’s sayyou have a signal of 28 MHz and are sampling at 40 MS/s.In the sample buffer, you’ll see a sequence of valueswith components at 12 and 68 MHz. How can these beplotted to build up a profile of the original 28-MHzsignal? Well, if you can measure the fundamental fre-quency of the sampled wave, that will imply period.Since you know the sample rate accurately, you canfractionally chop the sample buffer up into segments ofn wave periods and then plot them overlaid. You willhave traded the freedom for those n waveforms to varyin exchange for n different points on the waveform. Itmay now be apparent why the BitScope design has pro-vision to measure the frequency of any signal presentedto the ADC.

Even if you can’t measure the frequency of a subsampledwaveform directly, all is not lost. DSP engineers havesome fancy autocorrelation algorithms that can be letloose on a chunk of acquired data to pull a waveform out ofmeaningless numbers. It is important to note, however,that for resolving single event (such as high-frequencypulses like logic glitches), there is only one solution:oversample by at least a factor of 10. This performanceis exclusively in the domain of specialized test equip-ment using state-of-the-art circuit techniques to resolvesamples to 1 ns or better.

Figure 2c— The BitScope digital capture unit has a logic pod circuit with latching bufferand pod I/O switches.

ing a big breadboard. Thisarchitecture favors the tighttiming requirements ofcounters and glue logic.

Mostly, this PLD is a16-bit shift register andcounter with a configurablecomparator for triggering.The PIC can load a five-byteconfiguration word that setsthe operation of the chip,after which it may beclocked at full speed.

THRU THE LENSMEASURING

The SLR lens-mount sys-tem from the photographicworld is a great design thathas stood the test of time.You start with a camerabody with a general-purpose 50-mmlens, and for specialized work, youscrew in any of a hundred matchinglens types. From fisheye to telescopic,

as long as the mounts match, youhave a new camera.

I tried to use the same SLR prin-ciple in the BitScope design. The de-

vice on its own is an ex-tremely useful DSO andlogic analyzer, but it is noteverything.

The pod connector pro-vides an electronic lensmount for test equipment.Think of the sample RAMin BitScope as a roll of 35-mm film, and the data youstore there may come fromeither built-in connectorsor any weird and wonderful“data lens” you care toattach via the data pod.Because the pod architec-ture and protocol is openand documented, anyonemay design a specializeddata lens for BitScope.

VOLTAGE RANGESThe BitScope DSO includes four

internal attenuation ranges and fourchannel inputs. Channel A and B are


Figure 2e— The BitScope InputChannel Buffers are high-impedance voltage followersand op-amp buffers with a1-GHz prescaler circuit.

Figure 2d— The BitScope analogcapture features the vertical channelmuxes, attenuation switch, ADCbuffer, and ADC.



SOFTWARE

The Circuit Cellar Web site hasdownloadable software listings,technical documents, programmablebinaries, and PCB overlays. Informa-tion about BitScope is available atwww.discrete.net or via [email protected].

Norman Jackson is principal hardwaredesign engineer for Discrete TimeSystems P/L in Sydney, Australia. Hedesigns DSP-based digital audio systemsfor use in film and TV postproduction.You may reach Norman at [email protected].

SOURCESPIC16F84Microchip Technology, Inc.(602) 786-7200Fax: (602) 786-7277www.microchip.com

1016 PLDLattice Semiconductor Corp.(503) 681-0118Fax: (503) 681-3037www.latticesemi.com

MC10319P ADCMotorola SPS(800) 521-6274Fax: (602) 897-5725www.mot-sps.com

Preprogrammed PIC, 1016 PLD, MC10319P ADC, and PCBDiscrete Time Systems+612 9212 3469Fax: +612 9212 [email protected]

BNC connectors that may have ×1 or×10 probes connected. Channel C andD (pod inputs) have a fixed attenuator,and possibly, there’s some extra cir-cuitry in the pod.

Table 1 details the range sensitivities.The ranges aren’t nearly as compre-hensive as a bench CRO, but it coversthose most useful to digital and analogcircuits. As well, I intended for thepod connector to deal with unusual orhigh voltage signals by way of anactive pod adapter.

It’s also possible to alter the gain ofsome ranges. Since the ADC output isan eight-bit number that ranges from00 to FF, the final interface just needsto ratiometrically apply this hex valueto the voltage range of each stage.

A little thought reveals that for adigital oscilloscope, volts per divisionand microseconds per division are quitearbitrary notions. Provided that thesignal under consideration is within theADC range and the sample-buffer size, adisplay can be of any size and grid spac-ing. Similarly, the notion of y offsetbecomes a display function, which hasnothing to do with the sample engine.

IN YOUR HANDSWith this design, I hope to have

presented a low-cost solution to theengineer’s needs for sophisticated testequipment. I have heeded the call formore open designs and liberation fromthe single-platform juggernaut.

In the coming months, I look forwardto hearing from any of you who canthink of applications for this devicethat I haven’t even dreamed of. I

©Circuit Cellar INK, the Computer Applications Journal.Reprinted by permission. For subscription information,call (860) 875-2199 or subscribe ©circellar.com

Range BNCx1 BNCx10 POD

00 ±130 mV ±1.30 V ±632 mV01 ±600 mV ±6.00 V ±2.90 V10 ±1.20 V ±12.00 V ±5.80 V11 ±3.16 V ±31.60 V ±15.28 V

Table 1—Here are the BitScope input ranges for an ADCspan of 2 V. Resistor attenuators can be found in theschematic.

bit scope

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