borax tr-001 vivado serial i/o analyzer and ibert · 2014.4 serial i/o analyzer and ibert ip. these...

DAVE Embedded Systems www.dave.eu [email protected]

BORAX TR-001

Vivado Serial I/O Analyzer and IBERT

Table of Contents1 History.............................................................................................32 Introduction.....................................................................................43 Test bed..........................................................................................54 Results............................................................................................7

4.1 6.6 Gbps.............................................................................84.1.1 Ta=25°C, internal loop back....................................84.1.2 Ta=25°C, PCB loop back.........................................104.1.3 Ta=85°C, PCB loop back.........................................124.1.4 Ta=-40°C, PCB loop back.......................................13

4.2 2.5 Gbps.............................................................................144.2.1 Ta=25°C, PCB loop back.........................................14

4.3 5.0 Gbps.............................................................................154.3.1 Ta=25°C, PCB loop back.........................................15

4.4 8.0 Gbps.............................................................................164.4.1 Ta=-40°C, PCB loop back.......................................174.4.2 Ta=85°C, PCB loop back.........................................18

5 Bibliography....................................................................................19

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1 History

Version Date Notes

0.9.0 2015-09-15 Internal draft

1.0.0 2016-07-08 First public release

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2 IntroductionBORA Xpress supports two different Zynq part numbers: XC7Z015 and XC7Z030. XC7Z015 integrates GTP transceivers whose maximum data rate is 6.25 Gbps. XC7Z030 integrates GTX transceivers instead. In this case maximum data rate is 6.6Gbps.Actual maximum attainable data rate is determined by several factors, many of which are related to the carrier board design. One important factor that lies in the middle of the SoM/carrier stacking is the connectors mating1.This Technical Report describes the tests that have been performed on BORA Xpress's serial transceivers with the Vivado2014.4 Serial I/O Analyzer and IBERT IP. These are valuable tools are very useful to provide a first order approximation of thecharacterization of such a mating. For more details on these topics please refer to [UG936], [UG908] and [Using Vivado Serial IO Analyzer].

1 BORA Xpress's connectors are Hirose FX8C. Zynq serial transceivers' signals have been routed according to manufacturer recommendations in order to maximize attainable data rate. This configuration is called staggered skipped-one-pin, also known as GSSG (Ground-Signal-Signal-Ground).

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3 Test bed

A specific fixture has been designed and manufactured for this test. This is a printed circuit board that can be interposed between BORA Xpress SoM and BORA XpressEVB carrier board. The resulting system is shown in Figure 1.

BORA Xpress is equipped with Hirose FX8C-140S-SV receptacle. Fixture board is equipped with Hirose FX8C-140P-SV4 header, resulting in a 9mm overall stacking height2.

2 Depending on p/n selected for carrier board's header, stacking height varies in the range 5-11mm.

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Figure 1: BORA Xpress, fixture and BORA XpressEVB mated together.

Fixture board is also populated with a couple of oscillators required to provide reference clock signal for serial transceivers.

Figure 2 shows a simplified block diagram of the fixture board. Multi-gigabit transceivers are looped back as per IBERT test requirement.BORA Xpress SoM used for the test is equipped with Zynq XC7Z030 part.

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Figure 2: Fixture board simplified block diagram

4 ResultsDifferent data rates have been considered:

• 2.5 Gbps• 5.0 Gbps• 6.6 Gbps• 8.0 Gbps.

6.6 Gbps case – the corresponds with the maximum nominal rate of used Zynq part – has been investigated thoroughly. In particular it has been exercised at different ambient temperatures. Ambient temperature is also indicated as Ta in therest of the document.

Please note that 8.0 Gbps data rate is far beyond the maximum nominal bit rate allowed by the used Zynq part. However this test is useful to further verify if the implementation provides a good safe margin in the allowed range (<6.6 Gbps).

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4.1 6.6 Gbps

4.1.1 Ta=25°C, internal loop back

Figure 3 shows the 2-D statistical eye diagram at 6.6Gbps, Ta=25°C when internal loop back is enabled. This can be considered as a reference test to evaluate qualitatively how

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Figure 3: 2-D statistical eye diagrams (Ta=25°C, 6.6Gbps, internal loop back)

much the link is affected by the BORA Xpress/carrier board mating connectors3.

3 The poor quality of these images is due to a known issue related to Vivado Serial I/O Analyzer that has been fixed in newer versions of the tool.

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4.1.2 Ta=25°C, PCB loop back

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Figure 4: 2-D statistical eye diagrams (Ta=25°C, 6.6Gbps, PCB loop back)

No clear degradation is observed with respect to the diagrams shown in section 4.1.1 on page 8. This confirms the ability of thereceiver to compensate for the effects of the mating connectors.

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Figure 5: Serial I/O links test report (Ta=25°C, 6.6Gbps, PCB loop back)


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4.1.4 Ta=-40°C, PCB loop back

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4.2 2.5 Gbps


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4.3 5.0 Gbps


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4.4 8.0 GbpsOnce optimal parameter have been determined @ Ta=25°C, lower and upper end of temperature range have been considered.

The following sections show statistical eye diagrams captured at-40°C and 85°C. As expected, statistical eye diagrams are narrower however no dramatic shrinkage is observed. Thus a good safe margin is provided in the allowable data rate range (<6.6 Gbps).

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Figure 10: 2-D statistical eye diagram (Ta=25°C, 8.0Gbps, PCB loopback, lane #0 only)

4.4.1 Ta=-40°C, PCB loop back

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Figure 11: 2-D statistical eye diagrams (Ta=-40°C, 8.0Gbps, PCB loopback)


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Figure 12: 2-D statistical eye diagrams (Ta=85°C, 8.0Gbps, PCB loopback)

5 Bibliography

Bibliography

UG936: , UG936 Vivado Design Suite Tutorial: Programming and Debugging, UG908: , Vivado Design Suite User Guide: Programming and Debugging, Using Vivado Serial IO Analyzer: , Using Vivado Serial IO Analyzer, , https://www.youtube.com/watch?v=qrm7ZzmWqKs

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borax tr-001 vivado serial i/o analyzer and ibert · 2014.4 serial i/o analyzer and ibert ip. these...

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