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Bryan Chavez, Patrick Cleary, & Kevin Parker Duke University Pratt School of Engineering Department of Electrical Engineering Last Modified: April 25, 2005

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Page 1: Bryan Chavez, Patrick Cleary, & Kevin Parkerpeople.ee.duke.edu/~mbrooke/ECE135/2005_01_Spring/G3/...Bryan Chavez, Patrick Cleary, & Kevin Parker Duke University Pratt School of Engineering

Bryan Chavez, Patrick Cleary, & Kevin Parker

Duke University Pratt School of Engineering

Department of Electrical Engineering

Last Modified: April 25, 2005

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I. Abstract Gigabit Ethernet is a powerful and widely-used method for networking. It enables a large

number of users to interface at a high-speed on the network at the same time, all without

interfering with each other. This particular project focuses on the design and construction of an

“optical transceiver module,” which represents the Physical Media Dependent layer of a

Gigabit Ethernet. To complete this project, background research will be conducted to determine

the specifications needed to be compliant with official IEEE standards. Next, the different

optical and electrical components for the construction of the transceiver will be researched and

ordered based on performance and cost issues. At the same time, soldering and circuit design

skills will be practiced and honed to perfection. Finally, a board layout will be designed, and

after the fabrication of the board, the transceiver will be constructed and tested. After the

completion of a working transceiver, the results will be analyzed and compared to known

transceivers being sold by established companies.

II. Introduction a. Background Information

Ethernet is a local area network that allows for the transmittal of information over fiber

optic cables. Basically, Ethernet works because of a single cable that connects to each and every

machine that is part of the network. Each machine can therefore share information with any

other machine on the network and is not affected by the addition or subtraction of other machines

to or from the network. This ability makes large systems such as a university network possible,

because numerous computers from many different locations can all access the network without

interfering with each other [1].

The first Ethernet was created by Bob Metcalfe in 1973 at Xerox Corporation’s Palo Alto

Research Center. Metcalfe developed this invention while attempting to connect a computer to a

printer. This original Ethernet was constructed using a coaxial cable and could only transmit

information at a rate of 3 Mbps. In 1980, three companies—Xerox, Intel, and Digital Equipment

Corporation—all joined forces to create the 10-Mbps Ethernet Version 1.0 (also known as the

DIX standard), and the speed and importance of Ethernet began to increase exponentially. Soon

after, the IEEE stepped forward and developed an official standard for network technologies.

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Because it was commissioned in February of 1980, this standard is now called 802.3 standard

[1], with the 3 referring to the specific subcommittee of the 802 group that created the standard

for a network that was similar to the DIX Ethernet [2] [3].

Improvements continued to be made on the original implementation of Ethernet, and the

speed at which it could transmit data increased greatly. In 1998, IEEE developed the Gigabit

Ethernet, which could operate at 1 Gbps and is widely used today. In addition to the speed

improvements in modern Ethernet, the range over which networks can now extend is staggering.

In the early Ethernets developed in the 1970s, the entire network was usually limited to a single

building because of restraints in the length of the cables. In comparison, a modern Gigabit

Ethernet using multimode fiber has a range of 550 meters, while one using single-mode fiber has

a range of 5000 meters [4] [5].

The way in which Ethernet systems handle transmissions is also very interesting. This

process is referred to as CSMA/CD, an acronym which stands for carrier-sense multiple access

with collision detection. The phrase “multiple access” describes the fact that many devices are

connected to a given Ethernet network and that each of them is aware of all transmissions sent by

any other device on the network. Since there is only one medium—typically a fiber-optic

cable—available for all of these devices to use, Ethernet must contain the ability to prevent one

device’s transmission being interfered by other transmissions. The solution, known as “carrier-

sense,” involves a protocol in which each device checks the network’s medium to ensure that no

other device is transmitting information. If there is a current transmission, then the device will

wait until it is finished before beginning its own transmission. At times, two or more devices

might attempt to begin a transmission at the exact same instant. When this happens, each device

recognizes this fact based on the fact that its own transmission returns with interference from the

other transmission, a process known as “collision detection.” When a collision is detected, each

transmitting device halts its transmission and then waits a random amount of time before

attempting to transmit again. The amount of waiting time must be random so that the two

devices do not continue to produce collisions as they attempt to transmit over and over again [3].

The above description, however, illustrates a very basic Ethernet network, and numerous

modifications have been necessary to allow the system to be useful with a large number of users,

such as a college campus. The process of “segmentation” is one method that allows many

devices to be connected to the same network without interfering with each other too often. In

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segmentation, a single Ethernet medium is split into multiple segments, so that multiple

transmissions can be made at the same time. To enable all of the devices on the same network to

continue to interact with each other, “bridges” exist to connect the different segments together.

These bridges transmit and receive information just like other devices on the network, and they

follow all of the rules of collision detection and carrier-sense. However, the only information

that a bridge transmits is the echo of a transmission from an adjacent segment [3].

b. Project Overview

A Gigabit Ethernet contains many layers of abstraction, but the only layer that was

constructed in this project and addressed in this paper is the Physical Media Dependent (PMD)

Layer of the Physical Layer. Specifically, the scope of this project involves the design and

creation of an “optical transceiver module” that is IEEE 802.3z standard compliant for an optical

Gigabit Ethernet. The optical transceiver module can be broken into two components: the

transmitter (Tx) and receiver (Rx). In the transmitter, a digital signal is input to the Maxim 3287

chip, which is called the laser driver. The laser driver converts the digital logic to a current

which must be large enough to drive an optical transmission device called a VCSEL. The

VCSEL transmits an optical signal to a corresponding optical receiver device which is called a

ROSA. These two optical devices are connected by a fiber-optic cable which also attenuates the

signal. The ROSA actually contains two devices: an optical component called a photodiode

(PD), which converts the optical signal from the Tx portion of the transceiver to an electrical

current signal, and an electrical component called a trans-impedance amplifier (TIA), which

converts the electrical current signal from the PD to a differential voltage. The differential

output from the ROSA is then sent to another amplifier, which is called the limiting amplifier

and is implemented using the Maxim 3264 chip. This limiting amplifier transforms the

differential output from the ROSA to a digital signal—identical to the one input to the laser

driver chip—which becomes the output of the transmitter [6].

To accomplish this task, a number of preliminary steps have been taken to ensure that

each group was properly prepared for the construction and implementation of the transceiver.

Firstly, a number of presentations were covered by the instructors over the first half of the

semester, serving as introductions to the various optical concepts important to the project. At the

same time, the group both organized itself into a management structure to appropriately divide

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the work of the project and also projected the time-table of the different phases of the project so

that a guide could exist over the course of the semester. Next, the transceiver link was planned

both electrically and optically and was incorporated into the “optical link budget” to ensure that

electrical and optical signals within the transceiver circuit are within the constraints of the circuit

devices. In order to practice soldering and to gain more familiarity with the physical components

of the project, a test transmitter board was constructed and evaluated using only electrical

components. With the knowledge gained from the presentations and from the hands-on work,

the transceiver link was then planned. This process included the research and ordering of the

proper parts, the design of the transmitter and receiver circuits, and the layout of the circuits and

optical devices on a PCB board [7].

After the aforementioned preparation, ordering of supplies, and circuit design process, the

group was ready to construct and test the entire optical transceiver module, and the remaining

portion of the semester was utilized to accomplish this task. The group was provided with a

$350 budget for the completion of the project. The funds in this budget were for the components

to be used in the transceiver and for the fabrication of the PCB board, as well as any shipping

costs incurred in the process.

c. Optical Background

The two optical devices that were incorporated in this project are the Vertical Cavity

Surface Emitting Laser (VCSEL) and the photo-detector or photodiode (PD), which is included

in the Receiver Optical Sub-Assembly (ROSA).

A VCSEL is made up of a double heterostructure compound semiconductor that is

forward biased. Carriers generated by the forward bias are injected into the active region of the

semiconductor, producing light at varying wavelengths. Mirrors set at different distances from

the cavity of the VCSEL reflect the light into the cavity, combining all of the light into one

wavelength that can be output as a circular symmetric laser through a fiber-optic cable. Lasers

are utilized in Ethernet applications rather than LEDs for a number of reasons. When lasers are

powered with an input current greater than a threshold current, they experience an exponential

increase in optical power output, rather than the linear relationship between input current and

output power seen in LEDs. In addition, lasers are much more efficient in transmitting light to a

fiber because of its divergence angle of 6°, compared to the 90° divergence angle of LEDs [8].

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Photodiodes are typically made up of a P-i-N compound semiconductor. The

semiconductor is doped as a double heterostructure and is operated in reverse bias. The entering

light from a fiber-optic cable passes through the i portion of the semiconductor, which is the

smallest region and serves as the absorbing area of the photodiode. An electric field caused by

the reverse bias then forces the free carriers to the output of the photodiode, thereby creating a

current. In order to ensure that a photodiode will produce the desired performance, the device is

designed so that a high efficiency, or responsivity, and a low capacitance exist [9].

d. Organizational Management

As suggested by the instructors, the major tasks of the project were divided so that one

member of the group assumed the primary responsibility for ensuring that a particular

component of the project was accomplished. In addition, another member of the group was

assigned to each task in a secondary role, both to assist the lead team member and to assume

responsibility in case of emergency. In no way, however, was this structure meant to burden one

team member with the entire responsibility of a particular task, and an important goal of the

management structure was that each team member would be able to participate in each phase of

the project. The assignment of roles is specified below in the following table. Task Task Leader Primary Support

Coordination and Budget Pat Kevin

Optical Link Design and Budget Kevin Bryan

Board Construction / Soldering Bryan Pat

Part Research / Ordering Pat Kevin

Testing Kevin Bryan

Design / Layout Bryan Pat

Website Kevin -

e. Time Management

To ensure that the group did not fall behind schedule in the creation of the Gigabit

Ethernet, a GANTT chart was created to project the timeline of the different tasks that must be

accomplished throughout the semester. This timeline was based primarily off the final GANTT

charts from groups in previous semesters of this project. To construct the initial GANTT chart,

the process was conducted end-to-beginning. Based on the deadline and the amount of time for

previous groups to build and troubleshoot their transceivers, it was determined that the first

board fabrication should be ordered in mid-March. Because this date coincided with Spring

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Break, the week before spring break was designated the ordering deadline for the PCB board.

This decision was made to ensure that enough time was left at the end of the semester for the

completion of the project, even with unexpected problems. The tasks to be completed before the

first board fabrication were then projected accordingly, so that an approximately equal amount of

work would be accomplished each week.

The final GANTT chart is shown below. The light blue bars indicate the projected range

of completion for each phase of the project, and the darker blue bars indicate the progress on that

particular task. As shown below, the only tasks which are incomplete at the conclusion of the

semester are the ones involving the second, optional, board fabrication.

Looking back at the initial creation of the GANTT chart, it appears that the projected

ranges of time for the completion of various tasks were chosen with overall success. Because the

testing and troubleshooting of the first board fabrication extended past its projected deadline, a

second board fabrication would have been difficult to accomplish in the remaining time left in

the semester, but since the optional fabrication was never ordered (discussed later in this paper),

the overall timeline was a success.

III. Identification and Selection of Parts The initial venture into the VCSEL and photodiode search provided a myriad of results,

some encouraging and others not. The most challenging aspect of the VCSEL search was sifting

through options which appeared to be a perfect match for the purposes of a Gigabit Ethernet, but

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were instead slightly different from the desired part. Photodiodes, however, proved to be much

more difficult to find, and the use of a ROSA as a replacement was eventually decided upon.

Several manufacturers were eliminated early in the process of determining the best

VCSEL for this particular project. Luxnet Corporation and Kyosemi were removed from

consideration because of the potential difficulties that might occur when ordering from overseas

companies, especially ones which were unreliable when responding to questions. Oepic

appeared to be promising because of its performance and because of the company’s location in

the United States, but was only available at speeds of 10 Gb/s, which would be inefficient and

potentially problematic in terms of noise for a Gigabit Ethernet. One of the best manufacturers

identified was Roithner Lasertechnik, whose TTR-D1 VCSEL had excellent performance. This

company was decided against, however, because of price and overseas shipping concerns.

Finally, Advanced Optical Components was chosen as the best source of VCSELs. Its 1.25 Gb/s

VCSEL’s “four corners” analysis did not meet the current requirements of the optical link

budget, but its 2.5 Gb/s VCSEL (HFE419x-541) produced a “four corners” analysis that was

adequate. In addition, the VCSEL’s excellent price ($14.50 per part) and the company’s location

in the United States made this particular VCSEL the logical choice. After ordering from

Advanced Optical Components, Emcore Corporation offered to send twenty free samples of their

LC-TOSA. While it would have been ideal to learn about this before the ordering deadline, the

free VCSELs were very much appreciated.

Photodiodes were much more difficult to find, and after analyzing the different

possibilities, it was determined as a class to focus on ROSAs instead of photodiodes. Because

Advanced Optical Components had already been chosen as a VCSEL provider, it made sense to

investigate their ROSA, as well. It was quickly determined that the company’s HFD3180-103

ROSA was the best option because of its price ($10.00 per part), its availability, and the

convenience of ordering all optical parts from one company.

The passive components were considerably easier to identify and obtain. The majority of

the parts—including the ferrite inductors, two types of potentiometers, four types of resistors, the

capacitors, and the power jacks—were ordered from Digi-Key. SMA connectors were ordered

from Jameco, and the PCB boards were fabricated by Express PCB.

Two mistakes were made during the ordering process. The SMA connectors were

originally ordered from Newark InOne, but the parts turned out to be QMA instead of SMA.

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Because of difficulties in getting the pieces exchanged for the correct parts, it was decided to

suffer a small restocking fee and reorder from a different company. Also, the original power

jacks ordered from Digi-Key turned out to be the wrong part number and were not able to be

mounted to a PCB board. Because of the relatively low cost of this part, it would have been an

unnecessary amount of trouble to return them, so the correct parts were simply ordered.

When creating the PCB board, the layout was designed to work for the Advanced Optical

Components VCSEL, which requires a common cathode arrangement. Both a conservative and

an aggressive layout were implemented, as discussed in the layout section of this paper. At the

time, it was assumed that a second board fabrication incorporating the Emcore VCSEL—which

requires a common anode arrangement—would be ordered later. Taking all this information into

account, enough passive components were ordered so that four different circuits could be

created, with additional pieces in reserve in case of accidents or problems.

IV. Optical Link Budget a. Four Corners Analyses

In order to develop an optical link budget to be able to verify our choice of parts for the

transmitter, it was first necessary to perform a four corners analysis for the two different

VCSELs used in this project. Since the performance characteristics of a particular quantity of

VCSELs fall within a range, rather than all equating to exact values, the four corners analysis is

performed to ensure that even VCSELs operating at extremes in the range of performance

characteristics will be able to function properly in the designed circuit. Since two

characteristics—threshold current and slope efficiency—are important for the performance of a

VCSEL, four cases must be analyzed to account for each combination of extreme values. The

primary part used was the Advanced Optical Components HFE 419x-541, operating at 850nm,

LC connectorized, common cathode, 2.5 Gb/s operation, and attenuated. Using the minimum and

maximum values from the data sheet [10] the following analysis was performed:

Ith (mA) η (mW/mA) Itot(MAX) (mA) Itot(MIN) (mA) Ibias (mA) Imod (mA) 0.5 0.04 25.5000 3.6473 14.5736 21.8528 2.5 0.04 27.5000 5.6473 16.5736 21.8528 0.5 0.16 6.7500 1.2868 4.0184 5.4632 2.5 0.16 8.7500 3.2868 6.0184 5.4632

Figure 1: Four Corners Analysis for AOC VCSEL

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The most important thing to conclude from this analysis is that these values are within the

operation parameters of the Maxim IC 3287 Laser Driver.

The secondary optical part obtained was the Emcore LC-TOSA [11]. Like the AOC VCSEL,

the Emcore VCSEL operates at a wavelength of 850 nm, is LC connectorized, and despite being

designed for 2.5 Gb/s operation, it will function at lower speeds. Unlike the common cathode

configuration of the AOC VCSEL however, the Emcore VCSEL is in the common anode

configuration. This was not ultimately relevant for this project because a second board

fabrication for the Emcore VCSEL was never ordered. Like the AOC VCSEL the Emcore

VCSEL is also within the operation limits set by the laser driver.

Ith (mA) η (mW/mA) Itot(MAX) (mA) Itot(MIN) (mA) Ibias (mA) Imod (mA) 0.5 0.2 5.5000 1.1295 3.3147 4.3706 2.5 0.2 7.5000 3.1295 5.3147 4.3706 0.5 0.4 3.0000 0.8147 1.9074 2.1853 2.5 0.4 5.0000 2.8147 3.9074 2.1853

Figure 2: Four Corners Analysis for Emcore VCSEL

b. Link Budget

Once VCSEL components had been chosen it was then necessary to draft the optical link

budget. There are, however, a series of assumptions that need to be made in order to draft this

budget:

Eye safe limit → Pmax = 1 mW

In order to have a transmitter that will not cause inadvertent eye damage it is necessary that the

maximum output power at the VCSEL not exceed 1 mW.

From the 802.3 standard → extinction ratio = 9dB

From the 802.3 standard the extinction ratio is 9 dB. This extinction ratio is used to calculate the

value for Pmin.

Thus we see that Pmin = Pmax *10^(-9/10)

Pmin = 0.12589 mW

Maximum Link Power Budget Loss at Rx from 802.3 Standard = 7.5 dB

Finally, from the 802.3 standard the maximum loss in the fiber between the transmitter and

receiver is 7.5 dB. This loss is used to calculate the range of power at the receiver.

AOC VCSEL & HFD3180-108 ROSA Ith (mA) 1.8

DC Bias of laser (mA) 10.29 Slope Efficiency (mW/mA) 0.125

Modulation Current of Tx (mA) 29.1369

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Range of Power Output (mW) 0.12589 - 1.0

Range of Power at Rx (mW) – 7.5 dB Loss .02239 - .17783 Voltage Output Range from ROSA (mV) 55.98 – 444.58

Voltage Input Range for Maxim 3264 (mV) 5 - 1200

c. ROSA Parameters

While the requirements for the VCSELs are relatively stringent, by using a ROSA instead of

a photodetector and TIA the only parameter that one needs to be concerned with is the signal

gain in Volts out from the ROSA relative to Watts in from the fiber optic. The ROSA being used,

HFD3180-108 from Advanced Optical Components has an average gain of 2500 V/W with a

minimum gain of approximately 1500 V/W and a maximum gain of approximately 3500 V/W.

Using the average gain from the ROSA and the range of power at the receiver from the optical

link budget it is then possible to calculate the range of voltage output from the ROSA to be

55.98-444.58 mV which is within the 5-1200 mV operating range of the input for the Maxim

3264 Limiting Amplifier.

V. Design and Layout

a. Design Tools The main CAD programs used for the project were obtained via online from

www.expresspcb.com. They were downloaded free of charge as a package that included two

design tools: ExpressSCH 4.2.2 and ExpressPCB 4.2.2. The ExpressSCH 4.2.2 software is a

simple and effective way of creating design schematics using pre-packaged parts from built-in

libraries along with easily-created customized components. The user interface is very similar to

click-and-drag drawing programs such as Windows Paint, making managing and editing the

schematics relatively easy. On the other hand, the ExpressPCB 4.2.2 software is used primarily

for designing the printed circuit boards (PCB). Although its design view with the components

not explicitly shown looks more complicated, the program itself has a very similar interface as

ExpressSCH. It even includes a feature that links the schematic compiled from ExpressSCH to

the PCB design. This feature highlights specific pins that need to be connected together

providing a helpful guide for converting the schematic design into a PCB format.

Both software tools are easy to use and include comprehensive help files that make

learning to use them simple. More importantly, the ordering of PCB’s is built straight into

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ExpressPCB 4.22 making the design process from start to finish more efficient. This feature

includes calculating the overall cost, estimating how long it will take for the boards to be

fabricated, as well as checking the design for basic mistakes before finalizing the order.

b. Schematic Design

The general structure of the transmitter (Tx) schematic was based primarily on the test Tx

board as well as the results from the work of previous groups. The major components include

the AOC/Emcore VCSEL, the MAXIM 3287 Laser driver chip, and passives (resistors,

capacitors, inductors, & potentiometers). As seen on the final Tx schematic shown in Figure 3,

the design incorporates a number of key features that can improve the overall performance of the

integrated circuit (IC). For example, capacitors C1 & C2 with the inductor L1 function as a filter

designed to minimize the high-frequency noise from the power supply. Similarly, capacitors C3,

C6, and C7 act as decoupling capacitors which reduce the magnetic induction between the traces

by absorbing high frequency signals. They create a low impedance path between the IC pins

drawing the current and the local ground contact, forming a return path for the current to the

power supply. This prevents voltage spikes from occurring in the supply traces and helps reduce

noise and impedance problems. Since the Tx and Rx circuits will be sharing a power supply

which can potentially cause crosstalk problems, supply decoupling cannot simply be ignored.

Both the filter and decoupling capacitors help alleviate coupling into highly-sensitive signals to

noise making them vital to accurate overall performance.

The other passives help maintain the differential nature of our circuit as well as help

control and maintain the operation of the transmitter. Resistor R1 acts as a terminating resistor

between the differential inputs which prevents reflections by matching the design impedance.

Resistor R2 helps match the differential outputs of the laser driver chip. Potentiometers R3 and

R4 are used to manipulate the operation of the VCSEL, scaling the output and controlling the

output power of the VCSEL respectively. R5 & R6 are placed in series of these potentiometers

as limiting resistors to protect the chip and the VCSEL from high currents – in case the

potentiometers are set down to an unsafe level. Capacitors C8 and C9 are coupling capacitors

which helps maintain a steady AC current across the signal traces. Inductors L3, L2, and L4 act

like high-frequency resistors (they have large impedances at high frequencies). Thus, they help

absorb high frequency noise from the power supply lines.

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Figure 3: Tx Schematic.

The receiver (Rx) schematic was also largely based on the work of previous groups. One

main difference, however, is the implementation of a ROSA instead of the photodiode (PD) and

trans-impedance amplifier (TIA) combination. This was done to bypass the compatibility issues

and design considerations of using the PD and the TIA. As seen in Figure 4, the design is a lot

simpler with only two major components: the AOC common cathode ROSA and the MAXIM

3264 limiting amplifier chip (LA). The rest are passives with similar purposes as those used in

the transmitter shown above. Like the transmitter, the Rx design also includes a filter (C4, L1,

and C5) and decoupling capacitors (C3, C6, and C7). As discussed before, these components

were included to help alleviate the coupling of highly-sensitive signals to noise. The design also

includes coupling capacitors (C1, C2, C8, and C9) to maintain a steady AC signal between the

ROSA and the LA as well as from the LA to the differential outputs.

Figure 4: Rx Schematic.

c. PCB Layout

Design Considerations

After the Tx and Rx schematics were approved and completed, they were converted into

a PCB design using ExpressPCB 4.2.2. The designs are required to take into consideration

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specific design rules mentioned in the tutorial as well as in class. Firstly, as stated in the tutorial

for the software, lines should be as short and as direct as possible and should avoid sharp, 90˚

turns. Instead, signal traces should be limited to horizontal, vertical or 45˚ angles which help

reduce the risk of reflections. Secondly, since there are highly-sensitive signal lines on the

board, care must be taken into avoiding transmission lines as well as reducing noise coupling.

Making the traces act like wires instead of transmission lines can be achieved by minimizing

their length. Since the end goal is to have the transmitter able to send a signal at a rate of 1

gigabit per second, the signal must be at least a 500 MHz square waveform. The steep

transitions of this waveform from low-to-high and high-to-low require that the lower and upper

harmonics be included. Ideally our signal will include up to the fifth harmonic which typically

exhibits about 15% eye closure--a very tolerable level. In order to achieve this, the lines must

not exceed 4 mm or else they will act like transmission lines causing reflections that lead to

higher eye closure percentage and poorer performance. Noise coupling, on the other hand can be

avoided by adding decoupling components on appropriate places on the board and by creating

differential inputs/outputs. Lastly, the spacing on the mini-board needs to be very efficient since

the project is under a budget limit. This involves making the components compact to fit as many

Tx and Rx designs on a single board since board fabrication is costly both in time and money.

Having multiple designs on one board will help backup against poor assembly as well as allow

multiple design concepts to be tested.

Conservative Design

Following all the design rules and taking in all the considerations mentioned above, the

completed conservative design is shown in Figure 5. As can be seen, the components are all

relatively close to each other and all angled traces follow a 45˚ angle to avoid reflections.

Moreover, the highly-sensitive lines such as the outputs of the ROSA have been decreased to a

width as close to the ideal 4mm length. This helps avoid the trace from becoming a transmission

line and helps maintain the signal into the LA. The ROSA is also at the furthest distance from

any of the noisy sources such as: the power supply lines, the output of the LA, the VCSEL, and

the laser driver. This should help avoid any crosstalk or interference between the transmitter and

the receiver. Furthermore, the Tx and Rx ground planes are separated inductively to help further

reduce the high-frequency interference from going through the boards. The layout also exhibits

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as much symmetry as allowed given the dimensions of the parts and the space allotted on the

mini-board to maintain the differential inputs and outputs for both the Tx and the Rx. This is

most evident on the outputs of the laser driver where the VCSEL is parallel to resistor R2 (to

match the loads) as well as on the inputs and outputs of the LA chip. Maintaining symmetry

helps the circuits effectively maintain their differential operation which helps bypass differences

in ground levels as well as minimizes noise errors between and on the two lines.

Figure 5: TxRx Conservative PCB design.

Aggressive Design

The main difference between the aggressive design seen in Figure 6 and the conservative

design is the distance between the VCSEL and the ROSA. In order to meet the specification for

a Duplex SC connector, they were moved in to a distance of 13.5 mm apart. This would make

them compliant with using the duplex cable that would most likely be used during the board’s

real-world application. Unfortunately, this creates issues of crosstalk between the transmitter

and the receiver. The close proximity with each other will most likely result in the ROSA

picking up interference from the VCSEL or the high-frequency signals from the laser driver,

making the input signal into the LA very inaccurate. Furthermore, moving the ROSA makes the

trace between the inputs to the LA longer than is recommended for avoiding transmission lines

and makes it difficult to maintain the symmetry needed for differential inputs. If it is too long

and asymmetric it will create reflections and distortions, further degrading the signal going into

the LA inputs.

Other differences in the design include connecting the ground planes through a trace at

the bottom of the board instead of being inductively-connected and removing the potentiometer

from between the ROSA and the VCSEL and moving it up closer to the laser driver chip. These

changes could have adverse effects on the performance. Connecting the two ground planes may

cause high-frequency noise to cross over and interfere with circuit operation. Moving the pot

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could decrease any shielding it could have provided when it was between the ROSA and the

VCSEL, thus leading to poorer performance. Alternatively, these changes may have no effect

and might even improve the performance. No conclusions can be drawn until the new layout is

assembled and tested.

All of these variations help attribute to the design’s aggressiveness and to testing and

trying new design concepts in hopes of finding an improvement to the overall design. Breaking

the conventional design rules increases the risk of poor performance but can also produce an

innovation and product advantage over competitor’s designs that are untapped by the safer more

conservative designs.

Figure 6: TxRx Aggressive PCB design.

VI. Testing and Performance a. Test Transmitter Alpha

The first board that was constructed was the purely electrical Test Tx Board. The initial

board was titled Test Tx Α. There were numerous problems encountered in both the construction

and testing of this board. Initially only one set of inputs were installed on the board due to an

error from trying to follow a previous group’s work. Using this setup the inputs and outputs to

the board were electrically connected and thus while there appeared to be appropriate

performance on the board this was clearly not the case.

Once this issue was corrected and all four SMA connectors were installed on the board there

were still further problems. During the next testing phase the inputs and outputs to the board

were reversed so that the chip was being attempted to be driven in reverse with the output from

the pattern generator sent into the outputs of the board and the inputs to the oscilloscope sent to

the inputs to the board.

During the third trial of Tx Board A this issue was addressed and the board was properly

connected as shown in the following pictures:

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Figure 7: Proper Test Setup for Tx Board A Figure 8: Inputs/Outputs Properly Connected

Still, the board did not function properly, with no attenuation and using the PRBS7

pattern from the signal generator the ‘eye’ was very sloppy and altering the value of the

potentiometer had little to no effect on the board output.

Figure 9: Poor Output from Tx Board A

Further investigation of this board with the probe and scope revealed a problem in the

differential inputs to the laser driver IC. Namely, while a signal was measured at the second

input to the chip, no input was observed at the first input.

Figure 10: Data(+) Input Figure 11: Data(-) Input

As a result of this testing the decision was made to attempt a second fabrication of the Test Tx

Board in order to try and create a working and functioning test board.

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b. Test Transmitter Beta

The second attempt at constructing a working electrical transmitter was titled Test Tx B.

Attempting to learn from all of the failures in Test Tx A, Test Tx B was constructed completely

using the more advanced soldering equipment in the lab and was fully assembled in one

fabrication attempt.

Figure 12: Top of Test Tx B Figure 13: Bottom of Test Tx B

While this board was tested in the exact same manner as the final tests were run on Test

Tx A, Test Tx B yielded dramatically different results, namely, results that were to be expected

from an electrical test board of this nature as shown in the following table:

0 dB PRBS7 Pattern

BER (no signal)

AC Coupling

10 dB PRBS7 Pattern

BER < 10^-9

(3 minute interval)

AC Coupling

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70 dB PRBS7 Pattern

BER < 10^-9

(3 minute interval)

AC Coupling

Figure 14: ‘Eye’ Set for Test Tx B

In addition to achieving an eye for all levels of electrical attenuation greater than 0 dB

and less than or equal to 70 dB the output was also scaled by changing the value of the

potentiometer.

70 dB PRBS7 Pattern

AC Coupling

70 dB PRBS7 Pattern

AC Coupling

Pot value adjusted

to scale down output With the completion of these tests Tx Board B was declared a resounding success. The eye

diagrams were very well defined, the potentiometer scaled the output, the BER was very low,

and attenuation had minimal effects until extreme values.

c. Conservative Board Fab 1 Alpha

Having successfully tested a purely electrical board the next phase in the project was to

attempt to implement a functioning optical board using our board design and specified

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components from our optical link budget. The first attempt at creating a fully functional optical

board was Board Fab 1A.

Board Fab 1A was assembled without known incident. However, when the board was

powered using the 5V power supply the ferrite bead in the power filter for the transmitter circuit

failed catastrophically. Initial testing was done on an unplugged and unsoldered board to

determine if there might be some unrecognized short in the design of the board. No such design

flaw was found. Investigation with a digital multimeter of Board Fab 1A however revealed a

short that was causing a 5 volt drop across the failing ferrite bead. While the exact location of

this short could not be determined it did explain the behavior being observed. Rather then

continue to try and hunt down the odd failure a second board was constructed.

d. Conservative Board Fab 1 Beta

Board Fab 1B seemed to be identical to Board Fab 1A. However, Board Fab 1B was partially

functional, while there was no functionality due to catastrophic failure in Board Fab 1A. Initial

testing was done using the 3.3 V power supply to try and lessen the likelihood of catastrophic

failure such as that observed with Board Fab 1A and the 5 V power supply.

Figure 15: Testing Board Fab 1B

On the transmitter circuit for Board Fab 1B a signal was detected at both outputs of the

chip. Furthermore, at the input to the VCSEL a signal was not only modulated but also had a DC

offset of approximately 3.3 V. However no lasing was detected from the VCSEL using either the

built in optical receiver of the pattern generator or using a digital camera known to detect IR. The

two signals found with the probe are shown below:

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Output of

Limiting Amplifier

Using Probe

Input to VCSEL

Using Probe

Figure 16: Tx Signals for Initial Testing of Board Fab 1B

While the transmitter was not yet fully functional in Board Fab 1B it was certainly a vast

improvement over the catastrophic failure experienced with Board Fab 1A.

Like the transmitter, the receiver in Board Fab 1B was partially functional. The ROSA

was giving an ideal output that is going into the limiting amplifier. The limiting amplifier,

however, was not properly amplifying that signal to the outputs of the board. Using the optical

output from the pattern generator the following signal was observed at the output of the ROSA

using the probe.

Figure 17: ROSA Output for Initial Testing of Board Fab 1B

During testing the limiting amplifier did heat up immensely on a few occasions. Based on

this observation and on further inspection of the board, it was determined that the first

installation of the limiting amplifier was inverted. Upon successful replacement of a new

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limiting amplifier in the correct configuration, the desired output waveform was observed,

indicating that the receiver of Board Fab 1B was working successfully. Using the PRBS7 pattern

and 9dB of optical attenuation, the bit error tester recorded zero errors during a five-minute span,

and the corresponding waveform is shown below.

Figure 18: Successful Operation of Receiver from Board Fab 1B

e. Conservative Board Fab 1 Gamma (Transmitter only)

During the prolonged testing of the transmitter of Board Fab 1B, shorts were observed as

parts were continually soldered and removed, and it became difficult to continue testing without

destroying more inductors. The transmitter circuit of Board Fab 1Γ, therefore, was constructed

with one significant change. Before the construction of Board Fab 1Γ, it was determined that the

pin arrangement of the VCSEL had been designed incorrectly in the PCB layout. This problem

was relatively easy to solve, however, as the VCSEL’s leads could be bent to properly insert the

VCSEL into the existing PCB board, a solution which ensured that the device was being driven

in forward-bias.

Results for Board Fab 1Γ were again unsuccessful, so a simple test was undertaken. The

VCSEL was removed and replaced with a 100Ω resistor, and the digital multimeter was utilized

to examine the voltage across the make-shift VCSEL. Because of discrepancies between this

value and the voltage drop observed with the VCSEL included in the circuit, a mistake in the

circuit design or layout was suspected, and these schematics were then reviewed.

f. Aggressive Board Fab 1

After a thorough analysis of the transmitter circuit schematic—as well as consultation with

the professors—it was determined that the transmitter circuit might be overdriving the VCSEL.

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To correct this possible mistake, a 25kΩ potentiometer was used to modulate Ibias instead of the

original 1kΩ potentiometer. Just as in the previous two board constructions, however, a short

had developed in Board Fab 1Γ because of repeated soldering and removal of parts. Rather than

test the new potentiometer on this problematic board, the transmitter side of an aggressive board

layout was soldered and constructed, as there were no remaining conservative layout boards for

this PCB fabrication. In addition to the above modification, the potentiometers were carefully

adjusted to large resistance values before they were soldered to help ensure that the VCSEL

would not receive too large a current.

When the transmitter of Aggressive Board Fab 1 was built and tested, an eye was

immediately seen on the oscilloscope. The potentiometers were then scaled down to smaller

values of resistance, and an eye of excellent quality was obtained, which is shown below.

Figure 19a: Initial Tx Results Figure 19b: Adjusted Tx Results

g. Loopback Testing

Since a working transceiver had finally been produced, the only remaining task was to get

both to work on the same board using a loopback test. Because the only working transmitter

board was on an aggressive layout, the receiver on the same aggressive layout was soldered and

tested. As has occurred previously, this particular receiver was constructed with no difficulties.

Both the transmitter and receiver were then connected for the loopback test using PRBS7 pattern

and 7dB of attenuation, and the following eye diagram was generated on the oscilloscope.

Figure 20: Successful Operation of Transceiver from Aggressive Board Fab 1 Via Loopback Test

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Additional tests were performed to ensure that the results were valid. First, the

attenuation was increased to 8dB, which is above the required specification in the standard, and

as expected, the eye diagram was less clearly defined. Next, to be sure that the output to the

oscilloscope was legitimate, the optical fiber was removed, and the signal disappeared entirely.

These waveforms are included below.

Figure 21: Loopback Test with 8dB Attenuation Figure 22: Loopback Test with Cable Removed

Next, the loopback test was performed using the bit error tester. Initially, a great deal of

difficulty was observed in getting the bit error tester to lock onto the signal. The solution to this

problem was found by connecting the working board to the bit error tester at zero attenuation,

which allowed the signal to be locked onto, and then gradually increasing the attenuation until

8dB was obtained. While this was an inconvenience, it is important to note because this

confirms, to some extent, that the attenuation was degrading the quality of the signal. After

leaving this setup connected for approximately five minutes, no errors were detected by the bit

error tester for a BER < 0.0E-10. Furthermore, disruptions to the cable connection were able to

induce errors in the system. From these results proper functionality of the entire transceiver

module was verified through this loopback test.

VII. Financial Budget The budget for completing a working Gigabit Ethernet board was allocated to be three

hundred fifty dollars per group. This prototype budget should include the costs of all of the

electrical and optical components required for the circuit, the fabrication of the PCB board, and

any shipping costs that might be incurred in the process. Since cost is such an integral part of

this project, this factor was an important reason for the choice of VCSEL and ROSA supplier.

The prices for these two optical devices were significantly less expensive than typical costs

reported by groups in previous years, which was beneficial when generating the financial budget.

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In addition, because of Emcore’s offer to send free VCSELs, there were enough parts in reserve

to dispel the need for an unanticipated and last-minute VCSEL order.

It was decided that two separate PCB board fabrications could be made within the

constraints of the budget as a result of the relatively low cost of the optical components.

Therefore, a great deal of flexibility existed during the construction and testing of the first board

fabrication. Because the first fabrication was ultimately a success, however, it was determined

that there was no longer a need for a second PCB board fabrication, and so the final budget had a

considerable buffer between the maximum budget and the actual amount spent.

The final financial budget is included in the following table. Item Supplier Part # Qty Unit Price Total Amount

Ferrite Chip Inductor Digikey 490-1034-1-ND 30 $0.12 $3.60 Power Jack Digikey CP-002APJCT-ND 5 $0.81 $4.05

POT 1.0kOhm Digikey 3296W-102-ND 5 $2.50 $12.50 POT 25kOhm Digikey 3296W-253-ND 5 $2.50 $12.50

Resistor 115 Ohm Digikey 311-115CCT-ND 10 $0.08 $0.80 Resistor 100 Ohm Digikey 311-100CCT-ND 10 $0.08 $0.80 Resistor 24 Ohm Digikey RR12Q24DCT-ND 10 $0.15 $1.51 Resistor 10 Ohm Digikey RR12Q10DCT-ND 10 $0.15 $1.51

Capacitor 10000 pF Digikey PCC103BNCT-ND 100 $0.04 $3.66 SMAs Jameco 901-143-6RFX 10 $4.20 $42.00

2.5 Gbps ROSA Advanced Optical Components HFD3180-103 4 $10.00 $40.00 2.5 Gbps VCSEL Advanced Optical Components HFE419x-541 4 $14.50 $58.00 PCB Board Fab Express PCB 1 $59.00 $59.00

Shipping and Miscellaneous Various $25.94 Total $265.87

VIII. Bill of Materials Once the entire transceiver module was completed and verified to work properly using

the aggressive board layout, a bill of materials—which lists a per unit price for the product at

mass quantities—for that particular layout was compiled. Because the total price of $28.82 does

not compare favorably to competitive 1 Gbps Ethernet transceivers, which can be found as cheap

as $12.00 to $13.00, it would be impractical to attempt to produce and sell the product in mass

quantities. The itemized bill of materials is shown below. Product Vendor Item Number Qty Large Qty Price ($) Total Amount ($)

POT 25.0K OHM Digikey 3296W-253-ND 2 1.092 2.184 RES 115 OHM Digikey 311-115CCT-ND 2 0.01682 0.03364 RES 100 OHM Digikey 311-100CCT-ND 2 0.01682 0.03364 RES 24 OHM Digikey RR12Q24DCT-ND 1 0.02958 0.02958 RES 10 OHM Digikey RR12Q10DCT-ND 1 0.02958 0.02958 CAP 10000 PF Digikey PCC103BNCT-ND 18 0.01888 0.33984

Ferrite Bead Inductor Digikey 490-1034-1-ND 3 0.064 0.192 VCSEL AOC HFE419x-541 1 7.25 7.25 ROSA AOC HFD3180-103 1 5.00 5.00

Laser Driver Chip Maxim MAX3287 1 4.00 4.00 Limiting Amplifier Chip Maxim MAX3264 1 4.00 4.00

PCB Board Express PCB 4 Layer Board 1 5.7195 5.7195 Total $28.82

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IX. Conclusions During the course of this project, many important lessons were learned, both related to

Gigabit Ethernet specifically and to hands-on engineering projects in general. Groups previously

undertaking this project were able to complete a majority of the requirements, but the major

dilemma they faced was eliminating “cross-talk” noise problems. ROSAs were utilized in this

year’s project – rather than PDs and TIAs – due to cost and availability. Because of the ROSA’s

built-in shielding mechanisms, the cross-talk seen in previous years was not a significant

problem in the design of the transceiver, thus allowing us to solve the cross-talk problem and

complete all project objectives.

While we were able to achieve all of the design objectives for this project, there are still

further measurements and optimizations that could be done. It would be useful to know the

actual power being delivered by our VCSEL, and the ability to measure this would allow

optimization of the link with power at the eye-safe level. From a design perspective, further

adjustments could be made to meet not only the SC separation spec, but also the LC separation

spec. Finally, it may be possible to reduce the number of non-essential components such as the

large number of decoupling capacitors.

Since prototypes often do not work properly the first time they are built, we also gained a

great deal of valuable skill in critical analysis and troubleshooting. Of particular use to our

completion of the project was the ability to effectively use the probe and digital multimeter to

analyze different portions of our circuits. Other important ingredients for success were an

understanding of the function of each and every component in our circuits, an ability to compare

our designs and results with data from the previous year’s groups and from other groups

concurrently completing the project, a fair amount of patience, and a sense of humor.

As discussed in the bill of materials section, it would not make sense to mass-produce

this product because current electrical products are still cheaper then this optical product. We

would not, however, consider this project a fruitless endeavor. Future technological advances

may continue to reduce the cost of production of optical components as well as increase their

performance. As was seen this year, the incorporation of ROSA’s, which not only reduced the

cost of our product, but also greatly increased the performance, were a significant step forward,

and future advances may prove even more extraordinary.

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X. References

[1] IEEE. “IEEE 802.3z Standard,” [Online Document]. IEEE. 2002 [cited March 24, 2005]. Available HTTP:

http://standards.ieee.org/getieee802/download/802.3-2002.pdf [2] Cisco Systems. “Ethernet Technologies,” [Online Document]. Cisco Systems, Inc. July 1, 2002 [cited March

24, 2005]. Available HTTP:http://www.cisco.com/univercd/cc/td/doc/cisintwk/ito_doc/ethernet.htm/

[3] Pidgeon, Nick. “How Ethernet Works,” [Online Document]. Howstuffworks Online. [cited March 24, 2005].

Available HTTP: http://computer.howstuffworks.com/ethernet.htm/

[4] TechFest. “Techfest Ethernet Technical Summary,” [Online Document]. Techfest.com. 1999 [cited March 24,

2005]. Available HTTP: http://www.techfest.com/networking/lan/ethernet1.htm

[5] International Engineering Consortium. “Optical Ethernet History,” [Online Document]. IEC. 2004 [cited

March 24, 2005]. Available HTTP: http://www.iec.org/online/tutorials/opt_ethernet/topic02.html

[6] ECE 135 Spring 2005 Class Lecture Material. Lecture 2, Part 1. “Overview of Optical Link.” Available online

at Blackboard Course Site.

[7] ECE 135 Spring 2005 Class Lecture Material. Lecture 1. “Task List.” Available online at Blackboard Course

Site.

[8] ECE 135 Spring 2005 Class Lecture Material. Lecture 6, Part 2. “Emitters.” Available online at Blackboard

Course Site.

[9] ECE 135 Spring 2005 Class Lecture Material. Lecture 6, Part 1. “Detectors.” Available online at Blackboard

Course Site.

[10] Advanced Optical Components. “VCSEL Datasheet,” [Online Document]. AOC. 2005 [cited March 24,

2005]. Available HTTP: http://www.advancedopticalcomponents.com/product/datacom.php

[11] Emcore Corporation. “LC-TOSA Datasheet,” [Online Document]. Emcore. 2005 [cited March 24, 2005].

Available HTTP: http://www.emcore.com/assets/fiber/TO462.5Gbps.pdf