Buses

The processor, main memory, and I/O devices are interconnected by means of a bus, whose primary function is to provide a communication path for the data. A bus is a highway on which data travels within a computer.

A bus protocol is a set of rules that govern the behavior of various devices connected to the bus as to when to place information on the bus etc.

Bus lines used for transferring data may be grouped into 3 typesData Address and Control lines

Data bus - It is used to transfer data. Data is transferred as word by word. The width of the data bus will be generally equal to the length of the wordAddress bus - A collection of wires connecting the CPU with main memory that is used to identify particular locations (addresses) in main memory. The width of the address bus (that is, the number of wires) determines how many unique memory locations can be addressed. However, the actually amount of memory that can be accessed is usually much less than this theoretical limit due to chipset and motherboard limitations.Control bus -While the address bus carries the information on which device the CPU is communicating with and the data bus carries the actual data being processed, the control bus carries commands from the CPUThe bus control signals also carry timing control information. They specify the times at which the processor and the I/O device may place data on the bus or receive data from the bus. In data transfer operation one device plays the role of master. This device that initiates the data transfer is called initiator. Normally the processor acts as the initiator, but other devices with DMA capability can also become bus master. The device addressed by the master is called slave or target.

A useful differentiation then became popular, the concept of the local bus (internal bus) as opposed to external bus or expansion bus. The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as printers.Another differentiation can be done on the basis of operation called Synchronous and Asynchronous Synchronous busIn synchronous bus, all devices derive timing information from a common clock line. Each of the timing intervals constitute a bus cycle,in which data transfer can take place.

bus clock

address andcommand

Data

t0 t1 t2

time At time t0, the master places the device address on the address lines and sends an appropriate command on the control lines. The slave takes no action or places any data on bus before t1.The information on the bus is unreliable at this stage because signals are in changing state. The addressed device will respond at time t1, and places the requested data (in case of an input operation) at time t1.

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Asynchronous busHere the data transfer is based on the use of a handshake between the master and

slave. The common clock is replaced by two timing control lines, Master ready and slave ready. The first is used to indicate the master is ready for a transaction and second is for the response from the slave.Data transfer controlled by handshake:- The master places the address and command information on the bus and activates the master ready line. The selected slave performs the required operation and informs the processor, it has done so by activating the slave ready signal. The master waits for the slave ready to become asserted before it removes its signals from the bus

If the change of state of one signal is followed by a change in the other signal, the scheme is known as a full handshakeBandwidth

Bandwidth, also called throughput, refers to the total amount of data that can theoretically be transferred on the bus in a given unit of time. Using the highway analogy, if the bus width is the number of lanes, and the bus speed is how fast the cars are driving, and then the bandwidth is the product of these two and reflects the amount of traffic that the channel can convey per second.

Memory bandwidth refers to the number of bits or bytes that can be transferred in one second

The bandwidth of a memory unit depends on the speed of access to the stored data and on the number of bits that can be accessed in parallel

So the effective bandwidth of the computer system is determined by the speed of the memory and by the transfer capability of the links that connect the memory and the processor, typically the speed of the bus

I/o-controller

It is computer board or module that coordinates and controls an I/O function. It is a device whose responsibility is to handle the details of input/output and to compensate for any speed differences between I/O devices and other parts of the computer

Device driver or a software driver is a specific type of computer software, typically developed to allow interaction with hardware devices. This usually constitutes an interface for communicating with the device, through the specific computer bus or communications subsystem that the hardware is connected to, providing commands to and/or receiving data from the device, and on the other end, the requisite interfaces to the operating system and software applications.Often called simply a driver, it is a specialized hardware dependent computer program, which is also operating system specific that enables another program, typically an operating system or application software package, to interact transparently with the given device. It usually provides the requisite interrupt handling required for any necessary asynchronous time-dependent hardware interfacingI/O processor (IOP)The i/o processor is a logical extension of IO control methods like programmed, interrupt etc. While the DMA concept extends limited control over data transfers to I/O, IOP has the ability to execute instructions which gives it fairly complete control over IO operations. Like CPU, IOP is an instruction set processor, but it has a more restricted instruction set. They are primarily communication control units designed to link IO devices to a computer.

Interface circuits

An I/O interface consists of the circuitry required to connect an I/O device to a computer bus. On one side of the interface, we have the bus signals for the address, data and control. On

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the other side, we have a data path with its associated controls to transfer data between the interface and the I/O device. This side is called a port either a parallel port or serial port.A parallel port transfers data in the form of a number of bits like 8 or 16 from device to device. A serial port transfers and receives data one bit at a time.

Fig. Example of interface circuit for an input

The I/O interface does the following1. Provides a storage buffer for at least one word of data2. Contains status flags that can be accessed by the processor to determine whether the buffer is full3. Contains address-decoding circuitry to determine when it is being addressed by the processor4. Generates the appropriate timing signals required by the bus control scheme.

Arithmetic logic unit

The arithmetic logic unit (ALU) is a digital circuit that calculates an arithmetic operation (like an addition, subtraction, etc.) and logic operations (like an Exclusive Or) between two numbers

A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output statusMost of the computer’s actions are performed by the ALU. The ALU gets data from processor registers. This data is processed and the results of this operation are stored into ALU output registers. Other mechanisms move data between these registers and memory A Control Unit controls the ALU, by setting circuits that tell the ALU what operations to perform

validAddress bus

data

processor

SIN

Encoder and

de bouncing circuit

Interface

Data in

Data bus

Master -ready

R/W write

Slave - ready

Inputdevice

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Most ALUs can perform the following operations1.Integer arithmetic operations (addition, subtraction, and sometimes multiplication and division, though this is more expensive) 2.Bitwise logic operations (and, not, or, xor) 3.Bit-shifting operations (shifting or rotating a word by a specified number of bits to the left or right, with or without sign extension). Shifts can be interpreted as multiplications by 2 and divisions by 2

An engineer can design an ALU to calculate any operation, however complicated it is; the problem is that the more complex the operation, the more expensive the ALU is, the more space it uses in the processor, and more power it dissipatesTwo general methods of implementation of ALU are 1. Combinational ALU s and 2. Sequential ALU

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