bypasses for high currents wirelaid - partial high current ......corrosion: ipc612 b / tm 650...

Bypasses for high Currents

Wirelaid® - Partial high Current Solution, Technology, Applications

03.12.2014 www.we-online.de

Agenda

03.12.2014 www.we-online.de Seite 2

Preisvergleich,

thermische Betrachtung

Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Need to know

References

Perspective

Example of use

Cost Comparison

FAQ

Introduction

Currents (300A and more) Logic (SMD, Fine Lines)

Use on one single PCB


Market requirements:

Introduction

Principle

Use of wires to realize high current nets

Power and controllers on one single PCB or layer

Alternative to thick copper or Inlays @ low amount of layers

Technique

Welding of flat copper wires(1,4mm x 0,35mm) onto the treatment side (later inside) from

standard copper foils

After pressing, wires are inside the laminate, embedded in prepreg/raisin

Additional cross section under a conventional copper track

Outer layers keeps SMD cabability


3D Feature


Deep milling through base material

Complex clearance without connectors

High cross sections @ small bending

radiuses(

Introduction

For more intensive introduction, please use our web archive:

Video recordings

Presentationslides as pdf

By the way: for all web contents


Agenda


Preisvergleich,


Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Need to know

References

Perspective

Example of use

Cost Comparison

FAQ

WIRELAID versus Standard

WIRELAID Cross section

wire

Cu over wire

(35µm Base-Cu)

Width standard track

(35µm Basis-Cu)

Reduction

of width

F14 0,5mm² 1,9mm 8,9mm 78,7%


0,63mm² Customer requirement: 20A @ 20K (35µm Base-Cu)

With WIRELAID

saving of

78,7% width

8,9mm

1,9mm

4,5mm

Agenda


Preisvergleich,


Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Need to know

References

Perspective

Example of use

Cost Comparison

FAQ

Design Guide NEU

Since electronica 2014 there is the

new

WIRELAID Design Guide 1.2

– new: Nomenclature

– new: Design notes for use of Wirelaid

layers

– new: Cost comparison

– new: Current feeding

english / french versions follows


Design Guide: Nomenclature of WIRELAID Layer stack up

MLn Wire@a@b....@n n = Number of layers

a, b, c…: Layers with wires


Outer Layer Inner Layer

Example shows

a multilayer with

6 layers and

wires under

layer 1 and 6

Example shows

a multilayer with

6 layers and

wires under

layer 2 and 5

Design Guide: Outer layer? Inner layer?

Consideration 1:

More complex logic devices use SMD components like controllers or memories with

small pitches. To keep the SMD layers free for fine line structures, the wires are applied

in the inner layers. Requirements concerning EMC and multiple power supplies, using

the innerlayers, can be implemented with standard cores and copper thicknesses. The

number of layers is, compared with the normal multilayer setup, almost equal, have a

look at the stackup

ML6 Wire@2@5:


Design Guide: Outer layer? Inner layer?

Consideration 2:

When cooling thru direct contact to the housing plays a roll or power semiconductors

like IGBTs or D²PACs are placed directly to the outer layer, then, a Wirelaid layer with

welded wire will be used. Look at the stackup

ML6 Wire@1@6.:

This should be the aim for more simple logic devices as well. Furthermore many vias/thru

holes can be saved and thereby costs, when the power components will be placed directly

onto the welding pad from Wirelaid

For more simple devices it is possible to reduce the number of layers


Agenda


Preisvergleich,


Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Need to know

References

Perspective

Example of use

Cost Comparison

FAQ

Example of Use

Permanent current charge 70 A

Maximum temperature 80C°


Previous: 8 Layers, 6 Innelayers at 105µm Cu

After: 4 Layers Wirelaid ML4 Wire@2

Cost advantage thru lower layer number and thin copper foils

Cost comparison: conventional solution


Initial situation

A multilayer PCB with 6 layers at 105 micron copper, takes the high current part. The

logic is placed at a separate fine line module, connected by PCB connectors to the main

board

New solution with WIRELAID

Due to the possibility of fine line structures together at the assembly layers, the logic

module can be completely integrated. All kind of connection technologies, as well as

every other assembly costs for the module integration, can be cancelled.

Cost comparison 1: PCB level


6-layer: inner 210µm / outer 70µm WIRELAID

Number of wires per manufacturing panel up to equal costs

Saving from 2 layers

Cost comparison 2: System level


In practice:1/2 of the costs. Impressing as well is the high potential of savings at the Initials, which, seen absolutely, are decisive

especially at lower volumes.

Conventional solution New solution

Power PCB ML6, 105µm,

logic module & connectors

WIRELAID PCB

ML6 Wire@1

Mainboard

Logic module

Connectors

Initials assembly

Stencils

AOI test

Testcosts

Set up costs per order

Stock and logistics

Frequently asked questions from customer point of view


FAQ WIRELAID – Everydays exemplary experiences

1. Hot spots at wire transitions?

2. How can I realize power feeds in and out?

FAQ – Everydays experiences

Hot Spots t wire transitions? No

– Increasing current densities

– Distances determined by wires and design rules

Problem analysation

– Thermographic analyse

– Background:

• Power drop at ohmic resistor

– @ P = I² x R, higher current density S

– Solution: Due to the high local heat capacity, not hot spot occurs (spreading)

Valid relation:


I [A] = 9,1 [mm²] 0,68 * ΔT [K]0,43

FAQ: Power feeding through power elements

Up to 50 A: SMD Power elements

– No pad drilling

– Ideal for WIRELAID

– Standard assembling and soldering

– Available is reel with suction cap

– In- and external thread M3 or M4

over 50 A: Press-Fit Powerelements

– Solderless, high reliable connections

– In- and external thread up to M10

– Retention force by IEC 352-5

– Respect drill spec for pressfit-

technolgy!

– No drill into WIRELAID wires!

More Infos:

we-online.com/powerelements


Press-Fit Powerelements

Drill spezification:

– Chemical surfaces

– HAL Surface



Press-Fit Powerelements WIRELAID wires has not to be

drilled !

Cross section comparison:

– Welding area at wire / Pad: ca. 1mm 0,8mm²

– Connection in plated drill:

Dia 1,45mm,* Wire thickness 0,35mm 0,6mm²

– Cross section drill

1,45mm, 25µm Cu plating in drill: 0,11mm²



Agenda


Preisvergleich,


Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Need to know

References

Perspective

Example of use

Cost Comparison

FAQ

Thermal View (TRM Software © Adam Research)


Servo driver75A

Layout conventionel

ML6, je 70µm Cu Base

Servo driver 75A

Layout Wirelaid

ML4 Wire@2@3

IL70µm, AL 35µm Cu Base



Setting the simulation area after :

• Current density S

• Electrical conductivity σ (Sigma)

• Thermal conductivity λ (Lambda)

• Layer Stack Up



Simulation result, Driver Servo

Motor 75 A

Layout WIRELAID

Tmax 33,8°C

Real IR Masuring Driver Servo

Motor 75A Layout conventionel

Tmax: 35,3°C



Real IR Measuring Driver Servo Motor 75 A

Layout Wirelaid

Tmax: 27,4°C

Due to the WIRELAID setup, at better performance,

a core (2layers) and base copper could be saved

Thermal View: Demonstrator

left:

Multilayer 6 Layer

each 105µm Cu

right:

2 LayerML2 Wire@1@2

each 35µm Cu, Wires F14

Result at 50A:

Equal heating, measured with

OPTRIS IR Camera

Kindly supported by

Optris, Berlin



The following is a short survey

Which statement applies to WIRELAID?

Agenda


Preisvergleich,


Introduction

WIRELAID

vs

Standard

Design Guide

Thermal Views

Needs to know

References

Perspective

Example of use

Cost Comparison

FAQ

Need to know: Manufacturing of WIRELAID foils

current stage of evolution :

available are base materials and wires

with adapted surfaces and fillings in

proven combinations up to 180°C

PCB working temperatures


Manufacturing steps

Need to know: Application range of WIRELAID

The WIRELAID current capacity has

no typical lower limit

Also small, area sensitive devices

can benefit

Present applications realsizes up to

300 A

The upper boarder of the currents

limit only economic aspects

The upper limit is only fixed at

economic borders


Any Questions? For more informations concerning higher currents, please contact

directly our product management: [email protected]

Need to know: Supplier base: WIRELAID License partners

5 licensed german manufacturers

2 asian manufacturers for high

volumes

Currently negotiations with two

more potential asian partners

Welding machines:

– 6. Evolution variant for extended use

with other manufacturers

Series production of various

applications in the field of 10k / y


§

References: WIRELAID Qualifications

HTG Storage:

Bosch Norm BV Y273 R80029

1000h at 140°C

Humidity climate: IPC TM 650

1000h bei 85°C and 85% RH

TWT:

– IPC 6012 B, 1000 Zyklen

– BV Y273 R80029

Corrosion: IPC612 B / TM 650

Testing for silver migration

Permanent shock: EN 60068 2-29

100000 Impulses (11ms) at max. 50G

Delamination: IPC 6012B

– Solder bath test 10s at 288°C

UL: Kategorie ZPMV2/8

– Full Recognition with MOT and CTI in work


References: WIRELAID Application Winderergy

Pitchadjustment

Previous: ML6

After: ML4 wire@2@3


References: WIRELAID Apllication Industry

AC Servo Amplifier

Permanent current charge 50 A

Maximum Temperature 80C°


Previous: 2 PCBs, 6 Layer 70µm

After: 1 Leiterplatte, ML6 Wire @1 + 3D

Benefit: Manufacturing, assembly, test, stock and loss of single modules and PCB connectors

Vehicle Components Endurance Test Bench


Previous: Combination of flat wire / connector PCB, 2 PCBs ML4

After: 1 PCB, ML4 Wire @1 + 3D

Benefits: Eliminating all manual operations, fully integrated PCB connection, more usable PCB space

References: WIRELAID Application automotive

Drive controll, charging electronics (picture is exemplary)


Previous: ML6 70µm/4x210µm/70µm

After (in development): ML6 Wire @2@3@4@5, each 70µm

Benefits: Reduction to 70µm Cu base on all layers, PCB with smaller dimensions, easy to manufacture

References: WIRELAID Application E-Bike

Perspective: Passive cooling


Measurement 2

with WIRELAID ML4 wire @1@4

Heating chip of Tu = 20 ° C to Tmax = 38 ° C,

at nominal power dissipation (16,5W / cm²)

Image after 15s operating

Note the significant heat spreading over the horizontal wires

and the lower temperature after the measuring time Tmax

Much improved situation, and NO hot spot spot

Measurement 1

without WIRELAID ML4

Heating chip of Tu = 20 ° C to Tmax = 55 ° C,

at nominal power dissipation (16,5W / cm²)?

15s image after operation

Perspective: Powerflex

Embedded wires through „Semiflex-Area“

Combination buckling and bending area

Signals and currents transported over buckling areas


We have now arrived at the end of the webinar.

You see, WIRELAID is an interesting tool in electronic

development and design. I hope you were able to gain

new knowledge or extend existing ones.


Thank you for your attention

bypasses for high currents wirelaid - partial high current ......corrosion: ipc612 b / tm 650...

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