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CE302 Micropocessors Lecture 3 Levent Eren Izmir University of Economics

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CE 3 0 2 Micropocessors Lecture 3. Levent Eren Izmir University of Economics. Outline. Memory Examples Logic instructions Shifting instructions Arithmetic operations Overflow and carries Important flags setting. - PowerPoint PPT Presentation

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Page 1: CE 3 0 2 Micropocessors Lecture  3

CE302Micropocessors

Lecture 3

Levent Eren

Izmir University of Economics

Page 2: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Outline

• Memory Examples• Logic instructions• Shifting instructions• Arithmetic operations• Overflow and carries• Important flags setting

Page 3: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Memory Access Example

myvar1 DW 01234h ; define word variable ; (value=1234h)

myvar2 DW 01234 ; define word variable ;(value=1234d = 4D2)

myvar3 DW ? ; define word variable ;(value uncertain)

myvar4 DW 01BCDh

ce302msg DB ‘CE302 is great'

start:

mov ax,cs ; set up data segment

mov ds,ax ; DS=CS

; any memory reference we make is assumed to reside in

;the DS segment

mov ax,myvar2 ; AX <- myvar2

; == mov ax,[offset myvar2]

; == mov ax,[2]

mov si,OFFSET myvar2 ; use SI as a pointer to myvar2 ; (equiv C code: SI=&myvar2 )

mov ax,[si] ; read memory at myvar2 (*(&myvar2))

; (indirect reference)

mov bx,OFFSET ce302msg ; BX is a pointer to a string

; (equiv C code: BX=&ce302msg)

dec BYTE PTR [bx+1] ; make that ‘E' a ‘D' !!!!

mov si, 1 ; Use SI as an index

inc ce302msg[SI] ; == inc [SI + offset ce302msg]

; == inc [SI + 8]

; == inc [9]

Page 4: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Memory Access Example (cont.)

;Memory can be addressed using four registers:

; SI -> Assumes DS

; DI -> Assumes DS

; BX -> Assumes DS

; BP -> Assumes SS !!! (this is why it isn't frequently used)

; Examples:

mov ax,[bx] ; ax <- word in memory pointed to by BX

mov al,[bx] ; al <- byte in memory pointed to by BX

mov ax,[si] ; ax <- word pointed to by SI

mov ah,[si] ; ah <- byte pointed to by SI

mov cx,[di] ; di <- word pointed to by DI

mov ax,[bp] ; AX <- SS:[BP] STACK OPERATION!!!!

; In addition, BX+SI and BX+DI are allowed:

mov ax,[bx+si]

mov ch,[bx+di]

; Furthermore, a fixed 8-bit or 16-bit displacement from the index and base registers is allowed.

mov ax,[23h] ; ax <- word in memory DS:0023

mov ah,[bx+5] ; ah <- byte in memory DS:(BX+5)

mov ax,[bx+si+107] ; ax <- word at DS:(BX+SI+107)

mov ax,[bx+di+47] ; ax <- word at DS:(BX+DI+47)

; REMEMBER: memory to memory moves are ILLEGAL!!!

mov [bx],[si] ;ILLEGAL

mov [di],[si] ;ILLEGAL (use movsw)

; Special case: stack operations!

pop myvar ; myvar <- SS:[SP]

Page 5: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Flag Register

8086, 8088, 80186

80286

80386, 80486DX

80486SX

AC (Alignment check)(VM) Virtual mode

(RF) Resume

(NT) Nested task(IOPL) Input/output

privilege level(O) Overflow(D) Direction

(I) Interrupt(T) Trace(S) Sign(Z) Zero

(A) Auxiliary Carry(P) Parity(C) Carry

Page 6: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Logic Instructions

• Logic instructions operate on a bit-by-bit basisNOT: A =~A AND: A &= BOR: A |= BXOR: A ^= B

• Except for NOT, these instructions affect the flags as follows:– clear the carry (C) – clear the overflow (O) – set the zero flag (Z) if the result is zero, or clear it otherwise– copy the high order bit of the result into the sign flag (S) – set the parity bit (P) according to the parity (number of 1s) in the result– scramble the auxiliary carry flag (A)

• The NOT instruction does not affect any flag

Page 7: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Logic Instructions (cont.)

• TEST (non-destructive AND) - logically ANDs two operands and sets the flags but does not save the result– typically one would use this instruction to see if a bit contains one

e.g., test al, 1

– sets the flags identically to the AND instruction

• AND and OR instructions are often used to mask out data– a mask value is used to force certain bits to zero or one within

some other value

– a mask typically affects certain bits and leaves other bits unaffected

• AND forces selected bits to zero AND cl, 0DFh

• OR forces selected bits to one OR cl, 0DFh

Page 8: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions

Page 9: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions (cont.)

• SHL/SAL (shift left/shift arithmetic left) – moves each bit of the operand one bit position to the left the

number of times specified by the count operand– zeros fill vacated positions at the L.O. bit; the H.O. bit shifts into the

carry flag– A quick way to multiply by two– Useful in packing data, e.g., consider two nibbles in AL and AH that

we want to combineSHL AH, 4 ;requires 80286 or laterOR AL, AH

NOTE: There are two forms of shifts 1) immediate shift count (8086, 8088 allow an immediate shift of 1 only, e.g., SHL AX, 1)2) CL register to hold the shift count (e.g., SHL AX, CL)

Page 10: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Example

;multiply AX by decimal 10 (1010) (Same as AX times 2+8 – associate prop)

SHL AX, 1 ;AX times 2

MOV BX, AX

SHL AX, 2 ;AX times 8

ADD AX, BX ;10 x AX

;multiply AX by 18 (10010)

SHL AX, 1 ;AX times 2

MOV BX, AX

SHL AX, 3 ;AX times 16

ADD AX, BX ;18 x AX

Page 11: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions (cont.)

• SHR (shift right) – shifts all the bits in the destination operand to the right one bit

– zeros fill vacated positions at the H.O. bit

– the L.O. bit shifts into the carry flag

• A quick way to divide by two (works for unsigned numbers)

• Useful for unpacking data, e.g., suppose you want to extract the two nibbles in the AL register, leaving the H.O. nibble in AH and the L.O. nibble in AL:

MOV AH, AL ;get a copy of the H.O. nibble

SHR AH, 4 ;move H.O. to L.O. and clear H.O.

AND AL, 0Fh ;remove H.O. nibble from AL

Page 12: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions (cont.)

• SAR (shift arithmetic right)– shifts all the bits in the destination operand to the right one bit

replicating the H.O. bit

– the L.O. bit shifts into the carry flag

– Main purpose is to perform a signed division by some power of two

MOV AX, -15

SAR AX, 1 ; Result is -8

• In 80286 and later you can use SAR to sign extend one register into another, e.g.,

MOV AH, AL

SAR AH, 8

If AL contains 11110001then AH will contain sign bits extension

11111111 11110001

Page 13: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions (cont.)

• RCL (rotate through carry left) – rotates bits to the left, through the carry flag – bit in the carry flag is written back into bit zero (on the right)

• ROL (rotate left) – rotates bits to the left – shifts operand’s H.O. bit into bit zero– e.g., extract bit 10 to 14 in AX and leave these bits in 0 to 4

ROL AX, 6

AND AX, 1Fh

NOTE: There are two forms of rotate

1) use of immediate rotate count (8086, 8088 allow an immediate rotate of 1 only, e.g., ROL AX, 1)2) use of register CL to hold the rotate count

Page 14: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting Instructions (cont.)

• RCR (rotate through carry right) – rotates bits to the right, through the carry flag

– bit in the carry flag is written back into H.O. bit (on the left)

• ROR (rotate right)– rotates bits to rights

– shifts operand’s L.O. bit into bit zero

Page 15: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Shifting OperationsExample

mov ax,3 ; Initial register values mov bx,5

or ax,9 ; ax <- ax | 00001001 (bitwise OR)

and ax,10101010b ; ax <- ax & 10101010 (bitwise AND) xor ax,0FFh ; ax <- ax ^ 11111111 (bitwise XOR) neg ax ; ax <- (-ax) (2's complement) not ax ; ax <- (~ax) (bitwise inversion)

shl ax,1 ; logical shift left by 1 bit shr ax,1 ; logical shift right by 1 bit rol ax,1 ; rotate left (LSB=MSB) ror ax,1 ; rotate right (MSB=LSB) mov cl,3 ; Use CL to shift 3 bits shr ax,cl ; Divide AX by 8 shl bx,cl ; Multiply BX by 8

Page 16: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Simple Arithmetic Instructions

• ADD (addition): A += B– Register addition, e.g., ADD AX, BX

– Immediate addition, e.g., ADD DL, 33h

– Memory to register addition, e.g., memory data added to AL:

MOV DI, OFFSET NUMB ;address NUMB

MOV AL, 0 ;clear sum

ADD AL, [DI] ;add NUMB

ADD AL, [DI + 1] ;add NUMB + 1

• NOTE: any ADD instruction modifies the contents of the sign, zero, carry, auxiliary carry, parity, and overflow flags

Page 17: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Simple Arithmetic Instructions (cont.)

• INC (increment addition): A++, e.g., memory data added to AL:MOV DI, OFFSET NUMB ;address NUMB

MOV AL, 0 ;clear sum

ADD AL, [DI] ;add NUMB

INC DI

ADD AL, [DI] ;add NUMB + 1

NOTE: The increment instructions do not affect the carry flag bit.

Page 18: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Simple Arithmetic Instructions (cont.)

• ADC (addition with carry) - functions as regular addition, except the bit in the carry flag (C) is also added to the result– used mainly to add numbers that are wider than 16 bits (8086 -

80286) or wider than 32 bits in the 80386, 80486)

• Example:– addition of two 32-bit numbers (BX:AX) + (DX:CX):

ADD AX, CX

ADC BX, DX

Page 19: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Simple Arithmetic Instructions (cont.)

• SUB (subtraction): A -= B– Register subtraction, e.g., SUB CL, BL

– Immediate subtraction, e.g.,

MOV CH, 22h

SUB CH, 44h

• NOTE: any SUB instruction modifies the contents of the sign, zero, carry, auxiliary carry, parity, and overflow flags

Result is -34 (1101 1110)Flags change:Z = 0 (result not zero)C = 1 (borrow)A = 1 (half-borrow)S = 1 (result negative)P = 1 (even parity) 0 = 0 (no overflow)

Page 20: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Simple Arithmetic Instructions (cont.)

• DEC (decrement subtraction): A--, subtracts a 1 from a register or the contents of a memory location e.g., DEC BHNOTE: The increment instructions do not affect the carry flag bit.

• SBB (subtract with borrow) functions as regular subtraction, except the carry flag (C), which holds the borrow, also subtracts from the difference– used mainly to subtract numbers that are wider than 16 bits (8086 -

80286) or wider than 32 bits in the 80386, 80486)

• Example:– subtraction of two 32-bit numbers (BX:AX) - (SI:DI):

SUB AX, DISBB BX, SI

Page 21: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Overflow and Carries

• Carry – indicates a carry after addition or a borrow after subtraction

– CF: carry flag (unsigned) {1 = CY (there is carry); 0 = NC (no carry)}– e.g., 36,864 (9000h) + 36,864 (9000h) = 73,728 (12000h) > 65,535 (FFFFh) {OV, CY}– carry is set when unsigned goes out of range (denotes an unsigned arithmetic overflow)

• Overflow – condition that occurs when signed numbers are added or subtracted

– OF: overflow flag (signed) {1 = OV, 0 = NV}– e.g., 20,480 (5000h) + 20,480 (5000h) = 40,960 (A000h) > 32,767 (7FFFh) {OV, NC}– overflow is set when signed goes out of range (denotes a signed arithmetic overflow)– Example: FFFFh + FFFFh = FFFEh {(-1) + (-1)} = -2; NV, CY

Page 22: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Overflows & Carries Example

MOV AX, 19

ADD AX, 7 ; AX <- AX + 7 = 26

NEG AX ; AX <- -AX = -26 = 0FFE6h

MOV AX,0FFFEh ; 65534 ; Unsigned

ADD AX,3 ;

MOV AX,0FFFEh ; -2 ; Signed

ADD AX,3 ;

; CPU sets flags for both cases (signed and unsigned)

MOV BX,6

SUB BX,7

INC BX

Page 23: CE 3 0 2 Micropocessors Lecture  3

Levent Eren CE302

Flag Settings

FLAG Name Description Notes

ZF Zero 1:ZR:Zero1 indicates that the result was zero0:NZ: Non-zero

CF Carry 1:CY Unsigned Math and shifting0:NC Needed a carry or borrow

OF Overflow 1:OV Signed Math0:NV Also (+) or (-) to be represented as

a valid two’s complement number

SF Sign Flag 1:NG: - MSB of result0:PL: +