channel coding - convolutional codes

7/30/2019 Channel Coding - Convolutional Codes

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Convolutional Codes


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Last time, we talked about:

Channel coding

Linear block codes

The error detection and correction capability Encoding and decoding

Hamming codes

Cyclic codes


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Today, we are going to talk about:

Another class of linear codes, known asConvolutional codes.

We study the structure of the encoder.

We study different ways for representing

the encoder.


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Convolutional codes

Convolutional codes offer an approach to error controlcoding substantially different from that of block codes.

A convolutional encoder:

encodes the entire data stream, into a single codeword.

does not need to segment the data stream into blocks of fixed

size (Convolutional codes are often forced to block structure by periodictruncation).

is a machine with memory.

This fundamental difference in approach imparts a

different nature to the design and evaluation of the code. Block codes are based on algebraic/combinatorial

techniques.

Convolutional codes are based on construction techniques.


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Convolutional codes-contd

A Convolutional code is specified bythree parameters orwhere is the coding rate, determining the

number of data bits per coded bit. In practice, usually k=1 is chosen and we

assume that from now on.

Kis the constraint length of the encoder a

where the encoder hasK-1

memoryelements. There is different definitions in literatures for

constraint length.

),,( Kkn ),/( Knk

nkRc

/


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Block diagram of the DCS

Information

source

Rate 1/n

Conv. encoderModulator

Information

sink

Rate 1/n

Conv. decoderDemodulator

sequenceInput

21 ,...),...,,( immmm

bits)coded(rdBranch wo

1

sequenceCodeword

321

,...),...,,,(

n

nijiii

i

,...,u,...,uuU

UUUU

G(m)U

,...),...,,( 21 immmm

dBranch worperoutputs

1

dBranch worfor

outputsrDemodulato

sequencereceived

321

,...),...,,,(

n

nijii

i

i

i

,...,z,...,zzZ

ZZZZ

Z

Channel


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A Convolutional encoder


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Convolutional Encoder Representation

To describe a convolutional code, one need tocharacterize the encoding function G(m), sothat given input sequence m, one can readilycompute the output sequence U.

Several methods are used for representing aconvolutional encoder, the most popular:

Connection pictorial

Connection vector or polynomial

State diagram

Tree diagram

Trellis diagram


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A Rate Convolutional encoder

Convolutional encoder (rate , K=3) 3 shift-registers where the first one takes the

incoming data bit and the rest, form the memoryof the encoder.

Input data bits Output coded bitsm

1u

2u

First coded bit

Second coded bit

21

,uu

(Branch word)

Figure 7.3


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1 0 01t

1u

2u

11

21uu

0 1 02t

1u

2u

01

21uu

1 0 13t

1u

2u

00

21

uu

0 1 04t

1u

2u

01

21

uu

)101(m

Time Output OutputTime

Message sequence:

(Branch word) (Branch word)


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Encoder)101(m )1110001011(U

0 0 15t

1u

2u

11

21uu

0 0 06t

1u

2u

00

21uu

Time Output Time Output(Branch word) (Branch word)


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Effective code rate

Initialize the memory before encoding the first bit (all-

zero) Clear out the memory after encoding the last bit (all-

zero)

Hence, a tail of zero-bits is appended to data bits.

Effective code rate :

L is the number of data bits and k=1 is assumed:

data Encoder codewordtail

ceff RKLn

LR

)1(


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Encoder Representation

Vector representation: We define n binary vector withKelements (one

vector for each modulo-2 adder). The i:th elementin each vector, is 1 if the i:th stage in the shiftregister is connected to the corresponding modulo-

2 adder, and 0 otherwise. Example:

m

1u

2u

21uu

)101(

)111(

2

1

g

g


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Encoder representationcontd

Impulse response representaiton: The response of encoder to a single one bit that

goes through it.

Example:

11001

01010

11100

111011:sequenceOutput

001:sequenceInput

21

uu

Branch wordRegister

contents

1110001011

1110111

0000000

1110111

OutputInput m

Modulo-2 sum:


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Polynomial representation: We define n generator polynomials, one for each

modulo-2 adder. Each polynomial is of degreeK-1 orless and describes the connection of the shift

registers to the corresponding modulo-2 adder. Example:

The output sequence is found as follows:

22)2(

2

)2(

1

)2(

02

22)1(

2

)1(

1

)1(

01

1..)(

1..)(

XXgXggX

XXXgXggX

g

g

)()(withinterlaced)()()( 21 XXXXX gmgmU


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In more details:

1110001011

)1,1()0,1()0,0()0,1()1,1()(

.0.0.01)()(.01)()(

1)1)(1()()(

1)1)(1()()(

432

432

2

432

1

422

2

4322

1

U

U

gmgm

gm

gm

XXXXX

XXXXXX

XXXXXX

XXXXX

XXXXXXXX


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State diagram

A finite-state machine only encounters afinite number of states.

State of a machine: the smallest amountof information that, together with a

current input to the machine, can predictthe output of the machine.

In a Convolutional encoder, the state isrepresented by the content of thememory.

Hence, there are states.12 K


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State diagramcontd

A state diagram is a way to represent the

encoder.

A state diagram contains all the states and allpossible transitions between them.

Only two transitions initiating from a state. Only two transitions ending up in a state.

The encoder state is said to be Markov, in the

sense that the probability P(Xi+1|Xi,Xi-1,,X0) ofbeing in the state Xi+1, give all previous states,depends only on the most recent state Xi; thatis, the probability is equal to P(Xi+1|Xi).


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State diagramcontd

10 01

00

11

Currentstate

input Nextstate

output

00

0 00

1 11

01

0 11

1 00

100 101 01

11

0 01

1 10

0S

1S

2S

3S

0S

2

S

0S

2S

1

S

3S

3S

1S

0S

1S2S

3S

1/11

1/00

1/01

1/10

0/11

0/00

0/01

0/10

Input

Output

(Branch word)


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State diagramcontd


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State diagramcontd


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State diagramcontd


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Trellis

Trellis diagram is an extension of the state

diagram that shows the passage of time. Example of a section of trellis for the rate code

Timeit 1it

State

000 S

011

S

102 S

113 S

0/00

1/10

0/11

0/10

0/01

1/11

1/01

1/00


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Trelliscontd

A trellis diagram for the example code

0/11

0/10

0/01

1/11

1/01

1/00

0/00

0/11

0/10

0/01

1/11

1/01

1/00

0/00

0/11

0/10

0/01

1/11

1/01

1/00

0/00

0/11

0/10

0/01

1/11

1/01

1/00

0/00

0/11

0/10

0/01

1/11

1/01

1/00

0/00

6t

1t

2t

3t

4t 5t

1 0 1 0 0

11 10 00 10 11

Input bits

Output bits

Tail bits


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Trelliscontd

1/11

0/00

0/10

1/11

1/01

0/00

0/11

0/10

0/01

1/11

1/01

1/00

0/00

0/11

0/10

0/01

0/00

0/11

0/00

6t

1t

2t

3t

4t 5t

1 0 1 0 0

11 10 00 10 11

Input bits

Output bits

Tail bits

channel coding - convolutional codes

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