chap 3. p-n junctionweng/courses/ic_2007... · 2020. 4. 23. · uso for p+/n diode, ufor n+/p...
TRANSCRIPT
![Page 1: Chap 3. P-N junctionweng/courses/IC_2007... · 2020. 4. 23. · uSo for p+/n diode, uFor n+/p diode, uAs a general rule, this suggests that the heavily doped side of an asymmetrical](https://reader036.vdocument.in/reader036/viewer/2022071418/611632b87034b70c55109649/html5/thumbnails/1.jpg)
MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
1
Chap 3. P-N junction
u P-N junction Formationu Step PN Junctionu Fermi Level Alignmentu Built-in E-field (cut-in voltage)u Linearly Graded PN Junctionu I-V Characteristicsu Breakdown
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
2
Basic Symbol and Structure of the pn Junction Diode
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
3
Charge Distribution across PN junction
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
4
Step Junction
ND - NA
Actual Linearly Graded Profile
x
ND
-NA
Ideal step junction
CathodeAnode
Metal contactp-type Si, NA n-type Si, ND
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
![Page 5: Chap 3. P-N junctionweng/courses/IC_2007... · 2020. 4. 23. · uSo for p+/n diode, uFor n+/p diode, uAs a general rule, this suggests that the heavily doped side of an asymmetrical](https://reader036.vdocument.in/reader036/viewer/2022071418/611632b87034b70c55109649/html5/thumbnails/5.jpg)
MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
5
Step P-N junction—Band Diagram
EC
EV
EFEFi
EC
EV
EF
EFi
P-Semiconductor N-Semiconductor
EC
EV
EF
EFi
EFi
EC
EV
EF
Band Diagram
Fermi-level alignmentEC
EV
EFEFi
EC
EV
EF
EFi
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
6
Step Junction
u Recall Poisson’s Equation:
u For 1-D, E = Ex
dE/dx = ρ/ksεo
where ρ = q (p – n + ND – NA)
u For a pn junction, electrons and holes will diffuse through the junction, which would result in net ρ in the space charge region.
oSk
Eε
ρ=•∇
constant dielectric :
density charge :
Skρ
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
7
P-N Junction
CathodeAnode
Metal contactp-type Si, NA
n-type Si, ND
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
+
–
⊕⊕⊕⊕⊕
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
⊕–⊕–⊕–⊕–⊕–
Depletionregion Ionized dopants
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
8
Charge Distribution in PN Junction
u Net ρ results in the depletion region (or space charge region)
u ρ = -qNA -xp ≤ x ≤ 0qND 0 ≤ x ≤ xp
xn
ρ
x+
–
-xp
{oSoS k
qkdx
dEεε
ρ==Q
nD
pA
xxNxxN
≤≤
≤≤−−
0
0
( ) ( ) ( ) ( )
( ) ( )
( ) ( ) ( ) ( ) nDpApnnDoS
DoS
nDoS
AoS
nn
x
xoS
xNxNxExExxNk
qxNk
qxE
xxNk
qxNk
qxE
dxdVxExEx
kxE
n
=⇒==⇒>−=
<−−=⇒
==+=⇒ ∫
0,00 if
0 if
0,0 ,1
εε
εε
ρε
Q
Charge neutrality
![Page 9: Chap 3. P-N junctionweng/courses/IC_2007... · 2020. 4. 23. · uSo for p+/n diode, uFor n+/p diode, uAs a general rule, this suggests that the heavily doped side of an asymmetrical](https://reader036.vdocument.in/reader036/viewer/2022071418/611632b87034b70c55109649/html5/thumbnails/9.jpg)
MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
9
Open-Circuit Condition of a pn Junction Diode
Potentialhill
0 Barriervoltage
p-type Si n-type Si
Depletionregion
CathodeAnode
Metal contact
Charge distribution of barrier voltage
across a pn Junction.
( )22
2 nDpAoS
bi xNxNk
qV +−
=ε
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
10
Width of Space Charge Region
u Recall xnND = xpNA,
u W is dependent on the built-in voltage Vbi.
( )
( )
( )
2/1
2/1
2/1
2
2
2
+
=+=⇒
+
=
+
=⇒
biDA
DAospn
biDAD
Dosp
biDAD
Aosn
VNN
NNq
kxxW
VNNN
Nq
kx
VNNN
Nq
kx
ε
ε
ε
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
11
Reverse-Biased PN Junction Diode
p n
3 V Lamp
Open-circuit condition(high resistance)
Vbi → Vbi + VA
W ↑ ↑
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
12
Forward-Biased PN Junction Diode
p n
3 V
Hole flow Electron flow
Lamp
Vbi → Vbi - VA
W ↓ ↓
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
13
Bias Effect on the PN Junction
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
14
Bias Effect on the PN Junction Band Diagrams
u Fig. 5.12
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
15
Linearly Graded PN Junction
u Assume the linearly graded profile is ND – NA = ax, a: grading const.
( )3
1
12
−=⇒ Abi
oS VVqakW ε
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
16
Continuity Equations
u There will be a change in carrier concentrations within a given small regions of the semiconductor if an imbalance exists between the total currents into and out of the region.
u Minority Carrier Diffusion Equation
P
N
Jtpq
Jtnq
•−∇=∂∂
•∇=∂∂
( )
( )
( )2
2
2
2
2
2
2
2
2
2
2
2
xpqD
xpqD
tpq
xnqD
xnqD
tnq
xnqD
xnqD
xnqDJ
NP
NP
N
PN
PN
P
NNNN
∂∆∂
=∂
∂=
∂∂
∂∆∂
=∂
∂=
∂∂
⇒
∂∆∂
=∂∂
=
∂∂
•∇=•∇
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
17
Continuity Equations
u If thermal R-G is considered, continuity equations would be modified
u ⇒Minority carrier Diffusion equations become
const. time: , 1
1
G-Rthermal
G-Rthermal
G-Rthermal
nn
P
N
ntn
tpJ
qtp
tnJ
qtn
ττ∆
−=∂∂
∂∂
+•∇−
=∂∂
∂∂
+•∇=∂∂
( )
( )p
nNP
N
n
PPN
P
pxpD
tp
nx
nDt
n
τ
τ
∆−
∂∆∂
=∂
∂
∆−
∂∆∂
=∂
∂
2
2
2
2
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
18
Diffusion Length
uThe average distance minority carriers can diffuse into a sea of majority carriers before being annihilated.
material type-p ain electronscarrier minority
material type-nan in holescarrier minority
---
---
nNN
pPP
DL
DL
τ
τ
≡
≡
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
19
Quasi-Fermi levels
uAre energy levels used to specify the carrier concentrations inside a semiconductor under nonequilibrium conditions.
( )
( )cases riumnonequilibunder holesfor level fermi-quasi
cases riumnonequilibunder electronsfor level fermi-quasi
: lnor
: lnor
−≡≡
+≡≡
−
−
iiPi
iiNi
npkTEFenp
nnkTEFenn
kTPFEiE
kTiENFE
Under equilibrium
ECEFEi
EV
ECFNEi
EV
FP
Under non-equilibrium
![Page 20: Chap 3. P-N junctionweng/courses/IC_2007... · 2020. 4. 23. · uSo for p+/n diode, uFor n+/p diode, uAs a general rule, this suggests that the heavily doped side of an asymmetrical](https://reader036.vdocument.in/reader036/viewer/2022071418/611632b87034b70c55109649/html5/thumbnails/20.jpg)
MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
20
PN Diodes: I-V Characteristics
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
21
Forward and Reverse Electrical Characteristics of a Silicon Diode
120 100 80 60 40 20
.4 .8 1.2 1.6
+ I
- V + V
- I
Breakdownvoltage
Leakagecurrent
Reverse bias curve
Forward bias curve
Junction voltage
( )
torssemiconduc on the depending
magnitude of ordersmany by can vary which
current, saturation: ,1
oo IeII refVAV −
=
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
22
Composite energy-band/circuit diagram of a reverse-biased pn diode
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
23
I-V Characteristics
u From deviation:
u So for p+/n diode,
u For n+/p diode,
u As a general rule, this suggests that the heavily doped side of an asymmetrical junction can be ignored in determining the electrical characteristics of the junction.
+=
D
i
P
P
A
i
N
No N
nLD
Nn
LDqAI
22
D
i
P
PoDA N
nLDqAINN
2
≅⇒>>
A
i
N
NoAD N
nLDqAINN
2
≅⇒>>
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
24
Derivation of I-V Characteristics
( ) ( )
dxdpqDpEqJ
dxdnqDnEqJ
xJxJJ
PpP
NnN
PN
−=
+=
+=
µ
µ
p-type Si n-type Si
Depletionregion
Quasi-neutral p region
E ~ 0
Quasi-neutral n region
E ~ 0
E≠0
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
25
Derivation of I-V Characteristics
u In quasi-neutral regions, E = 0, so consider diffusion and thermal R-G currents only.
u In Depletion Region:
0,
0 ,
2
2
2
2
for
for
=∆
−∆
=∂∂
≥∆
−=
=∆
−∆
=∂∂
−≤∆
=
n
nnPn
nPP
n
ppNp
pNN
pdx
pdDtpxx
dxpdqDJ
ndx
ndD
tnxx
dxnd
qDJ
τ
τ
( )
( )PN
nPP
pNNN
n
pN
JJJxJJ
xJJdx
dJnJ
qtn
+===
−==⇒=⇒∆
+•∇=∂∂
=
const. ,similarily
const.010thermal
τ
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
26
Boundary conditions and quasi fermi level inside a forward-biased diode
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
27
Carrier Concentration inside a pn diode under forward and reverse biasing.
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
28
Experimental I-V Characteristics
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
29
Reverse-Bias Breakdown
u Large reverse current flows when the reverse voltage exceeds a certain value, VBR. The current must be limited to avoid excessive “heating”.
u Practical VBR measurements typically quote the voltage where the reverse current exceeds 1 µA.
u Factors to affect VBR:– 1. Bandgap of the
semiconductor.– 2. doping on the lightly doped
side of the pn junction, NB.
u Breakdown Mechanism:– Avalanche process– Zener process
75.0
1
BBR N
V ∝
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
30
Avalanching
•As VA << VBR, the reverse current is due to minority carriers randomly entering the depletion region and being accelerated by the E-field.
•The acceleration is not continuous but is interrupted by energy-losing collisions with the semiconductor lattice.
•Since the mean free path between the collisions is ~10-6 cm, and a median depletion width is ~10-4 cm, a carrier can undergo 10-1000 collisions in crossing the depletion region.
•The energy lost by the carrier per collision is small.
•The energy transferred to the lattice simply causes lattice vibration --- local heating.
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
31
Avalanching
u As VA → VBR, the amount of energy transfer to the lattice per collision increases dramatically, and becomes sufficient to ionize a semiconductor atom. That is to causes an electron from the valence band to jump to conduction band. ⇒“impact ionization”
u The electrons created by impact ioization are immediately accelerated by the large E-field in the depletion region, and consequently, they make additional collisions and create even more energetic electrons. ⇒“Avalanching”
Impact ionization
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
32
Zener Process
u The occurrence of “tunneling” in a reverse-biased diode.
u Two major requirements for tunneling to occur and be significant:
– There must be filled states on one side of the barrier and empty states on the other side of the barrier at the same energy.
– The width of the potential energy barrier must be very thin (< 10 nm).
– That is the doping on the “lightly”doped Si is in excess of 1017 cm-3.
– Zener process is only important in diodes that are heavily doped on both sides.
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
33
R-G Current
u When diode is reverse biased, the carrier concentrations in the depletion region are reduced below their equilibrium values, leading to the thermal generation of electrons and holes throughout the region.
u The large E-field in the depletion region rapidly sweeps the generated carriers onto the quasi-neutral regions, thereby adding to the reverse current.
Reverse-biased generation
Forward-biased recombination
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
34
Hetero-Junction
EC
EV
EF
EFi
Semiconductor AEC
EV
EFEFi
Semiconductor B
EV
EC∆EC < 20 meV
bulk Si
Eg = 1.17 eV
Strained Si0.8Ge0.2
Eg ~ 1.0 eV
∆EV ~ 0.15 eV
∆EC ~0.15 eV
∆EV ~ 0.05 eV
Relaxed Si0.7Ge0.3
Eg ~ 1.08 eVStrained Si
Eg ~ 0.88 eV
Type I Alignment Type II Alignment
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MOS Device Physics and Designs Chap. 3
Instructor: Pei-Wen LiDept. of E. E. NCU
35
Quantum Well
Hole Confinement
∆EC ~ 0.02 eV
relaxed Si0.7Ge0.3
Eg = 1.08 eV
Strained Si0.3Ge0.7
Eg ~ 0.72 eV
∆EV ~ 0.48 eV
Strained Si
Eg = 0.88 eV
∆EC ~0.18 eV
∆EV ~0.34 eV
Electron Confinement