chapter 1 introduction to digital techniques · 2017. 5. 25. · figure 1.4: negative logic 1.1.3...

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Chapter 1

Introduction to Digital Techniques

Hours

16 Marks

1.1 Basics of Digital Techniques

Modern digital computers, mobile communication systems, Internet etc.

have become part and parcel of society nowadays. This has become possible

basically due to Integrated Circuits (ICs). The operation of computers,

communications systems etc. is based on digital techniques.

1.1.1 Digital Signal and Digital Systems The signals which are continuous and can have any value in a limited

range are called analog signals. A sample analog signal is shown in figure 1.1.

Figure 1.1: Sample analog signal

Electronic circuits used for processing analog signals are called as analog

circuits and the systems build for this kind of operation are called as analog

systems. One of the examples of analog system is electronic amplifier.

On the other hand, the signals which are discrete and can have only two

discrete levels or values are called digital signals. A sample digital signal is

shown in figure 1.2.

Figure 1.2: Sample digital signal

The two levels in a digital signal can be represented using the terms

HIGH and LOW. HIGH level can also be represented as ON or value ‘1’.

Similarly, LOW level can be represented as OFF or value ‘0’.

Electronic circuits used for processing digital signals are called as digital

circuits and the systems build for this kind of operation are called as digital

systems. One of the examples of digital system is electronic calculator.

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1.1.2 Positive and Negative Logic In digital systems there are two states – one for representing value ‘1’ and

other for representing value ‘0’ (as a binary variable can have value either 0 or

1). These states are represented by two different voltage levels (or sometimes

current levels).

If logic state ‘1’ is represented by a higher voltage level (or current level)

and logic state ‘0’ is represented by a lower voltage level (or current level), it is

called as positive logic system. E.g. If 0V and +5V are the two voltage levels

and +5V is used for representing ‘1’ and 0V is used for representing ‘0’, this is a

positive logic system.

5 V

HIGH

3.5 V

LOW

1 V

0 V

Figure 1.3: Positive Logic

If logic state ‘0’ is represented by a higher voltage level (or current level)

and logic state ‘1’ is represented by a lower voltage level (or current level), it is

called as negative logic system. E.g. If 0V and +5V are the two voltage levels

and +5V is used for representing ‘0’ and 0V is used for representing ‘1’, this is a

negative logic system.

LOW

5 V

3.5 V

1 V

HIGH

0 V

Figure 1.4: Negative Logic

1.1.3 Advantages of Digital Systems - In digital systems devices generally operate in one of the two states only

i.e. ON and OFF. It results in simple operations.

- There are only few basic operations those can be learnt easily.

- Large number of ICs is available.

- Effect of fluctuations and noise is less.

- Digital systems have capability of memory.

- Digital systems can be easily controlled through computer software.

- They are less expensive.

- They are more reliable.

- They are easy to design.

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- They have higher accuracy.

1.1.4 Disadvantages of Digital Systems - Even if digital system has so many advantages, real world is analog. All

the real world signals (like velocity, acceleration, temperature, light,

sound, electric and magnetic field etc.) are analog.

- The real world analog signals need to be digitized.

- If a single piece of digital data is missed, large block of data may change

completely.

- Digital communication requires more bandwidth than analog

communication.

- Digital systems are prone to sampling errors.

1.1.5 Applications of Digital Systems - Digital Audio

- Digital Photography

- Audio and speech processing

- Image processing

- Biomedical signal processing

- Archaeology

- Cell phones

- Fingerprint Processing

- Face detection

- Rolling display

- Industrial automation

1.2 Logic Families

For producing different types of digital integrated circuits (ICs) different

circuit configurations or approaches are used. Each such fundamental approach

is called logic family. Different logic functions may be fabricated in the form of

IC with same approach. i.e. Same logic family may have different logic

functions. All the ICs in same logic family have same characteristics. That’s why

digital ICs belonging to same logic family are compatible with each other.

1.2.1 Characteristics of logic families

(or Characteristics of digital ICs) There is variety of logic families. Selection of a logic family for an

application depends on its characteristics. For a real-time application immediate

response is required. In such application logic family with high speed of

operation should be selected.

Important characteristics of logic families are,

- Speed of operation

- Power dissipation

- Figure of merit

- Current and voltage parameters

- Fan-out

- Fan-in

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- Noise immunity

- Power supply requirements

- Operating temperature

1.2.1.1 Speed of operation

It is desirable that a digital IC should have high speed of operation. Speed

of operation of a circuit is specified in terms of propagation delay time (i.e. lesser

the propagation delay time → higher the speed of operation).

There are two delay times.

𝑡𝑝𝐻𝐿→ Delay time when output goes from HIGH state to LOW state

𝑡𝑝𝐿𝐻→ Delay time when output goes from LOW state to HIGH state

Propagation delay time is computed as the average of these two delay

times as,

𝑡𝑝 =𝑡𝑝𝐻𝐿 + 𝑡𝑝𝐿𝐻

2

The two delay times are computed by finding the time difference 50%

voltage levels of input and output waveforms as shown in figure 1.5.

Figure 1.5: Computation of tpLH and tpHL

The propagation delay between input and output must be as low as

possible.

1.2.1.2 Power Dissipation

For operation of every electronic circuit, certain amount of electric power

is required. Out of supplied power, some power gets dissipated in electronic

circuits. This is due to wastage of power across electronic components. i.e.

Power dissipation is nothing but wastage of power across electronic

components or devices within a circuit. Power dissipation of a circuit is

expressed in terms of milliwatt (mW).

If power dissipation for a circuit is less, the circuit requires less power to

be supplied to it. So, power dissipation should be as less as possible

1.2.1.3 Figure of Merit

It is always desirable for an electronic circuit to have less power

dissipation (for reducing power requirements). But when power dissipation is

reduced in an electronic circuit, its speed of operation also gets reduced (In other

words, propagation delay gets increased).

As per above discussion, there is a trade-off between power dissipation

and speed of operation (which is denoted in terms of propagation delay). So,

instead of the two parameters speed of operation and power dissipation, a single

parameter called figure of merit is used for comparison of logic families. Figure

of merit is a product of propagation delay and power dissipation.

𝐹𝑖𝑔𝑢𝑟𝑒𝑜𝑓𝑚𝑒𝑟𝑖𝑡 = 𝑝𝑟𝑜𝑝𝑎𝑔𝑎𝑡𝑖𝑜𝑛𝑑𝑒𝑙𝑎𝑦 × 𝑝𝑜𝑤𝑒𝑟𝑑𝑖𝑠𝑠𝑖𝑝𝑎𝑡𝑖𝑜𝑛

Figure of merit is measured in terms of Pico-Joules (𝑛𝑠 ×𝑚𝑊 = 𝑝𝐽)

1.2.1.4 Current and Voltage Parameters

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These parameters define minimum and maximum limits of current and

voltage for input and output of a logic family.

VIH (HIGH level Input Voltage) : It is the minimum input voltage

corresponding to logic ‘1’ state.

VIL (LOW level Input Voltage) : It is the maximum input voltage


VOH (HIGH level Output Voltage) : It is the minimum output voltage


VOL (LOW level Output Voltage) : It is the maximum output voltage


IIH (HIGH level Input Current) : It is the minimum input current


IIL (LOW level Input Current) : It is the maximum input current


IOH (HIGH level Output Current) : It is the minimum output current


This current is also called as

source current.

IOL (LOW level Output Current) : It is the maximum output current


This current is also called as sink

current.

Figure 1.6: A gate driving N gates

1.2.1.5 Fan–out

Generally, output of one logic gate feeds input to several other gates.

Practically, it is not possible to drive unlimited number of logic gates from

output of a single logic gate.

Fan–out is the maximum number of similar gates that can be driven by a

logic gate. As shown in figure 1.6, if the driver gate is capable of driving at the

most N gates, fan–out of the driver gate is N.

If we try to drive more than N gates, current supply required to drive the

gates may become lesser than the minimum requirement (in case of HIGH

state) or current sink by the driver gate may become greater than its sink

capacity (in case of LOW state).

Fan–out can be computed as minimum of the ratios 𝐼𝑂𝐻

𝐼𝐼𝐻 and

𝐼𝑂𝐿

𝐼𝐼𝐿as,

𝐹𝑎𝑛 − 𝑜𝑢𝑡 = 𝑚𝑖𝑛 {𝐼𝑂𝐻𝐼𝐼𝐻

,𝐼𝑂𝐿𝐼𝐼𝐿

}

1.2.1.6 Fan–in

Fan–in is the number of inputs to a gate. For a two-input gate, fan–in is 2

and for a 3-input gate, fan–in is 3 and so on.

1.2.1.7 Noise Immunity

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Unwanted signal is called as noise. Stray electric or magnetic fields may

induce noise in the input to the digital circuits. Due to noise, input voltage may

drop below VIH or may rise above VIL. Both the circumstances will result in

undesired operations of the digital circuit.

Every circuit should have ability to tolerate the noise signal. This ability

of tolerating noise signal is called as noise immunity. Measure of noise

immunity is called as noise margin. The noise margin at logic ‘1’ state and

logic ‘0’ state are computed as,

Logic ‘1’ state noise margin: ∆1 = 𝑉𝑂𝐻 − 𝑉𝐼𝐻

Logic ‘0’ state noise margin: ∆0 = 𝑉𝑂𝐿 − 𝑉𝐼𝐿

1.2.1.8 Power Supply Requirements

Every electronic circuit requires certain supply voltage to operate. The

required supply voltage and power should be as less as possible.

1.2.1.9 Operating Temperature

Operating temperature is range of temperature in which an IC functions

properly. An IC is selected for a specific application depending on its operating

temperature. Generally the range of operating temperature is within −550𝐶 to

+1250𝐶.

1.2.2 Classification of Logic Families Entire range of digital ICs is fabricated using either bipolar devices or

MOS devices or a combination of the two.

Different logic families falling in the first category are called bipolar

families. These families include diode logic (DL), resistor–transistor logic (RTL),

diode–transistor logic (DTL), transistor–transistor logic (TTL), emitter–coupled

logic (ECL), also known as current mode logic (CML), and integrated injection

logic (I2L).

The logic families that use MOS devices are known as MOS families.

These families include PMOS family (using P-channel MOSFETs), the NMOS

family (using N-channel MOSFETs) and the CMOS family (using both N- and P-

channel devices).

The Bi-MOS logic family uses both bipolar and MOS devices.

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Figure 1.7: Classification of Logic Families

Logic families that are currently in widespread use include TTL, CMOS,

ECL, NMOS and Bi-CMOS.

1.2.2.1 Transistor–Transistor Logic (TTL) Family

Transistor is the basic element of this logic family. Transistor operates in

either cut-off region or saturation region. TTL Family has number of subfamilies

including standard TTL, low-power TTL, high-power TTL, low-power Schottky

TTL, Schottky TTL, advanced low-power Schottky TTL, fast TTL etc. The ICs

belonging to TTL family are designated as,

74 or 54 : Standard TTL

74L or 54L : Low-power TTL

74H or 54H : High-power TTL

74LS or 54LS : Low-power Schottky TTL

74S or 54S : Schottky TTL

74ALS or 54ALS : Advanced Low-power Schottky TTL

74F or 54F : Fast TTL

Characteristic parameters and features of the standard TTL family of

devices include the following:

VIL=0.8 V

VIH=2 V

IIH=40 µA

IIL=1.6 mA

VOH=2.4 V

VOL=0.4 V

IOH=400 µA

IOL=16 mA

Logic Families

Bipolar Families

Diode Logic (DL)Resistor

Transistor Logic (RTL)

Diode Transistor Logic (DTL)

Transistor Transistor Logic (TTL)

Emitter Coupled Logic

(ECL)

Integrated Injection Logic

(I2L)

MOS Families

PMOS Family NMOS Family

CMOS Family

Bi-MOS Logic Family

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propagation delay

= 22ns (max.) for LOW-to-HIGH transition at the output

= 15ns (max.) for HIGH- to-LOW output transition

worst-case noise margin=0.4V

fan-out=10

operating temperature range

=0°C to 70°C (74- series)

=−55°C to +125°C (54-series)

speed–power product=100pJ

1.2.2.2 Emitter–Coupled Logic (ECL) Family

Currently, popular sub-families of ECL include MECL-III (also called the

MC 1600 series), the MECL-10K series, the MECL-10H series and the MECL-

10E series.

Characteristic parameters and features of the MECL-III family of devices

include the following:

gate propagation delay=1ns

output edge speed =1ns

(indicative of the rise and fall time of output transition)

power dissipation per gate=50mW

speed–power product=60pJ

input voltage=0–VEE (VEE is the negative supply voltage)

negative power supply range (for VCC=0)=−5.1V to −5.3 V

continuous output source current (max.)=40mA

surge output source current (max.) = 80mA

operating temperature range=−30°C to +85°C.

1.2.2.3 Complementary Metal Oxide Semiconductor (CMOS) Family

This logic family uses both P-channel and N-channel MOSFETs. Popular

CMOS sub-families include 4000A, 4000B, 4000UB, 54/74C, 54/74HC,

54/74/HCT, 54/74AC and 54/74ACT families (The 54/74 sub-families are pin-

compatible with 54/74 TTL series logic functions).

Characteristic features of 4000B and 4000UB CMOS devices are as

follows:

VIH (buffered devices)

=3.5V (for VDD=5V)

=7.0 V (for VDD =10 V)

=11.0V (for VDD =15V)

VIH (unbuffered devices)

=4.0V (for VDD = 5V)

=8.0 V (for VDD =10V)

=12.5V (for VDD =15V)

IIH=1.0µA

IIL=1.0µA

IOH =0.2mA (for VDD =5V)

=0.5mA (for VDD =10V)


IOL =0.52mA (for VDD =5V)

=1.3mA (for VDD = 10V)


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VIL (buffered devices) =1.5V (for VDD =5V)

=3.0V (for VDD = 10V)

=4.0V (for VDD = 15V)

VIL (unbuffered devices) =1.0V (for VDD =5V)

=2.0V (for VDD = 10V)

=2.5V (for VDD =15V)

VOH =4.95V (for VDD =5V)

=9.95V (for VDD =10V)

=14.95V (for VDD =15V)

VOL=0.05V

VDD =3– 15V

propagation delay (buffered devices) =150ns (for VDD =5V)

=65ns (for VDD =10V)


propagation delay (unbuffered devices) =60ns (for VDD =5V)



noise margin (buffered devices) =1.0V (for VDD =5V)

=2.0V (for VDD =10V)

=2.5V (for VDD = 15V)

noise margin (unbuffered devices) =0.5V (for VDD =5V)

=1.0V(for VDD =10V)

=1.5V(for VDD =15V)

Output transition time (for VDD =5Vand CL=50pF)

=100ns (buffered devices)

=50–100ns (for unbuffered devices)

power dissipation per gate (for f =100kHz)=0.1mW

speed–power product (for f =100kHz)=5pJ

1.3 Number System

Number system is one of the most important and basic topic in digital

electronics. It is important to understand a number system as it helps in

understanding how data is represented before processing it in digital system.

Important characteristics of number systems are:

- Independent digits used (radix or base).

- Place value of different digits.

- Maximum numbers that can be represented using given number of

digits.

In a number system there is an ordered set of symbols (digits) with rules

defined for performing arithmetic operations like addition, subtraction,

multiplication etc.

(𝑁)𝑏 = 𝑑𝑛−1𝑑𝑛−2…𝑑𝑖 …𝑑2𝑑1𝑑0. 𝑑−1𝑑−2…𝑑−𝑓…𝑑−𝑚+1𝑑−𝑚

Integer part Radix Point Fractional part

1-10

Where,

N → A number

b → Base or radix of the number system

n → Number of digits in Integer part

m → Number of digits in Fractional part

𝑑𝑛−1 → Most Significant Digit (MSD)

𝑑−𝑚 → Least Significant Digit (LSD)

Each digit (i.e. 𝑑𝑖 and 𝑑−𝑓) must be within the range from 0 to b–1

including the boundaries.

1.3.1 Decimal Number System Base of decimal number system is 10. It is also called as radix-10 number

system. In this number system, 10 independent digits are used. They are:

0 1 2 3 4 5 6 7 8 9

All the numbers are represented using these digits only. One can

represent whole numbers as well as fractional numbers (requires additional

period symbol. i,e, ‘.’) using these digits. Some examples are given below.

149 39754 22361803 11

23.67333 100.001 .75 10.50

The place values of different digits in a decimal number are 100, 101, 102,

103 and so on. Value (also called as magnitude) of a decimal number can be

expressed as sum of multiplication of each digit by its place value. An example is

shown below.

(39754)10 = 4 × 100 + 5 × 101 + 7 × 102 + 9 × 103 + 3 × 104

4 × 1 + 5 × 10 + 7 × 100 + 9 × 1000 + 3 × 10000

4 + 50 + 700 + 9000 + 30000

𝐷𝑒𝑐𝑖𝑚𝑎𝑙𝑣𝑎𝑙𝑢𝑒39754

For fractional part, place values of different digits are 10-1, 10-2, 10-3, 10-4

and so on. An example is shown below.

(10.50)10 = 1 × 101 + 0 × 100 + 5 × 10−1 + 0 × 10−2

1 × 10 + 0 × 1 + 5 × 0.1 + 0 × 0.01

10 + 0 + 0.5 + 0

𝐷𝑒𝑐𝑖𝑚𝑎𝑙𝑣𝑎𝑙𝑢𝑒10.5

1.3.2 Binary Number System Base of binary number system is 2. It is also called as radix-2 number

system. In this number system, 2 independent digits are used.

They are:

0 1

All the numbers are represented using these digits only. Generally, a

digit in binary number system is called as bit (i.e. binary digit). One can



110 0 101110 1

1-11

101.1010 1.001 .100 1110.10

The place values of different digits in a binary number are 20, 21, 22, 23

and so on. Value (also called as magnitude) of a binary number can be expressed

as sum of multiplication of each bit by its place value. An example is shown

below.

(10110)2 = 0 × 20 + 1 × 21 + 1 × 22 + 0 × 23 + 1 × 24

0 × 1 + 1 × 2 + 1 × 4 + 0 × 8 + 1 × 16

0 + 2 + 4 + 0 + 16


For fractional part, place values of different bits are 2-1, 2-2, 2-3, 2-4 and so

on. An example is shown below.

(10.01)2 = 1 × 21 + 0 × 20 + 0 × 2−1 + 1 × 2−2

1 × 2 + 0 × 1 + 0 × 0.5 + 1 × 0.25

2 + 0 + 0 + 0.25


Some important units in binary number system along with their

meanings are shown in table 1.1.

Table 1.1: Units in Binary number system

Unit Meaning

Bit Single binary digit (0 or 1)

Nibble Group of 4 bits

Byte Group of 8 bits

Word Number of bits that can be processed by a computer at a time. It may

vary from one computer to another. Generally it equals to 1 byte, 2

bytes, 4 bytes or even larger.

Advantages of Binary Number System

Binary number system is simplest possible number system.

Logic operations are backbone of any digital computer. Logic operations

are nothing but operations that deal with TRUE (‘1’) and FALSE (‘0’). So, in

digital computers, binary number system is most prominently used number

system.

As data is represented using 0’s and 1’s, basic electronic devices used in

implementation of hardware can easily handle the data (by considering OFF for

‘0’ and ON for ‘1’).

As data is represented using 0’s and 1’s, circuits required for performing

arithmetic operations like addition, subtraction etc can be easily designed.

1.3.3 Octal Number System Base of octal number system is 8. It is also called as radix-8 number

system. In this number system, 8 independent digits are used. They are:

0 1 2 3 4 5 6 7




1-12

146 32754 22361203 11

23.67333 100.001 .75 10.50

The place values of different digits in a decimal number are 80, 81, 82, 83

and so on. Value (also called as magnitude) of a octalal number can be expressed

as sum of multiplication of each digit by its place value. An example is shown

below.

(32754)8 = 4 × 80 + 5 × 81 + 7 × 82 + 2 × 83 + 3 × 84

4 × 1 + 5 × 8 + 7 × 64 + 2 × 512 + 3 × 4096

4 + 40 + 448 + 1024 + 12288


For fractional part, place values of different digits are 8-1, 8-2, 8-3, 8-4 and

so on. An example is shown below.

(10.50)8 = 1 × 81 + 0 × 80 + 5 × 8−1 + 0 × 8−2

1 × 8 + 0 × 1 + 5 × 0.125 + 0 × 0.0625

8 + 0 + 0.625 + 0


1.3.4 Hexadecimal Number System Base of hexadecimal number system is 16. It is also called as radix-16

number system. In this number system, 16 independent digits are used. They

are:

0 1 2 3 4 5 6 7 8 9 A B C D E F

Values of additional digits are,

Digit Value Digit Value

A 10 B 11

C 12 D 13

E 14 F 15




149 F1AB 22C 1D3

23.67333 1E.001 .A5 10.50

The place values of different digits in a decimal number are 160, 161, 162,

163 and so on. Value (also called as magnitude) of a hexadecimal number can be

expressed as sum of multiplication of each digit by its place value. An example is

shown below.

(𝐹1𝐴𝐵)16 = 𝐵 × 160 + 𝐴 × 161 + 1 × 162 + 𝐹 × 163

11 × 1 + 10 × 16 + 1 × 256 + 15 × 4096

11 + 160 + 256 + 61440


For fractional part, place values of different digits are 16-1, 16-2, 16-3, 16-4

and so on. An example is shown below.

(10.50)16 = 1 × 161 + 0 × 160 + 5 × 16−1 + 0 × 16−2

1 × 16 + 0 × 1 + 5 × 0.0625 + 0 × 0.00390625

1-13

16 + 0 + 0.3125 + 0


Advantages of Hexadecimal Number System

As already discussed previously, binary number system is used for

representing data in digital computers. Hexadecimal number system, on the

other hand, provides compact way of representing large binary numbers. A

value 250 can be represented in binary number system as 11111001. This is a

big number. It can be represented in very compact form in hexadecimal number

system as F9.

Due to compact representation of large binary numbers they can be easily

understood and handled.

1.3.5 Conversion of Number Systems A number represented using one number system can be converted into its

equivalent number in any other number system. i.e. a number can be easily

converted from one number system to another. The original number and the

output of conversion are equivalent of each other. Processes used for converting

a number from one number system to another number system are discussed

below.

1.3.5.1 Binary to Decimal conversion

Decimal equivalent of a binary number can be found by adding sum of

multiplication of each bit by its place value.

Example 1:

(111010)2 = 1 × 25 + 1 × 24 + 1 × 23 + 0 × 22 + 1 × 21 + 0 × 20

1 × 32 + 1 × 16 + 1 × 8 + 0 × 4 + 1 × 2 + 0 × 1

32 + 16 + 8 + 0 + 2 + 0

(58)10

Example 2:

(1101.01)2 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 + 0 × 2−1 + 1 × 2−2 1 × 8 + 1 × 4 + 0 × 2 + 1 × 1 + 0 × 0.5 + 1 × 0.25

8 + 4 + 0 + 1 + 0 + 0.25

(13.25)10

1.3.5.2 Octal to Decimal conversion

Decimal equivalent of octal number can be found by adding sum of

multiplication of each bit by its place value.

Example 1:

(6251)8 = 6 × 83 + 2 × 82 + 5 × 81 + 1 × 80

6 × 512 + 2 × 64 + 5 × 8 + 1 × 1

3072 + 128 + 40 + 1

(3241)10

Example 2:

(37.40)8 = 3 × 81 + 7 × 80 + 4 × 8−1 + 0 × 8−2

3 × 8 + 7 × 1 + 4 × 0.125 + 0 × 0.0625

24 + 7 + 0.5 + 0

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(31.5)10

1.3.5.3 Hexadecimal to Decimal conversion

Decimal equivalent of a hexadecimal number can be found by adding sum

of multiplication of each bit by its place value.

Example 1:

(20𝐴𝐵)16 = 20 × 163 + 0 × 162 + 𝐴 × 161 + 𝐵 × 160

20 × 4096 + 0 × 256 + 10 × 16 + 11 × 1

81920 + 0 + 160 + 11

(82091)10

Example 2:

(𝐷𝐶. 61)16 = 𝐷 × 161 + 𝐶 × 160 + 6 × 16−1 + 1 × 16−2

13 × 16 + 12 × 1 + 6 × 0.0625 + 1 × 0.00390625

208 + 12 + 0.375 + 0.00390625

(220.37890625)10

1.3.5.4 Decimal to Binary conversion

While converting Decimal number into its binary equivalent, the

conversion process for integer part and fraction part are different. So, these

parts must be separated first.

For integer part, decimal number is successively divided by 2 (which is

base or radix of binary number system) until the quotient becomes zero and the

remainders are recorded in each step. The number formed by writing

remainders in reverse order is the binary equivalent of integer part.

For fractional part, it is successively multiplied by 2 (which is base or

radix of binary number system) until result of multiplication is 0 and the carries

are recorded in each step. The number formed by writing carries in forward

order is the binary equivalent of fractional part. If we are not getting the result

of multiplication as zero after multiple iterations, we may stop the process after

getting desired number of bits.

Example 1:

(293.52)10 = (? )2

As a first step, the number should be separated in integer part and

fractional parts as,

(293.52)10 = (293)10 + (0.52)10

Converting the integer part (293)10:

Divisor Dividend Remainder

2 293 --

2 146 1

2 73 0

2 36 1

2 18 0

2 9 0

1-15

2 4 1

2 2 0

2 1 0

-- 0 1

(293)10 = (100100101)2

Converting the fractional part (0.52)10:

Fraction Multiplier Result Carry

.52 2 .04 1

.04 2 .08 0

.08 2 .16 0

.16 2 .32 0

.32 2 .64 0

.64 2 .28 1

.28 2 .56 0

.56 2 .12 1

.

.

.

.

.

.

(0.52)10 = (. 10000101)2

Therefore,

(293.52)10 = (100100101.10000101)2

Example 2:

(63.25)10 = (? )2 As a first step, the number should be separated in integer part and


(63.25)10 = (63)10 + (0.25)10



2 63 --

2 31 1

2 15 1

2 7 1

2 3 1

2 1 1

-- 0 1

(63)10 = (111111)2



.25 2 .5 0

.5 2 .0 1

(0.25)10 = (. 01)2

Therefore,

1-16

(63.25)10 = (111111.01)2

1.3.5.5 Decimal to Octal conversion

While converting Decimal number into its octal equivalent, the conversion

process for integer part and fraction part are different. So, these parts must be

separated first.


base or radix of octal number system) until the quotient becomes zero and the

remainders are recorded in each step. The number formed by writing

remainders in reverse order is the octal equivalent of integer part.


radix of octal number system) until result of multiplication is 0 and the carries

are recorded in each step. The number formed by writing carries in forward

order is the octal equivalent of fractional part. If we are not getting the result of

multiplication as zero after multiple iterations, we may stop the process after

getting desired number of octal digits.

Example 1:

(293.52)10 = (? )8



(293.52)10 = (293)10 + (0.52)10



8 293 --

8 36 5

8 4 4

-- 0 4

(293)10 = (445)2



.52 8 .16 4

.16 8 .28 1

.28 8 .24 2

.24 8 .92 1

.92 8 .36 7

.36 8 .88 2

.88 8 .04 7

.04 8 .32 0

.

.

.

.

(0.52)10 = (. 41217270)2

Therefore,

(293.52)10 = (445.41217270)2

Example 2:

(63.25)10 = (? )8

1-17



(63.25)10 = (63)10 + (0.25)10



8 63 --

8 7 7

-- 0 7

(63)10 = (77)8



.25 8 .0 2

(0.25)10 = (. 2)8

Therefore,

(63.25)10 = (77.2)8

1.3.5.6 Decimal to Hexadecimal conversion

While converting Decimal number into its hexadecimal equivalent, the

conversion process for integer part and fraction part are different. So, these

parts must be separated first.


base or radix of hexadecimal number system) until the quotient becomes zero

and the remainders are recorded in each step. The number formed by writing

remainders in reverse order is the hexadecimal equivalent of integer part.


radix of hexadecimal number system) until result of multiplication is 0 and the

carries are recorded in each step. The number formed by writing carries in

forward order is the hexadecimal equivalent of fractional part. If we are not

getting the result of multiplication as zero after multiple iterations, we may stop

the process after getting desired number of octal digits.

Example 1:



(293.52)10 = (293)10 + (0.52)10



16 293 --

16 18 5

1-18

16 1 2

-- 0 1

(293)10 = (125)16



.52 16 .32 8

.32 16 .12 5

.12 16 .92 1

.92 16 .72 14(E)

.72 16 .52 11(B)

.52 16 .32 8

.32 16 .12 5

Results will be repeated

(0.52)10 = (. 851𝐸𝐵)16

Therefore,

(293.52)10 = (125.851𝐸𝐵)16

Example 2:



(63.25)10 = (63)10 + (0.25)10



16 63 --

16 3 15(F)

-- 0 3

(63)10 = (3𝐹)16



.25 16 .0 4

(0.25)10 = (. 4)16

Therefore,

(63.25)10 = (3𝐹. 4)16

1.3.5.7 Octal to Binary and Binary to Octal conversion

While converting octal number into its binary equivalent, each octal digit

is replaced by its three-bit binary equivalent. The binary equivalents of all

independent octal digits are shown in table 1.2.

Table 1.2: Octal Digits and their binary equivalents

Octal Digit Binary equivalent

1-19

0 0 0 0

1 0 0 1

2 0 1 0

3 0 1 1

4 1 0 0

5 1 0 1

6 1 1 0

7 1 1 1

Example 1:

(273.52)8 = (? )2

Each octal digit is replaced by its three-bit binary equivalent.

Therefore, (273.52)8 =(010111011.101010)2

Example 2:

(63.25)8 = (? )2

Each octal digit is replaced by its three-bit binary equivalent.

Therefore, (63.25)8 =(110011.010101)2

For converting a binary number into octal number both the integer part

and the fractional part of the binary number are split into groups of three bits

starting from radix point (in binary number system it may be called as binary

point). If the outermost groups are not complete (i.e. of three bits), then

sufficient number of 0’s are added to make them complete (on left side of

leftmost group and on right side of rightmost group). Then each group is

replaced by its octal equivalent as shown in table 1.2.

Example 1:

(1010101.0101)2 = (? )8

The binary number is split into groups of three bits from binary point.

Here the first group and the

last group are incomplete. For completing them 0’s are added on left side of first

group and on right side of last group.

Then octal equivalent of each

group of bits is written.

Therefore, (1010101.0101)2 =(125.24)8

Example 2:

(11010.01)2 = (? )8

2 7 3 . 5 2

010 111 011 . 101 010

6 3 . 2 5

110 011 . 010 101

1 010 101 . 010 1

001 010 101 . 010 100

001 010 101 . 010 100

1 2 5 . 2 4

1-20

The binary number is split into groups of three bits from binary point.

Here the first group and the last group

are incomplete. For completing them 0’s are added on left side of first group and

on right side of last group.

Then octal equivalent of each group

of bits is written.

Therefore, (11010.01)2 = (32.2)8

1.3.5.8 Hexadecimal to Binary and Binary to Hexadecimal conversion

While converting hexadecimal number into its binary equivalent, each

hexadecimal digit is replaced by its four-bit binary equivalent. The binary

equivalents of all independent hexadecimal digits are shown in table 1.3.

Table 1.3: hexadecimal Digits and their binary equivalents

Hexadecimal

Digit

Binary equivalent

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

A 1 0 1 0

B 1 0 1 1

C 1 1 0 0

D 1 1 0 1

E 1 1 1 0

F 1 1 1 1

Example 1:

(273. 𝐴2)16 = (? )2

Each hexadecimal digit is replaced by its four-bit binary equivalent.

Therefore, (273. 𝐴2)16 =(001001110011.10100010)2

Example 2:

(𝐸𝐵. 25)16 = (? )2

11 010 . 01

011 010 . 010

011 010 . 010

3 2 . 2

2 7 3 . A 2

0010 0111 0011 . 1010 0010

1-21

Each hexadecimal digit is replaced by its four-bit binary equivalent.

Therefore, (𝐸𝐵. 25)16 =(11101011.00100101)2

For converting a binary number into hexadecimal number both the

integer part and the fractional part of the binary number are split into groups of

four bits starting from radix point (in binary number system it may be called as

binary point). If the outermost groups are not complete (i.e. of four bits), then

sufficient number of 0’s are added to make them complete (on left side of

leftmost group and on right side of rightmost group). Then each group is

replaced by its octal equivalent as shown in table 1.3.

Example 1:

(100101101.01011)2 = (? )16

The binary number is split into groups of four bits from binary point.

Here the first group and the

last group are incomplete. For completing them 0’s are added on left side of first

group and on right side of last group.

Then hexadecimal

equivalent of each group of bits is written.

Therefore, (100101101.01011)2 = (12𝐷. 58)16

Example 2:

(11010.01)2 = (? )16

The binary number is split into groups of four bits from binary point.

Here the first group and the last group

are incomplete. For completing them 0’s are added on left side of first group and

on right side of last group.

Then octal equivalent of each group

of bits is written.

Therefore, (11010.01)2 = (1𝐴. 4)16

1.3.5.9 Hexadecimal to Octal and Octal to Hexadecimal conversion

For converting hexadecimal number into its octal equivalent, two

methods exist. In the first method, the hexadecimal number is first converted

into its binary equivalent and then this binary number is converted into octal

number system. In the second method, the hexadecimal number is first

E B . 2 5

1110 1011 . 0010 0101

1 0010 1101 . 0101 1

0001 0010 1101 . 0101 1000

0001 0010 1101 . 0101 1000

1 2 D . 5 8

1 1010 . 01

0001 1010 . 0100

0001 1010 . 0100

1 A . 4

1-22

converted into its decimal equivalent and then this decimal number is converted

into octal number system. The first method is easier than the second.

Example 1:

(1𝐴. 4)16 = (? )8

The hexadecimal number is first converted into its binary equivalent.

(1𝐴. 4)16 = (00011010.0100)2

Then the binary number is converted into its octal equivalent

Therefore,(1𝐴. 4)16 = (032.20)8 = (32.2)8

Example 2:

(12𝐷. 58)16 = (? )8

The hexadecimal number is first converted into its binary equivalent.

(12𝐷. 58)16 = (000100101101.01011000)2

Then the binary number is converted into its octal equivalent

Therefore, (12𝐷. 58)16 = (0455.260)8 = (455.26)8

For converting octal number into its hexadecimal equivalent, two

methods exist. In the first method, the octal number is first converted into its

binary equivalent and then this binary number is converted into hexadecimal

number system. In the second method, the octal number is first converted into

its decimal equivalent and then this decimal number is converted into

hexadecimal number system. The first method is easier than the second.

Example 1:

(56.03)8 = (? )16

The octal number is first converted into its binary equivalent.

(56.03)8 = (101110.000011)2

Then the binary number is converted into its hexadecimal equivalent

1 A . 4

0001 1010 . 0100

00 011 010 . 010 0

000 011 010 . 010 000

0 3 2 . 2 0

1 2 D . 5 8

0001 0010 1101 . 0101 1000

000 100 101 101 . 010 110 00

000 100 101 101 . 010 110 000

0 4 5 5 . 2 6 0

5 6 . 0 3

101 110 . 000 011

1-23

Therefore,(56.03)8 = (2𝐸. 0𝐶)16

Example 2:

(237.41)8 = (? )16

The octal number is first converted into its binary equivalent.

(237.41)8 = (010011111.100001)2

Then the binary number is converted into its hexadecimal equivalent

Therefore,(237.41)8 = (09𝐹. 84)16 = (9𝐹. 84)16

1.3.6 Number Representation in Binary Positive and negative decimal numbers can be represented in binary by

using one of the formats discussed below. Generally, while using these

representations, number of bits used for representing the number

should be multiple of 8.

1.3.6.1 Sign-Bit Magnitude Representation

In this representation, MSB (Most Significant Bit) is used for

representing sign. ‘0’ is used for representing positive sign whereas ‘1’ is used for

representing negative sign. Remaining bits are used for representing magnitude

of the number.

In eight-bit representation, MSB is used as sign bit and remaining seven

bits are used for representing magnitude.

Example 1: (−53)10 = (10110101)𝑠𝑖𝑔𝑛−𝑏𝑖𝑡𝑚𝑎𝑔𝑛𝑖𝑡𝑢𝑑𝑒

Example 2:

(+53)10 = (00110101)𝑠𝑖𝑔𝑛−𝑏𝑖𝑡𝑚𝑎𝑔𝑛𝑖𝑡𝑢𝑑𝑒

Example 3: (+33)10 = (00010001)𝑠𝑖𝑔𝑛−𝑏𝑖𝑡𝑚𝑎𝑔𝑛𝑖𝑡𝑢𝑑𝑒

Using sign-bit magnitude binary representation, when eight bits are

used; numbers in the range –127 to +127 can be represented. In an n-bit

representation, range of numbers those can be represented using sign-bit

magnitude format are −(2𝑛−1 − 1) to +(2𝑛−1 − 1). This is the simplest method of representing signed numbers.

1.3.6.2 One’s (1’s) Complement Representation

10 1110 . 0000 11

0010 1110 . 0000 1100

2 E . 0 C

2 3 7 . 4 1

010 011 111 . 100 001

0 1001 1111 . 1000 01

0000 1001 1111 . 1000 0100

0 9 F . 8 4

1-24

In this representation, positive decimal numbers are represented same as

that of sign-bit magnitude method. But negative numbers are represented in a

different way.

For representing negative numbers, following steps are performed.

1. Represent the number with positive sign.

2. Find its 1’s complement. (By replacing each ‘0’ with ‘1’ and vice a

versa. i.e. by inverting all the bits we get 1’s complement).

Output of step 2 is 1’s complement representation of the negative number.

Example 1: (+53)10 = (00110101)1′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡


Example 3: (−53)10 = (? )1′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡

In step 1, +53 is represented as,

(+53)10 = (00110101)

Then, its 1’s complement is found as

0 0 1 1 0 1 0 1

1 1 0 0 1 0 1 0

Therefore,

(−53)10 = (11001010)1′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡



(+33)10 = (00010001)

Then, its 1’s complement is found as

0 0 0 1 0 0 0 1

1 1 1 0 1 1 1 0

Therefore, (−33)10 = (11101110)1′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡

Using 1’s complement binary representation, when eight bits are used;

numbers in the range –127 to +127 can be represented. In an n-bit

representation, range of numbers those can be represented using 1’s

complement representation are −(2𝑛−1 − 1) to +(2𝑛−1 − 1).

1.3.6.3 Two’s (2’s) Complement Representation

In this representation, a positive number is represented same as that of

sign-bit magnitude method. A negative number is represented by computing 2’s

complement of binary equivalent of its magnitude. (2’s complement of a binary

number is computed by adding 1 in its 1’s complement).

For representing negative numbers, following steps are performed.

1. Represent the number with positive sign.

2. Find its 2’s complement. (By adding 1 in its 1’s complement).

Output of step 2 is 2’s complement representation of the negative number.

1-25





(+53)10 = (00110101)

Then, for finding its 2’s complement, first its 1’s complement is found as

0 0 1 1 0 1 0 1

1 1 0 0 1 0 1 0

Then by adding 1 in the result we get 2’s complement as,

1 1 0 0 1 0 1 0

+ 1

--------------------

1 1 0 0 1 0 1 1




(+33)10 = (00010001)

Then, for finding its 2’s complement, first its 1’s complement is found as

0 0 0 1 0 0 0 1

1 1 1 0 1 1 1 0


1 1 1 0 1 1 1 0

+ 1

--------------------

1 1 1 0 1 1 1 1


Using 2’s complement binary representation, when eight bits are used;

numbers in the range –128 to +127 can be represented. In an n-bit

representation, range of numbers those can be represented using 1’s

complement representation are −(2𝑛−1) to +(2𝑛−1 − 1). This is the most popular method of representing signed numbers. It is

become popular due to two reasons.

1. It is easy to generate 2’s complement of a binary number.

2. Arithmetic operations in 2’s complement method are easy.

Beyond Curriculum Point 1: Floating point numbers

1-26

Generally, floating point numbers are expressed in the following form.

𝑁 = 𝑚 × 𝑏𝑒

Here m is called significand or mantissa, e is called exponent and b is

base. Some examples are shown below.

0.000005312 = 5.312 × 10−6

531200 = 5.312 × 10+5

𝐵2𝐵. 2𝐶 = 𝐵. 2𝐵2𝐶 × 16+2

0.0031𝐹 = 3.1𝐹 × 16−3

11001.0110 = 0.110010110 × 2+5 = 0.110010110𝑒 + 0101

0.000110110 = 0.110110 × 2−3 = 0.110110𝑒 − 0011

The most commonly used format for representing floating point numbers

is IEEE-754 standard. This standard defines two basic formats as single

precision and double precision.

In single precision format, 8 bits are used for representing exponent and

24 bits are used for representing. Within 8 bits of exponent one bit is used for

representing sign of exponent and remaining 7 bits are used for representing

magnitude of exponent. So value of exponent can range from –127 to +127. (from

2−127to 2+127. i.e. from 10−38to 10+38). From 24 bits reserved for mantissa, one

bit is used as sign bit and remaining 23 bits are used for representing

magnitude of mantissa.

In double precision format, 11 bits are used for representing exponent and

53 bits are used for representing. Within 11 bits of exponent one bit is used for

representing sign of exponent and remaining 10 bits are used for representing

magnitude of exponent. So value of exponent can range from –1024 to +1024.

(from 2−1024to 2+1024. i.e. from 10−308to 10+308). From 53 bits reserved for

mantissa, one bit is used as sign bit and remaining 52 bits are used for

representing magnitude of mantissa.

1.3.7 Binary Arithmetic Up to this point, we have studied various methods of data representation.

Now, it is important to study data manipulation. We can perform two types of

operations on binary data – arithmetic operations and logic operations.

Arithmetic operations include addition, subtraction, multiplication and division.

These operations are discussed here. Various logic operation like AND, OR,

NOT are discussed in chapter 2.

1.3.7.1 Binary Addition

Basic rules for performing binary addition are given below in table 1.4.

Table 1.4: Rules for binary addition

A B A+B

0 0 0

0 1 1

1 0 1

1 1 0 with carry 1

1-27

Some examples of performing binary addition are given below.

Example 1: (1001110)2 + (11110)2 = (? )2

1 0 0 1 1 1 0

+ 1 1 1 1 0

C 1 1 1 1

1 1 0 1 1 0 0

(1001110)2 + (11110)2 = (1101100)2

Example 2: (11000111)2 + (11110000)2 = (? )2

1 1 0 0 0 1 1 1

+ 1 1 1 1 0 0 0 0

C 1 1

1 1 0 1 1 0 1 1 1

(11000111)2 + (11110000)2 = (110110111)2

1.3.7.2 Binary Subtraction

Basic rules for performing binary subtraction are given below in table 1.5.

Table 1.5: Rules for binary subtraction

A B A–B

0 0 0

0 1 1 with borrow 1

1 0 1

1 1 0

Some examples of performing binary subtraction are given below.

Example 1: (1001110)2 − (11110)2 = (? )2

1 0 0 1 1 1 0

– 1 1 1 1 0

B 1 1

0 1 1 1 1 0 0

(1001110)2 + (11110)2 = (111100)2

Example 2: (11110000)2 − (11000111)2 = (? )2

1 1 1 1 0 0 0 0

– 1 1 0 0 0 1 1 1

B 1 1 1 1

0 0 1 0 1 0 0 1

(11110000)2 − (11000111)2 = (101001)2

1-28

1.3.7.3 Binary Multiplication

Basic rules for performing binary multiplication are given in table 1.6.

Table 1.6: Rules for binary multiplication

A B A X B

0 0 0

0 1 0

1 0 0

1 1 1

Some examples of performing binary multiplication are given below.

Example 1: (1001110)2 × (110)2 = (? )2

1 0 0 1 1 1 0

X 1 1 0

0 0 0 0 0 0 0

+ 1 0 0 1 1 1 0 X

+ 1 0 0 1 1 1 0 X X

1 1 1

1 1 1 0 1 0 1 0 0

(1001110)2 × (110)2 = (111010100)2

Example 2: (11110000)2 × (1010)2 = (? )2

1 1 1 1 0 0 0 0

X 1 0 1 0

0 0 0 0 0 0 0 0

1 1 1 1 0 0 0 0 X

0 0 0 0 0 0 0 0 X X

1 1 1 1 0 0 0 0 X X X

1 1 1 1

1 0 0 1 0 1 1 0 0 0 0 0

(11110000)2 − (1010)2 = (100101100000)2

1.3.7.4 Binary Division

Binary division is performed similar to decimal division. Some examples

of performing binary division are given below.

Example 1: (11110000)2 ÷ (1010)2 = (? )2

Q 0 0 0 1 1 0 0 0

1 0 1 0 1 1 1 1 0 0 0 0

- 1 0 1 0

0 1 0 1 0

- 1 0 1 0

R 0 0 0 0 0 0 0

1-29

(11110000)2 − (1010)2 = (11000)2

Example 2: (1001111)2 ÷ (110)2 = (? )2

Q 0 0 0 1 1 0 1

1 1 0 1 0 0 1 1 1 1

- 1 1 0

1 1

0 0 1 1 1

- 1 1 0

0 0 1 1 1

- 1 1 0

R 0 0 1

(1001111)2 ÷ (110)2 = (1101)2𝑤𝑖𝑡ℎ𝑟𝑒𝑚𝑎𝑖𝑛𝑑𝑒𝑟(001)2

1.3.8 One’s complement Arithmetic Arithmetic operations discussed in 1.3.7 deals with unsigned binary

numbers only. For signed numbers, the arithmetic operations depend on the

way how they are represented. When signed numbers are represented using

one’s complement representation, we have to perform addition or subtraction by

using the steps discussed below.

As these rules deal with signed numbers, we can represent any

subtraction operation in terms of addition as shown in following examples.

𝐴 − 𝐵 = 𝐴 + (−𝐵) −𝐴 − 𝐵 = (−𝐴) + (−𝐵) −𝐴 − (−𝐵) = (−𝐴) + 𝐵

Following are the steps for performing 1’s complement addition

(subtraction also – First subtraction should be represented as addition).

1. Represent both the numbers using 1’s complement representation.

2. Perform simple binary addition.

3. If carry is generated out of MSBs, add it to LSB of the result.

4. If MSB is 0, result is positive. Find equivalent of result.

5. If MSB is 1, result is negative. Find 1’s complement of result and then its

equivalent.

Some examples are shown below.

Example 1: (83)10 + (39)10 = (? )10

Step 1: 1’s complement representation of numbers (83)10 = 01010011

(39)10 = 00100111

Step 2: Simple Binary addition

1-30

0 1 0 1 0 0 1 1

+ 0 0 1 0 0 1 1 1

1 1 1

0 1 1 1 1 0 1 0

Step 4: As MSB is 0, result is positive and it is,

01111010 = (122)10

∴ (83)10 + (39)10 = (122)10

Example 2: (−83)10 + (39)10 = (? )10

Step 1: 1’s complement representation of numbers (−83)10 =?

(83)10 = 01010011

0 1 0 1 0 0 1 1

1 0 1 0 1 1 0 0

(−83)10 = 10101100

(39)10 = 00100111


1 0 1 0 1 1 0 0

+ 0 0 1 0 0 1 1 1

1 1 1

1 1 0 1 0 0 1 1

Step 5: As MSB is 1, result is negative,

1 1 0 1 0 0 1 1

0 0 1 0 1 1 0 0

∴ 𝑅𝑒𝑠𝑢𝑙𝑡𝑖𝑠(−44)10

∴ (−83)10 + (39)10 = (−44)10

Example 3: (83)10 − (39)10 = (? )10

The above subtraction can be represented in terms of addition as, (83)10 + (−39)10 = (? )10


(−39)10 =? (39)10 = 00100111

0 0 1 0 0 1 1 1

1 1 0 1 1 0 0 0

(−39)10 = 11011000


0 1 0 1 0 0 1 1

+ 1 1 0 1 1 0 0 0

1-31

1 1 1

1 0 0 1 0 1 0 1 1

Step 3: Carry generated out of MSB is added to LSB of result.

0 0 1 0 1 0 1 1

+ 1

1 1

0 0 1 0 1 1 0 0


00101100 = (+44)10

∴ (83)10 − (39)10 = (+44)10

Example 4: (−83)10 − (39)10 = (? )10

The above subtraction can be represented in terms of addition as, (−83)10 + (−39)10 = (? )10

Step 1: 2’s complement representation of numbers(−83)10 =? (83)10 = 01010011

0 1 0 1 0 0 1 1

1 0 1 0 1 1 0 0

(−83)10 = 10101100

(−39)10 =? (39)10 = 00100111

0 0 1 0 0 1 1 1

1 1 0 1 1 0 0 0

(−39)10 = 11011000


1 0 1 0 1 1 0 0

+ 1 1 0 1 1 0 0 0

1 1 1 1 1

1 1 0 0 0 0 1 0 0

Step 3: Carry generated out of MSB is added to LSB of the result.

1 0 0 0 0 1 0 0

+ 1

1 0 0 0 0 1 0 1


1 0 0 0 0 1 0 1

0 1 1 1 1 0 1 0


∴ (−83)10 − (39)10 = (−122)10

1-32

1.3.9 Two’s complement Arithmetic Arithmetic operations discussed in 1.3.7 deals with unsigned binary

numbers only. For signed numbers, the arithmetic operations depend on the

way how they are represented. When signed numbers are represented using

two’s complement representation, we have to perform addition or subtraction by

using the steps discussed below.

As these rules deal with signed numbers, we can represent any

subtraction operation in terms of addition as shown in following examples.

𝐴 − 𝐵 = 𝐴 + (−𝐵) −𝐴 − 𝐵 = (−𝐴) + (−𝐵) −𝐴 − (−𝐵) = (−𝐴) + 𝐵

Following are the steps for performing 2’s complement addition

(subtraction also – First subtraction should be represented as addition).

1. Represent both the numbers using 2’s complement representation.


3. If any carry is generated out of MSBs, ignore it.

4. If MSB is 0, result is positive. Find equivalent of result.

5. If MSB is 1, result is negative. Find 2’s complement of result and then its

equivalent.


Example 1: (83)10 + (39)10 = (? )10


(39)10 = 00100111


0 1 0 1 0 0 1 1

+ 0 0 1 0 0 1 1 1

1 1 1

0 1 1 1 1 0 1 0


01111010 = (122)10

∴ (83)10 + (39)10 = (122)10

Example 2: (−83)10 + (39)10 = (? )10

Step 1: 2’s complement representation of numbers (−83)10 =?

(83)10 = 01010011

0 1 0 1 0 0 1 1

1 0 1 0 1 1 0 0


1 0 1 0 1 1 0 0

1-33

+ 1

--------------------

1 0 1 0 1 1 0 1

(−83)10 = 10101101

(39)10 = 00100111


1 0 1 0 1 1 0 1

+ 0 0 1 0 0 1 1 1

1 1 1 1 1

1 1 0 1 0 1 0 0


1 1 0 1 0 1 0 0

0 0 1 0 1 0 1 1


0 0 1 0 1 0 1 1

+ 1

--------------------

0 0 1 0 1 1 0 0


∴ (−83)10 + (39)10 = (−44)10

Example 3: (83)10 − (39)10 = (? )10

The above subtraction can be represented in terms of addition as, (83)10 + (−39)10 = (? )10


(−39)10 =? (39)10 = 00100111

0 0 1 0 0 1 1 1

1 1 0 1 1 0 0 0


1 1 0 1 1 0 0 0

+ 1

--------------------

1 1 0 1 1 0 0 1

(−39)10 = 11011001


0 1 0 1 0 0 1 1

1-34

+ 1 1 0 1 1 0 0 1

1 1 1 1 1

1 0 0 1 0 1 1 0 0

Step 3: Carry generated out of MSB is ignored.


00101100 = (+44)10

∴ (83)10 − (39)10 = (+44)10

Example 4: (−83)10 − (39)10 = (? )10

The above subtraction can be represented in terms of addition as, (−83)10 + (−39)10 = (? )10

Step 1: 2’s complement representation of numbers(−83)10 =? (83)10 = 01010011

0 1 0 1 0 0 1 1

1 0 1 0 1 1 0 0


1 0 1 0 1 1 0 0

+ 1

--------------------

1 0 1 0 1 1 0 1

(−83)10 = 10101101

(−39)10 =? (39)10 = 00100111

0 0 1 0 0 1 1 1

1 1 0 1 1 0 0 0


1 1 0 1 1 0 0 0

+ 1

--------------------

1 1 0 1 1 0 0 1

(−39)10 = 11011001


1 0 1 0 1 1 0 1

+ 1 1 0 1 1 0 0 1

1 1 1 1 1 1

1 1 0 0 0 0 1 1 0

Step 3: Carry generated out of MSB is ignored.


1 0 0 0 0 1 1 0

0 1 1 1 1 0 0 1

1-35


0 1 1 1 1 0 0 1

+ 1

--------------------

0 1 1 1 1 0 1 0


∴ (−83)10 − (39)10 = (−122)10

1.3.10 Binary Coded Decimal (BCD) Code Each decimal digit is represented by a four-bit code. The BCD codes of all

the decimal digits 0 through 9 are shown below.

Table 1.7: BCD Codes

Decimal Digit BCD Code

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

Some examples of BCD code representation are shown below. Also their

binary equivalents are shown.

Example Decimal Number BCD Code Binary equivalent

1 14 00010100 1110

2 83 10000011 01010011

3 122 000100100010 01111010

4 39 00111001 00100111

5 293.52 001010010011.01010010 100100101.10000101

6 13.25 00010011.00100101 1101.01

From above examples, it can be easily observed that more number of bits

is required for representing a number using BCD code as compared to simple

binary equivalent. This is disadvantage of BCD code. BCD arithmetic is also

somewhat critical. But even then, BCD code is convenient and useful code for

input and output operations.

Decimal to BCD conversion and BCD to Decimal conversion are very easy

as only the table 1.7 is used for doing the conversion.

BCD is also known as 8-4-2-1 code as the bits in the code have weights as

8, 4, 2 and 1.

Beyond Curriculum Point 2: Additional BCD Codes

1-36

The basic BCD code is 8421 BCD code. There are some more weighted

BCD codes as 4221 BCD code and 5421 BCD code. Obviously, 4, 2, 2, 1 in 4221

BCD code and 5, 4, 2, 1 in 5421 BCD code are weights of respective bits. Table

1.8 shows how decimal digits from 0 through 9 are represented using these BCD

codes.

Table 1.8: Other BCD Codes

Decimal Digit 4221 BCD

Code

5421 BCD

Code

0 0 0 0 0 0 0 0 0

1 0 0 0 1 0 0 0 1

2 0 0 1 0 0 0 1 0

3 0 0 1 1 0 0 1 1

4 1 0 0 0 0 1 0 0

5 0 1 1 1 1 0 0 0

6 1 1 0 0 1 0 0 1

7 1 1 0 1 1 0 1 0

8 1 1 1 0 1 0 1 1

9 1 1 1 1 1 1 0 0

Beyond Curriculum Point 3: Excess–3 Code Excess-3 code is one more important BCD code. It is very much useful in

performing BCD arithmetic. Table 1.9 shows how decimal digits from 0 through

9 are represented using Excess–3 codes.

Table 1.8: Excess–3 Code

Decimal Digit Excess-3 Code

0 0 0 1 1

1 0 1 0 0

2 0 1 0 1

3 0 1 1 0

4 0 1 1 1

5 1 0 0 0

6 1 0 0 1

7 1 0 1 0

8 1 0 1 1

9 1 1 0 0

1.3.11 BCD Arithmetic Method of performing BCD arithmetic is different from binary arithmetic.

There are different rules for doing so.

1.3.11.1 BCD Addition

There are various methods for performing BCD addition. One of them is

discussed below.

Rules for performing BCD addition are,

1. Represent both the decimal numbers in their BCD codes.


1-37

3. If any digit (4 bits) in the result contains invalid BCD code or a carry

is generated out of a digit (4 bits), add 0110 to each such digit (4 bits).


Example 1: (83)10 + (39)10 = (? )10

Step 1: BCD code representation of numbers (83)10 = 10000011

(39)10 = 00111001


1 0 0 0 0 0 1 1

+ 0 0 1 1 1 0 0 1

1 1

1 0 1 1 1 1 0 0

Step 3: As both digits of result contain invalid BCD codes,

1 0 1 1 1 1 0 0

+ 0 1 1 0 0 1 1 0

1 1 1 1 1 1

1 0 0 1 0 0 0 1 0

(000100100010)𝐵𝐶𝐷 = (122)10

∴ (83)10 + (39)10 = (122)10

Example 2: (29)10 + (58)10 = (? )10


(58)10 = 01011000


0 0 1 0 1 0 0 1

+ 0 1 0 1 1 0 0 0

1 1 1 1

1 0 0 0 0 0 0 1

Step 3: As carry is generated from least significant digit to next

digit 0110 is added to lest significant digit,

1 0 0 0 0 0 0 1

+ 0 1 1 0

1 0 0 0 0 1 1 1

(10000111)𝐵𝐶𝐷 = (87)10

∴ (29)10 + (58)10 = (87)10

Example 3:

1-38

(637)10 + (463)10 = (? )10


(463)10 = 010001100011


0 1 1 0 0 0 1 1 0 1 1 1

+ 0 1 0 0 0 1 1 0 0 0 1 1

1 1 1 1 1 1

1 0 1 0 1 0 0 1 1 0 1 0

Step 3: As least significant digit and most significant digit are

invalid, 0110 is added to both these digits.

1 0 1 0 1 0 0 1 1 0 1 0

+ 0 1 1 0 0 1 1 0

1 1 1 1 1 1 1

1 0 0 0 0 1 0 1 0 0 0 0 0

As result contains invalid digit, 0110 is added to that digit.

1 0 0 0 0 1 0 1 0 0 0 0 0

+ 0 1 1 0

1 1 1

1 0 0 0 1 0 0 0 0 0 0 0 0

(0001000100000000)𝐵𝐶𝐷 = (1100)10

∴ (637)10 + (463)10 = (1100)10

Example 4:

1001 + 1101 =?

Step 1: The above numbers are represented in binary

representation. First number is binary equivalent of (9)10 and second number is

binary equivalent of (13)10. BCD code representation of these numbers is, (9)10 = 1001

(13)10 = 00010011


1 0 0 1

+ 0 0 0 1 0 0 1 1

1 1

0 0 0 1 1 1 0 0

Step 3: As least significant digit is invalid, 0110 is added to that

digit.

0 0 0 1 1 1 0 0

+ 0 1 1 0

1 1 1

0 0 1 0 0 0 1 0

1-39

(00100010)𝐵𝐶𝐷 = (22)10

∴ (1001)2 + (1101)2 = (22)10 = (10110)2

1.3.11.2 BCD Subtraction

There are various methods for performing BCD subtraction. One of them

is discussed below.

Rules for performing BCD subtraction are (By considering subtraction as

A – B ),

1. Represent A in BCD code.

2. Represent 9’s complement of B in BCD code.

3. Perform BCD addition.

4. If carry is generated out of MSB, result is positive. To get correct result,

carry is added to result.

5. If carry is not generated, result is negative and it is in 9’s complement

form.


Example 1: (45)10 − (27)10 = (? )10

Step 1: BCD code representation of A (45)10 = 01000101

Step 2: 9’s complement of B is, (27)10 = (72)9′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡

BCD code is

72 = 01110010

Step 3: BCD addition

0 1 0 0 0 1 0 1

+ 0 1 1 1 0 0 1 0

1 0 1 1 0 1 1 1

As most significant digit of result contain invalid BCD code,

1 0 1 1 0 1 1 1

+ 0 1 1 0

1 1

1 0 0 0 1 0 1 1 1

Step 4: As carry is generated out of MSB, it is added to result.

(Result is positive)

0 0 0 1 0 1 1 1

+ 1

1 1 1

0 0 0 1 1 0 0 0

(00011000)𝐵𝐶𝐷 = (+18)10

1-40

∴ (45)10 − (27)10 = (+18)10

Example 2: (45)10 − (83)10 = (? )10

Step 1: BCD code representation of A (45)10 = 01000101

Step 2: 9’s complement of B is, (83)10 = (16)9′𝑠𝑐𝑜𝑚𝑝𝑙𝑒𝑚𝑒𝑛𝑡

BCD code is

16 = 00010110

Step 3: BCD addition

0 1 0 0 0 1 0 1

+ 0 0 0 1 0 1 1 0

1

0 1 0 1 1 0 1 1

As least significant digit of result contain invalid BCD code,

0 1 0 1 1 0 1 1

+ 0 1 1 0

1 1 1 1

0 1 1 0 0 0 0 1

Step 5: As carry is not generated out of MSB, result is negative and

it is in 9’s complement form

(01100001)𝐵𝐶𝐷 = (61)10

But as result is in 9’s complement form, true result is

∴ (45)10 − (83)10 = (−38)10

chapter 1 introduction to digital techniques · 2017. 5. 25. · figure 1.4: negative logic 1.1.3...

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