Chapter 6

Analysis of Sequential Systems

Chapter 6Analysis of Sequential Systems

Up until now everything has been combinational that is, the output at any instant of time depends only one what the input are at that time.

We will now focus on systems that have memory, referred to as sequential systems.

Thus the output will depend not only on the present input but also on the past history what has happened earlier.

Application of a Sequential Systems

A simple application of a sequential system is a vending machine.

The circuit of a vending machine must accept inputs (coins) an remember the amount of coins that have be entered.

The circuit must also reach a point where it delivers an output (drink or snack) and then reset to a state where it awaits for more coins to be entered.

Application of a Sequential Systems

In short, the circuit must have a little memory and go through a cycle of states at a regular rate determined by a clock.

A clock is just a signal that alternates over time between 0 and 1 at a regular rate.

Chapter 6Analysis of Sequential Systems

Chapter 7Design of Sequential Systems

CE6. A system with one input x and one output z such that z = 1 at a clock time iff x is currently 1 and was also 1 at the previous two clock times.Create a state diagram using states S0, S1, S2, and S3.S0 0S1 1S2 1 1S3 1 1 1Create a State Table with the following column headings: Present State - Next State - Output

State table: shows for each input combination and each state, what the output is and what the next state is, that is, what is to be stored in memory after the next clock. State diagram (or state graph): a graphical representation of the state table.

Work problems 1(b) and 1(d) on page 403-404.These are also on Homework 8.

Complete the time trace on page 2 of Homework 8 for the same problems listed above.

NOT Gate Loopback

NOT Gate Loopback

q = (S + q )q = (R + q)A latch is a binary storage device.q

q'

Create a Truth Table with the columns S, R, q, and q*.Create a Short Truth Table with columns S, R and q*Create a Karnaugh map for q*.Create a State Diagram for this RS Flip Flop.

q* = S + Rqq

q

Clocked RS Flip FlopSClockRq

q

Flip-FlopsMade from logic gates with feedback loopsUsed for sequential and non-sequential systemsA clock is used to determine the state-rateFlavors:SRD JKT

Chapter 6Analysis of Sequential Systems

Why are they called Flip Flops?The output of these devices flips flops back and forth between 0 and 1 depending on the input.

What does JK stand for?The JK flip flop was named after Jack Kilby, the Texas Instruments engineer that invented the integrated circuit in 1958.

Flip-Flops - Next State EquationsRS-Flip Flops (Set-Reset)q* = S + Rq

D-Flip Flops (Delay)q* = D

T-Flip Flops (Toggle)q* = T + q

JK-Flip Flops (JK)q* = Jq + KqClock

Sequential SystemsMoore Modeloutput (z) depends on the current state onlyMealy Modeloutput (z) depends on the current state and the inputState TablesState GraphsMnemonic:Moore depends on less.

Moore Model - output (z) depends on current state onlyMealy Model - output (z) depends on the current state and the input

Moore Model - output (z) depends on current state onlyMealy Model - output (z) depends on the current state and the inputWhich is it?

Chapter 6Analysis of Sequential Systems

Chapter 7Design of Sequential Systems

Work problem 5(a) on Homework 8 in class.

q* = S + Rq

q* = T q

q* = Jq + Kq