characterization and modeling of step recovery diodes

limited to within 0.1% in many cases, and seldom exceedabout 0.1%.

The MT method may be used to calculate the field inten-sity distribution, and to treat the more complicated boundaryand mixed dielectric problems.

APPENDIX I: DETERMINATION OF SERIES COEFFICIENTSOF THE MT SOLUTION

Given the following boundary-value problem

2 Ž .= u s f x , y , x , y g V

Ž .u N s g x , y , x , y g GG 11

uŽ . Ž .q a u s q x , y , x , y g G , G q G s G 42 1 2 n

Ž .its MT series solution is the same as formula 3 , i.e.,

N

Ž .u s U q a U . 5Ý0 k kks1

Ž .According to the boundary condition in Eq. 4 , the leastŽsquares method is applied to make the error between the

.given boundary-value and the MT series solution on theboundary minimum.

Since

22Ž . ŽŽ . .E s u y g dG q ur n q a u y q dG ,H Hr rG G1 2

Ž . Ž .let dE rda s 0 m s 1, 2, . . . , N ; thenr r m

N U Uk ma U U dG q q aU q aU dGH HÝ k k m k mž / ž / n nG G1 2ks1

Ž .s g y U U dGH 0 mG1

U U0 m Ž .q q y y aU q aU dG. 6H 0 mž / ž / n nG2

Ž .In formula 6 , the number of unknown coefficients is justŽ .equal to that of the equations. Solving formula 6 , all of the

Ž .coefficients of formula 5 are determined, i.e., the MT seriesŽ .solution of the boundary-value problem 4 is obtained.

APPENDIX II: COMPUTATION OF CAPACITANCE BY THEMT METHOD

According to the applied laws introduced above, for FigureŽ .1 b , we place two outside poles and an inside pole at the o ,1

Ž .o , and o points of Figure 1 b ; the order of every pole2equals 6. The MT series solution is

6X nu s A q A r cos nuÝ0 n

ns1

2 6 21ynq A ln r q A r cos nu s a U .Ý Ý Ýop op opn op op k k

ps1 ns1 ks1

Ž .7

After the coefficients are determined by the method of Ap-pendix I, we obtain the MT series solution; the capacitance

C is`

C s 2p A rDU` o

2Ž .A s A 8Ýo op

ps1

where DU is the potential difference of the two conductors.We can also calculate the capacitances C and C of0 e

Ž . Ž .Figure 1 c and d in the same way.

REFERENCES

1. R. M. Chisholm, ‘‘The Characteristic Impedance of Trough andSlab Lines,’’ IRE Trans. Microwa e Theory Tech., Vol. MTT-4,July 1956, pp. 166]177.

2. E. G. Cristal, ‘‘Coupled Circular Cylindrical Rods Between Paral-lel Ground Planes,’’ IRE Trans. Microwa e Theory Tech., Vol.MTT-12, July 1964, pp. 428]439.

3. E. G. Cristal, ‘‘Data for Partially Decoupled Round Rods Be-tween Parallel Ground Planes,’’ IEEE Trans. Microwa e TheoryTech., Vol. MTT-17, May 1968, pp. 311]314.

4. J. G. Fikioris and J. L. Tsalamengas, ‘‘Exact Solutions for Rect-angularly Shielded Lines by the Carleman]Vekua Method,’’IEEE Trans. Microwa e Theory Tech., Vol. 36, Apr. 1988, pp.659]675.

5. I. Tailu and R. L. Olsen, ‘‘Analysis of Transmission Line Struc-tures Using a New Image-Mode Green’s Function,’’ IEEE Trans.Microwa e Theory Tech., Vol. 38, June 1990, pp. 782]785.

6. R. Levy, ‘‘Conformal Transformations Combined with NumericalTechniques, with Applications to Coupled-Bar Problems,’’ IEEETrans. Microwa e Theory Tech., Vol. MTT-28, Apr. 1980, pp.369]375.

7. G. B. Stracca, G. Macchiarella, and M. Politi, ‘‘Numerical Analy-sis of Various Configurations of Slab Lines,’’ IEEE Trans. Mi-crowaë Theory Tech., Vol. MTT-34, Mar. 1986, pp. 359]365.

8. E. Costamagna, A. Fanni, and M. Usai, ‘‘Slab Line ImpedanceRevisited,’’ IEEE Trans. Microwa e Theory Tech., Vol. 41, Jan.1993, pp. 156]159.

9. A. Abramowicz, ‘‘New Model of Coupled Transmission Lines,’’IEEE Trans. Microwa e Theory Tech., Vol. 43, June 1995,pp. 1389]1392.

10. Q. H. Zheng, ‘‘A Study of the Multipole Theory and Its Applica-tion in Electromagnetic Field Analysis and Computation,’’ Ph.D.dissertation, Xi’an Jiaotong University, Xi’an, Sept. 1996.

Q 1998 John Wiley & Sons, Inc.CCC 0895-2477r98

CHARACTERIZATION AND MODELINGOF STEP RECOVERY DIODESJian Zhang1* and Antti V. Raisanen2¨ ¨1 Nokia Telecommunications / Professional Mobile Radio00045 Nokia Group, Finland2 Radio LaboratoryHelsinki University of Technology02150 Espoo, Finland

Recei ed 22 September 1997

ABSTRACT: This paper presents a fast and accurate technique for( )characterization of the step recoëry diode SRD from 45 MHz to 18

GHz with a network analyzer. A flexible test fixture is designed formeasuring SRD chips. The öltage dependence of the capacitance and

* This work was performed while the author was with the Radio Labora-tory, Helsinki University of Technology, Espoo, Finland.

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 17, No. 3, February 20 1998200

the series resistance are extracted from the measured S-parameters. Basedon the measured results, a more accurate model of the step recoërydiode has been deëloped. This model can be easily implemented in acircuit simulator. Q 1998 John Wiley & Sons, Inc. Microwave OptTechnol Lett 17: 200]205, 1998.

Key words: step recoëry diode; characterization; model; measurement;test fixture

I. INTRODUCTION

Step recovery diodes are strongly nonlinear semiconductordevices. Their unique C]V characteristics make them partic-ularly useful in applications such as high-order frequencymultiplication, wave forming, and pulse generation.

To achieve accurate circuit design, an accurate model ofthe active device is required. An accurate model is obtainedthrough accurate characterization of the device. Properties ofthe device are not only dependent on the known or designedphysical parameters, like anode diameter, diffusion area, dop-ing density, and thickness, but also on some uncontrollable,or difficult to control, factors, for example, variations inprocessing cleanliness and defects in the semiconductor.Therefore, in any model, there are always some parameterswhich must be determined by measurements of the activedevice.

As already known, the nonlinear C]V characteristic of anSRD is featured by a very small and nearly constant capaci-tance under the reverse-bias state, a very large capacitanceunder the forward-bias state, and a fast transition process

w xbetween these two states 1 . This fast transition process, forwhich an SRD is used, should be modeled accurately toachieve accurate SRD circuit designs.

Previous designs of SRD circuits are based on the methodw xof Hamilton and Hall 2 . In this approach, the SRD is

modeled as an ideal conductor under the forward-bias stateand a small constant capacitor under the reverse-bias state.By this assumption, the SRD circuits can be simplified to twoseparate circuits called the input circuit and the outputcircuit.

However, such an idealized model cannot be directly usedin commercial circuit simulators since the circuit-solving algo-rithms used by simulators are based on algorithms like theNewton]Raphson algorithm. Therefore, constitutive relation-ships of the device must be differentiable with respect tovoltage and current, and these derivatives with respect tovoltage and current should be continuous too.

Recently, a new model was proposed by Zhang andw xRaisanen 3 . Based on this model, computer-aided designs of¨ ¨

w xSRD circuits were realized 4, 5 . However, so far, the C]Vcharacteristic of microwave SRDs has not been verified ex-perimentally.

In previous models, the series resistance is considered as aconstant resistor. Its value is determined by the dc measure-ment. No published work has investigated the voltage depen-dence of the series resistance of an SRD.

Direct measurement on the C]V characteristic of a mi-crowave SRD with a capacitance bridge presents some practi-cal difficulties because the reverse-biased capacitance couldbe less than 1 pF. Indirect measurement should be used toobtain the C]V characteristic of the diode. One of thesetechniques is to measure the S-parameters of the diode byusing a microwave network analyzer.

In general, the device under test is mounted in a transmis-sion line test fixture. The S-parameters are obtained by using

a network analyzer. Then, the S-parameters of the device arede-embedded from the test fixture. When the S-parametersof the device are known, the parameters of the device canbe determined by fitting the equivalent circuit to the de-embedded S-parameter, or can be calculated analytically.

Sometimes de-embedding the S-parameters of the devicefrom the test fixture presents difficulty and inaccuracy. Theerror would also accumulate in the determination of thedevice parameters. For example, in a whisker contact testfixture, the shape of the whisker cannot be kept the sameeach time when mounting a diode. The inductance of awhisker is, however, closely related to the shape of it. Somemethod for the characterization of a test fixture may be

w xdestructive to the device under test 6 . In this case, theshort-circuited mount was obtained by burning out thedevice.

One solution to this problem is to directly fit the S-param-eters of the equivalent circuits representing both the testfixture and the device to the measured S-parameters. As longas the test fixture has a simple and well-featured structure,the device parameters determined by this technique can bevery accurate. And the measurements for the characteriza-tion of the test fixture itself can be omitted.

In this paper, a simple transmission line test fixture is firstdesigned for the characterization of SRD chips. The tech-nique of characterizing SRDs by using a network analyzer isdescribed in detail. Two SRD chips are measured by usingthis technique. The C]V characteristic and the voltage de-pendence of the series resistance are extracted from themeasured S-parameters. Based on these results, a more accu-rate model of the step recovery diode has been developed.

II. DESIGN OF TEST FIXTURE

A transmission line whisker contact test fixture is designedfor mounting SRD chips. A geometrical outline of a typicalSRD chip with a mesa structure is illustrated in Figure 1. Thewhisker contact has been widely used for microwave andmillimeter-wave diodes. A classic mounting structure using a

w xwhisker contact is the Sharpless mount 7 , which is still incommon use. There are many variations based on this theme.Normally, these structures are for mounting a dot-matrixdiode into a waveguide.

w xAs for a test fixture, Boric et al. 6 designed a mountingstructure by using a whisker contact. Based on this theme, an

Figure 1 Geometrical outline and equivalent circuit of an SRDchip. Unit is millimeters

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 17, No. 3, February 20 1998 201

Figure 2 Schematic diagram of the test fixture

improved test fixture is designed. Figure 2 shows a schematicdiagram of the designed fixture. The whole structure is basedon a coaxial transmission line structure. The diameter of thecircular cavity, where the whisker and the diode chip arelocated, is designed to be the same as that of the sliding post.It enables the fixture to be used for different diode chips withdifferent heights, and for the whiskers with different shapesas well. The diameter of the outer conductor of the K-con-

w xnector 8 bead is made the same as that of the coaxial cavitytoo. This simplifies the fixture electrically by eliminating the

w xstep capacitance 6 . Finally, the larger circular cavity makesassembly of the diode, sometimes called whiskering, mucheasier.

The test fixture block is divided into two parts: the bottomblock and the cover. The bottom block accommodates aK-connector glass bead with a whisker, a K-connector spark-plug launcher, and a sliding post. The cover, which is notshown in Figure 2, is just another half of the circular cavity.The K-connector is a reliable, 2.92 mm device that operatesup to 46 GHz. It consists of a glass bead and a launcherwhich provides connections to other devices or connectors.The small 0.3 mm center conductor of the bead introduces aminimal discontinuity.

w xThe whisker is made by a conventional method 9 . Thematerial used for the whisker here is the commonly usedphosphor bronze wire with a diameter of 25 mm. The wire issoldered onto one end of the K-connector bead. The bend ismade under a microscope by using two pins assembled inmicromanipulators. The contacting end of the whiskerŽ .whisker point is sharpened by a chemical etching process.The etching process is also used to control the length of thewhisker. The length of the whisker along the axis is finallymade to be between 0.5]1.0 mm.

The sliding post is made of bronze. A force fit between thepost and the bottom block is used for accurate positioningand good electric contact. A diode chip can be soldered orglued onto the post. While soldering or gluing the chip,uniform pressure should be applied on the top of the chip tolet the chip be evenly fixed on the post. The gravitationalforce of a piece of flat glass is enough for this purpose. Thetransparent glass helps to see where and how the chip ispositioned during the process.

Whiskering the diode is performed under a microscope.First, the bead with a whisker is assembled into a launcher.The launcher is carefully screwed into the bottom block with

the cover removed, and the post with a chip on the top of it isslid in from another end of the bottom block. An obviouslyfar enough distance should be left between the whisker pointand the chip. Then, the block is put under a microscope, andthe post is pushed to contact the anode of the diode chip tothe whisker point. After a good contact is checked by asimple dc measurement, the bottom block is closed by thecover. Now, the diode chip is ready for measurements.

III. CHARACTERIZATION OF A STEP RECOVERY DIODE

Characterization of an SRD is performed by using a vectornetwork analyzer. All of the measurements needed for thecharacterization are carried out with the same whiskering.

By using only one whiskering to characterize an SRD chip,the errors resulting from different whiskering for characteri-zation purposes can be eliminated. As the whiskering usuallytakes much time and patient work, one-whiskering characteri-zation provides a fast and accurate technique to characterizean SRD chip.

The SRD chip under test is an HP 5082-0008 chip. Thetypical chip reverse-bias capacitance given by the manufac-turer is 0.38 pF. The transition time is typically 60 ps. Thegeometrical outline and its equivalent circuit are illustratedin Figure 1, where R represent the series resistance, andsŽ . Ž .I V and C V represent the I]V and C]V characteristics of

the diode chip, respectively.The I]V characteristic can be obtained through a dc

measurement. The measured results on two SRD chips areplotted in Figure 3. The diode parameters, like the idealityfactor h and the saturation current I , are extracted andslisted in Table 1.

It should be noted that the series resistance R can besobtained through a dc measurement if it is considered asvoltage independent. Up to now, there have been no pub-lished data on the voltage dependence of R on the biass

Ž .voltage. Here, the R V relationship will be determinedsfrom S-parameter measurements which are used to obtainthe C]V characteristic. The values of R listed in Table 1 aresthe values extracted from the dc measurement.

Figure 3 Measured I]V characteristics of SRDs

TABLE 1 Parameters Extracted from DC Measurements

Ž . Ž .Chips h I A R Vs s

y13SRD 1 1.4 1.2 ? 10 4.5y1 3SRD 2 1.41 1.2 ? 10 4.5


The S-parameter measurement with a vector networkanalyzer is straightforward. The levels of the RF signal arey13 dBm for chip 1 and y10 dBm for chip 2. The frequencyis swept from 45 MHz to 18.045 GHz with an incrementalstep of 45 MHz. The measured S-parameters are stored in aformat which can directly be used in the circuit simulatorŽ W .Microwave Design Systems , MDS . The two chips weremeasured with two different whiskers for comparison. Foreach chip, the measurements, including dc measurement,were carried out with a single whiskering.

In order to extract the device parameters, an equivalentcircuit for both the test fixture and the diode chip is created.A schematic of the circuit is illustrated in Figure 4, in whichthe equivalent circuit of the test fixture is represented byL , Coaxial 1, and Coaxial 2. Coaxial 1 models the coaxialwsktransmission line formed by the central conductor of theK-connector bead and the wall of the circular cavity. Coaxial

Ž .2 models the coaxial line filled with glass Corning 7070 ,which has a dielectric constant of 4.

The equivalent circuit of the diode chip consists of threeŽ . Ž . Ž . Ž .elements C V , I V , and R V , where I V is governedd d s d

by

qVŽ .I s I exp y 1 . 1d s ž /ž /hkT

Using this equivalent circuit, the diode parameters can beextracted by fitting the S-parameters of the equivalent circuitto the measured S-parameters. The fitting is carried out byusing the optimizer in MDS.

First, the effects of different element values of the equiva-lent circuit on the S-parameters of the equivalent circuit havebeen investigated. Judging by the differences of the phaseand magnitude of S , the effects of different elements can11be distinguished. For example, the capacitance of the diodesignificantly changes the shape and phase of S at the11low-frequency end of the sweeping band, whereas the induc-tance of the whisker affects the shape and phase of S11mainly at the high end of the band.

Then, the passive element values of the equivalent circuitshould be determined. A few sets of the measured S-parame-ters corresponding to different dc voltage are fitted by theequivalent circuit. The fitting is carried out by optimizing allelement values of the equivalent circuit. In theory, the pas-sive element values of the equivalent circuit above should notchange with the applied dc voltage. However, the extractedvalues may vary a bit due to the inaccuracy of the measure-ment and the equivalent circuit. The average values of these

Ž .elements are used for extraction of C]V and R V . Thesesvalues are listed in Table 2.

Figure 4 Schematic of the equivalent circuit of the test fixture andthe SRD chip

TABLE 2 Passive Element Values of the Test Fixture

Whisker Length of Coaxial 1 Length of Coaxial 2 Lw skŽ . Ž . Ž . Ž .No. mm mm pH tg d

1 5.78 0.74 560 0.0052 5.92 0.74 646 0.008

Ž .Figure 5 Fitting of S-parameters at V s 0 V SRD 1

Ž .Figure 6 Fitting of S-parameters at V s 0.5 V SRD 1

The fitting of S-parameters at different dc voltages isillustrated in Figures 5]7. The agreement between the mea-sured S-parameters and the S-parameters of the equivalentcircuit is very good.

Once the passive element values are determined, thediode parameters can be extracted by fitting the measuredS-parameters to the S-parameters of the equivalent circuit.

Ž .The extracted C]V and R V are plotted in Figure 8.s

IV. MODELING OF SRD

The mechanism utilized in the step recovery diode is thecharge storage. The effect of the minority carrier chargestorage is to cause finite reverse currents to flow until chargeinjected at forward bias is either extracted or has recom-bined. In the step recovery diode, an effort is made to controlthe location of the stored charge through the use of built-inelectrical fields. As a result, the reverse conduction can endvery abruptly.


Ž .Figure 7 Fitting of S-parameters at V s 0.805 V SRD 1

Ž .Figure 8 C]V and R V characteristics obtained from the mea-ssured results

Under forward bias, minority carriers are injected into theneutral region. The excess carrier densities represent a storedcharge, which is a function of the barrier voltage. A diffusioncapacitance associated with this stored charge can be ex-

w xpressed as 10

qVŽ .C s C exp 2f f 0 ž /hkT

where q is the electron charge, V is the barrier voltage, h isthe ideality factor, k is the Boltzmann constant, T is thetemperature, and C is a constant which is associated withf 0the diode structure. Since the relationship of C and thef 0diode structure is quite complicated, we shall use the mea-sured C]V curve to extract this parameter.

In reverse bias, the depletion capacitance can be calcu-lated as

C0 Ž .C s 3gr Ž .1 y Vrf

where C is the capacitance at zero bias, f is the contact0potential, and g is a parameter which is determined by theprofile of junction doping. For an abrupt junction, g s 0.5;for a linearly graded junction, g s 0.33.

Ž .The equation 3 is valid only for V - f. Although it isuseful in applications where the diode is always reversebiased, it is not suitable for a general harmonic-balance

Ž .analysis or a dc analysis, for that matter where the biasvoltage may exceed f. So the model needs to be extendedinto the forward-biased region.

To increase the range of operation of the model, it iscommon to extend the capacitance into the region V ) f

w xusing a linear extrapolation 11 . To do this, choose a suchŽ .that 0 - a - 1. Let the previous equation 3 be valid for

V - af, and for V - af, use

Ž . Ž . X Ž .Ž . Ž .C V s C af q C af V y af 4r f r r

XŽ . Ž .where C V is the derivative of C V with respect to V.r rŽ .This definition of C V ensures that, when joined with C ,r f r

the capacitance and its derivative are continuous. For thesake of simplicity, we use C ]V to refer to the model definedr

Ž . Ž .by Eqs. 3 and 4 .In Figure 9, we redraw the measured C]V curve of chip 1

with logarithm scale of C. We can see that the capacitance ofthe SRD is a depletion capacitance up to V s 0.5, where1C s 1.1 pF. From V s 0.66 V, where C s 8.5 pF, it turns1 2 2into a diffusion capacitance. The curves C ]V and C ]V aref r

Ž . Ž . y20obtained by using Eqs. 2 ] 4 with C s 7.5 = 10 F, g sf 00.33, and a s 0.99.

From V to V is the transition region where a voltage1 2w xramp forms. In the previous Zhang and Raisanen’s model 3 ,¨ ¨

the linear C]V relationship was used. According to themeasured result shown in Figure 9, a more complicatedrelationship should be established to model this process.

This transition process begins when the stored chargeunder forward bias becomes exhausted under the reversebias. The uncompensated mobile charge density builds up atthe two boundaries, and the charge space region appears atthe two sides of the i-region with the center region still

Ž .flooded with carriers uncombined electrons and holes . Thisuncompensated mobile charge density forms built-in fieldswhich accelerate the charge extraction process. Finally, thecharge in the center region is completely exhausted, and thediode ceases to conduct.

The capacitance variation associated with this transitionprocess is similar to the depletion capacitance, but has adifferent effective doping profile due to the appearance ofthe stored charge. Therefore, the following modified deple-

Figure 9 Measured and modeled C]V curves of SRDs


tion capacitance model can be used to describe this process:

mŽ .C s 5nramp Ž .1 y Vrf

where m and n are constants which can be determined byusing the continuity conditions for the beginning and end ofthis process, i.e.,

C s C , when V s Vramp 1 1

Ž .C s C , when V s V . 6ramp 2 2

Ž . Ž .Using Eqs. 5 and 6 , we obtain

C1log nž / VC 221 Ž .n s and m s C 1 y . 72 ž /f y V f2

log ž /f y V1

Ž . Ž . Ž .Combining Eqs. 2 , 3 , and 5 , we obtain the complete C]Vmodel of the SRD as

C¡ 0, V F Vg 1Ž .1 y Vrf

m~ , V - V - V Ž .nC s 81 2Ž .1 y Vrf

qVC exp , V G V .f 0 2¢ ž /hkT

V. DISCUSSION

Through the measured C]V result, we have modeled theŽ .SRD using Eq. 8 . This model can be easily implemented in

a circuit simulator. The R ]V characteristic is more compli-scated. Just before conduction of the diode starts, R firstsdecreases, then in the transition region rapidly increases,reaching a peak value, and finally drops again. However, Rsdoes not vary much with the voltage. So, the values of Rsextracted through dc measurements may still be used tomodel the diode.

VI. CONCLUSION

This paper has presented a fast and accurate technique forthe characterization of microwave step recovery diodes. Asimple transmission line test fixture is designed for the char-acterization of SRD chips. Two SRD chips are measured byusing this technique. Based on the measured results, a moreaccurate model of the step recovery diode has been devel-oped.

REFERENCES

1. J. L. Moll and S. A. Hamilton, ‘‘Physical Modeling of the StepRecovery Diode for Pulse and Harmonic Generation Circuits,’’Proc. IEEE, Vol. 57, July 1969, pp. 1250]1259.

2. S. Hamilton and R. Hall, ‘‘Shunt Mode Harmonic Genera-tion Using Step Recovery Diodes,’’ Microwa e J., Apr. 1967,pp. 69]78.

3. J. Zhang and A. V. Raisanen, ‘‘A New Model of Step Recovery¨ ¨Diodes for CAD,’’ 1995 Int. IEEE MTT-S Symp. Dig., Orlando,FL, May 1995, pp. 1459]1462.

4. W. Konrath and H. Brauns, ‘‘First Fully CAD of a K-BandSampling Phase Detector Using Periodic Steady State Analysisand Sophisticated SRD-Modeling,’’ 26th European Microwa eConf., Prague, Czech Republic, Sept. 1996, pp. 973]976.

5. J. Zhang and A. V. Raisanen, ‘‘Computer-Aided Design of Step¨ ¨Recovery Diode Frequency Multipliers,’’ IEEE Trans. Microwa eTheory Tech., Vol. 44, Dec. 1996, pp. 2612]2616.

6. O. Boric, T. J. Tolmunen, E. Kollberg, and M. A. Frerking,‘‘Anomalous Capacitance of Quantum Well Double-BarrierDiodes,’’ Int. J. Infrared Millimeter Waës, Vol. 13, No. 6, 1992, pp.799]814.

7. W. M. Sharpless, ‘‘Gallium Arsenide Point-Contact Diodes,’’ IRETrans. Microwa e Theory Tech., Vol. MTT-9, No. 1, 1961,pp. 6]10.

8. WILTRON Product Catalog.9. S. Lidholm, ‘‘Low-Noise Mixers for 80]120 GHz,’’ Res. Rep. 129,

Research Lab. of Electronics, Chalmers Univ. of Sweden, 1977,139 pp.

10. M. T. Faber, J. Chramiec, and M. E. Adamski, Microwa e andMillimeter-Wa e Diode Frequency Multipliers, Artech House, Nor-wood, MA, 1995.

Ž .11. ‘‘Appendix A}Using Symbolically-Defined Devices SDDs ,’’ HPMDS Designer’s Task Reference, Vol. 2}Creating Circuits asSchematics, 1995.

Q 1998 John Wiley & Sons, Inc.CCC 0895-2477r98

DIELECTRIC-RESONATOR-LOADEDMICROSTRIP ANTENNA FORENHANCED IMPEDANCE BANDWIDTHAND EFFICIENCYJacob George,1 C. K. Aanandan,1 P. Mohanan,1 K. G. Nair,1

H. Sreemoolanathan,2 and M. T. Sebastian21 Department of ElectronicsCochin University of Science and TechnologyCochin 682 022, Kerala, India2 Regional Research LaboratoryTrivandrum, Kerala, India

Recei ed 10 September 1997

ABSTRACT: A new method for enhancing the 2:1 VSWR impedancebandwidth of microstrip antennas is presented. Bandwidth enhancementis achie ed by loading the microstrip antenna by a ceramic microwaë

( )dielectric resonator DR . The älidity of this technique has been estab-lished using rectangular and circular radiating geometries. This methodimproës the bandwidth of a rectangular microstrip antenna to more

(than 10% f 5 times that of a conëntional rectangular microstrip)antenna with an enhanced gain of 1 dB. Q 1998 John Wiley & Sons,

Inc. Microwave Opt Technol Lett 17: 205]207, 1998.

Key words: antennas; microstrip antenna; bandwidth; dielectricresonator

INTRODUCTION

Microstrip antennas find far-reaching applications in the cur-rent communication scenario due to their unique propertieslike light weight, ease of fabrication, low production cost, lowprofile, etc. The fields of application of these antennas aremainly limited by their inherent disadvantage of low-imped-ance bandwidth. Two commonly used microstrip radiatinggeometries are rectangular and circular. Techniques areavailable in the literature for improving the impedance band-

w xwidth of microstrip antennas 1]4 . However, these methodswill increase the complexity of the system or, in most of thecases, reduce the antenna gain.

In this letter, a method for improving the impedancebandwidth of a microstrip antenna using a dielectric res-


characterization and modeling of step recovery diodes

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