chihou lee, terry yao, alain mangan, kenneth yau, miles copeland*, sorin voinigescu university of...
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![Page 1: Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau, Miles Copeland*, Sorin Voinigescu University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical &](https://reader036.vdocument.in/reader036/viewer/2022062421/56649dc85503460f94abd742/html5/thumbnails/1.jpg)
Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau,
Miles Copeland*, Sorin Voinigescu
University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical & Computer Engineering
* Professor Emeritus, Carleton University, Ottawa, ON, Canada.
SiGe BiCMOS 65-GHz BPSK Transmitter and 30 to 122 GHz LC-Varactor VCOs with up to
21% Tuning Range
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Outline
• Motivation
• VCO and BPSK transmitter circuit topologies
• Design methodology for lowest phase noise
VCOs
• Experimental results
• Conclusions
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Motivation
• Advanced communications (60-GHz radio)
and radar systems (77-GHz cruise control).
• Investigate a systematic VCO design
methodology focused on lowest phase noise.
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Outline
• Motivation
VCO and BPSK transmitter circuit topologies
• Design methodology for lowest phase noise
VCOs
• Experimental results
• Conclusions
![Page 5: Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau, Miles Copeland*, Sorin Voinigescu University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical &](https://reader036.vdocument.in/reader036/viewer/2022062421/56649dc85503460f94abd742/html5/thumbnails/5.jpg)
• Differential Colpitts Configuration
• C2 implemented as accumulation-mode
nMOS varactor.
• Cascode for improved isolation of output
from resonant tank, and power gain.
• LEE & Resistive tail bias with low-pass filter
to reduce bias circuit’s noise contribution.
Fundamental Mode VCO Topology
21
21
EQ CC
CCC,
EQB
OSC CL2
1
πf
21
2
m
CC
gResistance Neg.
ω
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Push-Push VCO Topology
• Active and passive components
operate at ½ output frequency
• Similar topology as fundamental-
mode VCO except output is
taken at Q2 & Q4’s base.
• Intrinsically isolated output.
• Allows differential tuning
(VTUNE+POS, VTUNE,-NEG).
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35-GHz VCO (Fund.) 70-GHz VCO (Push-Push)
VCO Schematics
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BPSK Transmitter Schematic
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Outline
• Motivation
• VCO and BPSK transmitter circuit topologies
Design methodology for lowest phase noise
VCOs
• Experimental results
• Conclusions
![Page 10: Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau, Miles Copeland*, Sorin Voinigescu University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical &](https://reader036.vdocument.in/reader036/viewer/2022062421/56649dc85503460f94abd742/html5/thumbnails/10.jpg)
VCO Design Parameters:
• VTANK – tank voltage swing
• QTANK – tank quality factor
• JBIAS – current density
• C1:C2 – capacitance ratio
• LB – base inductance
• IBIAS – bias current
Designing for Lowest Phase Noise
R
LQ B
TANK
ω
Simulation Test Circuit
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1. Optimum C1:C2 Ratio
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2. Optimum Current Density (JBIAS)
OPTIMUM JBIAS = optimum noise current density (Jopt) of cascode.
OPTIMUM JBIAS
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3. Optimum Bias Current (IBIAS)
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3. Optimum Base Inductance (LB)
Smallest LB results in Lowest Phase Noise
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VCO Design Methodology
1. Maximize quality factor (Q) of resonant tank.
2. Bias transistors at optimum noise current density Jopt.
Show a simulated plot of Jopt @ 40 GHz & fT, fMAX for cascoded transistor configuration
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VCO Design Methodology (con’t)
4. Choose smallest reproducible base inductance (LB).
5. Sweep IBIAS to minimize phase
noise while choosing C1:C2 ratio
to maximize VTANK while
maintaining fosc.
6. Add inductive emitter
degeneration LE.
[Li and Rein, JSSC 2003]
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VCO Design Space Examined
13 VCOs & Oscillators fabricated to examine
the impact on phase noise of:
1. Base inductance (LB)
2. Accumulation-mode nMOS varactors versus. MIM
capacitors
3. Addition of LE
4. Operation on 2nd harmonic versus. operation on
fundamental.
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Outline
• Motivation
• VCO and BPSK transmitter circuit topologies
• Design methodology for lowest phase noise
VCOs
Experimental results
• Conclusions
![Page 19: Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau, Miles Copeland*, Sorin Voinigescu University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical &](https://reader036.vdocument.in/reader036/viewer/2022062421/56649dc85503460f94abd742/html5/thumbnails/19.jpg)
• Jazz Semiconductor’s commercial SBC18 0.18 m
BiCMOS process.
Fabrication Technology
• Peak fT and fMAX
near 155 GHz.
NFmin extracted from measured y-parameters [S. P. Voinigescu, et. al, JSSC 1997]
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Varactor Q Characteristics
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Microphotographs
Family of 13 VCOs: Fundamental-Mode: (8) 35 GHz, (2) 60 GHz,
Push-Push: (1) 70 GHz, (2) 120-GHz
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Microphotographs (con’t)
65-GHz BPSK transmitter
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35-GHz VCO Measurements
Averaged Spectral Plots for 35-GHz VCO
(LB = 100 pH, with LE):
(A) VCO (B) Fixed Freq. Oscillator
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35-GHz VCO Measurements (con’t)
Tuning and Output Power Characteristics:
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Lowest Phase Noise Design Space
Impact of: 1. Base Inductance
2. Inductive Emitter Degeneration (LE)
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60-GHz VCO Measurements
Averaged Spectral Plots:
(A) VCO (B) Fixed Freq. Oscillator
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60-GHz VCO Measurements (con’t)
Measurements over Temperature:
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Push-Push VCO Measurements
Spectral Plots:
(a) 70-GHz VCO
POUT > -14 dBm
(b) 120-GHz VCO
POUT > -30 dBm
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Push-Push VCO Measurements (con’t)
Tuning Characteristics:
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Si-Based mm-wave VCO Comparison
Reference VCOL{foffset}
(dBc/Hz)Tuning Range
PDC (mW)
POUT (dBm)
FOM * fT/fMAX
(26-GHz) -87 at 100 KHz 15% 75 1.0 -177.5 ~ 40/50 GHz (BJT)
(40-GHz) -97 at 1 MHz 15% 17.3 -5.0 -171.7 0.13 m (SOI)
(43-GHz) -110 at 1 MHz 26% 280 6.5 -184.7 ~ 200 GHz (HBT)
(77-GHz) -95 at 1 MHz 6% 930 14.3 -177.3 ~ 200 GHz (HBT)
(63-GHz) pp -85 at 1 MHz 4% 119 -4.0 -156.2 0.25 m CMOS
(150-GHz) pp -85 at 1 MHz 23% 170 -5.0 -161.2 ~ 220 GHz (HBT)
35-GHz Osc. -112.7 at 1 MHz N/A 193 4.0 -184.5 ~ 155 GHz (HBT)
35-GHz VCO -110.3 at 1 MHz 19% 188 4.0 -181.4 ~ 155 GHz (HBT)
60-GHz Osc. -104 at 1 MHz N/A 244 4.0 -179.5 ~ 155 GHz (HBT)
60-GHz VCO -103 at 1 MHz 13% 240 4.0 -178.6 ~ 155 GHz (HBT)
70-GHz VCO pp -94 at 1 MHz 21% 128 > -14 < -156.8 ~ 155 GHz (HBT)
*FOM = L{foffset} - 20log(fosc/foffset) + 10log(PDC/POUT)
pp = push-push VCO
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With DATA (231-1 PRBS):
BPSK Transmitter Measurements
No DATA:
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BPSK Transmitter Meas. (con’t)
With DATA (27-1 PRBS pattern):
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Outline
• Motivation
• VCO and BPSK transmitter circuit topologies
• Design methodology for lowest phase noise
VCOs
• Experimental results
Conclusions
![Page 34: Chihou Lee, Terry Yao, Alain Mangan, Kenneth Yau, Miles Copeland*, Sorin Voinigescu University of Toronto - Edward S. Rogers, Sr. Dept. of Electrical &](https://reader036.vdocument.in/reader036/viewer/2022062421/56649dc85503460f94abd742/html5/thumbnails/34.jpg)
• Presented, with experimental validation, a systematic VCO design methodology for lowest phase noise.
• Compared to a MIM capacitor, accumulation-mode nMOS varactors degrades phase noise by 1-2 dB.
• Inductive degeneration lowers phase noise by 3-4 dB.
• Operation on 2nd harmonic increases tuning range by 50% - at expense of lower POUT
• First 65-GHz BPSK transmitter.
Conclusions
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• Jazz Semiconductor, Gennum Corporation.• Canadian Foundation for Innovation,
Micronet, Canadian Microelectronics Corporation, NSERC.
• Marco Racanelli and Paul Kempf.
Acknowledgements