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CMSIS-RTOS
Niall Cooling
Feabhas Limited
www.feabhas.com
CMSIS
• Cortex ™
• Microcontroller
• Software
• Interface
• Standard
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ARM Cortex™ Family
• A Series – “Application” – MMU – Linux, Android, Windows
• R Series – “Real-Time” – MPU
• M Series – “Microcontroller” – Optional-MPU
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CMSIS
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FPGA
8-bit PIC 8051 AVR
Traditional ARM-7 User RTOS/Middleware C/C++ / JTAG Silicon vendors
M0 M0+
M3
M1
M4
DSP / FPU Single cycle 16,32-bit MAC Single cycle dual 16-bit MAC 8,16-bit SIMD arithmetic Hardware Divide (2-12 Cycles)
ARMv7
ARMv6
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CMSIS Versions
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v1 Core
CMSIS v1.x
• Cortex ™ -M3 & Cortex ™ -M0
• Core Peripheral Access Layer
– Cortex-M Core Register Access
– Cortex-M Instruction Access
– NVIC Access Functions
– SysTick Configuration Function
• Instrumented Trace Macrocell (ITM)
– Cortex ™ -M3 ITM Debug Access
• ITM_SendChar
– Cortex ™ -M3 additional Debug Access
• ITM_ReceiveChar
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CMSIS Versions
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v1 Core
v2 DSP
CMSIS v2.x
• Cortex ™ -M4 • DSP Software Library
– Basic math functions – Fast math functions – Complex math functions – Filters – Matrix functions – Transforms – Motor control functions – Statistical functions – Support functions – Interpolation functions
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CMSIS Versions
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v1 Core
v2 DSP
v3 RTOS
CMSIS 3.x
• V3.0 Announced at Embedded World 2012
– Feb 2012
– Latest Version 3.01
• May 2012
• Standardized API for Real-Time Operating System (RTOS) kernels
– RTX with CMSIS-RTOS API under Open Source License
• Support for System View Description (SVD) XML files
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quasi-concurrent programming
Alarm Mgmt
Configuration
Data Acquisition
MMI
Control
Comms
Real-Time Operating System
Cortex ™ -M
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RTOS Onion
• Real-Time Operating System (RTOS) 300Kb - 2Mb
• Real-Time Executive (RTX) ~ 4Kb - 30Kb
• Real-Time Kernel (RTK) < 1Kb - 5Kb
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Real-Time Operating System
• Kernel (RTK) – Scheduling – Mutual exclusion
• Executive (RTE) – Inter-task communication & synchronisation – Memory management
• RTOS – File management System
• FAT file system
– Networking • E.g. TCP/IP, CAN
– Graphical User Interface support • E.g. OpenGL, Embedded Qt
CMSIS-RTOS
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RTOS APIs • Create a task/thread
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// Keil RTX Example OS_TID t_blinky; // Declare a task ID for blink __task void blinky(void) { while(1) { LPC_GPIO2->MASKED_ACCESS[1] = ~LPC_GPIO2->MASKED_ACCESS[1]; // Toggle bit 0 os_dly_wait (50); // delay 50 clock ticks } } __task void init (void) { t_blinky = os_tsk_create (blinky, 1); // Create a task "blinky" with priority 1 os_tsk_delete_self (); }
/* FreeRTOS Example */ void vTaskCode( void* pvParameters ) { for( ;; ) { LPC_GPIO2->MASKED_ACCESS[1] = ~LPC_GPIO2->MASKED_ACCESS[1]; vTaskDelay(50); // delay } } /* Function that creates a task. */ void vOtherFunction( void ) { static unsigned char ucParameterToPass; xTaskHandle xHandle; xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle ); vTaskDelete( xHandle ); }
/* Segger emBOS Example */ OS_STACKPTR int StackHP[128]; /* Task stacks */ OS_TASK TCBHP; /* Task-control-blocks */ /********************************************************************/ static void TaskEx(void* pData) { while (1) { LPC_GPIO2->MASKED_ACCESS[1] = ~LPC_GPIO2->MASKED_ACCESS[1]; OS_Delay ((OS_TIME) pData); } } int main(void) { OS_IncDI(); /* Initially disable interrupts */ OS_InitKern(); /* initialize OS */ OS_InitHW(); /* initialize Hardware for OS */ OS_CREATETASK_EX(&TCBHP, "HP Task", TaskEx, 100, StackHP, (void*) 50); OS_Start(); /* Start multitasking */ return 0; }
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CMSIS v3 Architecture
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Cortex ™ -M Hardware
CMSIS-Core
RTOS
CMSIS-RTOS
Application
CMSIS-DSP
CMSIS-RTOS API
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#include "cmsis_os.h" // CMSIS RTOS header file osThreadId thread1_id; void job1 (void const *argument) { // thread function 'job1' while (1) { : // execute some code osDelay (10); // delay execution for 10ms } } // define job1 as thread function osThreadDef(job1, osPriorityAboveNormal, 1, 0); int main (void) { … thread1_id = osThreadCreate(osThread(job1), NULL); … }
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CMSIS-RTOS Features
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CM
SIS-
RTO
S thread management
mutual exclusion
inter-thread communication & synchronization
dynamic memory management
Thread Management
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CM
SIS-
RTO
S thread management
define & create
control
priority
delay / yield mutual exclusion
inter-thread communication &
synchronization
memory management
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Mutual Exclusion
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CM
SIS-
RTO
S thread management
mutual exclusion
semaphore
mutex
inter-thread communication & synchronization
dynamic memory management
Documented API
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Inter-Thread Comm & Sync
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CM
SIS-
RTO
S thread management
mutual exclusion
inter-thread communication & synchronization
Signals
Message Queues
Mail Queue (mailbox)
ISR comms
dynamic memory management
Memory Management
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CM
SIS-
RTO
S thread management
mutual exclusion
inter-thread communication &
synchronization
dynamic memory management
memory pools
create
alloc (malloc)
calloc
free
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CMSIS-RTOS v3 Example
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Cortex ™ -M Hardware
CMSIS-Core
Keil RTX
CMSIS-RTOS
Application
CMSIS-DSP
The RTX implementation has a small memory footprint and uses only 7KB ROM and 320 bytes RAM when compiled with the ARM C/C++ Compiler
CMSIS v3 Architecture
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RTK
CMSIS-RTOS
Application
FreeRTOS
CMSIS-RTOS
emBOS
CMSIS-RTOS
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cmsis_os.h
/// Thread Definition structure contains startup information of a thread. /// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS. typedef const struct os_thread_def { os_pthread pthread; ///< start address of thread function osPriority tpriority; ///< initial thread priority uint32_t instances; ///< maximum number of instances of that thread uint32_t stacksize; ///< stack size requirements in bytes } osThreadDef_t;
osThreadId osThreadCreate (osThreadDef_t *thread_def, void *argument);
/// Entry point of a thread. /// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS. typedef void (*os_pthread) (void const *argument);
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/// Priority used for thread control. /// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS. typedef enum { osPriorityIdle = -3, ///< priority: idle (lowest) osPriorityLow = -2, ///< priority: low osPriorityBelowNormal = -1, ///< priority: below normal osPriorityNormal = 0, ///< priority: normal (default) osPriorityAboveNormal = +1, ///< priority: above normal osPriorityHigh = +2, ///< priority: high osPriorityRealtime = +3, ///< priority: realtime (highest) osPriorityError = 0x84, ///< system cannot determine priority or thread has… } osPriority;
API macro expansion
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// cmsis_os.h #define osThreadDef(name, priority, instances, stacksz) \ osThreadDef_t os_thread_def_##name = \ { (name), (priority), (instances), (stacksz) }; #define osThread(name) \ &os_thread_def_##name
#include "cmsis_os.h" // CMSIS RTOS header file void job1 (void const *argument) { // thread function 'job1' … } osThreadDef(job1, osPriorityAboveNormal, 1, 0); int main (void) { … thread1_id = osThreadCreate(osThread(job1), NULL); … }
// define job1 as thread function osThreadDef_t os_thread_def_job1 = \ { (job1), (osPriorityAboveNormal), (1), (0) }; int main (void) { … thread1_id = osThreadCreate(os_thread_def_job1 , NULL); … }
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CMSIS v3 Adaption
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Application
FreeRTOS
CMSIS-RTOS
Object definition via macros cmsis_os.h
Function call translation cmsis_os.c
xTaskCreate
osThreadCreate osThreadDef
cmsis_os.c (FreeRTOS) FiFi-SDR Project
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83 /// Create a thread and add it to Active Threads and set it to state READY. 84 /// \param[in] thread_def thread definition referenced with \ref osThread. 85 /// \param[in] argument pointer that is passed to the thread function as start argument. 86 /// \return thread ID for reference by other functions or NULL in case of error. 87 /// \note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS. 88 osThreadId osThreadCreate (osThreadDef_t *thread_def, void *argument) 89 { 90 (void) argument; 91 xTaskHandle handle; 92 uint32_t stackSize; 93 94 95 stackSize = thread_def->stacksize ? thread_def->stacksize / 4 : configMINIMAL_STACK_SIZE; 96 xTaskCreate((pdTASK_CODE)thread_def->pthread, 97 (const signed portCHAR *)thread_def->name, 98 stackSize, 99 NULL, 100 makeFreeRtosPriority(thread_def->tpriority), 101 &handle); 102 103 return handle; 104 }
221 typedef const struct os_thread_def { 222 char * name; 223 os_pthread pthread; 224 osPriority tpriority; 225 uint32_t instances; 226 uint32_t stacksize; 227 } osThreadDef_t;
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Some Reaction
• Who wins when Cortex-M adds RTOS?
– Richard Barry of FreeRTOS.org
– EE Times 6/3/12
• ChibiOS/RT free embedded RTOS
– forum.chibios.org
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Summary
• Opens up lots of possibilities – Training classes – Easier library support
• Network (e.g. lwip) • File system
• Some have expressed concerns – “lowest common denominator” – Adaption layer overhead
• As always, time will tell – community support – mbed
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Thank You
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Niall Cooling Feabhas Limited 5 Lowesden Works Lambourn Woodlands Hungerford Berks. RG17 7RY UK +44 1488 73050 www.feabhas.com niall.cooling(at)feabhas.com @feabhas blog.feabhas.com uk.linkedin.com/in/nscooling
ARM Software Courses
• ARM Software Courses available from Feabhas: – ARM Cortex-A5 MPCore Software Development – ARM Cortex-A5 Software Development – ARM Cortex-A8 Software Development – ARM Cortex-A9 MPCore Software Development – ARM Cortex-A9 Software Development – ARM Cortex-M0 Software Design – ARM Cortex-M3/M4 Software Design – ARM Cortex-R4 Software Development – ARM Embedded Software Optimization – ARM1136/76 Software Development – ARM7/9 Software Development
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