coded track circuit system...circuits that range up to 22,000 ft. in length (@ 3 ohms ballast/1000...

SERVICE MANUAL 6470A645 Russell StreetBatesburg, SC 29006

MICROTRAXCODED TRACK CIRCUIT SYSTEM

April 1996COPYRIGHT 1996, UNION SWITCH & SIGNAL INC.PRINTED IN USA

UNION SWITCH & SIGNAL

An ANSALDO Affiliated Company

CODED TRACK CIRCUIT/ END-OF-SIDING CONTROLLERCODED TRACK CIRCUIT/ CAB SIGNAL CONTROLLER

APPLICATION LOGIC PROGRAMMING

TABLE OF CONTENTS

SM 6470A 4/96 i

I. GENERAL INFORMATION ............................................................................................... 1-1

1.1 PURPOSE.......................................................................................................................... 1-1

1.2 INTRODUCTION................................................................................................................ 1-1

1.2.1 Track Communications....................................................................................................... 1-1

1.2.2 Local Inputs and Outputs.................................................................................................... 1-3

1.2.3 Serial Communications ...................................................................................................... 1-3

1.2.4 Internal/Programming-Related Functions .......................................................................... 1-3

1.2.4.1 General............................................................................................................................... 1-3

1.2.4.2 Site-Specific Programming................................................................................................. 1-4

1.2.4.3 System-Level Programming ............................................................................................... 1-4

1.2.5 Hardware Configuration...................................................................................................... 1-5

1.3 SPECIFICATIONS (PROGRAMMING-RELATED)............................................................ 1-7

1.3.1 Track Communications....................................................................................................... 1-7

1.3.2 Serial Communications ...................................................................................................... 1-8

1.3.3 Local I/O ............................................................................................................................. 1-8

II FUNCTIONAL DESCRIPTION .......................................................................................... 2-1

2.1 BASIC OPERATING PRINCIPLES.................................................................................... 2-1

2.1.1 Vital Design ........................................................................................................................ 2-1

2.1.2 Diagnostics ......................................................................................................................... 2-1

2.1.3 Stable System Function...................................................................................................... 2-1

2.2 ERRORS AND EVENT LOGGING .................................................................................... 2-2

2.2.1 Critical Errors...................................................................................................................... 2-2

2.2.2 Static and Dynamic Warnings ............................................................................................ 2-2

2.2.3 Track Shunting Events ....................................................................................................... 2-2

2.2.4 User-Defined Events .......................................................................................................... 2-2

2.3 VITAL LOCAL COMMUNICATIONS.................................................................................. 2-2

2.3.1 Acquiring Inputs.................................................................................................................. 2-2

2.3.2 Vitality of Inputs .................................................................................................................. 2-3

2.3.2.1 Redundant Reading............................................................................................................ 2-3

2.3.2.2 Input Instability Check ........................................................................................................ 2-3

2.3.2.3 Verification of Less Restrictive Bit...................................................................................... 2-3

2.3.2.4 Bit Latching......................................................................................................................... 2-3

2.3.2.5 Stuck Bit Check .................................................................................................................. 2-3

2.3.2.6 Shorted Input Check........................................................................................................... 2-4

TABLE OF CONTENTS

ii SM 6470A 4/96

2.3.3 Delivering Outputs .............................................................................................................. 2-4

2.3.4 Vitality of Outputs ............................................................................................................... 2-5

2.3.4.1 Stability Interval .................................................................................................................. 2-5

2.3.4.2 Reading Monitors ............................................................................................................... 2-5

2.3.4.3 Stuck Output ("Flip") Check................................................................................................ 2-5

2.3.4.4 Lamp Filament Tests.......................................................................................................... 2-5

2.3.5 Conditional Power Supply................................................................................................... 2-7

2.3.5.1 Basic Function .................................................................................................................... 2-7

2.4 VITAL SERIAL COMMUNICATIONS................................................................................. 2-7

2.4.1 General............................................................................................................................... 2-7

2.4.2 Communications Modes..................................................................................................... 2-7

2.5 OPERATING MODES ........................................................................................................ 2-8

2.5.1 Basic................................................................................................................................... 2-8

2.5.2 Prior State Routine ............................................................................................................. 2-9

2.5.3 CPS Powered Down Recovery........................................................................................... 2-9

2.5.4 System Loading................................................................................................................ 2-10

2.5.5 Track Communications..................................................................................................... 2-10

2.5.5.1 General............................................................................................................................. 2-10

2.5.5.2 Message Validity............................................................................................................... 2-11

2.5.5.3 Application Logic - Track Interface Information................................................................ 2-11

2.5.5.4 Track Code Types ............................................................................................................ 2-11

2.5.5.5 Transmission Code Selection........................................................................................... 2-12

2.5.5.6 Receive Code Acceptance ............................................................................................... 2-12

2.5.5.7 Shunting and Code Reception.......................................................................................... 2-12

2.5.5.8 System Bit Operations...................................................................................................... 2-14

III SYSTEM-LEVEL PROGRAMMING PROCEDURES........................................................ 3-1

3.1 INTRODUCTION................................................................................................................ 3-1

3.2 PROGRAMMING LANGUAGE - GENERAL DESCRIPTION............................................ 3-1

3.2.1 Main Program Sections and Statements............................................................................ 3-1

3.2.2 Introductory Sample Program............................................................................................. 3-2

3.2.3 Basic Format ...................................................................................................................... 3-4

3.2.4 Comments .......................................................................................................................... 3-4

3.2.4.1 General............................................................................................................................... 3-4

3.2.4.2 Compiler Switches.............................................................................................................. 3-5

TABLE OF CONTENTS

SM 6470A 2/96 iii

3.2.5 Tokens................................................................................................................................ 3-5

3.2.5.1 Reserved Words................................................................................................................. 3-6

3.2.5.2 Delimiters............................................................................................................................ 3-7

3.2.5.3 User-Defined Bits ............................................................................................................... 3-7

3.2.6 Bit Uses and Types ............................................................................................................ 3-8

3.2.6.1 Status in an Assign Statement ........................................................................................... 3-8

3.2.6.2 Timer Bits ........................................................................................................................... 3-9

3.2.6.3 Pre-Defined Bits ................................................................................................................. 3-9

3.2.6.4 Configuration Bits ............................................................................................................. 3-11

3.3 PROGRAMMING LANGUAGE - DETAILED DESCRIPTION ......................................... 3-13

3.3.1 Introduction....................................................................................................................... 3-13

3.3.2 Program Statement .......................................................................................................... 3-14

3.3.3 Interface Section............................................................................................................... 3-14

3.3.3.1 Track Interface Section .................................................................................................... 3-14

3.3.3.2 Local I/O Interface Section ............................................................................................... 3-15

3.3.3.3 Slave Interface Section..................................................................................................... 3-19

3.3.3.4 Non-Vital /IO /Local Control Panel ................................................................................... 3-19

3.3.4 Configuration Section ....................................................................................................... 3-20

3.3.5 Internal Bit Definitions ...................................................................................................... 3-21

3.3.6 Timer Section ................................................................................................................... 3-21

3.3.7 Begin Statement ............................................................................................................... 3-23

3.3.8 Logic Specification............................................................................................................ 3-23

3.3.8.1 General............................................................................................................................. 3-23

3.3.8.2 Expression........................................................................................................................ 3-23

3.3.9 End Statement.................................................................................................................. 3-25

3.4 SUMMARY OF PROGRAMMING GUIDELINES............................................................. 3-25

3.5 DETAILED PROGRAM EXAMPLE .................................................................................. 3-26

3.6 PROGRAMMER GUIDELINES - PROGRAM EXECUTION............................................ 3-39

3.6.1 General............................................................................................................................. 3-39

3.6.2 Timer List.......................................................................................................................... 3-39

3.6.3 Trigger List........................................................................................................................ 3-39

3.6.3.1 General............................................................................................................................. 3-39

3.6.3.2 Breaks-Before-Makes Rule .............................................................................................. 3-39

3.6.4 Sample Execution - Timer and Trigger Lists .................................................................... 3-40

3.6.5 Cyclic Logic ...................................................................................................................... 3-42

TABLE OF CONTENTS

iv SM 6470A 4/96

IV DEVELOPMENT SYSTEM................................................................................................ 4-1

4.1 INTRODUCTION................................................................................................................ 4-1

4.2 M.T.D.S. AVAILABLE FILES.............................................................................................. 4-2

4.3 ENVIRONMENT TABLE .................................................................................................... 4-2

4.4 M.T.D.S. - COMPILER ....................................................................................................... 4-3

4.4.1 General............................................................................................................................... 4-3

4.4.2 Symbol Table Listing .......................................................................................................... 4-4

4.4.3 Comments Symbol and Page Generator Compiler Switch ................................................ 4-5

4.5 M.T.D.S. - SIMULATOR ................................................................................................... 4-12

4.5.1 General............................................................................................................................. 4-12

4.5.2 Access to Simulator.......................................................................................................... 4-12

4.5.3 Standard Formats............................................................................................................. 4-13

4.5.4 Simulator Operation.......................................................................................................... 4-14

4.5.4.1 General............................................................................................................................. 4-14

4.5.4.2 Sample Program............................................................................................................... 4-14

4.5.4.3 Help Screen...................................................................................................................... 4-14

4.5.4.4 Display I/O Command ...................................................................................................... 4-16

4.5.4.5 Display Triggers Command.............................................................................................. 4-16

4.5.4.6 Display Relays Command ................................................................................................ 4-18

4.5.4.7 Display Timers Command................................................................................................ 4-18

4.5.4.8 Display Configuration ....................................................................................................... 4-19

4.5.4.9 Value Command............................................................................................................... 4-19

4.5.4.10 Remove Command .......................................................................................................... 4-20

4.5.4.11 No Display Command....................................................................................................... 4-20

4.5.4.12 Color/Monochrome Commands ....................................................................................... 4-20

4.5.4.13 Run Command ................................................................................................................. 4-22

4.5.4.14 Execute Command........................................................................................................... 4-24

4.5.4.15 Increment Command........................................................................................................ 4-24

4.5.4.16 Trace Command............................................................................................................... 4-25

4.5.4.17 Relay Set and Clear Commands...................................................................................... 4-25

4.5.4.18 Input Command................................................................................................................ 4-26

4.5.4.19 Print Command................................................................................................................. 4-28

4.5.4.20 Read Command ............................................................................................................... 4-29

4.5.4.21 Pause and Continue Commands ..................................................................................... 4-30

4.5.4.22 Reset Command............................................................................................................... 4-30

TABLE OF CONTENTS

SM 6470A 2/96 v

4.5.4.23 Reconfiguration Command............................................................................................... 4-31

4.5.4.24 Quit Command ................................................................................................................. 4-32

4.5.5. Simulator Diagnostics............................................................................................................. 4-32

4.6 EPROM FILE FORMAT & PROGRAMMING......................................................................... 4-33

V SUPPLEMENTAL DATA ................................................................................................... 5-1

5.1 COMPILER ERROR MESSAGES ..................................................................................... 5-1

5.1.1 Token Errors....................................................................................................................... 5-1

5.1.2 Syntax Errors...................................................................................................................... 5-1

5.1.3 Semantic Errors.................................................................................................................. 5-2

5.2 SUMMARY OF HARDWARE ADJUSTMENTS................................................................. 5-3

5.2.1 CPU Module Circuit Board ................................................................................................. 5-3

5.2.2 CPU Module Front Control Panel....................................................................................... 5-4

5.2.3 Color Light and Searchlight Lamp Driver Modules - Front Control Panel .......................... 5-4

APPENDIX A

PARTS LIST (DEVELOPMENT SYSTEM COMPONENTS)

APPENDIX B

EOS SERIAL LINK BOARD AND CABLE DIAGRAMS

B.1 Introduction...............................................................................................................................B-1

B.2 Development System for EOS Serial Link Board.....................................................................B-1

B.3 Switch Settings and Displays on the EOS Serial Link Board ...................................................B-2

B.4 Important Notes ........................................................................................................................B-7

B.4.1 Additional Error Codes .............................................................................................................B-7

B.4.2 Differences between MICROLOK and the EOS Serial Link Board ..........................................B-7

APPENDIX C

EOS M.T.D.S. - EPROM PROGRAMMER

C.1 General.....................................................................................................................................C-1

C.2 Initial Set-up..............................................................................................................................C-1

C.3 Programmer Operation.............................................................................................................C-2

TABLE OF CONTENTS

vi SM 6470A 4/96

APPENDIX D

USING THE CHIPLAB TO PROGRAM MICROTRAX APPLICATION PROMS

D.1 Background ..............................................................................................................................D-1

D.2 Programming an Application ....................................................................................................D-1

D.3 Selecting the Type of PROM....................................................................................................D-2

D.4 Performing A Blank Check of the Device.................................................................................D-2

D.5 Selecting the File and Programming the PROM ......................................................................D-2

D.6 Obtaining the Checksum of the PROM ....................................................................................D-4

D.7 Exiting the Driver ......................................................................................................................D-5

APPENDIX E

MICROTRAX SLEEP MODE DESCRIPTION

E.1 Introduction...............................................................................................................................E-1

E.2 Detailed Description .................................................................................................................E-1

E.3 Application Notes......................................................................................................................E-2

ILLUSTRATIONS

Figure 1-1 General System Application ......................................................................................... 1-2

Figure 1-2 General Configuration of Equipment ............................................................................ 1-6

Figure 3-1 Introductory Program Example..................................................................................... 3-3

Figure 3-2 ASSIGN Operators, Sample Execution...................................................................... 3-25

Figure 3-3 Advanced Program Example...................................................................................... 3-28

Figure 3-4 Route Aspect Table (Per Figure 3-3) ......................................................................... 3-33

Figure 3-5 Color Light Wiring - Board 1 (Per Figure 3-3) ............................................................ 3-34

Figure 3-6 Color Light Wiring - Board 2 (Per Figure 3-3) ............................................................ 3-35

Figure 3-7 Isolated I/O Wiring - Board 3 (Per Figure 3-3) ........................................................... 3-36

Figure 3-8 Searchlight Wiring - Board 1 (Per Figure 3-3)............................................................ 3-37

Figure 3-9 Searchlight Wiring - Board 2 (per Figure 3-3) ............................................................ 3-38

Figure 4-1 MICROTRAX�

Development System Basic Diagram .................................................. 4-1

Section I GENERAL INFORMATION

6470A 4/96 1-1

1.1 PURPOSE

This manual provides instructions for system-level application logic programming of the MICROTRAX�Coded Track Circuit System. Refer to SM-6470B for the following information:

1. Hardware installation, adjustment, application and maintenance2. Signal lamp voltage and track circuit shunting sensitivity adjustment3. Site-specific configuration set-up and monitoring (using portable PC)4. The various types of MICROTRAX hardware configurations.

1.2 INTRODUCTION (see Figure 1-1)

1.2.1 Track Communications

The MICROTRAX Coded Track Circuit is a solid-state, microprocessor-based track and line circuitsystem designed to work in non-electrified territory. It combines the functions of train detection andline wire circuitry, with all communications carried through the rails. Vital integrity is maintainedthrough detection of broken rails and failed insulated rail joints.

A single MICROTRAX unit can be used to control two ends of track circuits at an intermediate or end(control) point location. The track code signal format is AC. This signal is connected to the railsthrough a Track Interface Panel consisting of a transformer and a heavy current inductor. Impedanceis 10 ohms at 150 Hz and rises with increasing frequency. This makes the MICROTRAX systemcompatible with highway crossing motion and predictor equipment without requiring external blockingunits. Additionally, the track is terminated at a very low impedance to the frequency components of thecoded messages. This enables compatible operation with wide-band terminating shunts and trackcircuits that range up to 22,000 ft. in length (@ 3 ohms ballast/1000 ft.).

An optional Quick Shunt Module reduces the system's 6 -12 second shunt response time to less than0.10 seconds (comparable to relay-based track circuits).

Track circuit user adjustments available with the MICROTRAX system include:

1. Enable/disable of each adjacent track circuit2. Length definition: 0 to 36,000 ft. in 1000 ft. increments3. Track length adjustment and disabling using on-site PC or unit front

panel switches4. 20 user-defined standard codes with 12 second acceptance time5. 2 user-defined fast codes with 6 second acceptance time

(typically used for tumble-down and sleep)6. Forced shunt using shunt/link-up code.


1-2 SM 6470A 4/96

Figure 1-1. General System Application


6470A 4/96 1-3

1.2.2 Local Inputs and Outputs

The MICROTRAX system provides direct drive of color or searchlight signals. Signal lamp outputs areregulated and can be adjusted for the desired lamp voltage (refer to SM-6470B). Hot and cold filamentchecks and searchlight mechanism checks are provided. Orderly signal downgrades in advance canbe provided (selected in the application logic) and communication through the track is uninterrupted.The application program can be written such that a lamp-out condition that does not affect the intendedaspect can be reported to the control point for maintainer attention. The user can program a signaldowngrade if a failed lamp prevents display of an intended aspect.

The MICROTRAX system also provides logic inputs and outputs that are isolated from battery.Isolation is required for I/O running outside the MICROTRAX equipment case/house in accordancewith double-break circuit design. Isolated outputs can be used to operate a 250-ohm load such as aswitch lock coil, but can be used to operate any 12 volt relay. Typical uses of isolated inputs include:

1. NWP inputs from a remote location.2. Set signal to red in response to high water or reversed switch input.3. Fast train shunt detection (in conjunction with Quick Shunt Module)

The MICROTRAX system also provides logic inputs and outputs that do not require isolation frombattery. These are used for I/O within the MICROTRAX equipment house/case. Non-Isolated I/O aretypically used in an interface to a relay-based interlocking control system.

At any location where a MICROTRAX unit is driving a vital external output, the unit is equipped with avital cut-off relay (VCOR), which controls power to these outputs. (The VCOR is internal to theMICROTRAX Coded Track and Cab Signal units, and external to the EOS unit.) This relay isenergized so long as CPU internal diagnostics are passed. Any vital failure causes the relay to drop,thus removing power from all outputs. An optional circuit (EOS unit only) can be set up to light a redsignal lamp through the back contact of the VCOR when a vital shutdown occurs.

1.2.3 Serial Communications

The MICROTRAX system can be connected to the US&S MICROLOK�

Vital Interlocking Controlsystem, MICROLOK PLUS� Vital + Non-Vital Control Package or EOS Serial Link Module through adedicated serial communications link. Dual serial ports on the MICROTRAX unit permit daisy-chainconnection of up to 16 units under the control of the vital link master.

The serial communications port wiring can also be used for signal cross-lighting on double-track right-of-way. (Two hand-shake signals are used to pass one bit of information back and forth; actual serialcommunications is not used.) This eliminates the need for complex cross-lighting set-ups.

1.2.4 Internal/Programming-Related Functions

1.2.4.1 General

The MICROTRAX system is controlled by a single microprocessor and standard Executive software.The system CPU constantly performs internal and external diagnostics and generates a conditionaloutput signal so long as diagnostics are successful. Failure of any vital diagnostic results in removal ofthe conditional signal which, in turn, results in removal of power to all outputs.

The MICROTRAX unit provides various normal and fault event displays such as power status, lampand misc. I/O on/off, serial communications status and CPU diagnostics. Additional displays assist theuser with on-site programming and hardware adjustments.


1-4 SM 6470A 4/96

1.2.4.2 Site-Specific Programming

Site-specific programming (e.g. unit ID, number of signal heads) is contained in an EEPROM mountedin the cardfile (inside of motherboard), not the CPU module. This arrangement allows CPU modules tobe interchanged between MICROTRAX cardfiles, without having to transfer EPROMs between CPUboards.

Site-specific programming is accomplished through a separate RS-232 serial port on the CPU module,using a portable computer. This same port is also available for system debugging and maintenance.The computer runs a special software package that provides the following functions:

1. Read/set of system clock2. Display unit configuration3. Reconfiguration of unit4. Display memory addresses5. Monitor application logic and application bits6. Display logged errors and events7. Capture data into disk files

1.2.4.3 System-Level Programming

System-level application functions such as unit type (e.g. end point or intermediate) are contained in anEPROM on the CPU module. The MICROTRAX Development System (M.T.D.S.) allows the user todesign and program system-level logic in familiar relay-logic terms. Development system componentsinclude compiler software, EPROM "burn-in" software and program simulation.

The MICROTRAX unit is capable of operating with various I/O configurations using the sameapplication program. The flexibility of the application program enables one program to be used indifferent locations with varying I/O. Two different types of configuration items are available: pre-defined and user defined. User defined items are used solely by the application program. Pre-defineditems control unit operations. These include:

1. I/O board configurations2. Track A/B enable/disable3. Track circuit length4. Lamp head 2 enable/disable5. Vital slave link parameters

Resulting capabilities include:

1. Writing an application logic program that does not permit any field re-configurations.

2. Writing an application logic program that permits various I/O configurations usingthe same application logic program.

3. Defining defaults so that units do not require reconfiguration unless changes arerequired.

4. User-defined configurations under the complete control of the application.


6470A 4/96 1-5

1.2.5 Hardware Configuration

Each MICROTRAX system consists of an electronics cardfile, one or two Track Interface Panels andan optional Quick Shunt Module. The system cardfile houses various combinations of plug-in printedcircuit modules, each with its own front edge control/display panel. A US&S PN-150HD relay is usedfor those applications with vital outputs (e.g. to signal lamps). This relay is controlled by the systemlogic and controls power to all vital local outputs. (The relay does not affect the operation of trackcommunications or the vital serial link.) The Track Interface Panel carries all track codecommunications between the rails and the cardfile and serves as a filter for unwanted track signals andvoltage transients. The optional Quick Shunt Module is provided for heavy traffic applications wherethe fastest possible train shunt response is needed. It reduces the detection time (of the MICROTRAXcardfile system only) from approximately 6 - 12 seconds to approximately 100 milliseconds.

MICROTRAX system component options are listed in Service Manual 6470B. Table 1-1 and Figure1-2 show the baseline coded track unit. See SM6470B for the hardware configuration of the codedtrack circuit/ end-of-siding controller and the coded track circuit/ cab signal controller. Note that thecardfile I/O boards also have a number reference in addition to the letter reference. This is inaccordance with descriptors in the application logic program.

Table 1-1. MICROTRAX System Equipment

Ref. Component Options Application OptionsA Vital Power/Failover Relay Applications with vital outputsB System Power Supply Module All applications

C (1*) Color Light Driver Module

Searchlight Driver Module

Non-Isolated I/O Module

Side A or B color lightsignals2 battery-isolated inputs

Side A or B searchlightsignals2 battery-isolated inputs

4 non-isolated (from battery)inputs4 non-isolated (from battery)inputs

D (2*) Same as item C above Same as item C above E (3*) Isolated I/O Module 4 battery-isolated inputs

2 battery-isolated outputsF Track Interface Module All applicationsG Sleep Mode Module Remote, low-traffic areas (power

conservation)H CPU Module All applicationsI Track Interface Panel Intermediate, repeater

locations: 2

End (control point) locations:1

J Quick Shunt Module Heavy traffic areas

*"Board" location number in application logic program.


1-6 SM 6470A 4/96

I

QU

ICK

SHU

NT

MO

DU

LE

J

TRA

CK

INTE

RFA

CE

PAN

EL

Figure 1-2. General Configuration of Equipment


6470A 4/96 1-7

1.3 SPECIFICATIONS (PROGRAMMING-RELATED)

1.3.1 Coded Track Communications

Track Circuit Length: Using Single-Track Panel: Up to 22,000 ft. (@ 3ohms/1000 ft. ballast)

Using Dual-Track Panel: Up to 18,000 ft. (@ 3ohms/1000 ft. ballast)

T.C. Length (by rail type,rail weight and ballast): Single-Track Panel

Welded Rail*

Weight @3 ohms @4 ohms @5 ohms

100# 21K ft. 25K ft. 29K ft.118# 22K ft 26K ft. 30K ft.136# 22K ft. 27K ft. 31K ft.145# 23K ft. 27K ft. 32K ft.

Bonded Rail*

Weight @3 ohms @4 ohms @5 ohms

100# 18K ft. 22K ft. 25K ft.118# l9K ft. 23K ft. 26K ft.136# l9K ft. 23K ft. 27K ft.145# 20K ft. 25K ft. 27K ft.

*Assumes 100 ft. or shorter #6 AWG (0.78 ohm) trackleads at both ends. Longer leads: Reduce max. distanceby 1K ft. for each additional 100 ft. leads.

Dual-Track Panel: Refer to section 3.1.2

Track Codes: 22 (max.) available for user application1 fixed codes for internal functions

Code Format: Bipolar

Message Characteristics: 167 or 333 mS pulsesAmplitude: 2 VP-PMessage length: 2.0 sec.Complete transmit/receive cycle: 6 sec.

Standard Shunt Response: Detect: 6 to 12 sec.Clear: 12 to 18 sec. (application logic dependent)

Quick-Shunt Option: Detect: 100 msec. (approx.)


1-8 SM 6470A 4/96

ALL SYSTEMS

Track Interface Inductance: - Track Panel N451835-0101: 10 mH- Track Panel N451835-0102: 15 mH- Track Panel N451835-0103: 20 mH- Track Panel N451850-0104: 40 mH

1.3.2 Serial Communications

Cardfile Serial Data Ports: Coded Track and Cab Signal: A vital Slave port forMICROTRAX consisting of two 25-pin “D” connectors fordaisy-chaining of units

End-of-Siding:- A vital Slave port for MICROTRAX consisting of two 25-pin “D” connectors for daisy-chaining of units

- 1 vital Master port for MICROTRAX- MICROTRAX link

- 1 vital Slave port for MICROLOK- MICROTRAX link

- 1 non-vital Slave port for GENYSIS- MICROTRAX link

Communications Modes: All links: EIA RS-423 (RS-232C compatible)

Baud Rates: Vital links: 150, 300, 600, 1200, 1800, 2400 BPS (default:1200 BPS)

Non-vital links: 150, 300, 600, 1200, 1800, 2400, 4800,9600 BPS

MICROTRAX Vital Serial Up to 32 serial input bitsI/0 Bits: Up to 32 serial output bits

CPU Module 9-Pin Port: EIA RS-232: 1200 and 4800 BPSIBM PC compatible (DOS)

1.3.3 Local Signal and Relay I/O

Color Light/Searchlight Part nos: N451910-1501/N451910-2001 orSignal Module N451910-7301

Inputs: 2 isolated inputs per moduleOutputs: 2 signal heads per module

Coded track cardfile: 0, 1 or 2 modules

End-of-siding cardfile: 0, 1 or 2 modules


6470A 4/96 1-9

Single-cab cardfile: 0, 1 or 2 modules

Dual-cab cardfile: 0 modules

Non-Isolated I/O Module: Part no.: N451910-1901

Inputs: 4 non-isolated inputs per moduleOutputs: 4 non-isolated outputs per module


End-of-siding cardfile: 0 modules

Single-cab cardfile: 0 modules


Non-Isolated I/O Module: Part no.: N451910-660X

Inputs: 4 non-isolated inputs per moduleOutputs: 4 non-isolated outputs per module


End-of-siding cardfile: 0, 1, 2 or 3 modules

Single-cab cardfile: 0, 1 or 2 modules

Dual-cab cardfile: 0 or 1 module

Isolated I/O Module: Part no.: N451910-2101

Inputs: 4 isolated inputs per moduleOutputs: 2 isolated outputs per module

Coded track cardfile: 1 module


Single-cab cardfile: 0 modules


Coder Output Module: Part no.: N451910-5801

Outputs: 2 non-isolated outputs per module (1 output normallyused for direction)

Coded track cardfile: 0 modules



1-10 SM 6470A 4/96

Single-cab cardfile: 0 or 1 module

Dual-cab cardfile: 0, 1 or 2 modules

Local Control Panel: Part no.: N451821-2001

Non-Vital Inputs: 5 inputs per panelNon-Vital Outputs: 2 outputs per panel

Coded track cardfile: 0 panels

End-of-siding cardfile: 1 panel

Single-cab cardfile: 0 panels

Dual-cab cardfile: 0 panels

OS Track PCB : Part no.: N451810-6701

Outputs: 2 outputs per PCB (designed to be a MICROTRAX inputonly)

Coded track cardfile: 0 PCBs

End-of-siding cardfile: 1 PCB

Single-cab cardfile: 0 PCBs

Dual-cab cardfile: 0 PCBs

Section II FUNCTIONAL DESCRIPTION

6470A 4/96 2-1

2.1 BASIC OPERATING PRINCIPLES

NOTE

This section discusses aspects of MICROTRAX systemoperation related to system safety.

2.1.1 Vital Design

The MICROTRAX system is designed to operate according to the same basic vitality principles as anequivalent relay-based system, specifically:

Less Restrictive/More Restrictive State - When an input or output is recognized as a 0, this is the most restrictive state. When the input or output is recognized as a 1, this is the less restrictive state.

Failures to Zero - An output or input cannot fail to the less restrictive state. Certain failures can cause an input to be falsely recognized as a 0. This type of failure is permitted because a zero implies the most restrictive state.

The MICROTRAX software is also designed to assure safe operation of the system, specifically:

Application Logic - The MICROTRAX unit is strictly a logic interpreter that executes and verifies the user's application logic. The application logic must be designed to prevent any unsafe actions. Operational testing of the application logic program is possible with the MICROTRAX Development System simulator (refer to section 4.4). The simulator verifies that the application program accurately represents the logic to be performed. The MICROTRAX Executive software is designed to verify that the application logic is executed correctly. The Executive is not capable of detecting and responding to an unsafe configuration inthe application logic. If an unsafe configuration exists, the Executive will still carry out the programming.

2.1.2 Diagnostics

The MICROTRAX system uses software-driven internal diagnostics designed to insure the safestpossible operation. Two types of diagnostics are used: background and intrinsic: Backgrounddiagnostics perform a unique function separate from the functional code and are not required for basicsystem operation. Examples include EPROM check sums and CRC tests, timer comparisons androutine trace checks. Intrinsic diagnostic are an integral part of the functional code. For example,certain sections of the code process two sets of data to verify data integrity.

2.1.3 Stable System Function

The MICROTRAX system is event driven. It does not serially read inputs, then perform logic and thendeliver outputs. Instead, it reads inputs on a scheduled basis and, if input changes occur that alterlogic, the affected portion of the application logic is scheduled. Once the logic has run, outputs arescheduled for delivery. Only outputs from a "stable system" can be delivered to the field.

A stable system exists when the effects of one or more bit changes have fully propagated through thelogic. The system is designed so that all of that logic will be executed before outputs can be delivered.This prevents delivery of intermediate outputs after only a portion of the application logic had beenexecuted.


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Also as an example, inputs are read and changes trigger some logic. When all logic is executed, thesystem is marked as stable and outputs are readied for delivery, even if more inputs change statebefore these outputs are delivered. The outputs may be sent because they are the result of a stablesystem. The requirement that no intermediate logic outputs be delivered is not violated because thesystem became stable; changes occurred after the logic was executed.

2.2 ERRORS AND EVENT LOGGING

The MICROTRAX system incorporates an error table and a data/event logger. The error table is usedto count the number of times any error or warning has been logged. Its range is 0 to 240. This errortable is displayed in the DISPlay STATus menu on the CPU Module front panel. An event queue is alsoprovided to log events, and is capable of holding 275 events. Events are described in the followingsections.

2.2.1 Critical Errors

Critical Errors result in a system shut down. Then the unit goes through a power-up reset process. Alloutputs are deenergized. Refer to SM-6470B for a detailed listing of critical error codes.

2.2.2 Static and Dynamic Warnings

Warnings do not always result in a system shutdown. For example, when a color light lamp failure isdetected, a warning is logged stating that a lamp filament has failed. A static warning is merely logged.When a dynamic warning occurs, the event will only be logged if another event for the same warninghas not been previously logged. For example, in the case of a lamp filament failure event, thediagnostics that detect filament failures are run very frequently. If an event were logged every time thatdiagnostic failed, the event queue logging memory would be quickly filled. To prevent this, a filamentfailure is only logged if the warning count is zero (first instance of this warning). Refer to SM-6470B fora detailed listing of static and dynamic warnings.

2.2.3 Track Shunting Events

Track shunting events indicate when a track circuit is shunted and when the shunt is removed. Thereare two shunt-related events for each track circuit. Thus, at an intermediate location, four possibleevents can be logged. A "Remove Shunt" event can also be logged. This logs the brief, intermediatestate between a presence of a shunt and the absence of a shunt. Refer to section 2.5.5 for additionalinformation.

2.2.4 User-Defined Events

Two user-defined bits are provided in the application logic that enable logging of special events notavailable in the standard error/event log listing. Refer to section 3.2.5.3 for additional information on theuse of these bits.

2.3 VITAL LOCAL COMMUNICATIONS

2.3.1 Acquiring Inputs

MICROTRAX inputs are acquired through a module-by-module sampling process that is completedonce every 100 msec. The general procedure during a normal (non-fault) input cycle is as follows:

1. All inputs on a module are scanned and passed to a "bit string manager".

2. The new input values are compared against values sampled during the previous modulescan to identify bits that have changed state.


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a. If a bit has changed from a less restrictive state ("1") to a more restrictive state ("0"), thechange is immediately accepted (continue to step 3 of this procedure).

b. If a bit has changed from a more restrictive state ("0") to a less restrictive state ("1"), it isscanned four times. The bit must show a "1" on all four consecutive scans to beaccepted.

3. Accepted bits are put into the memory, triggering all application program equations thatmake use of these bits.

2.3.2 Vitality of Inputs

2.3.2.1 Redundant Reading

Each scan of inputs consists of several samples of those inputs. This function is designed to filter outtransient state changes that may be caused by interfering external signals such as a high-frequencysignal. In most cases samples match, thus validating the bit. However, if a discrepancy is observed,the read is repeated. If the discrepancy persists, the read is repeated a second time (three total readsper scan cycle). If matching reads cannot be obtained, the inputs are marked as unstable.

2.3.2.2 Input Instability Check

After three consecutive reads of unstable inputs on one scan cycle, the inputs are left as previouslyscanned. On the next 100 msec. scan, if the unstable readings persist for three consecutive reads,then all inputs on that particular module are flagged as unstable and set to the more restrictive state("0"). Warnings are also logged stating that all inputs have been declared invalid and will remain assuch until the inputs become stable and pass several validity/stability checks.

2.3.2.3 Verification of Less Restrictive Bit

During normal operation, a change of an input bit from a more restrictive ("0") to less restrictive ("1")state is accepted after the bit is reviewed during a fourth board scan (section 2.3.1, step 2). If the lessrestrictive ("1") state is not verified ("0" on the second, third or fourth scan), the bit stays at the morerestrictive state ("0"). No error is logged. The bit must be a "1" on all four consecutive scans to beaccepted as a less restrictive input ("1"). This process implies that an input signal must be present forfour consecutive scans (100 msec. apart) to be accepted with a new state. A less restrictive-going input("1") lasting less than 400 msec. is ignored. All signals lasting longer than 400 msec. are accepted.

2.3.2.4 Bit Latching

Bit latching is the process of securing in memory any input that changes to the more restrictive state("0"), no matter how briefly. The zero state of the input is held until the processor can act on it. Forexample, if an external relay contact feeds voltage to the MICROTRAX unit and the relay momentarilydrops and picks, the loss of the voltage will be recorded as "0" and will be latched as dropped ("0"),even if the relay returns to the "1" state. This action allows the "0" state to be recognized andprocessed. After processing of the "0" state, the "1" state is then accepted.

2.3.2.5 Stuck Bit Check

To verify that all input circuits can place a bit in the more restrictive state ("0"), a standard diagnostictest is performed. This test is run approximately every 100 msec, only when an input is in the lessrestrictive state ("1"). The following is performed for each input PCB:


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1. All individual inputs on a given board are forced to the more restrictive ("0") state through aclosed loop monitor.

2. All inputs are read and verified that they can, in fact, be forced to the more restrictive state.(This test verifies that no circuit malfunctions have occurred that could stick an input in theless restrictive state).

3. Any input stuck in the less restrictive state is flagged as such with an error counter.

The error counter provides for filtering of nuisance errors, enabling all inputs to overcome momentaryproblems without immediately degrading the level of operation. If the error counter reaches a maximumlevel of errors before validity checks can clear the counter; the input is internally forced to the morerestrictive state until the input changes to a "1" and passes the stuck/ shorted bit test (refer to followingsection) at least six consecutive times.

2.3.2.6 Shorted Input Check

Once every 100 msec. all input bits are tested for possible shorts between them, using a standarddiagnostic routine in conjunction with the Stuck Bit Test. This test verifies that none of the input circuitshave malfunctioned in a way that masks the true condition of other inputs on the module under test.The test involves sequential scanning of every input on every input module:

1. The input under test (must be a "1") is forced into the more restrictive state ("0").

2. The other inputs on the module are tested to verify that none have changed state.

3. The initially forced input is returned to the less restrictive state ("1").

4. The next input is forced to the more restrictive state ("0") and all other inputs are checkedthat none have changed state.

5. Any shorted inputs are flagged as such with an error counter.

The error counter provides for filtering of nuisance errors; enabling all inputs to overcome momentaryproblems (since it is not certain if the other input actually is shorted or the input physically changedstate) without instantly degrading the level of operation. If the error counter reaches a maximum levelof errors before validity checks can clear the counter, the inputs which are shorted together areinternally forced to the more restrictive state ("0") until the inputs are fixed or change to a "1" and passthe stuck/shorted bit test at least six consecutive times.

2.3.3 Delivering Outputs

MICROTRAX outputs are delivered according to the order and timing specified in the applicationprogram. The general procedure during a normal (non-fault) output cycle is as follows:

1. Upon triggering of all logic equations and elapsing of all timer-related bits in the applicationprogram, resulting output bits are extracted from memory.

2. Output bits are delivered by the CPU to the specified output module on the next 100millisecond boundary.

3. Monitors on the output circuits return end point data to the CPU.

4. Memory-stored bits and resulting data from the output module are compared by the CPU.


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2.3.4 Vitality of Outputs

2.3.4.1 Stability Interval

When a change of input occurs and logic processing commences, the MICROTRAX logic is considered"unstable". Output bits cannot be delivered since their states may be uncertain. After the logicbecomes stable, the outputs will be delivered on the next 100 msec. output diagnostic scan cycle. Theymust be delivered no later than 0.5 seconds after the logic becomes stable again, otherwise ashutdown will occur. This action is designed to ensure that all deliverable output bits are in their mostrecent state.

2.3.4.2 Reading Monitors

A separate diagnostic routine reads the monitor circuit on each output. This test is conducted onceevery 100 msec. The output monitor test is used to ensure that the MICROTRAX system has deliveredthe correct outputs to the output modules by using the output monitor circuitry located on the modules.These output monitors allow the processor to read the values that it has written to the output modules.The monitors are read and compared to the expected image of the outputs. If these are not inagreement, a system shutdown occurs. This shutdown uses the VCOR to turn all vital outputs off.

2.3.4.3 Stuck Output ("Flip") Check

The stuck output or "flip" test determines whether an output circuit can change state. It is conductedapproximately once every 100 msec. The output flip test verifies the integrity of the output monitorcircuitry. The loop back check on the output circuits allows the Executive software to monitor the stateof the output drive circuit. The output flip test momentarily "flips" the state of the output to force themonitor to the opposite state. This proves that the monitor has not stuck and is reporting the true stateof the output driver. The outputs are then returned to the correct state. This test can be suspended;refer to section 2.3.4.4, part C.

2.3.4.4 Lamp Filament Tests

1. Hot Filament Test (LAMP ON)

A. Color Light Lamp Driver Module:

To determine whether a color light signal lamp has a missing or damaged bulb (brokenfilament), the Hot Filament Test is performed every 100 msec. If the system turns alamp on and the monitor shows no current, a recoverable lamp-out error is placed inmemory. This type of lamp failure is accessible in the application logic via the lamp-outbits. Thus, the application can be written to take action if a lamp-out occurs. If thesystem sends a lamp-off signal and the monitor shows current flowing through thecircuit, a non-recoverable error is recorded and a system shutdown is performed (powerremoved from the lamp driver circuit and all other outputs).

B. Searchlight Lamp Driver Module (N451910-2001):

To determine whether a searchlight signal lamp has a missing or damaged bulb (brokenfilament), the Hot Filament Test is performed every 100 msec. If the system turns alamp on and the monitor shows no current, a non-recoverable lamp-out error is placed inmemory. (Since this module cannot distinguish between a lamp-out condition and amechanism failure, this error is critical and produces a system shutdown). If the systemsends a lamp-off signal and the monitor shows current flowing through the circuit, a non-recoverable error is recorded and a system shutdown is performed (power removed fromthe lamp driver circuit and all other outputs).


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A mechanism check is also performed to verify that the searchlight mechanism is in thecorrect position. This test is performed on the mechanism once every 0.5 seconds. Theaspect of the mechanism under test is turned off for approximately 1.5 msec. A currentreading is taken from an analog-to-digital converter (A/D) on this module and verifiedthat the current is essentially zero. After testing, the aspect is returned to its originalposition. If the A/D reading shows current flowing then the mechanism check isperformed again on the next 100 msec. scan cycle to re-verify that the mechanism isactually faulty. If the mechanism is determined to be faulty, a non-recoverable failure isrecorded and a system shutdown is produced.

C. Searchlight Lampdriver Module (N451910-7301)

Search Light Lamp Driver Module: To determine whether a Search light signal lamp hasa missing or damaged bulb (broken filament), the Hot Filament Test is performed every100 msec. If the system turns a lamp on and the monitor shows no current, arecoverable lamp-out error is placed in memory. This type of lamp failure is accessiblein the application logic via the lamp-out bits. Thus, the application can be written to takeaction if a lamp-out occurs. If the system sends a lamp-off signal and the monitor showscurrent flowing through the circuit, a non-recoverable error is recorded and a systemshutdown is performed (power removed from the lamp driver circuit and all otheroutputs).

A mechanism check is also performed to verify that the search light mechanism is in thecorrect position. Two different tests exist when the mechanism is in the RED orYELLOW position:

- the mechanism’s correspondence input is read to verify the position of the mechanism.

- the mechanism is briefly turned off (less than one millisecond) to verify the integrity of the mechanism’s correspondence input.

If the mechanism is determined to be faulty, a non-recoverable failure is recorded and asystem shutdown is produced.

2. Filament "Flip" Test/Cold Filament Test

A. Color Light Lamp Driver Module/ Searchlight Lamp Driver Module (N451910-7301):

: During the lamp driver flip test (refer to section 2.3.4.3) with this module, the continuity ofthe lamp filament is checked when an "off" lamp output is briefly turned on. If no currentflow is recorded during this test, a lamp-out bit is set and a warning is logged. This typeof lamp-fail is accessible in the application logic so that corrective action can be taken.

B. Searchlight Lamp Driver Module (N451910-2001):

During the lamp driver flip test (refer to section 2.3.4.3), the continuity of the lampfilament is checked when an "off" lamp output is briefly turned on. If no current flow isrecorded during this test, a critical lamp-out error is placed in memory. (Since thismodule cannot distinguish between a lamp-out condition and a mechanism failure, acritical error and system shutdown results.).


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C. Suspend Test:

The Suspend Test function can be selected separately for each I/O module defined inthe application logic. When the Suspend Test bit is high ("1"), the only test that can besuspended is the momentary turn-on of an inactive output during the Stuck OutputCheck (refer to section 2.3.4.3). If the application logic turns on both the output and theSuspend Test Bit, the output is checked. If the output is turned off and the Suspend TestBit is turned on, the test of the output does not occur.

!WARNING

THE SUSPEND TEST BIT MUST BE USED WITH GREAT CAREBECAUSE OF THE LONGER TIME THAT IT CREATES FORDETECTION OF A FAULTY OUTPUT. IF OUTPUTS ARE NOTTESTED PERIODICALLY TO VERIFY THAT THEY CAN BE TURNEDON, A FAILURE MODE COULD ARISE THAT WOULD ALWAYSMAKE THE MONITOR CIRCUITS SHOW AN OFF STATE. IF THISCONDITION EXISTS WHEN ANOTHER COMPONENT FAILUREOCCURS, THE FAILURE COULD TURN ON AN OUTPUT WITHOUTA CORRESPONDING DETECTION BY THE MONITOR CIRCUIT.

2.3.5 Conditional Power Supply

2.3.5.1 Basic Function

Local inputs and outputs receive their power via a conditional power supply (CPS). If the unit isrunning properly and diagnostics are successful, the CPS is powered up and outputs and inputs areoperational. If the unit detects certain types of errors, the system will run with the CPS powered down(Selective Shutdown Mode). In this special reduced operating mode, local inputs and outputs are notoperational, but the track, vital serial links and local control panel still function. Refer to section 2.5 formore information.

2.4 VITAL SERIAL COMMUNICATIONS

2.4.1 General

Each MICROTRAX unit is equipped with redundant serial data ports to allow vital communications witha MICROLOK, MICROLOK PLUS, or MICROTRAX End-of-Siding serial link module system. Thiscommunications channel is referred to as a Vital Serial Link. These ports also allow "daisy chain"linking of up to 16 MICROTRAX units, all controlled by the same MICROLOK or MICROLOK PLUSsystem. The vital operation of this link is maintained by re-communicating all data to a station,regardless of whether input bits have changed. In all MICROTRAX Vital Serial Links, the MICROTRAXunit always functions as a Slave to a MICROLOK, MICROLOK PLUS or MICROTRAX End-of-sidingserial link module system.

2.4.2 Communications Modes

The MICROTRAX slave port utilizes EIA RS-423 (RS-232 compatible) serial communications. There isno internal provision for 20 mA current loop communications; this is accomplished with a Serial


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Communications Adapter Panel (refer to SM-6400B). The Vital Serial Link always operates in the fullduplex mode. Only control signals overlap; data messages never overlap.

A communication on a MICROTRAX Vital Serial Link consists of a string of data bits transferredsequentially. These bits make up a message that includes an address section (identifying the intendedremote unit) and the specific operating data intended for the remote unit. All messages from aMICROLOK , MICROLOK PLUS or MICROTRAX End-of-siding serial link module system are steeredby means of "stations", which are defined in the application logic of these systems.

2.5 OPERATING MODES

2.5.1 Basic

The MICROTRAX system is capable of operating in three different modes:

A. Normal: Operational: CPS powered up, I/O active, track communicationsactive

B. Selective Shutdown: Operational: CPS powered down, I/O inactive, trackcommunications active, Slave link, Local Control Panel andcross-unit control active.

C. Full Shutdown: Non-Operational: CPS powered down, I/O inactive, trackcommunications inactive

In the Selective Shutdown mode, the user must manually re-enable the CPS. This is done usingthe Reset Menu (refer to SM-6470B) or by assigning a 1 to the RESET system bit (executiverev. 4 and higher). Error filtering is provided to reduce likelihood of falsely dropping the CPSwhile running in the Normal mode.

Since the unit can operate with the CPS up or down, the application logic has access to system bitCPS.STATUS. This bit informs the application logic about the state of the CPS. If the CPS is up andI/O is operational, CPS.STATUS is set. If the unit is running in the Selective Shutdown mode,CPS.STATUS is cleared.

In “systems” running with executive rev. 4 and higher, the CPS.STATUS and RESET system bit can beused to write application logic that can attempt to restore a unit running in selected shutdown mode tonormal mode. An application logic segment follows:

TIMER

RESET_CONTROL: SET = 15:MIN CLEAR = 0:SEC;.

BEGIN.

ASSIGN ~CPS.STATUS TO RESET_CONTROL;

ASSIGN RESET_CONTROL TO RESET;

In this program, the unit will attempt to restore a unit to Normal mode 15 minutes after it enters selectiveshutdown mode. The set delay on RESET_CONTROL is needed to prevent rapid attempts to restorethe CPS in a unit that may have permanent output faults.


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2.5.2 Prior State Routine

A Prior State Routine is used to determine the operating mode of the system. Every time the system isreset, the Prior State Routine examines the number of errors recently logged and the number of resetsrecently encountered, then determines the operating mode. The following rules are observed duringthis process:

NOTE

In the following rules, total running time is defined as thesum of the MICROTRAX execution time with the exception of thetime spent in reset routines. The reset routine time is denotedby the message "RES" on the CPU module top alphanumeric display.Refer to SM-6470B for more information on reset routines.

1. System in the Normal mode and error/reset occurs:

If more than five errors occurred within 40 seconds of the total running time, or 10 resetsoccurred within 40 seconds of the total running time, the Selective Shutdown mode isentered. Otherwise, the Normal mode is continued.

2. System in Selective Shutdown mode and error/reset occurs:

If more than five errors occurred within 40 seconds of the total running time, or 10 resetsoccurred within 40 seconds of the total running time, then the Shutdown mode is entered.Otherwise, the Selective Shutdown mode is continued.

3. System in Full Shutdown mode and reset occurs:

When the system is in the Full Shutdown mode, no operations occur except toggling of thewatchdog circuit (reset inhibited). Diagnostics are also inactive. A reset can only occur asthe result of a hardware failure, power fault or operation of the RESET button on the CPUModule.

If the system resets while in the Full Shutdown mode, the unit will enter the SelectiveShutdown mode.

2.5.3 CPS Powered Down Recovery

The system will not attempt to restore an inactive CPS (unless the RAM that holds the Prior Statevariables is corrupted/cleared). Manual intervention is required. Refer to SM-6470B for the reset menuprocedures.

In systems running with executive rev. 4 and higher, the CPS.STATUS and RESET system bit can beused to write application logic that can attempt to restore a unit running in selected shutdown mode tonormal mode.


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2.5.4 System Loading

The MICROTRAX system provides several warnings/errors indicating that the system cannot performall its functions in a timely fashion. These warnings/errors indicate that the application logic is toocomplex for the MICROTRAX system to handle. The codes that will be logged in this situation are:

Error Code #2 Error Code #41 Error Code #32Error Code #40 Error Code #47 Warning Code #86Error Code #44

Refer to SM-6470B for detailed information on these codes. If these errors are continuously logged, theapplication logic must be simplified so that the MICROTRAX system can execute it in a timely fashion.

2.5.5 Track Communications

NOTE

Refer to SM-6470B for detailed information on track code formats.

2.5.5.1 General

The Track Interface Module consists of two transmitters and two receivers which are capable ofhandling two ends of a track circuit. One transmitter/receiver pair is designated the Master and theother pair the Slave. The basic function of the Track Interface Module is to transmit and receive codesvia the rails. The Master is responsible for initiating a message; the Slave will only respond when avalid message is received.

When a code transmission is made, the unit will send the first code in an output list whosecorresponding output bit is set. If no output bit is set, then system bits TRACK_TDOUT andTRACK_SLEEPOUT are examined. The first one that is set will be sent. If no output bits are set, thena "link-up" code will be sent (which forces a shunt on the receiving unit). If the unit is shunted, then thelink-up code must be received before another track code will be accepted or transmitted. Refer tosections 2.5.5.4 through 2.5.5.6 for details of these functions.

When a track code is received, special rules apply when the application logic bit is set. For any of thenormal aspect codes, the message must be received twice consecutively before it is accepted. Then,two out of three are required to keep the code selected. The special link-up, tumble down and sleepspecial codes are accepted on one reception. Refer to sections 2.5.5.4 through 2.5.5.6 for details ofthese functions.

Track transmit diagnostics are performed during a message transmission. Monitor tests are performedto verify that the hardware is sending the code intended by the CPU.

Before the actual receiver is enabled for message reception, diagnostics are performed to verify thereceive signal level, transmit signal level and to select the zero voltage level based on temperature.These diagnostics verify that the various analog-to-digital and voltage levels on the module areoperating correctly. Since some of these components vary with temperature, a temperature-compensated zero voltage or ground is needed to properly process the receive signal.


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2.5.5.2 Message Validity

Several tests are performed on a received track code to determine its validity:

1. Code must be balanced - same number of positive long pulses as negative long pulses,same number of positive short pulses as negative short pulses.

2. Number of long pulses must be 2 or 4.

3. Each pulse must fall within the window for valid long pulses or short pulses.

4. Leading and trailing guard pulses must have a valid duration and exceed a minimum area.

5. The average area for all long pulses must exceed the minimum area for the track lengthdefined.

6. The average area for the long pulses must not change more than 12% from the previousmessage.

2.5.5.3 Application Logic - Track Interface Information

The basic structure of the track interface description follows. For a detailed description, refer to section3.3.3.1.

TRACKA: testbitOUTPUT: code1.out,code2.out,...,code20.out;INPUT: code1.in, code2.in,...,code20.in;

The following system bits are automatically created for Track A:

TRACKA.NORMAL, TRACKA.LINKUP, TRACKA.TDOUT,TRACKA.TDIN, TRACKA.SLEEPIN, TRACKA.SLEEPOUT.

The same format is used for Track B. Also note that the compiler forces both Track A and Track B tobe defined, and both must have at least one input and one output defined.

2.5.5.4 Track Code Types

There are three types of track codes, some of which are available for application:

Code A: Link-Up/Shunt - This code is not directly available for application. It is used to forceshunts and permit the unit to recover from a shunt. This code is accepted on only onereception.

Codes D through W: Normal Aspect - These codes correspond to those defined in the I/Osection of the track description. They are under direct control of the application logic. Theymust be received twice before they will be accepted in the logic.

Code B (Tumble Down), Code C (Sleep) - Special Fast - These codes are available throughspecial system bits (refer to section 3.2.6.3). They are accepted in the application logic basedon only one reception.

Refer to section 3.3.3.1 for additional information on track codes.


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2.5.5.5 Transmission Code Selection

When a track code is ready for transmission, the following rules are observed:

1. If the unit is in the shunt mode, the link-up code is transmitted.

2. If the unit is not in the shunt mode, then:

A. The TRACKx OUTPUT descriptor is searched to find the first set bit (e.g., code1.out through code20.out scanned and the first set bit sent). If none are set:

B. If TRACKx.TDOUT is set, the tumble down code is sent. If this bit is not set:

C. If TRACKx.SLEEPOUT is set, the sleep code is sent. If this bit is not set:

D. Since no output code has been selected, the link-up code is sent and a shunt is forced.

2.5.5.6 Receive Code Acceptance

When the unit receives a code, it may not be immediately accepted. Several rules are followed:

1. If the unit is in the Normal or Remove Shunt mode and a link-up/shunt code is received, it isimmediately accepted and the unit shunts.

2. If the unit is in Shunt mode, the only code that will be accepted is the link-up/shunt code. Allother codes will be ignored.

3. For a normal aspect code to be accepted and marked as a such in the application logic, itmust be received twice consecutively.

4. Once a normal aspect code is selected, it will be maintained as long as it is received two outof three times. This prevents the application logic from clearing out the code if one messageis garbled or missed.

5. Only one of the track inputs bits will be set at any given time, including tumble down in andsleep in.

2.5.5.7 Shunting and Code Reception

A shunt will be declared when:

1. The link-up/shunt code is received.

2. No track activity is detected within 12 seconds.

3. No valid message is received within 12 seconds.

Once a shunt is declared, all track input bits are cleared and the TRACKx.NORMAL bit is cleared toindicate a shunt. (Refer to section 2.5.5.8 for a description of the system bits defined in the trackinterface.)


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It is possible for the unit to be in Normal mode while no track input bits are set. This can occur underthe following conditions:

1. Valid user messages are received, but never two consecutively (e. g., receipt of the codepattern D E F G D E keeps the unit in the Normal mode but no track input bits are be set).

2. Valid messages outside the defined range are received (e.g., if only three track inputs havebeen defined and code #7 is received, the unit understands that a valid code has beenreceived. Thus, the unit remains in the Normal mode, but no application input bit is set).

The examples in Table 2-1 are provided for clarification. Each entry represents a message receivedevery six seconds. In each example, the top line represents the actual code received and the bottomline represents which code is marked in the application logic. Key terms include:

0 = No valid code received. R = Unit enters Remove Shunt modeA = Link-up message. N = Unit enters Normal mode

S = Unit shunted

TIME --------->Example #1 Actual Code Received

Input Bit Set In LogicD D D E E ED D D D E E

Example #2 Actual Code ReceivedInput Bit Set In Logic

D D D E F F FD D D D O F F


D D D O D D DD D D D D D D


E E E A A E E EE E E O O O E E ^ ^ ^ S R N

Example #5 Actual Code ReceivedInput Bid Set In Logic

F F F O O O O A G G G GF F F F O O O O O G G G ^ ^ ^ S R N


H H H I H H HH H H H H H H


J J J K J K J K J K J J JJ J J J J O O O O O O J J(unit stays in normal mode)


L L L O O O A M N M N ML L L L O O O O O O O O ^ ^ ^ S R N

Table 2-1


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2.5.5.8 System Bit Operations

System bits are processed as follows:

TRACKx.NORMAL - When the unit is in normal mode, this bit is set (1). It is clear (0) at allother times.

TRACKx.LINKUP - When the unit is in Remove Shunt mode, this bit is set. It is clear at all othertimes. This bit can be used to determine if track communications have resumed after a shunt.If this bit is 1, the unit has resumed communication but the shunt has not yet been removed(e. g., the unit is in Remove Shunt mode). When this bit is set, all other track input bits areclear.

TRACKx.TDIN - When the tumble down code is received, this bit is set. It is clear at all othertimes. This bit is set based on the reception of only one message. When this bit is set, all othertrack input bits are clear.

TRACKx.SLEEPIN - When the sleep code is received, this bit is set. It is clear at all othertimes. This bit is set based on the reception of only one message. When this bit is set, all othertrack input bits are clear.

Section III SYSTEM LEVEL PROGRAMMING PROCEDURES

6470A 4/96 3-1

3.1 INTRODUCTION

The MICROTRAX application logic is specified in a Boolean Algebra format, which uses the basicoperators AND, OR, Exclusive OR (XOR) and NOT. Unlike a traditional computer program, the piecesof data in a MICROTRAX program are 2-state (only two values: zero or one). Since these are aspecial type of variable, they are referred to as bits. If needed, a bit may have an associated timedelay that specifies a slow pick-up or a slow drop-away time. This allows bits to imitate timer relays.The Boolean logic operators are used to combine bits to yield the required results.

3.2 PROGRAMMING LANGUAGE - GENERAL DESCRIPTION

3.2.1 Main Program Sections and Statements

The MICROTRAX application logic program is divided into several major sections, including:

InterfaceConfigurationVariable/TimerLogic Specification

These sections are described in greater detail starting with section 3.3.1.

1. Interface Section

The Interface section describes the actual inputs and outputs to the MICROTRAX unit.These include:

Relay inputs and outputsLamp control outputsTrack inputs and outputsSerial link inputs and outputs for the vital serial link.

The Interface section also defines the actual hardware configuration of the MICROTRAXunit.

2. Configuration Section

The Configuration section defines selected operating parameters, including:

Track lengthSlave vital link parametersTrack adjustment enabling

The Configuration section also provides an override or change function for informationspecified in the interface section. Multiple I/O module combinations may be specified in theInterface section to permit greater programming flexibility. The Configuration section isthen used to select which I/O configurations will be used for a particular installation.

3. Variable/Timer Section

The Variable/Timer section serves several purposes. Since additional bits other than I/Omay be required in the program, extra bits known as "internals", may be defined in thissection. These bits may be used to hold temporary values or serve as repeaters. Also,internal bits (and output bits) may be calibrated with time delays. With time delays, a bitmay be requested to wait for a specified period of time before changing state.


3-2 SM 6470A 4/96

4. Logic Specification

The Logic Specification section of the program contains the Boolean expressions thatassign values to bits.

3.2.2 Introductory Sample Program

Figure 3-1 shows a brief example of a MICROTRAX application logic program for a base line codedtrack system. Note that the I/O structure consists of:

Track Module: Only the Master side (Track A) usedColor Light Module Only the first signal head usedIsolated I/O Module Two outputs and two inputs used.

In the example, the capitalized words are pre-defined words that have special meaning to theMICROTRAX compiler. The lower case words are used to define bit names. These names allow theuser to clearly identify each bit in the program. All text between the percent sign (%) and the backslash (\) is treated as user commentary and is ignored by the MICROTRAX compiler. This area allowstext to be inserted that makes the program more readable and easier to understand.

The Configuration section (CONFIGURE) of the sample program is used to define selected operatingparameters. For example, by placing TRACKA_LENGTH under the QUESTION portion of thissection, the track circuit length default setting of 20,000 feet can be changed to any other valid lengthwith a PC (refer to section SM-6470B). Items defined under the STANDARD section cannot bechanged without changing the application logic program.

Also note the logic which controls unit operation. For example, the first logic equation:

ASSIGN input_1 AND in_code_1 TO green;

If: input_1 is set and the track is receiving the first code (in_code_1)Then: Select the green aspect (on head 1 of the color light module).

Refer to section 3.5 for an advanced MICROTRAX program example.


6470A 4/96 3-3

% sample MICROTRAX program \MICROTRAX PROGRAM sample_1;

INTERFACE% Track A has 2 output codes and 2 input codesTrack B is not used \TRACKA:

OUTPUT: out_code_1, out_code_2;INPUT: in_code_1, in_code_2;

TRACKB:OUTPUT: SPARE;INPUT: SPARE;

% the physical I/O consists of 1 color light board, only head 1 is usedand 1 isolated relay driver board, with 2 outputs and 2 input \BOARD1

COLOR.LIGHT:HEAD1

LAMP: bulb_on;ASPECT: red,yellow,green;

BOARD3ISOLATED:

OUTPUT: output_1, output_2;INPUT: input_1, input_2;

% define the configurationdefine the track length as 20,000 feet, but allow it to changedefine board 1 as a color light, board 3 as an isolated relaydrive, enable track A but disable track B (define a dummy length for track B) \

CONFIGUREQUESTION

TRACKA_LENGTH: 20;STANDARD

BOARD1_TYPE: 1;BOARD3_TYPE: 4;TRACKA_ENABLE: 1;TRACKB_ENABLE: 0;TRACKA_LENGTH: 20;

Figure 3-1. Introductory Program Example(Continued on following page)


3-4 SM 6470A 4/96

% put a 10 second slow pick on output_1 and a slow release of 5 seconds \TIMER

output_1: SET = 10:SEC CLEAR = 5:SEC;

BEGIN% if input #1 and track code #1 are active - select the green bulb \


% if input #2 and track code #2 are active - select the yellow bulb \ASSIGN input_2 AND in_code_2 TO yellow;

% if the track is not communicating - select the red bulb \ASSIGN NOT TRACKA.NORMAL TO red;

% if the input is active - send the first track code \ASSIGN input_1 TO out_code_1;

% if any of the bulbs are selected - turn the lamp on \ASSIGN red OR yellow OR green TO bulb_on;

END

Figure 3-1. Introductory Program Example (Continued from previous page)

3.2.3 Basic Format

The MICROTRAX vital programming language uses a free format. Source program statements mayspan several lines, or be placed on a single line. The format used should be easy to read, for example,to enable others to immediately understand the program and make future modifications. The lineindentation and spacing formats presented in this manual are recommended guidelines. The onlyrestrictions on the format of a source program are as follows:

1. The maximum allowable line length is 100 characters. A longer line will be truncated andgenerate an error message.

2. There is no distinction between upper case and lower case letters. All lower case letters (a-z) are converted by the compiler to their corresponding upper case letters (A-Z). Forexample, the bit 1eat would be read the same as 1EAT.

3.2.4 Comments

3.2.4.1 General

The source program may include instructive comments that are not processed as part of the program.The comment can be used to describe what is happening at a particular point in the program. Acomment may be entered anywhere in the program and use any number of lines. The syntax forentering a comment is a percent sign, followed by the text of the comment, followed by a backslash.For example:

% Any text which appears between the PERCENT SIGN and the BACKSLASH is ignored\


6470A 4/96 3-5

3.2.4.2 Compiler Switches

Compiler switches are used to select options that modify the operations of the MICROTRAX compiler.The following switches are available in the MICROTRAX compiler:

1. Debug: %$Dv\ (v = + or -)

The debug switch is used to turn on/off the creation of a debug file used by theMICROTRAX simulator. This switch must be turned on to enable the debuggingoption and use the simulator. The default is debug off. To turn debug on, enter%$D+\ in the program.

2. Bit Symbol Table Listing: %$Bv\ (v = + or -)

The bit symbol table listing switch is used to suppress the symbol table listing that isplaced at the end of the compiler listing. The default for this switch is on. Todisable the symbol table listing, enter %$B-\.

3. Page Eject: %$E+\

This compiler switch is used to force the compiler listing to skip to the top of a newpage.

4. Syntax Check: %$X+\

This switch permits the user to check the program for any syntax errors. If thisswitch is used, EPROMs cannot be programmed and the simulator cannot be used.

3.2.5 Tokens

When a MICROTRAX program is being compiled, it is automatically checked for errors. This isaccomplished by constructing the program with special components called "tokens". Tokens aredivided into several types, including Reserved Words, Delimiters and User-Defined Bits.


3-6 SM 6470A 4/96

3.2.5.1 Reserved Words

Reserved Words are those that have special meaning to the MICROTRAX compiler. Reserved wordsare alphanumeric string up to 16 characters. The Table 3-1 lists all reserved words and predefinedbits:

ADDRESS AND ASPECT ASSIGNAUX.INPUT BEGIN BOARD1 BOARD1.COLORBOARD1.NONISO BOARD1.SEARCH BOARD1_TYPE BOARD2BOARD2.COLOR BOARD2.NONISO BOARD2.SEARCH BOARD2_TYPEBOARD3 BOARD3.ISO BOARD3.NONISO BOARD3_TYPECLEAR COLOR.LIGHT CONFIGURE CONFIGURE.ERRORCONTROL.PANEL CPS.STATUS CROSS.UNIT.IN CROSS.UNIT.OUTEND GOTO.SLEEP HEAD1 HEAD2HEAD2.1.ENABLE HEAD2.2.ENABLE HEAD2_1_ENABLE HEAD2_2_ENABLEINPUT INPUT.ERROR INTERFACE ISOLATEDITEM ITEM KILL LAMPLAMPOUT LCP.ENABLE LCP_ENABLE LOG.EVENT.1LOG.EVENT.2 LOGIC_VERSION MASTER.ON MICROTRAXMIN MSEC NON.ISOLATED NOTOR OUTPUT PROGRAM QUESTIONRESET SEARCH.LIGHT SEC SETSLAVE SLAVE.ENABLE SLAVE ADDRESS SLAVE BAUDSLAVE_ENABLE SLAVE_KEYOFF SLAVE_KEYON SLAVE_STALESLEEP.ENABLE SLEEP_ENABLE STANDARD TIMERTO TRACK.BOARD TRACK_BOARD TRACKATRACKA.ENABLE TRACKA.LINKUP TRACKA.NORMAL TRACKA.SLEEPINTRACKA.SLEEPOUT TRACKA.TDIN TRACKA.TDOUT TRACKA_ENABLETRACKA_LENGTH TRACKB TRACKB.ENABLE TRACKB.LINKUPTRACKB.NORMAL TRACKB.SLEEPIN TRACKB.SLEEPOUT TRACK.TDINTRACKB.TDOUT TRACKB_ENABLE TRACKB_LENGTH UNIT.ENDUNIT.INTERMEDIAT UNIT.REPEATER UNIT_TYPE VARXOR

Table 3-1. Reserved Words


6470A 4/96 3-7

3.2.5.2 Delimiters

Delimiters are special tokens used as separators between Reserved Words and User-Defined bits.They are required to give each Reserved Word or User-Defined Identifier a unique identity in astatement. Table 3-2 lists all valid delimiters:

SpaceTabColon (:)Backslash (\)At (@)

Semicolon (;)Equal Sign (=)Comma (,)Percent (%)Plus Sign (+)

Open Parenthesis ( ( )Close Parenthesis ( ) )Carriage Return (<CR>)Tilde (~)Asterisk (*)

Table 3-2. Delimiters

Operator symbols (refer also to section 3.3.8.2):

* Shorthand for "AND"+ Shorthand for "OR"@ Shorthand for "XOR"~ Shorthand for "NOT"

The following statement shows the use of several delimiters:

ASSIGN A AND B*C TO D;

ASSIGN AND TO are Reserved Words. A B C and D are the User-Defined Bits. The spacedelimiter between ASSIGN and A indicates where the Reserved Word ends and the User-Defined Bitbegins. The "*" also serves as a delimiter between B and C.

3.2.5.3 User-Defined Bits

User-defined bits are tokens created by the user. Unlike Reserved Words, they do not have restricteduses in the program. The following rules apply to User-Defined Bits:

1. The name must consist of no more than 16 characters.

2. The name can only be composed of the following characters:

A-Z .a-z _0-9 $

3. The name must contain at least one non-digit character.

Following are several examples of valid and invalid identifiers:

EAT Valid123 Invalid: All digits.123 ValidTRACKA.XMT.INDICA4 Invalid: Exceeds 16 characters1TK Valid


3-8 SM 6470A 4/96

3.2.6 Bit Uses and Types

3.2.6.1 Status in an ASSIGN Statement

A MICROTRAX program consists of several different bit types, as shown in the following sampleASSIGN statement:

ASSIGN A AND B TO C,D;

Bits A and B are the operands in the assignment statement, while bits C and D are the objects of theassignment statement. Table 3-3 lists the different bit types and how they may be used in anassignment statement.

BIT TYPE BASIC USE COMMENTS

Track Input Bit

Track Output Bit

Local Output Bit

Local Input Bit

I/O Test Bit

I/O Lamp Out Bit

Slave Output Bit

Slave Input Bit

Internal Bit

Configuration Bit

System Bit

Receives input code from track

Marks which bit to send next ontrack.

Send output to local outputmodules.

Receives inputs from local inputmodule.

Enables/disables selecteddiagnostics.

Marks detection of failed lampfilament.

Marks which outputs to send onthe serial link.

Receives inputs from serial link.

Used for intermediate values.

Indicates the current systemconfiguration. Refer to section3.2.6.4 for a list of configurationbits.

Controls or indicates thesystem's status. Refer tosection 3.2.6.3 for a list ofsystem bits.

Never an object of an assignstatement

Can be operand in and object ofassign statement.


Never an object of an assignstatement.







Refer to section 3.2.6.3, part B,for applicable rules. All systembits can be operand in assignstatement. Some can also bean object of an assignstatement.

Table 3-3. Bit Types and Uses


6470A 4/96 3-9

3.2.6.2 Timer Bits

Certain bits may be assigned a timing function that generates slow pick or slow release actions. Withtimer bits, a user-specified amount of time must elapse before a requested change of state can occur.The following bits may be defined as timers:

Track Output BitsLocal Output BitsSlave Output BitsInternal Bits

3.2.6.3 Pre-Defined Bits

Certain bits are pre-defined in the MICROTRAX compiler. These bits have special meanings andcannot be redefined. They include Spare Bits and System Bits.

A. Spare Bits

A Spare bit is simply used to occupy a space between active bits. For example, if a localinput module has four defined input bits, but only the first and fourth bit are required in theapplication program, the input word would be defined as follows:

INPUT WORD: inp1, SPARE,SPARE,inp4;

By defining the input word in this manner, only the first and fourth bits are accessible to theuser. It is not necessary to supply spares to locations that do not fall between the twoactive bits. For example, the following entry makes unnecessary use of Spare bits:

OUTPUT WORD: out_1, out_2, SPARE,SPARE,SPARE,SPARE;

B. System BitsSystem bits are provided to determine or alter the state of the MICROTRAX system.Certain system bits are read-only (can only be an operand in an assignment statement)while others are read/write (can be both the operand in and the object of an assignmentstatement). Table 3-4 lists all system bits along with their read/write status.


3-10 SM 6470A 4/96

BIT NAME* FUNCTION USES**RESET

KILL

CPS.STATUS

AUX.INPUT

LOG.EVENT.1LOG.EVENT.2

CONFIGURE.ERROR

INPUT.ERROR

CROSS.UNIT.IN

CROSS.UNIT.OUT

SLAVE.ENABLE

MASTER.ON

SLEEP.ENABLE

BOARD1.COLOR

BOARD1.SEARCH

BOARD1.NONISO

HEAD2.1.ENABLE

BOARD2.COLOR

BOARD2.SEARCH

BOARD2.NONISO

HEAD2.2.ENABLE

BOARD3.ISO

BOARD3.NONISO

Set by application to reset the unit. For systems running withRev. 4 or later executive software, setting the RESET bit alsoperforms a CLEAR CPS function (see Section 2.5).

Set by the application to shutdown the unit.

Status of conditional power supply (refer to section 2.5.1 fordescription of this bit).

Status of auxiliary input bit.

When application logic transitions this bit from 0 to 1, userevent logged.

Set if configuration information is invalid.

Set if local input error detected. Cleared when errorscleared.

Set if cross unit input is active.

Set by application to activate cross unit output function.

Set if configuration has enabled vital serial link.

Set if vital serial link is operational.

Set if configuration has enabled sleep function.

Set if unit configured with a Color Light module in slot #1.

Set if unit configured with Searchlight module in slot #1.

Set if unit configured with Non-isolated I/O module in slot #1.

Set if unit configured with signal head #2 on module #1enabled.

Set if unit configured with a Color Light module in slot #2.

Set if unit configured with a Searchlight module in slot #2.

Set if unit configured with a Non-Isolated I/O module in slot#2.

Set if unit configured with signal head #2 on module #2enabled.

Set if unit configured with Isolated I/O module in slot #3.

Set if unit configured with Non-Isolated I/O module in slot #3.

W

W

R

R

R/W

R

R

R

R/W

R

R

R

R

R

R

R

R

R

R

R

R

R

R* "BOARD" same as plug-in module ** R = Read, W = Write, R/W = Read/Write

Table 3-4. System Bit General Uses (Continued on next page)


6470A 4/96 3-11

BIT NAME* FUNCTION USES**UNIT.ENDUNIT.REPEATERUNIT.INTERMEDIAT

TRACKA.NORMALTRACKB.NORMAL

TRACKA.LINKUPTRACKB.LINKUP

TRACKA.TDINTRACKB.TDIN

TRACKA.TDOUTTRACKB.TDOUT

TRACKA.SLEEPINTRACKB.SLEEPIN

TRACKA.TDOUTTRACKB.TDOUT

TRACKA.ENABLETRACKB.ENABLE

GOTO.SLEEP

LCP.ENABLE

TRACK.BOARD

Set if unit configured to be an end, repeater or intermediate.

Set if track A(B) is in normal mode.

Set if track A(B) is in link-up, remove shunt mode.

Set if tumble down code is received by track A, track B.

Set by the application to send the tumble down code on trackA, track B.

Set if sleep code is received by track A, track B.

Set by application to send the sleep code on track A, track B.

Set if unit configured with track A, track B enabled.

Set by application to have unit “GOTO SLEEP”

Set if unit configured with a LOCAL CONTROL PANEL.

Set if unit configured with a Track Board

R

R

R

R

R/W

R

R/W

R

W

R

R* "BOARD" same as plug-in module ** R = Read, W = Write, R/W = Read/Write

Table 3-4. System Bit General Uses (Continued from previous page)

_______________________________________________________________________________

3.2.6.4 Configuration Bits

Configuration information is divided into pre-defined and user-defined. Pre-defined data values defineor change the configuration of the unit. These include:

Defining I/O module typeSpecifying track enabling and track lengthEnabling second signal head on lamp driver modulesSetting vital serial link parameters.

Up to 32 user defined bits are available. These bits have no effect on Executive software functions.There are additional bits that may be used in the application logic program, but are set and cleared viaa Portable Computer (refer to SM-6470B).


3-12 SM 6470A 4/96

1. Pre-DefinedTable 3-4 lists all pre-defined configuration bits. The configuration bits are specified in theconfiguration section, along with their default values. Where applicable, a correspondingsystem bit is defined.

2. User-Defined

Up to 32 user-defined configuration bits are available. These bits permit site-specificinformation to be programmed into a MICROTRAX unit without changing the applicationlogic. Example: Two MICROTRAX units function identically, except that one flashes asignal and the other lights a signal continuously. If the flashing aspect is the only differencebetween the two programs, a user-defined configuration item can be employed without theneed for different application programs in each unit. A user defined configuration item canbe created in the application program. Logic can then be written to flash the aspect if theassociated bit is set, or continuously light the aspect if the bit is clear. The state of the bitwill be established when the unit is configured in the field (via a PC; refer to SM-6470B).

BIT NAME* DESCRIPTION/VALUES SYS. BIT NAME

TRACKA_ENABLETRACKB_ENABLE

TRACKA_LENGTHTRACKB_LENGTH

UNIT_TYPE

BOARD1_TYPE

BOARD2_TYPE

BOARD3_TYPE

HEAD2_1_ENABLE

HEAD2_2_ENABLE

Enable/disable track comm. 1 = enable, 0 = disable

Specify track length. Range: 0-36 (1K ft. increments)

Specify unit type If 1 then set --> If 2 then set --> If 3 then set --> If 0 then no system bit set

Specify module type in slot #1. If 0 then no module installed If 1 then set --> If 2 then set --> If 3 then set -->

Specify module type in slot #2. If 0 then no module installed If 1 then set --> If 2 then set --> If 3 then set -->

Specify module type in slot #3. If 0 then no module installed If 3 then set --> If 4 then set -->

Enable head #2 on lamp driver module #1 1 = enable 0 = disable

Same as above, but for module #2.

TRACKA.ENABLETRACKB.ENABLE

UNIT.ENDUNIT.REPEATERUNIT.INTERMED

BOARD1.COLORBOARD1.SEARCHBOARD1.NONISO

BOARD2.COLORBOARD2.SEARCHBOARD2.NONISO

BOARD3.NONISOBOARD3.ISO

HEAD2.1.ENABLE

HEAD2.2.ENABLE* "BOARD" same as plug-in module.

Table 3-4. Pre-Defined Configuration Bits (Continued on next page)


6470A 4/96 3-13

BIT NAME* DESCRIPTION/VALUES SYS. BIT NAME

SLAVE_ENABLE

SLAVE_ADDRESS

SLAVE_BAUD

SLAVE_KEYONSLAVE_KEYOFF

SLAVE_STALE

SLEEP_ENABLE

LOGIC_VERSION

LCP_ENABLE

TRACK_BOARD

Enable/disable slave serial link. 0 = disable, 1 = enable

Specify slave's address. Valid values: 1-15

Specify slave's baud rate.1 = 150 3 = 600 5 = 18002 = 300 4 = 1200 6 = 2400

Specify key on/off delays. Values range from 0 - 255(units of milliseconds)

Vital link stale data time out. Waiting period beforeclearing slave database. Value specified is 0 - 255(units are 100 millisecond tics; range of values is 0 -25500 milliseconds)

Enable/disable sleep function. 0 = disable, 1 = enable

User controlled version number to help identifyapplication software. Values range from 0 - 255.

Specify if LOCAL CONTROL PANEL installed0= disable 1= enable

Specify if Track Board installed0= disable 1= enable

SLAVE.ENABLE

SLEEP.ENABLE

LCP.ENABLE

TRACK.BOARD

* "BOARD" same as plug-in module.

Table 3-5. Pre-Defined Configuration Bits

3.3 PROGRAMMING LANGUAGE - DETAILED DESCRIPTION

3.3.1 Introduction

This section describes each major part of a MICROTRAX program. The following terms andexpressions are used throughout the description:

<bit> Represents a single application logic bit. Refer to section 3.2.6 for rules on defining bits.

<bit list> Represents a list of bits (one bit or a list of bits separated by commas). Examples of valid <bit list> are:

namename_1, name_2, name_3

When the <bit list> is described, the maximum number of bits that may be placed in the bit listwill be specified.


3-14 SM 6470A 4/96

3.3.2 Program Statement

Every MICROTRAX program must begin with a Program statement. The format of the programstatement is:

MICROTRAX PROGRAM <bit>;

This statement identifies the program as a MICROTRAX program, and associates a name with it.

3.3.3 Interface Section

The Interface section describe the I/O associated with the MICROTRAX unit, and includes thefollowing information:

Track A and Track B descriptionLocal I/O descriptionVital Serial Slave Link description

These are described in the following sections.

3.3.3.1 Track Interface Section

The track portion of the Interface section describes the master and slave track interfaces. The formatof this section is:

INTERFACE

TRACKA: <test bit> OUTPUT: <output bit list>;

INPUT: <input bit list>;

TRACKB: <test bit> OUTPUT: <output bit list>;


In the above program fragment, <test bit> is used to enable track length adjustments in the field. The<test bit> is optional; if it is not specified, it is assumed to be zero. When this bit is set, the tracklength may be adjusted via the toggle switches on the CPU module (refer to SM-6470B).

The <input bit list> and <output bit list> may each contain from 1 to 20 bits, where each bitrepresents one of the user track codes. Both Track A and Track B must be defined with at least oneinput and one output. If one side is not used, the special bit SPARE may be used.

Although both TRACK.A and TRACK.B must be defined, either side may be disabled by using theTRACKx_ENABLE configuration item. If the track is disabled, the track will stay in shunt. Also, thetrack board is optional; using the TRACK_BOARD configuration item, the unit may be used without atrack board. (Valid with Executive Software Revision #3 and higher).


6470A 4/96 3-15

The following example demonstrates how to define the track communications:

MICROTRAX PROGRAM TRACK_EXAMPLE;

INTERFACE

TRACKA: enable_adj.A OUTPUT: a.code.out.1,a.code.out.2,a.code.out.3,a.code.out.4;

INPUT: a.code.in.1,a.code.in.2,a.code.in.3,a.code.in.4;

TRACKB: OUTPUT: b.code.out.1,b.code.out.2,b.code.out.3;

INPUT: b.code.in.1,b.code.in.2,b.code.in.3;

In this example, Track A has four input codes and four output codes. When a valid code is ready to betransmitted, the output code (set by the application logic) is sent. When a code is received, thecorresponding track input bit is set. The same occurs for Track B, except only three codes are used.Track A also has a test bit (enable_adj_A) that permits track length adjustments when set to 1. Referto SM-6470B for detailed information on track code transmission and reception and track lengthadjustment procedures.

Track codes are identified by a single letter A through W.

Code A: System's link-up/shunt codeCode B: Tumbledown codeCode C: Sleep codeCodes D - W: User codes (D is first user code, E is second user code etc.)

In the above example, a.code.out.1 is user code "D", a.code.out.2 is user code "E".a.code.out.3.isuser code "F", and a.code.out.4 is user code "G".

3.3.3.2 Local I/O Interface Section

This section describes the valid board combinations as defined in the software. However, not allcombinations are available in all cardfiles. Refer to the MICROTRAX Installation Manual (SM 6470B)for a complete description of the Cardfiles and valid board options.

When using the specialized MICROTRAX Cab Signal Controller, the Cab Coder Output board isspecified in the software as a NON.ISOLATED I/O card. Refer to the MICROTRAX Installation Manual(SM 6470B) for a description of the Cab hardware.

A. General

The Local I/O section of the program defines the configuration of the I/O modules in thecardfile. This section is divided into three subsections, Board1, Board2 and Board3("Board" refers to a plug-in module). Each Board section describes which I/O module is avalid option for that cardfile slot. Different types of I/O modules may be defined for aparticular slot. When the unit is configured, only one of the pre-defined modules may beenabled. For example, cardfile slot #1 (location "C" per Figure 1-2.) can be defined for aColor Light or a Searchlight lamp driver module. The application logic can be written toprocess both of these modules. However, since only one module can actually be installedin slot #1, the required module is specified during unit configuration. Outputs for thatmodule will then be delivered; outputs for the other (non-installed) module are ignored.


3-16 SM 6470A 4/96

B. Board #1 & Board #2 Interface Section

The following program segment identifies all options available for slot #1:

BOARD1 NON.ISOLATED: <non.isolated test bit>

OUTPUT: <non.isolated output bit list>;INPUT : <non.isolated input bit list>;

COLOR.LIGHT: <color.light test bit> HEAD1

LAMP: <lamp bit>;ASPECT: <aspect bit list>;LAMPOUT: <lamp out bit list>;

HEAD2LAMP: <lamp bit>;ASPECT: <aspect bit list>;LAMPOUT: <lamp out bit list>;


SEARCH.LIGHT: <search.light test bit> HEAD1

LAMP: <lamp bit>;ASPECT: <aspect bit list>;LAMPOUT: <lamp out bit>;

HEAD2LAMP: <lamp bit>;ASPECT: <aspect bit list>;LAMPOUT: <lamp out bit>;


In the above program fragment, each module has an optional test bit. These test bits areused to disable certain output diagnostics. If diagnostics are to be disabled, define the testbit and assign it a "1". Refer to the output diagnostics description in section 2.3.4.4 Part Cto determine if these diagnostics should ever be disabled.

The Non-Isolated I/O module is capable of driving four outputs and four inputs. The<non.isolated output bit list> and the <non.isolated input bit list> are each limited tofour bits.

Each Color Light and Searchlight module has a head #1 and a head #2 option. Head #2may be enabled/disabled via the HEADx_2_ENABLE configuration bit. For these modules,the <aspect bit list> contains up to three bits. The first bit is the red aspect, the second isthe yellow aspect and the third is the green aspect. The <lamp bit> is used to illuminatethe selected aspect. For example, to illuminate the yellow aspect, the second output bit inthe <aspect bit list> is set to a "1". Then, the <lamp bit> is set to a "1" to actuallyenergize the selected lamp. Only one aspect may be selected at one time. If more thanone is selected, all are de-selected and a warning is logged. Also, if the <lamp bit> isenergized without selecting an aspect, no bulb will be turned on and a warning will belogged.


6470A 4/96 3-17

NOTE

For the Color Light module, the aspect selection and the lamp turn on may besimultaneous. For the Searchlight module, the application logic must select anaspect, wait and then turn on the lamp. This delay must be set to the maximumtime required for the searchlight mechanism to move and become stable. (If thelamp is turned on before the mechanism is stable, the unit may log errors withthat lamp).

The MICROTRAX unit provides light out protection. If a color light bulb is burned out, thecorresponding bit in the <lamp out bit list> will be set. This feature permits the applicationlogic to downgrade the signal if the requested signal has failed.

If a searchlight bulb is burned out when used with the N451910-2001 search light PCB, anon-recoverable error will be logged and the system will shut down. (This PCB is onlysupported by Executive Software Revision 3 and older).

If a searchlight bulb is burned out when used with the N451910-7301 searchlight PCB, thecorresponding <lamp out bit> is set, a warning is logged and the system continues tooperate.

For the Color Light module, the number of bits in the <lamp out bit list> must not exceedthen number of bits defined in the <aspect bit list> (e.g., if only red and yellow are definedin the aspect list, three lamp out bits cannot be defined). For the Searchlight module, onlyone lamp out bit is available because the searchlight mechanism has only one bulb). Referto section 2.3.4.4 for a detailed description of lamp out filament diagnostic.

The definition for slot #2 is the same as slot #1, except that "board1" is changed to"board2". The definition for board #2 must be after the definition for board #1, if it isdefined.

If no boards are defined in slot #1 or slot #2, then the BOARD1 or BOARD2 part of theInterface section may be omitted. Only those boards that may be configured in a particularslot require definition.

BOARD1 NON.ISOLATED: OUTPUT: o1,o2,o3,o4;

INPUT : i1,i2,i3,i4;

COLOR.LIGHT: disable.lamp HEAD1

LAMP: lamp.on.b1.h1;ASPECT: r.b1.h1,y.b1.h1,g.b1.h1;LAMPOUT: spare,spare,green.out;

BOARD2 SEARCH.LIGHT: HEAD1

LAMP: lamp.on.b2.h1;ASPECT: r.b2.h1,y.b2.h1,r.b2.h1;

HEAD2LAMP: lamp.on.b2.h2;ASPECT: r.b2.h2,y.b2.h2,r.b2.h2;

INPUT: i5,i6;


3-18 SM 6470A 4/96

In the example on the previous page, the MICROTRAX unit will have a Non-Isolated I/Omodule or a Color Light Lamp Driver module installed in the first I/O slot. The second slotwill contain a Searchlight Lamp Driver module. (Depending on how the Configurationsection is written, there may be defaults as to what boards should be installed. It is possibleto disable the slot so that no I/O board is needed.)

If the Non-Isolated I/O module is installed, four outputs (o1,o2, o3 and o4) and four inputs(i1,i2,i3 and i4) are available. Note that if the Color Light module is installed, only head #1will be used. The test bit (disable.lamp) is available to disable certain diagnostics, andonly the green bulb has an associated lamp-out bit.

The application logic has access to all of these bits. Even if the board has not beeninstalled, the bits are still available for use. If the unit is configured to have a Color Lightboard in slot #1, the values of i1-i4 will always be zero. And if the outputs are assigned,they will be ignored. Refer to section 1.2.2 for a complete description on I/O options andconfigurations.

C. Board #3 Interface Section

The following program segment identifies all of the options available for slot #3. The board#3 description must be after the description for boards #1 and #2 if the previous boards aredefined:

BOARD3 ISOLATED: <isolated test bit> OUTPUT: <isolated output bit list>;

INPUT : <isolated input bit list>;NON.ISOLATED: <non.isolated test bit>

OUTPUT: <non.isolated output bit list>;INPUT: <non.isolated input bit list>;

With the Isolated I/O in this segment, the optional <isolated test bit> is a user-defined bitthat, when defined and assigned a "1", will disable certain diagnostics. The <isolatedoutput bit list> contains up to two bits, and the <isolated input bit list> contains up tofour bits. Refer to the Board #1 definition for the details on the NON.ISOLATED I/O card.

The following example demonstrates a MICROTRAX program segment that includes anIsolated I/O card with 2 outputs and 3 inputs, or a NonIsolated I/O card with 4 outputs and 4inputs.

BOARD3 ISOLATED: test.bit OUTPUT: output_1, output_2;

INPUT : i1, i2, i3;NON.ISOLATED: non.test.bit

OUTPUT: out1, out2, out3, out4;INPUT: ni1, ni2, ni3, ni4;


6470A 4/96 3-19

3.3.3.3 Slave Interface Section

The Slave I/O part of the Interface section defines the vital serial communications with a MICROLOK,MICROLOK PLUS, or MICROTRAX End-of-siding serial link module Master system. TheMICROTRAX unit emulates the MICROLOK/MICROLOK PLUS vital link Slave protocol, permitting aMICROTRAX unit to be a slave to a MICROLOK, MICROLOK PLUS, or MICROTRAX End-of-sidingserial link module unit. The following program segment describes the syntax for specifying theMICROTRAX slave port. This optional section must be specified after the local I/O board definitions:

SLAVE ADDRESS: <slave address number>

OUTPUT: <output bit list>;INPUT: <input bit list>;

The slave address is specified in the <slave address number> field and is in the range 0 to 15. Theslave's address may also be specified in the Configuration section (refer to section 3.3.4). However, ifa non-zero address is specified here, it cannot be specified in the Configuration section. Specifically, ifthe address is 0, it can be specified in the Configuration section. If the address is non-zero, then it cannot be changed in the Configuration section. The <input bit list> and the <output bit list> can haveup to 32 bits each.

In the following program segment, the MICROTRAX unit is defined as vital link slave #13, with seveninputs (i1-i7) and ten outputs (o1-o10):

SLAVE ADDRESS: 13

OUTPUT: o1,o2,o3,o4,o5,o6,o7,o8,o9,o10;INPUT: i1,i2,i3,i4,i5,i6,i7;

3.3.3.4 Non-Vital I/O /Local Control Panel

The definition of the Non Vital I/O card that interfaces with the local control panel is specified after theLOCAL I/O and the SLAVE serial specifications. It is the last entry in the INTERFACE section. Refer tothe MICROTRAX Installation Manual (SM 6470B) for information about the layout of the local controlpanel.

The I/O is defined:

CONTROL.PANELOUTPUT: <lcp output bit list>;INPUT: <lcp input bit list>;

In this definition, the <lcp output bit list> contains up to 16 bits and <lcp input bit list> contains up to 16bits. Many of these bits are associated with toggle switches and LEDs on the local control panel.

The following segment is a typical definition for the local control panel:

CONTROL.PANELOUTPUT: 1EGKE, 1ERKE, 1WGKE, 1WRKE,

2NWKE, 2LKE, 2RWKE, SPARE,1EAKE, SPARE, 1TKE, 1WBATKE,1WAATKE;

INPUT: LOCAL, 1ECLEAR, 1ESTOP, 1WCLEAR,1WSTOP, 2NLP, 2RLP;


3-20 SM 6470A 4/96

3.3.4 Configuration Section

The Configuration section enables modification of various system parameters in the field via a portablePC. Section 3.2.6.4 describes all available pre-defined configuration items. Also available are user-defined configuration items. These bits are user-controlled and do not have any special meaning tothe executive software.

The Configuration section is divided into Question and Standard subsections. Field-configurable itemsand their corresponding default values are placed in the Question subsection. Configuration items thatare not intended to be altered are placed in the Standard section.

The basic format of the Configuration section is as follows:

CONFIGURE QUESTION

ITEM: <text description> , <user config. bit name>;<pre-defined config. bit name> : <default value>;

STANDARD<pre-defined config. bit name> : <default value>;

Where:

<text description> is in the format "text string" of up to 15 characters<user config. bit name> is a user-defined bit<pre-defined config. bit name> is one of the special pre-defined configuration items (refer to section 3.2.6.4).<default value> is a valid default value for that configuration item.

Up to 32 ITEMs may be user-defined configuration items. Items must be defined before any pre-defined configuration bits.

CONFIGURE QUESTION

ITEM: "flash green", flash.green;ITEM: "downgrade" , down_grade;TRACKA_LENGTH: 20;SLAVE_ADDRESS: 3;BOARD1_TYPE: 3;

STANDARDSLAVE_BAUD: 6;BOARD2_TYPE: 1;

In the above Configuration section, there are two user-defined configuration items: flash.green anddown_grade. When the unit is configured, the value for these two bits will be requested from theuser. The only valid options for these bits are 0 or 1. The bits flash.green and down_grade may thenbe used in the application logic to make the program behave differently, based on the values of thesebits. If the unit is not configured or the configuration information is invalid, all user-defined bits willhave a default value of 0.

Also note in the Question subsection three pre-defined configuration bits: TRACKA_LENGTH,SLAVE_ADDRESS and BOARD1_TYPE. These bits are not available for use in the application logicprogram because they do not directly affect the program. In the Question subsection, these itemshave a specified default value, but they may be changed in the field when the unit is configured.


6470A 4/96 3-21

Items in the Question section have default values. If the unit has not been configured, or the EEPROM(which holds the configuration information) has failed, the defaults specified will be used. However,these values may be changed with the PC Configure package (refer to SM-6470B).

Items defined under the Standard section cannot be changed without writing a new application logicprogram.

The BOARD1_TYPE pre-defined configuration bit is used to mark which plug-in module ("board") isinstalled in slot #1. The "3" default value indicates that board #1 is a Non-Isolated I/O Module.However, the unit may be field reconfigured to change the type of module installed in slot #1.

Three system bits, BOARD1.NONISO, BOARD1.COLOR and BOARD1.SEARCH are associated withBOARD1_TYPE. These bits are set or cleared based on the value of BOARD1_TYPE (refer tosection 3.2.6 for the relationship between pre-defined configuration items and system bits).

This configuration section also has two items under the STANDARD section. The SLAVE_BAUD rateis set to 6 (2400 baud) and the board (module) installed in slot #2 is type #1 (Color Light). Neither ofthese options may be changed in the field because they are part of the STANDARD section.

3.3.5 Internal Bit Definitions

Bits needed in the program for internal logic processing (not for input, output or system bits) aredefined as internals. An internal bit may be used to hold temporary values during logic processing, andmay also be a repeater. The syntax for declaring internal bits is:

VAR <id list>;

Sometimes it is necessary to assign a constant value of 0 or 1 to an internal bit. These constants arenot provided in the MICROTRAX programming language. This can be done by defining an internal bitnamed ZERO. Do not assign a value to this bit, it will always be clear.

3.3.6 Timer Section

Any internal or output bit may be further defined with a timer attribute. This attribute is used to specifythe set (pick-up) and clear (drop-out) delays, enabling the bit to operate like a timer relay. Themaximum allowable number of timers is 50.

The syntax for a timer description is:

<id list> : SET = <number> : <unit> CLEAR = <number> : <unit>;

Where:

<number> is an integer in the range of 0 through 9999.

<unit> is a time unit: MSEC, SEC or MIN


3-22 SM 6470A 4/96

The previous timer description is divided into three parts:

1. The <id list> is the list of identifier bits calibrated by the timer attribute.

2. The set delay clause specifies the set (pick-up) delay time.

3. The clear delay clause specifies the clear (drop out) delay time.

The full timer delay range available with the MICROTRAX system is as follows:

Milliseconds: 50 to 9990 in increments of 10 msec.Seconds: 1 to 9999 in increments of 1 sec.Minutes: 1 to 2795 in increments of 1 min.

The following example illustrates some timer descriptions:

TIMERONE, TWO, THREE: SET= 100: MSEC CLEAR= 2: SEC;FOUR: SET= 1: SEC CLEAR= 0: SEC;FORE: SET= 1000: MSEC CLEAR= 0: MSEC;FIVE: SET= 0: MIN CLEAR= 0: MIN;SIX: SET= 195:MSEC CLEAR= 12: SEC;

Timers ONE, TWO and THREE are defined with a set delay of 100 milliseconds and a clear delay of 2seconds. This means that when a "1" is assigned to any of those bits, 100 milliseconds will elapsebefore that bit is set. Whenever a "0" is assigned to any of those bits, 2 seconds must elapse before itwill actually be assigned a "0". The definitions of FOUR and FORE have the same set and clear delaybecause 1 second is equal to 1000 milliseconds.

When specifying a timer delay, a range of 0 through 9999 must be observed, regardless of the unit ofmeasurement. For example, 1000 MSEC may be used instead of 1 SEC. But 60000 MSEC cannot beused for 1 MIN because 60000 is beyond the 0 - 9999 range.

Delays of 0 imply that a change of state will occur immediately with the request. In the aboveexamples, the timer definition of bit FIVE is illegal since both the set and clear delays are equal to zero.The timer definition for bit SIX is invalid because 195 milliseconds is not at the required 10 millisecondincrement (180 MSEC or 190 MSEC would be valid).

If there is a requirement that two outputs toggle at the same rate and in tight synchronization, the logicmust be written so that the same controlling variable is used to toggle the outputs. For example:

TIMERFLASHER: SET = 1:SEC CLEAR = 1:SEC;

BEGINASSIGN ~FLASHER TO FLASHER;

ASSIGN FLASHER TO ASPECT1;ASSIGN FLASHER TO ASPECT2;


6470A 4/96 3-23

In this example:

ASSIGN ~FLASHER TO FLASHER;

causes FLASHER to continuously toggle once per second because its set and clear delays are bothone second. FLASHER, in turn, controls ASPECT1 and ASPECT2; they also toggle once per second.

Tight synchronization would not be maintained if different "flashers" were used to control ASPECT1and APSECT2 because these flashers would be processed sequentially by the microprocessor.

3.3.7 Begin Statement

The BEGIN statement is used to mark the beginning of the logic portion of the program. As of thisstatement, all bits used in the program must already be defined. This enables the compiler to checkfor any incorrect usage (e.g. trying to assign to an input bit). The syntax for the BEGIN statement is:

BEGIN

3.3.8 Logic Specification

3.3.8.1 General

The logic used to specify the central operations in a MICROTRAX program is a simple form of Booleanalgebra. The basic ASSIGN statement consists of an expression (the logic), and a bit or list of bits towhich the expression is assigned. The syntax of the ASSIGN statement is:

ASSIGN <expression> TO <id list>;

3.3.8.2 Expression

A. Operators

The expression contains the Boolean-based logic of the ASSIGN statement. It is a combinationof operands and operators. The operands may be any bit defined in the program. Theoperators that join the operands are AND, OR, XOR (eXclusive OR) and NOT.

Table 3-5 describes the four basic operators in truth table form. Included are the input to theoperator and the result. The table also lists the shorthand notation for each operator. Note thatAND, OR and XOR are binary operators (require two operands), while NOT is a unary operator(only processes one operand).

Table 3-5. ASSIGN Operators Truth Tables

InputsA B

ANDA * B

ORA + B

XORA @ B

NOT~A ~B

0 00 11 01 1

0001

0111

0110

1 11 00 10 0

The following expression performs the logical AND of A and B, which is then assigned to C:

ASSIGN A AND B TO C;


3-24 SM 6470A 4/96

B. Operator Precedence

A standard precedence level specifies the order in which operators are executed. This avoidsambiguity in the expressions. The following ASSIGN statements show how a given statementcould be processed with different results if no order of precedence existed:

ASSIGN A AND B OR C TO D;ASSIGN C OR B AND A TO D;

If A and B are 0 and C is 1, the first expression evaluates (from left to right) to 1, and thesecond to 0. Following is the precedence (or hierarchy) of operator from higher to lower:

Higher NOT and ANDLower OR and XOR

All ANDs and NOTs are performed first, then ORs and XORs are performed. NOT isperformed before AND. In most cases, this hierarchy enables expressions to be written in anydesired order, with no effect on the sequence of operations. However, the order is important ifan expression contains both ORs and XORs. These are processed from left to right. In the twoprevious ASSIGN statements, "A and B" are always evaluated first, then the result of "A and B"is OR'ed with C.

The operator hierarchy can be overridden using parentheses. Following is an example:

ASSIGN A OR B AND C TO D;

If the expression "A OR B" is to be AND'ed with C, parentheses must be added so that theAND operator is not done first:

ASSIGN (A OR B) AND C TO D;

The next two examples show the effect of using NOT, the only unary operator:

ASSIGN NOT A AND B TO D;ASSIGN NOT (A AND B) TO D;

These statements produce different results. The first statement consists of "NOT A" ANDedwith "B" The second is the complement (NOT) of "A" ANDed with B".

Complex expressions can be created within the basic syntax of the ASSIGN statement, forexample:

ASSIGN (A OR (B XOR (A OR F) AND W)) AND X TO G;

Figure 3-2 shows the order in which the above expression is evaluated:


6470A 4/96 3-25

ASSIGN ( A OR ( B XOR ( A OR F ) AND W ) ) AND X TO G

12

3

4

5

Figure 3-2. ASSIGN Operators, Sample Execution

C. ASSIGN Statement Object

The expression in an ASSIGN statement is evaluated and then ASSIGNed to a bit or list of bits.Such a bit(s) is referred to as the object of the ASSIGN statement. If the object of an ASSIGNstatement includes two or more bits, they are separated with commas and terminated with asemicolon. For example:

ASSIGN A AND B TO C,D,E;

A bit may only be assigned a value from one logic equation. The following program segment isinvalid because the bit DOUBLE is assigned a value in two different equations:

ASSIGN RACE TO DOUBLE;ASSIGN NOT RACE TO DOUBLE;

This is invalid because it can cause bit "racing". Whenever bit RACE changes, then bitDOUBLE can possibly have two values.

3.3.9 End Statement

Once all of the logic has been specified, the application logic program is terminated by the ENDstatement. The syntax of the END statement is:

END

Any text that appears after END is ignored.

3.4 SUMMARY OF PROGRAMMING GUIDELINES

1. Make every defined output bit the object of an ASSIGN statement.

2. Use every defined input in the system logic.

3. Define unused bit locations (between active locations) on an I/O word as SPARE bits.

4. Track A and Track B must be defined in the INTERFACE section. At least 1 inputand 1 output each must be defined.

5. The Track A and Track B definitions are the only required element in the INTERFACEsection.

6. Modules (boards) must be defined in order (BOARD1 before BOARD2 before BOARD3).


3-26 SM 6470A 4/96

7. The MICROTRAX unit may only have 1 SLAVE definition, with no more than 32 bits in eachdirection.

8. The CONFIGURATION section must be defined. Be careful not to use pre-definedconfiguration bits that do not agree with the I/O definition in the INTERFACE section. Forexample, if board #1 is defined in the INTERFACE section to be a color light module(board), but BOARD1_TYPE is set to 3 (non isolated board) in the CONFIGURATIONsection, this will cause an error.

9. Do not make system bits into timers.

10. The maximum number of bits is 500.

11. Do not make any bit the object of more than one ASSIGN output statement.

12. The maximum number of logic equations allowed is 500.

13. The maximum number of logic equations a single bit can trigger is 100.

3.5 DETAILED PROGRAM EXAMPLE

Figure 3-3 gives a detailed example of a typical MICROTRAX application logic program. This exampleis for the base line MICROTRAX Coded Track Circuit unit. The example also references theSearchlight board (N451910-2001). References to connector pin #s will change with cardfiles. Theassociated application wiring is shown in Figures 3-4 through 3-9 for reference. Following are notes onthe makeup of this program:

TRACKA defines the track circuit connected to pins 3 and 4 on the right-hand connector of theMICROTRAX cardfile. TRACKB defines the track circuit that will function as a Slave; this connects topins 1 and 2 on the right-hand connector. In this application, the Master was placed on the left side ofthe insulated joints and the Slave on the right side. Therefore, outputs listed under TRACKA are thecodes being sent to the 252 signal. Similarly, the inputs are codes being sent from the 253 signal.

Note that all transmitted codes are listed as "...OUT_X" or "...IN _X", where "X" matches thetransmitted or received code. This makes the program consistent with the corresponding displayswhich appear on the CPU Module alphanumeric display, and thereby simplifies troubleshooting. Alsonote that the names match conventional line circuit direction of information. For example, 236OUT isinformation feeding towards 252, while 237IN is information from 253.

It is important to note the use of a Default Track code. In this program track code “D” was used as thedefault code for both track circuits. This means that if no other application code is selected,MICROTRAX will transmit a track code “D”. It is necessary to do this for two reasons. First, since bothends of each track circuit both transmit and receive, if this is not done a normal train movement willcause the track circuit in front of the train to be shunted. See the following example.

M1 TK1 S1 M2 TK2 S2

Normally the code that S1 would sent to M1 would be based upon the code M2 receives from S2. Witha train located as shown, M2 would receive no track code which in turn would send no code out of S1to M1. This would cause TK1 to go into shunt. The use of a default code avoids this problem.


6470A 4/96 3-27

Second, the output code is often based on an input to MICROTRAX. The failure of an input wouldcause no track code to be sent and thus would be a very difficult problem for a maintainer to diagnose.

BOARD1 is used to drive signal 237 (color light signal with only an "A" head). Turning on a signalaspect is a two-step process. First, one of the aspects listed must become a valid condition. In theexample, the equation for 237RED, 237YELLOW or 237GREEN must become a true statement.Second, the "lamp" statement (237ALAMP) must become a valid statement. If the system operatedsearchlight signals, this would allow a signal to be positioned ahead of time, but it could be approach-lit. Normally, the lamp bit is defined with a slow pick-up (one second is typical) to insure that allequations have been processed and the searchlight mechanism is positioned before turning on thelamp. This arrangement avoids light-out errors. The lamp bit can be used for completely differentlogic than the aspects. One simple approach is to "OR" all of the aspects and assign to the lamp bit.This causes the lamp bit to be high any time an aspect is called high.

The red/yellow/green arrangement of an actual color light signal is irrelevant to the system. Bits listedin the aspect section should be put in the order of the actual signal. When the system reads the firstbit in this section (237ARED in the example) and the lamp bits are valid, voltage is applied across pins15 and 16 of the cardfile left-hand connector. Similarly, the second bit in the second aspect plus thelamp bit results in voltage across left connector pins 15 and 17.

The same principle is true when the system is operating searchlight signals. Head 1 voltage acrosspins 16 and 17 is used to position the searchlight mechanism when the first bit is defined as valid. Novoltage across pins 16 and 17 corresponds to a red signal. Bit 2 applies one type of polarity acrosspins 16 and 17 and a valid bit 3 reverses this polarity. This provides a stuck mechanism check forsearchlight signals. If Bit 1 is valid, the system looks for current flow between pins 15 and 16. If themechanism is not in the red position, this path is broken and the system logs a critical error.

The program example makes use of the lamp-out bit. This bit automatically goes high when a lampout condition is detected, and can be used in place of a light out relay. In the example, outgoing trackcodes are down-graded and the lower arm of 237 is not lit because of a burned out top yellow aspect.

Also in the example, HEAD2 on BOARD1 was not used. It is included in the program for instructionalpurposes. Note that the term appears between "%" and "\", making it a comment. One differenceappears in the definition of two inputs at the end of HEAD2. Both color light and searchlight drivermodules can take two vital field inputs. Note the common relationship between the program and theactual wiring. The program tells the system to interpret voltage on left connector pins 4 and 5 as1NWPR, and voltage on pins 1 and 3 as 1RWPR. The voltage on this pins must correspond to theswitch position because the processor is programmed for this.

The program segment for BOARD2 is generally similar to BOARD1. All output voltages appear on thecardfile center connector.

BOARD3 is restricted to an Isolated I/O Module. It is included in the sample program for instructionalpurposes, but is not used in the actual circuit (note the separation as a comment). As with the lampoutputs, there is a direct relationship between the order in which the Isolated I/O bits are defined andwhere the voltage is input or output to drive a relay. In the OUTPUT description, the first bit defined isoutput #1 (1NWR). When this bit is high, voltage is applied to pins 15 and 16 of the cardfile right handconnector. Similarly, the order of the inputs defines where voltage must be applied for the system toread that the input as a valid condition. Voltage on pins 21 and 22 correspond to INPUT1 (2RGPR)being valid.


3-28 SM 6470A 4/96

MICROTRAX PROGRAM TYPICAL;

%$D+\ % COMPILER SWITCH TO TURN ON THE DEBUG FILE \

INTERFACE

TRACKA:

OUTPUT: 236OUT_D, 236OUT_E, 236OUT_F,

236OUT_G, 236OUT_H;

INPUT: 237IN_D, 237IN_E, 237IN_F,

237IN_G;

TRACKB:

OUTPUT: 237OUT_D, 237OUT_E, 237OUT_F,

237OUT_G;

INPUT: 236IN_D, 236IN_E, 236IN_F,

236IN_G, 236IN_H;

BOARD1 % THIS BOARD DRIVES SIGNAL 237 \

COLOR.LIGHT:

HEAD1

LAMP: 237ALAMP;

ASPECT: 237ARED, 237AYELLOW, 237AGREEN;

LAMPOUT: SPARE, 237AYLO, 237AGLO;

%HEAD2

LAMP: 237BLAMP;

ASPECT: 237BRED, SPARE, SPARE;

LAMPOUT: 237BRLO, SPARE, SPARE;

INPUT: 1NWPR, 1RWPR;\

Figure 3-3. Advanced Program Example (Continued on next page)


6470A 4/96 3-29

BOARD2 % THIS BOARD DRIVES SIGNAL 236 \COLOR.LIGHT:

HEAD1

LAMP: 236ALAMP;

ASPECT: 236ARED, 236AYELLOW, SPARE;

LAMPOUT: SPARE, 236AYLO, SPARE;

HEAD2

LAMP: 236BLAMP;

ASPECT: 236BRED, 236BYELLOW, 236BGREEN;

LAMPOUT: SPARE, 236BYLO, 236BGLO;

INPUT: SPARE, SPARE;

%BOARD3ISOLATED:

OUTPUT: 1NWR, 1RWR;

INPUT: 2RGPR, 4RGPR, 1TR, 2TR;

SLAVE

ADDRESS:1

OUTPUT: THIS IS INFORMATION TO MICROLOK

1NWCR, 1RWCR, 2HR, 4TPR,

6ESR, 6WSR;

INPUT: THIS IS INFORMATION FROM MICROLOK

2A, 4A, 12GREEN, 12YELLOW;

\



3-30 SM 6470A 4/96

CONFIGURE

QUESTION

TRACKA_LENGTH: 5; %SETS TRACK A LENGTH AT 5000 FT.\TRACKB_LENGTH: 5; %SETS TRACK B LENGTH AT 5000 FT.\

STANDARD

TRACKA_ENABLE: 1; %ENABLES TRACK A\TRACKB_ENABLE: 1; %ENABLES TRACK B\HEAD2_1_ENABLE: 0; %DISABLES HEAD 2 ON BOARD 2\HEAD2_2_ENABLE: 1; %ENABLES HEAD 2 ON BOARD 2\BOARD1_TYPE: 1; %DEFINES A COLORLIGHT BOARD IN SLOT 1\BOARD2_TYPE: 1; %DEFINES A COLORLIGHT BOARD IN SLOT 2\SLAVE_ENABLE: 0; %DISABLES THE SLAVE PORT\

VAR

236AHR, 236BDR, 236BHR, 236RGPR,

236SR, 237DR, 237HR, 237LAMPOUT,

237RGPR, 237SR, F, FLASH;

TIMER

236ALAMP: SET = 1:SEC CLEAR = 0:SEC;236BLAMP: SET = 1:SEC CLEAR = 0:SEC;237ALAMP: SET = 1:SEC CLEAR = 0:SEC;F: SET = 400:mSEC CLEAR = 400:mSEC;236SR: SET = 0:SEC CLEAR = 1:SEC;237SR: SET = 0:SEC CLEAR = 1:SEC;



6470A 4/96 3-31

BEGIN

ASSIGN 236IN_E + 236IN_F + 236IN_G + 236IN_H TO 236AHR;

ASSIGN 236IN_F TO 236BHR;

ASSIGN 236IN_G + 236IN_H TO 236BDR;

ASSIGN 237IN_E + 237IN_F TO 237HR;

ASSIGN 237IN_G TO 237DR;

%ASPECT CONTROL\

ASSIGN ~236AHR TO 236ARED;

ASSIGN 236AHR TO 236AYELLOW;

ASSIGN 236ARED + 236AYELLOW TO 236ALAMP;

ASSIGN ~236BHR * ~236BDR TO 236BRED;

ASSIGN 236BHR * (FLASH + 236AYLO) TO 236BYELLOW;

ASSIGN (236BDR * (236IN_G + (236IN_H * FLASH))) * ~236AYLO TO 236BGREEN;

ASSIGN 236BRED + 236BYELLOW + 236BGREEN TO 236BLAMP;

ASSIGN ~237HR * ~237DR TO 237ARED;

ASSIGN 237IN_E + (237IN_F * FLASH) TO 237AYELLOW;

ASSIGN 237DR TO 237AGREEN;

ASSIGN 237ARED + 237AYELLOW + 237AGREEN TO 237ALAMP;

ASSIGN ~F TO F;

ASSIGN (237IN_F + 236IN_F + 236IN_H) * F TO FLASH;

ASSIGN ~236AHR * ~236BHR * ~236BDR TO 236RGPR;

ASSIGN ~237HR * ~237DR TO 237RGPR;

Figure 3-3. Advanced Program Example (Continued onnext page)


3-32 SM 6470A 4/96

ASSIGN (237AYLO * (237IN_E + 237IN_F)) + 237AGLO * 237IN_G TO 237LAMPOUT;

%TRACK CODES\

ASSIGN ~236OUT_E * ~236OUT_F * ~236OUT_G * ~236OUT_H TO 236OUT_D;

ASSIGN (236RGPR + (236AYLO * 236BYLO)) * 236SR TO 236OUT_E;

ASSIGN 236AHR * ~236AYLO * 236BRED TO 236OUT_F;

ASSIGN (236AHR * ~236AYLO) * ((236BHR * ~236BYLO) +

(236IN_G * ~236BGLO)) TO 236OUT_G;

ASSIGN 236AHR * ~236AYLO * 236IN_H * ~236BGLO TO 236OUT_H;

ASSIGN ((236AHR + 236BHR + 236BDR) *

~237SR * ~TRACKA.NORMAL) +

236SR * ~TRACKB.NORMAL TO 236SR;

ASSIGN ((237HR + 237DR) *

~236SR * ~TRACKB.NORMAL) +

237SR * ~TRACKA.NORMAL TO 237SR;

ASSIGN ~237OUT_E * ~237OUT_F * ~237OUT_G TO 237OUT_D;

ASSIGN (237RGPR + 237LAMPOUT) * 237SR TO 237OUT_E;

ASSIGN 237HR * ~237AYLO TO 237OUT_F;

ASSIGN (237DR * ~237AGLO) + (237IN_F * ~237AYLO) TO 237OUT_G;

END

Figure 3-3. Advanced Program Example (Continued from previous page)


6470A 4/96 3-33

CP

S R

ELA

Y

PO

WE

R S

UPP

LY

CO

LOR

LIG

HT

PCB

CO

LOR

LIG

HT

PCB

BLA

NK

TRA

CK

PC

B

BLA

NK

CP

U P

CB

1 2 3 4 5 6

TRACKINTERFACE

MODULE

TRACKINTERFACE

MODULE

253

252

219

222

CL

237

236M S

CLCL

MS

G / R

Y / FG

FY / R

R / R

Y / R

Y / FG

Y / G

Y / FY

R / R

Y / R

R / FG / R

R / FG / FG

R / FG / G

R / FY / R

R /G / G

R / FY / FY

R / R / FY

R / R / Y

R / R/ R

252 236 222

G / R

FY / R

Y / FG

R / R

Y / R

G / R

FY / R

Y / R

R / R

G / R / R

FY / R / R

Y / R / R

R / R / R

253 237 219

MICROTRAX UNIT

ROUTE AND ASPECT EASTWARD

ROUTE AND ASPECT WESTWARD

236OUT_H

236OUT_G

236OUT_F

236OUT_E

236IN_H

236IN_G236IN_F236IN_E

237IN_G

237IN_F

237IN_E

237OUT_G

237OUT_F

237OUT_E

Figure 3-4. Route Aspect Table


3-34 SM 6470A 4/96

INPUT 2

7

INPUT 1

R

Y

G

R

Y

G

237 SIGNAL

SOURCE

SOURCE

9

10

11

1

2

3NC

4

5

6NC

8

12

13

16

17

14

15

18

19

20

21

22NC

LE

FT C

ON

NEC

TOR

NC

-+

-

+

Figure 3-5. Color Light Wiring - Board 1 (Per Figure 3-3)


6470A 4/96 3-35

11

1

2

3NC

4

5

6NC

12

13

16

17

14

15

18

19

20

21

22NC

CE

NTE

R C

ON

NE

CTO

R

NC

7

8

INPUT 2

INPUT 1

PIN

20

LEFT

CO

NN

EC

TOR

PIN

21

LEFT

CO

NN

EC

TOR

9

10R

Y

G

R

Y

236 SIGNAL “B”HEAD

236 SIGNAL “A”HEADNC

NC

NC

-+

-

+

Figure 3-6. Color Light Wiring - Board 2 (Per Figure 3-3)


3-36 SM 6470A 4/96

2

3

4

5

6

NC

12

16

17

14

15

18

19

20

21

22

CE

NTE

R C

ON

NE

CTO

R

7

8

9

10

NC

+

-+

-

+

NC

-

+

NC

NC-

+

NC-

+

-

+

TRACK INTERFACEPANEL

1

- L+

L-

T+

T-TO TRACKSSLAVE SIDE

L+

L-

T+

T-TO TRACKSMASTER SIDE

TRACK INTERFACEPANEL

OUTPUT 2INPUT 4

11

13

-

+

INPUT 3

OUTPUT 1

PIN

21

PIN

20

LEFT

CO

NN

EC

TOR

INPUT 2

INPUT 1

Figure 3-7. Isolated I/O Wiring - Board 3 (Per Figure 3-3)


6470A 4/96 3-37

1

2

3NC

4

5

6NC

13

14

19

20

21

22

LEFT

CO

NN

ECTO

R

NC

8

-

+

INPUT 2

INPUT 1

7

12

11

9

10 1

3

2

5

6

4

11

9

10 1

3

2

5

6

4MECH.

A+ A-

237 SIGNAL

SOURCE

SOURCE

-

+

-

+

Figure 3-8. 4-Wire Searchlight (-2001) Wiring - Board 1 (Per Figure 3-3)


3-38 SM 6470A 4/96

1

2

3NC

4

5

6NC

12

13

16

17

14

15

18

19

20

21

22NC

CE

NTE

R C

ON

NEC

TOR

NC

7

8

NC

NC

INPUT 2

INPUT 1

PIN

20

LEFT

CO

NN

EC

TOR

PIN

21

LEFT

CO

NN

EC

TOR

10

11

9

1

3

2

5

6

4MECH.

A+ A-

236B SIGNAL

1

3

2

5

6

4MECH.

A+ A-

236A SIGNAL

-

+

-

+

Figure 3-9. 4-Wire Searchlight (-2001) Wiring - Board 2 (per Figure 3-3)


6470A 4/96 3-39

3.6 PROGRAMMER GUIDELINES - PROGRAM EXECUTION

3.6.1 General

A MICROTRAX program does not execute in the same manner as a typical computer program. Thelatter has a logical order of statements that are executed in the manner defined by the programmer(usually from top to bottom). A MICROTRAX program does not necessarily follow this pattern becauseof the type of the logic and applications (e.g., relay based systems). The program only executes thoseequations that need to be re-evaluated. The resulting sequence may or may not be in top-to-bottomorder; a widely variable number and sequence of logic equations may be executed. Programexecution will continue indefinitely as long as changes occur. To best understand the execution of aMICROTRAX program, it is important to understand two internal data structures, specifically the TimerList and the Trigger List.

3.6.2 Timer List

The timer list is used to hold timer bits when such bits have been commanded to change state. (Whenthe defined interval elapses, the associated bit changes state.) Such a bit is called an active bit. It isautomatically placed on the timer list when commanded to change state. The timer list carries everyactive timer bit. The system routinely checks the timer list for the purpose of clocking, changing stateand removing timer bits.

3.6.3 Trigger List

3.6.3.1 General

The trigger list is used to maintain a list of equations that need to be executed. The completedapplication program (as loaded into the CPU Module EPROM) contains information that maps every bitto every equation in which that bit is used. This mapping is used to trigger equations (e.g., mark themfor execution) whenever a bit changes. When equations are marked for execution, they are dividedaccording to a breaks-before-makes rule (refer to section 3.6.3.2). When a program begins execution,every logic equation is evaluated at least once. This is done to initialize the system.

3.6.3.2 Breaks-Before-Makes Rule

To eliminate timing problems, any bit that changes and triggers an equation for execution causes theequation to be (a) placed on the trigger list and (b) marked if the "contact" is being broken or made.This relates directly to the definition of a bit. For example, if the defined bit is named CONTACT,CONTACT refers to the "front contact" of that bit. NOT CONTACT refers to the "back contact" of thatbit. When equations are placed on the trigger list, those involving a break of a contact will always beexecuted before those involving a make.

The following table shows how an equation will be placed on the trigger list, based on the changing bit:

Current Valueof BIT Changing To Equation Uses Placed On

1100

0011

BITNOT BIT

BITNOT BIT

BREAK listMAKE listMAKE listBREAK list


3-40 SM 6470A 4/96

The following two ASSIGN statements are provided to show how equations may be triggereddifferently:

ASSIGN NOT A TO INDC_1; %Equation #1\ASSIGN A TO INDC_2; %Equation #2\

When bit A is assigned a new value, both of these equations will be triggered for execution. However,if A had an initial value of "0" (clear) and is now changed to a "1" (set), then Equation #l will betriggered on the Break list and Equation #2 will be trigger on the Make list. Since Breaks are alwaysdone before makes, Equation #1 will be executed before Equation #2. This follows directly from thebreaking of the back contact (used in Equation #1), and then the making of the front contact (which isused in equation #2).

3.6.4 Sample Execution - Timer and Trigger Lists

The program segment at the top of the next page is shown to describe the trigger and timer lists duringtheir execution.

For the first sample operation of this sample program, all inputs (Il, IN.A1, IN.A2) start at "0". At thebeginning of the program execution each logic equation is queued for execution. As a result:

1. FLASH is placed on the timer list to be SET ("1") in 1 second.

2. "0" assigned to 0UT.A1

3. "0" assigned to 01, 02

4. "0" assigned to 0UT.B1

At this point the system has executed all equations. No other logic will be executed (assuming no newinputs) until 1 second has elapsed. After 1 second, FLASH will be removed from the timer list andSET ("1"). As a result of the set of FLASH, every equation that uses FLASH will be queued on thetrigger list. Once all the equations are queued they will be executed. In this case, equations 1 and 3are triggered.


6470A 4/96 3-41

MICROTRAX PROGRAM LISTS;

INTERFACE

TRACKA:OUTPUT: OUT.A1;INPUT: IN.A1;

TRACKB:OUTPUT: OUT.B1;INPUT: IN.B1;

BOARD1

NON.ISOLATED:OUTPUT: O1,O2;INPUT: I1;

CONFIGURE

STANDARDTRACKA_ENABLE: 1;TRACKB_ENABLE: 1;BOARD1_TYPE: 3;

VAR FLASH;

TIMER FLASH: SET = 1:SEC CLEAR = 1:SEC;

BEGINASSIGN NOT FLASH TO FLASH; % #1 \ASSIGN IN.A1 AND I1 TO OUT.A1; % #2 \ASSIGN IN.B1 AND FLASH TO O1,O2; % #3 \ASSIGN I1 TO OUT.B1; % #4 \

END

-Trigger and Timer Lists Sample Program-

1. FLASH is removed from timer list and SET ("1"). This places equations #l and #3 on thetrigger list.

2. Equation #1 is removed from the trigger list and evaluated. Since FLASH is SET ("1"),FLASH will be placed on the timer list to be CLEARed ("0") in 1 second.

3. Equation #3 is removed from the trigger list and evaluated. "0" assigned to 01 and 02.

4. After 1 second, FLASH is removed from the timer list and CLEARed ("0"). This placesequations #1 and #3 on the trigger list.

5. Equation #3 is removed from the trigger list and evaluated. "0" assigned to 01 and 02.

6. Equation #1 is removed from the trigger list and evaluated. Since FLASH is now CLEARed("0"), FLASH will be placed back on the timer list to be SET ("1") in 1 second.


3-42 SM 6470A 4/96

The above loop will continue for the duration of the execution of the program, although equation #3 willnot change unless IN.B1 changes.

For the second sample operation of this program, a "1" (SET) is input to I1. This causes the followingactions (ignoring FLASH and its effect on the system):

1. Equations #2 and #4 are placed on the trigger list.

2. Equation #2 will be removed from the trigger list and evaluated. "0" is assigned to OUT.A1.

3. Equation #4 will be removed from the trigger list and evaluated. "1" is assigned to OUT.B1.

3.6.5 Cyclic Logic

Certain types of logic can cause a perpetual operation problem when a MICROTRAX program is beingexecuted. For example:

ASSIGN NOT FLASH TO FLASH;

If FLASH has not been defined as a timer bit, the above statement will cause a lock up of the unitwhen execution of the program begins. This is due to FLASH being SET and CLEARed at (in effect)an infinitely short rate because it has no distinct pick or drop delay. As a result, the system onlyexecutes this equation; other logic processes are inhibited from execution. This type of logic isindirectly detected by the system because of the excessive time required for other logic to execute(causing a system shut-down).

Section IV DEVELOPMENT SYSTEM

6470A 4/96 4-1

4.1 INTRODUCTION (see Figure 4-1)

The MICROTRAX Development System (M.T.D.S.) enables the user to design, develop and test theapplication logic programs using a standard personal computer. The basic application of the M.T.D.Sis as follows:

1. The application logic program is entered using a standard text editor.

2. The program is then processed by the MICROTRAX compiler, which reads the applicationlogic program and verifies that the program follows defined rules. The compiler alsochecks that bits are legally defined and used.

3. After the application logic program is compiled, the MICROTRAX Simulator is used to testand debug the program. The simulator is designed to accurately mimic MICROTRAXhardware functions.

4. Once the program has been tested and finalized, it is loaded into an EPROM for installationon the MICROTRAX CPU Module.

PROGRAMFILE

COMPILER

LISTING

FILE

PROM

PRO-GRAMMER

SIMULATOR

EPROM IC

Figure 4-1. MICROTRAX Development System Basic Diagram


4-2 SM 6470A 4/96

4.2 M.T.D.S. AVAILABLE FILES

The MICROTRAX Development System uses seven file extensions. These extensions enable theuser to employ the various parts of the M.T.D.S.:

.TRX Source program for the application logic

.TLS Listing file produced by the compiler

.TDG Debug file produced by the compiler and used by the simulator.

.TCD Code file produced by the compiler and used by the EPROM Programmer software to program the EPROM.

.TEQ Equation file generated by the simulator

.TSI Simulator initialization file

.TIM Intermediate file used by the compiler

4.3 ENVIRONMENT TABLE

The MICROTRAX Development System uses the DOS Environment Table to determine the locationsof particular files. For example, there may be a requirement to control the location of the applicationlogic programs. Assume the following is the required directory structure:

C:\

SOURCE LISTING CODE DEBUG

A. All source files (those with the .TRX extension) will be kept inC:\SOURCE.

B. Compiler listings (.TLS) will be kept in C:\LISTINGS.C. EPROM code files (.TCD) will be kept in C:\CODE.D. Simulator debug files (.TDG) in C:\DEBUG.

To facilitate this, the compiler examines the Environment Table to determine if defaults are to beoverridden. By default, the M.T.D.S. will access only the current directory for these files. The defaultsmay be changed. The following tables list the DOS commands to set the new defaults:

SET TRX=C:\SOURCE\SET TLS=C:\LISTINGS\SET TCD=C:\CODE\SET TDG=C:\DEBUG\

These commands place entries into the Environment Table.

1. When the compiler is run to compile an application program, the Environment Table isexamined to see if there is an entry for TRX. If there is, it will be used as a prefix for the filename. In this example, the program to be compiled is called TEST.TRX. When thecompiler is run, it checks the Environment Table for TRX. If an entry is present, it will beused as the prefix. Therefore, C:\SOURCE\ is added to TEST.TRX, and the compilerbegins processing the application logic program C:\SOURCE\TEST.TRX.

2. When the compiler is running and needs to create the listing file (with the extension .TLS),again the Environment Table is searched. If TLS is present, it will be used. Therefore, inthis example the listing file would be called C:\LISTINGS\TEST.TLS.


6470A 4/96 4-3

3. Similarly, when the compiler creates the code file, an entry will be used if that entry ispresent. (In this example, the code file will be C:\CODE\TEST.TCD.)

4. Similarly, when the compiler creates the debug file, an entry will be used if that entry ispresent. (In this example, the debug file will be C:\DEBUG\TEST.TDG.)

5. When the simulator is run and its attempts to read the application logic's EPROM code file,an environment entry for TCD will be used if it is present. (In this example, the simulatorwill read the file C:\CODE\TEST.TCD.)

6. When the simulator is run and it attempts to read the application logic's debug file, anenvironment entry for TDG will be used if it is present. (In this example, the simulator willread the file C:\DEBUG\TEST.TCD.)

NOTE

When specifying the Environment Table, make sure to include thebackslash symbol (\) after the directory name.

4.4 M.T.D.S. - COMPILER

4.4.1 General

The M.T.D.S. compiler checks and converts the application program into a code that can be processedby the Executive software. The compiler performs two functions: code generation and assembly.

The code generator checks the source program for any errors, using a 2-phase process: Syntaxanalysis and semantic analysis. Syntax analysis looks for improper "grammar" in the program. Duringthis analysis, two types of errors may be detected, including token errors (more than 16 characters,illegal character, etc.) and statement syntax errors (no BEGIN reserved word, missing semicolon, etc.).

Semantic analysis checks for meaningful statements. For example:

ASSIGN A AND B TO C;

If C is defined as an input bit, or B has not been defined, a semantic error will be detected. Refer tosection 5.1 for a complete listing of compiler error messages.

As the source program is processed, it is converted to a special-purpose code that, in turn, isprocessed by the Assembler section of the compiler. The assembler converts the outputs of the codegenerator to a format compatible with the EPROM programmer.

The compiler is accessed by using the batch file MICROTRX <name>. Typing in this term invokes thebatch file. This file can perform several functions, depending on how it is invoked:

MICROTRX HELP


4-4 SM 6470A 4/96

This displays the help file. This file is shown below*:

MICROTRAX Help File Version 1.00

1. MICROTRAX Compiler MICROTRAX <name>Compile the MICROTRAX program <name>.TRXErrors reported in <name>.TLS

This HELP screen: MICROTRAX help

2. MICROTRAX EPROM TRXPROM <name>Program EPROM using the file <name>.TCD.

3. MICROTRAX Simulator TRXSIM <name>Simulate the execution of a MICROTRAX program.

4. MICROTRAX Monitor TRXMONTRConnect to the MICROTRAX unit to monitor internalstatus.

5. MICROTRAX Configuration TRXCONFGConnect to the MICROTRAX unit to display or modifythe current configuration.

*NOTE: Refer to SM-6470B for the monitor (TRXMONTR) and configure (TRXCONFG) programs.

MICROTRX <name> If <name>.TRX appears as a file in the current directory, it is compiled.Otherwise, a FILE DOES NOT EXIST message is displayed.

The batch file performs several operations:

1. Determines if the requested file exists; displays error message and stops if this file does notexist.

2. Deletes the previous EPROM code (.TCD) file.

3. Calls the MICROTRAX compiler.

The batch file is recommended for compiling a MICROTRAX program.

4.4.2 Symbol Table Listing

The M.T.D.S. compiler symbol table indicates (ASSIGNS USING FRONT/BACK) the number of timesthe "front contact" and the "back contact" of a bit (or "relay") has been used in the application program.An example is shown on page 4-9. This permits the user to verify that all defined bits are beingreferenced in the application program. For example:

1. Bit OUT_CODE_2 is an output bit defined for the track. However, it is marked asUNASGND. This means that the bit has not been assigned a value in a logic equation.Outputs that are defined should be assigned a value. When a bit is flagged as UNASGND,it should be examined to verify that the program is correct.

2. Bit IN_CODE_1 is an input bit that is used on one logic equation. Specifically, the frontcontact of IN_CODE_1 is used.

3. Bit INPUT_3 is an input bit, however this bit is not used in any logic equation. (This isidentified under the Assigns Using Front/Back column. Since it is blank, this bit was notused in any logic equation.)


6470A 4/96 4-5

4.4.3 Comments Symbol and Page Generator Compiler Switch

In the sample program on the following pages, note the exclamation point (!) at the beginning of a line.This is included to help identify comments (any descriptions between % and \). This only happens ifthe comment (%) is the first non-blank item on the line, or the comment spans more than one line. Thecomment on line 1 is not marked with a "!" because it is not the first non-blank item on the line anddoes not span multiple lines. Note that the comment on line 49 utilizes the %$E+\ compiler switch(refer to section 3.2.4.2), causing the compiler to switch to a new page.


4-6 SM 6470A 4/96

-Sample Program for Simulator- (Continued on next page)

MICROTRAX PROGRAM sample_1;% sample MICROTRAX program \

%$D+ Enable debugging to use the Simulator \

INTERFACE% Track A has 2 output codes and 2 input codes Track B is not used \TRACKA:

OUTPUT: out_code_1,out_code_2;INPUT: in_code_1, in_code_2;

TRACKB:OUTPUT: SPARE;INPUT: SPARE;

% the physical I/O consists of 1 color light board, only head 1 is used and 1 isolated relay driver board with 2 outputs and 3 inputs \BOARD1

COLOR.LIGHT:HEAD1

LAMP: bulb_on;ASPECT: red,yellow,green;

BOARD3ISOLATED:

OUTPUT: output_1,output_2;INPUT: input_1, input_2, input_3;

% define the configuration define the track length as 20,000 feet and board #3 as an isolated I/O card and allow those to change. Define board #1 as a color light, enable track A, disable track B and do not allow them to change \

CONFIGUREQUESTION

TRACKA_LENGTH: 20;BOARD3_TYPE: 4;

STANDARDBOARD1_TYPE: 1;TRACKA_ENABLE: 1;TRACKB_ENABLE: 0;TRACKB_LENGTH: 20;

VARflash;

% put a 10 second slow pick on output_1 and a slow release of 5 seconds flash the bulb every 5 seconds \

TIMERoutput_1: SET = 10:SEC CLEAR = 5:SEC;flash: SET = 5:SEC CLEAR = 5:SEC;

%$E+\

BEGIN % if input #1 and track code #1 are active - select the green bulb \



6470A 4/96 4-7

% if input #2 and track code #2 are active - select the yellow bulb \ASSIGN input_2 AND in_code_2 TO yellow;

% if the track is not communicating - select the red bulb \ASSIGN NOT TRACKA.NORMAL TO red;

% if input #1 is active - send the first track code \ASSIGN input_1 TO out_code_1;

% if any of the bulbs are selected - flash the lamp \ASSIGN ( red OR yellow OR green)

AND flash TO bulb_on;

% if the track is communicating - energize output #1 on board #3 \ ASSIGN TRACKA.NORMAL TO output_1;

% start the flasher \ ASSIGN NOT flash TO flash;

END


4-8 SM 6470A 4/96

-Simulator Sample Program - Source Listing- (Continued on next page)

MICROTRAX Source Listing [ Version 3.00 ] 2-JUN-1995 Page: 1 Copyright 1993, Revised 1994, Union Switch & Signal Inc.

1 MICROTRAX PROGRAM sample_1; % sample MICROTRAX program \ 2 3 %$D+ Enable debugging to use the Simulator \ 4 5 INTERFACE! 6 % Track A has 2 output codes and 2 input codes! 7 Track B is not used \ 8 TRACKA: 9 OUTPUT: out_code_1,out_code_2; 10 INPUT: in_code_1, in_code_2; 11 TRACKB: 12 OUTPUT: SPARE; 13 INPUT: SPARE; 14! 15 % the physical I/O consists of 1 color light board, only head 1 is used! 16 and 1 isolated relay driver board with 2 outputs and 3 inputs \ 17 BOARD1 18 COLOR.LIGHT: 19 HEAD1 20 LAMP: bulb_on; 21 ASPECT: red,yellow,green; 22 23 BOARD3 24 ISOLATED: 25 OUTPUT: output_1,output_2; 26 INPUT: input_1, input_2, input_3; 27! 28 % define the configuration! 29 define the track length as 20,000 feet and board #3 as an isolated I/O card and! 30 allow those to change. Define board #1 as a color light, enable track! 31 A, disable track B and do not allow them to change \ 32 CONFIGURE 33 QUESTION 34 TRACKA_LENGTH: 20; 35 BOARD3_TYPE: 4; 36 STANDARD 37 BOARD1_TYPE: 1; 38 TRACKA_ENABLE: 1; 39 TRACKB_ENABLE: 0; 40 TRACKB_LENGTH: 20; 41 VAR 42 flash; 43! 44 % put a 10 second slow pick on output_1 and a slow release of 5 seconds! 45 flash the bulb every 5 seconds \ 46 TIMER 47 output_1: SET = 10:SEC CLEAR = 5:SEC; 48 flash: SET = 5:SEC CLEAR = 5:SEC; 49 %$E+\


6470A 4/96 4-9

50 51 BEGIN! 52 % if input #1 and track code #1 are active - select the green bulb \ 53 ASSIGN input_1 AND in_code_1 TO green; 54! 55 % if input #2 and track code #2 are active - select the yellow bulb \ 56 ASSIGN input_2 AND in_code_2 TO yellow; 57! 58 % if the track is not communicating - select the red bulb \ 59 ASSIGN NOT TRACKA.NORMAL TO red; 60! 61 % if input #1 is active - send the first track code \ 62 ASSIGN input_1 TO out_code_1; 63! 64 % if any of the bulbs are selected - flash the lamp \ 65 ASSIGN ( red OR yellow OR green) 66 AND flash TO bulb_on; 67! 68 % if the track is communicating - energize output #1 on board #3 \ 69 ASSIGN TRACKA.NORMAL TO output_1; 70! 71 % start the flasher \ 72 ASSIGN NOT flash TO flash; 73 74 END

Errors Detected : 0Unassigned Internal/Output Bits : 12


4-10 SM 6470A 4/96

-Simulator Sample Program - Symbol Table Listing- (Continued on next page)

MICROTRAX Symbol Table Listing Program: "SAMPLE_1 " Page: SYM-1

Bit Assigns Using Bit Interface Information Time Delay No./Name Front/Back Type Station/Position Set Clear

1 OUT_CODE_1 OUTPUT TRACK 8 0 2 OUT_CODE_2 *UNASGND TRACK 8 1 3 IN_CODE_1 1 0 INPUT TRACK 8 2 4 IN_CODE_2 1 0 INPUT TRACK 8 3 SPARE(S) 7 BULB_ON OUTPUT LOCAL 2 0 8 RED 1 0 OUTPUT LOCAL 2 1 9 YELLOW 1 0 OUTPUT LOCAL 2 2 10 GREEN 1 0 OUTPUT LOCAL 2 3 SPARE(S) 23 OUTPUT_1 OUTPUT LOCAL 6 0 10:SEC 5:SEC 24 OUTPUT_2 *UNASGND LOCAL 6 1 25 INPUT_1 2 0 INPUT LOCAL 6 2 26 INPUT_2 1 0 INPUT LOCAL 6 3 27 INPUT_3 INPUT LOCAL 6 4 SPARE(S) 29 FLASH 1 1 INTERNAL 5:SEC 5:SEC 30 TRACKA.NORMAL 1 1 SYSTEM BIT 31 TRACKA.LINKUP SYSTEM BIT 32 TRACKA.TDIN SYSTEM BIT 33 TRACKA.SLEEPIN SYSTEM BIT 34 TRACKA.TDOUT *UNASGND 35 TRACKA.SLEEPOUT *UNASGND 36 TRACKA.ENABLE SYSTEM BIT 37 TRACKB.NORMAL SYSTEM BIT 38 TRACKB.LINKUP SYSTEM BIT 39 TRACKB.TDIN SYSTEM BIT 40 TRACKB.SLEEPIN SYSTEM BIT 41 TRACKB.TDOUT *UNASGND 42 TRACKB.SLEEPOUT *UNASGND 43 TRACKB.ENABLE SYSTEM BIT 44 UNIT.END SYSTEM BIT 45 UNIT.REPEATER SYSTEM BIT 46 UNIT.INTERMEDIAT SYSTEM BIT 47 BOARD1.COLOR SYSTEM BIT 48 BOARD1.SEARCH SYSTEM BIT 49 BOARD1.NONISO SYSTEM BIT 50 HEAD2.1.ENABLE SYSTEM BIT 51 BOARD2.COLOR SYSTEM BIT 52 BOARD2.SEARCH SYSTEM BIT 53 BOARD2.NONISO SYSTEM BIT 54 HEAD2.2.ENABLE SYSTEM BIT 55 BOARD3.NONISO SYSTEM BIT 56 BOARD3.ISO SYSTEM BIT 57 SLAVE.ENABLE SYSTEM BIT 58 MASTER.ON SYSTEM BIT 59 SLEEP.ENABLE SYSTEM BIT 60 INPUT.ERROR SYSTEM BIT


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MICROTRAX Symbol Table Listing Program: "SAMPLE_1 " Page: SYM-2

Bit Assigns Using Bit Interface Information Time Delay No./Name Front/Back Type Station/Position Set Clear

61 CONFIGURE.ERROR SYSTEM BIT 62 CPS.STATUS SYSTEM BIT 63 AUX.INPUT SYSTEM BIT 64 CROSS.UNIT.IN SYSTEM BIT 65 CROSS.UNIT.OUT *UNASGND 66 KILL *UNASGND 67 RESET *UNASGND 68 LOG.EVENT.1 *UNASGND 69 LOG.EVENT.2 *UNASGND 70 GOTO.SLEEP *UNASGND 71 LCP.ENABLE SYSTEM BIT 72 TRACK.BOARD SYSTEM BIT

SWITCH & CONFIGURATION Settings

Debug : ONSLAVE Time Out : 4.0 SEC Baud Rate : 1200 BPS Key On : 0 MSEC Key Off : 75 MSEC


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4.5 M.T.D.S. - SIMULATOR

NOTE

The track status bits (TRACKx.NORMAL and TRACKx.LINK-UP) are notautomatically set/cleared by the MICROTRAX simulator. Since it is possible tobe in the Normal mode without having track input bits set, the simulator cannotalways determine the state of these bits. When running the simulator, makesure that TRACKx.NORMAL and TRACKx.LINK-UP are in their intended states.

4.5.1 General

The MICROTRAX Simulator allows testing of a completed MICROTRAX program, prior to actualloading in the system hardware. Commands are provided in the simulator to mimic operating aspectsof the designed system. This includes setting and clearing internal and external "relays", executinglogic equations and advancing the system time. Logic statements and the system clock can bestepped individually or simultaneously at any desired increment. Commands are also available todisplay:

1. Inputs and outputs according to their physical arrangement in the cardfile.

2. Names, bit numbers and status of individual relays.

3. Logic statements as they are executed.

With the simulator, the source program is compiled in the same manner as the program that will beloaded into the system hardware, with the exception of the debug switch (refer to section below). ThePROM code file, with the extension .TCD, is the standard input to the simulator. The debug file, withthe extension .TDG, supplies relay names, equation information and system bit information. In thesimulator, logic execution follows the same algorithm as the run-time system.

4.5.2 Access to Simulator

NOTES

The actual simulator screens presented here may differ slightly if laterrevisions of the simulator are used.

The simulator uses the EPROM file produced by the compiler. If a programis to be debugged using the simulator, it must be compiled with the debugswitch on (%$D+\). (The default is %$D-\.) This switch does not affect thecode file; it only generates the debug file. The switch does not have to beturned off to program EPROMs.

Command terms in the following text are shown in bold face, all capitalletters, to help distinguish them from other words in the text. In the actualuse of the simulator, these words may be typed in lower case letters aswell as upper case. <CR> indicates the carriage return (or enter) key.

1. The simulator is invoked by entering TRXSIM and a carriage return <CR>, as shown in thehelp file below. The simulator cover screen will then be displayed, showing the latestversion of the simulator.

2. The prompt on the cover screen asks for the name of the source program. When the nameis entered, a tabulation will appear immediately below. This table lists the basic totals ofbits and boards (cardfile I/O modules) in the source program:


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NOTE

The name of the program will not be prompted if TRXSIM <name> is used.

_______________________________________________________________________________

MICROTRAXSimulator

Version 1.00

Copyright 1992Union Switch & Signal Inc.

Program-> example1

Code File : SAMPLE.TCDSymbol File : SAMPLE.TDG

Total number of BITS defined 68Press <RETURN> to initialize the logic

Trigger List: 0 , 0 System Time: 00:00:00:000 Timer List: 0Command- Program: SAMPLE_1 Screen: Int

_______________________________________________________________________________

NOTE

All of the following examples are based on the program on page 4-6 and weredone using version 1.00 of the simulator.

4.5.3 Standard Formats

The MICROTRAX simulator supports several different screen types. Each screen contains two statuslines, as shown below:

Trigger List: m , b System Time: HH:MM:SS:MSEC Timer List: tCommand- Program: name Screen: name

Trigger List: m , b These terms define the number of equations queued on the makelist (m) and on the break list (b).

System Time: HH:MM:SS:MSEC The current simulation system time is displayed in hours minutes,seconds and milliseconds.

Timer List: t (t) shows the number of active timer bits.


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4.5.4 Simulator Operation

4.5.4.1 General

When the simulator is executed and the PROM tables are entered, the simulator performs thenecessary housekeeping functions:

1. Initialize all bits to 0.

2. Reset/clear all data structures (System Time, Trigger List and Timer List).

3. Execute all equations using the following procedure:

A. Execute equation #1 and then continue executing all triggered equations.

B. Execute equation #2 ...... (etc.)

4.5.4.2 Sample Program

Simulator commands are described in detail in subsequent sections using the sample program shownon pages 4-7 and 4-8. The associated bit symbol table is shown on pages 4-9 and 4-10. Each of theavailable commands (see Help screen, section 4.5.4.3) is exercised with this program, using thesequence from the Help screen. This is not a required order. With practice, the user will find itdesirable to call up a variety of commands at any point in the simulation.

4.5.4.3 Help Screen

HELP <CR> produces the standard simulator help screens shown below. This screen shows alldisplay and operating commands and their purposes. Note that the command names include capitaland lower case letters. The capital letters are the minimum characters required for a valid command.Using the "Quit" command as an example, Q <CR> would cause an error message, but QU <CR>would be a valid command. (QUI and QUIT are also valid.) Capital letters are only used on the helpscreen to show the shortest substring that can be specified for that command. In practice, these mayalso be entered in lower case letters (for example, qu, qui, quit).


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****HELP SCREEN****page 1

Display:DISPLAY IO display values of the I/O boardsDIsplay TRiggers display equations on trigger listDIsplay RElays display relays on display listDIsplay RElays (list) add relays to the display listDIsplay TImers display all relays on timer queueDIsplay COnfigure display current configuration settingsVAlue (list) display value of relay(s)REMove (list) remove relay(s) from display listNO display full screen displayCOLor use color characteristics for displayMOno use monochrome characteristics for display

Simulation:RUn [x] run system for x millisecondsEXecute [x] execute x number of logic equationsINCrement [x] increment system clock x millisecondsTRace [x] display and execute x logic equations

****HELP SCREEN****page 2

Bit Operations:SEt (list) set the relay(s) in (list)CLear (list) clear the relay(s) in (list)INPut (list) input values for the board(s) in (list)

A= track A, B= track B, 1-3 I= /O boardsControl:

PRint {file} print logic equations to (file)REAd {file} read commands from (file)PAuse when read from command file,

pauses for keyboard commandsCONt when entered from the keyboard,

continues reading commands from the command fileRESet restart the simulator with the same programREConfigure reset the configuration parameters and RESetQUit end the simulation

Trigger: 0, 0 System Time: 00:00:00:000 Timer List: 0Command-> Program: SAMPLE_1 Screen: Help

The notations after the Help screen commands are defined as follows:

Notation Function

[ ] Optional argument. If this is not specified, the simulator will resort to the associateddefault. For example, if the Display Relays command is entered without a list ofrequested relays, all relays on the relay display list will be shown.

(list) List of bit names/numbers. The list is used to specify a bit or series of bits.

{ } Required argument. If not specified, it will be prompted.file File name. Default extensions will be added.


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4.5.4.4 Display I/O Command

The Display I/O command (DI IO <CR>) shows the local I/O defined in the source program. Eachhorizontal entry describes the board type and the values for any defined bits. Output boards may alsohave check bits defined. (Check bits correspond to LAMP.OUT and SUSPEND TEST.) Display I/O isa dynamic display; as the program executes, the values are updated. An example is shown at the topof the following page.

For each of the available I/O boards, two lines appear on the screen. The title line defines the boardnumber and titles. TEST defines the test bit associated with each board. The Track board includesSTATUS. Although this is not part of the local I/O, it displays the track status (SHUNT, NORMAL,LINKUP) as controlled by the user via the system bits. The lamp driver boards in LMP (whichindicates the status of the LAMP bit (on or off)), and ASPCT (to indicate if any of the aspects havebeen selected).

4.5.4.5 Display Triggers Command

The Display Triggers (DI TR <CR>) command displays all equations queued on the trigger lists.Equations are displayed by their line number, which is produced by the compiler. This is a staticdisplay and is not updated during execution of equations. An example is shown in the middle of thefollowing page. The tabulation at the bottom of the next page can be used to determine which list anequation will be added to when a bit changes.


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- Display I/O Screen Example -

TRACK INTERFACE TEST STATUS OUTPUT INPUTTRACKA SHUNT OUTPUT-SHUNT INPUT-SHUNT

BOARD 1 TEST LMP ASPCT CHECK INPUT COLORLIGHT 1 1 0 0 0 0 0 0 0

BOARD2

BOARD3 TEST OUTPUT INPUT ISOLATED 0 0 0 0 0 0

Trigger List: 0 , 0 System Time: 00:00:00:000 Timer List: 0Command-> Program: SAMPLE_1 Screen: I/O Boards

- Display Triggers Example -

Break List Make List

Line # 59 Line # 53Line # 62Line # 56Line # 69

Trigger List: 0 , 0 System Time: 00:00:00:000 Timer List: 0Command-> Program: SAMPLE_1 Screen: I/O Boards

- Trigger List Development Table -

EquationBits Value Changing To Uses Queued On

Bit 0Bit 0Bit 1Bit 1

1100

bit Make List~bit Break List bit Break List~bit Make List


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4.5.4.6 Display Relays Command

The Display Relays command is used to control the relay information screen. Up to 34 bits may bedisplayed on this screen. The number, name, current value and timer status for each bit is shown.There are two command formats: basic and enhanced. The basic command is DI RE <CR> Thiscommand format changes the screen to the relay display and displays all bits on the display list. Theenhanced command is DI RE (list) <CR>. This format adds the bits specified in (list) to the displaylist, then displays them.

The (list) format specifies individual bits, separated by spaces (e.g. DI RE RED YELLOW GREEN), orranges of bits separated with a hyphen (e.g. DI RE RED-GREEN). Bits may be specified by eithername or number. A maximum of 34 bits may be displayed at one time. Refer to section 4.5.4.10(Remove Command) for the method of removing bits from the display list. Other examples of bit listsinclude:

DI RE RED YELLOW INPUT_1-INPUT_2DI RE 1-4 OUTPUT1 40-44DI RE 7

- Display Relays -

|Bit Number - Name Value Status | Bit Number - Name Value Status

| 1 OUT_CODE_1 clr | 30 TRACKA.NORMAL clr 2 OUT_CODE_2 clr | 31 TRACKA.LINKUP clr 3 IN_CODE_1 clr | 32 TRACKA.TDIN clr 4 IN_CODE_2 clr | 33 TRACKA.SLEEPIN clr 5 SPARE clr | 34 TRACKA.TDOUT clr 6 SPARE clr | 35 TRACKA.SLEEPOUT clr 7 BULB_ON clr | 36 TRACKA.ENABLE set 8 RED set | 37 TRACKB.NORMAL clr 9 YELLOW clr | 38 TRACKB.LINKUP clr10 GREEN clr | 39 TRACKB>TDIN clr23 OUTPUT_1 clr | 40 TRACKB.SLEEPIN clr24 OUTPUT_2 clr | 41 TRACKB.TDOUT clr25 INPUT_1 clr | 42 TRACKB.SLEEPOUT clr26 INPUT_2 clr | 43 TRACKB.ENABLE clr27 INPUT_3 clr |28 SPARE clr |29 FLASH clr 5000 set |

Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command- Program: SAMPLE_1 Screen: Relays

4.5.4.7 Display Timers Command

The Display Timers command (DI TI <CR>) produces a static display of all active timers on the timerlist. The screen format is the same as the relays screen. This is a static display; values do not changeduring execution.


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4.5.4.8 Display Configuration

The Display Configuration command (DI CO <CR>) is used to display the MICROTRAX unit's currentconfiguration values (refer also to SM-6470B). Only those configuration items that affect thesimulation are displayed, specifically, any item that results in a bit definition. For example, theSLAVE_ENABLE configuration bit is available in the simulator because it controls theSLAVE.ENABLE system bit. Serial link parameters (e.g. address, baud rates) are not available in thesimulator because they do not affect program execution.

- Display Configuration Example -

TRACK PARAMETERSTRACK A ENABLED TRACK B DISABLED

IO PARAMETERSUNIT TYPE 0 SLEEP MODE DISABLED

BOARD 1 COLORLIGHT HEAD 2 DISABLEDBOARD 2 DISABLED HEAD 2 DISABLEDBOARD 3 ISOLATED

SERIAL LINK PARAMETERSSLAVE LINK DISABLED

Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command- Program: SAMPLE_1 Screen: Config.

4.5.4.9 Value Command

The Value command (VA (list) <CR>) may be used to display the value of any desired relays. Forexample, if the current screen was IO, any other bit may be examined by using the Value command.The Value command does not change the format of the screen. Rather, it scrolls the information at thebottom of the screen. The desired bits are specified in (list). Refer to section 4.5.4.6 for informationon (list).

- Value of Command -

TRACK INTERFACE TEST STATUS OUTPUT INPUTTRACKA SHUNT OUTPUT-SHUNT INPUT-SHUNT

BOARD1 TEST LMP ASPCT CHECK INPUT COLORLIGHT 1 1 0 0 0 0 0 0 0

BOARD2

BOARD 3 TEST OUTPUT INPUT ISOLATED 0 0 0 0 0 0

Trigger List: 0 , 0 System Time: 00:00:03:000 Timer List: 0Command-> val red-green Program: SAMPLE_1 Screen: I/O Boards

relay #8 - RED setrelay #9 - YELLOW clearrelay #10 - GREEN clear


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4.5.4.10 Remove Command

The Remove (REM <CR>) command allows removal of relays from the relay display list. Relays canbe removed by bit number or name. In the first screen example (page 4-21), the command DI RE 1-34was issued. Since much of the display space is used up with unneeded SPARE items, they can beremoved. In the second screen example, the command REM 11-22 was issued.

4.5.4.11 No Display Command

The scroll area of the CRT screen is relatively small. The No Display command (NO <CR>) removesthe current command screen (e.g.. relay tabulation) and allows the entire CRT screen for scrolling. Inturn, this allows more scrolled information to be viewed at one time.

4.5.4.12 Color/Monochrome Commands

The M.T.D.S. simulator supports the use of color video displays. The simulator makes use of bothmonochrome and color characteristics to produce more easily viewed displays. The default mode ofthe simulator is monochrome.

When using a color display, the command COLOR can be entered to select color graphics, instead ofmonochrome graphics. Also, a MONOCHROME command is available to revert back to the defaultmode. In either mode, the same volume of information is displayed.


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4.5.4.13 Run Command

The Run Command (RU [time] <CR>) executes logic equations and increments system time by [time].Like the Increment command, this command is entered with a time representing how long the systemis to be run. If no time is specified (RU <CR>), the system will execute all equations on the TriggerList. If the timer relay list has any entries, the first relay will be removed from the list and the systemtime will be incremented. If the program contains no timer relays, the default will execute all equationson the trigger list.

To exercise the Run Command, the system is in the state shown at the top of page 4-23.

As shown at the bottom of page 4-23, the command RUN 2000 is entered to let the system perform thesimulation and run until 2 seconds have elapsed. This command executes logic equations andincrements the system time until 2000 milliseconds of simulation time has elapsed.


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- Run Command Example: Initial State -Bit Number - Name Value Status | Bit Number - Name Value Status

| 1 OUT_CODE_1 clr | 2 OUT_CODE_2 clr | 3 IN_CODE_1 clr | 4 IN_CODE_2 clr | 5 SPARE clr | 6 SPARE clr | 7 BULB_ON clr | 8 RED set | 9 YELLOW clr |10 GREEN clr |

Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command-> Program: SAMPLE_1 Screen: Relays

- Run Command Example: Run Command Issued -Bit Number - Name Value Status | Bit Number - Name Value Status

| 1 OUT_CODE_1 clr | 2 OUT_CODE_2 clr | 3 IN_CODE_1 clr | 4 IN_CODE_2 clr | 5 SPARE clr | 6 SPARE clr | 7 BULB_ON clr | 8 RED set | 9 YELLOW clr |10 GREEN clr |

Trigger List: 0, 0 System Time: 00:00:03:000 Timer List: 1Command-> RUN Program: SAMPLE_1 Screen: Relays

- Run Command Example: Run 20000 Command Issued -Increment System Time by 5000 millisecondsCLEARing Bit #29 - FLASHCLEARing Bit #7 - BULB_0NPlace bit #23 - FLASH on timer queueIncrement System Time by 5000 millisecondsSETting Bit #7 - BULB_ONIncrement System Time by 5000 millisecondsCLEARing Bit #29 - FLASHCLEARing Bit #7 - BULB_0NPlace bit #23 - FLASH on timer queueincrement System Time by 5000 millisecondsSETting Bit #29 - FLASHPlace bit #23 - FLASH on timer queueSETting Bit #7 - BLUB_ON

Trigger List: 0, 0 System Time: 00:00:02:000 Timer List: 1Command-> RUN 20000 Program: SAMPLE_1 Screen: Entire


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4.5.4.14 Execute Command

The Execute command (EX [x] <CR>) is used to execute logic equations without advancing the systemtime. A number may be entered with this command, specifying the number of trigger equations to beexecuted. If a number is not specified, then all equations on the trigger list will be executed.

To demonstrate the Execute command, the state of the simulator is as follows:

- Execute Command Example: Initial State -

Break List Make ListLine #59 Line # 69

Line # 53Line # 62Line # 56

Trigger List: 1, 4 System Time: 00:00:00:000 Timer List: 1Command-> Program: SAMPLE_1 Screen: Triggers

The command EX 1 is issued. Equation #3 on line #59 is removed from the trigger list and executed.Given the set input conditions, the bit RED is cleared. As a result of the change to bit RED, equation#5 on line #65 is placed on the break queue (because RED is used in this equation).

The following example shows the trigger list after command EX 1 was executed. The command EX isthen issued. All equations on the trigger list are removed and executed. The results are shown(OUTPUT_1 is placed on the timer queue and OUT_CODE_1 is set).

- Execute Command Example: Command Issued -

Break List Make ListLine #65 Line # 69

Line # 53 <-------- Starting trigger listLine # 62Line # 56

Place bit #23 - OUTPUT_1 on timer queue <-------- Result of EX commandSETting Bit #1 - OUT_CODE_1 <-------- "

Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 2Command-> exec Program: SAMPLE_1 Screen: Triggers

4.5.4.15 Increment Command

The Increment command (INC <CR>) is used to simulate the elapsing of time without executing anylogic. This command has two forms: INC and INC X

The Increment command without a parameter (INC) increments system time by the first time found onthe time list (e.g., the bit with the smallest delay). If the timer list is empty, the INC command has noeffect. The Increment command with a parameter (INC X) advances the system time by xmilliseconds, and updates all timer bits.


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4.5.4.16 Trace Command

The Trace command (TR <CR>) performs the same function as the Execute command, however theactual Boolean logic statements are displayed in the scroll area, as they are executed. This commandhas one optional parameter, which specifies the number of equations to be displayed and executed.The following example demonstrates the Trace Command. With the Trace command, this is done byentering TR <CR>:

- Trace Command Example -

Equation #3 - Line #59assign not TRACKA.NORMAL to RED;Press RETURN to execute equation -->CLEARing Bit #8 - REDEquation #5 - Line #65assign FLASH and (GREEN or (YELLOW or RED)) to BULB_ON;Press RETURN to execute equation -->Equation #1 - Line #53assign IN_CODE_1 and INPUT_1 to GREEN;Press RETURN to execute equation -->Equation #4 - Line #62assign INPUT_1 to OUT_CODE_1;Press RETURN to execute equation -->SETting Bit #1 - OUT_CODE_1Equation #2 - Line #56assign IN_CODE_2 and INPUT_2 to YELLOW;Press RETURN to execute equation -->Equation #6 - Line #69assign TRACKA.NORMAL to OUTPUT_1;Press RETURN to execute equation -->Place bit #23 - OUTPUT_1 on timer queue

Trigger List: 0,0 System Time: 00:00:00:000 Timer List: 2Command-> Program: SAMPLE_1 Screen: Entire

4.5.4.17 Relay Set and Clear Commands

1. General

The Set command (SEt <CR>) and clear command (CLear <CR>) are used to set or cleara bit, a range of bits or a list of bits. Refer to section 4.5.4.6 for details on how the list isstructured. The following provides several examples:

set input_1clear 29 - 34set input_1 - input_3

After the command is issued, information may be displayed.

A. If the action occurred, the screen will show:

SETing bit #x - name


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B. If nothing is displayed, the requested action was not necessary because the bit wasalready in that state.

C. If a request is made to SET/CLEAR a bit that does not result in a change to system, thefollowing message will be displayed:

SETting (CLEARing) Bit ___ will have no effect on the system.

For example, if an output bit not used in any equation is manually set/cleared by theuser, the above message will be displayed. This message indicates bits that may notbe used in the logic.

D. Special functions are performed when setting certain track bits. Refer to section4.5.4.18 (Input Command) for details.

2. Non-Timer Relays

When a request is made to SET/CLEAR a non-timer bit, the operation is immediatelyperformed. The bit is set/cleared and equations that use that bit are triggered.

3. Timer Relays

When a request is made to SET/CLEAR a bit with a timer attribute, the following rulesapply: (Note: This example details the setting of the bit. It is analogous to clearing a setbit.)

A. If the bit has a zero set delay, it is treated as a non-timer relay.

B. If the bit has a non-zero set delay, the bit is placed on the timer list. After the specifiedtime has elapsed, the bit is removed from the list and then set, causing equations to betriggered.

C. If the bit is already set, but is on the timer list to be cleared, another SET commandcauses the bit to be removed from the timer queue (thus causing it to remain set).

4.5.4.18 Input Command

The Input Command (INP (board list) <CR>) is used to control the input of data to the input modules(boards) in the cardfile. Valid board numbers are 1, 2, 3, A and B. Local I/O boards are representedby 1, 2 and 3, track inputs for each track are represented by A and B. When specifying multipleboards on an Input command, separate each designation with a space:

INP 1 2 3 B

1. I/O Boards

Since each I/O board has a different number and different types of inputs, a prompt willappear for the various input bits. (for lamp driver boards, the actual inputs exist, plus thelamp-out bits for each signal head). When I/O boards are defined, the compiler will insertthe correct number of SPAREs to fill any unused bits. For example, the COLORLIGHTboard from the example on page 4-6 does not define the lamp-out bits or the inputs. Thecompiler automatically inserts SPARE bits. When the INPUT command is used, each ofthe available input bits for that board will be prompted for a new value. If the bit is not used,the simulator will print a SPARE and assume a value of 0; the user will not be able to entera value.

Given the sample program, the command INP 1 will yield:


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- Input Command Example: INP 1 -

Enter the values for the check bits on BOARD 1Bit #11 - SPARE input value [0, 1 or <CR>. to exit] = 0 <---Bit #12 - SPARE input value [0, 1 or <CR>. to exit] = 0 <---Bit #13 - SPARE input value [0, 1 or <CR>. to exit] = 0 <---Enter the values for the check bits on BOARD 1 <---Bit #18- SPARE input value [0, 1 or <CR>. to exit] = 0 <--- Not entered by user;Bit #19 - SPARE input value [0, 1 or <CR>. to exit] = 0 <--- produced by simu-Bit #20 - SPARE input value [0, 1 or <CR>. to exit] = 0 <--- lator.Enter the values for the input bits on BOARD 1 <---Bit #21 - SPARE input value [0, 1 or <CR>. to exit] = 0 <---Bit #22- SPARE input value [0, 1 or <CR>. to exit] = 0 <---

Trigger List: 0,3 System Time: 00:00:00:000 Timer List: 2Command->inp 1 Program: SAMPLE_1 Screen: Entire

Since none of these bits are defined in the application, no prompt appears for these values. If the command INP 2 is entered, the simulator responds with:

NO BOARD OF THIS TYPE IS VALID IN THIS CONFIGURATION

This message appears because no board has been defined for this cardfile slot.

The command INP 3 results in a prompt for input values:

- Input Command Example: INP 3 -

Enter the values for the check bits on BOARD 3Bit #25 - INPUT_1 input value [0, 1 or <CR>. to exit] = 1Bit #26 - INPUT_2 input value [0, 1 or <CR>. to exit] = 0Bit #27 - INPUT_3 input value [0, 1 or <CR>. to exit] = 1Bit #28 - SPARE input value [0, 1 or <CR>. to exit] = 0

Trigger List: 1,3 System Time: 00:00:00:000 Timer List: 2Command->inp 3 Program: SAMPLE_1 Screen: Entire

2. Track Boards

When an input command is entered for a Track Interface board, special functions areperformed. Only one track input bit can be set at any one time. For each track (A and B),two bits (in addition to those defined in the TRACKx.INPUT section) are defined by thesystem: TRACKx.SLEEPIN and TRACKx.TDIN. These special system bits are alsotreated as track inputs.When using either the Input or Set commands to set a track input bit, once one input bit isset, all others are automatically cleared.

Refering to the SAMPLE_1 program example, when INP A is entered, a prompt will appearfor entering values for IN_CODE_1, IN_CODE_2, TRACKA.TDIN and TRACKA.SLEEPIN.As soon as a 1 is entered for any of these bits, all other bits are cleared. The Set commandalso performs these functions.


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When manipulating the track input bits, care must be taken to avoid unintended actions. Inthe program example, assume IN_CODE_2 is set. If, using an Input or Set command,another track input code is set (e.g. TRACKA.TDIN), IN_CODE_2 will automatically becleared.

NOTE

Only one track input can be set at any time. When any of these bits areset, all others will be cleared.

4.5.4.19 Print Command

The Print (PR <CR>) command is used to convert a compiler PROM table (e.g., a .TCD file) back intoreadable statements. Only the ASSIGN statements in the source program are returned. Thiscommand can be used to generate the logic equations if a compiler listing is not available.

To execute the Print command with the sample program, PR example <CR> would be entered. Thedefault file extension for this command is .TEQ. If another extension is desired, it must be entered inthe initial command.

When conversion of the PROM tables is complete, the following message will appear:

File EXAMPLE1.TEQ contains the logic equations

To obtain the logic equations themselves, use the Quit command (QU <CR>) to leave the simulator,then enter TYPE EXAMPLE1.TEQ <CR> . In this instance, the .TEQ extension must be used. Note:This is the DOS 'type' command.

The format and syntax of displayed ASSIGN statements will differ slightly from the statements in thesource listing, however they are functionally identical. This is a normal feature of the simulator system.For example, in the example program, the assign statements generated by the print command are:


6470A 4/96 4-29

- Print Command Example -

Logic Equations for Program: Sample_1

Equation #1 - Line #53assign IN_CODE_1 and INPUT_1 to GREEN;

Equation #2 - Line #56assign IN_CODE_2 and INPUT_2 to YELLOW;

Equation #3 - Line #59assign not TRACKA.NORMAL to RED;

Equation #4 - Line #62assign INPUT_1 to OUT_CODE_1;

Equation #5 - Line #65assign FLASH and (GREEN or (YELLOW or RED)) to BULB_ON;

Equation #6 - Line #69assign TRACKA.NORMAL to OUTPUT_1;

Equation #7 - Line #72assign not FLASH to FLASH;

4.5.4.20 Read Command

The Read (REA <CR>) command may be used to read commands from a file, rather than thekeyboard. It is designed to simplify the re-entering of commands with long lists of items at thebeginning of a simulation, or to execute a series of commands in sequence.

When the read command is invoked, the initializing file name is requested. The default extension forthis file is .TSI. (If the command READ EXAMPLE <CR> is entered, the file used is example.TSI. Ifthe command is simply READ <CR>, the file name is prompted by INIT FILE-- . The default extensionof .TSI is assumed. To read the file TEST.TSI, enter READ TEST. To read the file TEST.XYZ, enterREAD TEST.XYZ.

Two special commands are valid when reading an Init file: PAuse and CONtinue. To temporarilysuspend the reading of commands from an Init file, a Pause command is entered into the file at thedesired location. When this command is read, the simulator pauses. At this point, the user may enterother commands from the keyboard. When the CONtinue command is entered, the REAd commandresumes processing commands from the Init file. Pause will remain in effect until the CONtinuecommand is entered.

In the following example, an editor is used to create the file example.TSI with contents:


4-30 SM 6470A 4/96

- Read Command Example -

colordi rel 1-4di rel bulb_on-greendi rel 23-27di-rel 29-40inp a01

val 1-10pauseinp a1run

Given the command in the file, the following actions will be performed:

1. Display mode switches to color.2. Relays 1-4 are displayed.3. Relays bulb_on, red, yellow and green are added to the display.4. Relays 23-27 are added.5. Relays 29-40 are added.6. Values are entered for track A

in_code_1 <-- 0in_code_2 <-- 1(This 1 ends the Input command)

7. The value of bits 1-10 are displayed.8. The Pause command suspends reading of commands from the file.

Commands may be executed from the keyboard. When finished, CONT should be entered; thesimulator will continue reading commands from the file.

9. Enter the values for track A:in_code_2 <-- 1

10. Execute logic equations and increment time.

4.5.4.21 Pause and Continue Commands

Refer to section 4.5.4.20 for usage of the Pause and Continue commands.

4.5.4.22 Reset Command

The Reset (RES <CR>) command may be used to reset the simulator. With this command:

All bits are clearedTrigger and timer lists are resetSystem time returned to 00:00:00:000The logic is initialized

This is the same procedure used when the simulator is started.


6470A 4/96 4-31

4.5.4.23 Reconfiguration Command

The Reconfiguration command (REC <CR>) allows the user to change those items in the QUESTIONsub-section of the configuration that control setting/clearing of the associated system bits. In theSAMPLE_1 program example, only TRACKA_LENGTH and BOARD3_TYPE are in the QUESTIONsub-section of the CONFIGURE section. In the simulator, the track length feature is not accessiblebecause it does not affect the simulation. When the REConfigure command is entered, onlyBOARD3_TYPE is changeable.

The default configuration and the value of the system bit for board #3 is shown:

- Reconfiguration Example -


IO PARAMETERSUNIT TYPE 0 SLEEP MODE DISABLED

BOARD 1 COLORLIGHT HEAD 2 DISABLEDBOARD 2 DISABLED HEAD 2 DISABLEDBOARD 3 ISOLATED


Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command- Program: SAMPLE_1 Screen: Config

relay #55 - BOARD3.RELAY set

The unit is reconfigured and board #3 is disabled. After the configuration is changed, the simulatorresets the logic:

- Reconfiguration Example (Continued) -

What is the type of Board #33 = relay, 0 or <return> = disabled ==> 0

Press <RETURN> to initialize the logic

SETting Bit #8 - REDPlace bit #29 - FLASH on timer queue

Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command- Program: SAMPLE_1 Screen: Entire

The configuration is then re-displayed along with the system bit:


4-32 SM 6470A 4/96

- Reconfiguration Example (Continued) -


IO PAREMETERSUNIT TYPE 0 SLEEP MODE DISABLED

BOARD 1 COLORLIGHT HEAD 2 DISABLEDBOARD 2 DISABLED HEAD 2 DISABLEDBOARD 3 DISABLED


Trigger List: 0, 0 System Time: 00:00:00:000 Timer List: 1Command- Program: SAMPLE_1 Screen: Config.

relay #55 - BOARD3.RELAY clear

4.5.4.24 Quit Command

The Quit (QU <CR>) command terminates the simulation and exits the simulator.

4.5.5. Simulator Diagnostics

The simulator checks for the following problems:

Type of Problem Cause/Troubleshooting of Problem

Trigger list overflow Either the Make or the Break trigger is full and anotherequation cannot be queued.

Valid aspect selection Verify that no more than one aspect for a given lamp hasbeen selected.

Valid lamp-on action Verify that if a lamp is turned on, a valid aspect has beenselected.


6470A 4/96 4-33

4.6 EPROM File Format and Programming

The code file (with .TCD extension) produced by the MICROTRAX Compiler is in the standardMOTOROLA EXORMAX format. The application program is programmed into a standard, temperaturegrade 27C256 EPROM (US&S P/N J7150290562). The MICROTRAX application program occupiesthe lowest 8 Kbyte section of the EPROM; the EPROM’s base address is $4000.

Several options exist to program the EPROM:

1. A program supplied with the MICROTRAX Development System can be used to program the EPROM when using the Data I/O Models 21A, 201, or 212. These models are no longer manufactured by Data I/O, but were commonly used for US&S application development. If you have access to one of these programmers, the program TRXPROM may be used to program an EPROM on one of these devices. Refer to Appendix C for details on how to use the program.

2. The Data I/O ChipLab Programmer is also available for programming. This device has its own software driver, and is not directly driven from the MICROTRAX Development system. Refer to Appendix D for programming information using this device.

3. Any EPROM programming device which supports the 27C256 EPROM type and the MOTOROLA EXORMAX file format may be used. You must refer to the manufacturer for instructions on how to use the device.

NOTE

US&S recommends the use of the Data I/O ChipLab EPROM Programmer.Data I/O’s literature states that all of the algorithms used to program theEPROMs have been validated by the respective EPROM manufacturers.Although many other EPROM programmers are available for use, theiractual performance is unknown. Use of other programmers may impactreliable operation of the EPROMs.

Section V SUPPLEMENTAL DATA

6470A 4/96 5-1

5.1 COMPILER ERROR MESSAGES

5.1.1 Token Errors

Error No. Description

1: Input line exceeds ___ characters, line truncated2: String spans more than one line; string end assumed3: Numeric constant greater than 4 digits4: String more than ___ characters.5: ID:_______ contains an illegal character: "_" - assume "-"6: Word more than ___ characters7: Compiler Switch Error: Unknown switch "_"9: Compiler Switch Error: "+" or "-" expected14: Compiler Switch Error: Switch must precede the BEGIN

statement

5.1.2 Syntax Errors


1: Invalid PROGRAM statement2. INTERFACE statement missing3: TRACK A interface specification expected4: TRACK B interface specification expected5: No TRACK interface defined6: Incorrect I/O board specification7: Invalid ADDRESS specification8: Invalid lamp HEAD specification10: Invalid I/O specification - COLON expected11: Invalid I/O format12: Invalid BOARD format13: Invalid INTERFACE format15: ID NAME expected16: Invalid ID list format20: CONFIGURE statement expected21: Invalid Configuration item: "ITEM: STRING" expected22: Invalid Configuration item: "STRING, ID" expected23: Invalid Configuration item: ": VALUE" expected24: Invalid CONFIGURE format25: COLON expected26: Invalid SET=OPTION27: Invalid timer UNITS specified28: Invalid timer statement - "VALUE : UNITS" expected29 Invalid timer "SET/CLEAR" statement30: Missing CLEAR parameter on timer declaration31: Missing timer declaration32: Invalid TIMER format33: Invalid declaration format34: Unexpected ID found after ";"35: "BEGIN" missing36: Missing ASSIGN statement37: ASSIGN statement or end of program expected38: Invalid expression syntax39: Invalid ASSIGN statement syntax55: SEMICOLON missing69: Attempt to define more than 500 bits


5-2 SM 6470A 4/96

5.1.3 Semantic Errors


2: Illegal Bit Use: __________ is the PROGRAM name. It can not be used3: llegal Bit Use: __________ is a system defined bit. It can not be used.4: Maximum memory has been used - too many Timers defined.5: More than 250 IDs in an ID list.6 ID: __________ already specified in this ID list.8: Slave address out of range.9: This board type already defined.10: This board type not valid for BOARD____.11: Number of TRACK INPUT bits cannot exceed 20.12: Number of LAMP INPUT bits cannot exceed 2.13: Number of RELAY INPUT bits cannot exceed 4.14: Number of SLAVE INPUT bits cannot exceed 32.15: Number of TRACK OUTPUT bits cannot exceed 20.16: Number of LAMP OUTPUT bits cannot exceed 1.17: Number of NON-ISOLATED RELAY OUTPUT bits cannot exceed 4.18: Number of ISOLATED RELAY OUTPUT bits cannot exceed 2.19: Number of SLAVE OUTPUT bits cannot exceed 32.20: Number of LAMPOUT bits cannot exceed____21: LAMPOUT bits can only be defined on lamp boards.22: Number of ASPECT bits cannot exceed 3.25: TRACK must have OUTPUT defined.26: TRACK must have INPUT defined.27: LAMP board must have LAMP defined.28: LAMP board must have ASPECT defined.29: Both OUTPUT and INPUT sections missing for I/O board.30: Configuration item is already defined.31: Configuration value out of range for this item.32: Track interface cannot be enabled if it is not defined.33: Board type cannot be enabled for this slot if it is not defined.34: Slave interface cannot be enabled if it is not defined.35: Illegal Bit Use: __________ is multiply defined36: Illegal Bit Use: __________ is undefined37: Illegal Bit Use: SPARE cannot be used as an internal bit38: Attempt to define more than 32 user items.40: Illegal time specified: Delay exceeds 2795 MINUTES41: Illegal Time Specified: MSEC must be specified in 10 MSEC

increments.42: Illegal Time Specified: 50 MSEC is the smallest delay possible.43: Illegal Bit Use: __________ can not be a TIMER bit. It is a SYSTEM bit.44: Illegal Bit Use: __________ can not be a TIMER bit. It is an INPUT bit.45: Illegal Bit Use: __________ multiply-defined SET/CLEAR delay.46: Illegal Bit Use: SPARE cannot be used as a TIMER bit.47: Illegal Time Specified: SET and CLEAR delay both 0.50: Illegal Bit Use: SPARE cannot be used in an ASSIGN statement.51: Number of EQUATIONs defined exceeds 500.52: Bit:_____ triggers more than 100 equations. 53: Illegal Bit Use:__________ is multiply assigned.57: Illegal Bit Use: __________ can not be ASSIGNed. It is an INPUT bit.59: Attempt to ASSIGN the result to more than 20 bits.


6470A 4/96 5-1

5.2 SUMMARY OF HARDWARE ADJUSTMENTS

5.2.1 CPU Module Circuit Board

NOTE

Refer to SM-6470B for a detailed description of CPU Module hardwarefeatures.

1. DIP Switch SW1

Rocker #1: Closed: PC-to-MICROTRAX serial link at 4800 baudOpen: PC-to-MICROTRAX serial link at 1200 baud

Rocker #2 Closed: System logs errors/warnings, shunts, user-defined eventsOpen: System logs errors/warnings, shunts, user-defined events,

bad messages and shunts removed (rocker #3 must alsobe open)

Rocker #3: Closed: System logs errors/warnings and user-defined eventsOpen: System logs errors/warnings, shunts, user-defined events,

bad messages and shunts removed (rocker #2 must also be open)

Rocker #4: Closed: Display power automatic off. Display power remains on after 25 minutes of non-use (Rev. 3 and higher executive software only). Reset system to enable this switch.

Open: Display power turned off after 25 minutes of non-use use (Rev. 3 and higher executive software only). Reset system to enable this switch.

2. DIP Switch SW3

Rocker #5: Always leave closed (internal system requirement)All other rockers: Not used (may be left in either position)

3. Jumpers

Jumper Position Function

JP1 WDE Watch dog enabledJP2 SHORT Watch dog line toggleJP3 (No jumper) --JP4 485+ Select RS-485JP5 423+ Select RS-423JP6 E EPROM installedJP7 423- Select RS-423JP8 PFE Internal system requirementJP9 1 Internal system requirementJP10 INT Internal system requirement


5-2 SM 6470A 4/96

5.2.2 CPU Module Front Control Panel

RESET Button: Trigger system-wide reset

MODE Toggle Switch: Scroll forward and backward through main menu onalphanumeric display

ADJUST Toggle Switch: Adjust signal lamp voltage or track circuit shuntingsensitivity up or down.

ESCAPE/ENTER Toggle Switch: Escape current display; return to default menu. Enterselected option.

AUX 1/AUX 2 Toggle Switch: Not used

5.2.3 Color Light and Searchlight Lamp Driver Modules - Front Control Panel

LAMP Adjust Potentiometer (HEAD 1):

Clockwise: Increase head #1 lamp voltageCounterclockwise: Decrease head #1 lamp voltage

LAMP Adjust Potentiometer (HEAD 2):

Clockwise: Increase head #2 lamp voltageCounterclockwise: Decrease head #2 lamp voltage

APPENDIX A DEVELOPMENT SYSTEM (M.T.D.S.) EQUIPMENT

6470A 4/96 A-1

Item Description US&S Part No.

EPROM Eraser

Diskette w/Software

Diskette w/Software

Blank Diskette

Blank Diskette

Blank EPROM

Prom Programmer

Spectronics PE-14T

MICROTRAXDevelopment System-3-1/2" disk

MICROTRAX Development System -5-1/4" disk

3-1/2"

5-1/4"

--

Data I/O ChiplabEprom Programmer

J703105-0005

N451575-0119

N451800-0301

J703104-0008

J703104-0004

J715029-0562

J703105-0003

APPENDIX B EOS SERIAL LINK BOARD

6470A 4/96 B-1

B.1 Introduction

The EOS Serial Link Board provides interfaces to three serial ports: a MICROLOK master port, aMICROLOK slave port and a Genisys slave port. The MICROLOK master and slave ports use theUS&S vital protocol and are referred to as vital links for passing vital information. The vital linkscan be used to pass information among MICROLOKs, MICROTRAXs and other EOS Serial LinkBoards. The Genisys slave port uses the Genisys protocol and is used for passing non-vitalinformation between an EOS Serial Link Board and a Genisys and/or Genisys Series 2000. The EOSSerial Link Board plugs into the G-64 bus cardfile but is not connected to the G-64 bus for informationpassing. Its only connections for passing information are via the three serial ports.

The EOS Serial Link Board is an integral part of the MICROTRAX EOS product. It is used to pass vitalinformation among the MICROTRAX units at an end-of-siding. The board is plugged into the far right-hand slot of the MICROTRAX EOS cardfile.

B.2 Development System for EOS Serial Link Board

The software on the EOS Serial Link Board is split up between an executive prom and an applicationprom. TheMICROLOK logic compiler is used to program the EOS Serial Link Board for the desiredfunction. The MICROLOK compiler is used as is; the only constraint is that no parallel I/O boards canbe programmed into the application. Refer to MICROLOK manual 6400A "Operation and ApplicationProgramming" for information about programming the EOS Serial Link Board. The applicationprogram specifies the configuration of the vital links: slave addresses, amount of information passed,master/slave baud rates, key delays etc. The application program also specifies the address andinformation passed on the Genisys slave link.

The MICROLOK simulator package may be used to simulate the application program for debuggingpurposes.

The application prom for the EOS Serial Link Board can be up to 24K in length and resides in one27256 prom. The MICROLOK prom programmer package can be used to burn application PROMs forthe EOS Serial Link Board using the Data I/O 21A, 201 or 212 prom programmers. This, however,limits the size of the application program to 8K. To use the MICROLOK prom programmer software ona 201 or 212 Data I/O Prom Programmer to burn applications under 8K in length, the "OTHER"selection must be made when specifying prom type; and a family/pin-out code of 9332 must beentered. To use the MICROLOK prom programmer package on a Data I/O 21A programmer, the promtype must be set to 256.

The ChipLab prom programmer must be used to burn application programs larger than 8 Kbytes inlength. See the attachment entitled "Using the ChipLab to Program MICROLOK Application Proms forthe MICROTRAX EOS Serial Link Board" for details.

The Genisys slave link operates somewhat differently from the Genisys slave interface on theMICROLOK. The interface on the EOS Serial Link Board is strictly a Genisys slave port. It does NOTpass back the extra 16 status bytes of information that the MICROLOK Genisys interface does. (Thesestatus bytes are discussed in section 4.2 of MICROLOK manual 6400A.) All information passedbetween the Genisys slave port and its master must be fully defined in their respective applicationprograms.


B-2 SM 6470A 4/96

B.3 Switch Settings and Displays on the EOS Serial Link Board

NOTE

This information is provided for reference only. Refer to SM 6470B for acomplete description of the serial link board.

The four LEDs on the MICROLOK peripheral board have been replaced by an easy-to-read display onthe EOS Serial Link Board. Error codes and status information are displayed on this 1 characterdisplay. See MICROLOK manual 6400C section 3.3.6 for the error code and status codes.

Three sets of 4 LEDs have been added to monitor activity on the serial port signals of the three serialports. These LEDs monitor the RTS and DCD handshake signals as well as the TX and RX signals.(See the attached sheet for a sketch of the board and location of the LEDs.)

The reset push button will reset the EOS Serial Link Board when it is pressed and then released.

The display errors switch operates as is does in MICROLOK. When it is in the up position, short errorcodes and status information are displayed on the error display. When it is in the down position, longerror codes are sequentially displayed. The logged errors are cleared by pressing the "clear errors"push button while the display errors switch is in the "down" position.

Switch 1:

The bits on switch 1 are defined as follows (Note: Switch 1 is read on-line during normal operation andmay be changed while the unit is operating):

bit 1: unused

bit 2: unused

bit 3: open: normal operation

closed: master polls its slaves as quickly as possible; unit logs an "A1" warningwhen this switch is closed

bit 4: open: unit logs but does not display recoverable errors on the vital serial links

closed: unit logs and displays recoverable errors on the vital serial links


6470A 4/96 B-3

Switches 4 and 5 are used to specify parameters for the operation of the Genisys slave serial link (inthe following description, O means the switch is Open, C means the switch is Closed). These switchesare only read once at reset. If the user wishes to change a setting, the EOS Serial Link Board must bereset before the new settings will be recognized.

Switch 4:

bits 1 and 2 specify the key-off delay for the Genisys slave port (this is the delaybetween when the last character is sent to the master and the RTS is turnedinactive); these delays are specified in bit times and are therefore a function of thespecified baud rate:

bit 1 bit 2 Meaning

C C zero key-off delay

C O key-off delay of 20 bit-times

O C key-off delay of 60 bit-times

O O key-off delay of 80 bit-times

bits 3 and 4 specify the key-on delay for the Genisys slave port (this is the delay betweenwhen RTS is turned active and the first character is sent to the master); these delays arespecified in bit times and are therefore a function of the specified baud rate:

bit 3 bit 4 Meaning

C C zero key-on delay

C O key-on delay of 20 bit-times

O C key-on delay of 60 bit-times

O O key-on delay of 80 bit-times


B-4 SM 6470A 4/96

bit 5 is used to specify number of stop bits sent in each byte:

bit 5 Meaning

C 1 stop bit

O 2 stop bits

bit 6 is used to enable or disable parity checks on the received bytes:

bit 6 Meaning

C Parity disabled

O Parity enabled

bit 7 is used to select the type of parity to be used; this bit is ignored if bit 6 is in theclosed position:

bit 7 Meaning

C Odd parity

O Even parity

bit 8 is used to specify full or half duplex operation; in full duplex, the slave is permitted totransmit even if the incoming DCD handshake line is active; in half duplex mode, theslave waits until its incoming DCD is inactive before it starts responding (this isanalogous to the carrier/operate switch on the Genisys controller); when half duplex ischosen for the EOS Serial Link Board, the controller board in the Genisys master shouldhave SW3 set to the "OPERATE" position; when full duplex is chosen for the EOS SerialLink Board, the controller board in the Genisys master should have SW3 set to the"CARRIER" position

bit 8 Meaning

C Half duplex

O Full duplex


6470A 4/96 B-5

Switch 5:

bits 1,2,3 and 4 can be used to specify the Genisys slave address if the address specifiedin the application is zero; if the Genisys slave address specified in the application is non-zero, these switches are ignored

If Genisys slave address specified in the application is zero

bit 1 bit 2 bit 3 bit 4 Meaning

C C C C SLAVE ADDRESS = 1 C C C O SLAVE ADDRESS = 2 C C O C SLAVE ADDRESS = 3 C C O O SLAVE ADDRESS = 4 C O C C SLAVE ADDRESS = 5 C O C O SLAVE ADDRESS = 6 C O O C SLAVE ADDRESS = 7 C O O O SLAVE ADDRESS = 8 O C C C SLAVE ADDRESS = 9 O C C O SLAVE ADDRESS = 10 O C O C SLAVE ADDRESS = 11 O C O O SLAVE ADDRESS = 12 O O C C SLAVE ADDRESS = 13 O O C O SLAVE ADDRESS = 14 O O O C SLAVE ADDRESS = 15 O O O O SLAVE ADDRESS = 16

bits 5,6 and 7 are used to specify the baud rate used to communicate between Genisysmaster and slave

bit 5 bit 6 bit 7 Meaning

C C C BAUD RATE = 150 C C O BAUD RATE = 300 C O C BAUD RATE = 600 C O O BAUD RATE = 1200 O C C BAUD RATE = 2400 O C O BAUD RATE = 4800 O O C BAUD RATE = 9600 O O O Unused


B-6 SM 6470A 4/96

bit 8 is used to select how the Genisys slave port treats its handshake input signals CTSand DCD. If this bit is open, the unit handles these signals just as a standard Genisysslave does. If this switch is closed, the unit treats these inputs as the Genisys 2000 does.That is, it ignores the DCD and CTS signals once a message transmission or receptionbegins. This switch can be closed in high noise areas to prevent the noise fromadversely affecting serial link reliability. This switch must also be closed to allow theGenisys slave port to operate properly when carrier equipment is used in such a way thatthe slave unit "hears" its own transmitted messages.

bit 8 Meaning

C Genisys 2000 operation

O Standard Genisys operation


6470A 4/96 B-7

B.4 Important Notes

B.4.1 Additional error codes

In addition to all the MICROLOK errors and warnings described in MICROLOK manual 6400C, thefollowing 2 codes can be logged by the EOS Serial Link Board:

3C: parallel I/O defined in a serial controller application; this is a non-recoverable error

9D: code system link down (it is logged each time COMMON.MODE is cleared); this is a recoverable error

B.4.2 Differences between MICROLOK and the EOS Serial Link Board:

No parallel I/O is supported on the EOS Serial Link Board.

No vital kill circuit exists on the EOS Serial Link Board. When a fatal error is logged, aspecial control line is used to hold all three serial ports in a reset mode. This ensures theserial ports shut down in the event of a non-recoverable error.+No fail-over is supported. Two EOS Serial Link Boards cannot be configured as aredundant pair.

APPENDIX C EOS M.T.D.S. - EPROM PROGRAMMER

6470A 4/96 C-1

C.1 General

The MICROTRAX� EPROM Programmer (TRXPROM) is used to make final checks of the compilerEPROM table, and transfer that table to the CPU Module EPROM. This program requires the Data I/OCorporation Model 212 EPROM Programmer. (The earlier 21A and 201 models may also be used.)The programmer contains a zero insertion force (ZIF) IC socket for the EPROM. US&S recommendsEPROM J715029-0562 for the compiled program.

C.2 Initial Set-Up

The TRXPROM program uses a configuration file to store information regarding the EPROMprogrammer and EPROMs. This program makes use of an "Environment Table" to determine thelocation of the configuration file (refer to the appropriate DOS manual for details on the EnvironmentTable). To make this determination, the environment table is searched to find the entry "TDSEPROM".If found, the value of this entry determines the name and location of the configuration file. Forexample:

Use the SET Command to specify the location of the configuration file:

SET TDSEPROM = C:\MICROTRAX\TDSEPROM.CFG

This instructs the PROM program that the Configuration File is named TDSEPROM.CFG and that itresides in the directory C:\MICROTRAX. If the entry is not found, the default is TDSEPROM.CFG inthe current directory. The first time the TRXPROM program is run, the configuration file is set up tospecify the type of Programmer Unit (Model 212) and type of EPROM. Once this file is complete, itdoes not have to be reentered.

The first time the EPROM programmer software is run, configuration information must be entered.The configuration items are:

1. Communications port number: Select the port number to which the EPROM programmer isconnected.

2. Identify which EPROM programmer will be used: Programmer types include:

Data I/O Model 21AData I/O Model 201Data I/O Model 212

3. Enter the family and pin-out code which corresponds to the EPROM part in use. Refer tothe EPROM programmer manual for the correct number.

4. Enter a text description which describes the part in use.

APPENDIX C M.T.D.S. - EPROM PROGRAMMER

C-2 SM 6470A 4/96

C.3 Programmer Operation

1. Turn on the programmer and verify that it passes start-up diagnostics (refer to programmermanual for details).

2. Connect the programmer to the selected communications port on the PC.

3. Make sure the programmer's communications parameters have been correctly configured(refer to programmer manual for directions):

Data I/O Model 21A: Data I/O Models 201 and 212Baud Rate: 4800 Data Rate: 9600Parity: Even Parity: NoneData Bits: 7 Data Bits: 8Stop Bits: 2 Stop Bits: 1

4. On the PC, type TRXPROM to start the EPROM programmer software. The followingscreen should appear:

_______________________________________________________________________________

M I C R O T R A XEPROM Programmer

Version 1.00Copyright 1992

Union Switch & Signal Inc.

EPROM Programmer Connected To --> COM PORT 1EPROM Programmer Type --> Data I/O 201EPROM Code / Type --> 9332EPROM Description --> Hitiachi 27256

Is the information correct? ('Y' OR 'N') ?Y - to program EPROMsN - to change selections

Verifying Configuration File_______________________________________________________________________________

5. If the configuration information is correct, press "Y" to begin the EPROM programmingprocess. If the information is not correct, press "N". Refer to section 4.6.2 for configurationset-up procedures.

6. Enter the name of the MICROTRAX� application logic program to be programmed into theEPROM. If the file is not found, an error message will be displayed. The program can thenbe aborted or another program name entered.

7. The approximate program size will be displayed. When ready to program the EPROM,press any key.

8. The PC will then attempt to establish communications with the EPROM programmer.Directions will be displayed. Follow these directions to place the programmer in the propercommunications modes.

9. Once the link is established, insert a blank EPROM into the correct programmer socket perdisplayed instructions. When the EPROM is inserted, press any key to continue.

APPENDIX C EOS M.T.D.S. - EPROM PROGRAMMER

6470A 4/96 C-3

10. Depending on the type of EPROM programmer in use, different actions will occur duringprogram loading. The basic operations common to all types of programmer are as follows:

a. Installed EPROM is verified as blank.b. EPROM programmer memory initialized and cleared.c. Application logic program downloaded to EPROM programmer.d. Correct transfer of program verified.e. EPROM chip programmed.f. EPROM chip verified.

11. Once the EPROM is programmed, a checksum will be displayed. This checksum should benoted for reference; it will help identify the EPROM.

12. When finished, press any key to exit the EPROM programmer driver and turn off theprogrammer.

APPENDIX D USING THE DATA I/O CHIPLAB

6470A 4/96 D-1

D.1 BACKGROUND

This document describes how to program MICROTRAX application proms and how to programMICROLOK applications for the MICROTRAX EOS serial link board using the Data I/O ChipLab promprogrammer. The following instructions are based on revision 1.10-1.1000 of the ChipLab driversoftware supplied by Data I/O. Later versions of the driver software may require slight modifications tothis procedure.

This document assumes that the ChipLab prom programmer driver software has been correctlyinstalled from the installation disks and that the ChipLab cable has been properly connected to theparallel port of the PC. It also assumes that the user has basic knowledge of entering commands forthe ChipLab. A brief summary of some of the ChipLab conventions follows:

The mouse can be used to point and click on the commands or the ALT key can be pressed along withthe highlighted letters to bring up the various menus.

Once a menu is displayed, the mouse can be used to select commands or the up/down arrows can beused to highlight a selection. Once the desired selection is highlighted, the ENTER key is used toexecute the selection. These selections often cause screens with entry fields to be displayed.

Once a screen with entry fields is displayed, the mouse can be used to point and click on selections orthe TAB key can be used to move the cursor among the entry fields. To execute the commands afterthese entry fields have been initialized, one of the commands can be selected at the bottom of thescreen. These commands can be selected with the mouse or by using the TAB key until the desiredselection is highlighted. Once the desired command has been highlighted, pressing the ENTER keycauses the command to be executed. On screens that have entry fields, all entry fields must containthe desired values before the ENTER key is pressed. Otherwise, the unit will use whatever valueshappen to be in the entry fields.

If the flashing, block cursor is ever in the "SYSTEM LOG" portion of the screen, the ESC key must bepressed before any other menu screens can be selected using the ALT key plus the highlighted letter.

D.2 PROGRAMMING AN APPLICATION

To program an application program, the following steps should be followed:

1. Turn the power on to the Data I/O ChipLab programmer.

2. Run the prom programmer driver by typing CHIPLAB from the DOS prompt of the PC. Wait for the system initialization to run to completion.


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D.3 SELECTING THE TYPE OF PROM

The following steps are used to select the type of prom to be programmed:

1. Select the "Device" menu.

2. Select and execute the "Select" option under the "Device" menu.

3. Choose the correct manufacturer and prom type from the menu (e.g., Intel 27C256).

4. Execute the "SELECT" command at the bottom left of the screen.

5. Verify the choice of part by examining the prom type displayed in the upper right hand corner of the screen.

6. Insert the prom in the zero-force-insertion socket on the ChipLab programmer. The prom should be aligned

with bottom of the socket (i.e., no empty spots in thesocket should be at the bottom; the unused part of the

socket is at the top.) Lock the prom into place using the arm on the zero-force-insertion socket.

D.4 PERFORMING A BLANK CHECK OF THE DEVICE

The following steps are used to perform a blank check of the device:

1. Select "Device" menu.

2. Select and execute the "Blank check only" option under the "Device" menu.

3. Verify that: "Blank Check Operation Successful" appears on the screen.

D.5 SELECTING THE FILE AND PROGRAMMING THE PROM

The following steps are used to select the file and to program the prom:

1. Select the "File" menu.

2. Select and execute the "Open" option under the "File" menu.


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3. Enter the file name or choose the file to be programmed via the menu. This is a file with a TCD extension for MICROTRAX applications. This is a file with an MCD extension for serial link board applications.

NOTE

Do not hit the ENTER key on the PC's keyboard after entering the file name.

4. Move to the "File Format" field of this screen. Use the arrow keys to select the "Motorola Exormax Format".

5. Move to the "Automatic RAM fill" field of the screen. Choose "Specific" fill character option using the down arrow key and enter FF for the fill value.

6. Move to the "I/O Addr Offset" field of the screen and enter 4000

7. Move to the "User Data Size" field of the screen and enter 0

8. Move to the "Memory Begin Address" field of the screen and enter 4000

9. Execute the "READ" command at the bottom left of the screen.

10. The screen should show:

Auto RAM Fill

Reading File

11. Verify the correct file name is displayed on the screen.


13. Select and execute the "Program device" option under the "Device" menu.


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14. Execute the "PROGRAM" function at the bottom left of the screen.

NOTE

No entry fields need to be changed on this screen before executing the"PROGRAM" command.

The screen should show:

Blank Check

Programming (this typically takes less than 20 seconds)

Sumcheck

Nominal Verify

15. Verify that "Program Operation Successful" appears on the screen.

16. Execute the "CLOSE" option at the bottom of the screen.

D.6 OBTAINING THE CHECKSUM OF THE PROM

The following steps are used to obtain the checksum of the PROM:


2. Select and execute the "Read device" option under the "Device" menu.

3. Execute the "READ" command at the bottom left of the screen. Note: no entry fields need to be changed on this screen before executing the "READ" command.

The screen should show:

Reading

Sumcheck

The checksum is displayed at the bottom of the screen.

4. Execute the "Close" command at the bottom right of the screen.


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D.7 EXITING THE DRIVER

The following steps are used to exit from the driver.

1. Choose the "File" menu.

2. Select and execute the "Exit" option under the "File" menu.

APPENDIX E MICROTRAX SLEEP MODE DESCRIPTION

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E.1 INTRODUCTION

The MICROTRAX unit has a power-saving feature that permits the system to be turned off to savepower and to wake-up when activity is seen on the track. The application logic may be programmed togo to sleep when certain conditions arise. For example, in a territory with low activity, the dispatchercan instruct a master end unit to enter the power saving mode. The end unit will then instruct its slaveto go to sleep. That slave will then propagate the sleep command to the next unit and go to sleep.This command will cascade down the entire territory putting all the units to sleep. When it is time toreactivate the units, the master end unit will again begin to transmit. The act of transmission will causeall subsequent units to wake-up.

E.2 DETAILED DESCRIPTION

The following functions are available in a MICROTRAX unit to control the sleep function:

- system bits TRACKA.SLEEPIN and TRACKB.SLEEPIN are used to determine when thespecial sleep track code has been received. (The MICROTRAX system accepts thesleep code based on one reception.)

- system bits TRACKA.SLEEPOUT and TRACKB.SLEEPOUT are used to specify thatthe sleep code should be sent.

- system bit GOTO.SLEEP is used to instruct the system to drop the CPS and begintoggling the SLEEP board. When the GOTO.SLEEP system bit is set, an event islogged.

- configuration item SLEEP.ENABLE is available. This configuration item has no specialmeaning to the Executive, but is a configuration item that is available for use in theapplication.

- the go to sleep process is initiated whenever the GOTO.SLEEP system bit is set. In thismode, the CPS is dropped and the sleep board is toggled. This sleep board willcontinue to be toggled for 2.5 seconds. In the event of a sleep board failure, the unit willreset after 2.5 seconds. This will prevent the unit from staying in this non-operationalmode because the sleep board has malfunctioned.


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E.3 APPLICATION NOTES

The MICROTRAX Executive is not programmed for the sleep function. This function is under thecomplete control of the application logic. The following diagram will be used to describe the sleepfunction:

End End Unit #1 Unit #2 Unit #3 Unit #4

M <--> S M <--> S M <--> S

The following general guidelines apply to how the sleep function should be used:

1. The sleep command should only be initiated from the master end. In the aboveexample, the master at Unit #1 will begin the sleep function. When instructed, the Unit#1's master track will send the sleep code to Unit #2's slave track.

2. When Unit #2's slave track receives the sleep code, it can determine whether or not toact upon it. For example, the sleep code is a code that is accepted based on 1reception. If desired, the user can put more security on it be forcing it to be receivedmore than once before acting upon it.

Once the slave receives the sleep code, it can be transmitted back to Unit #1's mastertrack. Also, once Unit #2's slave track accepts the sleep code, Unit #2's master trackcan begin transmitting the sleep code to Unit #3's slave track.

3. When Unit #1's Master track receives and accepts the sleep code, it can be assuredthat the slave at Unit #2 accepted the sleep command. At this time, the End Unit #1must sever its connection to the track. To do this, both track leads running from thetrack interface panel to the rails must be disconnected. The typical way to do this is touse a MICROTRAX output to drive a relay. The track connections will be routedthrough the back contacts of the relay. Under normal conditions, the relay will be downand the track connections will be complete. To disconnect from the track, the unit canenergize the output, disconnecting the unit from the rails. Be certain to break both leadsto the track, and break the connection between the track interface panel and the rails.

The Unit #1's master track must physically disconnect itself from the track because, asa master, it must poll its slave every 6 seconds. If all the other units have been put tosleep, this normal act of polling will wake up the unit sleeping.

4. At this point, Unit #1's master track has verified its slave received the sleep code andhas disconnected itself from the track. Unit #1's master track will declare a shunt.Since it is no longer talking, Unit #2's slave track will also declare a shunt.

5. Unit #2's slave track is now shunted, and Unit #2's master track is sending the sleepcode to Unit #3's slave track. When Unit #2's master track receives the sleep codefrom Unit #3's slave track, Unit #2 will begin the go to sleep process.

6. Unit #3 will function the same as unit #2.


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7. Unit #4 is an end unit. It may function differently depending upon the application. Sinceit is a slave, the sleep function may act like a NOP. Since this unit is most likely at acontrol point, power savings is not critical; therefore, it may not need to go to sleep (italso may be undesirable for this unit to turn off since it may be interfacing to theadjacent interlocking.)

If the unit is to go to sleep, it may go to sleep after it receives the sleep code and itstrack shunts. If the unit is not to go to sleep, then, since it is a slave, it can just sit thereand listen for Unit #3's master track.

8. The wake up process is mostly automatic. Once it is decided to wake-up all the units,Unit #1's Master track must merely re-connect itself to the track. Once it begins pollingUnit #2's slave track, the sleep board at Unit #2 will detect track activity and wake up(i.e., re-apply power to) Unit #2. Once this unit goes through its normal reset process, itwill begin polling unit #3. The act of polling will wake up unit #3. This process thenpropagates through-out the territory.

9. The configuration bit SLEEP.ENABLE is not used by the MICROTRAX Executive. Thatis, even if the SLEEP.ENABLE bit is zero, the unit will go to sleep when theGOTO.SLEEP system bit is set. It is up to the user to incorporate the SLEEP.ENABLEbit in their application logic to determine if the sleep function is to be used.


E-4 SM 6470A 4/96

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