codesign of embedded systems
DESCRIPTION
Codesign of Embedded Systems. Allen C.-H. Wu Department of Computer Science Tsing Hua University Hsinchu, Taiwan, R.O.C {Email: [email protected]}. Outline. Introduction Implementation technologies Design technologies Summary. Ref: Rolf Ernst, “Codesign of Embedded Systems: - PowerPoint PPT PresentationTRANSCRIPT
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Codesign of Embedded Systems
Codesign of Embedded Systems
Allen C.-H. Wu
Department of Computer Science
Tsing Hua University
Hsinchu, Taiwan, R.O.C
{Email: [email protected]}
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OutlineOutline
Introduction
Implementation technologies
Design technologies
Summary
Ref: Rolf Ernst, “Codesign of Embedded Systems: Status and Trends, IEEE Design and Test of Computers, pp. 45-54, April-June, 1998.
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IntroductionIntroduction
Executes specific tasks within larger electronic device
Found in nearly everything electric - cars, office automation, PDA’s, home electronics, factory control
0
5
10
15
20
25
30
35
1994
1996
1998
2000
ASIC
E.uP/uC
Embedded systems:Embedded IC revenues (B$)
Source: Dataquest
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Embedded system characteristicsEmbedded system characteristics
Fixed functionality
I/O intensive, reactive
Multiple processes
Time constraints
Low cost ($8-$100), low power (.5-4W), small size
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A typical embedded system structureA typical embedded system structure
SAP ASIP DSP
uC uP ASIC
DSP Code
uP CodeRTOS
Memory
D/A A/D
I/O
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Implementation technologies(Processor types)Implementation technologies(Processor types)
Micro-processor and micro-controller
ASIP - application-specific instruction-set processor
DSP - digital signal processor
SAP - single-application processor
ASIC - application-specific integrated circuit
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Implementation technologies(Package types)Implementation technologies(Package types)
Full-custom IC
Cell-based IC
Gate array
PLD - FPGA
SOC (System-on-a-chip) - core-based design, Intellectual property (IP), system-level integration (merging hw/sw onto 1 chip)
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Embedded-system design processEmbedded-system design process
Requirements definition
Specification
System architecture development
SW development
Interface design
HWdevelopment
Integration & test
Customer/marketing
Systemarchitect
Reusedcomp.
Support(CAD, test)
Source: Ernst (IEEE D & T of Computer)
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Two types of codesignTwo types of codesign
uP/SAP-based design
System
Core processorApplication-specific coprocessors
SW HW
Verticalpartitioning
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Two types of codesignTwo types of codesign
ASIP-based design
System
Application SW +simulator, compilers,OS
Application-specific processors
SW
HW
Verticalpartitioning
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Design technologiesDesign technologies
Design specification, modeling, and capture
Synthesis - system-level, RTL, logic level, physical level.
Design space exploration
Design verification and testing.
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Specification and modelingSpecification and modeling
Executable specification - Verilog, VHDL, C, C++, Java.
Common models: synchronous dataflow (SDF), sequential programs (Prog.), communicating sequential processes (CSP), object-oriented programming (OOP), FSMs, hierarchical/concurrent FSM (HCFSM).
Depending on the application domain and specification semantics, they are based on different models of computation.
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Hardware SynthesisHardware Synthesis
Many RTL, logic level, physical level commercial CAD tools.
Some emerging high-level synthesis tools: the Behavioral Compiler (Synosys), Monet (Mentor Graphics), and RapidPath (DASYS).
Many open problems: memory optimization, parallel heterogeneous hardware architectures, programmable hardware synthesis and optimization, and communication optimization.
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Software synthesisSoftware synthesis
The use of real-time operating systems (RTOSs)
The use of DSPs and micro-controllers - code generation issues
Special processor compilation in many cases is still far less efficient than manual code generation!
Retargeting issues - C code developed for the TI TMS320C6x is not optimized for running on Philips TriMedia processor.
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Software synthesis (Cont.)Software synthesis (Cont.)
The porting is worse when using parallel compilers because of architecture specialization.
Using libraries of predefined and parameterized code modules adapted to an application: SPW and the Mentor Graphics DSP Station.
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Interface synthesisInterface synthesis
Interface between: - hardware-hardware - hardware-software - software-software
Timing and protocols
Has been neglected for a long time in commercial tools
Recently, first commercial tools appeared: the CoWare system (hw-sw protocols) and the Synopsys Protocol Compiler (hw interface synthesis tool)
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Synthesis: status and trendsSynthesis: status and trends
Many tools reach a high degree of automation for specific applications; however, many design tasks still need to be done manually
Lacking the ability of exploiting the design space to obtain an optimized solution
IP-based (core-based) synthesis methodology
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Design space explorationDesign space exploration
Process transformation
Hardware/software codesign tasks
Estimation
Manual/automated/assisted
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Design space exploration processDesign space exploration process
Cospecification
Processtransformation
HW/SW partitioning and scheduling
HW synthesis SW synthesis
Evaluation (cosimulation)
Systemanalysis
Reused functions and processes
HW arch & comp.
Reused HW & SW components
Customer/marketingsystem architect
High-leveltransformation
Systemarchitect
Design spaceexplorationspace
Source: Ernst (IEEE D & T of Computer)
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Process transformationProcess transformation
Communication transformation
Process merging
Granularity adaptation
Process retargeting : e.g., a RISC -> a DSP
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Granularity effectsGranularity effects
Granularity Analysis
Process no(explicit)
Function/ Globalglobal data data flow
Basic block/ Global and locallocal data set data flow
Statement/ Global and local variables data flow
Optimization potentialCommunication overhead
Design effort
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HW/SW codesign HW/SW codesign
Hardware-software partitioning
Communication synthesis
Hardware-software scheduling
Memory optimization
Estimation
Cosimulation
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Communication synthesisCommunication synthesis
Communication channel selection
communication channel allocation
communication channel scheduling
Currently, no tool can cover the whole variety of communication mechanisms
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HW/SW schedulingHW/SW scheduling
Static scheduling
Derived from RTOSs - e.g., static table-driven and priority-based preemptive scheduling
Static scheduling for event-driven reactive systems
Distributed scheduling policies for complex embedded architectures
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Memory optimizationMemory optimization
Dominant cost factor in integrated systems and the bottlenecks in system performance
Program cache optimization techniques
Optimization for architectures with memories of different types - such as scratch-pad SRAM and DRAM
Dynamic memory allocation
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EstimationEstimation
Accuracy VS. fidelity
Simulation based
Fast synthesis based
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CosimulationCosimulation
Simulate processor software along with custom hardware
Simulation speed, compile time, debugging capability, test vector creation
Speed VS. accuracy - rate accurate, functionally accurate, cycle accurate, gate accurate
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Simulator categorizationSimulator categorization
General-purpose simulator - event-driven
Uni-purpose simulator - designed to simulate a specific model (e.g., 80586)
Emulator - Logic emulator - Processor emulator - In-circuit emulator (ICE)
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Common cosimulation approachesCommon cosimulation approaches
HDL simulator
Simple to implement
Slow
Foreign software debug environment
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Common cosimulation approachesCommon cosimulation approaches
Linking software processor simulator and HDL simulator
Eagle-I (Mentor Graphics), Seamless (Viewlogic)
Ptolemy (UC Berkley) -- OO software framework for linking simulators
Faster, native software debug environment
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Common cosimulation approachesCommon cosimulation approaches
Linking processor emulator and logic emulator
Fast
In-circuit debugging
Expensive
Quickturn
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Design verification and testingDesign verification and testing
Closely-coupled design, verification, and testing methodologies
Integrating multi-level design, verification, and testing design tasks
Cosimulation, coemulation, design for test
Rapid prototyping
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Rapid prototypingRapid prototyping
Custom-designed prototyping board
Logic emulators
Field-programmable PCBs
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Development without prototypingDevelopment without prototyping
SW Design Code
Fab Debug
Build IntegrationDesign
Design
Debug
Integration Debug
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Development with prototypingDevelopment with prototyping
SW Design Code
FabChip debug
Build HW Integration& DebugDesign
Design
FinalIntegrationHW
CHIP
System Integration& SW Debug
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SummarySummary
Embedded systems market is big and growing
Computer-aided hardware-software codesign has made considerable progress in the past few years
System analysis is in great demand - cosimulation, coverification and cospecification
Cosynthesis and computer-aided design space exploration are just beginning to reach the industrial practice