com fluid dynamics ann
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J. Wang et al. (Eds.): ISNN 2006, LNCS 3973, pp. 10051013, 2006.
Springer-Verlag Berlin Heidelberg 2006
Integrating Computational Fluid Dynamics and Neural
Networks to Predict Temperature Distribution of the
Semiconductor Chip with Multi-heat Sources
Yean-Der Kuan1, Yao-Wen Hsueh
1, Hsin-Chung Lien
1, and Wen-Ping Chen
2
1 Department of Mechanical Engineering,
Northern Taiwan Institute of Science and Technology,
2, Xue Yuan Rd., Peitou, Taipei 112, Taiwan, R.O.C.2 Institute of Mechatronic Engineering,
Northern Taiwan Institute of Science and Technology,
2, Xue Yuan Rd., Peitou, Taipei 112, Taiwan, R.O.C.{ydkuan, ywhsueh, hclien}@ntist.edu.tw,
Abstract. In this paper, an artificial intelligent system to predict the temperature
distribution of the semiconductor chip with multi-heat sources is presented by
integrating the back-propagation neural network (BNN) and the computational
fluid dynamics (CFD) techniques. Six randomly generated coordinates of three
power sections on the chip die are the inputs and sixty-four temperature monitoring
points on the top of the chip die are the outputs. In the present methodology, onehundred sets of training data obtained from the CFD simulations results were sent
to the BNN for the intelligent training. There are other sixteen generated input sets
to be the test data and compared the results between CFD simulation and BNN, it
shows that the BNN model is able to accurately estimate the corresponding
temperature distribution as well as the maximum temperature values under
different power distribution after well trained.
1 Introduction
Thermal management in semiconductor electronic and packaging worlds is facing
increasing challenges in the task of dissipating the heat from integrated circuit while
still maintaining in the acceptable junction temperatures. The continuous
miniaturization and intensive application of the electronic devices result in rapid
increase in the power density on the electronic dies. International Technology
Roadmap for Semiconductor projections [1] indicates that thermal management
challenges will significantly increase in the future due to increasing power, decreasing
junction temperature, and a continuous need to have cost effective solutions. The
assemblage in small volumes yields a tremendous heat generation even if the heatproduction is low in the majority of electronic devices. The rate of heat removal for
those components with high heat flux has become very important in order to keep the
electronics devices at an acceptable operating temperature [2]. Kraus and Bar-Cohen
[3] introduced the concept to apply the conventional heat transfer to the field of the
cooling in the electronics cooling. In general, thermal management in the electronics
includes the levels of the system, heatsink, PCB board, and package. The detailed
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introduction and review of the basic principle, design, and analysis for the heatsinks are
shown in the book of Kraus and Bar-Cohen [4]. Mostly in the past, thermal design and
analysis, the chip power was mostly assumed as uniform distribution. However, in
modern versatile-function demands and advanced semiconductor chip packagingtechnologies, the chips tend to non-uniform power distribution which increases the
possibility of damage due to local hot spots. Therefore, a good prediction on the
maximum temperature of a chip die is important to avoid the thermal damage.
The computational fluid dynamics (CFD) has been tremendously applied to the
heatsink design and the heat transfer in the electronic systems [5-7]. But very few
literatures discussed a chip with non-uniform or multi-hest sources. Goh et al. [8] made
the Lagrangian interpolation to predict the temperature distribution of a chip die
divided by 25 heat sources through the one hundred CFD simulations by ANSYS.
Moreover, they made another 150 simulation data to derive a nonlinear equation and
optimal estimation via genetic algorithm [9]. However, the coordinate of how sources
were fixed and not randomly located. Chen et al. [10] integrated the finite element
method (FEA) and response surface methods to make highly-nonlinear mathematical
relationships between two and three heat source locations and junction temperatures of
the chip. However, the mathematic relationships were too complicated to derive in
many of real problems.
Even the CFD simulation could reduce the cost and time of the design cycle, but the
thermal designers still need to make several trial and errors to reach an acceptable result
in each case. Therefore, a more efficient methodology is desired to conform the
diversified requirements. BNN (back-propagation neural network) has been
successfully applied to many fields such as efficiently resolving problems with
classification and prediction studies [11-15].
However, very limit literatures could be found to apply neural network to the field
electronics cooling. Kos [16] tried to use BNN to make the better placement of the
cooling components of an electronic power system, none applied to the heatsink design
in the literature. Kuan and Lien [17] developed an intelligent system to make the
heatsink designs under the combination of the parameters of heatsink length, heatsink
width, fin thickness, fin gap, fin height, and heatsink base height. In this paper, the
methodology of integrating BNN and CFD is further applied to make the temperaturedistribution on the chip die with multi-heat sources.
2 Problem Description
In this paper, the design on the locations of three dies in a FP-PBGA package type of
semiconductor chip is presented by predicting temperature distribution via integrating
BNN and CFD techniques. Figure 1 illustrates the structure, dimensions, and related
thermal properties of the FP-PBGA package chip. The chip is 42.5mm x 42.5mm x
3.04mm, with three planar heat sources at the bottom of die. Each heat source is 6.4mm x
3.6mm and generates 25W heat. The coordinates at the left-bottom vertex of the three
heat sources, (X1, Y1), (X2, Y2), and (X3, Y3), are the 6 inputs of the intelligent BNN
system as shown in the Figure 2. In addition, there are 64 outputs of the BNN, which are
the CFD simulation results on the top surface temperature values of the chip die
(Figure 3).
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Fig. 1. The illustration of the structure/dimensions and related thermal properties of the FP-PBGApackage chip
Fig. 2. The description of six inputs in the intelligent system
temperature monitoring points
at to die surface 64 oints
Fig. 3. The 64 temperature monitoring points at the top die surface of the chip
heat sources
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3 Basic Theories
3.1 Backpropagation Neural Network (BNN)
The neural network has three layers, the input, the hidden, and the output layer. The
BNN forward learning process optimizes the connection weightingiju from the input
layer nodei
x to the hidden layer nodesj
h andjk
w from the hidden layer nodej
h to
the output layer nodek
y based on the input propertiesi
x . This is shown in equation 2
and 3:
( )( )
1( )
1 input j j input j h
h f he
= =
+
(1)
( )( )
1( )
1 input kk input k y
y f ye
= =
+
(2)
where( )
( )input j ij i j
i
h u x = and ( ) ( )input k jk j k j
y w h = represent all inputs to the
hidden layer node j and all inputs to the output layer node k, respectively; and is the
bias. The difference between the theoretical output ky and the actual output kt is the
error of the output node k. That is, the neural network error function is ( )k k ke t y=
and the cost function is 21 ( )2
k k
k
E t y= . The BNN backward learning process
calculates backpropagation error functions, ( ) (1 )k k k k t y y y = w
kand
1
( ) (1 )m
w
k jk j j
k
w h h =
= u
j.
3.2 Computation Fluid Dynamics (CFD)
The CFD is to use numerical process and make the iterative calculation to solve the heatand fluid related governing equations. Through the numerical simulation, the fluid
flow, heat transfer, mass transfer, chemical reactions, and related phenomena could be
predicted. Fluid flow and heat transfer could be solved simultaneously in the CFD
process. One of the CFD scheme, finite volume method (FVM) is widely used in the
computational fluid dynamics field. In the FVM, the domain is discredited into a finite
set of control volumes or cells. The general conservation (transport) equation for mass,
momentum, energy, etc., are discredited into algebraic equations. The general
conversation equation is shown in the Equation 3. The CFD simulation is done by
Icepak, a finite-volume based CFD software [18].
V A A V
dV V dA dA S dVt
+ = +
Unsteady Convection Diffusion Generation
Eqn.
Continuity 1
x-mom. u
y-mom. v
energy h
(3)
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3.3 The Integration of BNN and CFD
The present methodology is adopting CFD to run 116 trials under the limitation of
parameter (geometry) inputs and those input values are random generated. In the 124
sets of data, 100 are taken as the training data, and the rest 16 are taken as the validation
data. The accuracy of the BNN model could be estimated after comparison with the
CFD results.
4 Results and Discussion
4.1 CFD Simulation
In this research, the chip was mounted on a 100.2mm x 114.2mm x1.6mm PCB and
assumed the thermal conductivity of the PCB is 13W/m-K under 35OC ambient
temperature. In order to accelerate the calculation speed, the average convection heater
transfer coefficients were given to surfaces of the heat-spreader and PCB to simulate
the heat removal to the heatsink from the heat spreader and heat exchange between the
PCB surface and environment. Figure 4 (a) shows the model boundary conditions of the
CFD simulation and Figure 4(b) is the temperature contour plot at the top die surface of
the first training data.
PCB k=13w/m-K
hdie= 40420W/m2
-K htop_PCB= 11.7/m2
-Khbottom_PCB= 4.33/m
2-K
(a) CFD Model (b) Temperature Distribution
Fig. 4. The CFD model and temperature distribution of the die at the first training data
4.2 BNN Training Results
Figure 5 is the convergent plot of the BNN training process. After 49951 epochs, the
BNN model tends to convergent, and MAX error is about 11.73 %, and the RMS is
about 4.52%. On the other hand, the BNN training module shows a pretty high
estimated accuracy of 95.48%. Figure 6(a) and (b) are the 3D temperature distribution
contour plots at top die surface by Icepak and BNN calculations and both are very close
to each other in shape and values, moreover, Figure 7 illustrates the 3D errordistribution contour plot at that surface for the first training data, the maximum error is
5% and RMS error is 2%. In semiconductor chip thermal design, the most important
thing is to keep the maximum die temperature below the acceptable range. Therefore, to
make an accurate maximum die surface temperature prediction would significantly
help the chip inner layout design. Figure 8 is the comparison of the maximum die
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Fig. 5. The convergent plot of the model under BNN training based on 100 training data, the
RMS falls into 4.52% and the maximum error is about 11.73%
(a) Icepak Results (b) BNN Results
Fig. 6. The 3D contour plots of the temperature distribution at the top die surface by Icepak and
BNN results for the first training data
Fig. 7. The 3D contour plots of the error percentage distribution at top die surface by Icepak and
BNN results for the first training data
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Integrating Computational Fluid Dynamics and Neural Networks 1011
BNN vs.ICEPAK Maximum Temperature of the 100 Training Data
6 0
7 0
8 0
9 0
1 0 0
1 1 0
1 2 0
1 3 0
1 5 9 1 3 1 7 2 1 2 5 2 9 3 3 3 7 4 1 4 5 4 9 5 3 5 7 6 1 6 5 6 9 7 3 7 7 8 1 8 5 8 9 9 3 9 7
No. of Training Data
MaximumDieSurfaceTemperature(OC
)
B N N
I c e p a k
Fig. 8. The comparison of the maximum die surface temperature between BNN and Icepak
results for the 100 training data
surface temperature between BNN and Icepak simulations. The results show theaverage error is 2.93% and maximum error is 9.24% which implies over 97% accuracy
in the maximum temperature prediction.
4.3 Validation
The validation of the intelligent was done by 16 randomly generated training data.
Figure 9 is the comparison of the maximum die surface temperature between BNN and
BNN vs. Icepak Maximum Die Surface Temperature for 16 Testing Data
6 5
7 0
7 5
8 0
8 5
9 0
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5
N o . o f T e s t i n g D a t a
M
a
x
i
m
u
m
D
i
e
S
u
r
f
a
c
e
T
e
m
p
e
r
a
t
u
r
e
(
O
C
)
B N N
I c e p a k
Fig. 9. The comparison of the maximum die surface temperature between BNN and Icepak
results for the 100 testing data
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Fig. 10. The 3D contour plots of the error percentage distribution at top die surface by Icepak and
BNN results for the first training data
Icepak simulations. The results show the average error is 2.96% and maximum error is5.31%, which implies over 97% accuracy in the maximum temperature prediction on
the prediction of maximum die surface temperature based on those 16 testing data.Figure 10 is the 3D error percentage distribution at the top surface of the chip die for the
first training data, the maximum error is 7% and RMS error is 3%.
5 Conclusions
In this paper, the integration of BNN and computational fluid dynamics (CFD) has been
successfully applied to the extrude heatsink design. The CFD simulations makes 116sets of data, 100 of them are taken as the training samples, and other are taken to be the
validation ones. According to the comparison between the BNN and CFD results, themaximum error is about 16.43% and the RMS is about 7.63%, and the BNN modelcould make a very fast estimation under acceptable accuracy. So after well trainedunder the training and testing data taken from the CFD, the BNN model could givequick temperature distribution as well as maximum die surface temperature under three
heat sources at different locations; moreover, the BNN model could even help to makea better design of the heat locations on the chip die during the layout. Following theBNN designs, the CFD could help to make the final adjustments and this will save a lotof design cycle and cost.
Acknowledgements
The authors appreciate the finial support by the Taiwan Semiconductor ManufacturingCompany, Ltd., and the acknowledgement would be extended to the assistance from
Northern Taiwan Institute of Science and Technology throughout the research.
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