COMPACT LOW-VOLTAGE AND HIGH-SPEED CMOS, BiCMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE

ANALOG CIRCUITS AND SIGNAL PROCESSING Consulting Editor: Mohammed Ismail. Ohio State University

Related Titles: NEUROMORPHIC SYSTEMS ENGINEERING: Neural Networks i11 Silico11, edited by Tor Sverre Lande; ISBN: 0-7923-8158-0

DESIGN OF MODULATORS FOR OVERSAMPLED CONVERTERS, Feng Wang. Ramesh Harjani. ISBN: 0-7923-8063-0

SYMBOLIC ANALYSIS IN ANALOG INTEGRATED CIRCUIT DESIGN, Henrik Floberg. ISBN: 0-7923-9969-2 SWITCHED-CURRENT DESIGN AND IMPLEMENTATION OF OVERSAMPLING AID CONVERTERS, Nianxiong Tan. ISBN: 0-7923-9963-3 CMOS WIRELESS TRANSCEIVER DESIGN, Jan Crols. Michie/ Steyaert, ISBN: 0-7923-9960-9 DESIGN OF LOW-VOLTAGE, LOW-POWER OPERATIONAL AMPLIFIER CELLS, Ron Hogervorst, Johan H. Huijsing, ISBN: 0-7923-9781-9 VLSI-COMPA TIBLE IMPLE:\'IENTA TIONS FOR ARTIFICIAL NEURAL NETWORKS, Sied Mehdi Fakhraie. Kenneth Curless Smith, ISBN: 0-7923-9825-4 CHARACTERIZATION METHODS FOR SUBMICRON MOSFETs, edited by Hisham Haddara, ISBN: 0-7923-9695-2 LOW-VOLTAGE LOW-POWER ANALOG INTE<.RATED CIRCUITS, edited by Wouter Serdijn, ISBN: 0-7923-9608-1 INTEGRATED VIDEO-FREQUENCY CONTINUOUS-TIME FILTERS: High-Perjorma11ce Rea/izatio11s i11 BiCMOS, Scali D. Willingham, Ken Martin, ISBN: 0-7923-9595-6 FEED-FORWARD NElJRAL NETWORKS: Vector Decomposition Analysis, Modelling and Aualog /mplementatiou, Anne-Johan Anuema, ISBN: 0-7923-9567-0 FREQUENCY COMPENSATION TECHNIQUt::S LOW-POWER OPERATIONAL AMPLIFIERS, Ruud Easchauzier. Johau Huijsiug, ISBN: 0-7923-9565-4 ANALOG SIGNAL GENERATION FOR BIST OF MIXED-SIGNAL INTEGRATED CIRClJITS, Gordon W. Roberts. Albert K Lu, ISBN: 0-7923-9564-6 INTEGRATED FIBER-OPTIC RECEIVERS, Aaron Buchwald. Kenneth W. Martin, ISBN: 0-7923-9549-2 MODELING WITH AN ANALOG HARDWARE DESCRIPTION LANGUAGE, H. Alan Mautooth.Mike Fiegeubaum, ISBN: 0-7923-9516-6 LOW-VOLTAGE CMOS OPERATIONAL AMPLIFIERS: Theory, Design and Implementation, Satoshi Sakurai. Mohammed Ismail, ISBN: 0-7923-9507-7 ANALYSIS AND SYNTHESIS OF MOS TRAt'ISLINEAR CIRClJITS, Remco J Wiegerink, ISBN: 0-7923-9390-2

COMPUTER-AIDED DESIGN OF ANALOG CIRClJITS AND SYSTEMS, L. Richard Carley, Ronald S. Gyurcsik, ISBN: 0-7923-9351-1

HIGH-PERFORMANCE CMOS CONTll' llOlJS-TIME FILTERS, Jose Silva-Martinez. Michie! Steyaert, Willy Sansen, ISBN: 0-7923-9339-2 SYMBOLIC ANALYSIS OF ANALOG CIRClJITS: Techniques and Applications, Lawrence P. Huelsman. Georges G. E. Gielen, ISBN: 0-7923-9324-4 DESIGN OF LOW-VOLTAGE BIPOLAR OPERATIONAL AMPLIFIERS, M. Jeroen Fond erie. Johan H. Huijsing, ISBN: 0-7923-9317-1 STATISTICAL MODELING FOR COMPUTER-AIDED DESIGN OF MOS VLSI CIRCUITS, Christopher Michael, Mohammed Ismail, ISBN: 0-7923-9299-X SELECTIVE LINEAR-PHASE SWITCHED-CAPACITOR AND DIGITAL FILTERS, Hussein Baher, ISBN: 0-7923-9298-1

ANALOG CMOS FILTERS FOR VERY HIGH FREQUENCIES, Bram Nauta, ISBN: 0-7923-9272-8 ANALOG VLSI NElJRAL NETWORKS, Yosh(yasu Takefuji, ISBN: 0-7923-9273-6

COMPACT LOW-VOLTAGE AND HIGH-SPEED CMOS,

BiCMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

by

Klaas-Jande Langen Philips Semiconductors, Inc.,

Sunnyvale. California

and

Johan H. Huijsing Delft University of Technology,

The Netherlands

SPRINGER SCIENCE+BUSINESS MEDIA, LLC

A c.I.P. Catalogue record for this book is available from the Library of Congress.

ISBN 978-1-4419-5102-1 ISBN 978-1-4757-2993-1 (eBook) DOI 10.1007/978-1-4757-2993-1

This printing is a digital duplication ofthc original cdition.

Prilltul OII acid)ree paper

Second Printing 2003

AII Rights Reserved © 1999 Springer Science+Business Media New York

Original1y published by Kluwer Academic Publishers in 1999 Softcover reprint ofthe hardcover lst edition 1999

No part of the material protected by this copyright notice may be reproduced or utilized in any form or by any means, electronic or mechanical ,

including photocopying. recording or by any information storage and retrieval system, without writtcn permission from the copyright owner.

Table of Contents

Preface

List of symbols

1 Introduction

• IX

. XI

1 1.1 Low-voltage limitations .......................................... 2

1.2 Transistor limitations .............................................. 4

1.2.1 Bipolar junction transistor ............................. 4 1.2.2 MOS transistor............................................... 6

1.3 Low-voltage power-efficient operational

amplifier design....................................................... 8

1.4 Organization of the work . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lO

1.5 References............................................................. 11

2 Input Stages 13 2.1 Introduction........................................................... 13

2.2 Basic input stages .................................................. 14

2.3 Rail-to-rail input stages in bipolar and CMOS technology............................................................. 18

2.4 Rail-to-rail input stages with constant common-

mode output currents ............................................. 25

2.5 Input-stage biasing for constant gm in bipolar

and CMOS technology.......................................... 28

2.6 Conclusions........................................................... 31

2.7 References ............................................................. 32

COMPACT LOW-VOLTAGE AND HIGH-SPEED

CMOS. BICMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

v

Table of Contents

3 ·Output Stages 35 3.1 Introduction ............................................................ 35

3.2 Basic output-stage configurations .......................... 36

3.3 Static distortion considerations .............................. 39

3.4 Feedforward class-AB biasing ............................... 43

3.5 Feedback class-AB biasing .................................... 59

3.6 All-NPN output stages ........................................... 85

3.7 BiCMOS output-stage configurations .................... 89

3.8 Protection circuits .................................................. 93

3.8.1 Saturation protection .................................... 93 3.8.2 Current limitation ......................................... 95

3.9 Conclusions .......................................................... 102

3.10 References ............................................................ 106

4 Overall-Design Techniques 109 4.1 Introduction .......................................................... 109

4.2 DC-gain limitations ............................................. 110

4.3 Bandwidth limitations .......................................... 114

4.4 Frequency compensation ..................................... 117

4.5 Two-stage amplifier optimalization ..................... 123

4.5.1 Parallel compensation ................................ 123 4.5.2 Miller compensation ................................... 127 4.5.3 Multipath-Miller-zero cancellation ............ 137 4.5.4 Active Miller compensation techniques ..... 138

4.6 Three-stage amplifier optimalization ................... 142

4.6.1 Nested-Miller compensation ...................... 143 4.6.2 Cascoded-nested-Miller compensation ...... 147 4.6.3 Mirrored-nested-Miller compensation ....... 150 4.6.4 Multipath-Nested-Miller compensation ..... 151

VI COMPACT LOW-VOLTAGE AND HIGH-SPEED

CMOS, BICMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

Table of Contents

4.6.5 Multiple-multipath nested-Miller compensation............................................. 156

4.7 Dynamic distortion .............................................. 160

4.8 Settling time .. .. .. .. ........... .. .. ..... .. .. ..... .. .. ... .. .. .. ...... 164

4.9 Design for programmability................................ 167

4.10 Conclusions......................................................... 168

4.11 References........................................................... 169

5 Realizations 171 5.1 Introduction......................................................... 171

5.2 Bipolar amplifier topologies................................ 172

5.2.1 1-GHz operational amplifier ...................... 172 5.2.2 Power-efficient high-current amplifier ...... 189

5.3 CMOS Compact amplifier topologies for VLSI. 193

5.3.1 Compact 1.4 V topology with rail-to-rail output range . . . . .. . . . . . . . . .. .. . . . . . .. . . . . . .. . . . . . . . . .. .. .. . 194

5.3.2 Compact l.7V topology with rail-to-rail input and output ranges.............................. 205

5.3.3 Ultimate-low-voltage compact amplifiers with rail-to-rail output ranges.................... 211

5.4 BiCMOS amplifier topologies ............................ 221

5.4.1 Compact BiCMOS amplifiers with rail-to-rail input and output ranges .. .. . . .. .. .. . . . . . . . . . . . 221

5.4.2 Low-voltage BiCMOS amplifiers with rail-to-rail output range .............................. 228

5.4.3 200-MHz power-efficient BiCMOS amplifiers................................................... 234

5.5 Conclusions ......................................................... 242

5.6 References ........................................................... 243

Index 247

COMPACT LOW-VOLTAGE AND HIGH-SPEED

CMOS, BICMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

VII

Preface

"Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers" focuses on the design of integrated operational amplifiers that approach the limits of low supply voltage or very high bandwidth. The resulting realizations span the whole field of applications from micro-power CMOS VLSI amplifiers to 1-GHz bipolar amplifiers. The work is especially useful for professional designers who like to improve their amplifier designs to match the state of the art. The book is also of interest to graduate students in the field of analog circuit design.

After discussing the fundamentals of low-voltage power-efficient operational amplifier design in the first chapter, chapter 2 discusses input stages. First, basic input stages are discussed, followed by rail-to-rail input stages with constant transconductance for constant bandwidth. New input-stage circuits that result in compact solutions are presented (section 2.4). Finally, new compact PTAT bias-current generators are discussed by which a constant transconductance of CMOS input stages as a function of temperature can be obtained (section 2.5).

In chapter 3, output stages are discussed. First, rail-to-rail output stages are treated. A rail-to-rail output-voltage swing can be obtained by using a common-source connected or common-emitter connected output stage. Class-AB biasing assures a compromise between power consumption and distortion. Two types of class-AB biasing principles can be distinguished: feedforward class-AB control and feedback class-AB control. Numerous examples of both principles are given in CMOS as well as in bipolar technology. In addition, the stability of the class-AB control loop of feedback biased output stages is analyzed (section 3.5). Especially interesting is the feedback class-AB biasing with a simple minimum selector which can be applied in CMOS as well as in bipolar technology (section 3.5). Secondly, aii-NPN output stages are presented. Thanks to the excellent performance of NPN transistors, all-NPN output stages are still important for achieving very high bandwidth or very high output-current capability. Finally, an overview of output stages in BiCMOS technology is given (section 3.7). For bipolar output stages in bipolar and BiCMOS amplifiers very important protection circuits are discussed which limit the output current and the saturation of output transistors (section 3.8).

Chapter 4 treats the overall design of operational amplifiers. In order to obtain sufficient gain, an operational amplifier consists of several cascaded gain stages. Since each stage introduces a dominant pole, frequency compensation is required to shape the frequency response. The only frequency compensation techniques suited to general purpose

COMPACT LOW-VOLTAGE AND HIGH-SPEED IX CMOS. BICMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

amplifiers are based on Miller compensation. Using Miller compensation the bandwidth reduces when the number of stages increases. The optimization of two-stage Miller compensated amplifiers is discussed. If the supply voltage is equal to one gate-source voltage and one saturation, at least three stages are needed to achieve sufficient gain in bipolar technology, in BiCMOS technology. and in CMOS technology. A three-stage amplifier can be compensated using nested-Miller compensation. Two new active versions of nested-Miller compensation are introduced: cascoded-nested-Miller compensation (section 4.6.2) and mirrored-nested-Miller compensation (section 4.6.3).

In the final chapter, chapter 5, many realizations are presented. Two amplifiers have been designed in bipolar technology. The first amplifier is a wideband amplifier with a very high unity-gain frequency of I GHz. The second amplifier has a rail-to-rail class-AB output stage with a high ratio between the maximum output current and the quiescent current. Five amplifiers have been designed in CMOS technology. Three Amplifiers are based on a compact topology that can operate on a supply voltages down to one gate­source voltage and two saturation voltages which amounts to about 1.4 V. The two other CMOS amplifiers are based on an ultimate-low-voltage topology and can operate on supply voltages down to one gate-source voltage and one saturation voltages which amounts to about 1.2 V. In BiCMOS technology, five amplifiers have been designed. The first two amplifiers are based on a compact topology. Two other amplifiers are designed to operate on low supply voltages down to 1.3 V. The final amplifier uses a powerful combination of an aii-NPN output stage driven by a PMOS intermediate stage to obtain a power-efficient wideband amplifier. The amplifier has a unity-gain frequency of 200 MHz and can operate down to 2.5 V.

Klaas-Jan de Langen Johan H. Huijsing

Delft, April 6, 1999.

X COMPACT LOW-VOLTAGE AND HIGH-SPEED

CMOS, 81CMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

List of symbols

Symbol Quantity Unit

p transconductance factor A/V2

PF forward current gain of bipolar transistor

PR reverse current gain of bipolar transistor y bulk -threshold parameter 1/VI/2

1-l voltage gain

!ln mobility of electrons cm2Ns

lln mobility of holes cm2Ns a real part of the complex frequency rad/s 1: time constant s

<l>t flat-band voltage v <l'm phase margin 0

(I) frequency rad/s (l)d doublet frequency rad/s (l)d unity-gain frequency of uncompensated system rad/s (I)[> pole frequency rad/s ffiu unity-gain frequency rad/s (l)z zero frequency rad/s Ao de open-loop gain dB Be effective bandwidth Hz CMRR common-mode rejection ratio dB c symbol for capacitor F CsE base-emitter capacitance F Ccs gate-source capacitance F eM Miller capacitor F CL load capacitor F cox normalized oxide capacitance Flm 2

DR max maximum dynamic range dB f frequency Hz

h transit frequency Hz gill transconductance n-1 i small-signal current A

iill small-signal input current A I current A

COMPACT LOW-VOLTAGE AND HIGH-SPEED XI CMOS, BICMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

List of symbols

18 /BIAS lc lo IM IQ

/REF

Is jw k

Kn KP L M M II

II

N p

p'llf' q Q

rhe

1lis I'll

R

RB Rc RL

sd T Ts I'

1';11

~'out

v,~, VH VBE Vee VCE VcM

XII

base current of bipolar transistor A bias current A collector current of bipolar transistor A drain current of MOS transistor A minimum current A quiescent current A reference current A saturation current of bipolar transistor A imaginary part of the complex frequency rad/s Boltzmann's constant, 1.3805·1 o-23 JIK flicker noise component of NMOS transistor y2p flicker noise component of PMOS transistor y2p channel length of MOS transistor Ill

symbol for MOS transistor number of cascade stages weak inversion slope factor of MOS transistor scaling factor number of stages power w supply power w electron charge, 1.6·1 o- 19 c symbol for bipolar transistor base-emitter resistance of bipolar transistor .Q

drain-source rc'iistance of MOS transistor .Q

output resistance of bipolar transistor .Q

symbol for resistor base bulk resistor of bipolar transistor .Q

collector bulk resistor of bipolar transistor .Q

load resistor .Q

doublet spacing absolute temperature K settling time s small-signal voltage v small-signal input voltage v small-signal output voltage v squared equivalent thermal input noise voltage V2/Hz signal voltage with maximum amplitude v base-emitter voltage of bipolar transistor v positive supply voltage of bipolar circuits v collector-emitter voltage of bipolar transistor v common-mode input voltage v

COMPACT LOW- VOLTAGE AND HIGH-SPEED

CMOS, 81CMOS AND BIPOLAR OPERATIONAL AMPLIFIERS

List of symbols

Voo positive supply voltage of MOS circuits v Vos drain-source voltage of MOS transistor v Vn negative supply voltage of bipolar circuits v Vcs gate-source voltage of MOS transistor v VIN input voltage v VN noise voltage v VNN negative supply voltage of BiCMOS circuits v Vos offset voltage v Vour output voltage v Vpp positive supply voltage of BiCMOS circuits v Vsur saturation voltage v VsB source-bulk voltage of MOS transistors v Vss negative supply voltage of MOS circuits v VsuP supply voltage v VsuP. min minimum supply voltage v Vr thermal voltage v Vrh threshold voltage v Vm threshold voltage at V.m=OV v w channel width of MOS transistor m z impedance Q

COMPACT LOW- VOLTAGE AND HIGH-SPEED XIII CMOS, BICMOS AND BIPOLAR OPERATIONAL AMPLifiERS