computer architecture: a quantitative approach - cap4 - section 6

5
Multiprocessors and Thread-Level Parallelism Models of Memory Consistency “I'm radically increasing Sun's focus on storage today” Sun President Jonathan Schwartz (Oct, 2007)

Upload: marcelo-arbore

Post on 27-Jun-2015

741 views

Category:

Technology


0 download

TRANSCRIPT

Page 1: Computer Architecture: A quantitative approach - Cap4 - Section 6

Multiprocessors and Thread-Level Parallelism

Models of Memory Consistency

“I'm radically increasing Sun's focus on storage today”

Sun President Jonathan Schwartz (Oct, 2007)

Page 2: Computer Architecture: A quantitative approach - Cap4 - Section 6

What behavior should we expect?

Page 3: Computer Architecture: A quantitative approach - Cap4 - Section 6

Sequential consistency model

Data-race-free programs

Synchronization mechanism are extremely tricky

The programmer's view

Page 4: Computer Architecture: A quantitative approach - Cap4 - Section 6

W->R: total store ordering / processor consistency

W->W: partial store order

R->W / R->R: weak ordering, PowerPC, release consistency

Relaxed Consistency Models

Page 5: Computer Architecture: A quantitative approach - Cap4 - Section 6

Thank you!

Author: Prof. Sergio Takeo, Marcelo Arbore.

Bibliography: Patterson, D. A.; Hennessy, J. L. Computer Architecture: A quantitative Approach, 4th Ed. Morgan Kaufmann Publishers.

“I'm radically increasing Sun's focus on storage today”

Sun President Jonathan Schwartz (Oct, 2007)