computer ion and architecture first home work
TRANSCRIPT
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ASSIGNMENT: - 1BY: - NARINDER PAL
CLASS: - MSC (cs)
SUBJECT NAME: COMPUTER ORGANIZATION AND ARCHITECTURE
Part A
Q1: Identify at least two application areas (discuss their roles also)
for
(a) Encoder/Decoder(b) Multiplexers/De-multiplexer(c)Flip Flops
ANS: - ENCODER:-
An encoder is combinational circuit that performs the
inverse operation of a decoder. The simplest encoder is a 2n *n binary input lines
and n is the number of output lines.
DECODER:-
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A Decoder Is A Multiple Logic Circuit That Converts Coded Input
Into Code Outputs, Where The Input And Output Codes Are Different.
(a) Application Areas OfEncoder/Decoder:-1) A device or program that uses predefined algorithms to encode, or
compress audio or video data for storage or transmission use. See also
decoder.
(2) A circuit that is used to convert between digital video and analog video.
(3) The radio frequency spectrum is filled with noise and other signals,
especially those frequencies where unlicensed transmitter operation under
FCC part 15 rules is allowed. When using a wireless remote control system
it is desirable to have a way of filtering out or ignoring those unwanted
signals to prevent false data from being received.
(4) A simple way to accomplish this is to use an encoder IC at the
transmitter and a decoder IC at the receiver. The encoder generates serial
codes that are automatically sent three times and must be received at least
twice before data is accepted as valid by the decoder circuit.
(5)In the early days of radio control", before these coding ICs were
available, radio controlled garage doors sometimes opened themselves when
they received transmissions from a plane passing overhead or a two-way
radio operating in the area. Encoding and decoding is now used in most
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wireless control systems to prevent this type of interference.
(d) Multiplexers/De-Multiplexer:-Multiplexers:-
A multiplexer is a combinational circuit that receives
binary information from 1 of 2n
input data lines and drax it to a single output
datelines for the output is determine by a set of selection input. 2n
to 1
multiplexer have 2n
input datelines and input selection lines, whose bit
combination determine which input data are selected for the output.
De-multiplexer:-
A digital de multiplex has 1 input and many output
lines. It performs the reverse operation of a digital multiplexer. It accept a
single input and send it to 1 out of many output lines, which is selected by
select lines.
Application Areas of Multiplexers/De-Multiplexer:-
Telegraphy:-
The earliest communication technology using electrical
wires, and therefore sharing an interest in the economies afforded by
multiplexing, was the electric telegraph. Early experiments allowed two
separate messages to travel in opposite directions simultaneously, first using
an electric battery at both ends, then at only one end.
Telephony:-
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In telephony, a customer's telephone line now typically
ends at the remote concentrator box down the street, where it is multiplexed
along with other telephone lines for that neighborhood or other similar area.
The multiplexed signal is then carried to the central switching office on
significantly fewer wires and for much further distances than a customer's
line can practically go. This is likewise also true for digital subscriber lines
(dsl).
(e)Flip Flops:-In digital circuits, a flip-flop is a term referring to an electronic
circuit (a bitable multi vibrator) that has two stable states and thereby is
capable of serving as one bit of memory. A flip-flop is usually controlled by
one or two control signals and/or a gate or clock signal. The output often
includes the complement as well as the normal output.
Q2: Discuss the basic logic behind counters i.e. how will you obtain
1000(8) from 0111(7)? How will you implement the same?
ANS: - A binary 0 is zero or off and a binary 1 is one or on. Binary
numbers, as the name suggests, have a value in decimal of two because
the binary number can either be on or off. Binary is calculated from the
place value that the 1 holds. An example of this is the binary number:
00000001. Starting from the left we record the position of the 1 as the
decimal number one. The binary number 00000011 is equal to 1 plus 2
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which is three in decimal. The binary number 00000111 is equal to 1
plus 2 plus 4 which seven in decimal.
0 1 1 1 1 1 1 1 = 127
0 1 1 1 1 1 1 0 = 126
0 0 0 0 0 0 1 0 = 2
0 0 0 0 0 0 0 1 = 1
0 0 0 0 0 0 0 0 = 0
1 1 1 1 1 1 1 1 = 1
1 1 1 1 1 1 1 0 = 2
1 0 0 0 0 0 0 1 = 127
1 0 0 0 0 0 0 0 = 128
Q3: State and prove De-Morgan's Theorem by taking a suitable
example.ANS: - De-Morgan's Theorem:-
The de-morgan's theorem says that the
complement of the product of a given set of variables is equal to the sum of the
complements of the individual variables; and the complement of the sum of a given
set of variables is equal to the product of the complements of the individual
variables. De-morgan's theorem applies to any arbitrary number of variables.
Example:-
1)
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=
2)
=
Part - B
Q4: Multiply any 2 binary numbers of 4-bits each, using Booch's
Method and show step by step values.
ANS: -Booths algorithm:-
Booths algorithm is used to multiply to
signed or unsigned numbers. It is invented by Andrew D. booth.
STEPS OF BOOTHS MULTIFICTION:-
1)Change the number into binary coded form. If number isnegative then find out its 2s compliment.
2)Initialized the values to the QR and AC registers.3)AC initialized the zero. Sets the value Q1 = zero.
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4)Initialized the SC registers equal to the number of bits in QR.5)If Q0Q1 are 00 or 11 then apply the arithmetic right shift
operation (ARSH). If Q0Q1 is the values 01then add the contents
BR into register AC and if the contents of Q0Q1 are 10 then
subtract the contents of BR from AC.
6)Detriment the SC by 1.7)This step is continue until the value of sc become 00.8)Then at the end combine the result of BR and AC. Then the
result is the binary number of the multiplicands mortificationnumber.
Example: - we take the example of 2*3.
The binary number of 2 is 0010 and the binary number of 3 is
0011. The 2s complement of 2 is 0010
1101 (1s complement)
+1
-------------
1110 (2s complement)
--------------Q0 Q1 BR= 1110 AC QR Q1 SC
0010
Initial 0000 0011 0 100
1 0 sub BR 1110
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---------
1110
ARSH 1111 0001 1 011
1 1 ARSH 1111 1000 1 0100 1 add BR 0010
---------
0001
ARSH 0000 1100 0 001
0 0 ARSH 0000 0110 0 000
Now multiply the AC and QR. The result is 00000110 which is the binary number
of 6 (2*3).
Q5: Perform BCD addition and subtraction of 1254 and 456.
ANS: - BCD Addition:-
BCD, or binary-coded decimal, represents the 10
decimal digits in terms of binary numbers. It is possible to build digital hardware
that man-ip-ulates BCD directly, and such hardware could be found in early com-
puters and many hand-held calculators. The BCD system was chosen for the
internal number system in these machines because it is easy to convert it to
alphanumeric representations for printouts and displays. The compelling
advantages of BCD have waned over time, and these digits are supported by more
modern hardware simply to provide backward compatibility with earlier
generations of machines. In this section, we briefly examine the approaches for
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constructing BCD arithmetic -elements.
BCD ADDITION
CARRYBIT
1 1 1
1254 0001 0010 0101 0100
+456 0000 0100 0101 0110
1710 0001 0110 1010>9 1010>9
0110 0110
0001 0111 0001 0000
Sum 1 7 1 0
BCD SUBTRACTION
1254 0001 0010 0101 0100
-456 0000 0100 0101 0110
798 1101>9 1111>9 1110>9
0110 0110 0110
0111 1001 1000
sub 0 7 9 8
Q6: Show the contents of E, A, Q and SC during the process of
division of two binary numbers, 10100011 by 1011.
ANS: - First, let me briefly explain BCD. In BCD, each digit of a
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decimal
number is represented by a 4-bit value (similar to the way hexadecimal
digits are represented by 4-bit groups in "pure" binary). Since
decimal only has the digits 0 through 9, only the following values are
valid "4-bit groups" in BCD:
DEC BCD DEC BCD
0 0000 5 0101
1 0001 6 01102 0010 7 0111
3 0011 8 1000
4 0100 9 1001
The combinations 1010, 1011, 1100, 1101, 1110, and 1111 are invalid
because they don't add up to a decimal digit. Since each decimal digit
requires 4 BCD bits, we need 16 bits to represent a 4-digit decimal
value. Your CPU, however, can only work with 8 bits at a time. So we'll
need to break up the numbers into two parts (bytes) and work with one
byte at a time. Let's call the bytes (or the registers where the bytes are
stored) A1 and A0 for the first number - with A1 being the moresignificant byte (MSB) and A0 being the less significant (LSB.) Let's
call the bytes B1 and B0 for the second number - again letting B1 be the
more significant byte and B0 the less significant. For example, let's say
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we want to add the numbers:
2483
+ 1795
------
The 2483 would be represented as 0010 0100 1000 0011 (I'll put spaces
in between each group of 4 bits for readability) and so:
A1 = 0010 0100
A0 = 1000 0011
The 1795 would be represented as 0001 0111 1001 0101 and so:
B1 = 0001 0111
B0 = 1001 0101
When adding large numbers with pencil and paper, we start with the
least significant digits (the units place) and work our way from right to
left. Similarly, our CPU will begin with the LSBs and work over to theMSBs.
First we'll add the LSBs; A0 + B0:
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1 111
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+ 0110 0000
------------
1 0111 1000
That's better. Let's store that as S0. Now the MSBs. We'll add
A1 + B1:
_____ Carry-over from the LSBs (in the C-flag)
/v
1111
0010 0100
+ 0001 0111
-----------
0011 1100
This time, we got the answer 0011 1100, but that doesn't make sense in
BCD (1100 is an invalid 4-bit group in BCD.) Why? Because again the
CPU did the addition in pure binary. When it added 4 + 7 + 1 it got 12
and represented it in binary as 1100. But for BCD it should have carried10 of them over to the tens digit and only kept 0010 (2 in decimal). To
"force" the half-carry (i.e. the carry from the 4th bit to the 5th), we'll add
6 to the units digit (0000 0110 in BCD) to make the group of 10 that
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should have been carried a group of 16 that the CPU will carry:
1111
0010 0100
+ 0001 0111
-----------
0011 1100
+ 0000 0110
-----------0100 0010
Q7: Why is it necessary to consider the case of divide overflow?
ANS: - Divide Overflow:-
In computer science, divide and conquer
(D&C) is an important algorithm design paradigm based on multi-
branched recursion.
The division operation may result in a quotient overflow when we have a fixed
length of register and it cannot hold a number exceeds the standard length. The
divide overflow condition must be avoided in normal computer operation because
the entire quotient will be too long for transfer into a memory until that has words
of standard length that is the same as the length of registers. When the divider is
twice as long as divisor, the condition for overflow is a divide overflow condition
occur if the high order half bits of the dividend constitute a number greater than or
equal to the divisor. Another problem is that division by zero must be avoided.
This occurs because any dividend will be greater than or equal; to a divisor which
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is equal to zero.
The divide-and-conquer paradigm often helps in the discovery of efficient
algorithms. It was the key, for example, to Karatsuba's fast multiplication method,
the quick sort and merge sort algorithms, the Stassen algorithm for matrix
multiplication, and fast Fourier transforms.