Consortium

The

Organization Overview

& Status UpdateFebruary 2006

Ralph von Vignau,

The SPIRIT Consortium Chair

© SPIRIT 2006. All rights reserved

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Structure of Presentation

• The SPIRIT Consortium Vision

• The SPIRIT Consortium Organization

• Technical Overview of Specifications

• Deliverables and Roadmap

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HW Accelerators

DSP

On-chip Memory

Dedicated Peripherals

Logic

Core support

CPU Core

AR

B

Dec

od

eComplex system interconnect:Configurable Bus Matrix

Core subsystem:Select and

Automate Integration

Peripheral IP:Select, Configure and Automate Integration

Build full system:Auto-Validate Build

… we need industry standards for data exchange to enable the ecosystem

For Advanced SoC Design Paradigms ..

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• SPIRIT Meta-data:

– Machine-interpretable design IP

– Specifies integration requirements

– Consistent across all design views

• SPIRIT generators:

– Point-tool launch

– IP configuration launch

– Interface for integration with SPIRIT-enabled tools

HW Accelerators

DSP

AR

B

Dec

ode

On-chip Memory

LogicDedicated

Peripherals

Integrate

SPIRIT Provides the Critical Standard

Import

Configure

Core support

CPU

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Why use Design Meta-data?

• Relate specification to implementation

– Machine interpretable coupling of design views

– e.g., Meta-data describes how Verilog signal list of a design IP describes a bus interface

• Broad applicability

– Is applicable to new and legacy IP

– No enforced design style or methodology

– A by-product of IP import into SPIRIT-enabled tools

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The SPIRIT Vision for SoC Design

• IP shipped with machine-readable SPIRIT 'data-book'– IP catalogued using SPIRIT XML meta-data

– IP will be automatically configured and integrated into designs

• From SPIRIT, data for all design views is generated– Simulation models, documentation, tool-config., embedded SW

– SoC configuration-data managed through project life-cycle

– Consistency between design and verification views maintained

• SPIRIT-enabled specialist IP and tools market emerges– Point tools operate in any SPIRIT-enabled design environment

– A rich 3rd-party IP generators market emerges

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The SPIRIT Consortium Technical Goals

• Build on existing standards

– XML (W3C)

– Synchronize with VSIA, IEEE, Accellera, OSCI, OCP-IP

• Standardize one IP meta-data description

– One way to describe IP to enable configuration and integration

• Standardize one API for generator integration

– Enable efficient and cost-effective integration of multi-sourced IP and point tools

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The SPIRIT Consortium Adoption Goals

• Worldwide adoption: a single meta-data standard– well exceeds 1000 downloads to date, all regions represented

• Strong supply chain support (IP and EDA tools)– significant downloads from more than 20 major supply-chain

companies – many have announced SPIRIT support in product

• Broad system integrator usage– significant downloads from more than 20 major systems houses,

and more than 100 systems companies are examining the standard

– some significant new memberships, supply side and integrators• Academic usage and development

– More than 50 major academic institutes downloading

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Structure of Presentation

• The SPIRIT Consortium Vision

• The SPIRIT Consortium Organization

• Technical Overview of Specifications

• Deliverables and Roadmap

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The SPIRIT Consortium Organization

• Chairman: Ralph von Vignau, Philips

• Vice-chair: Christopher Lennard, ARM

• Steering Committee: organizational decisions, approvals

• Technical Working Groups:

– SWG: Current schema releases (v1.x for RTL design)

– EWG: ESL Technical Working Group (extensions to handle TLM)

– VWG: Verification Technical Working Group (application to VIP)

• Steering Committee Members:

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The Growing Consortium Membership

Contributing Members

Steering Committee

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Structure of Presentation

• The SPIRIT Consortium Vision

• The SPIRIT Consortium Organization

• Technical Overview of Specifications

• Deliverables and Roadmap

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SPIRIT in Design Environments

Design Build

Design Capture

protocolbuswidth

P

system_bus

ComponentIP

UART GPIO

addressinterfaceregisters

Design Build

protocolbuswidth

P

system_bus

ComponentIP

UART GPIO

PComponent

IP

UART GPIO

MEM

addressinterfaceregisters

addressinterfaceregisters

SPIRIT IPImportExport

SPIRIT Enabled IP

ComponentIP

ComponentXML

ComponentIP

ComponentXML

SPIRITMeta-data

SPIRIT EnabledSoC Design Tool

ConfiguredIP

PointTool

SPIRITAPIs

PointTool

GeneratorXML

ConfiguratorXML

SPIRIT EnabledGenerators

SoCDesign IP

XML

SoCDesign IP

DesignXML

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Key Elements of SPIRIT 1.x• Component schema

– describe any IP block: cores, peripherals, buses components

• Design schema

– describes any system: component instances, and connectivity

• PMD (platform meta data) rules

– describes access rights and default parameters

• Bus definitions

– describe bus interface, integration requirements and defaults

• Generator Interfaces:

– LGI: Loose Generator Interface (support in all SPIRIT 1.x deliverables)• Meta-data dumping mechanism

– TGI: Tight Generator Interface (initial support for SPIRIT 1.2, Q1 2006)• Access SPIRIT data-bases directly get and set methods

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Checking Validity of SPIRIT Usage

• Rules to ensure uniform adoption of specifications– Parse Validity: tool can read valid SPIRIT XML without error

– Description Validity: design meta-data checked against SPIRIT XML schema; description completely captures relevant data

– Semantic Validity: must adhere to correct semantic interpretation of SPIRIT XML elements and attributes

• Semantic Validity Checker– Members can use an example tcl-script checker today

• Completion of checker being driven by real-world usage

– SPIRIT semantic checker public release with SPIRIT v1.2

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Structure of Presentation

• The SPIRIT Consortium Vision

• The SPIRIT Consortium Organization

• Technical Overview of Specifications

• Deliverables and Roadmap

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SPIRIT v1.x Deliverables• XML Schema

– Bus, Component IP and SoC Design IP (interconnection)– Loose Generator (LGI) & Tight Generator Interface (TGI) support– Timing constraint for flow to synthesis

• Generator APIs– LGI interface– TGI interface

• Will be released with SPIRIT v1.2 in Q1 2006

• Documentation– Requirements, User Guide, online schema documentation

• XML Examples – Leon IP (UART w/ timing constraints, timers, interrupt controller)– busDefinitions

• Encapsulating most major bus protocols in SPIRIT v1.2

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Current: SPIRIT v1.2 for RTL Design

• The SPIRIT Consortium Specification Public Release– End Q1 2006

• IEEE Standardization Process (P1685)– Starts early Q2 2006

• Mainstream adoption has started – Already proven in production silicon design flows

• Comprehensive and complete for RTL design– Added over current v1.1 release

• Comprehensive hierarchy support• Exchange of system configuration data• Support for monitors and assertions• Tight generator Interface• Comprehensive semantics and rule checker• Set of SoC SPIRIT busDefinitions for common buses

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Futures: SPIRIT for System-Level Design• Build on SPIRIT v1.x to support

– one meta-data database for ESL and RTL

– backwards compatibility with SPIRIT v1.x IP and generators

– support of transaction interfaces and adaptors

– automatic assembly of mixed-abstraction system models

– consistency of system model views between abstractions #

• Compatible with SPIRIT v1.2 for RTL design– SPIRIT for ESL (v2.0) --- ALPHA Release - Dec

2005

– SPIRIT for ESL --- Public Release - Q2 2006

• Mainstream adoption expected H1 2007

• IEEE standardization: – To follow a period of industry adoption and review

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The SPIRIT Consortium Roadmap• SPIRIT launch: DAC 2003

– Requirements: Q4 2003

• SPIRIT 1.0: Scope – RTL Dec 2004

• SPIRIT 1.1: Scope – w/ Timing Constraints DAC 2005

• SPIRIT 1.2: Scope – RTL, Verification IP & TGI

– BETA Release (Member Review) Dec 2005

– Validated public release Q1 2006

– IEEE 1685 Process starts Q2 2006

• SPIRIT Futures: Scope – ESL, Transactional Verification IP

– Requirement Public Release DATE 2005

– ALPHA Release (v2.0 Member Review) Dec 2005

– Validated Public Release: Q2 2006

– IEEE Process starts H1 2007

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Thank You for Your Attention!

Collaborating for

Consortium

Collaborating for Efficient IP-Based SoC Design

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