School of Mechatronic Engineering

University Malaysia PerlisENT263:

DIGITAL ELECTRONICTITLE:

CAR PARK DIGITAL CONTROLLER

GROUP MEMBER:

NAME MATRIX NO.SITI AFIQAH BT MOHD BAKHARI 101061171

MOHAMAD AMZAR B AZEMI 101060488Sultan Mohammed Ahmed 091060086_5

CONTENT:

S.NO: TOPICS:

1. OBJECTIVES

2. INTRODUCTION

3. THE UP-DOWN COUNTER

4. THE SEVEN SEGNMENT

5. THE MAIN DESIGN

6. Descusion

7. CONSLSION

8 REFERENCES

OBJECTIVES & SCOPE OF WORK

1_ The aim of this project has requested to design the car park digital

controller circuit for five and make structure for that as a practical design in

the lab.

2_ used materials, some components to build this system and make it real project.

3_ we can build such a counter circuit from J-K flip-flops is to connect all the clock inputs together, so that each and every flip-flop receives the exact same clock pulse at the exact same time

4_The display used seven binary inputs that control which of the seven different segments (a through g) will light up

Introduction:

First of all the aim of this project has requested from us to design the car park digital controller circuit for five and make structure for that as a practical design in the lab.

From the other hand we have done the whole thing in two parts Car Park Controller systeme.

The second part is hardware work, which we have used materials, some components to build this system and make it real project, and we have completed everything with tested it in the lab, and it is working properly with all objective procedure.

In this assignment we have to design a car parking system present current smart parking technology. This project is presented to show how many cars are inside this car parking and how many car parks still empty using seven segment indicators

lly useful for our life, which we can use it at every place need for parking the car.

we will draw a simple diagram for the project to show how the structure of the car park operation.

.

COUNTER

7-SEGMENT

DRIVER

METHODOLOGY

Flow of Process For Car Park Digital Controller.

STATE DIAGRAM

(000-101)

PRESENT STATE TABLE

NEXT STATE TABLE FOR

Y=1(UP)

NEXT STATE TABLE FOR Y=0(DOWN)

TRANSITION TABLE

KARNAUGH MAP

DESIGN CIRCUIT

SIMULATE THE CIRCUIT

INSTALL COMPONENT

ON BREADBOARD

EQUIPMENTS/COMPONENTS

Logic gates

AND Gate (7408)

NOT Gate (7404)

OR Gate (7432)

J-K flip- flop (7476)

7 Segments Toggle Switch

RESULT AND DISCUSSION

State Diagram

NEXT STATEPRESENT STATE Y=0(DOWN) Y=1(UP)Q2 Q1 Q0 Q2 Q1 Q0 Q2 Q1 Q0

0 0 0 1 0 1 0 0 10 0 1 0 0 0 0 1 00 1 0 0 0 1 0 1 10 1 1 0 1 0 1 0 01 0 0 0 1 1 1 0 1

OUTPUT TRANSITION FLIP-FLOP INPUTSQN QN+1 J K0 0 0 X0 1 1 X1 0 X 11 1 X 0

KARNAUGH MAP

oo 11

oo 1 0 0

0 0 1

11 X X X

X X X

QoY

Q2Q1 o1

o1

1o

oo 11

oo 0 0 1

X X X

11 X X X

1 0 0

QoY

Q2Q1 o1

o1

1o

J2 = Q1 QO Y + Q1 QO Y J1 = Q2 QO Y + Q2 QO Y

oo 11

oo X X XX X X

11 X X X

1 0 1

QoY

Q2Q1 o1

o1

1o

oo 11

oo X X X1 0 1

11 X X X

X X X

QoY

Q2Q1 o1

o1

1o

K2 = QO Y + QO Y K1 = QO Y + QO Y

oo 11

oo 1 1 X1 1 X

11 X X X

1 1 X

QoY

Q2Q1 o1

o1

1o

oo 11

oo X X 1X X 1

11 X X X

X X 1

QoY

Q2Q1 o1

o1

1o

J0 = 1 K0 = 1

7 SEGMENT

a b c d e f g0 1 1 1 1 1 1 01 0 1 1 0 0 0 02 1 1 0 1 1 0 13 1 1 1 1 0 0 14 0 1 1 0 0 1 15 1 0 1 1 0 1 1

a=CA+B+CA b=C+A

AB

DC oo 11

oo 1 1 1 1o1 1o

AB

DC oo 11

oo 1 0 1 1o1 1o

C=B+A d=CA+B+CA

e=CA f=C+AB

g=B+C

AB

DC oo 11

oo 1 0 1 1

o1 1oAB

DC oo 11

oo 1 1 1 0

o1 1o

AB

DC oo 11

oo 1 0 0 1o1 1o

AB

DC oo 11

oo 1 0 0 0o1 1o

AB

DC oo 11

oo 0 0 1 1o1 1o

DESCUSSION:.We have to connect the up counter with down counter we will get a counter can count up from zero to five and down from five to zero and we can control them using to two switches . Switch A can count up from zero to five and switch B can count down from five to zero. Most electronic devices begin on the basic level that was started on in this project. That is, the designing using truth tables and Karnaugh maps. For an example of a truth table, . Note that these are just representations in binary of what needs to be designed. For the seven segments being designed and built in this project, the basis for the given binary numbers is that the seven segment display in active and low. This means that when the input to each segment is low (zero), that segment will light up.During we are testing the projects component we have seen that some errors happened .this errors happened out of our controlling because of some reasons such as the building of this circuit was too complicated because we used alts of gates, the connection maybe short or something wrong happened and the board connections….therefore we work in this project as a team to make it work properly ,,and we have checked out many times to identified the errors and we couldn’t reach to any error as a result or how we can prove our reasons you can see the real picture for the circuit as we have shown you in the lab.

Conclusion:

In this project was successfully designed and implemented, in which the small components are built first, and then added to a larger component until the design is complete. This worked quite well since each component designed could be tested before making the top-level design, which covered all the components.

The design began with the lowest level of design, that is, the truth table. It was arranged into the popular Karnaugh map format, allowing for reduction and minimization. From the maps, the expressions needed for the design were carefully derived and used for the decoder schematic. This step is crucial since one small error could largely affect the output.The finished seven-segment display is very useful for displaying alpha-numeric characters and can be found in many electronic devices such as calculators, cell phones, and watches.

The references: http://www.hobbyprojects.com/digital_circuits/

7490_decade_counter.html

http://www2.hawaii.edu/~jrand/ElectricalEngineering/9%20-%207-Seg%20Display/index.html

DIGITAL FUNDANETALS FLOYED , EIGHT EDITION

H ttp://www.allaboutcircuits.com/vol_4/chpt_11/3.html