continuous-time systems · j. roychowdhury, university of california at berkeley slide 1 bluetooth...
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J. Roychowdhury, University of California at Berkeley Slide 1
Bluetooth chip (Cambridge Silicon)
Continuous-Time Systems
● Continuous time waveforms● “Analog”
● Low-freq. Continuous-time➔ IC design community (opamps)
● “RF”● High-freq./speed continuous time
➔ Radio design community➔ today: analog ~= RF
● “Mixed-signal”● Digital + analog/RF
➔ tight interaction● “Mixed-domain”
● includes non-electronic➔ eg: mech., optical
J. Roychowdhury, University of California at Berkeley Slide 2
Applications beyond ICs
● Mechanical● Optical● Energy● Nanodevices● Biology
Intracellular reactions
Biological systems
Energy-efficient buildings
NEMS switch
MEMS disc resonator
Si-InP bulk-process laser Spin-torque devices Carbon nanotubes
Internal combustion engine
Energy grids
Energy sources
Integrated photonic demuxPhotonic interconnect
Drug design (CADD)
J. Roychowdhury, University of California at Berkeley Slide 3
Continuous-Time Analysis Fundamentals
● Modelling: nonlinear differential equations●
● Solving nonlinear equations numerically● Solving linear matrix equations numerically● Solving differential equations numerically● Linearization● Frequency-domain concepts
● Linear differential equations: steady states● Analysing the effects of variability
● Sensitivities● Noise: modelling and analysis
J. Roychowdhury, University of California at Berkeley Slide 4
Analog Effects in Digital Electronics
2-input NAND2-input NAND
Timing/DelayCorrectness
Interference/Noise
J. Roychowdhury, University of California at Berkeley Slide 5
Noise and Variability
Impact of device variability (Intel: Shekhar Borkar)
Spread of parameters – showing correlation
Oxide thicknesses: O(10) atomsGeometrical variability
White noise (time domain) – ubiquitous in devices
RTS noise (freq. domain)
Time-varying RTS noise (discrete-continuous)
Noise/variability areof crucial importance forboth analog and digital
Mechanism similar tobiological reactions(inherently stochastic)
J. Roychowdhury, University of California at Berkeley Slide 6
Analog Issues in Digital (contd.)● analog issues becoming show-stoppers
● analog problems have proliferated➔ clean boolean abstractions much less relevant to actual
implementations➔ contributing to Moore's law slowdown
● analog/mixed-signal➔ key focus at Intel➔ (show Top's slides)
J. Roychowdhury, University of California at Berkeley Slide 7
Start: High-Level System Concept
Credits: Karim Chabrak.
Idealized representations: proof of concept simulation/verification
● System design starts from simplifications/abstractions
J. Roychowdhury, University of California at Berkeley Slide 8
Top-Down Design Refinement
Credits: Karim Chabrak.
Transceiver block for UMTS
Phase Detector
Lowpass Filter VCO
Frequency Divider
Reference
Manual (skilled) design process: little/no automated synthesis
J. Roychowdhury, University of California at Berkeley Slide 9
Circuit-Level Design (Analog/MS)
● choose (or invent) ckt topology● design loop:
● choose parameters ...➔ W, L, res/cap values, placement, supplies, ...
● model and simulate● check simulated performances against desired
➔ eg: gain, distortion/IM, CMRR, phase margin (stability), lock range, jitter/SNR/BER, delay, read/write access times, yield, …
● performances met? exit loop● not met? change parameters, retry● too many tries and no success?
➔ try other topologies➔ relax desired specs; retry (change system at higher levels to compensate)
● simulation time: #1 designer complaint● some circuits (eg, PLLs) take so long that designs fab without
adequate simulation➔ high numbers of chip failures after fab (3-5 respins)
skilled manual process
specialized optimizers (occasionally)
100s-1000s of runs typical: DC, transient, AC, noise, sensitivity, HB, ...
most time-consuming step
J. Roychowdhury, University of California at Berkeley Slide 10
Bottom Up Validation
Phase Detector
Lowpass Filter VCO
Frequency Divider
Reference
placeme nt/layou t +
extractio n
loop: simulate +
redesign extracte d ckt
loop: simulate system, validate
operation, redesign
Credits: Karim Chabrak.
Transceiver block for UMTS
embed in system
J. Roychowdhury, University of California at Berkeley Slide 11
Credits: Karim Chabrak.
Credits: Karim Chabrak.
Abstraction-Based Verification
Phase Detector
Lowpass Filter VCO
Frequency Divider
Reference
12 3 4 5 6
Lowlevel models
use simplerhigherlevel
model
Accurate? Consistent?
too expensive: impractical
J. Roychowdhury, University of California at Berkeley Slide 12
“The Gap”
EE Times
“The primary problem hindering the change to analog top-down design and bottom-up verification has been the lack of tool support for the design process between system-level specification and transistor-level implementation, as well as between transistor implementation and chip fabrication. These missing tools are commonly referred to as The Gap."
- EE Times, 2001
J. Roychowdhury, University of California at Berkeley Slide 13
EE Times on “The Gap”: continued
“At this point, you may wonder why you should bother with behavioral libraries and calibration. Why not just submit the transistor-level design to some smart software and let it come up with a model? Unfortunately, despite some claims to the contrary, practical model synthesis is still a long way off. Attempts at this technology rely on pre-existing templates, which are unlikely to exist for leading-edge or proprietary designs. There's no pushbutton approach to analog modeling, and from all indications, this will remain the case for some time to come.” - EE Times, 2001
J. Roychowdhury, University of California at Berkeley Slide 14
Mixed-Signal/Domain Design Today
● many re-spins: the norm
McCorquodale et al, U of Michigan
Va lida tio
nD
esi
gn
J. Roychowdhury, University of California at Berkeley Slide 15
System Verification Flow: the Future
McCorquodale et al, U of Michigan
Design
Va
lidat
ion
Automated abstractionneeded to generatehigher-level models
J. Roychowdhury, University of California at Berkeley Slide 16
Goal: Automated Macromodelling
Low-level model(detailed, big)
Higher-levelmodel
(consistent,simpler, smaller)
Macromodelling
Automate!
Computational AlgorithmsComputational Algorithms
Pushbuttongeneration (fast)
Consistency/Fidelity
Accuracy vs Sizetradeoffs