control code device function connector * see … · x.xxx +-0.005 x.xx +-0.010 master project...
TRANSCRIPT
AS PER ECR-070284
AS PER ECR-068314
NOV-2016
NOV-2016
NOV-2016
NOV-2016
SEP-2017 M. BANCISORC
NOV-2016
A
B M. BANCISOR
M. BANCISORINITIAL RELEASE
NOV-2016
NOV-2016
1 18
<User Define><User Define><User Define>
: Pitch-pitch StyleVendor StylePACKAGE : N/A-lead N/A N/A-family
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
no_template
CCodeID1:1
02_042233TBD
N/A
R. AMARILLE
N/A
M . JOSE
G. CELEDONIO
M. BANCISOR
N/A
R. AMARILLE
N/A
N/A
REV
2REVISIONS
1
OWNED OR CONTROLLED BY ANALOG DEVICES.THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTSPURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES. JP#USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER
8
CONNECTORFUNCTIONCODE DEVICE
2
2
6JUMPER TABLE
4
7
5
A
3
DATE APPROVED
D
B
DESCRIPTION
34
OFFON
5
57
OEM PART# HANDLER
6
C
B
8
SOCKET OEMBK/BD SPEC.P.O SPEC.
A
1
RELAY CONTROL CHART
3 14
C
NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, ORTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS
CHECKER
DESIGNER
PTD ENGINEER
TEST ENGINEER
DECIMALS
X.XXX +-0.005X.XX +-0.010
MASTER PROJECT TEMPLATE
TOLERANCES
+-1/32FRACTIONS
+-2SIZE
DDDD
SCHEMATIC
DRAWING NO.
SCALE CODE ID NO.
SHEET OF
REV.
DA A
ENV C
L GSE
ODATE
ANGLES
UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES
TESTER TEMPLATE
TEMPLATE ENGINEER
HARDWARE SERVICES
HARDWARE SYSTEMS
COMPONENT ENGINEER
TEST PROCESS
HARDWARE RELEASE
* SEE ASSEMBLY INSTRUCTIONS
CONTROL
D
ALTERNATE P/N
961230-5604-AR
2 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
220
220
220TSW-115-08-F-D-RA
220
220
220
220
220
220
220
220
220220
220
220
220
220
220
DB3S406F0LDB3S406F0L
RT10
TP5
TP6
TP7
P1 P1
D19D18D17D16D15D14D13D12D11
RT12
RT11
RT13
RT15
RT14
RT16
RT17
RT18
D10D9
RT1
RT3
RT2
D8D7
RT4
RT6
RT5
RT7
RT8
RT9
D6D5D4D3D2
OUT_AWG2 OUT_AWG1
3V3_D_LA3V3_D_LA
DIO_6
DIO_7
DIO_0
DIO_2
DIO_3
DIO_4
DIO_10
DIO_12
DIO_14
DIO_11
DIO_15
DIO_5
DIO_1
TRIG_1
IN_SC2_N
IN_SC1_P
SUPPLY_NEG SUPPLY_POS
IN_SC2_P
IN_SC1_N
DIO_9
TRIG_2
DIO_8
DIO_13
1
1
1
2927252321191715131197531
30282624222018161412108642
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
12
3
GND
GND
GND
GND
GNDGND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
LDO NOT USED
ADC/DAC AD9963
TX CM = 0
3 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
22
22
10K
AD9963BCPZ
0.1UF10K
0.01
UF
DNI
0.01
UF
4.7U
F
22
22
10K
10K
0.22UF
820PF
0.1U
F
0.068UF
4.7U
F
0.01
UF
0.1U
F
DNI 0.1U
F
22
0.01
UF
0.01
UF
1UF
0.1U
F
4.7U
F
22
0.1U
F
0.01
UF
0.1U
F
4.7U
F600MA
220OHM
22
22
22
2222
22
22
2222
2222
22
2222
22
0.1U
F
0.1UF
0.01
UF
0.01
UF
4.7U
F4.
7UF
22
1UF
0.01
UF
22
0.1U
F
0.1U
F
0.1U
F
0.1U
F
0.01
UF
0.1U
F
0.01
UF
0.01
UF220OHM
0.01
UF
22
22
22
DNI
4.7U
F
1UF
0.1U
F
0
22
2222
1UF
1UF
R3
R4
R114R113
C66C62
R173
C30
R170R169R168R167
R14
C63C64
R15
C21
C35
R179R180R181R182
C42 C60C27
U2
R13
C37
C41
C32
C20
C7
R76
R172R171
E2
E3
R110R111R109R112
R177
R183R184R185R186R187R188
R176
R175R174
C57
C65
C48C43C38
C34
C33
R178
C28
C39 C45 C50 C58
C61C53
C54C29
C44
C22 C26 C40 C59C55C51C46
C25
C49C31 C36
TXD_5
RXD_9
DAC_USR_POW_NEG_9963VIN
RX_CLK
MASTER_CLK_P
MASTER_CLK_N
TXD_10
TXD_11
ADC_SC1_P
TXD_0
TXD_1
TXD_2
TXD_4
TX_CLK
RXD_7
RXD_6
RXD_5
1V8_A_2
DAC_USR_POW_POS_9963
SUPPLY_NEG_MONITOR
SUPPLY_POS_MONITOR
REF_1V0_AWG
RXD_0
RXD_1
RXD_10
RXD_11
RXIQ
DAC_AVG1_N
DAC_AVG1_P
DAC_AVG2_P
DAC_AVG2_N
TXIQ
ADC_SC1_N
3V3_A_1
1V8_D
1V8_A_1
3V3_A_1
RXD_8
3V3_D_1
1V8_A_1
3V3_D_1
RXCML
RXD_4
3V3_A_1
ADC_SC2_N
TXD_6
TXD_8
1V8_A_1
RXD_2
SDIO
1V8_D_1
3V3_D_1
TXD_9
AD9963_CSN
SCLK
AD9963_RESETN
ADC_SC2_P
1V8_A_2
1V8_D_1
TXD_7
3V3_A
RXD_3TXD_33V3_D
1V8_D
41 23
55
53
64PA
D3411
6368
54
6272
7170
5857
76
26
48
46
49
56
51 52 6133 671
1
69
2
17
19
20
1415
98 10
5
1213
43
16
18
36
323130292827
2524
22
37
47
454443
4039
6665
3859
2
2
21
1
35
50
60
42
PAD
AUXIN1
AUXIO2AUXIO3
DAC12ADAC12B
TXVD
D
TXINTXIP
TXG
ND
REFIOTXCML
TXVD
D
TXQPTXQN
CLK33VCLKPCLKN
CLK18VDLLFILTDLL18V
DVDD
18DR
VDD
TXD0TXD1TXD2TXD3TXD4TXD5TXD6TXD7TXD8TXD9TXD10TXD11
TXIQ/TXNRXTXCLK
TRXCLK
TRXIQ
DGND
DRVD
D
TRXD0TRXD1TRXD2TRXD3TRXD4TRXD5TRXD6TRXD7TRXD8TRXD9
TRXD10TRXD11
DRVD
D
DGND
SDIOCS_NSCLKRESET_NLDO_EN
RXIPRXIN
RXG
ND
RXCMLRX18VF
RX33V
RX18VRXBIAS
RXG
ND
RXQNRXQP
AUXADCREF
AUX3
3V
GND
GNDGNDGND
GNDGNDGNDGNDGNDGND
GND
GND
GNDGND
GNDGND
GNDGND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
50 V P-P
SWITCHES SHOWN FOR LOGIC 1
OFFSET GAIN = 1
+25 V
-25 V
GAIN = 1
GAIN = 1
DIFF GAIN = 1.3
IN OUT-0.5 -> 0.5 => -0.65 -> 0.65
4 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
1PF
DNI5-20PF
1PF0.001UF
3PF
3PF
DNI
200K
21K0.001UF
5-20PF
82PF
820K
82PF
ADG612YRUZ
21K
200KADG612YRUZ
ADG611YRUZ
33PF
0.1UF
1UF0.01UF
0.01UF0.1UF
0.1UF 0.01UF1UF 0.1UFADG611YRUZ
1UF0.01UF
1UF
AD8066ARZ
100PF
150PF
ADA4940-2ACPZ
AD8066ARZ
33PF
0.1UF
10K
4.99K
ADG1404YCPZ
3.9K
1PF
1PF
3K 3.9K
DB3S406F0L
100
3.9K
1PF
ADG612YRUZ
DB3S406F0L
0.1UF0.1UF0.1UF
0.01UF
0.01UF
0.01UF
0.01UF1UF1UF
1UF1UF
150PF
1PF
3.9K3K
33
4.99K
10PF
ADG611YRUZ
ADG612YRUZ
100PF
100
ADG612YRUZ
4.99K
0.1UF
4.99
4.99
ADA4940-2ACPZ
11.3K
11.3K
4.99K
ADA4940-2ACPZ
0.01UF
0.01UF
0.01UF0.1UF0.1UF
0.01UF0.1UF0.1UF0.1UF0.1UF
1UF10UF
1UF10UF
0.1UF
DNI
DNI
DNI
DNI
10K
820K
C185
C336
C189
C77
C181
R18C74
C69
R17
C76
C71
R21
R20
C75 R19
A4
A4
C332
C102C100C98
C331
C90
C335C333 C334
C93C91
C106
C330
C85
A3
C72
C122
C113
A3
R25
C92
U8
R30
A4
C87
R26
R29
C121
R38
R22
C103
R27 R35
C123
A4
D21D20
A2
C79C68 C86C82C78C70 C84C83C80C67 C81
C89
C104
R31
R33
R34
R36
A4
C73
C88
A2
A2
R39
R23
U3
R37U3
R40
R32
R28
R16
U3
C120
C117C115C111C109
C118C116C114C112C110
C105
C108
C119C107
R24
EN_SC1_LG EN_SC1_CAL2
EN_SC1_HG
CALIB_REFERENCE1
OUT_AWG1_CALIB
EN_SC1_LG
EN_SC1_HG
IN_SC1_P
CALIB_REFERENCE2
-5V0_SC_A
6V0_SC_A
-5V0_SC_A
-5V0_SC_A
-6V0_SC_A
EN_SC_CAL1
SC_PD
6V0_SC_A
4V0_A
-6V0_SC_A
MUX_EN
SC_CAL_MUX0
SC_CAL_MUX1
4V0_A
4V0_A
ADC_SC1_P
OFFSET_SC1
6V0_SC_A 6V0_SC_A
-6V0_SC_A-6V0_SC_A
IN_SC1_N
ADC_SC1_N
RXCML
1V8_A_1
SC_PD
REF_SC1
-3V3_SC_A
3V3_SC_A
2
11
2
1
1
6
2
7
3
1
10
22
12
34
5
6
7 8
910
11
1213
1415
16
PAD
5
8
7
1
4
8
18
5
13
4
2
3
8
68
32
1
32
5
13
4
1
4
9
15
16
14 6
8
7
2
1
3
14 11
135
76
20 17
19
2
23
124
12
PAD1615
109
21
43
V+
V-OUT
INV
NINV
V+
V-OUT
INV
NINV
G-
+
DECODER1 OF 4
PAD
EN
A0A1
NC GND
VDD
S3S4
NCNC
D
NC
S2S1
NC VSS
PAD
-VS2
-VS2
+VS2
+VS2
-VS1
-VS1
+VS1
+VS1
DISABLE_N VOCM
+OUT-OUT
+FB
-FB
-IN+IN
DISABLE_N VOCM
+OUT-OUT
+FB
-FB
-IN+IN
GND
GND
GNDGND
GND
GND GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
GND
GND
GND
G-
+
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
SCOPE ADC DRIVERS ENABLE
50 V P-P
-25 V
+25 V
GAIN = 1
RXCM?????
DIFF GAIN = 1.3
SWITCHES SHOWN FOR LOGIC 1
ADG1404
IN OUT-0.5 -> 0.5 => -0.65 -> 0.65
OFFSET GAIN = 1
GAIN = 1
5 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
5-20PF
1PF
1PF
DNI
ADG612YRUZ
3.9K
IRLML5103TRPBF
20K
0.1UF
ADG1404YCPZ
ADG612YRUZ
ADG611YRUZ
10K
4.99K
100PF
3K
1PF
1UF
10K
ADA4940-2ACPZ
4.99K
ADG611YRUZ
33PF
33PF
0.1UF 0.01UF 0.01UF
ADA4940-2ACPZ
DNI
DNI
DNI
0.1UF
0.1UF
10UF 0.1UF
0.1UF
0.1UF
0.01UF 0.01UF
33
ADA4940-2ACPZ
1PF
4.99K
DB3S406F0L
ADG612YRUZ
820K
DB3S406F0L
0.1UF 0.1UF0.01UF
0.01UF
10PF
1PF
1PF
1UF 1UF
150PF
100PF
82PF 200K
21K
100
11.3K
100
4.99
3.9K
3.9K
3K
4.99
4.99K
820K
3.9KADG612YRUZ
1UF0.1UF 0.01UF
0.01UF0.1UF1UF
1UF0.01UF 0.1UF10UF 1UF
DNI
0.1UF0.1UF
10K
150PF
AD8066ARZ
11.3K
AD8066ARZ
1UF
0.01UF
21K
200K
ADG612YRUZ
82PF
5-20PFDNI
0.001UF
0.001UF
3PF
3PF
C338
C340
C128
C126
Q3
R131
C169
U9
C143
A2
A1
C154
R47
C162
R42C95
R44C132
R51
R59
C129
U4C164
R57
C171
C166C156
C155 C161C157
C158 C160
C165 C167
C168 C170
A5
R54
C146
C130R61
U4
R58
U4
A1
A1
A1
R41
A1
D23
C125 C136C127 C135
C173
C174
C172
C124 C137
C147
C145
R43
R60
R63
R64
R62
R65
R66
R55
R52
R49
D22
R48
A2
R53
C141
C148C140C139C138
C149 C150
C153C151
C152C142 C159
A5
R50
C163
R56
C144
R46
R45
C134
C131
C337
C339
EN_SC
-3V3_SC_A
SC_PD
IN_SC2_P
CALIB_REFERENCE2
6V0_SC_A
MUX_EN
SC_CAL_MUX1
-6V0_SC_A
SC_CAL_MUX0
SC_PD
-3V3_SC_A
EN_SC_CAL1
3V3_SC_A
4V0_A
4V0_A
1V8_A_1
REF_SC2
EN_SC2_HG
IN_SC2_N
EN_SC2_LG
RXCML
EN_SC2_HG
ADC_SC2_N
ADC_SC2_P
6V0_SC_A-6V0_SC_A
EN_SC2_LG
-6V0_SC_A
6V0_SC_A
4V0_A
-5V0_SC_A
SC_PD
-5V0_SC_A OFFSET_SC2
EN_SC2_CAL2
-5V0_SC_A
CALIB_REFERENCE1
OUT_AWG2_CALIB
3V3_SC_A
1
2
2
1
9 10
PAD 1213875
14
1
16
15
11
109
643
2
1
14
6
14 118
PAD16152221
43
1
8
17
1819
2
23
1
12135
6
5
13
4
15
16
10
9
11
8
6
2
57
8
4
32
1
2
3
43
21
9
10
14
3
11
15
20
7
24
16
7
G-
+
V+
V-OUT
INV
NINV
V+
V-OUT
INV
NINV
GND
SG
D
DECODER1 OF 4
PAD
EN
A0A1
NC GND
VDD
S3S4
NCNC
D
NC
S2S1
NC VSS
PAD
-VS2
-VS2
+VS2
+VS2
-VS1
-VS1
+VS1
+VS1
DISABLE_N VOCM
+OUT-OUT
+FB
-FB
-IN+IN
DISABLE_N VOCM
+OUT-OUT
+FB
-FB
-IN+IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
SIGNAL GAIN = -11
IN OUT-0.496 -> 0.496 => 5.456 -> -5.456
-0.124 -> 0.124 => 1.364 -> -1.364
REF GAIN = -4.583
OFFSET GAIN = 9.075
IN OUT
0 -> 1.2 => -5.5 -> 5.5
GAIN + OFFSET
1206
4MA FS => -0.496 -> 0.496
AWG FRONT END
AD8067 DECOUPLING
1MA FS => -0.124 -> 0.124
IN OUT
AD8067 DECOUPLING
CURRENT->VOLTAGE
CURRENT->VOLTAGE
1206
GAIN + OFFSET
6 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
BSS123LT1GDNI
BSS123LT1GDNI
1K
20K
20K
100
3K
DNI
1K
0
0DNI
11K
11K
124
124
124
10UF
10UF
3.9PF
3.9PF1PF
DNI
DNI
1UF
1UF
1UF1UF
1UF4.7UF
4.7UF4.7UF
3.9PF
3.9PF
0.01UF0.01UF
0.01UF0.01UF
0.01UF0.1UF
0.1UF
0.1UF
0.1UF0.1UF
0.1UF
0.1UF
0.1UF
AD8058ARZ
AD8058ARZ
AD8058ARZ
8.06K
3.9PF
0.01UF
8.06K
49.9
4.7UF 1UF
AD8000YCPZ-R2
2.21K
AD8000YCPZ-R2
124
10K
10K
1PF
2.21K
1.47K 4.7UF
49.9
DNI470
4.7UF
470
3.9PF
1.47K
100
3K
R199
R198
R200
R100
R99
R104
C250
R98
R97
R194
R95
R93
R94
C243
C242
C252
C245
C244
C263
C262
C273
C272C270
C271C259
C248
C249
C269 C277
C268C253
C254C275
C274
C265C251
C246
C247
Q8
A7
A10
A10
A10
R107
R135
Q9
R197
R96
C257R193
R134
C264 C276
A9
C258
C255
R201
R202
R108
C261R106
R133
C267
R103
C260
C256
R101
R105
R132
C266
R102
6V0_AWG_A
EN_AWG2
AWG1_PD
-6V0_AWG_A
DAC_AVG1_N
OFFSET_AWG1
3V3_AWG_A
-6V0_AWG_A-6V0_AWG_A
DAC_AVG2_N
DAC_AVG2_P
DAC_AVG1_P
-3V3_AWG_A
OUT_AWG1_CALIB
AWG1_PD
6V0_AWG_A
REF_AWG1
6V0_AWG_A
OUT_AWG2
6V0_AWG_A
OUT_AWG1
OUT_AWG2_CALIB
6V0_AWG_A
AWG2_PD
EN_AWG1
-6V0_AWG_A
6V0_AWG_A
AWG2_PD
REF_AWG2
OFFSET_AWG2
1
2
PAD
3
2
1
3
3
8
74
3 2
75
6
4
8
13
2
1
28
15
47
PAD
5
V-
V+
GND
GND
GNDGND
GNDGND
GND
GNDGND
GND
GND
GND
GND GND
GNDGND
GND
GND
GND
PD
FB
V-
V+OUT
PD
FB
V-
V+OUT
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
REFERENCES AND OFFSET
GAIN = 1
1.2VSCOPE CALIBRATION VOLTAGES
SCOPE REFERENCE
0 -> 1.2 => 0 -> 3.23IN OUT
SIGNAL GAIN = 2.693
461.538MV 239.044MV
ADA4051 DECOUPLING
SCOPE OFFSET
ADA4051 DECOUPLING
DAC REFERENCE
SIGNAL GAIN = 1.333
IN OUT1.2 => 1.6
AWG REFERENCE
7 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
AD8657ACPZ
AD8657ACPZ
AD8657ACPZ
AD8657ACPZ
100
10K
AD8657ACPZ
4.7UF
1.47K
0.1UF 10K
10K
DNI
10K
10K
3.9K
0
0
1.3K
1.3K
2.49K
00
DNI
1K 1K
1.6K
10UF
4.7UF
4.7UF
4.7UF
1UF
1UF
0.01UF0.01UF
0.1UF
0.1UF
0.1UF0.1UF
0.1UF
0.1UF0.1UF
AD5627BRMZ
ADR3412ARJZ
ADR3412ARJZ
AD8657ACPZ
AD5625BRUZ
0.1UF
4.7UF
2.49K
1.47K
DNI
4.02K
0.1UF
DNI
3.9K
AD8657ACPZ
AD8657ACPZ
0.01UF0.1UFAD8657ACPZ
1.47K
1.47K
2K
10K
DNI
10UF0.1UF
0.1UF
AD8657ACPZ
0.1UF
10K
OFF_SC2OFF_SC1
R143
R151
R141
C94
R118R117
C56
A11
C296
C97
R140
R120
R144
R142
R116
C293
R150
R125
R126
R127
R153R152
R82
R79 R81
C291
C289
C303
C304
C284
C285
C301C295C290
C220C219
C300C288
C287
C286 C292
C299
A13
A6
A8
A6
A13A6
U11
U20
U18
U19
R80
R128R124
R123
R122
C305
C302
R121
A8
C294 A8
R119
R115
A13
C96
OFFSET_SC2
REF_1V0_AWG
3V3_D
SDA
3V3_D
REF_1V2
SDA
SCL
3V3_D
REF_1V2
SCL
REF_SC1
REF_1V2
DAC_USR_POW_POS
REF_1V2_SCREF_1V2_SC
REF_1V2_SC
OFFSET_SC1
REF_1V2
3V3_A
3V3_A
6V0_SC_A
6V0_SC_A 6V0_AWG_A
CALIB_REFERENCE1 CALIB_REFERENCE2
DAC_OFFSET_SC1
DAC_OFFSET_SC2
REF_SC2
REF_AWG2
REF_1V2
REF_AWG1
DAC_USR_POW_NEG
REF_1V2_SC
3V3_D
3V3_D
DAC_USR_POW_NEG_9963
DAC_USR_POW_POS_9963
OFFSET_AWG1
3V3_D
OFFSET_AWG2
DAC_OFFSET_SC1
DAC_OFFSET_SC2
7
1 1
2
76
5
13
10
5
6
2
3
5
12
3
76
12
3
4
8
PAD4
8
PAD4
8
PAD
7
10
11141
12
9
2
19
87
3
6
564
1
3
564
21
3
6
75
4
86
2
3
5
1 5
4
GND
GND
GND
GND
+IN
-INOUT
GNDGNDGNDGNDGNDGND
GNDGNDGNDGND
GND
GNDGND
GNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGND
+IN
-INOUT
+IN
-INOUT
+IN
-INOUT
+IN
-INOUT
+IN
-INOUT
+IN
-INOUT
PAD
V+
V-PAD
V+
V-PAD
V+
V-
SCLSDA
GND
VOUTB
VOUTDCLR_N
ADDR2
VREF
POR
VOUTC
VOUTA
VDD
ADDR1
LDAC_N
VREFINVDD
SDASCLADDR
CLR_NLDAC_N
GND
VOUTB
VOUTA
GND GNDGND
GND
GND
GND
GND
GND GND GND
VOUT_FORCEVOUT_SENSE
VINENABLE
GND_SENSEGND_FORCE
GND
GND
VOUT_FORCEVOUT_SENSE
VINENABLE
GND_SENSEGND_FORCE
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
TURNS THE DEVICE OFF
PIN TO >1 V BELOW MIDSUPPLY
PULLING THE SHUTDOWN
G=-1/2
0 -> 1 => 0 -> -5.1
USER POWER SUPPLIES
G=-5.1
ADA4805 DECOUPLINGADA4805 DECOUPLING
G=-1/2
IN OUT
G=5.02
IN OUT0 -> 1 => 0 -> 5.02
8 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
0.018UF
ADA4805-1AKSZ
1UF
DNI
1UF
SMBJ5340B-TP
DNI
SMBJ5340B-TP 1UF1UF
ADA4805-1AKSZ
IRLML5103TRPBF
1UF0.1UF
4.7UF
4.02K
0.01UF
1UF4.7UF
AD8657ACPZ
0.01UF 0.1UF4.7UF 1UF
0.01UF0.1UF
0.01UF4.7UF 1UF 0.1UF
0.018UF
1K 4.02K
1K
0.01UF
0.1UF 0.01UF
4.02K
2K
0.1UF
4.02K
AD8657ACPZ
20K
IRLML5103TRPBF
20K
5.1K
4.7
4.7
D26C179
C308
C175
R163
C297
R138
R137
C298C282
C216C133C24
C309
A11C306
A14
C14 C202C314 C322C316 C318
C323C319C317C315 C283
C47
R160
R136
C307
R139A11
R158 R161
C201
Q5
R129
Q4
R147
R159
C200
A12
D1
R162
ENABLE_POW_NEG
ENABLE_POW_POS
-3V3_A
-3V3_A
6V0_USR_A
SUPPLY_POS
3V3_A
DAC_USR_POW_NEG
-6V0_USR_A
SUPPLY_POS_MONITOR
3V3_A
SUPPLY_NEG_MONITOR
3V3_A
6V0_USR_A
ENABLE_POW_NEGEN_USR_POW_NEG
-6V0_USR_A
EN_USR_POW_POS
-3V3_A
-6V0_USR_A
DAC_USR_POW_POS
SUPPLY_NEG
SUPPLY_NEG
ENABLE_POW_POS
-3V3_A
SUPPLY_POS
PAD
8
4
6
25
4
31
3
21
GND
GND
GND
GND
GND
GND
GND
GND
SG
D
SG
D
GND
+IN
-INOUT
PAD
V+
V-
GND
GND
GNDGND
GND
+VS
-VSDIS_N
-IN
+INVOUT
+VS
-VSDIS_N
-IN
+INVOUT
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
CLOCKING
100MHZ
9 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
4.7K
12PF8.25K 4.7PF
22K
220PF
470
20MHZ1000PF
270NH
0.01UF
ADF4360-9BCPZ
0.1UF
10UF
100PF
470
0.01UF
0.01UF0.01UF0.01UF0.1UF0.1UF
270NH
220NH220NH
0.1UF
100PF
1UF
10UF
R85
R6C223C239
C238
R83
C230
C225
R84R86
C224
C226
C236
C228 C235C234C233C231
L16L15
U14
L13
C229
C237
C232
Y1C52
L14
C227
20MHZ_REFCLK
VTUNE
20MHZ_REFCLK
3V3_CLK_A
SCLK
LOOP_FILT
ADF4360_LD
ADF4360_CS
SDIO
MASTER_CLK_P
3V3_CLK_A3V3_CLK_A
MASTER_CLK_NVTUNE
3V3_CLK_A
LOOP_FILT
16
11 22
PAD1
4
3
1 2
6
7
13
54
19
2321
20
15
18 24
14
17
12
2
83
109
GND
GND
VCC
OUTPUTGNDNC
GND
PAD
CP
LD
AGND
DVDD
DIVOUT
LEDATACLKREFIN
DGNDCN
RSET
CC
AGND
L2L1
AGND
VTUNE
VVCO
RFOUTBRFOUTA
AGND
AVDD
CPG
ND
GNDGND GND
GND
GND GND
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
STANDBY - 1 OR OPEN: OSCILLATION
SCL
SDA
ZYNQ BANK 501
USB PHY
BANK_501
PLACE NEAR XC7Z010 (VCCO_MIO1)
10 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
XC7Z010-1CLG225C4334
1UF
0.01
UF
1UF2.2UF
10K
0.1UF
33
100UF 0.1UF4.7UF 0.47UF
8.06K
20K
0.01UF
24MEGHZUSB3320C-EZK
U511
C805C803C801
R791
R797
C792C789
R800
C788 C790 C793
R798
C807
C795
U524
Y523
PS-SRST#
PS_MIO07_500_USB_RESET_B
PS_MIO39_501_USB0_D7
PS_MIO38_501_USB0_D6
PS_MIO37_501_USB0_D5
PS_MIO36_501_USB0_CLKPS_MIO35_501_USB0_D3
PS_MIO34_501_USB0_D2
PS_MIO33_501_USB0_D1
PS_MIO32_501_USB0_D0
PS_MIO31_501_USB0_NXT
PS_MIO30_501_USB0_STP
PS_MIO29_501_USB0_DIR
PS_MIO28_501_USB0_D4
USB_OTG_CPEN
PS_MIO32_501_USB0_D0
PS_MIO37_501_USB0_D5
PS_MIO28_501_USB0_D4
PS_MIO35_501_USB0_D3
PS_MIO34_501_USB0_D2
PS_MIO33_501_USB0_D1
1V8_D
PS_MIO36_501_USB0_CLK
PS_MIO29_501_USB0_DIR
PS_MIO31_501_USB0_NXT
PS_MIO39_501_USB0_D7
PS_MIO38_501_USB0_D6
1V8_D
1V8_D
1V8_D
1V8_D
1V8_D
1V8_D
PS_MIO30_501_USB0_STP
USB_VBUS_OTG
3V3_D
PS_MIO07_500_USB_RESET_B
3V3_D
USB_OTG_P
USB_OTG_N
USB_ID
E15A13
B15
E14
C10
B13
B11
C13A12D13B12D14
C14B14A14
D15C11
C12
D11A15
4
1
25
3220 3028
2221
29
1615
27
14118
26
24
2
12
23
PAD
1819
31
1310976543
17
1
3
2
GND
GND
PINSPARE
GND
PINSPARE
PINSPARE
GND
GND_FLAG
VDDI
O
DIR
VDD1
8
STP
VDD1
8
RESETB
REFCLK
XO
RBIAS
IDVBUSVBAT
VDD3
3
DMDP
CPEN
SPK_RSPK_L
REFSEL2
DATA7
N/C
REFSEL1
DATA6DATA5
REFSEL0
DATA4DATA3DATA2DATA1DATA0
NXT
CLKOUT
PINSPARE
GNDGND
VDDSTANDBY
GNDOUTPUT
GND
VCCO
_MIO
1_50
1VC
CO_M
IO1_
501
VCCO
_MIO
1_50
1
PS_SRST_B_501
PS_MIO53_501PS_MIO52_501PS_MIO49_501PS_MIO48_501PS_MIO39_501PS_MIO38_501PS_MIO37_501PS_MIO36_501PS_MIO35_501
PS_MIO34_501PS_MIO33_501PS_MIO32_501PS_MIO31_501PS_MIO30_501PS_MIO29_501PS_MIO28_501
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
VMODE[1]
PLACE NEAR XC7Z010 (VCCO_MIO0)
ZYNQ BANK 500
BANK_500
QSPI FLASH
MIO5 MIO4
MIO5 CAN BE SHORTED TO GND BY INSERTING A JUMPER ON THE JTAG ADAPTER
0
00
QSPI
- DEBUG AS NORMAL.
- POWER UP PLUTO
1
WHEN USING THE ADAPTER, AND WANTING TO HAVE JTAG BOOT (DEVICE DOESN'T BOOT U-BOOT, OR KERNEL):
- INSERT THE JUMPER ON THE ADAPTER (JTAG BOOT)
- REMOVE THE JUMPER ON THE ADAPTER, SO YOU CAN TALK TO THE SPI FLASH
https://www.xilinx.com/support/answers/47596.html
BOOT MODE
CASCADED JTAG
11 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
XC7Z010-1CLG225C4334
33
PTS840 GKP SMTR LFS20K
20K
100UF
0.1UF
4.7UF 0.01UFDNI
20K
0.1UF
0.1UF
33.333MEGHZ
0.47UF
20K
20K
20K 20K
0
0.1UF240
20K 20K
MT25QU256ABA8E12-1SIT
U511
R581
R145
S1
C579
C596 C599
R592
Y578
C598
C588
C595 C597
R585
R593R590
R584
R587
C589
R594
R586
R583 R591
U508
1V8_D1V8_D
PWR_GD_1.35V
PS_MIO06_500_QSPI0_SCLK
PS_MIO05_500_QSPI0_IO3
PS_MIO04_500_QSPI0_IO2
PS_MIO03_500_QSPI0_IO1
PS_MIO02_500_QSPI0_IO0
USR_LED
USR_BTN
UART_RX
UART_TX
PS_MIO01_500_QSPI0_SS_B
1V8_D 1V8_D
1V8_D1V8_D
USR_BTN
1V8_D
1V8_D
1V8_D
1V8_D
PS_MIO06_500_QSPI0_SCLK
1V8_D
PS_MIO01_500_QSPI0_SS_B PS-SRST#
PS_MIO05_500_QSPI0_IO3
PS_MIO04_500_QSPI0_IO2
PS_MIO03_500_QSPI0_IO1
PS_MIO02_500_QSPI0_IO0
A10
A7 B7
D6
B6
D10
C9C7
B10
D8A5
C8A9
D9B5
C6B9
A6 D7
A8
3
4
2
1
A2 A3
A4
A5 B1
B2
B3
B4
B5 C1
C2
C3
C4
C5 D1
D2D3
D4
D5 E1 E2 E3 E4 E5
GND
VDDSTANDBY
GNDOUTPUT
GND
DNU
DNU
DNU
DNU
DNU
DNU
DQ3
DQ0DQ1
DNU
DNU
W#DQ2
DNU
S#
DNU
DNU
VCC
VSS
C
DNU
DNU
RESET#/DNU
DNU
DNU
GND
GNDGND
GND
GND
GND
GND
GND
VCCO_MIO0_500VCCO_MIO0_500
PS_POR_B_500
PS_MIO9_500PS_MIO8_500PS_MIO7_500
PS_MIO6_500PS_MIO5_500PS_MIO4_500PS_MIO3_500PS_MIO2_500
PS_MIO15_500PS_MIO14_500PS_MIO13_500PS_MIO12_500PS_MIO11_500PS_MIO10_500
PS_MIO1_500PS_MIO0_500
PS_CLK_500
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
PLACE NEAR DDR3
PLACE NEAR XC7Z010 (VCCO_DDR)
HIHI
S5
ON
VTT
S0
S3 VTTREF
ON
STATE
DDR 3
12 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
XC7Z010-1CLG225C4334
MT41K256M16TW-107:P
10K0.01UF
10K
0.01UF0.01UF
10UF10UF
10UF
0.01UF
0
0
240
80.6
240
240 1K
0.22UF
4.7UF
4.7UF
4.7UF4.7UF
0.47UF0.47UF0.47UF0.47UF
0.47UF0.47UF100UF
100UF
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
0.1UF 0.1UF0.1UF0.1UF0.1UF0.1UF
0.1UF
TPS51206DSQR
0.01UF
0.01UF
U511
R638 R640
U646
R661
C654
C616
C656
C657
U509C659
C662
R653
R642
R635
R625
R634 R636
C615
C607
C641C639
C618C617C614
C645C643C637
C600
R606R613
R605
R604
R603
R602
R612
R611
R610
R609
R624
R623
R622
R621
R619
R632
R631
R630
R629
R628
R601R608
R620R627
C626
C647 C649 C651 C652 C655 C658
C648
C660
C650
C644
C633
DDR3_WE#
DDR3_RAS#
DDR3_ODT
DDR3_RST#DDR3_DQS1_P
DDR3_DQS0_P
DDR3_DQS1_N
DDR3_DQS0_N
DDR3_DQ9
DDR3_DQ8
DDR3_DQ7
DDR3_DQ6
DDR3_DQ5
DDR3_DQ4
DDR3_DQ3
DDR3_DQ2
DDR3_DQ15
DDR3_DQ14
DDR3_DQ13
DDR3_DQ12
DDR3_DQ11
DDR3_DQ10
DDR3_DQ1
DDR3_DQ0
DDR3_DM1
DDR3_DM0
DDR3_CS#
DDR3_CK_P
DDR3_CK_N
DDR3_CKE
DDR3_CAS#
DDR3_BA2
DDR3_BA1
DDR3_BA0
DDR3_A9
DDR3_A8
DDR3_A7
DDR3_A6
DDR3_A5
DDR3_A4
DDR3_A3
DDR3_A2
DDR3_A14
DDR3_A13
DDR3_A12
DDR3_A11
DDR3_A10
DDR3_A1
DDR3_A0
DDR3_A7
DDR3_A8
DDR3_A6
DDR3_A3
DDR3_A4
DDR3_BA1
DDR3_BA2
DDR3_A0
DDR3_A14
DDR3_A13
DDR3_RST#
DDR3_A11
DDR3_A9
DDR3_A1
DDR3_A2
DDR3_A5
DDR3_A12
DDR3_BA0
DDR3_A10
DDR3_WE#
DDR3_CS#
DDR3_CKE
DDR3_CK_N
DDR3_CAS#
DDR3_ODT
DDR3_CK_P
DDR3_RAS#
DDR3_DQ5
DDR3_DQ7
DDR3_DQ4
DDR3_DQS0_N
DDR3_DQ6
DDR3_DQ3
DDR3_DQ1
DDR3_DQS0_P
DDR3_DQ2
DDR3_DM0
DDR3_DQ0
DDR3_DQ8
DDR3_DM1
DDR3_DQ10
DDR3_DQS1_P
DDR3_DQ9
DDR3_DQ11
DDR3_DQ14
DDR3_DQS1_N
DDR3_DQ12
DDR3_DQ15
DDR3_DQ13
VTTVREF
VTT_0P75
DDR3_BA1
DDR3_A14
DDR3_A4
1V35
1V35
1V35
VTT_0P75
VTTVREF
1V35
DDR3_A0
DDR3_A1
DDR3_A2
DDR3_A3
DDR3_A7
DDR3_A8
DDR3_A9
DDR3_A10
DDR3_A11
DDR3_A12
DDR3_A13
DDR3_BA0
DDR3_BA2
DDR3_WE#
DDR3_RAS#
DDR3_CAS#
DDR3_CKE
DDR3_ODT
DDR3_CS#
DDR3_CK_N
DDR3_A6
DDR3_A5
VIN
1V35
VIN
VTT_0P75
1V35
DDR3_CK_P
VTT_0P75
1V8_D
M2
P1N1M1M4P3P4P5M5P6N4J1L2
K2K1M6R1N6R5L3N2N3R2B1D3
D4A2C4C1B4A4C3A3E1D1E2E3F3G1H1H2B2F2C2G2 L4
K3R6J3H3R3
B3 E4 F1 J2 M3
R4
P2
A1
A2
A3
A7
A8
A9B1
B2
B3
B7
B8
B9C1
C2
C3
C7
C8
C9D1
D2
D3
D7
D8
D9
E1E2
E3
E7
E8
E9 F1
F2
F3
F7
F8
F9 G1
G2
G3
G7
G8
G9
H1H2
H3
H7
H8
H9
J1 J2
J3
J7
J8J9
K1
K2
K3
K7
K8
K9
L1
L2
L3
L7
L8
L9 M1
M2
M3
M7
M8
M9
N1
N2
N3
N7
N8
N9
P1
P3P7
P8
P9
R1
R2
R3
R7
R8
R9
T1
T2
T3T7
T8
T9
8PA
D4
79
10
1
2
3
6
5
VSS
A8
A14A13
RESET#
VSS
VDD
A6
A11
A9
A7
VDD
VSS
A4
A1A2
A5
VSS
VDD
BA1
A12/BC#
A0
A3
VDD
VSS
VREF
CA
NC
BA2
BA0
VSS
NC
ZQ
A10/AP
WE#
CS#
NC
CKE
VDD
CK#
CAS#
VDD
ODT
NC VSS
CK
RAS#
VSS
NC
VDDQ
DQ5
DQ7
DQ4
VDDQ
VREF
DQ
VSSQ
VSS
VDD
LDQS#
DQ6
VSSQ
VSSQ
DQ3
DQ1
LDQS
DQ2
VDDQ
VDDQ
VSSQ
LDM
DQ0
VSSQ
VSS
VDD
VSSQ
DQ8
UDM
VDDQ
VSSQ
VDDQ
DQ10
UDQS
DQ9
DQ11
VDDQ
VSSQ
DQ14
UDQS#
VSS
VDD
VSSQ
VSS
VDDQ
DQ12
DQ15
DQ13
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
PIN
SP
AR
E
PIN
SP
AR
E
PIN
SP
AR
E
PIN
SP
AR
E
PIN
SP
AR
E
GND
GNDGND
GND
GND
GND
PAD
VDD
S5
GND
S3 VTTREF
VTTSNS
PGND
VTT
VLDO
IN
VDDQSNS
GND
GND
GND
VCCO
_DDR
_502
VCCO
_DDR
_502
VCCO
_DDR
_502
VCCO
_DDR
_502
VCCO
_DDR
_502
VCCO
_DDR
_502
PS_DDR_WE_B_502PS_DDR_VRP_502PS_DDR_VRN_502
PS_DDR_RAS_B_502PS_DDR_ODT_502
PS_DDR_DRST_B_502PS_DDR_DQS_P1_502PS_DDR_DQS_P0_502PS_DDR_DQS_N1_502PS_DDR_DQS_N0_502
PS_DDR_DQ9_502PS_DDR_DQ8_502PS_DDR_DQ7_502PS_DDR_DQ6_502PS_DDR_DQ5_502PS_DDR_DQ4_502PS_DDR_DQ3_502PS_DDR_DQ2_502
PS_DDR_DQ15_502PS_DDR_DQ14_502PS_DDR_DQ13_502PS_DDR_DQ12_502PS_DDR_DQ11_502PS_DDR_DQ10_502
PS_DDR_DQ1_502PS_DDR_DQ0_502
PS_DDR_DM1_502PS_DDR_DM0_502
PS_DDR_CS_B_502PS_DDR_CKP_502PS_DDR_CKN_502PS_DDR_CKE_502
PS_DDR_CAS_B_502PS_DDR_BA2_502PS_DDR_BA1_502PS_DDR_BA0_502
PS_DDR_A9_502PS_DDR_A8_502PS_DDR_A7_502PS_DDR_A6_502PS_DDR_A5_502PS_DDR_A4_502PS_DDR_A3_502PS_DDR_A2_502
PS_DDR_A14_502PS_DDR_A13_502PS_DDR_A12_502PS_DDR_A11_502PS_DDR_A10_502
PS_DDR_A1_502PS_DDR_A0_502
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
REV B - 0.816VREV C - 7.01V
REV A - 0.9V
HARDWARE REVISION DETECTION
PLACE NEAR XC7Z010 (VCC_PAUX)
0.05 PITCH JTAG AND UART CONNECTOR
GND/VCC
ZYNQ
VCCINT
PLACE NEAR XC7Z010 (VCC_INT)
PLACE NEAR XC7Z010 (VCC_PLL)
PLACE NEAR XC7Z010 (VCC_PINT)
PLACE NEAR XC7Z010 (VCC_AUX)
VCCINT
USER LED
PLACE NEAR XC7Z010 (VCCO_0)
ZYNQ BANK 0
SHORT TO GND FOR JTAG BOOT
13 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
XC7Z010-1CLG225C4334
XC7Z010-1CLG225C4334
3.9K
2.49K
100OHML0805
20K
47UF
BSS138LT1G
4.7K
BSS138LT1G
470
10K
BSS138LT1G
LTST-S220TBKT
470
4.7K
LTST-S220TBKT
0.47UF4.7UF
4.7UF
4.7UF
4.7UF
4.7UF 0.47UF
0.47UF 0.47UF
0.47UF 0.47UF0.47UF 0.47UF
100UF
100UF100UF
DNI
47UF
600OHMS
0.01UF
0.1UF0.47UFL0805100OHM
0
0
47UF
FTSH-105-01-L-D
U511
U511
R148
R213
R214
P510
Q1
R691
R130
R685
DS12
Q512
Q2
C686
R215
R689
DS11
R681
E687
C674C672
C679
C666
C665
C675
C668 C673
C667 C683C669 C671
C670
C676C663
E677
C664
P510
C692E682
C684 C688
C678
R216
C680
JTAG_TMS
JTAG_TDI
JTAG_TCK
1V8_D
3V3_D
USR_LED
PS_MIO05_500_QSPI0_IO3
UART_TX
DONE_LED_OVERRIDE
VIN
3V3_D
JTAG_TDO
3V3_D
3V3_D
3V3_D
VIN
3V3_D
1V8_D
JTAG_TDI
1V8_D
1V8_D
1V8_D1V8_D
VCCPLLJTAG_TDO
JTAG_TMSUART_RX
VCCPINTVCCPINT
3V3_D
JTAG_TCK
VCCPINT
VCCPLL
VCCPINT
VTTVREF1V8_D
3V3_D
G8
J7
H8L9
K6
F6
G7
M7
E8 J4 H4
L8
E6 K8
F8
L7
D5
F7G
4
H7
G9
A1 A11 B8 C5 C15 D2 D12 E5 E7 E9 F10
G3
G5
G13 H6 H1
0 J5 J9 K4 K7 K10
K14 L1 L5 L11
M8 N5 N15 P2 P12 R9
F4 H9 J8 K9 E10
F9 G10
J10
L10
J6 L6 G6
H5 K5 F5
1
3
2
3
3
2
1
6
1
1 2
579
24
810
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCP
LLVC
CPIN
TVC
CPIN
TVC
CPIN
TVC
CPAU
XVC
CPAU
XVC
CINT
VCCI
NTVC
CINT
VCCI
NTVC
CINT
VCCA
UXVC
CAUX
VCCA
UXPS
_DDR
_VRE
F0_5
02
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGND
VREFP_0VREFN_0VP_0VN_0
VCCO
_0VC
CBAT
T_0
VCCA
DC_0
TMS_0
TDO_0
TDI_0TCK_0
RSVD
VCC3
RSVD
VCC2
RSVD
VCC1
RSVD
GND
PROGRAM_B_0INIT_B_0
GND
ADC_
0
DXP_0DONE_0CFGBVS_0
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
C8,9,10 ARE INPUTS
CAN BE REARRANGED DURING LAYOUT
CAN BE REARRANGED DURING LAYOUT
FIXED TO THIS PIN
ADDRESS
56 PINS
I2C DEVICE
ADM1177-1 ???
M24C02 ???
BANK_34
PLACE NEAR XC7Z010 (VCCO_34)
FIXED TO THIS PIN
FIXED TO THIS PIN
PLACE NEAR XC7Z010 (VCCO_35)
ZYNQ BANK 34,35
BANK_35
14 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
XC7Z010-1CLG225C4334
XC7Z010-1CLG225C4334
10K
4.7K
ADP5589ACPZ-00
4.7K
0.1UF47UF
47UF
0.01UF
0.01UF4.7UF
4.7UF
4.7UF
4.7UF
0.47UF0.47UF0.47UF
0.47UF0.47UF0.47UF0.47UF
0
DNI
0.1UF
0.1UF0.47UF
U511
U511 R211R210
R87R217
GND_4
GND_6
GND_5
C696
C697
C710
C711
C240
C712
C713
C700C698
C709C707
C708C706C704C702
U15
C705C703C701C699
DIO_4
DIO_5
DIO_6
DIO_7
DIO_8
TXIQ
TXD_11
TXD_10
TXD_9
TXD_8
TXD_7
TXD_6
TXD_5
TXD_4
TXD_3
TXD_2
RXD_0
RXD_1
RXD_2
RXD_3
RXD_4
RXD_5
RXD_6
RXD_7
RXD_8
RXD_9
TXD_1
TXD_0
RXD_10
RXD_11
RXIQ
DIO_9
DIO_10
DIO_11
DIO_12
DIO_13
DIO_14
DIO_15
RX_CLK
TRIG_2
TX_CLKTRIG_1
DIO_0
DIO_1
DIO_2
DIO_3
ADF4360_CS
SDA
SCLAD9963_CSN
AD9963_RESETN
SDIO
SCLK
EN_USR_POW_POS
EN_USR_POW_NEG
EN_SC
DONE_LED_OVERRIDE
SC_CAL_MUX1
SC_CAL_MUX0
EN_SC2_CAL2
EN_SC1_CAL2
3V3_D
PWR_GOOD
STAT_POWER
STAT_DATA
3V3_D
EN_SC1_HG
EN_SC2_LG
3V3_D3V3_D
3V3_D
3V3_D
3V3_D
3V3_D
SCL
SDA
EN_SC1_LG
ADF4360_LD
3V3_D
EN_SC_CAL1
EN_AWG1
EN_AWG2
EN_SC2_HG
M9J11N9
K15
P8R10
H12G11H13G12H14G14
J15J14J13
H11N14N13
L15
L13K13K12K11
L12N12N11R15P15R11P11R13R12P14P13
R8R7M11M10N8N7P9
P10
J12
M13
N10
P7 R14
M15
L14M14
M12
F15F13
H15E13F12E12E11 F14
G15F11
10 11 127 8 9
172
14
18
1
1
1
16
2021222324PAD
1
6
345
15
13
19
GND
GND
GND
GND
GND
PAD
INT_
NSC
LSD
AC1
0 C9 C8
VDDRST_N
C7C6C5C4
C3C2C1C0R0R1
R2R3R4R5R6R7
VCCO
_34
VCCO
_34
VCCO
_34
VCCO
_34
VCCO
_34
IO_L9P_T1_DQS_34IO_L9N_T1_DQS_34IO_L8P_T1_34IO_L8N_T1_34IO_L7P_T1_34IO_L7N_T1_34IO_L6P_T0_34IO_L6N_T0_VREF_34IO_L5P_T0_34IO_L5N_T0_34IO_L4P_T0_34IO_L4N_T0_34IO_L3P_T0_DQS_PUDC_B_34IO_L3N_T0_DQS_34IO_L2P_T0_34IO_L2N_T0_34
IO_L24P_T3_34IO_L24N_T3_34IO_L23P_T3_34IO_L23N_T3_34IO_L22P_T3_34IO_L22N_T3_34
IO_L21P_T3_DQS_34IO_L21N_T3_DQS_34
IO_L20P_T3_34IO_L20N_T3_34
IO_L1P_T0_34IO_L1N_T0_34
IO_L19P_T3_34IO_L19N_T3_VREF_34
IO_L18P_T2_34IO_L18N_T2_34IO_L17P_T2_34IO_L17N_T2_34IO_L16P_T2_34IO_L16N_T2_34
IO_L15P_T2_DQS_34IO_L15N_T2_DQS_34
IO_L13P_T2_MRCC_34IO_L13N_T2_MRCC_34IO_L12P_T1_MRCC_34IO_L12N_T1_MRCC_34
IO_L11P_T1_SRCC_34IO_L11N_T1_SRCC_34IO_L10P_T1_34IO_L10N_T1_34
GND
GND
VCCO_35VCCO_35IO_L5P_T0_AD9P_35IO_L5N_T0_AD9N_35
IO_L3P_T0_DQS_AD1P_35IO_L3N_T0_DQS_AD1N_35IO_L2P_T0_AD8P_35
IO_L2N_T0_AD8N_35IO_L1P_T0_AD0P_35IO_L1N_T0_AD0N_35
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
KEEP TRACES SHORT
400MA MAX
KEEP TRACES SHORT
XAL4030-472MEC
MAX 1A0805LS-111XJLB
POSITIVE POWER SUPPLIES- ANALOG STAGE
MSS7341-103ML
XFL4012-601MEB
15 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
0.1UF22UF
100OHM
10UH 600NH
1UF
DNI
1
220OHM
10PF3.83K
220OHM
220PF
9.09K
105K
0.01
UF
22UF
1UF
1UF35.7K
0
22UF22UF22UF
0.015UF
0
1UF
220OHM
10UF
110NH
DNI
1UF
220OHM
22UF10UF
22UF
1UF
220OHM
220OHM
22UF
1UF
4.7UH
0.01UFADP1614ACPZ
ADP2370ACPZ-R70.1UF22UF22UF
MBR130LSFT1G
22UF
165K
220OHM
43.2K
6.49K
220OHM
1UF15K1UF
LT1761ES5-SD#TRMPBF
U12
C4
E4
C15
R11
R68
E8
C18 C23
C198
R67
E14
C206
C184
R72
C188
C191
L3
E10
L5
C195C192C186
R70
R12
R71
C99
E18
C214
C205
C17
E1
E12
C16
L6
C212
E17
D25
U7
E9
C176
L7
C101
R69
C19 C177 C180
R73
C5
C213
C204
C13
R165
C310
U17
R164C311
6V0_USR_A
6V0_AWG_A
5V0_A
6V0_A
3V3_A
6V0_SC_A
3V3_CLK_A
PWR_GOOD
3V3_SC_A
3V3_AWG_A
5V0_A
5V0_A
PG_1P8V
VIN
PG_1P8V
4V0_A
5V0_A
6V0_SC_A
EN_SC
8
639
10
7
2
4 5
1
1
A
2
2
2
2
1
17
1
2
2
8
1 2
1
1
PAD
321
465
PAD
C5
4
2
13 OUT
ADJSHDN_N
GND
IN
GNDGND
GND
GND
GND GND
GND
GND
GND
GNDGNDGNDGND
GND
GNDGND
PAD
SSCLRES/FREQ
VINSWSW
GNDGND
EN
FBCOMP
GND
GNDGND
GND GND GND GND GND
EPAD
PGNDSWPGFBSYNC
ENFSELVIN
GND
GNDGND
GND GND GND GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
EPL2010-181MLB400MA MAX
KEEP TRACES SHORT
-3.317V
KEEP TRACES SHORT
NEGATIVE POWER SUPPLIES- ANALOG STAGE
-6V
744053003
16 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
DNI
DNI
33PF
47UF
4.7U
F
ADP5074ACPZ
47UF3UH0
1UF1UF
0.01
UF
LT1964ES5-5#TRPBF
20K1UF
120K
1UF
220OHM
1UF
180NH
1UF
220OHM
220OHM
DNI
220OHM
47UF47UF
2
PD3S140-7
ADP7182ACPZ-R7
10UF
10.7K
100K
23.2
K
2200PF
220OHM
220OHM
4.7UF
1UF
1UF
1UF4.7UF
69.8K
DNI
90.9K 220OHM
C182
R154
C328
C329C327
E5
VR1
E13
E16
C10R8
C12
C6 R2
U10
R78
C211
C9
C221
E15
C210C11
R9
C1
R77
C2
D24
R7
R1
L2
E19E24
E22
L4
C218C217
C8
C209
C222
R10
C3
U13-6V0_A
PG_1P8V
PWR_GOOD
-6V0_AWG_A
-6V0_A
-5V0_SC_A
EN_SC
-6V0_SC_A
-6V0_SC_A
-3V3_AWG_A
-6V0_SC_A
-3V3_SC_A
-3V3_A
-6V0_USR_A5V0_A
2
14
1
6
1
35
4
21
2
A
10 16 15
PAD
1 21 2
1 2
13
78
32
5
1
4
9
1 2
2
C
11
12
1
34
56
78
PAD
GND GNDGND GND
SHDN_NOUT
BYPIN
GND
GND
EPADVINVIN
GND NC
ENADJ
VOUTVOUT
GND
GND
GND
GNDGNDGNDGNDGND
GND
GNDGND
PAD
AVIN
SYNC/FREQNC NC NC
PVIN
VREG
GND
VREFFBCOMP
ENSS
PGOODSLEW
SW
GNDGNDGND
GND
GND
GND GND
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
DLW21HN900SQ2L
USB CONNECTORS
PRIMARY
SECONDARY
POWER MANAGEMENT SECTION
PLACE ONE CAP NEAR OUT 1POWER ONLY USB
CURRENT LIMIT POWER = 2A
DLW5BSM191SQ2
1V3
VCCPAUX, VCC_PLL
VCCO_MIO0, VCC_MIO1
---
PS:
CURRENT MONITOR
SLEW LIMIT-------->
1ST
JTAG & UART
VCCAUX, VCCO_0
VCC0_34, VCCO_35
AD9963(1V8) VDD_INTERFACE
---
--------->
VCCO_DDR
3V33RD 1V35
3V3
1V0
VCCINTPL:
STAGEANALOG
USB---->
SELECTOR
2ND
POWER + DATA USB
CURRENT LIMIT DATA = 1A
POWER SELECTORINRUSH AND OVERCURRENT PROTECTION
DIGITAL POWER SEQUENCE:
1V8--------->
VCCPINT
REFERENCES
PLACE ONE CAP NEAR OUT 2
USING POWER USB IF AVAILABLE
ALTERNATE VBUS RESISTOR PLACEMENT
D1 DISABLED BELOW 3.25D2 ENABLED BELOW 3.53
2A TRACE2A TRACE
PLACE CLOSE TO P519
PLACE CLOSE TO P519
TESTPOINTS FOR FACTORY CALIBRATION
17 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
10UF
10UF
47590-000147590-0001
1K
10K
DNI
190OHMS AT 100MEGHZ
DNI
10K 10K
10UF
47UF47UF
DNI
10UF
470
LTC4415EDHC#PBF240
1K8.06K
100
ADP198ACBZ-112.2UF
27.4K
90OHMS AT 100MEGHZ 0.5A
4.7UF
0.1UF
10KDNI
C325
C326
D741
P516
R156R212
3V3_A
CALIB_REF2
CALIB_REF1
IO3
D739
C280 C281
VIN
U21
L10
R195
C313
C320 C321
R192
R191 R196
C312
R744
P519
L1
GND_10
TCK
TDO
TDI
RX
TX
TMS
GND_8
GND_9
GND_7
U16
R189
R190R749
R166
1V8_D
VCCPINT
3V3_D
6V0_A
-6V0_A
1V35
-3V3_A
4V0_A
F1
C324
VIN_5V_USB_DATA
VIN_5V_USB_POWER
3V3_D
JTAG_TDI
USB_VBUS_OTG USB_VBUS_OTG
-6V0_A
CALIB_REFERENCE1
CALIB_REFERENCE2
EN_POW_USB
USB_ID
USB_OTG_CPEN
VIN_5V_USB_POWER
USB_OTG_N
JTAG_TCK
VIN
STAT_DATA
VIN
6V0_A
JTAG_TDO
UART_TX
UART_RX
PS_MIO05_500_QSPI0_IO3
JTAG_TMS
USB_OTG_P
1V35
3V3_D3V3_D
EN_DAT_USB
STAT_POWER
EN_DAT_USB
EN_POW_USB
VIN_5V_USB_POWER
VIN_5V_USB_DATA
VIN_5V_USB_POWER
1V8_D
VCCPINT
3V3_A
-3V3_A
4V0_A
3
A
1
45
SH1
4
3
1
132
SH3
C
A1B1
B2
2
A2
3
SH3
1615
2
41
3
1
3
4
6
78
1211
9
2
4
SH1
2
SH2
1
C
A
5
5
10
14
PAD
SH2
PGND
PGND
GND
GNDGNDPGNDPGND
PGNDPGND
PGND
PGND
PAD
OUT2OUT2
STAT2_NWARN2_N
WARN1_NSTAT1_N
OUT1OUT1
IN2IN2
EN2_N
CLIM2
CLIM1
EN1IN1IN1
GND
GND
GND
PGND PGND
PGNDPGND PGND
PGND
PGND
PGND
ENGND
VOUTVIN
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE
KEEP TRACES SHORT
1.2 MHZ
FIRST START 1V PS
LPS4012-562MRB
SECOND START 1.8V PS
THIRD START 1.35V PS
DIGITAL POWER SUPPLIES
2A @ 1.8V
1A @ 3.3V
KEEP TRACES SHORT
THIRD START 1.35V PS
600 KHZ
2A @ 1.35V
KEEP TRACES SHORT
KEEP TRACES SHORT
XFL4020-102MEB
2.5A @ 1V
3V3_D, 6V0_A, -6V0_A
LPR-038879
18 18
<DESIGN_VIEW>
: ad9963Product(s): ad9963HW TYPE : Customer Evaluation Z
1:1
C02_042233
M. BANCISOR
10UF
15K
23.2
K
0
10UF
1UH
47UF
17.8K47UF
ADP2114ACPZ
0
100OHM
8.25K
1UF
47UF
10
47UF
1UF
0.0022UF
0.047UF
22UF
5.6UH
10
1.5UH
100OHM
0.047UF
0.047UF
47.5K
82.5K
8.25K
DNI
0
0
DNI
24.3K
16.2K
100K
DNI
0
4.99K120PF
47UF
10UF
14.3K
10UF
10UF
10UF 10UF
10UF
10UF
10UF
10UF
0.047UF
10UF
4.7K
27.4K
0.0033UF
10K
180P
F
0.00
56UF10K
150P
F
33PF
4.7K
100OHM1.5UH
0.0012UF
47UF
100OHM
46.4
K
ADP2114ACPZ
20K
C197
R752
C774
R766
R209
C769
C278
C279
R90
E767
C194 C215
R205
R206
C762C761
C751
C753
U6
U518
C757
R88
C748
C203
C193
C199
E21
R517
L521
C241
C754
L520
C746
C745
L8
R203
R92
R75
R74
R91
R149
R207
R89
R204
C196
R208
R764
C737 C740
C187
C190
C178
C183
R747
R743
R760
C756
R155
E26
R763C758
C742C738
L9
C207
E768
R765
C208
R750
3V3_D
COMP_1V0_D
PG_1P0V
COMP_1V0_D
3V3_D_LA
1.35V
1V0_D
ADP2114_VIN_2
VIN
ADP2114_VIN_2
1V35
FB_3V3_D
PG_1P8V
FB_1V0_D
ADP2114_VIN_2
COMP_1V8
PWR_GOOD
ADP2114_VIN_2
VIN
VIN
VIN
FB_3V3_D
FB_1V0_D
ADP2114_VIN_1
FB_1V35
PG_1P8V
FB_1V8
PG_1P0V
COMP_3V3_D
COMP_3V3_D
FB_1V35
VIN
VIN
COMP_1P35V
COMP_1V8
1V8_D
3V3_D
ADP2114_VIN_2
VCCPINT
PWR_GOOD
FB_1V8
ADP2114_VIN_1
COMP_1P35V
ADP2114_VIN_1
VIN
PG_1P8V
PWR_GD_1.35V
13
1516
32
26
28
32
12
2325
3128
30
9
1817
23
13
10
2
6
PAD19
29
4
1110
8
27
1415
1 2
1 2
1 2
1 2
2
7
3
1
6
22
29
12
30
11
5
8
25
2
31
14
1
1
16
7
22 21 20
26 24
2427
9
21 20 19PA
D
4
35
1718
GND
GNDGND
GND
VIN6VIN5VIN4
VIN3VIN2VIN1
VDD
PAD
PGND
4PG
ND3
PGND
2PG
ND1
GND
SS2FB2 V2SET
SW4SW3
COMP2
PGOOD2
SW2SW1
COMP1
PGOOD1
EN2
SS1FB1 V1SETEN1
OPCFG
SYNC_CLKOUTFREQSCFG
GND
GND GND
GND GND
GND
GND
GND GND
GND GND GND
GND
GND
GND
GND
GND
GNDGND
GND
GNDGND
GNDGND
GND
GNDGND
VIN6VIN5VIN4
VIN3VIN2VIN1
VDD
PAD
PGND
4PG
ND3
PGND
2PG
ND1
GND
SS2FB2 V2SET
SW4SW3
COMP2
PGOOD2
SW2SW1
COMP1
PGOOD1
EN2
SS1FB1 V1SETEN1
OPCFG
SYNC_CLKOUTFREQSCFG
GND
GND
GND
GND
D
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
AC
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.
2
SCALE
DDDSIZE
D
REV
SHEET
1
1
A
234
35
8
D
7
678
A
B
C C
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL GE
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
EAN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGINEER
DESIGN VIEW
REV DATE