controlled impedance

Multek

World Class Printed Circuit Board&

Flexible Circuit Manufacturer

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About Multek-Multilayer Technology, Inc.

Multilayer PCB industry leader

Advanced technology production – from conception to market

Industry-leading capabilities, ranging from extreme miniaturization to high speed CPU infrastructure boards

Advanced Analytical Laboratories

Seven manufacturing facilities on three continents

Over 5,500 employees

PCB Products and Services

Products: High layer count—multilayer boards up to 40 layers Laser microvia processes for high-density interconnects Advanced materials including high-temperature soldering & Halide free

Services: Advanced electrical modeling and

application engineering services High-speed signal integrity analysis QTA/prototypes Dedicated product support from

prototype to pilot runs to volumeproduction

PCB Site Capabilities Snapshot

Comm. Infrastructure, Computers &

Office Automation,

IT Infrastructure

Comm. Infrastructure,

Consumer, Handheld Devices

Handheld Devices

BGA/MCM, Comm.

Infrastructure, Consumer,

Handheld Devices

Computers & Office Automation,

Comm. Infrastructure,

Industrial, Automotive

Comm. Infrastructure, IT

Infrastructure, Industrial, Medical

& Other

Industry Segments

ISO9002QS9000TL9000

ISO14001

ISO9002QW9000TL9000

ISO14001

ISO9002QS9000TL9000

ISO14001

ISO9002QS9000TL9000

ISO14001

ISO9002QS9000TS16949

ISO9001ISO14001

Certifications

26 layers10 layers16 layers18 layers14 layersOnly limited by overall thicknessMaximum Layer Count

CCCCCEmbedded Passives

+/- 5%

+/- 10%+/- 10%+/- 10%+/- 10%+/- 10%+/- 10%Controlled Impedance

12:16:110:110:18:114:1Maximum Aspect Ratio

YesYesYesYesYesYesBlind Vias

YesNoYesYesYesYesBuried Vias

YesNoYesYesYesYesMicro Vias

0.008"0.010"0.006"0.006"0.010"0.006"Minimum Finished Hole Size

0.003"0.004"0.0025"0.003"0.004"0.003"Minimum Line & Space

400,000200,000260,000310,000130,00055,000Fabrication Capacity (ft2/mo)

China B5China B4China B3China B1 & B2BrazilGermanyPCB Fabrication Technology

China

Laye

r C

ount

VolumeLow Medium High

40

22

16

12

8

2

Germany

Brazil

PCB Multiple Site Capabilities

Controlled Impedance and Low Loss Material Discussion

Presented by: - David Hoover - Multek- Leena Gulia – Park/Nelco

09-11-07

• IPC-2141 Controlled Impedance Circuit Boards and High Speed Logic Design

• IPC-TM-650 Characteristic Impedance and Time Delay of Lines2.5.5.7 on Printed Boards by TDR

• IPC-T-50 Terms and Definitions for Interconnecting and Packaging Electronic Circuits

CONTROLLED IMPEDANCE

WHY IS IMPEDANCE IMPORTANT?

Impedance is basically resistance which is affected by capacitance and inductance changes with high frequencies.

Any discontinuity along a signal path will cause reflections. Reflections reduce the amount of power reaching a receiver and may create ringing along the circuit. These signal degradations can cause systems to malfunction due to missed or false signals.

As Printed Circuit Boards become faster, the matching of the traceimpedance to the sending or receiving devices becomes more and more important.

Replacing a Good Part With Another Good Part Fixes ProblemSwitching to a new “Die Shrink” component and the PCB

no longer functions properly.Heating or Cooling the PCB sometimes Induces or Cures ProblemsA Selected Set of PCB’S Work Together, but Not With Other PCB’S.System Works With a PCB in One Backplane Slot, but Not Another.Modest Changes in Power Supply Voltages Induce Problems.

Reflections Occur at Impedance Discontinuities

Typical Discontinuities Are: Changes in Trace Widths Connector Transitions Improperly Matched Terminations Changes in Trace Height Lack of Terminations Stubs Large Power Plane Discontinuities Loads

PRACTICAL RANGE OF PCB PHYSICAL PARAMETERS

IMPEDANCE

DIELECTRIC CONSTANT

TRACE WIDTHS

DIELECTRIC THICKNESS

25 - 120 OHMS ± 10% *

3.9 - 4.8 (FR-4)

3 - 25 MILS

2 - 122 MILS

* <+/-10% is design dependent

IMPEDANCE - TYPES

Single Mode Even Mode Differential Odd Mode Differential

• Even Mode Differential (Zem ) - Same Signal Sent through both lines.

No physical ground. Universal Ground. Difficult to predict the impedance.

• Odd Mode Differential (Z om ) - Signals are sent complimentary.

The currents and voltages are opposites.

We are most familiar with a balanced differential system of ZdiffZdiff = 2 X Z om

Single Mode (Zo ) - Single Ended Transmission Line.

CONTROLLED IMPEDANCE CONFIGURATIONS AND THEIR DESIGNATIONS(single-ended)

MICROSTRIP

PCB Surface

EMBEDDED MICROSTRIP(aka, Buried Microstrip)

PCB Surface

SINGLE STRIPLINE(aka, Centered Striplineand Symmetric Stripline)

DUAL STRIPLINE(aka, Offset Stripline

and Asymmetric Stripline)

GUARDED MICROSTRIP

PCB SurfaceSIG GND

COPLANAR MICROSTRIP(aka, COPLANAR WAVEGUIDE, CPW)

PCB SurfaceGND SIG GND

WIRE-OVER-GROUNDMICROSTRIP

PCB Surface

Controlled Impedance Equations

Rule of Thumb (R.O.T.)(Known transmission line test structures with feedback results)

Analytical Equations(MECL Formulas)

Analytical Equations (that include 2nd and 3rd order effects)(In-depth equations that include more than just the MECL formulae)

2D Field Solver(Methods of Moments (MOM), Boundary Elements (BEM), Spectral Domain, Differential Equations - Finite Element (FEM) and Finite Difference)

3D Field Solver(Additional structures such as vias)

Analytical Equations - Single Ended

MICROSTRIP EQUATION

++=

TWH

EZ

r 8.098.5

ln41.1

790

note: valid for 5<W<15 mils

rEWT

WH

Z09.1

76.106048.5ln037.430 +

+

=

BURIED MICROSTRIP EQUATION

++

++−

=)8.0()2(9.1

ln)(41

800TWTB

ETCB

B

Zr

ASYMMETRICAL STRIPLINE EQUATION

Analytical Equations – Maxwell Equations

SI Analysis Tools

http://www.ipc.org/ContentPage.aspx?pageid=4.5.8

Signal Integrity Vendor List on IPC’s Website

2D Field Solver Output Example

Source: APSIM RLGC

Odd-Mode Coupling

Even-Mode Coupling

Mixed Dielectric Calculation Example(aka, Mixed Dielectrics, Hybrids, Combos, Flex/Rigid)

Er’ = 3.48

Er’ = 3.48

Er’ = 4.03

IMPEDANCE - TYPES

Single Mode Even Mode Differential Odd Mode Differential

• Even Mode Differential (Zem ) - Same Signal Sent through both lines.

No physical ground. Universal Ground. Difficult to predict the impedance.

Odd Mode Differential (Z om ) - Signals are sent complimentary.

The currents and voltages are opposites.

We are most familiar with a balanced differential system of ZdiffZdiff = 2 X Z om

• Single Mode (Zo ) - Single Ended Transmission Line.

What Is Differential Impedance?

Differential Impedance is used for clocks, drivers, and amplifiersthat need to have the signals received at relatively the exact time. Certain types of devices demand this. For those devices, if the signalsarrived at different times, the device would lock up and not run.

Appearance:

Signal Pairs in Fairly Equal Width and Length.

Less power supply noise due to current transients.

Why Differential Impedance?

Differential Modes provide:

Precise signal timing.

Better noise immunity.

The coupling that takes place between the two signals cancels out the electrical flux fields which reduces the externally emitted electromagneticinterference fields (EMI). It produces virtually noise free signals.

Less Crosstalk.

Reduced Radiated EMI.

(behaves similar to twisted pair)

Provides it’s own signal return path over split planes.

EDGE-COUPLED EMBEDDED MICROSTRIP

(aka, Horizontal Coupled Embedded Microstrip)

PCB Surface

EDGE-COUPLED DUAL STRIPLINE(aka, Horizontal Coupled Dual Stripline)

CONTROLLED IMPEDANCE CONFIGURATIONS AND THEIR DESIGNATIONS(edge-coupled differential structures)

EDGE-COUPLED MICROSTRIP(aka, Horizontal Coupled Microstrip)

PCB Surface

EDGE-COUPLED STRIPLINE(aka, Horizontal Coupled Stripline)

EDGE-COUPLED MICROSTRIP NO REF PLANE(Infinite Ground Below)

PCB Surface

Broadside Coupled Stripline(aka, Vertical Coupled Stripline and

Tandem Coupled Stripline)

CONTROLLED IMPEDANCE CONFIGURATIONS AND THEIR DESIGNATIONS(broadside-coupled differential structures)

Core(Preferred)

+ -

Virtual Planeis formed

Calculating Differential Impedance is similar to Single Ended except now the coupling (or interaction) between the two signals has an effect on the actual Impedance. We typically see Impedance values drop due to this coupling. The spacing between the traces effects the impedance.

Close traces lowers the Impedance. Farther apart makes the impedance higher.Example: Zo is 75. Trace 1 + Trace 2 = < 150 Ohms

Odd-Mode Coupling

Even-Mode Coupling

Differential Coupling

Broadside Coupled Stripline

Loosely Coupled Pairs (Preferred)

•Better impedance control

•Less sensitivity to manufacturing variations

•Lower track density

•Lower even mode return loss

•Lower insertion loss

•Less impedance variation at 2mm connector transitions

•Less impedance variation at BGA escapes transitions

•Less impedance variation at via transitions

Differential Pair Coupling

Tightly Coupled Pairs

•More difficult impedance control

•Greater sensitivity to manufacturing variations

•Higher track density

•Higher even mode return loss

•Higher insertion loss

•Greater imp variation at 2mm connector transitions

•Greater imp variation at BGA escape transitions

•Greater impedance variation at via transitions

Here Are Five Basic Styles of Glass Cloth / Prepreg Used in the Manufacture of Printed Wiring Boards, Although Other Styles AreBecoming Popular Due to Cost, Availability Etc

106

1080

2113

2116

7628

.00200 69 3.63

.00300 62 3.80

.00400 55 4.00

.00500 52 4.08

.00700 45 4.32

STYLE NOMINAL Resin Er’* THICKNESS %

From the Above Selection, Most Laminate Material Thickness' Can Be Manufactured by Using Multiples or Combinations of Any Glass Style

Each Combination of Glass Styles Has It’s Own Characteristics in Terms of Dimensional Stability, Fill Characteristics, Processability, and Er’

Pure Resin ~3.6 DkFiberglass ~6.6 Dk

(@ 1 MHz)

*Based on test data at 1 GHz

!"

Low Low tan High Low CTEThickness controlLaser processabilityFlatness,High heat resistanceHigh cycle processHalogen Free

#$%

PCB THICKNESS CONTROL

Since many dielectric thickness’ are locked in based on tracewidth and impedance requirements, try to have at least one dielectric area within the stack-up that allows adjustments in the overall PCB thickness. (Adjacent reference planes are the optimum location.)

PWB SURFACE

PWB SURFACE

CRITICAL DIELECTRICS

CRITICAL DIELECTRICS

USE TO ADJUST OVERALL PWB THICKNESS NON - CRITICAL

Typical Controlled Impedance StackTypical Controlled Impedance Stack--UpUp

Controlled Impedance Table (Mils)Lyr #

Target Ohms+/- 10 %

Microstrip(Trace/Space)

EmbeddedMicrostrip

(Trace/Space)

Stripline(Trace/Space)

Single-Ended 1,3, 6,8, 10

50 5.0 N/A 4.0

Edge-CoupledDifferential Pairs

3,5,6,8

100 4.5 N/A 4.5 / 10.5

Broadside-Coupled

Differential Pairs

5,6 90 N/A N/A 3.75

Impedance table example:

Impedance on .004” traces on layers 2 and 11 to be 50 Ohms +/-10%.Impedance is the controlling parameter for the stackup.

Print note example:

Impedance Table and Print Note Examples

Processes / Methods Necessary for Zo

Source: Ritch Tech

OUTER LAYERS

Drill Holes to be Plated Clean and Deburr Holes Sensitize Holes (Desmear)Plate Electroless Copper Apply Plating Resist Expose Image on Resist Develop Plating Resist Plate Electrolytic Copper Tin Plate Strip Away Plating Resist Etch Away Unwanted Copper

Apply SoldermaskFinal Finish

1. 2. 3. 4. 5. 6. 7. 8. 9.

10. 11. 12. 13. 14.

INNER LAYERS

Apply Photo Resist Expose Image on Photo Resist Develop Image on Resist Etch Away Unwanted Copper

1. 2. 3. 4. 5.

Strip Away Tin

Strip away Photo Resist

Typical TDR Coupon Configuration on a Manufacturing Panel

TDR Coupon Placement

ALTERNATIVE LOCATION OF IMPEDANCE COUPONS(The coupons could be placed within the subpabels)

TYPICAL LOCATION(One test signal per layer)

Could Coupons be allowed

in Breakaways?

Common TDR Test Equipment

PC with HP-IB interface and printer

digitizing oscilloscope and TDR plug-in

test couponcoaxial cable + high frequency probe

HP-IB connection

Static protection unit(HF relays)

Common TDR Test Equipment and Setup

Future – Leading Edge TDR Test Systems

NC DrivenFlying Probe TDR Testers

Typical TDR Test Waveform

SOURCE - IPC-2141

25 % 15 %

UndisturbedInterval

RELATIVE DIELECTRIC CONSTANT Er’ (Material Type)

PCB STACKUP INCLUDING COPPER THICKNESS’(ALSO LYR TYPES i.e., Sig/Pln/Sig/Sig/Pln/Sig)

TRACE WIDTH AND SPACING

TARGET IMPEDANCE AND TOLERANCES (ON WHICH LYRS)

OVERALL BOARD THICKNESS AND TOLERANCE

TYPE OF TRANSMISSION LINE (i.e., Microstrip, Stripline…etc.)

LEADTIME - TURN AROUND (MATERIAL AVAILABILITY)

ANY OTHER SPECIAL CONSIDERATIONS (i.e., dielectrics, multiple impedance’s on the same lyr,…etc.)

(Best items to be know for Stack-up Generation)

Tolerance Analysis

EXAMPLES OF FACTORS INFLUENCING IMPEDANCEFOR BOTH MICROSTRIP AND STRIPLINE (APPROXIMATIONS)

Increase in “D” of .001” will increase by: 6 ΩΩΩΩ (.005” trace)4 ΩΩΩΩ (.010” trace)2 ΩΩΩΩ (.020” trace)

REFERENCE PLANE

PWB SURFACE

D

Increase in “W” of .001” will decrease impedance by:4 ΩΩΩΩ (@.005” D) 2 ΩΩΩΩ (@.010” D)

.5 ΩΩΩΩ (@.020” D)

Increase in copper thickness of 1 Oz. will decrease impedance by:5 ΩΩΩΩ for Microstrip and 4 Ohms for Embedded Microstrip, Stripline, and Dual Stripline.

W

REFERENCE PLANE

Tolerance Analysis

Converting from Microstrip to Embedded Microstrip will decrease impedance ~33%

Converting from Microstrip to Stripline or Dual Stripline will decrease impedance ~66%.

MICROSTRIP CONFIGURATIONS

PWB SURFACE

T

REFERENCE PLANE

H1

W

H4

INCREASE = DECREASE =

LOWER Zo HIGHER Zo


HIGHER Zo LOWER Zo


LOWER Zo HIGHER Zo

SOLDERMASK INCREASE = DECREASE =

LOWER Zo HIGHER ZoTHICKNESS

SOLDERMASK WILL LOWER Zo

SURFACE MICROSTRIP

T

H4

REFERENCE PLANE

H1

W

PWB SURFACE


HIGHER Zo LOWER Zo


LOWER Zo HIGHER Zo


LOWER Zo HIGHER Zo


LOWER Zo HIGHER Zo

DIELECTRIC CONSTANT (Er) OF MATERIALINCREASE =

DECREASE =LOWER Zo HIGHER ZoEMBEDDED MICROSTRIP

STRIPLINE CONFIGURATIONS

T

REFERENCE PLANE

H2W

REFERENCE PLANE

H1 INCREASE = DECREASE =

HIGHER Zo LOWER Zo


LOWER Zo HIGHER Zo


HIGHER Zo LOWER Zo


LOWER Zo HIGHER Zo

T

H2

REFERENCE PLANE

H1

W

REFERENCE PLANE


HIGHER Zo LOWER Zo

DIELECTRIC CONSTANT (Er) OF MATERIALINCREASE = DECREASE =

LOWER Zo HIGHER Zo


HIGHER Zo LOWER Zo


LOWER Zo HIGHER Zo


LOWER Zo HIGHER Zo

SINGLE STRIPLINE

DUAL STRIPLINE

Laminate Performance PyramidLaminate Performance Pyramid

Source: BPA Consulting Ltdand David Hoover

Df 0.020

Df 0.010 - 0.020

Df 0.007 - 0.010

Df 0.005 - 0.007

Df 0.002 - 0.005

Df 0.003PTFE Taconics

Arlon Rogers

IS640 Megtron 6RO 4350 Arlon FR25

GETEK IIHitachi LX67Y

N4000-13SI -12SI Polyclad LD613 LD621 IS620

N4000-13 FR408 N4000-12 GETEK Megtron BT / Epoxy

Standard FR-4 Halogen Free High Tg FR-4

controlled impedance

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