cornell ece315: report project 2

8/14/2019 Cornell ECE315: report project 2

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ECE315 Project 2:

A Simple Differential Amplifier

Erin McClureJames Yu

Steve Keller

May 1, 2003


2/12

0.1 Design

For our final project design, we started off with the circuit used in Lab 7: a folded-cascodedifferential amplifier, as seen in Figure A. However, we did not use the same CD4007 chips

that we used for Lab 7, since they were not particularly well-matched. We tested a vari-ety of chips and only selected ones that contained nMOS and pMOS transistors that wereparticularly well-matched (VT0 matched to 3-4 decimal spaces).

Using the Lab 7 setup and well-matched transistors, we were able to meet all of the projectspecifications except for the unity gain crossover frequency requirement. The value we ini-tially obtained was significantly lower than the specified 50 kHz requirement ( 5-10 kHz), sowe proceeded to adjust our circuit to raise the value of Ib. In order to do this, we changedthe resistance value R in the biasing circuit from 100 k to 10 k. Since Ohms law statesthat I = V /R, a decrease in R resulted in an increase in Ib. Raising Ib brought us veryclose to meeting the unity gain crossover frequency requirement but also lowered the gain

of our circuit. Consequently, we proceeded to double the effective width of the differentialpair (transistors M1 & M2) by adding a transistor in parallel with each of them, as seen inFigure B. By adding these parallel transistors the current difference generated by the differ-ential pair is magnified, thus this increased both the bandwidth and the gain. With thesemodifications, our circuit successfully met and/or exceeded all of the project specifications.

For the folded-cascode differential amplifier circuit, the value of the output voltage Vout isbased on a number of different factors. First, the input voltages V1 and V2 are the gatevoltages for the M1/M2 differential nMOS transistor pair that is connected to the source ofthe M3/M4 cascoded pMOS transistor pair and the drain of the M5/M6 cascoded pMOS

transistor pair. Due to the bias transistor Mb, which fixes the source current Ib for the M1/M2differential pair, a positive difference between the value of V1 and V2 (V1 > V2) results in anincrease in the current allowed to pass through M1 and a decrease in the current allowed topass through M2 (since I1 + I2 = Ib).

Upon examination of the current division that Ib goes through in between the pair M3/M4and the cascode pair M5/M6, this decrease in the current allowed through M2 results in morecurrent to pass through transistor M6. Moreover, the increase in current through M1 causesless current to go through M5, and thus less current mirrored by the nMOS mirror M7 andM8. In the end, more current flows in the output node than out, and increases the outputvoltage Vout. The exact opposite happens for V1 < V2, thus V1 is called the non-inverting

input and V2 the inverting input.

Another factor that influences the value of Vout is the relationship between the bias voltagefor the M3/M4 cascoded pair, Vbp, and the cascode voltage for the M5/M6 cascoded pair.Since the M3/M4 & M5/M6 cascoded transistor pairs are pMOS pairs, their gate voltagesmust be fixed far enough below VDD for a significant amount of current to be allowed to passthrough them.

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0.2 Experiments

All of the following experiments were done using a cascode bias voltage of Vc = 2.8V. Also,this bias voltage was generated using a simple voltage divider with two resistors so as to

adhere to the criteria that our amplifier must operate from a single 5 V DC power supply.

0.2.1 Output Characteristics

First we swept Vcm from rail to rail while measuring Vout to find the allowable common modevoltage range. As seen in Figure 1, this range is from about 2V to 5V. To ensure that ouramplifier provides a rail to rail output swing we swept Vdm from rail to rail while measuringVout for different values of V2. As seen in Figure 2, our amplifier does exhibit rail to railoutputs. Figure 3 provides a much closer view of one of the curves.

0.2.2 Differential Mode Gain

In order to find our differential mode gain we used the relation

Adm =VoutVin

=VoutIout

IoutVin

= Rout Gm (1)

First, we calculated Rout, the output resistance, by sweeping Vout from rail to rail whilemeasuring Iout, as seen in Figure 4. After graphing the data, we obtained a slope of the best

fit line, which corresponds to Iout/Vout. Taking the inverse we obtain

Rout =VoutIout

= 8.7489 105 (2)

Secondly, we calculated Gm, the incremental transconductance gain, by sweeping Vdm whilemeasuring Iout, as seen in Figure 5. After plotting the data we obtained Gm through theslope of the best fit line

Gm =IoutVin

= 3.1878 104 (3)

Now we multiply these two values to obtain the differential mode gain

Adm = (8.7489 105)(3.1878 104) = 278.0992 = 48.884dB (4)

which is sufficient for the given specification of at least 40dB.

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0.2.3 Common Mode Gain and CMRR

In order to find the CMRR (common-mode rejection ratio) we use the relation

CMRR =

Adm

Acm =

Rout

Gm,diff

Rout Gm,common =Gm,diff

Gm,common (5)

So we merely need to find the common mode incremental transconductance gain to obtainCMRR. In order to do this we swept Vcm from 2.5V to 2.7V, the same interval as when weswept Vdm to find Gm,dm, as we measured Iout. After graphing the data as shown in Figure6, we obtained the slope of the best fit line and obtained

Gm,cm = 5.1022 107 (6)

CMRR = 3.1878 104

5.1022 107 = 623.002 = 55.8898dB (7)

which is sufficient in regards to the 50dB specification.

0.2.4 Unity-Gain Characteristics

To obtain the unity-gain characteristics, we made a feedback connection from the amplifieroutput to the inverting input, and loaded the output with a 1 nF capacitor. Then we usedthe AFG to provide a sinusoidal input to the non-inverting input, and used the scope toobserve the output.

In order to ensure that our crossover frequency was at least 50 kHz, we placed as input a50 kHz sine wave and observed the resulting output signal. Since our system is a singlepole system, we should expect an approximate 3 dB output at the crossover frequency (ormultiplied by 1/

2). As seen in Figure C, the resulting output is phase shifted less than

180 and is a little higher than 1/

2 of the input, which means that it is sufficient to meetthe 50 kHz crossover frequency specification. Of course, our circuit is also unity-gain stablewhen loaded with a 1 nF capacitor.

0.2.5 Offset Voltage

To obtain the offset voltage we first made a connection from the output to the invertinginput to make the circuit exhibit unity-gain. We then measured the voltage across Vin andVout while sweeping Vin from rail to rail to see how much our circuit strays from unity gain.As seen in Figure 7, the offset voltage is within 50 mV over the entire range of the allowedcommon-mode input, except at the very end where it tapers down.

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0.2.6 Power Characteristics

We measured the total quiescent current drawn from Vdd as 0.276 mA. This was done byusing the Keithley 2400 to supply 5V and measure the current going into the circuit whenthe amplifier was connected as a unity-gain follower with V

incentered in the amplifiers

common-mode input range. The total power was calculated to be

P = V I = (5V)(0.27600mA) = 0.00138W. (8)

0.2.7 Bandwidth

The bandwidth per unit static power consumed is

B =

crossover

Vdd Idraw =

50000

5 0.000276 = 2.76 (9)

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0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50.08

0.1

0.12

0.14

0.16

0.18

0.2

0.22

0.24

Vcm

sweep from rail to rail measuring Vout

Vcm

Vout

Figure 1: A sweep of the common-mode voltage while measuring the output voltage showsthat the amplifier does indeed work properly near the power rail.

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0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

Vout

vs. Vdm

for different values of V2

Vdm

Vout

V2 = 2.5V

V2 = 3.5V

V2 = 4.5V

Figure 2: A sweep of the differential mode voltage while measuring the output voltage showsthat the amplifier exhibit rail to rail behavior in the allowed input range.

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0.2 0.15 0.1 0.05 0 0.05 0.1 0.15 0.20

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

Close up of Vdm

vs. Vout sweep for V2 = 3.5V

Vdm

Vout

Figure 3: A finer plot of the differential mode voltage versus the output voltage at V2 = 3.5V.

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0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

2

1

0

1

2

3

4

5

6

7

x 105

Vout

I

out

Vout

vs. Iout

at V1=V

2=2.6V

Data

Fit

Figure 4: A plot of the output current versus resistance curve. The inverse of the slope ofthe fitted line is the output resistance.

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10/12

1 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1

6

4

2

0

2

4

6

8x 10

5

Vdm

I

out

Vdm

vs. Iout

at V2=2.6V

Data

Fit

Figure 5: A plot of the output current versus the differential mode input voltage. The slopeof the fitted line is the incremental transconductance gain Gm.

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1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

1.09

1.1

1.11

1.12

1.13

1.14

1.15

1.16

x 105

Vcm

I

out

Vcm

vs. Iout

Data

Fit

Figure 6: The output current versus the common-mode input voltage. The slope is theincremental transconductance gain for the common-mode input.

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0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50.2

0.15

0.1

0.05

0

0.05

0.1

0.15

0.2Offset Voltage

Vin

Vout

Vin

Figure 7: A measurement of the offset voltage was made by measuring the voltage across

the input and output while the circuit is unity gain connected.

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cornell ece315: report project 2

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