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AKCE/PM/C-V/PRN/7.5.1/23/F-05

ARULMIGU KALASALINGAM COLLEGE OF ENGINEERING

ANAND NAGAR, KRISHNANKOIL - 626 190.

DEPARTMENT OF INSTRUMENTATION AND CONTROL ENGINEERING

COURSE PLAN

SUBJECT NAME : EMBEDDED SYSTEM DESIGN / EC 1032

STAFF NAME : M.P.Rajasekaran

III Year / VIII SEM

1. Pre-requisite:

a. Fundamentals of microprocessor and DSP processors.

2. Objectives :

This course is designed with two complementary goals:

1. To understand the scientific principles and concepts behind embeddedsystems, and

2. To obtain hands-on experience in programming embedded systems.

.

3. Learning outcome and end use:

Understand, and be able to discuss and communicate intelligently about

a. Embedded processor architecture and programmingb. I/O and device driver interfaces to embedded processors with networks,

multimedia cards and disk drives

c. OS primitives for concurrency, timeouts, scheduling, communication andsynchronization

4. REFERENCE BOOK :

1. Rajkamal, Embedded System Architecture, Programming, Design, Tata

McGraw Hill, 2003.

2. Daniel W. Lewis Fundamentals of Embedded Software, Prentice Hall ofIndia, 2004.

3. David E. Simon, An Embedded Software Primer, Pearson Education, 2004.4. Frank Vahid, Embedded System Design A Unified hardware & Software

Introduction, John Wiley, 2002.5. Sriram V. Iyer, Pankaj Gupte, Embedded Real Time Systems Programming,

Tata McGraw Hill, 2004.

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5. Web resources :

www.DSPguide.com- 24 units covering the syllabus.

www.artist- embedded.org/docs/Events/2003/ICD/Education/Moon%20Kim.pdf

csis.bits-pilani.ac.in/faculty/tsbs/Main/Courses/Hsc_08/handouts/eeeg626_08.pdf

www.science-engineering.net/embedded-systems.htm

6. Lesson PlanSl.No Topics Book Periods Cumulative

Hours

UNIT -I

INTRODUCTION TO EMBEDDED SYSTEM

1. Introduction to functional building blocks ofembedded systems

R1

3 3

2. Register, memory devices 2 5

3. Ports, timer 2 7

4. Interrupt controllers using circuit blockdiagram representation for each category.

3 10

UNIT - IIPROCESSOR AND MEMORY ORGANIZATION

6. Structural units in a processor;

R1

1 11

7. Selection of processor & memory devices;

shared memory;

2 13

8. DMA 1 14

9. Interfacing processor, memory and I/O

units;

2 16

10. Memory management Cache mapping

techniques, dynamic allocation -

Fragmentation.

4 20

UNIT- III

DEVICES & BUSES FOR DEVICES NETWORK

14. I/O devices; timer & counting devices;serial communication using I2C, CAN,

USB buses;

R1

3 23

15. Parallel communication using ISA, PCI,PCI/X buses, arm bus;

3 26

16. Interfacing with devices/ports, devicedrivers in a system Serial port & parallel

port.

4 30

UNITY - IVI/O PROGRAMMING SCHEDULE MECHANISM

17. Intel I/O instruction Transfer rate,

latency; interrupt driven I/O -

R1 4 34

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18. Non-maskable interrupts; software

interrupts, writing interrupt serviceroutine in C & assembly languages;

preventing interrupt overrun; disability

interrupts.

4 38

19. Multi threaded programming Context

switching, premature & non-premature

multitasking, semaphores

2 40

20. Scheduling Thread states, pending

threads, context switching, round robinscheduling, priority based scheduling,

assigning priorities, deadlock, watch dog

timers.

4 44

UNIT - V

REAL TIME OPERATING SYSTEM (RTOS)

21. Introduction to basic concepts of RTOS,

Basics of real time & embedded system

operating systems

R1

4 48

22. RTOS Interrupt handling, task

scheduling;

3 51

23. embedded system design issues in systemdevelopment process

3 54

24. Action plan, use of target system,

emulator, use of software tools.

1 55

STAFF INCHARGE HOD/ICE