cpm113 06-design of counters

7/30/2019 Cpm113 06-Design of Counters

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ADVANCED LOGIC

CIRCUITS AND SWITCHING

THEORY (CPM113)

DESIGN OF COUNTERS


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DESIGN OF COUNTERS

Counters

A sequential circuit that goes through a

prescribed sequence of states upon the

application of input pulses is called a counter.

The input pulses, called count pulses, may be

clock pulses.


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DESIGN OF COUNTERS

In a counter, the sequence of states may follow

a binary count or any other sequence of states.

Counters are found in almost all equipment

containing digital logic. They are used for

counting the number of occurrences of an

event and are useful for generating timing

sequences to control operations in a digital

system.


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DESIGN OF COUNTERS

Of the various sequences a counter may follow,

the straight binary sequence is the simplestand most straight forward. A counter that

follows the binary sequence is called a binary

counter. An n-bit binary counter consists of n

flip-flops and can count in binary from 0 to 2n -

1.


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Design a 3-bit binary counter whose state

diagram is given.


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Step 2. Derive the transition table.Use the equation below to determine the

number of flipflops to be used in the design of

the circuit.


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Since there are eight states, the number of

flipflops required would be three.Now we want to implement the counter design

using JK flipflops. Next step is to develop an

excitation table from the state table.


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Step 3. Derive the simplified Boolean

expression for each flipflop input using

Karnaugh map.


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The 1s in the Karnaugh maps are grouped with

"don't cares" and the following expressions forthe J and K inputs of each flip-flop are

obtained:


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Step 4. Construct the sequential circuit.

Implement the combinational logic from the

equations and connect the flip-flops to formthe sequential circuit.

The complete logic of a 3-bit binary counter is

shown below.


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Up/down Counter

An up/down counter is one that is capable of

progressing in either direction through acertain sequence.

It can have any specified sequence of states.

It is sometimes called a bidirectional counter.


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DESIGN OF COUNTERS

Illustrative ExampleDesign the 3-bit Gray code counter using JK

flip-flops.

Step 1. State Diagram

State Diagram for a 3-bit Gray code counter:


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DESIGN OF COUNTERS

Step 2. Next-State Table

Next state table for a 3-bit Gray code counter:


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Step 4. Karnaugh MapsKarnaugh maps for present-state J and K inputs

for the 3- bit Gray code counter.


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DESIGN OF COUNTERS


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Step 5. Logic Expressions for Flip-flop InputsThe next-state J and K outputs for a 3-bit Gray

code counter.


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Step 6: Counter ImplementationThe hardware diagram of the 3-bit Gray code

counter


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Exercises:

1. Design a mod-5 counter which has the

following binary sequence: 0, 1, 2, 3, 4. Use JK

flip-flops.

2. Design a counter that has the following

repeated binary sequence: 0, 1, 2, 3, 4, 5, 6, 7.

Use RS flip-flops.


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3. Design a counter with the following binary

sequence: 1, 2, 5, 7 and repeat. Use JK flip-

flops.

4. Design a counter with the followingrepeated binary sequence: 0, 4, 2, 1, 6. Use T

flip-flops.

5. Design a counter that counts in the

sequence 0, 1, 3, 6, 10, 15, using four a) D, b)

SR, c) JK and d) T flip-flops.

cpm113 06-design of counters

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